Commit | Line | Data |
---|---|---|
8ca151b5 JB |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
51368bf7 | 8 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
4fb06283 | 9 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
de8ba41b | 10 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH |
8ca151b5 JB |
11 | * |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of version 2 of the GNU General Public License as | |
14 | * published by the Free Software Foundation. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
24 | * USA | |
25 | * | |
26 | * The full GNU General Public License is included in this distribution | |
410dc5aa | 27 | * in the file called COPYING. |
8ca151b5 JB |
28 | * |
29 | * Contact Information: | |
cb2f8277 | 30 | * Intel Linux Wireless <linuxwifi@intel.com> |
8ca151b5 JB |
31 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
32 | * | |
33 | * BSD LICENSE | |
34 | * | |
51368bf7 | 35 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
4fb06283 | 36 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
de8ba41b | 37 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH |
8ca151b5 JB |
38 | * All rights reserved. |
39 | * | |
40 | * Redistribution and use in source and binary forms, with or without | |
41 | * modification, are permitted provided that the following conditions | |
42 | * are met: | |
43 | * | |
44 | * * Redistributions of source code must retain the above copyright | |
45 | * notice, this list of conditions and the following disclaimer. | |
46 | * * Redistributions in binary form must reproduce the above copyright | |
47 | * notice, this list of conditions and the following disclaimer in | |
48 | * the documentation and/or other materials provided with the | |
49 | * distribution. | |
50 | * * Neither the name Intel Corporation nor the names of its | |
51 | * contributors may be used to endorse or promote products derived | |
52 | * from this software without specific prior written permission. | |
53 | * | |
54 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
55 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
56 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
57 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
58 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
59 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
60 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
61 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
62 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
63 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
64 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
65 | * | |
66 | *****************************************************************************/ | |
67 | #include <linux/module.h> | |
1bd3cbc1 | 68 | #include <linux/vmalloc.h> |
8ca151b5 JB |
69 | #include <net/mac80211.h> |
70 | ||
9fca9d5c | 71 | #include "fw/notif-wait.h" |
8ca151b5 JB |
72 | #include "iwl-trans.h" |
73 | #include "iwl-op-mode.h" | |
d962f9b1 | 74 | #include "fw/img.h" |
8ca151b5 JB |
75 | #include "iwl-debug.h" |
76 | #include "iwl-drv.h" | |
77 | #include "iwl-modparams.h" | |
78 | #include "mvm.h" | |
79 | #include "iwl-phy-db.h" | |
80 | #include "iwl-eeprom-parse.h" | |
81 | #include "iwl-csr.h" | |
82 | #include "iwl-io.h" | |
83 | #include "iwl-prph.h" | |
84 | #include "rs.h" | |
d172a5ef | 85 | #include "fw/api/scan.h" |
8ca151b5 | 86 | #include "time-event.h" |
39bdb17e | 87 | #include "fw-api.h" |
d172a5ef | 88 | #include "fw/api/scan.h" |
8ca151b5 | 89 | |
8ca151b5 | 90 | #define DRV_DESCRIPTION "The new Intel(R) wireless AGN driver for Linux" |
8ca151b5 | 91 | MODULE_DESCRIPTION(DRV_DESCRIPTION); |
8ca151b5 JB |
92 | MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); |
93 | MODULE_LICENSE("GPL"); | |
94 | ||
95 | static const struct iwl_op_mode_ops iwl_mvm_ops; | |
0316d30e | 96 | static const struct iwl_op_mode_ops iwl_mvm_ops_mq; |
8ca151b5 JB |
97 | |
98 | struct iwl_mvm_mod_params iwlmvm_mod_params = { | |
99 | .power_scheme = IWL_POWER_SCHEME_BPS, | |
ce71c2f7 | 100 | .tfd_q_hang_detect = true |
8ca151b5 JB |
101 | /* rest of fields are 0 by default */ |
102 | }; | |
103 | ||
104 | module_param_named(init_dbg, iwlmvm_mod_params.init_dbg, bool, S_IRUGO); | |
105 | MODULE_PARM_DESC(init_dbg, | |
106 | "set to true to debug an ASSERT in INIT fw (default: false"); | |
107 | module_param_named(power_scheme, iwlmvm_mod_params.power_scheme, int, S_IRUGO); | |
108 | MODULE_PARM_DESC(power_scheme, | |
109 | "power management scheme: 1-active, 2-balanced, 3-low power, default: 2"); | |
ce71c2f7 EG |
110 | module_param_named(tfd_q_hang_detect, iwlmvm_mod_params.tfd_q_hang_detect, |
111 | bool, S_IRUGO); | |
112 | MODULE_PARM_DESC(tfd_q_hang_detect, | |
113 | "TFD queues hang detection (default: true"); | |
8ca151b5 JB |
114 | |
115 | /* | |
116 | * module init and exit functions | |
117 | */ | |
118 | static int __init iwl_mvm_init(void) | |
119 | { | |
120 | int ret; | |
121 | ||
122 | ret = iwl_mvm_rate_control_register(); | |
123 | if (ret) { | |
124 | pr_err("Unable to register rate control algorithm: %d\n", ret); | |
125 | return ret; | |
126 | } | |
127 | ||
128 | ret = iwl_opmode_register("iwlmvm", &iwl_mvm_ops); | |
129 | ||
130 | if (ret) { | |
131 | pr_err("Unable to register MVM op_mode: %d\n", ret); | |
132 | iwl_mvm_rate_control_unregister(); | |
133 | } | |
134 | ||
135 | return ret; | |
136 | } | |
137 | module_init(iwl_mvm_init); | |
138 | ||
139 | static void __exit iwl_mvm_exit(void) | |
140 | { | |
141 | iwl_opmode_deregister("iwlmvm"); | |
142 | iwl_mvm_rate_control_unregister(); | |
143 | } | |
144 | module_exit(iwl_mvm_exit); | |
145 | ||
146 | static void iwl_mvm_nic_config(struct iwl_op_mode *op_mode) | |
147 | { | |
148 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
149 | u8 radio_cfg_type, radio_cfg_step, radio_cfg_dash; | |
150 | u32 reg_val = 0; | |
a0544272 MH |
151 | u32 phy_config = iwl_mvm_get_phy_config(mvm); |
152 | ||
153 | radio_cfg_type = (phy_config & FW_PHY_CFG_RADIO_TYPE) >> | |
154 | FW_PHY_CFG_RADIO_TYPE_POS; | |
155 | radio_cfg_step = (phy_config & FW_PHY_CFG_RADIO_STEP) >> | |
156 | FW_PHY_CFG_RADIO_STEP_POS; | |
157 | radio_cfg_dash = (phy_config & FW_PHY_CFG_RADIO_DASH) >> | |
158 | FW_PHY_CFG_RADIO_DASH_POS; | |
8ca151b5 JB |
159 | |
160 | /* SKU control */ | |
161 | reg_val |= CSR_HW_REV_STEP(mvm->trans->hw_rev) << | |
162 | CSR_HW_IF_CONFIG_REG_POS_MAC_STEP; | |
163 | reg_val |= CSR_HW_REV_DASH(mvm->trans->hw_rev) << | |
164 | CSR_HW_IF_CONFIG_REG_POS_MAC_DASH; | |
165 | ||
166 | /* radio configuration */ | |
167 | reg_val |= radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE; | |
168 | reg_val |= radio_cfg_step << CSR_HW_IF_CONFIG_REG_POS_PHY_STEP; | |
169 | reg_val |= radio_cfg_dash << CSR_HW_IF_CONFIG_REG_POS_PHY_DASH; | |
170 | ||
171 | WARN_ON((radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE) & | |
172 | ~CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE); | |
173 | ||
9b1fcc11 | 174 | /* |
6e584873 SS |
175 | * TODO: Bits 7-8 of CSR in 8000 HW family and higher set the ADC |
176 | * sampling, and shouldn't be set to any non-zero value. | |
177 | * The same is supposed to be true of the other HW, but unsetting | |
178 | * them (such as the 7260) causes automatic tests to fail on seemingly | |
179 | * unrelated errors. Need to further investigate this, but for now | |
180 | * we'll separate cases. | |
9b1fcc11 | 181 | */ |
6e584873 | 182 | if (mvm->trans->cfg->device_family < IWL_DEVICE_FAMILY_8000) |
9b1fcc11 | 183 | reg_val |= CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI; |
8ca151b5 | 184 | |
e139dc4a LE |
185 | iwl_trans_set_bits_mask(mvm->trans, CSR_HW_IF_CONFIG_REG, |
186 | CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH | | |
187 | CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP | | |
188 | CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE | | |
189 | CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP | | |
190 | CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH | | |
191 | CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | | |
192 | CSR_HW_IF_CONFIG_REG_BIT_MAC_SI, | |
193 | reg_val); | |
8ca151b5 JB |
194 | |
195 | IWL_DEBUG_INFO(mvm, "Radio type=0x%x-0x%x-0x%x\n", radio_cfg_type, | |
196 | radio_cfg_step, radio_cfg_dash); | |
197 | ||
198 | /* | |
199 | * W/A : NIC is stuck in a reset state after Early PCIe power off | |
200 | * (PCIe power is lost before PERST# is asserted), causing ME FW | |
201 | * to lose ownership and not being able to obtain it back. | |
202 | */ | |
95411d04 | 203 | if (!mvm->trans->cfg->apmg_not_supported) |
3073d8c0 EH |
204 | iwl_set_bits_mask_prph(mvm->trans, APMG_PS_CTRL_REG, |
205 | APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS, | |
206 | ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS); | |
8ca151b5 JB |
207 | } |
208 | ||
c9cb14a6 CRI |
209 | /** |
210 | * enum iwl_rx_handler_context context for Rx handler | |
211 | * @RX_HANDLER_SYNC : this means that it will be called in the Rx path | |
212 | * which can't acquire mvm->mutex. | |
213 | * @RX_HANDLER_ASYNC_LOCKED : If the handler needs to hold mvm->mutex | |
214 | * (and only in this case!), it should be set as ASYNC. In that case, | |
215 | * it will be called from a worker with mvm->mutex held. | |
216 | * @RX_HANDLER_ASYNC_UNLOCKED : in case the handler needs to lock the | |
217 | * mutex itself, it will be called from a worker without mvm->mutex held. | |
218 | */ | |
219 | enum iwl_rx_handler_context { | |
220 | RX_HANDLER_SYNC, | |
221 | RX_HANDLER_ASYNC_LOCKED, | |
222 | RX_HANDLER_ASYNC_UNLOCKED, | |
223 | }; | |
224 | ||
225 | /** | |
226 | * struct iwl_rx_handlers handler for FW notification | |
227 | * @cmd_id: command id | |
228 | * @context: see &iwl_rx_handler_context | |
229 | * @fn: the function is called when notification is received | |
230 | */ | |
8ca151b5 | 231 | struct iwl_rx_handlers { |
1230b16b | 232 | u16 cmd_id; |
c9cb14a6 | 233 | enum iwl_rx_handler_context context; |
0416841d | 234 | void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb); |
8ca151b5 JB |
235 | }; |
236 | ||
c9cb14a6 CRI |
237 | #define RX_HANDLER(_cmd_id, _fn, _context) \ |
238 | { .cmd_id = _cmd_id, .fn = _fn, .context = _context } | |
239 | #define RX_HANDLER_GRP(_grp, _cmd, _fn, _context) \ | |
240 | { .cmd_id = WIDE_ID(_grp, _cmd), .fn = _fn, .context = _context } | |
8ca151b5 JB |
241 | |
242 | /* | |
243 | * Handlers for fw notifications | |
244 | * Convention: RX_HANDLER(CMD_NAME, iwl_mvm_rx_CMD_NAME | |
245 | * This list should be in order of frequency for performance purposes. | |
246 | * | |
c9cb14a6 | 247 | * The handler can be one from three contexts, see &iwl_rx_handler_context |
8ca151b5 JB |
248 | */ |
249 | static const struct iwl_rx_handlers iwl_mvm_rx_handlers[] = { | |
c9cb14a6 CRI |
250 | RX_HANDLER(TX_CMD, iwl_mvm_rx_tx_cmd, RX_HANDLER_SYNC), |
251 | RX_HANDLER(BA_NOTIF, iwl_mvm_rx_ba_notif, RX_HANDLER_SYNC), | |
252 | ||
253 | RX_HANDLER(BT_PROFILE_NOTIFICATION, iwl_mvm_rx_bt_coex_notif, | |
254 | RX_HANDLER_ASYNC_LOCKED), | |
255 | RX_HANDLER(BEACON_NOTIFICATION, iwl_mvm_rx_beacon_notif, | |
256 | RX_HANDLER_ASYNC_LOCKED), | |
257 | RX_HANDLER(STATISTICS_NOTIFICATION, iwl_mvm_rx_statistics, | |
258 | RX_HANDLER_ASYNC_LOCKED), | |
b9fae2d5 | 259 | RX_HANDLER(ANTENNA_COUPLING_NOTIFICATION, |
c9cb14a6 | 260 | iwl_mvm_rx_ant_coupling_notif, RX_HANDLER_ASYNC_LOCKED), |
f421f9c3 | 261 | |
3af512d6 | 262 | RX_HANDLER(BA_WINDOW_STATUS_NOTIFICATION_ID, |
c9cb14a6 | 263 | iwl_mvm_window_status_notif, RX_HANDLER_SYNC), |
3af512d6 | 264 | |
c9cb14a6 CRI |
265 | RX_HANDLER(TIME_EVENT_NOTIFICATION, iwl_mvm_rx_time_event_notif, |
266 | RX_HANDLER_SYNC), | |
267 | RX_HANDLER(MCC_CHUB_UPDATE_CMD, iwl_mvm_rx_chub_update_mcc, | |
268 | RX_HANDLER_ASYNC_LOCKED), | |
497b49d2 | 269 | |
c9cb14a6 | 270 | RX_HANDLER(EOSP_NOTIFICATION, iwl_mvm_rx_eosp_notif, RX_HANDLER_SYNC), |
3e56eadf | 271 | |
e5d74646 | 272 | RX_HANDLER(SCAN_ITERATION_COMPLETE, |
c9cb14a6 | 273 | iwl_mvm_rx_lmac_scan_iter_complete_notif, RX_HANDLER_SYNC), |
35a000b7 | 274 | RX_HANDLER(SCAN_OFFLOAD_COMPLETE, |
c9cb14a6 CRI |
275 | iwl_mvm_rx_lmac_scan_complete_notif, |
276 | RX_HANDLER_ASYNC_LOCKED), | |
6e56f01d | 277 | RX_HANDLER(MATCH_FOUND_NOTIFICATION, iwl_mvm_rx_scan_match_found, |
c9cb14a6 | 278 | RX_HANDLER_SYNC), |
d2496221 | 279 | RX_HANDLER(SCAN_COMPLETE_UMAC, iwl_mvm_rx_umac_scan_complete_notif, |
c9cb14a6 | 280 | RX_HANDLER_ASYNC_LOCKED), |
ee9219b2 | 281 | RX_HANDLER(SCAN_ITERATION_COMPLETE_UMAC, |
c9cb14a6 | 282 | iwl_mvm_rx_umac_scan_iter_complete_notif, RX_HANDLER_SYNC), |
497b49d2 | 283 | |
c9cb14a6 CRI |
284 | RX_HANDLER(CARD_STATE_NOTIFICATION, iwl_mvm_rx_card_state_notif, |
285 | RX_HANDLER_SYNC), | |
8ca151b5 | 286 | |
d64048ed | 287 | RX_HANDLER(MISSED_BEACONS_NOTIFICATION, iwl_mvm_rx_missed_beacons_notif, |
c9cb14a6 | 288 | RX_HANDLER_SYNC), |
d64048ed | 289 | |
c9cb14a6 | 290 | RX_HANDLER(REPLY_ERROR, iwl_mvm_rx_fw_error, RX_HANDLER_SYNC), |
175a70b7 | 291 | RX_HANDLER(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION, |
c9cb14a6 CRI |
292 | iwl_mvm_power_uapsd_misbehaving_ap_notif, RX_HANDLER_SYNC), |
293 | RX_HANDLER(DTS_MEASUREMENT_NOTIFICATION, iwl_mvm_temp_notif, | |
294 | RX_HANDLER_ASYNC_LOCKED), | |
09eef330 | 295 | RX_HANDLER_GRP(PHY_OPS_GROUP, DTS_MEASUREMENT_NOTIF_WIDE, |
ec77a33e | 296 | iwl_mvm_temp_notif, RX_HANDLER_ASYNC_UNLOCKED), |
0a3b7119 | 297 | RX_HANDLER_GRP(PHY_OPS_GROUP, CT_KILL_NOTIFICATION, |
c9cb14a6 | 298 | iwl_mvm_ct_kill_notif, RX_HANDLER_SYNC), |
ea9af24d | 299 | |
1d3c3f63 | 300 | RX_HANDLER(TDLS_CHANNEL_SWITCH_NOTIFICATION, iwl_mvm_rx_tdls_notif, |
c9cb14a6 CRI |
301 | RX_HANDLER_ASYNC_LOCKED), |
302 | RX_HANDLER(MFUART_LOAD_NOTIFICATION, iwl_mvm_rx_mfuart_notif, | |
303 | RX_HANDLER_SYNC), | |
304 | RX_HANDLER(TOF_NOTIFICATION, iwl_mvm_tof_resp_handler, | |
305 | RX_HANDLER_ASYNC_LOCKED), | |
bdccdb85 GBA |
306 | RX_HANDLER_GRP(DEBUG_GROUP, MFU_ASSERT_DUMP_NTF, |
307 | iwl_mvm_mfu_assert_dump_notif, RX_HANDLER_SYNC), | |
0db056d3 | 308 | RX_HANDLER_GRP(PROT_OFFLOAD_GROUP, STORED_BEACON_NTF, |
c9cb14a6 | 309 | iwl_mvm_rx_stored_beacon_notif, RX_HANDLER_SYNC), |
f92659a1 | 310 | RX_HANDLER_GRP(DATA_PATH_GROUP, MU_GROUP_MGMT_NOTIF, |
c9cb14a6 | 311 | iwl_mvm_mu_mimo_grp_notif, RX_HANDLER_SYNC), |
65e25482 JB |
312 | RX_HANDLER_GRP(DATA_PATH_GROUP, STA_PM_NOTIF, |
313 | iwl_mvm_sta_pm_notif, RX_HANDLER_SYNC), | |
8ca151b5 JB |
314 | }; |
315 | #undef RX_HANDLER | |
1230b16b | 316 | #undef RX_HANDLER_GRP |
39bdb17e SD |
317 | |
318 | /* Please keep this array *SORTED* by hex value. | |
319 | * Access is done through binary search | |
320 | */ | |
321 | static const struct iwl_hcmd_names iwl_mvm_legacy_names[] = { | |
322 | HCMD_NAME(MVM_ALIVE), | |
323 | HCMD_NAME(REPLY_ERROR), | |
324 | HCMD_NAME(ECHO_CMD), | |
325 | HCMD_NAME(INIT_COMPLETE_NOTIF), | |
326 | HCMD_NAME(PHY_CONTEXT_CMD), | |
327 | HCMD_NAME(DBG_CFG), | |
328 | HCMD_NAME(ANTENNA_COUPLING_NOTIFICATION), | |
329 | HCMD_NAME(SCAN_CFG_CMD), | |
330 | HCMD_NAME(SCAN_REQ_UMAC), | |
331 | HCMD_NAME(SCAN_ABORT_UMAC), | |
332 | HCMD_NAME(SCAN_COMPLETE_UMAC), | |
333 | HCMD_NAME(TOF_CMD), | |
334 | HCMD_NAME(TOF_NOTIFICATION), | |
3af512d6 | 335 | HCMD_NAME(BA_WINDOW_STATUS_NOTIFICATION_ID), |
39bdb17e SD |
336 | HCMD_NAME(ADD_STA_KEY), |
337 | HCMD_NAME(ADD_STA), | |
338 | HCMD_NAME(REMOVE_STA), | |
339 | HCMD_NAME(FW_GET_ITEM_CMD), | |
340 | HCMD_NAME(TX_CMD), | |
341 | HCMD_NAME(SCD_QUEUE_CFG), | |
342 | HCMD_NAME(TXPATH_FLUSH), | |
343 | HCMD_NAME(MGMT_MCAST_KEY), | |
344 | HCMD_NAME(WEP_KEY), | |
345 | HCMD_NAME(SHARED_MEM_CFG), | |
346 | HCMD_NAME(TDLS_CHANNEL_SWITCH_CMD), | |
347 | HCMD_NAME(MAC_CONTEXT_CMD), | |
348 | HCMD_NAME(TIME_EVENT_CMD), | |
349 | HCMD_NAME(TIME_EVENT_NOTIFICATION), | |
350 | HCMD_NAME(BINDING_CONTEXT_CMD), | |
351 | HCMD_NAME(TIME_QUOTA_CMD), | |
352 | HCMD_NAME(NON_QOS_TX_COUNTER_CMD), | |
353 | HCMD_NAME(LQ_CMD), | |
354 | HCMD_NAME(FW_PAGING_BLOCK_CMD), | |
355 | HCMD_NAME(SCAN_OFFLOAD_REQUEST_CMD), | |
356 | HCMD_NAME(SCAN_OFFLOAD_ABORT_CMD), | |
357 | HCMD_NAME(HOT_SPOT_CMD), | |
358 | HCMD_NAME(SCAN_OFFLOAD_PROFILES_QUERY_CMD), | |
39bdb17e SD |
359 | HCMD_NAME(BT_COEX_UPDATE_CORUN_LUT), |
360 | HCMD_NAME(BT_COEX_UPDATE_REDUCED_TXP), | |
361 | HCMD_NAME(BT_COEX_CI), | |
362 | HCMD_NAME(PHY_CONFIGURATION_CMD), | |
363 | HCMD_NAME(CALIB_RES_NOTIF_PHY_DB), | |
176aa60b | 364 | HCMD_NAME(PHY_DB_CMD), |
39bdb17e SD |
365 | HCMD_NAME(SCAN_OFFLOAD_COMPLETE), |
366 | HCMD_NAME(SCAN_OFFLOAD_UPDATE_PROFILES_CMD), | |
39bdb17e SD |
367 | HCMD_NAME(POWER_TABLE_CMD), |
368 | HCMD_NAME(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION), | |
369 | HCMD_NAME(REPLY_THERMAL_MNG_BACKOFF), | |
370 | HCMD_NAME(DC2DC_CONFIG_CMD), | |
371 | HCMD_NAME(NVM_ACCESS_CMD), | |
39bdb17e SD |
372 | HCMD_NAME(BEACON_NOTIFICATION), |
373 | HCMD_NAME(BEACON_TEMPLATE_CMD), | |
374 | HCMD_NAME(TX_ANT_CONFIGURATION_CMD), | |
375 | HCMD_NAME(BT_CONFIG), | |
376 | HCMD_NAME(STATISTICS_CMD), | |
377 | HCMD_NAME(STATISTICS_NOTIFICATION), | |
378 | HCMD_NAME(EOSP_NOTIFICATION), | |
379 | HCMD_NAME(REDUCE_TX_POWER_CMD), | |
39bdb17e SD |
380 | HCMD_NAME(CARD_STATE_NOTIFICATION), |
381 | HCMD_NAME(MISSED_BEACONS_NOTIFICATION), | |
382 | HCMD_NAME(TDLS_CONFIG_CMD), | |
383 | HCMD_NAME(MAC_PM_POWER_TABLE), | |
384 | HCMD_NAME(TDLS_CHANNEL_SWITCH_NOTIFICATION), | |
385 | HCMD_NAME(MFUART_LOAD_NOTIFICATION), | |
43413a97 | 386 | HCMD_NAME(RSS_CONFIG_CMD), |
39bdb17e SD |
387 | HCMD_NAME(SCAN_ITERATION_COMPLETE_UMAC), |
388 | HCMD_NAME(REPLY_RX_PHY_CMD), | |
389 | HCMD_NAME(REPLY_RX_MPDU_CMD), | |
390 | HCMD_NAME(BA_NOTIF), | |
391 | HCMD_NAME(MCC_UPDATE_CMD), | |
392 | HCMD_NAME(MCC_CHUB_UPDATE_CMD), | |
393 | HCMD_NAME(MARKER_CMD), | |
39bdb17e SD |
394 | HCMD_NAME(BT_PROFILE_NOTIFICATION), |
395 | HCMD_NAME(BCAST_FILTER_CMD), | |
396 | HCMD_NAME(MCAST_FILTER_CMD), | |
397 | HCMD_NAME(REPLY_SF_CFG_CMD), | |
398 | HCMD_NAME(REPLY_BEACON_FILTERING_CMD), | |
399 | HCMD_NAME(D3_CONFIG_CMD), | |
400 | HCMD_NAME(PROT_OFFLOAD_CONFIG_CMD), | |
401 | HCMD_NAME(OFFLOADS_QUERY_CMD), | |
402 | HCMD_NAME(REMOTE_WAKE_CONFIG_CMD), | |
403 | HCMD_NAME(MATCH_FOUND_NOTIFICATION), | |
39bdb17e SD |
404 | HCMD_NAME(DTS_MEASUREMENT_NOTIFICATION), |
405 | HCMD_NAME(WOWLAN_PATTERNS), | |
406 | HCMD_NAME(WOWLAN_CONFIGURATION), | |
407 | HCMD_NAME(WOWLAN_TSC_RSC_PARAM), | |
408 | HCMD_NAME(WOWLAN_TKIP_PARAM), | |
409 | HCMD_NAME(WOWLAN_KEK_KCK_MATERIAL), | |
410 | HCMD_NAME(WOWLAN_GET_STATUSES), | |
39bdb17e SD |
411 | HCMD_NAME(SCAN_ITERATION_COMPLETE), |
412 | HCMD_NAME(D0I3_END_CMD), | |
413 | HCMD_NAME(LTR_CONFIG), | |
8ca151b5 | 414 | }; |
39bdb17e | 415 | |
5b086414 GBA |
416 | /* Please keep this array *SORTED* by hex value. |
417 | * Access is done through binary search | |
418 | */ | |
419 | static const struct iwl_hcmd_names iwl_mvm_system_names[] = { | |
420 | HCMD_NAME(SHARED_MEM_CFG_CMD), | |
4399caaa | 421 | HCMD_NAME(INIT_EXTENDED_CFG_CMD), |
5b086414 GBA |
422 | }; |
423 | ||
03098268 AE |
424 | /* Please keep this array *SORTED* by hex value. |
425 | * Access is done through binary search | |
426 | */ | |
427 | static const struct iwl_hcmd_names iwl_mvm_mac_conf_names[] = { | |
428 | HCMD_NAME(LINK_QUALITY_MEASUREMENT_CMD), | |
429 | HCMD_NAME(LINK_QUALITY_MEASUREMENT_COMPLETE_NOTIF), | |
d3a108a4 | 430 | HCMD_NAME(CHANNEL_SWITCH_NOA_NOTIF), |
03098268 AE |
431 | }; |
432 | ||
39bdb17e SD |
433 | /* Please keep this array *SORTED* by hex value. |
434 | * Access is done through binary search | |
435 | */ | |
436 | static const struct iwl_hcmd_names iwl_mvm_phy_names[] = { | |
437 | HCMD_NAME(CMD_DTS_MEASUREMENT_TRIGGER_WIDE), | |
5c89e7bc | 438 | HCMD_NAME(CTDP_CONFIG_CMD), |
c221daf2 | 439 | HCMD_NAME(TEMP_REPORTING_THRESHOLDS_CMD), |
a6bff3cb | 440 | HCMD_NAME(GEO_TX_POWER_LIMIT), |
0a3b7119 | 441 | HCMD_NAME(CT_KILL_NOTIFICATION), |
39bdb17e SD |
442 | HCMD_NAME(DTS_MEASUREMENT_NOTIF_WIDE), |
443 | }; | |
444 | ||
e0d8fdec SS |
445 | /* Please keep this array *SORTED* by hex value. |
446 | * Access is done through binary search | |
447 | */ | |
448 | static const struct iwl_hcmd_names iwl_mvm_data_path_names[] = { | |
ddef2f98 | 449 | HCMD_NAME(DQA_ENABLE_CMD), |
e0d8fdec | 450 | HCMD_NAME(UPDATE_MU_GROUPS_CMD), |
94bb4481 | 451 | HCMD_NAME(TRIGGER_RX_QUEUES_NOTIF_CMD), |
65e25482 | 452 | HCMD_NAME(STA_PM_NOTIF), |
f92659a1 | 453 | HCMD_NAME(MU_GROUP_MGMT_NOTIF), |
94bb4481 | 454 | HCMD_NAME(RX_QUEUES_NOTIFICATION), |
e0d8fdec SS |
455 | }; |
456 | ||
bdccdb85 GBA |
457 | /* Please keep this array *SORTED* by hex value. |
458 | * Access is done through binary search | |
459 | */ | |
460 | static const struct iwl_hcmd_names iwl_mvm_debug_names[] = { | |
461 | HCMD_NAME(MFU_ASSERT_DUMP_NTF), | |
462 | }; | |
463 | ||
0db056d3 SS |
464 | /* Please keep this array *SORTED* by hex value. |
465 | * Access is done through binary search | |
466 | */ | |
467 | static const struct iwl_hcmd_names iwl_mvm_prot_offload_names[] = { | |
468 | HCMD_NAME(STORED_BEACON_NTF), | |
469 | }; | |
470 | ||
1f370650 SS |
471 | /* Please keep this array *SORTED* by hex value. |
472 | * Access is done through binary search | |
473 | */ | |
474 | static const struct iwl_hcmd_names iwl_mvm_regulatory_and_nvm_names[] = { | |
475 | HCMD_NAME(NVM_ACCESS_COMPLETE), | |
e9e1ba3d | 476 | HCMD_NAME(NVM_GET_INFO), |
1f370650 SS |
477 | }; |
478 | ||
39bdb17e SD |
479 | static const struct iwl_hcmd_arr iwl_mvm_groups[] = { |
480 | [LEGACY_GROUP] = HCMD_ARR(iwl_mvm_legacy_names), | |
481 | [LONG_GROUP] = HCMD_ARR(iwl_mvm_legacy_names), | |
5b086414 | 482 | [SYSTEM_GROUP] = HCMD_ARR(iwl_mvm_system_names), |
03098268 | 483 | [MAC_CONF_GROUP] = HCMD_ARR(iwl_mvm_mac_conf_names), |
39bdb17e | 484 | [PHY_OPS_GROUP] = HCMD_ARR(iwl_mvm_phy_names), |
e0d8fdec | 485 | [DATA_PATH_GROUP] = HCMD_ARR(iwl_mvm_data_path_names), |
0db056d3 | 486 | [PROT_OFFLOAD_GROUP] = HCMD_ARR(iwl_mvm_prot_offload_names), |
1f370650 SS |
487 | [REGULATORY_AND_NVM_GROUP] = |
488 | HCMD_ARR(iwl_mvm_regulatory_and_nvm_names), | |
39bdb17e SD |
489 | }; |
490 | ||
8ca151b5 JB |
491 | /* this forward declaration can avoid to export the function */ |
492 | static void iwl_mvm_async_handlers_wk(struct work_struct *wk); | |
37577fe2 | 493 | static void iwl_mvm_d0i3_exit_work(struct work_struct *wk); |
8ca151b5 | 494 | |
0c0e2c71 IY |
495 | static u32 calc_min_backoff(struct iwl_trans *trans, const struct iwl_cfg *cfg) |
496 | { | |
497 | const struct iwl_pwr_tx_backoff *pwr_tx_backoff = cfg->pwr_tx_backoffs; | |
498 | ||
499 | if (!pwr_tx_backoff) | |
500 | return 0; | |
501 | ||
502 | while (pwr_tx_backoff->pwr) { | |
503 | if (trans->dflt_pwr_limit >= pwr_tx_backoff->pwr) | |
504 | return pwr_tx_backoff->backoff; | |
505 | ||
506 | pwr_tx_backoff++; | |
507 | } | |
508 | ||
509 | return 0; | |
510 | } | |
511 | ||
d3a108a4 AO |
512 | static void iwl_mvm_tx_unblock_dwork(struct work_struct *work) |
513 | { | |
514 | struct iwl_mvm *mvm = | |
515 | container_of(work, struct iwl_mvm, cs_tx_unblock_dwork.work); | |
516 | struct ieee80211_vif *tx_blocked_vif; | |
517 | struct iwl_mvm_vif *mvmvif; | |
518 | ||
519 | mutex_lock(&mvm->mutex); | |
520 | ||
521 | tx_blocked_vif = | |
522 | rcu_dereference_protected(mvm->csa_tx_blocked_vif, | |
523 | lockdep_is_held(&mvm->mutex)); | |
524 | ||
525 | if (!tx_blocked_vif) | |
526 | goto unlock; | |
527 | ||
528 | mvmvif = iwl_mvm_vif_from_mac80211(tx_blocked_vif); | |
529 | iwl_mvm_modify_all_sta_disable_tx(mvm, mvmvif, false); | |
530 | RCU_INIT_POINTER(mvm->csa_tx_blocked_vif, NULL); | |
531 | unlock: | |
532 | mutex_unlock(&mvm->mutex); | |
533 | } | |
534 | ||
7174beb6 JB |
535 | static int iwl_mvm_fwrt_dump_start(void *ctx) |
536 | { | |
537 | struct iwl_mvm *mvm = ctx; | |
538 | int ret; | |
539 | ||
540 | ret = iwl_mvm_ref_sync(mvm, IWL_MVM_REF_FW_DBG_COLLECT); | |
541 | if (ret) | |
542 | return ret; | |
543 | ||
544 | mutex_lock(&mvm->mutex); | |
545 | ||
546 | return 0; | |
547 | } | |
548 | ||
549 | static void iwl_mvm_fwrt_dump_end(void *ctx) | |
550 | { | |
551 | struct iwl_mvm *mvm = ctx; | |
552 | ||
553 | mutex_unlock(&mvm->mutex); | |
554 | ||
555 | iwl_mvm_unref(mvm, IWL_MVM_REF_FW_DBG_COLLECT); | |
556 | } | |
557 | ||
558 | static const struct iwl_fw_runtime_ops iwl_mvm_fwrt_ops = { | |
559 | .dump_start = iwl_mvm_fwrt_dump_start, | |
560 | .dump_end = iwl_mvm_fwrt_dump_end, | |
561 | }; | |
562 | ||
8ca151b5 JB |
563 | static struct iwl_op_mode * |
564 | iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg, | |
565 | const struct iwl_fw *fw, struct dentry *dbgfs_dir) | |
566 | { | |
567 | struct ieee80211_hw *hw; | |
568 | struct iwl_op_mode *op_mode; | |
569 | struct iwl_mvm *mvm; | |
570 | struct iwl_trans_config trans_cfg = {}; | |
571 | static const u8 no_reclaim_cmds[] = { | |
572 | TX_CMD, | |
573 | }; | |
574 | int err, scan_size; | |
0c0e2c71 | 575 | u32 min_backoff; |
8ca151b5 | 576 | |
c4d83271 EG |
577 | /* |
578 | * We use IWL_MVM_STATION_COUNT to check the validity of the station | |
579 | * index all over the driver - check that its value corresponds to the | |
580 | * array size. | |
581 | */ | |
582 | BUILD_BUG_ON(ARRAY_SIZE(mvm->fw_id_to_mac_id) != IWL_MVM_STATION_COUNT); | |
583 | ||
8ca151b5 JB |
584 | /******************************** |
585 | * 1. Allocating and configuring HW data | |
586 | ********************************/ | |
587 | hw = ieee80211_alloc_hw(sizeof(struct iwl_op_mode) + | |
588 | sizeof(struct iwl_mvm), | |
589 | &iwl_mvm_hw_ops); | |
590 | if (!hw) | |
591 | return NULL; | |
592 | ||
745160ee OG |
593 | if (cfg->max_rx_agg_size) |
594 | hw->max_rx_aggregation_subframes = cfg->max_rx_agg_size; | |
595 | ||
77d96730 GG |
596 | if (cfg->max_tx_agg_size) |
597 | hw->max_tx_aggregation_subframes = cfg->max_tx_agg_size; | |
598 | ||
8ca151b5 | 599 | op_mode = hw->priv; |
8ca151b5 JB |
600 | |
601 | mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
602 | mvm->dev = trans->dev; | |
603 | mvm->trans = trans; | |
604 | mvm->cfg = cfg; | |
605 | mvm->fw = fw; | |
606 | mvm->hw = hw; | |
607 | ||
7174beb6 | 608 | iwl_fw_runtime_init(&mvm->fwrt, trans, fw, &iwl_mvm_fwrt_ops, mvm); |
235acb18 | 609 | |
de8ba41b LK |
610 | mvm->init_status = 0; |
611 | ||
0316d30e JB |
612 | if (iwl_mvm_has_new_rx_api(mvm)) { |
613 | op_mode->ops = &iwl_mvm_ops_mq; | |
25c2b22c | 614 | trans->rx_mpdu_cmd_hdr_size = sizeof(struct iwl_rx_mpdu_desc); |
0316d30e JB |
615 | } else { |
616 | op_mode->ops = &iwl_mvm_ops; | |
25c2b22c SS |
617 | trans->rx_mpdu_cmd_hdr_size = |
618 | sizeof(struct iwl_rx_mpdu_res_start); | |
0316d30e JB |
619 | |
620 | if (WARN_ON(trans->num_rx_queues > 1)) | |
621 | goto out_free; | |
622 | } | |
623 | ||
3b37f4c9 | 624 | mvm->fw_restart = iwlwifi_mod_params.fw_restart ? -1 : 0; |
291aa7c4 | 625 | |
c8f54701 JB |
626 | mvm->aux_queue = IWL_MVM_DQA_AUX_QUEUE; |
627 | mvm->probe_queue = IWL_MVM_DQA_AP_PROBE_RESP_QUEUE; | |
628 | mvm->p2p_dev_queue = IWL_MVM_DQA_P2P_DEVICE_QUEUE; | |
629 | ||
1f3b0ff8 | 630 | mvm->sf_state = SF_UNINIT; |
7d6222e2 | 631 | if (iwl_mvm_has_unified_ucode(mvm)) |
702e975d | 632 | iwl_fw_set_current_image(&mvm->fwrt, IWL_UCODE_REGULAR); |
1f370650 | 633 | else |
702e975d | 634 | iwl_fw_set_current_image(&mvm->fwrt, IWL_UCODE_INIT); |
c89e333d | 635 | mvm->drop_bcn_ap_mode = true; |
19e737c9 | 636 | |
8ca151b5 | 637 | mutex_init(&mvm->mutex); |
d15a747f | 638 | mutex_init(&mvm->d0i3_suspend_mutex); |
8ca151b5 JB |
639 | spin_lock_init(&mvm->async_handlers_lock); |
640 | INIT_LIST_HEAD(&mvm->time_event_list); | |
b112889c | 641 | INIT_LIST_HEAD(&mvm->aux_roc_te_list); |
8ca151b5 JB |
642 | INIT_LIST_HEAD(&mvm->async_handlers_list); |
643 | spin_lock_init(&mvm->time_event_lock); | |
4ecafae9 | 644 | spin_lock_init(&mvm->queue_info_lock); |
8ca151b5 JB |
645 | |
646 | INIT_WORK(&mvm->async_handlers_wk, iwl_mvm_async_handlers_wk); | |
647 | INIT_WORK(&mvm->roc_done_wk, iwl_mvm_roc_done_wk); | |
37577fe2 | 648 | INIT_WORK(&mvm->d0i3_exit_work, iwl_mvm_d0i3_exit_work); |
1d3c3f63 | 649 | INIT_DELAYED_WORK(&mvm->tdls_cs.dwork, iwl_mvm_tdls_ch_switch_work); |
69e04642 | 650 | INIT_DELAYED_WORK(&mvm->scan_timeout_dwork, iwl_mvm_scan_timeout_wk); |
24afba76 | 651 | INIT_WORK(&mvm->add_stream_wk, iwl_mvm_add_new_dqa_stream_wk); |
8ca151b5 | 652 | |
b2492501 | 653 | spin_lock_init(&mvm->d0i3_tx_lock); |
576eeee9 | 654 | spin_lock_init(&mvm->refs_lock); |
b2492501 AN |
655 | skb_queue_head_init(&mvm->d0i3_tx); |
656 | init_waitqueue_head(&mvm->d0i3_exit_waitq); | |
3a732c65 | 657 | init_waitqueue_head(&mvm->rx_sync_waitq); |
b2492501 | 658 | |
0636b938 SS |
659 | atomic_set(&mvm->queue_sync_counter, 0); |
660 | ||
8ca151b5 JB |
661 | SET_IEEE80211_DEV(mvm->hw, mvm->trans->dev); |
662 | ||
d3a108a4 AO |
663 | INIT_DELAYED_WORK(&mvm->cs_tx_unblock_dwork, iwl_mvm_tx_unblock_dwork); |
664 | ||
8ca151b5 JB |
665 | /* |
666 | * Populate the state variables that the transport layer needs | |
667 | * to know about. | |
668 | */ | |
669 | trans_cfg.op_mode = op_mode; | |
670 | trans_cfg.no_reclaim_cmds = no_reclaim_cmds; | |
671 | trans_cfg.n_no_reclaim_cmds = ARRAY_SIZE(no_reclaim_cmds); | |
6c4fbcbc | 672 | switch (iwlwifi_mod_params.amsdu_size) { |
4bdd4dfe | 673 | case IWL_AMSDU_DEF: |
6c4fbcbc EG |
674 | case IWL_AMSDU_4K: |
675 | trans_cfg.rx_buf_size = IWL_AMSDU_4K; | |
676 | break; | |
677 | case IWL_AMSDU_8K: | |
678 | trans_cfg.rx_buf_size = IWL_AMSDU_8K; | |
679 | break; | |
680 | case IWL_AMSDU_12K: | |
681 | trans_cfg.rx_buf_size = IWL_AMSDU_12K; | |
682 | break; | |
683 | default: | |
684 | pr_err("%s: Unsupported amsdu_size: %d\n", KBUILD_MODNAME, | |
685 | iwlwifi_mod_params.amsdu_size); | |
686 | trans_cfg.rx_buf_size = IWL_AMSDU_4K; | |
687 | } | |
4bdd4dfe EG |
688 | |
689 | /* the hardware splits the A-MSDU */ | |
690 | if (mvm->cfg->mq_rx_supported) | |
691 | trans_cfg.rx_buf_size = IWL_AMSDU_4K; | |
8ca151b5 | 692 | |
4b87e5af LC |
693 | trans->wide_cmd_header = true; |
694 | trans_cfg.bc_table_dword = true; | |
8ca151b5 | 695 | |
39bdb17e SD |
696 | trans_cfg.command_groups = iwl_mvm_groups; |
697 | trans_cfg.command_groups_size = ARRAY_SIZE(iwl_mvm_groups); | |
8ca151b5 | 698 | |
c8f54701 | 699 | trans_cfg.cmd_queue = IWL_MVM_DQA_CMD_QUEUE; |
b2d81db7 | 700 | trans_cfg.cmd_fifo = IWL_MVM_TX_FIFO_CMD; |
3a736bcb | 701 | trans_cfg.scd_set_active = true; |
8ca151b5 | 702 | |
21cb3222 JB |
703 | trans_cfg.cb_data_offs = offsetof(struct ieee80211_tx_info, |
704 | driver_data[2]); | |
705 | ||
b4821767 | 706 | trans_cfg.sdio_adma_addr = fw->sdio_adma_addr; |
41837ca9 | 707 | trans_cfg.sw_csum_tx = IWL_MVM_SW_TX_CSUM_OFFLOAD; |
b4821767 | 708 | |
4cf677fd EG |
709 | /* Set a short watchdog for the command queue */ |
710 | trans_cfg.cmd_q_wdg_timeout = | |
5d42e7b2 | 711 | iwl_mvm_get_wd_timeout(mvm, NULL, false, true); |
4cf677fd | 712 | |
8ca151b5 JB |
713 | snprintf(mvm->hw->wiphy->fw_version, |
714 | sizeof(mvm->hw->wiphy->fw_version), | |
715 | "%s", fw->fw_version); | |
716 | ||
717 | /* Configure transport layer */ | |
718 | iwl_trans_configure(mvm->trans, &trans_cfg); | |
719 | ||
720 | trans->rx_mpdu_cmd = REPLY_RX_MPDU_CMD; | |
09e350f7 LK |
721 | trans->dbg_dest_tlv = mvm->fw->dbg_dest_tlv; |
722 | trans->dbg_dest_reg_num = mvm->fw->dbg_dest_reg_num; | |
723 | memcpy(trans->dbg_conf_tlv, mvm->fw->dbg_conf_tlv, | |
724 | sizeof(trans->dbg_conf_tlv)); | |
d2709ad7 | 725 | trans->dbg_trigger_tlv = mvm->fw->dbg_trigger_tlv; |
8ca151b5 JB |
726 | |
727 | /* set up notification wait support */ | |
728 | iwl_notification_wait_init(&mvm->notif_wait); | |
729 | ||
730 | /* Init phy db */ | |
731 | mvm->phy_db = iwl_phy_db_init(trans); | |
732 | if (!mvm->phy_db) { | |
733 | IWL_ERR(mvm, "Cannot init phy_db\n"); | |
734 | goto out_free; | |
735 | } | |
736 | ||
737 | IWL_INFO(mvm, "Detected %s, REV=0x%X\n", | |
738 | mvm->cfg->name, mvm->trans->hw_rev); | |
739 | ||
4fb06283 | 740 | if (iwlwifi_mod_params.nvm_file) |
e02a9d60 | 741 | mvm->nvm_file_name = iwlwifi_mod_params.nvm_file; |
4fb06283 EH |
742 | else |
743 | IWL_DEBUG_EEPROM(mvm->trans->dev, | |
744 | "working without external nvm file\n"); | |
9ee718aa | 745 | |
56f2929b SS |
746 | err = iwl_trans_start_hw(mvm->trans); |
747 | if (err) | |
14b485f0 EH |
748 | goto out_free; |
749 | ||
56f2929b SS |
750 | mutex_lock(&mvm->mutex); |
751 | iwl_mvm_ref(mvm, IWL_MVM_REF_INIT_UCODE); | |
8c5f47b1 | 752 | err = iwl_run_init_mvm_ucode(mvm, true); |
b092c9f2 | 753 | if (!iwlmvm_mod_params.init_dbg) |
56f2929b SS |
754 | iwl_mvm_stop_device(mvm); |
755 | iwl_mvm_unref(mvm, IWL_MVM_REF_INIT_UCODE); | |
756 | mutex_unlock(&mvm->mutex); | |
757 | /* returns 0 if successful, 1 if success but in rfkill */ | |
de8ba41b | 758 | if (err < 0) { |
56f2929b SS |
759 | IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", err); |
760 | goto out_free; | |
8ca151b5 JB |
761 | } |
762 | ||
d2496221 | 763 | scan_size = iwl_mvm_scan_size(mvm); |
fb98be5e | 764 | |
8ca151b5 JB |
765 | mvm->scan_cmd = kmalloc(scan_size, GFP_KERNEL); |
766 | if (!mvm->scan_cmd) | |
767 | goto out_free; | |
768 | ||
5a4b2afa HD |
769 | /* Set EBS as successful as long as not stated otherwise by the FW. */ |
770 | mvm->last_ebs_successful = true; | |
771 | ||
8ca151b5 JB |
772 | err = iwl_mvm_mac_setup_register(mvm); |
773 | if (err) | |
774 | goto out_free; | |
1f370650 | 775 | mvm->hw_registered = true; |
8ca151b5 | 776 | |
04ddc2aa CRI |
777 | min_backoff = calc_min_backoff(trans, cfg); |
778 | iwl_mvm_thermal_initialize(mvm, min_backoff); | |
779 | ||
8ca151b5 JB |
780 | err = iwl_mvm_dbgfs_register(mvm, dbgfs_dir); |
781 | if (err) | |
782 | goto out_unregister; | |
783 | ||
678d9b6d LK |
784 | if (!iwl_mvm_has_new_rx_stats_api(mvm)) |
785 | memset(&mvm->rx_stats_v3, 0, | |
786 | sizeof(struct mvm_statistics_rx_v3)); | |
787 | else | |
788 | memset(&mvm->rx_stats, 0, sizeof(struct mvm_statistics_rx)); | |
3848ab66 | 789 | |
33c85ead LC |
790 | /* The transport always starts with a taken reference, we can |
791 | * release it now if d0i3 is supported */ | |
792 | if (iwl_mvm_is_d0i3_supported(mvm)) | |
793 | iwl_trans_unref(mvm->trans); | |
7498cf4c | 794 | |
ce792918 GG |
795 | iwl_mvm_tof_init(mvm); |
796 | ||
8ca151b5 JB |
797 | return op_mode; |
798 | ||
799 | out_unregister: | |
de8ba41b LK |
800 | if (iwlmvm_mod_params.init_dbg) |
801 | return op_mode; | |
802 | ||
8ca151b5 | 803 | ieee80211_unregister_hw(mvm->hw); |
1f370650 | 804 | mvm->hw_registered = false; |
91b0d119 | 805 | iwl_mvm_leds_exit(mvm); |
c221daf2 | 806 | iwl_mvm_thermal_exit(mvm); |
8ca151b5 | 807 | out_free: |
7174beb6 | 808 | iwl_fw_flush_dump(&mvm->fwrt); |
de8ba41b LK |
809 | |
810 | if (iwlmvm_mod_params.init_dbg) | |
811 | return op_mode; | |
8ca151b5 JB |
812 | iwl_phy_db_free(mvm->phy_db); |
813 | kfree(mvm->scan_cmd); | |
56f2929b SS |
814 | iwl_trans_op_mode_leave(trans); |
815 | ||
8ca151b5 JB |
816 | ieee80211_free_hw(mvm->hw); |
817 | return NULL; | |
818 | } | |
819 | ||
820 | static void iwl_op_mode_mvm_stop(struct iwl_op_mode *op_mode) | |
821 | { | |
822 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
823 | int i; | |
824 | ||
e27deb45 LC |
825 | /* If d0i3 is supported, we have released the reference that |
826 | * the transport started with, so we should take it back now | |
827 | * that we are leaving. | |
828 | */ | |
829 | if (iwl_mvm_is_d0i3_supported(mvm)) | |
830 | iwl_trans_ref(mvm->trans); | |
831 | ||
8ca151b5 JB |
832 | iwl_mvm_leds_exit(mvm); |
833 | ||
c221daf2 | 834 | iwl_mvm_thermal_exit(mvm); |
9ee718aa | 835 | |
de8ba41b LK |
836 | if (mvm->init_status & IWL_MVM_INIT_STATUS_REG_HW_INIT_COMPLETE) { |
837 | ieee80211_unregister_hw(mvm->hw); | |
838 | mvm->init_status &= ~IWL_MVM_INIT_STATUS_REG_HW_INIT_COMPLETE; | |
839 | } | |
8ca151b5 JB |
840 | |
841 | kfree(mvm->scan_cmd); | |
e59647ea EP |
842 | kfree(mvm->mcast_filter_cmd); |
843 | mvm->mcast_filter_cmd = NULL; | |
8ca151b5 | 844 | |
afc66bb7 JB |
845 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_IWLWIFI_DEBUGFS) |
846 | kfree(mvm->d3_resume_sram); | |
847 | #endif | |
848 | ||
a4082843 | 849 | iwl_trans_op_mode_leave(mvm->trans); |
8ca151b5 JB |
850 | |
851 | iwl_phy_db_free(mvm->phy_db); | |
852 | mvm->phy_db = NULL; | |
853 | ||
1dad3e0a | 854 | kfree(mvm->nvm_data); |
ae2b21b0 | 855 | for (i = 0; i < NVM_MAX_NUM_SECTIONS; i++) |
8ca151b5 JB |
856 | kfree(mvm->nvm_sections[i].data); |
857 | ||
ce792918 GG |
858 | iwl_mvm_tof_clean(mvm); |
859 | ||
a2a57a35 EG |
860 | mutex_destroy(&mvm->mutex); |
861 | mutex_destroy(&mvm->d0i3_suspend_mutex); | |
862 | ||
8ca151b5 JB |
863 | ieee80211_free_hw(mvm->hw); |
864 | } | |
865 | ||
866 | struct iwl_async_handler_entry { | |
867 | struct list_head list; | |
868 | struct iwl_rx_cmd_buffer rxb; | |
c9cb14a6 | 869 | enum iwl_rx_handler_context context; |
0416841d | 870 | void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb); |
8ca151b5 JB |
871 | }; |
872 | ||
873 | void iwl_mvm_async_handlers_purge(struct iwl_mvm *mvm) | |
874 | { | |
875 | struct iwl_async_handler_entry *entry, *tmp; | |
876 | ||
877 | spin_lock_bh(&mvm->async_handlers_lock); | |
878 | list_for_each_entry_safe(entry, tmp, &mvm->async_handlers_list, list) { | |
879 | iwl_free_rxb(&entry->rxb); | |
880 | list_del(&entry->list); | |
881 | kfree(entry); | |
882 | } | |
883 | spin_unlock_bh(&mvm->async_handlers_lock); | |
884 | } | |
885 | ||
886 | static void iwl_mvm_async_handlers_wk(struct work_struct *wk) | |
887 | { | |
888 | struct iwl_mvm *mvm = | |
889 | container_of(wk, struct iwl_mvm, async_handlers_wk); | |
890 | struct iwl_async_handler_entry *entry, *tmp; | |
8098203f | 891 | LIST_HEAD(local_list); |
8ca151b5 JB |
892 | |
893 | /* Ensure that we are not in stop flow (check iwl_mvm_mac_stop) */ | |
8ca151b5 JB |
894 | |
895 | /* | |
896 | * Sync with Rx path with a lock. Remove all the entries from this list, | |
897 | * add them to a local one (lock free), and then handle them. | |
898 | */ | |
899 | spin_lock_bh(&mvm->async_handlers_lock); | |
900 | list_splice_init(&mvm->async_handlers_list, &local_list); | |
901 | spin_unlock_bh(&mvm->async_handlers_lock); | |
902 | ||
903 | list_for_each_entry_safe(entry, tmp, &local_list, list) { | |
c9cb14a6 CRI |
904 | if (entry->context == RX_HANDLER_ASYNC_LOCKED) |
905 | mutex_lock(&mvm->mutex); | |
0416841d | 906 | entry->fn(mvm, &entry->rxb); |
8ca151b5 JB |
907 | iwl_free_rxb(&entry->rxb); |
908 | list_del(&entry->list); | |
c9cb14a6 CRI |
909 | if (entry->context == RX_HANDLER_ASYNC_LOCKED) |
910 | mutex_unlock(&mvm->mutex); | |
8ca151b5 JB |
911 | kfree(entry); |
912 | } | |
8ca151b5 JB |
913 | } |
914 | ||
917f39bb EG |
915 | static inline void iwl_mvm_rx_check_trigger(struct iwl_mvm *mvm, |
916 | struct iwl_rx_packet *pkt) | |
917 | { | |
918 | struct iwl_fw_dbg_trigger_tlv *trig; | |
919 | struct iwl_fw_dbg_trigger_cmd *cmds_trig; | |
917f39bb EG |
920 | int i; |
921 | ||
922 | if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_FW_NOTIF)) | |
923 | return; | |
924 | ||
925 | trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_FW_NOTIF); | |
926 | cmds_trig = (void *)trig->data; | |
927 | ||
7174beb6 | 928 | if (!iwl_fw_dbg_trigger_check_stop(&mvm->fwrt, NULL, trig)) |
917f39bb EG |
929 | return; |
930 | ||
931 | for (i = 0; i < ARRAY_SIZE(cmds_trig->cmds); i++) { | |
932 | /* don't collect on CMD 0 */ | |
933 | if (!cmds_trig->cmds[i].cmd_id) | |
934 | break; | |
935 | ||
0ab66e6d SS |
936 | if (cmds_trig->cmds[i].cmd_id != pkt->hdr.cmd || |
937 | cmds_trig->cmds[i].group_id != pkt->hdr.group_id) | |
917f39bb EG |
938 | continue; |
939 | ||
7174beb6 JB |
940 | iwl_fw_dbg_collect_trig(&mvm->fwrt, trig, |
941 | "CMD 0x%02x.%02x received", | |
942 | pkt->hdr.group_id, pkt->hdr.cmd); | |
917f39bb EG |
943 | break; |
944 | } | |
945 | } | |
946 | ||
0316d30e JB |
947 | static void iwl_mvm_rx_common(struct iwl_mvm *mvm, |
948 | struct iwl_rx_cmd_buffer *rxb, | |
949 | struct iwl_rx_packet *pkt) | |
8ca151b5 | 950 | { |
0316d30e | 951 | int i; |
1738d60b | 952 | |
917f39bb EG |
953 | iwl_mvm_rx_check_trigger(mvm, pkt); |
954 | ||
8ca151b5 JB |
955 | /* |
956 | * Do the notification wait before RX handlers so | |
957 | * even if the RX handler consumes the RXB we have | |
958 | * access to it in the notification wait entry. | |
959 | */ | |
960 | iwl_notification_wait_notify(&mvm->notif_wait, pkt); | |
961 | ||
962 | for (i = 0; i < ARRAY_SIZE(iwl_mvm_rx_handlers); i++) { | |
963 | const struct iwl_rx_handlers *rx_h = &iwl_mvm_rx_handlers[i]; | |
36eed56a EG |
964 | struct iwl_async_handler_entry *entry; |
965 | ||
1230b16b | 966 | if (rx_h->cmd_id != WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd)) |
36eed56a EG |
967 | continue; |
968 | ||
c9cb14a6 | 969 | if (rx_h->context == RX_HANDLER_SYNC) { |
0416841d | 970 | rx_h->fn(mvm, rxb); |
f7e6469f | 971 | return; |
0416841d | 972 | } |
36eed56a EG |
973 | |
974 | entry = kzalloc(sizeof(*entry), GFP_ATOMIC); | |
975 | /* we can't do much... */ | |
976 | if (!entry) | |
f7e6469f | 977 | return; |
36eed56a EG |
978 | |
979 | entry->rxb._page = rxb_steal_page(rxb); | |
980 | entry->rxb._offset = rxb->_offset; | |
981 | entry->rxb._rx_page_order = rxb->_rx_page_order; | |
982 | entry->fn = rx_h->fn; | |
c9cb14a6 | 983 | entry->context = rx_h->context; |
36eed56a EG |
984 | spin_lock(&mvm->async_handlers_lock); |
985 | list_add_tail(&entry->list, &mvm->async_handlers_list); | |
986 | spin_unlock(&mvm->async_handlers_lock); | |
987 | schedule_work(&mvm->async_handlers_wk); | |
f2e66c8d | 988 | return; |
8ca151b5 | 989 | } |
f2e66c8d MG |
990 | |
991 | iwl_fwrt_handle_notification(&mvm->fwrt, rxb); | |
8ca151b5 JB |
992 | } |
993 | ||
0316d30e JB |
994 | static void iwl_mvm_rx(struct iwl_op_mode *op_mode, |
995 | struct napi_struct *napi, | |
996 | struct iwl_rx_cmd_buffer *rxb) | |
997 | { | |
998 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
999 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
61b0f5d7 | 1000 | u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd); |
0316d30e | 1001 | |
61b0f5d7 | 1002 | if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD))) |
0316d30e | 1003 | iwl_mvm_rx_rx_mpdu(mvm, napi, rxb); |
61b0f5d7 | 1004 | else if (cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_PHY_CMD)) |
0316d30e JB |
1005 | iwl_mvm_rx_rx_phy_cmd(mvm, rxb); |
1006 | else | |
1007 | iwl_mvm_rx_common(mvm, rxb, pkt); | |
1008 | } | |
1009 | ||
1010 | static void iwl_mvm_rx_mq(struct iwl_op_mode *op_mode, | |
1011 | struct napi_struct *napi, | |
1012 | struct iwl_rx_cmd_buffer *rxb) | |
1013 | { | |
1014 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1015 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
61b0f5d7 | 1016 | u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd); |
0316d30e | 1017 | |
61b0f5d7 | 1018 | if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD))) |
780e87c2 | 1019 | iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, 0); |
61b0f5d7 JB |
1020 | else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP, |
1021 | RX_QUEUES_NOTIFICATION))) | |
94bb4481 | 1022 | iwl_mvm_rx_queue_notif(mvm, rxb, 0); |
61b0f5d7 | 1023 | else if (cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE)) |
58035432 | 1024 | iwl_mvm_rx_frame_release(mvm, napi, rxb, 0); |
0316d30e JB |
1025 | else |
1026 | iwl_mvm_rx_common(mvm, rxb, pkt); | |
1027 | } | |
1028 | ||
b4f7a9d1 | 1029 | void iwl_mvm_stop_mac_queues(struct iwl_mvm *mvm, unsigned long mq) |
8ca151b5 | 1030 | { |
4ecafae9 | 1031 | int q; |
8ca151b5 | 1032 | |
4ecafae9 | 1033 | if (WARN_ON_ONCE(!mq)) |
8ca151b5 | 1034 | return; |
8ca151b5 | 1035 | |
4ecafae9 LK |
1036 | for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) { |
1037 | if (atomic_inc_return(&mvm->mac80211_queue_stop_count[q]) > 1) { | |
1038 | IWL_DEBUG_TX_QUEUES(mvm, | |
b4f7a9d1 | 1039 | "mac80211 %d already stopped\n", q); |
4ecafae9 LK |
1040 | continue; |
1041 | } | |
1042 | ||
1043 | ieee80211_stop_queue(mvm->hw, q); | |
1044 | } | |
8ca151b5 JB |
1045 | } |
1046 | ||
156f92f2 EG |
1047 | static void iwl_mvm_async_cb(struct iwl_op_mode *op_mode, |
1048 | const struct iwl_device_cmd *cmd) | |
1049 | { | |
1050 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
1051 | ||
1052 | /* | |
1053 | * For now, we only set the CMD_WANT_ASYNC_CALLBACK for ADD_STA | |
1054 | * commands that need to block the Tx queues. | |
1055 | */ | |
1056 | iwl_trans_block_txq_ptrs(mvm->trans, false); | |
1057 | } | |
1058 | ||
b4f7a9d1 | 1059 | static void iwl_mvm_stop_sw_queue(struct iwl_op_mode *op_mode, int hw_queue) |
8ca151b5 JB |
1060 | { |
1061 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
4ecafae9 | 1062 | unsigned long mq; |
8ca151b5 | 1063 | |
4ecafae9 | 1064 | spin_lock_bh(&mvm->queue_info_lock); |
34e10860 | 1065 | mq = mvm->hw_queue_to_mac80211[hw_queue]; |
4ecafae9 | 1066 | spin_unlock_bh(&mvm->queue_info_lock); |
8ca151b5 | 1067 | |
b4f7a9d1 LK |
1068 | iwl_mvm_stop_mac_queues(mvm, mq); |
1069 | } | |
1070 | ||
1071 | void iwl_mvm_start_mac_queues(struct iwl_mvm *mvm, unsigned long mq) | |
1072 | { | |
1073 | int q; | |
1074 | ||
4ecafae9 | 1075 | if (WARN_ON_ONCE(!mq)) |
8ca151b5 | 1076 | return; |
8ca151b5 | 1077 | |
4ecafae9 LK |
1078 | for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) { |
1079 | if (atomic_dec_return(&mvm->mac80211_queue_stop_count[q]) > 0) { | |
1080 | IWL_DEBUG_TX_QUEUES(mvm, | |
b4f7a9d1 | 1081 | "mac80211 %d still stopped\n", q); |
4ecafae9 LK |
1082 | continue; |
1083 | } | |
1084 | ||
1085 | ieee80211_wake_queue(mvm->hw, q); | |
1086 | } | |
8ca151b5 JB |
1087 | } |
1088 | ||
b4f7a9d1 LK |
1089 | static void iwl_mvm_wake_sw_queue(struct iwl_op_mode *op_mode, int hw_queue) |
1090 | { | |
1091 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
1092 | unsigned long mq; | |
1093 | ||
1094 | spin_lock_bh(&mvm->queue_info_lock); | |
34e10860 | 1095 | mq = mvm->hw_queue_to_mac80211[hw_queue]; |
b4f7a9d1 LK |
1096 | spin_unlock_bh(&mvm->queue_info_lock); |
1097 | ||
1098 | iwl_mvm_start_mac_queues(mvm, mq); | |
1099 | } | |
1100 | ||
6ad04359 JB |
1101 | static void iwl_mvm_set_rfkill_state(struct iwl_mvm *mvm) |
1102 | { | |
1103 | bool state = iwl_mvm_is_radio_killed(mvm); | |
1104 | ||
1105 | if (state) | |
1106 | wake_up(&mvm->rx_sync_waitq); | |
1107 | ||
1108 | wiphy_rfkill_set_hw_state(mvm->hw->wiphy, state); | |
1109 | } | |
1110 | ||
9ee718aa EL |
1111 | void iwl_mvm_set_hw_ctkill_state(struct iwl_mvm *mvm, bool state) |
1112 | { | |
1113 | if (state) | |
1114 | set_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status); | |
1115 | else | |
1116 | clear_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status); | |
1117 | ||
6ad04359 | 1118 | iwl_mvm_set_rfkill_state(mvm); |
9ee718aa EL |
1119 | } |
1120 | ||
14cfca71 | 1121 | static bool iwl_mvm_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state) |
8ca151b5 JB |
1122 | { |
1123 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
31b8b343 | 1124 | bool calibrating = ACCESS_ONCE(mvm->calibrating); |
8ca151b5 JB |
1125 | |
1126 | if (state) | |
1127 | set_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status); | |
1128 | else | |
1129 | clear_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status); | |
1130 | ||
6ad04359 | 1131 | iwl_mvm_set_rfkill_state(mvm); |
14cfca71 | 1132 | |
31b8b343 EG |
1133 | /* iwl_run_init_mvm_ucode is waiting for results, abort it */ |
1134 | if (calibrating) | |
1135 | iwl_abort_notification_waits(&mvm->notif_wait); | |
1136 | ||
1137 | /* | |
1138 | * Stop the device if we run OPERATIONAL firmware or if we are in the | |
1139 | * middle of the calibrations. | |
1140 | */ | |
702e975d | 1141 | return state && (mvm->fwrt.cur_fw_img != IWL_UCODE_INIT || calibrating); |
8ca151b5 JB |
1142 | } |
1143 | ||
1144 | static void iwl_mvm_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb) | |
1145 | { | |
1146 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
1147 | struct ieee80211_tx_info *info; | |
1148 | ||
1149 | info = IEEE80211_SKB_CB(skb); | |
1150 | iwl_trans_free_tx_cmd(mvm->trans, info->driver_data[1]); | |
1151 | ieee80211_free_txskb(mvm->hw, skb); | |
1152 | } | |
1153 | ||
ac1ed416 JB |
1154 | struct iwl_mvm_reprobe { |
1155 | struct device *dev; | |
1156 | struct work_struct work; | |
1157 | }; | |
1158 | ||
1159 | static void iwl_mvm_reprobe_wk(struct work_struct *wk) | |
1160 | { | |
1161 | struct iwl_mvm_reprobe *reprobe; | |
1162 | ||
1163 | reprobe = container_of(wk, struct iwl_mvm_reprobe, work); | |
1164 | if (device_reprobe(reprobe->dev)) | |
1165 | dev_err(reprobe->dev, "reprobe failed!\n"); | |
1166 | kfree(reprobe); | |
1167 | module_put(THIS_MODULE); | |
1168 | } | |
1169 | ||
b08c1d97 | 1170 | void iwl_mvm_nic_restart(struct iwl_mvm *mvm, bool fw_error) |
8ca151b5 | 1171 | { |
8ca151b5 JB |
1172 | iwl_abort_notification_waits(&mvm->notif_wait); |
1173 | ||
992f81fc DS |
1174 | /* |
1175 | * This is a bit racy, but worst case we tell mac80211 about | |
1176 | * a stopped/aborted scan when that was already done which | |
1177 | * is not a problem. It is necessary to abort any os scan | |
1178 | * here because mac80211 requires having the scan cleared | |
1179 | * before restarting. | |
1180 | * We'll reset the scan_status to NONE in restart cleanup in | |
1181 | * the next start() call from mac80211. If restart isn't called | |
1182 | * (no fw restart) scan status will stay busy. | |
1183 | */ | |
4ffb3650 | 1184 | iwl_mvm_report_scan_aborted(mvm); |
992f81fc | 1185 | |
8ca151b5 JB |
1186 | /* |
1187 | * If we're restarting already, don't cycle restarts. | |
1188 | * If INIT fw asserted, it will likely fail again. | |
1189 | * If WoWLAN fw asserted, don't restart either, mac80211 | |
1190 | * can't recover this since we're already half suspended. | |
1191 | */ | |
3b37f4c9 | 1192 | if (!mvm->fw_restart && fw_error) { |
7174beb6 JB |
1193 | iwl_fw_dbg_collect_desc(&mvm->fwrt, &iwl_dump_desc_assert, |
1194 | NULL); | |
60f1071c LC |
1195 | } else if (test_and_set_bit(IWL_MVM_STATUS_IN_HW_RESTART, |
1196 | &mvm->status)) { | |
ac1ed416 JB |
1197 | struct iwl_mvm_reprobe *reprobe; |
1198 | ||
1199 | IWL_ERR(mvm, | |
1200 | "Firmware error during reconfiguration - reprobe!\n"); | |
1201 | ||
1202 | /* | |
1203 | * get a module reference to avoid doing this while unloading | |
1204 | * anyway and to avoid scheduling a work with code that's | |
1205 | * being removed. | |
1206 | */ | |
1207 | if (!try_module_get(THIS_MODULE)) { | |
1208 | IWL_ERR(mvm, "Module is being unloaded - abort\n"); | |
1209 | return; | |
1210 | } | |
1211 | ||
1212 | reprobe = kzalloc(sizeof(*reprobe), GFP_ATOMIC); | |
1213 | if (!reprobe) { | |
1214 | module_put(THIS_MODULE); | |
1215 | return; | |
1216 | } | |
1217 | reprobe->dev = mvm->trans->dev; | |
1218 | INIT_WORK(&reprobe->work, iwl_mvm_reprobe_wk); | |
1219 | schedule_work(&reprobe->work); | |
702e975d | 1220 | } else if (mvm->fwrt.cur_fw_img == IWL_UCODE_REGULAR && |
1f370650 | 1221 | mvm->hw_registered) { |
7498cf4c EP |
1222 | /* don't let the transport/FW power down */ |
1223 | iwl_mvm_ref(mvm, IWL_MVM_REF_UCODE_DOWN); | |
1224 | ||
3b37f4c9 JB |
1225 | if (fw_error && mvm->fw_restart > 0) |
1226 | mvm->fw_restart--; | |
8ca151b5 JB |
1227 | ieee80211_restart_hw(mvm->hw); |
1228 | } | |
1229 | } | |
1230 | ||
715c998f EG |
1231 | static void iwl_mvm_nic_error(struct iwl_op_mode *op_mode) |
1232 | { | |
1233 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
1234 | ||
1235 | iwl_mvm_dump_nic_error_log(mvm); | |
1bd3cbc1 | 1236 | |
b08c1d97 | 1237 | iwl_mvm_nic_restart(mvm, true); |
715c998f EG |
1238 | } |
1239 | ||
8ca151b5 JB |
1240 | static void iwl_mvm_cmd_queue_full(struct iwl_op_mode *op_mode) |
1241 | { | |
715c998f EG |
1242 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); |
1243 | ||
8ca151b5 | 1244 | WARN_ON(1); |
b08c1d97 | 1245 | iwl_mvm_nic_restart(mvm, true); |
8ca151b5 JB |
1246 | } |
1247 | ||
37577fe2 EP |
1248 | struct iwl_d0i3_iter_data { |
1249 | struct iwl_mvm *mvm; | |
a3f7ba5c | 1250 | struct ieee80211_vif *connected_vif; |
37577fe2 EP |
1251 | u8 ap_sta_id; |
1252 | u8 vif_count; | |
b2492501 AN |
1253 | u8 offloading_tid; |
1254 | bool disable_offloading; | |
37577fe2 EP |
1255 | }; |
1256 | ||
b2492501 AN |
1257 | static bool iwl_mvm_disallow_offloading(struct iwl_mvm *mvm, |
1258 | struct ieee80211_vif *vif, | |
1259 | struct iwl_d0i3_iter_data *iter_data) | |
1260 | { | |
1261 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
b2492501 AN |
1262 | struct iwl_mvm_sta *mvmsta; |
1263 | u32 available_tids = 0; | |
1264 | u8 tid; | |
1265 | ||
1266 | if (WARN_ON(vif->type != NL80211_IFTYPE_STATION || | |
0ae98812 | 1267 | mvmvif->ap_sta_id == IWL_MVM_INVALID_STA)) |
b2492501 AN |
1268 | return false; |
1269 | ||
13303c0f SS |
1270 | mvmsta = iwl_mvm_sta_from_staid_rcu(mvm, mvmvif->ap_sta_id); |
1271 | if (!mvmsta) | |
b2492501 AN |
1272 | return false; |
1273 | ||
b2492501 AN |
1274 | spin_lock_bh(&mvmsta->lock); |
1275 | for (tid = 0; tid < IWL_MAX_TID_COUNT; tid++) { | |
1276 | struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid]; | |
1277 | ||
1278 | /* | |
1279 | * in case of pending tx packets, don't use this tid | |
1280 | * for offloading in order to prevent reuse of the same | |
1281 | * qos seq counters. | |
1282 | */ | |
dd32162d | 1283 | if (iwl_mvm_tid_queued(mvm, tid_data)) |
b2492501 AN |
1284 | continue; |
1285 | ||
1286 | if (tid_data->state != IWL_AGG_OFF) | |
1287 | continue; | |
1288 | ||
1289 | available_tids |= BIT(tid); | |
1290 | } | |
1291 | spin_unlock_bh(&mvmsta->lock); | |
1292 | ||
1293 | /* | |
1294 | * disallow protocol offloading if we have no available tid | |
1295 | * (with no pending frames and no active aggregation, | |
1296 | * as we don't handle "holes" properly - the scheduler needs the | |
1297 | * frame's seq number and TFD index to match) | |
1298 | */ | |
1299 | if (!available_tids) | |
1300 | return true; | |
1301 | ||
1302 | /* for simplicity, just use the first available tid */ | |
1303 | iter_data->offloading_tid = ffs(available_tids) - 1; | |
1304 | return false; | |
1305 | } | |
1306 | ||
d6230972 EP |
1307 | static void iwl_mvm_enter_d0i3_iterator(void *_data, u8 *mac, |
1308 | struct ieee80211_vif *vif) | |
1309 | { | |
37577fe2 EP |
1310 | struct iwl_d0i3_iter_data *data = _data; |
1311 | struct iwl_mvm *mvm = data->mvm; | |
1312 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
d6230972 EP |
1313 | u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE; |
1314 | ||
1315 | IWL_DEBUG_RPM(mvm, "entering D0i3 - vif %pM\n", vif->addr); | |
1316 | if (vif->type != NL80211_IFTYPE_STATION || | |
1317 | !vif->bss_conf.assoc) | |
1318 | return; | |
1319 | ||
b2492501 AN |
1320 | /* |
1321 | * in case of pending tx packets or active aggregations, | |
1322 | * avoid offloading features in order to prevent reuse of | |
1323 | * the same qos seq counters. | |
1324 | */ | |
1325 | if (iwl_mvm_disallow_offloading(mvm, vif, data)) | |
1326 | data->disable_offloading = true; | |
1327 | ||
d6230972 | 1328 | iwl_mvm_update_d0i3_power_mode(mvm, vif, true, flags); |
c97dab40 SS |
1329 | iwl_mvm_send_proto_offload(mvm, vif, data->disable_offloading, |
1330 | false, flags); | |
d6230972 EP |
1331 | |
1332 | /* | |
1333 | * on init/association, mvm already configures POWER_TABLE_CMD | |
1334 | * and REPLY_MCAST_FILTER_CMD, so currently don't | |
1335 | * reconfigure them (we might want to use different | |
1336 | * params later on, though). | |
1337 | */ | |
37577fe2 EP |
1338 | data->ap_sta_id = mvmvif->ap_sta_id; |
1339 | data->vif_count++; | |
a3f7ba5c EP |
1340 | |
1341 | /* | |
1342 | * no new commands can be sent at this stage, so it's safe | |
1343 | * to save the vif pointer during d0i3 entrance. | |
1344 | */ | |
1345 | data->connected_vif = vif; | |
d6230972 EP |
1346 | } |
1347 | ||
1a95c8df | 1348 | static void iwl_mvm_set_wowlan_data(struct iwl_mvm *mvm, |
c8b06a99 | 1349 | struct iwl_wowlan_config_cmd *cmd, |
1a95c8df EP |
1350 | struct iwl_d0i3_iter_data *iter_data) |
1351 | { | |
1352 | struct ieee80211_sta *ap_sta; | |
1353 | struct iwl_mvm_sta *mvm_ap_sta; | |
1354 | ||
0ae98812 | 1355 | if (iter_data->ap_sta_id == IWL_MVM_INVALID_STA) |
1a95c8df EP |
1356 | return; |
1357 | ||
1358 | rcu_read_lock(); | |
1359 | ||
1360 | ap_sta = rcu_dereference(mvm->fw_id_to_mac_id[iter_data->ap_sta_id]); | |
1361 | if (IS_ERR_OR_NULL(ap_sta)) | |
1362 | goto out; | |
1363 | ||
1364 | mvm_ap_sta = iwl_mvm_sta_from_mac80211(ap_sta); | |
c8b06a99 | 1365 | cmd->is_11n_connection = ap_sta->ht_cap.ht_supported; |
b2492501 | 1366 | cmd->offloading_tid = iter_data->offloading_tid; |
70b4c536 | 1367 | cmd->flags = ENABLE_L3_FILTERING | ENABLE_NBNS_FILTERING | |
0db056d3 | 1368 | ENABLE_DHCP_FILTERING | ENABLE_STORE_BEACON; |
1a95c8df EP |
1369 | /* |
1370 | * The d0i3 uCode takes care of the nonqos counters, | |
1371 | * so configure only the qos seq ones. | |
1372 | */ | |
c8b06a99 | 1373 | iwl_mvm_set_wowlan_qos_seq(mvm_ap_sta, cmd); |
1a95c8df EP |
1374 | out: |
1375 | rcu_read_unlock(); | |
1376 | } | |
6735943f EP |
1377 | |
1378 | int iwl_mvm_enter_d0i3(struct iwl_op_mode *op_mode) | |
b3370d47 EP |
1379 | { |
1380 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
98ee7783 | 1381 | u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE; |
b77f06d9 | 1382 | int ret; |
37577fe2 EP |
1383 | struct iwl_d0i3_iter_data d0i3_iter_data = { |
1384 | .mvm = mvm, | |
1385 | }; | |
c8b06a99 EG |
1386 | struct iwl_wowlan_config_cmd wowlan_config_cmd = { |
1387 | .wakeup_filter = cpu_to_le32(IWL_WOWLAN_WAKEUP_RX_FRAME | | |
1388 | IWL_WOWLAN_WAKEUP_BEACON_MISS | | |
0db056d3 | 1389 | IWL_WOWLAN_WAKEUP_LINK_CHANGE), |
b77f06d9 | 1390 | }; |
98ee7783 AN |
1391 | struct iwl_d3_manager_config d3_cfg_cmd = { |
1392 | .min_sleep_time = cpu_to_le32(1000), | |
d9f1fc20 | 1393 | .wakeup_flags = cpu_to_le32(IWL_WAKEUP_D3_CONFIG_FW_ERROR), |
98ee7783 | 1394 | }; |
b3370d47 EP |
1395 | |
1396 | IWL_DEBUG_RPM(mvm, "MVM entering D0i3\n"); | |
98ee7783 | 1397 | |
702e975d | 1398 | if (WARN_ON_ONCE(mvm->fwrt.cur_fw_img != IWL_UCODE_REGULAR)) |
08f0d23d EP |
1399 | return -EINVAL; |
1400 | ||
b2492501 | 1401 | set_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status); |
b2492501 | 1402 | |
f4cf8680 EP |
1403 | /* |
1404 | * iwl_mvm_ref_sync takes a reference before checking the flag. | |
1405 | * so by checking there is no held reference we prevent a state | |
1406 | * in which iwl_mvm_ref_sync continues successfully while we | |
1407 | * configure the firmware to enter d0i3 | |
1408 | */ | |
1409 | if (iwl_mvm_ref_taken(mvm)) { | |
1410 | IWL_DEBUG_RPM(mvm->trans, "abort d0i3 due to taken ref\n"); | |
1411 | clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status); | |
caf1578a | 1412 | wake_up(&mvm->d0i3_exit_waitq); |
f4cf8680 EP |
1413 | return 1; |
1414 | } | |
1415 | ||
d6230972 EP |
1416 | ieee80211_iterate_active_interfaces_atomic(mvm->hw, |
1417 | IEEE80211_IFACE_ITER_NORMAL, | |
1418 | iwl_mvm_enter_d0i3_iterator, | |
37577fe2 EP |
1419 | &d0i3_iter_data); |
1420 | if (d0i3_iter_data.vif_count == 1) { | |
1421 | mvm->d0i3_ap_sta_id = d0i3_iter_data.ap_sta_id; | |
b2492501 | 1422 | mvm->d0i3_offloading = !d0i3_iter_data.disable_offloading; |
37577fe2 EP |
1423 | } else { |
1424 | WARN_ON_ONCE(d0i3_iter_data.vif_count > 1); | |
0ae98812 | 1425 | mvm->d0i3_ap_sta_id = IWL_MVM_INVALID_STA; |
b2492501 | 1426 | mvm->d0i3_offloading = false; |
37577fe2 | 1427 | } |
d6230972 | 1428 | |
ecc7c518 EG |
1429 | /* make sure we have no running tx while configuring the seqno */ |
1430 | synchronize_net(); | |
1431 | ||
eb3908d3 | 1432 | /* Flush the hw queues, in case something got queued during entry */ |
d167e81a MG |
1433 | /* TODO new tx api */ |
1434 | if (iwl_mvm_has_new_tx_api(mvm)) { | |
1435 | WARN_ONCE(1, "d0i3: Need to implement flush TX queue\n"); | |
1436 | } else { | |
1437 | ret = iwl_mvm_flush_tx_path(mvm, iwl_mvm_flushable_queues(mvm), | |
1438 | flags); | |
1439 | if (ret) | |
1440 | return ret; | |
1441 | } | |
eb3908d3 | 1442 | |
183edd84 | 1443 | /* configure wowlan configuration only if needed */ |
0ae98812 | 1444 | if (mvm->d0i3_ap_sta_id != IWL_MVM_INVALID_STA) { |
0db056d3 SS |
1445 | /* wake on beacons only if beacon storing isn't supported */ |
1446 | if (!fw_has_capa(&mvm->fw->ucode_capa, | |
1447 | IWL_UCODE_TLV_CAPA_BEACON_STORING)) | |
1448 | wowlan_config_cmd.wakeup_filter |= | |
1449 | cpu_to_le32(IWL_WOWLAN_WAKEUP_BCN_FILTERING); | |
1450 | ||
a3f7ba5c EP |
1451 | iwl_mvm_wowlan_config_key_params(mvm, |
1452 | d0i3_iter_data.connected_vif, | |
1453 | true, flags); | |
1454 | ||
183edd84 EP |
1455 | iwl_mvm_set_wowlan_data(mvm, &wowlan_config_cmd, |
1456 | &d0i3_iter_data); | |
1457 | ||
1458 | ret = iwl_mvm_send_cmd_pdu(mvm, WOWLAN_CONFIGURATION, flags, | |
1459 | sizeof(wowlan_config_cmd), | |
1460 | &wowlan_config_cmd); | |
1461 | if (ret) | |
1462 | return ret; | |
1463 | } | |
b77f06d9 | 1464 | |
98ee7783 AN |
1465 | return iwl_mvm_send_cmd_pdu(mvm, D3_CONFIG_CMD, |
1466 | flags | CMD_MAKE_TRANS_IDLE, | |
1467 | sizeof(d3_cfg_cmd), &d3_cfg_cmd); | |
b3370d47 EP |
1468 | } |
1469 | ||
d6230972 EP |
1470 | static void iwl_mvm_exit_d0i3_iterator(void *_data, u8 *mac, |
1471 | struct ieee80211_vif *vif) | |
1472 | { | |
1473 | struct iwl_mvm *mvm = _data; | |
1474 | u32 flags = CMD_ASYNC | CMD_HIGH_PRIO; | |
1475 | ||
1476 | IWL_DEBUG_RPM(mvm, "exiting D0i3 - vif %pM\n", vif->addr); | |
1477 | if (vif->type != NL80211_IFTYPE_STATION || | |
1478 | !vif->bss_conf.assoc) | |
1479 | return; | |
1480 | ||
1481 | iwl_mvm_update_d0i3_power_mode(mvm, vif, false, flags); | |
1482 | } | |
1483 | ||
a3f7ba5c | 1484 | struct iwl_mvm_d0i3_exit_work_iter_data { |
b3df2247 | 1485 | struct iwl_mvm *mvm; |
a3f7ba5c | 1486 | struct iwl_wowlan_status *status; |
b3df2247 DS |
1487 | u32 wakeup_reasons; |
1488 | }; | |
1489 | ||
a3f7ba5c EP |
1490 | static void iwl_mvm_d0i3_exit_work_iter(void *_data, u8 *mac, |
1491 | struct ieee80211_vif *vif) | |
37577fe2 | 1492 | { |
a3f7ba5c | 1493 | struct iwl_mvm_d0i3_exit_work_iter_data *data = _data; |
37577fe2 | 1494 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); |
a3f7ba5c | 1495 | u32 reasons = data->wakeup_reasons; |
37577fe2 | 1496 | |
a3f7ba5c EP |
1497 | /* consider only the relevant station interface */ |
1498 | if (vif->type != NL80211_IFTYPE_STATION || !vif->bss_conf.assoc || | |
1499 | data->mvm->d0i3_ap_sta_id != mvmvif->ap_sta_id) | |
1500 | return; | |
1501 | ||
1502 | if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_DEAUTH) | |
1503 | iwl_mvm_connection_loss(data->mvm, vif, "D0i3"); | |
1504 | else if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_MISSED_BEACON) | |
1505 | ieee80211_beacon_loss(vif); | |
1506 | else | |
1507 | iwl_mvm_d0i3_update_keys(data->mvm, vif, data->status); | |
37577fe2 EP |
1508 | } |
1509 | ||
b2492501 AN |
1510 | void iwl_mvm_d0i3_enable_tx(struct iwl_mvm *mvm, __le16 *qos_seq) |
1511 | { | |
1512 | struct ieee80211_sta *sta = NULL; | |
1513 | struct iwl_mvm_sta *mvm_ap_sta; | |
1514 | int i; | |
1515 | bool wake_queues = false; | |
1516 | ||
1517 | lockdep_assert_held(&mvm->mutex); | |
1518 | ||
1519 | spin_lock_bh(&mvm->d0i3_tx_lock); | |
1520 | ||
0ae98812 | 1521 | if (mvm->d0i3_ap_sta_id == IWL_MVM_INVALID_STA) |
b2492501 AN |
1522 | goto out; |
1523 | ||
1524 | IWL_DEBUG_RPM(mvm, "re-enqueue packets\n"); | |
1525 | ||
1526 | /* get the sta in order to update seq numbers and re-enqueue skbs */ | |
1527 | sta = rcu_dereference_protected( | |
1528 | mvm->fw_id_to_mac_id[mvm->d0i3_ap_sta_id], | |
1529 | lockdep_is_held(&mvm->mutex)); | |
1530 | ||
1531 | if (IS_ERR_OR_NULL(sta)) { | |
1532 | sta = NULL; | |
1533 | goto out; | |
1534 | } | |
1535 | ||
1536 | if (mvm->d0i3_offloading && qos_seq) { | |
1537 | /* update qos seq numbers if offloading was enabled */ | |
9d8ce6af | 1538 | mvm_ap_sta = iwl_mvm_sta_from_mac80211(sta); |
b2492501 AN |
1539 | for (i = 0; i < IWL_MAX_TID_COUNT; i++) { |
1540 | u16 seq = le16_to_cpu(qos_seq[i]); | |
1541 | /* firmware stores last-used one, we store next one */ | |
1542 | seq += 0x10; | |
1543 | mvm_ap_sta->tid_data[i].seq_number = seq; | |
1544 | } | |
1545 | } | |
1546 | out: | |
1547 | /* re-enqueue (or drop) all packets */ | |
1548 | while (!skb_queue_empty(&mvm->d0i3_tx)) { | |
1549 | struct sk_buff *skb = __skb_dequeue(&mvm->d0i3_tx); | |
1550 | ||
1551 | if (!sta || iwl_mvm_tx_skb(mvm, skb, sta)) | |
1552 | ieee80211_free_txskb(mvm->hw, skb); | |
1553 | ||
1554 | /* if the skb_queue is not empty, we need to wake queues */ | |
1555 | wake_queues = true; | |
1556 | } | |
1557 | clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status); | |
1558 | wake_up(&mvm->d0i3_exit_waitq); | |
0ae98812 | 1559 | mvm->d0i3_ap_sta_id = IWL_MVM_INVALID_STA; |
b2492501 AN |
1560 | if (wake_queues) |
1561 | ieee80211_wake_queues(mvm->hw); | |
1562 | ||
1563 | spin_unlock_bh(&mvm->d0i3_tx_lock); | |
1564 | } | |
1565 | ||
37577fe2 EP |
1566 | static void iwl_mvm_d0i3_exit_work(struct work_struct *wk) |
1567 | { | |
1568 | struct iwl_mvm *mvm = container_of(wk, struct iwl_mvm, d0i3_exit_work); | |
1569 | struct iwl_host_cmd get_status_cmd = { | |
1570 | .id = WOWLAN_GET_STATUSES, | |
a1022927 | 1571 | .flags = CMD_HIGH_PRIO | CMD_WANT_SKB, |
37577fe2 | 1572 | }; |
a3f7ba5c EP |
1573 | struct iwl_mvm_d0i3_exit_work_iter_data iter_data = { |
1574 | .mvm = mvm, | |
1575 | }; | |
1576 | ||
3afec639 | 1577 | struct iwl_wowlan_status *status; |
37577fe2 | 1578 | int ret; |
a3f7ba5c | 1579 | u32 wakeup_reasons = 0; |
b2492501 | 1580 | __le16 *qos_seq = NULL; |
37577fe2 EP |
1581 | |
1582 | mutex_lock(&mvm->mutex); | |
1583 | ret = iwl_mvm_send_cmd(mvm, &get_status_cmd); | |
1584 | if (ret) | |
1585 | goto out; | |
1586 | ||
37577fe2 EP |
1587 | status = (void *)get_status_cmd.resp_pkt->data; |
1588 | wakeup_reasons = le32_to_cpu(status->wakeup_reasons); | |
b2492501 | 1589 | qos_seq = status->qos_seq_ctr; |
37577fe2 EP |
1590 | |
1591 | IWL_DEBUG_RPM(mvm, "wakeup reasons: 0x%x\n", wakeup_reasons); | |
1592 | ||
a3f7ba5c EP |
1593 | iter_data.wakeup_reasons = wakeup_reasons; |
1594 | iter_data.status = status; | |
1595 | ieee80211_iterate_active_interfaces(mvm->hw, | |
1596 | IEEE80211_IFACE_ITER_NORMAL, | |
1597 | iwl_mvm_d0i3_exit_work_iter, | |
1598 | &iter_data); | |
37577fe2 | 1599 | out: |
b2492501 | 1600 | iwl_mvm_d0i3_enable_tx(mvm, qos_seq); |
47c8b154 | 1601 | |
7c014e35 EP |
1602 | IWL_DEBUG_INFO(mvm, "d0i3 exit completed (wakeup reasons: 0x%x)\n", |
1603 | wakeup_reasons); | |
1604 | ||
e5629be7 EP |
1605 | /* qos_seq might point inside resp_pkt, so free it only now */ |
1606 | if (get_status_cmd.resp_pkt) | |
1607 | iwl_free_resp(&get_status_cmd); | |
1608 | ||
47c8b154 JD |
1609 | /* the FW might have updated the regdomain */ |
1610 | iwl_mvm_update_changed_regdom(mvm); | |
1611 | ||
d15a747f | 1612 | iwl_mvm_unref(mvm, IWL_MVM_REF_EXIT_WORK); |
37577fe2 EP |
1613 | mutex_unlock(&mvm->mutex); |
1614 | } | |
1615 | ||
d15a747f | 1616 | int _iwl_mvm_exit_d0i3(struct iwl_mvm *mvm) |
b3370d47 | 1617 | { |
98ee7783 AN |
1618 | u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE | |
1619 | CMD_WAKE_UP_TRANS; | |
d6230972 | 1620 | int ret; |
b3370d47 EP |
1621 | |
1622 | IWL_DEBUG_RPM(mvm, "MVM exiting D0i3\n"); | |
98ee7783 | 1623 | |
702e975d | 1624 | if (WARN_ON_ONCE(mvm->fwrt.cur_fw_img != IWL_UCODE_REGULAR)) |
08f0d23d EP |
1625 | return -EINVAL; |
1626 | ||
d15a747f EP |
1627 | mutex_lock(&mvm->d0i3_suspend_mutex); |
1628 | if (test_bit(D0I3_DEFER_WAKEUP, &mvm->d0i3_suspend_flags)) { | |
1629 | IWL_DEBUG_RPM(mvm, "Deferring d0i3 exit until resume\n"); | |
1630 | __set_bit(D0I3_PENDING_WAKEUP, &mvm->d0i3_suspend_flags); | |
1631 | mutex_unlock(&mvm->d0i3_suspend_mutex); | |
1632 | return 0; | |
1633 | } | |
1634 | mutex_unlock(&mvm->d0i3_suspend_mutex); | |
1635 | ||
d6230972 EP |
1636 | ret = iwl_mvm_send_cmd_pdu(mvm, D0I3_END_CMD, flags, 0, NULL); |
1637 | if (ret) | |
37577fe2 | 1638 | goto out; |
d6230972 EP |
1639 | |
1640 | ieee80211_iterate_active_interfaces_atomic(mvm->hw, | |
1641 | IEEE80211_IFACE_ITER_NORMAL, | |
1642 | iwl_mvm_exit_d0i3_iterator, | |
1643 | mvm); | |
37577fe2 EP |
1644 | out: |
1645 | schedule_work(&mvm->d0i3_exit_work); | |
1646 | return ret; | |
b3370d47 EP |
1647 | } |
1648 | ||
6735943f | 1649 | int iwl_mvm_exit_d0i3(struct iwl_op_mode *op_mode) |
d15a747f EP |
1650 | { |
1651 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
1652 | ||
1653 | iwl_mvm_ref(mvm, IWL_MVM_REF_EXIT_WORK); | |
1654 | return _iwl_mvm_exit_d0i3(mvm); | |
1655 | } | |
1656 | ||
0316d30e JB |
1657 | #define IWL_MVM_COMMON_OPS \ |
1658 | /* these could be differentiated */ \ | |
156f92f2 | 1659 | .async_cb = iwl_mvm_async_cb, \ |
0316d30e JB |
1660 | .queue_full = iwl_mvm_stop_sw_queue, \ |
1661 | .queue_not_full = iwl_mvm_wake_sw_queue, \ | |
1662 | .hw_rf_kill = iwl_mvm_set_hw_rfkill_state, \ | |
1663 | .free_skb = iwl_mvm_free_skb, \ | |
1664 | .nic_error = iwl_mvm_nic_error, \ | |
1665 | .cmd_queue_full = iwl_mvm_cmd_queue_full, \ | |
1666 | .nic_config = iwl_mvm_nic_config, \ | |
1667 | .enter_d0i3 = iwl_mvm_enter_d0i3, \ | |
1668 | .exit_d0i3 = iwl_mvm_exit_d0i3, \ | |
1669 | /* as we only register one, these MUST be common! */ \ | |
1670 | .start = iwl_op_mode_mvm_start, \ | |
1671 | .stop = iwl_op_mode_mvm_stop | |
1672 | ||
8ca151b5 | 1673 | static const struct iwl_op_mode_ops iwl_mvm_ops = { |
0316d30e JB |
1674 | IWL_MVM_COMMON_OPS, |
1675 | .rx = iwl_mvm_rx, | |
1676 | }; | |
1677 | ||
1678 | static void iwl_mvm_rx_mq_rss(struct iwl_op_mode *op_mode, | |
1679 | struct napi_struct *napi, | |
1680 | struct iwl_rx_cmd_buffer *rxb, | |
1681 | unsigned int queue) | |
1682 | { | |
1683 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
585a6fcc | 1684 | struct iwl_rx_packet *pkt = rxb_addr(rxb); |
61b0f5d7 | 1685 | u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd); |
0316d30e | 1686 | |
61b0f5d7 | 1687 | if (unlikely(cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE))) |
a338384b | 1688 | iwl_mvm_rx_frame_release(mvm, napi, rxb, queue); |
61b0f5d7 JB |
1689 | else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP, |
1690 | RX_QUEUES_NOTIFICATION))) | |
94bb4481 | 1691 | iwl_mvm_rx_queue_notif(mvm, rxb, queue); |
61b0f5d7 | 1692 | else if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD))) |
585a6fcc | 1693 | iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, queue); |
0316d30e JB |
1694 | } |
1695 | ||
1696 | static const struct iwl_op_mode_ops iwl_mvm_ops_mq = { | |
1697 | IWL_MVM_COMMON_OPS, | |
1698 | .rx = iwl_mvm_rx_mq, | |
1699 | .rx_rss = iwl_mvm_rx_mq_rss, | |
8ca151b5 | 1700 | }; |