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8ca151b5 JB |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
9617040e | 8 | * Copyright(c) 2012 - 2014, 2018 - 2020 Intel Corporation. All rights reserved. |
4fb06283 | 9 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
de8ba41b | 10 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH |
8ca151b5 JB |
11 | * |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of version 2 of the GNU General Public License as | |
14 | * published by the Free Software Foundation. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | * | |
8ca151b5 | 21 | * The full GNU General Public License is included in this distribution |
410dc5aa | 22 | * in the file called COPYING. |
8ca151b5 JB |
23 | * |
24 | * Contact Information: | |
cb2f8277 | 25 | * Intel Linux Wireless <linuxwifi@intel.com> |
8ca151b5 JB |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
27 | * | |
28 | * BSD LICENSE | |
29 | * | |
9617040e | 30 | * Copyright(c) 2012 - 2014, 2018 - 2020 Intel Corporation. All rights reserved. |
4fb06283 | 31 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
de8ba41b | 32 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH |
8ca151b5 JB |
33 | * All rights reserved. |
34 | * | |
35 | * Redistribution and use in source and binary forms, with or without | |
36 | * modification, are permitted provided that the following conditions | |
37 | * are met: | |
38 | * | |
39 | * * Redistributions of source code must retain the above copyright | |
40 | * notice, this list of conditions and the following disclaimer. | |
41 | * * Redistributions in binary form must reproduce the above copyright | |
42 | * notice, this list of conditions and the following disclaimer in | |
43 | * the documentation and/or other materials provided with the | |
44 | * distribution. | |
45 | * * Neither the name Intel Corporation nor the names of its | |
46 | * contributors may be used to endorse or promote products derived | |
47 | * from this software without specific prior written permission. | |
48 | * | |
49 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
50 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
51 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
52 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
53 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
54 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
55 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
56 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
57 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
58 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
59 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
60 | * | |
61 | *****************************************************************************/ | |
62 | #include <linux/module.h> | |
1bd3cbc1 | 63 | #include <linux/vmalloc.h> |
8ca151b5 JB |
64 | #include <net/mac80211.h> |
65 | ||
9fca9d5c | 66 | #include "fw/notif-wait.h" |
8ca151b5 JB |
67 | #include "iwl-trans.h" |
68 | #include "iwl-op-mode.h" | |
d962f9b1 | 69 | #include "fw/img.h" |
8ca151b5 JB |
70 | #include "iwl-debug.h" |
71 | #include "iwl-drv.h" | |
72 | #include "iwl-modparams.h" | |
73 | #include "mvm.h" | |
74 | #include "iwl-phy-db.h" | |
75 | #include "iwl-eeprom-parse.h" | |
76 | #include "iwl-csr.h" | |
77 | #include "iwl-io.h" | |
78 | #include "iwl-prph.h" | |
79 | #include "rs.h" | |
d172a5ef | 80 | #include "fw/api/scan.h" |
8ca151b5 | 81 | #include "time-event.h" |
39bdb17e | 82 | #include "fw-api.h" |
f2abcfa6 | 83 | #include "fw/acpi.h" |
8ca151b5 | 84 | |
8ca151b5 | 85 | #define DRV_DESCRIPTION "The new Intel(R) wireless AGN driver for Linux" |
8ca151b5 | 86 | MODULE_DESCRIPTION(DRV_DESCRIPTION); |
e9a7f025 | 87 | MODULE_AUTHOR(DRV_AUTHOR); |
8ca151b5 JB |
88 | MODULE_LICENSE("GPL"); |
89 | ||
90 | static const struct iwl_op_mode_ops iwl_mvm_ops; | |
0316d30e | 91 | static const struct iwl_op_mode_ops iwl_mvm_ops_mq; |
8ca151b5 JB |
92 | |
93 | struct iwl_mvm_mod_params iwlmvm_mod_params = { | |
94 | .power_scheme = IWL_POWER_SCHEME_BPS, | |
95 | /* rest of fields are 0 by default */ | |
96 | }; | |
97 | ||
2ef00c53 | 98 | module_param_named(init_dbg, iwlmvm_mod_params.init_dbg, bool, 0444); |
8ca151b5 JB |
99 | MODULE_PARM_DESC(init_dbg, |
100 | "set to true to debug an ASSERT in INIT fw (default: false"); | |
2ef00c53 | 101 | module_param_named(power_scheme, iwlmvm_mod_params.power_scheme, int, 0444); |
8ca151b5 JB |
102 | MODULE_PARM_DESC(power_scheme, |
103 | "power management scheme: 1-active, 2-balanced, 3-low power, default: 2"); | |
104 | ||
105 | /* | |
106 | * module init and exit functions | |
107 | */ | |
108 | static int __init iwl_mvm_init(void) | |
109 | { | |
110 | int ret; | |
111 | ||
112 | ret = iwl_mvm_rate_control_register(); | |
113 | if (ret) { | |
114 | pr_err("Unable to register rate control algorithm: %d\n", ret); | |
115 | return ret; | |
116 | } | |
117 | ||
118 | ret = iwl_opmode_register("iwlmvm", &iwl_mvm_ops); | |
9f66a397 | 119 | if (ret) |
8ca151b5 | 120 | pr_err("Unable to register MVM op_mode: %d\n", ret); |
8ca151b5 JB |
121 | |
122 | return ret; | |
123 | } | |
124 | module_init(iwl_mvm_init); | |
125 | ||
126 | static void __exit iwl_mvm_exit(void) | |
127 | { | |
128 | iwl_opmode_deregister("iwlmvm"); | |
129 | iwl_mvm_rate_control_unregister(); | |
130 | } | |
131 | module_exit(iwl_mvm_exit); | |
132 | ||
133 | static void iwl_mvm_nic_config(struct iwl_op_mode *op_mode) | |
134 | { | |
135 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
16b2afe0 | 136 | struct iwl_trans_debug *dbg = &mvm->trans->dbg; |
8ca151b5 JB |
137 | u8 radio_cfg_type, radio_cfg_step, radio_cfg_dash; |
138 | u32 reg_val = 0; | |
a0544272 MH |
139 | u32 phy_config = iwl_mvm_get_phy_config(mvm); |
140 | ||
141 | radio_cfg_type = (phy_config & FW_PHY_CFG_RADIO_TYPE) >> | |
142 | FW_PHY_CFG_RADIO_TYPE_POS; | |
143 | radio_cfg_step = (phy_config & FW_PHY_CFG_RADIO_STEP) >> | |
144 | FW_PHY_CFG_RADIO_STEP_POS; | |
145 | radio_cfg_dash = (phy_config & FW_PHY_CFG_RADIO_DASH) >> | |
146 | FW_PHY_CFG_RADIO_DASH_POS; | |
8ca151b5 JB |
147 | |
148 | /* SKU control */ | |
149 | reg_val |= CSR_HW_REV_STEP(mvm->trans->hw_rev) << | |
150 | CSR_HW_IF_CONFIG_REG_POS_MAC_STEP; | |
151 | reg_val |= CSR_HW_REV_DASH(mvm->trans->hw_rev) << | |
152 | CSR_HW_IF_CONFIG_REG_POS_MAC_DASH; | |
153 | ||
154 | /* radio configuration */ | |
155 | reg_val |= radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE; | |
156 | reg_val |= radio_cfg_step << CSR_HW_IF_CONFIG_REG_POS_PHY_STEP; | |
157 | reg_val |= radio_cfg_dash << CSR_HW_IF_CONFIG_REG_POS_PHY_DASH; | |
158 | ||
159 | WARN_ON((radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE) & | |
160 | ~CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE); | |
161 | ||
9b1fcc11 | 162 | /* |
6e584873 SS |
163 | * TODO: Bits 7-8 of CSR in 8000 HW family and higher set the ADC |
164 | * sampling, and shouldn't be set to any non-zero value. | |
165 | * The same is supposed to be true of the other HW, but unsetting | |
166 | * them (such as the 7260) causes automatic tests to fail on seemingly | |
167 | * unrelated errors. Need to further investigate this, but for now | |
168 | * we'll separate cases. | |
9b1fcc11 | 169 | */ |
286ca8eb | 170 | if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) |
9b1fcc11 | 171 | reg_val |= CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI; |
8ca151b5 | 172 | |
16b2afe0 MG |
173 | if (iwl_fw_dbg_is_d3_debug_enabled(&mvm->fwrt) || |
174 | (iwl_trans_dbg_ini_valid(mvm->trans) && | |
175 | dbg->fw_mon_cfg[IWL_FW_INI_ALLOCATION_ID_INTERNAL].buf_location) | |
176 | ) | |
2d8c2615 SM |
177 | reg_val |= CSR_HW_IF_CONFIG_REG_D3_DEBUG; |
178 | ||
e139dc4a LE |
179 | iwl_trans_set_bits_mask(mvm->trans, CSR_HW_IF_CONFIG_REG, |
180 | CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH | | |
181 | CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP | | |
182 | CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE | | |
183 | CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP | | |
184 | CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH | | |
185 | CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | | |
2d8c2615 SM |
186 | CSR_HW_IF_CONFIG_REG_BIT_MAC_SI | |
187 | CSR_HW_IF_CONFIG_REG_D3_DEBUG, | |
e139dc4a | 188 | reg_val); |
8ca151b5 JB |
189 | |
190 | IWL_DEBUG_INFO(mvm, "Radio type=0x%x-0x%x-0x%x\n", radio_cfg_type, | |
191 | radio_cfg_step, radio_cfg_dash); | |
192 | ||
193 | /* | |
194 | * W/A : NIC is stuck in a reset state after Early PCIe power off | |
195 | * (PCIe power is lost before PERST# is asserted), causing ME FW | |
196 | * to lose ownership and not being able to obtain it back. | |
197 | */ | |
95411d04 | 198 | if (!mvm->trans->cfg->apmg_not_supported) |
3073d8c0 EH |
199 | iwl_set_bits_mask_prph(mvm->trans, APMG_PS_CTRL_REG, |
200 | APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS, | |
201 | ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS); | |
8ca151b5 JB |
202 | } |
203 | ||
c9cb14a6 CRI |
204 | /** |
205 | * enum iwl_rx_handler_context context for Rx handler | |
206 | * @RX_HANDLER_SYNC : this means that it will be called in the Rx path | |
207 | * which can't acquire mvm->mutex. | |
208 | * @RX_HANDLER_ASYNC_LOCKED : If the handler needs to hold mvm->mutex | |
209 | * (and only in this case!), it should be set as ASYNC. In that case, | |
210 | * it will be called from a worker with mvm->mutex held. | |
211 | * @RX_HANDLER_ASYNC_UNLOCKED : in case the handler needs to lock the | |
212 | * mutex itself, it will be called from a worker without mvm->mutex held. | |
213 | */ | |
214 | enum iwl_rx_handler_context { | |
215 | RX_HANDLER_SYNC, | |
216 | RX_HANDLER_ASYNC_LOCKED, | |
217 | RX_HANDLER_ASYNC_UNLOCKED, | |
218 | }; | |
219 | ||
220 | /** | |
221 | * struct iwl_rx_handlers handler for FW notification | |
222 | * @cmd_id: command id | |
223 | * @context: see &iwl_rx_handler_context | |
224 | * @fn: the function is called when notification is received | |
225 | */ | |
8ca151b5 | 226 | struct iwl_rx_handlers { |
1230b16b | 227 | u16 cmd_id; |
c9cb14a6 | 228 | enum iwl_rx_handler_context context; |
0416841d | 229 | void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb); |
8ca151b5 JB |
230 | }; |
231 | ||
c9cb14a6 CRI |
232 | #define RX_HANDLER(_cmd_id, _fn, _context) \ |
233 | { .cmd_id = _cmd_id, .fn = _fn, .context = _context } | |
234 | #define RX_HANDLER_GRP(_grp, _cmd, _fn, _context) \ | |
235 | { .cmd_id = WIDE_ID(_grp, _cmd), .fn = _fn, .context = _context } | |
8ca151b5 JB |
236 | |
237 | /* | |
238 | * Handlers for fw notifications | |
239 | * Convention: RX_HANDLER(CMD_NAME, iwl_mvm_rx_CMD_NAME | |
240 | * This list should be in order of frequency for performance purposes. | |
241 | * | |
c9cb14a6 | 242 | * The handler can be one from three contexts, see &iwl_rx_handler_context |
8ca151b5 JB |
243 | */ |
244 | static const struct iwl_rx_handlers iwl_mvm_rx_handlers[] = { | |
c9cb14a6 CRI |
245 | RX_HANDLER(TX_CMD, iwl_mvm_rx_tx_cmd, RX_HANDLER_SYNC), |
246 | RX_HANDLER(BA_NOTIF, iwl_mvm_rx_ba_notif, RX_HANDLER_SYNC), | |
247 | ||
84226ca1 GG |
248 | RX_HANDLER_GRP(DATA_PATH_GROUP, TLC_MNG_UPDATE_NOTIF, |
249 | iwl_mvm_tlc_update_notif, RX_HANDLER_SYNC), | |
250 | ||
c9cb14a6 CRI |
251 | RX_HANDLER(BT_PROFILE_NOTIFICATION, iwl_mvm_rx_bt_coex_notif, |
252 | RX_HANDLER_ASYNC_LOCKED), | |
253 | RX_HANDLER(BEACON_NOTIFICATION, iwl_mvm_rx_beacon_notif, | |
254 | RX_HANDLER_ASYNC_LOCKED), | |
255 | RX_HANDLER(STATISTICS_NOTIFICATION, iwl_mvm_rx_statistics, | |
256 | RX_HANDLER_ASYNC_LOCKED), | |
f421f9c3 | 257 | |
3af512d6 | 258 | RX_HANDLER(BA_WINDOW_STATUS_NOTIFICATION_ID, |
c9cb14a6 | 259 | iwl_mvm_window_status_notif, RX_HANDLER_SYNC), |
3af512d6 | 260 | |
c9cb14a6 CRI |
261 | RX_HANDLER(TIME_EVENT_NOTIFICATION, iwl_mvm_rx_time_event_notif, |
262 | RX_HANDLER_SYNC), | |
fe959c7b EG |
263 | RX_HANDLER_GRP(MAC_CONF_GROUP, SESSION_PROTECTION_NOTIF, |
264 | iwl_mvm_rx_session_protect_notif, RX_HANDLER_SYNC), | |
c9cb14a6 CRI |
265 | RX_HANDLER(MCC_CHUB_UPDATE_CMD, iwl_mvm_rx_chub_update_mcc, |
266 | RX_HANDLER_ASYNC_LOCKED), | |
497b49d2 | 267 | |
c9cb14a6 | 268 | RX_HANDLER(EOSP_NOTIFICATION, iwl_mvm_rx_eosp_notif, RX_HANDLER_SYNC), |
3e56eadf | 269 | |
e5d74646 | 270 | RX_HANDLER(SCAN_ITERATION_COMPLETE, |
c9cb14a6 | 271 | iwl_mvm_rx_lmac_scan_iter_complete_notif, RX_HANDLER_SYNC), |
35a000b7 | 272 | RX_HANDLER(SCAN_OFFLOAD_COMPLETE, |
c9cb14a6 CRI |
273 | iwl_mvm_rx_lmac_scan_complete_notif, |
274 | RX_HANDLER_ASYNC_LOCKED), | |
6e56f01d | 275 | RX_HANDLER(MATCH_FOUND_NOTIFICATION, iwl_mvm_rx_scan_match_found, |
c9cb14a6 | 276 | RX_HANDLER_SYNC), |
d2496221 | 277 | RX_HANDLER(SCAN_COMPLETE_UMAC, iwl_mvm_rx_umac_scan_complete_notif, |
c9cb14a6 | 278 | RX_HANDLER_ASYNC_LOCKED), |
ee9219b2 | 279 | RX_HANDLER(SCAN_ITERATION_COMPLETE_UMAC, |
c9cb14a6 | 280 | iwl_mvm_rx_umac_scan_iter_complete_notif, RX_HANDLER_SYNC), |
497b49d2 | 281 | |
c9cb14a6 CRI |
282 | RX_HANDLER(CARD_STATE_NOTIFICATION, iwl_mvm_rx_card_state_notif, |
283 | RX_HANDLER_SYNC), | |
8ca151b5 | 284 | |
d64048ed | 285 | RX_HANDLER(MISSED_BEACONS_NOTIFICATION, iwl_mvm_rx_missed_beacons_notif, |
c9cb14a6 | 286 | RX_HANDLER_SYNC), |
d64048ed | 287 | |
c9cb14a6 | 288 | RX_HANDLER(REPLY_ERROR, iwl_mvm_rx_fw_error, RX_HANDLER_SYNC), |
175a70b7 | 289 | RX_HANDLER(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION, |
c9cb14a6 CRI |
290 | iwl_mvm_power_uapsd_misbehaving_ap_notif, RX_HANDLER_SYNC), |
291 | RX_HANDLER(DTS_MEASUREMENT_NOTIFICATION, iwl_mvm_temp_notif, | |
292 | RX_HANDLER_ASYNC_LOCKED), | |
09eef330 | 293 | RX_HANDLER_GRP(PHY_OPS_GROUP, DTS_MEASUREMENT_NOTIF_WIDE, |
ec77a33e | 294 | iwl_mvm_temp_notif, RX_HANDLER_ASYNC_UNLOCKED), |
0a3b7119 | 295 | RX_HANDLER_GRP(PHY_OPS_GROUP, CT_KILL_NOTIFICATION, |
c9cb14a6 | 296 | iwl_mvm_ct_kill_notif, RX_HANDLER_SYNC), |
ea9af24d | 297 | |
1d3c3f63 | 298 | RX_HANDLER(TDLS_CHANNEL_SWITCH_NOTIFICATION, iwl_mvm_rx_tdls_notif, |
c9cb14a6 CRI |
299 | RX_HANDLER_ASYNC_LOCKED), |
300 | RX_HANDLER(MFUART_LOAD_NOTIFICATION, iwl_mvm_rx_mfuart_notif, | |
301 | RX_HANDLER_SYNC), | |
b73f9a4a JB |
302 | RX_HANDLER_GRP(LOCATION_GROUP, TOF_RESPONDER_STATS, |
303 | iwl_mvm_ftm_responder_stats, RX_HANDLER_ASYNC_LOCKED), | |
fc36ffda JB |
304 | |
305 | RX_HANDLER_GRP(LOCATION_GROUP, TOF_RANGE_RESPONSE_NOTIF, | |
306 | iwl_mvm_ftm_range_resp, RX_HANDLER_ASYNC_LOCKED), | |
307 | RX_HANDLER_GRP(LOCATION_GROUP, TOF_LC_NOTIF, | |
308 | iwl_mvm_ftm_lc_notif, RX_HANDLER_ASYNC_LOCKED), | |
309 | ||
bdccdb85 GBA |
310 | RX_HANDLER_GRP(DEBUG_GROUP, MFU_ASSERT_DUMP_NTF, |
311 | iwl_mvm_mfu_assert_dump_notif, RX_HANDLER_SYNC), | |
0db056d3 | 312 | RX_HANDLER_GRP(PROT_OFFLOAD_GROUP, STORED_BEACON_NTF, |
c9cb14a6 | 313 | iwl_mvm_rx_stored_beacon_notif, RX_HANDLER_SYNC), |
f92659a1 | 314 | RX_HANDLER_GRP(DATA_PATH_GROUP, MU_GROUP_MGMT_NOTIF, |
c9cb14a6 | 315 | iwl_mvm_mu_mimo_grp_notif, RX_HANDLER_SYNC), |
65e25482 JB |
316 | RX_HANDLER_GRP(DATA_PATH_GROUP, STA_PM_NOTIF, |
317 | iwl_mvm_sta_pm_notif, RX_HANDLER_SYNC), | |
8ca151b5 JB |
318 | }; |
319 | #undef RX_HANDLER | |
1230b16b | 320 | #undef RX_HANDLER_GRP |
39bdb17e SD |
321 | |
322 | /* Please keep this array *SORTED* by hex value. | |
323 | * Access is done through binary search | |
324 | */ | |
325 | static const struct iwl_hcmd_names iwl_mvm_legacy_names[] = { | |
9422b978 | 326 | HCMD_NAME(UCODE_ALIVE_NTFY), |
39bdb17e SD |
327 | HCMD_NAME(REPLY_ERROR), |
328 | HCMD_NAME(ECHO_CMD), | |
329 | HCMD_NAME(INIT_COMPLETE_NOTIF), | |
330 | HCMD_NAME(PHY_CONTEXT_CMD), | |
331 | HCMD_NAME(DBG_CFG), | |
39bdb17e SD |
332 | HCMD_NAME(SCAN_CFG_CMD), |
333 | HCMD_NAME(SCAN_REQ_UMAC), | |
334 | HCMD_NAME(SCAN_ABORT_UMAC), | |
335 | HCMD_NAME(SCAN_COMPLETE_UMAC), | |
3af512d6 | 336 | HCMD_NAME(BA_WINDOW_STATUS_NOTIFICATION_ID), |
39bdb17e SD |
337 | HCMD_NAME(ADD_STA_KEY), |
338 | HCMD_NAME(ADD_STA), | |
339 | HCMD_NAME(REMOVE_STA), | |
340 | HCMD_NAME(FW_GET_ITEM_CMD), | |
341 | HCMD_NAME(TX_CMD), | |
342 | HCMD_NAME(SCD_QUEUE_CFG), | |
343 | HCMD_NAME(TXPATH_FLUSH), | |
344 | HCMD_NAME(MGMT_MCAST_KEY), | |
345 | HCMD_NAME(WEP_KEY), | |
346 | HCMD_NAME(SHARED_MEM_CFG), | |
347 | HCMD_NAME(TDLS_CHANNEL_SWITCH_CMD), | |
348 | HCMD_NAME(MAC_CONTEXT_CMD), | |
349 | HCMD_NAME(TIME_EVENT_CMD), | |
350 | HCMD_NAME(TIME_EVENT_NOTIFICATION), | |
351 | HCMD_NAME(BINDING_CONTEXT_CMD), | |
352 | HCMD_NAME(TIME_QUOTA_CMD), | |
353 | HCMD_NAME(NON_QOS_TX_COUNTER_CMD), | |
7089ae63 | 354 | HCMD_NAME(LEDS_CMD), |
39bdb17e SD |
355 | HCMD_NAME(LQ_CMD), |
356 | HCMD_NAME(FW_PAGING_BLOCK_CMD), | |
357 | HCMD_NAME(SCAN_OFFLOAD_REQUEST_CMD), | |
358 | HCMD_NAME(SCAN_OFFLOAD_ABORT_CMD), | |
359 | HCMD_NAME(HOT_SPOT_CMD), | |
360 | HCMD_NAME(SCAN_OFFLOAD_PROFILES_QUERY_CMD), | |
39bdb17e SD |
361 | HCMD_NAME(BT_COEX_UPDATE_REDUCED_TXP), |
362 | HCMD_NAME(BT_COEX_CI), | |
363 | HCMD_NAME(PHY_CONFIGURATION_CMD), | |
364 | HCMD_NAME(CALIB_RES_NOTIF_PHY_DB), | |
176aa60b | 365 | HCMD_NAME(PHY_DB_CMD), |
39bdb17e SD |
366 | HCMD_NAME(SCAN_OFFLOAD_COMPLETE), |
367 | HCMD_NAME(SCAN_OFFLOAD_UPDATE_PROFILES_CMD), | |
39bdb17e SD |
368 | HCMD_NAME(POWER_TABLE_CMD), |
369 | HCMD_NAME(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION), | |
370 | HCMD_NAME(REPLY_THERMAL_MNG_BACKOFF), | |
371 | HCMD_NAME(DC2DC_CONFIG_CMD), | |
372 | HCMD_NAME(NVM_ACCESS_CMD), | |
39bdb17e SD |
373 | HCMD_NAME(BEACON_NOTIFICATION), |
374 | HCMD_NAME(BEACON_TEMPLATE_CMD), | |
375 | HCMD_NAME(TX_ANT_CONFIGURATION_CMD), | |
376 | HCMD_NAME(BT_CONFIG), | |
377 | HCMD_NAME(STATISTICS_CMD), | |
378 | HCMD_NAME(STATISTICS_NOTIFICATION), | |
379 | HCMD_NAME(EOSP_NOTIFICATION), | |
380 | HCMD_NAME(REDUCE_TX_POWER_CMD), | |
39bdb17e SD |
381 | HCMD_NAME(CARD_STATE_NOTIFICATION), |
382 | HCMD_NAME(MISSED_BEACONS_NOTIFICATION), | |
383 | HCMD_NAME(TDLS_CONFIG_CMD), | |
384 | HCMD_NAME(MAC_PM_POWER_TABLE), | |
385 | HCMD_NAME(TDLS_CHANNEL_SWITCH_NOTIFICATION), | |
386 | HCMD_NAME(MFUART_LOAD_NOTIFICATION), | |
43413a97 | 387 | HCMD_NAME(RSS_CONFIG_CMD), |
39bdb17e SD |
388 | HCMD_NAME(SCAN_ITERATION_COMPLETE_UMAC), |
389 | HCMD_NAME(REPLY_RX_PHY_CMD), | |
390 | HCMD_NAME(REPLY_RX_MPDU_CMD), | |
fe69b7d1 | 391 | HCMD_NAME(BAR_FRAME_RELEASE), |
3e73aa3b | 392 | HCMD_NAME(FRAME_RELEASE), |
39bdb17e SD |
393 | HCMD_NAME(BA_NOTIF), |
394 | HCMD_NAME(MCC_UPDATE_CMD), | |
395 | HCMD_NAME(MCC_CHUB_UPDATE_CMD), | |
396 | HCMD_NAME(MARKER_CMD), | |
39bdb17e SD |
397 | HCMD_NAME(BT_PROFILE_NOTIFICATION), |
398 | HCMD_NAME(BCAST_FILTER_CMD), | |
399 | HCMD_NAME(MCAST_FILTER_CMD), | |
400 | HCMD_NAME(REPLY_SF_CFG_CMD), | |
401 | HCMD_NAME(REPLY_BEACON_FILTERING_CMD), | |
402 | HCMD_NAME(D3_CONFIG_CMD), | |
403 | HCMD_NAME(PROT_OFFLOAD_CONFIG_CMD), | |
404 | HCMD_NAME(OFFLOADS_QUERY_CMD), | |
405 | HCMD_NAME(REMOTE_WAKE_CONFIG_CMD), | |
406 | HCMD_NAME(MATCH_FOUND_NOTIFICATION), | |
39bdb17e SD |
407 | HCMD_NAME(DTS_MEASUREMENT_NOTIFICATION), |
408 | HCMD_NAME(WOWLAN_PATTERNS), | |
409 | HCMD_NAME(WOWLAN_CONFIGURATION), | |
410 | HCMD_NAME(WOWLAN_TSC_RSC_PARAM), | |
411 | HCMD_NAME(WOWLAN_TKIP_PARAM), | |
412 | HCMD_NAME(WOWLAN_KEK_KCK_MATERIAL), | |
413 | HCMD_NAME(WOWLAN_GET_STATUSES), | |
39bdb17e SD |
414 | HCMD_NAME(SCAN_ITERATION_COMPLETE), |
415 | HCMD_NAME(D0I3_END_CMD), | |
416 | HCMD_NAME(LTR_CONFIG), | |
60ced797 | 417 | HCMD_NAME(LDBG_CONFIG_CMD), |
8ca151b5 | 418 | }; |
39bdb17e | 419 | |
5b086414 GBA |
420 | /* Please keep this array *SORTED* by hex value. |
421 | * Access is done through binary search | |
422 | */ | |
423 | static const struct iwl_hcmd_names iwl_mvm_system_names[] = { | |
424 | HCMD_NAME(SHARED_MEM_CFG_CMD), | |
4399caaa | 425 | HCMD_NAME(INIT_EXTENDED_CFG_CMD), |
f130bb75 | 426 | HCMD_NAME(FW_ERROR_RECOVERY_CMD), |
5b086414 GBA |
427 | }; |
428 | ||
03098268 AE |
429 | /* Please keep this array *SORTED* by hex value. |
430 | * Access is done through binary search | |
431 | */ | |
432 | static const struct iwl_hcmd_names iwl_mvm_mac_conf_names[] = { | |
74a10252 | 433 | HCMD_NAME(CHANNEL_SWITCH_TIME_EVENT_CMD), |
fe959c7b EG |
434 | HCMD_NAME(SESSION_PROTECTION_CMD), |
435 | HCMD_NAME(SESSION_PROTECTION_NOTIF), | |
d3a108a4 | 436 | HCMD_NAME(CHANNEL_SWITCH_NOA_NOTIF), |
03098268 AE |
437 | }; |
438 | ||
39bdb17e SD |
439 | /* Please keep this array *SORTED* by hex value. |
440 | * Access is done through binary search | |
441 | */ | |
442 | static const struct iwl_hcmd_names iwl_mvm_phy_names[] = { | |
443 | HCMD_NAME(CMD_DTS_MEASUREMENT_TRIGGER_WIDE), | |
5c89e7bc | 444 | HCMD_NAME(CTDP_CONFIG_CMD), |
c221daf2 | 445 | HCMD_NAME(TEMP_REPORTING_THRESHOLDS_CMD), |
a6bff3cb | 446 | HCMD_NAME(GEO_TX_POWER_LIMIT), |
0a3b7119 | 447 | HCMD_NAME(CT_KILL_NOTIFICATION), |
39bdb17e SD |
448 | HCMD_NAME(DTS_MEASUREMENT_NOTIF_WIDE), |
449 | }; | |
450 | ||
e0d8fdec SS |
451 | /* Please keep this array *SORTED* by hex value. |
452 | * Access is done through binary search | |
453 | */ | |
454 | static const struct iwl_hcmd_names iwl_mvm_data_path_names[] = { | |
ddef2f98 | 455 | HCMD_NAME(DQA_ENABLE_CMD), |
e0d8fdec | 456 | HCMD_NAME(UPDATE_MU_GROUPS_CMD), |
94bb4481 | 457 | HCMD_NAME(TRIGGER_RX_QUEUES_NOTIF_CMD), |
514c3069 | 458 | HCMD_NAME(STA_HE_CTXT_CMD), |
8edbfaa1 | 459 | HCMD_NAME(RFH_QUEUE_CONFIG_CMD), |
f4056d71 | 460 | HCMD_NAME(TLC_MNG_CONFIG_CMD), |
5213e8a8 | 461 | HCMD_NAME(CHEST_COLLECTOR_FILTER_CONFIG_CMD), |
65e25482 | 462 | HCMD_NAME(STA_PM_NOTIF), |
f92659a1 | 463 | HCMD_NAME(MU_GROUP_MGMT_NOTIF), |
94bb4481 | 464 | HCMD_NAME(RX_QUEUES_NOTIFICATION), |
e0d8fdec SS |
465 | }; |
466 | ||
6c161980 JB |
467 | /* Please keep this array *SORTED* by hex value. |
468 | * Access is done through binary search | |
469 | */ | |
470 | static const struct iwl_hcmd_names iwl_mvm_location_names[] = { | |
471 | HCMD_NAME(TOF_RANGE_REQ_CMD), | |
472 | HCMD_NAME(TOF_CONFIG_CMD), | |
473 | HCMD_NAME(TOF_RANGE_ABORT_CMD), | |
474 | HCMD_NAME(TOF_RANGE_REQ_EXT_CMD), | |
475 | HCMD_NAME(TOF_RESPONDER_CONFIG_CMD), | |
476 | HCMD_NAME(TOF_RESPONDER_DYN_CONFIG_CMD), | |
477 | HCMD_NAME(TOF_LC_NOTIF), | |
478 | HCMD_NAME(TOF_RESPONDER_STATS), | |
479 | HCMD_NAME(TOF_MCSI_DEBUG_NOTIF), | |
480 | HCMD_NAME(TOF_RANGE_RESPONSE_NOTIF), | |
481 | }; | |
482 | ||
0db056d3 SS |
483 | /* Please keep this array *SORTED* by hex value. |
484 | * Access is done through binary search | |
485 | */ | |
486 | static const struct iwl_hcmd_names iwl_mvm_prot_offload_names[] = { | |
487 | HCMD_NAME(STORED_BEACON_NTF), | |
488 | }; | |
489 | ||
1f370650 SS |
490 | /* Please keep this array *SORTED* by hex value. |
491 | * Access is done through binary search | |
492 | */ | |
493 | static const struct iwl_hcmd_names iwl_mvm_regulatory_and_nvm_names[] = { | |
494 | HCMD_NAME(NVM_ACCESS_COMPLETE), | |
e9e1ba3d | 495 | HCMD_NAME(NVM_GET_INFO), |
28dd7ccd | 496 | HCMD_NAME(TAS_CONFIG), |
1f370650 SS |
497 | }; |
498 | ||
39bdb17e SD |
499 | static const struct iwl_hcmd_arr iwl_mvm_groups[] = { |
500 | [LEGACY_GROUP] = HCMD_ARR(iwl_mvm_legacy_names), | |
501 | [LONG_GROUP] = HCMD_ARR(iwl_mvm_legacy_names), | |
5b086414 | 502 | [SYSTEM_GROUP] = HCMD_ARR(iwl_mvm_system_names), |
03098268 | 503 | [MAC_CONF_GROUP] = HCMD_ARR(iwl_mvm_mac_conf_names), |
39bdb17e | 504 | [PHY_OPS_GROUP] = HCMD_ARR(iwl_mvm_phy_names), |
e0d8fdec | 505 | [DATA_PATH_GROUP] = HCMD_ARR(iwl_mvm_data_path_names), |
6c161980 | 506 | [LOCATION_GROUP] = HCMD_ARR(iwl_mvm_location_names), |
0db056d3 | 507 | [PROT_OFFLOAD_GROUP] = HCMD_ARR(iwl_mvm_prot_offload_names), |
1f370650 SS |
508 | [REGULATORY_AND_NVM_GROUP] = |
509 | HCMD_ARR(iwl_mvm_regulatory_and_nvm_names), | |
39bdb17e SD |
510 | }; |
511 | ||
8ca151b5 JB |
512 | /* this forward declaration can avoid to export the function */ |
513 | static void iwl_mvm_async_handlers_wk(struct work_struct *wk); | |
514 | ||
f2abcfa6 | 515 | static u32 iwl_mvm_min_backoff(struct iwl_mvm *mvm) |
0c0e2c71 | 516 | { |
f2abcfa6 LC |
517 | const struct iwl_pwr_tx_backoff *backoff = mvm->cfg->pwr_tx_backoffs; |
518 | u64 dflt_pwr_limit; | |
0c0e2c71 | 519 | |
f2abcfa6 | 520 | if (!backoff) |
0c0e2c71 IY |
521 | return 0; |
522 | ||
f2abcfa6 | 523 | dflt_pwr_limit = iwl_acpi_get_pwr_limit(mvm->dev); |
0c0e2c71 | 524 | |
f2abcfa6 LC |
525 | while (backoff->pwr) { |
526 | if (dflt_pwr_limit >= backoff->pwr) | |
527 | return backoff->backoff; | |
528 | ||
529 | backoff++; | |
0c0e2c71 IY |
530 | } |
531 | ||
532 | return 0; | |
533 | } | |
534 | ||
d3a108a4 AO |
535 | static void iwl_mvm_tx_unblock_dwork(struct work_struct *work) |
536 | { | |
537 | struct iwl_mvm *mvm = | |
538 | container_of(work, struct iwl_mvm, cs_tx_unblock_dwork.work); | |
539 | struct ieee80211_vif *tx_blocked_vif; | |
540 | struct iwl_mvm_vif *mvmvif; | |
541 | ||
542 | mutex_lock(&mvm->mutex); | |
543 | ||
544 | tx_blocked_vif = | |
545 | rcu_dereference_protected(mvm->csa_tx_blocked_vif, | |
546 | lockdep_is_held(&mvm->mutex)); | |
547 | ||
548 | if (!tx_blocked_vif) | |
549 | goto unlock; | |
550 | ||
551 | mvmvif = iwl_mvm_vif_from_mac80211(tx_blocked_vif); | |
552 | iwl_mvm_modify_all_sta_disable_tx(mvm, mvmvif, false); | |
553 | RCU_INIT_POINTER(mvm->csa_tx_blocked_vif, NULL); | |
554 | unlock: | |
555 | mutex_unlock(&mvm->mutex); | |
556 | } | |
557 | ||
7174beb6 JB |
558 | static int iwl_mvm_fwrt_dump_start(void *ctx) |
559 | { | |
560 | struct iwl_mvm *mvm = ctx; | |
c7ab138e SM |
561 | |
562 | mutex_lock(&mvm->mutex); | |
7174beb6 | 563 | |
58d3bef4 | 564 | return 0; |
7174beb6 JB |
565 | } |
566 | ||
567 | static void iwl_mvm_fwrt_dump_end(void *ctx) | |
568 | { | |
569 | struct iwl_mvm *mvm = ctx; | |
570 | ||
c7ab138e | 571 | mutex_unlock(&mvm->mutex); |
7174beb6 JB |
572 | } |
573 | ||
8745f12a ST |
574 | static bool iwl_mvm_fwrt_fw_running(void *ctx) |
575 | { | |
576 | return iwl_mvm_firmware_running(ctx); | |
577 | } | |
578 | ||
d3f4b6de SM |
579 | static int iwl_mvm_fwrt_send_hcmd(void *ctx, struct iwl_host_cmd *host_cmd) |
580 | { | |
581 | struct iwl_mvm *mvm = (struct iwl_mvm *)ctx; | |
582 | int ret; | |
583 | ||
584 | mutex_lock(&mvm->mutex); | |
585 | ret = iwl_mvm_send_cmd(mvm, host_cmd); | |
586 | mutex_unlock(&mvm->mutex); | |
587 | ||
588 | return ret; | |
589 | } | |
590 | ||
971377e6 SM |
591 | static bool iwl_mvm_d3_debug_enable(void *ctx) |
592 | { | |
593 | return IWL_MVM_D3_DEBUG; | |
594 | } | |
595 | ||
7174beb6 JB |
596 | static const struct iwl_fw_runtime_ops iwl_mvm_fwrt_ops = { |
597 | .dump_start = iwl_mvm_fwrt_dump_start, | |
598 | .dump_end = iwl_mvm_fwrt_dump_end, | |
8745f12a | 599 | .fw_running = iwl_mvm_fwrt_fw_running, |
d3f4b6de | 600 | .send_hcmd = iwl_mvm_fwrt_send_hcmd, |
971377e6 | 601 | .d3_debug_enable = iwl_mvm_d3_debug_enable, |
7174beb6 JB |
602 | }; |
603 | ||
8ca151b5 JB |
604 | static struct iwl_op_mode * |
605 | iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg, | |
606 | const struct iwl_fw *fw, struct dentry *dbgfs_dir) | |
607 | { | |
608 | struct ieee80211_hw *hw; | |
609 | struct iwl_op_mode *op_mode; | |
610 | struct iwl_mvm *mvm; | |
611 | struct iwl_trans_config trans_cfg = {}; | |
612 | static const u8 no_reclaim_cmds[] = { | |
613 | TX_CMD, | |
614 | }; | |
615 | int err, scan_size; | |
0c0e2c71 | 616 | u32 min_backoff; |
034925cb | 617 | enum iwl_amsdu_size rb_size_default; |
8ca151b5 | 618 | |
c4d83271 EG |
619 | /* |
620 | * We use IWL_MVM_STATION_COUNT to check the validity of the station | |
621 | * index all over the driver - check that its value corresponds to the | |
622 | * array size. | |
623 | */ | |
624 | BUILD_BUG_ON(ARRAY_SIZE(mvm->fw_id_to_mac_id) != IWL_MVM_STATION_COUNT); | |
625 | ||
8ca151b5 JB |
626 | /******************************** |
627 | * 1. Allocating and configuring HW data | |
628 | ********************************/ | |
629 | hw = ieee80211_alloc_hw(sizeof(struct iwl_op_mode) + | |
630 | sizeof(struct iwl_mvm), | |
631 | &iwl_mvm_hw_ops); | |
632 | if (!hw) | |
633 | return NULL; | |
634 | ||
49b7b35c | 635 | hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF; |
745160ee | 636 | |
77d96730 GG |
637 | if (cfg->max_tx_agg_size) |
638 | hw->max_tx_aggregation_subframes = cfg->max_tx_agg_size; | |
1eda295f JB |
639 | else |
640 | hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF; | |
77d96730 | 641 | |
8ca151b5 | 642 | op_mode = hw->priv; |
8ca151b5 JB |
643 | |
644 | mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
645 | mvm->dev = trans->dev; | |
646 | mvm->trans = trans; | |
647 | mvm->cfg = cfg; | |
648 | mvm->fw = fw; | |
649 | mvm->hw = hw; | |
650 | ||
93b167c1 MG |
651 | iwl_fw_runtime_init(&mvm->fwrt, trans, fw, &iwl_mvm_fwrt_ops, mvm, |
652 | dbgfs_dir); | |
235acb18 | 653 | |
de8ba41b LK |
654 | mvm->init_status = 0; |
655 | ||
0316d30e JB |
656 | if (iwl_mvm_has_new_rx_api(mvm)) { |
657 | op_mode->ops = &iwl_mvm_ops_mq; | |
18ead597 | 658 | trans->rx_mpdu_cmd_hdr_size = |
286ca8eb | 659 | (trans->trans_cfg->device_family >= |
3681021f | 660 | IWL_DEVICE_FAMILY_AX210) ? |
18ead597 GBA |
661 | sizeof(struct iwl_rx_mpdu_desc) : |
662 | IWL_RX_DESC_SIZE_V1; | |
0316d30e JB |
663 | } else { |
664 | op_mode->ops = &iwl_mvm_ops; | |
25c2b22c SS |
665 | trans->rx_mpdu_cmd_hdr_size = |
666 | sizeof(struct iwl_rx_mpdu_res_start); | |
0316d30e JB |
667 | |
668 | if (WARN_ON(trans->num_rx_queues > 1)) | |
669 | goto out_free; | |
670 | } | |
671 | ||
3b37f4c9 | 672 | mvm->fw_restart = iwlwifi_mod_params.fw_restart ? -1 : 0; |
291aa7c4 | 673 | |
c8f54701 | 674 | mvm->aux_queue = IWL_MVM_DQA_AUX_QUEUE; |
b13f43a4 | 675 | mvm->snif_queue = IWL_MVM_DQA_INJECT_MONITOR_QUEUE; |
c8f54701 JB |
676 | mvm->probe_queue = IWL_MVM_DQA_AP_PROBE_RESP_QUEUE; |
677 | mvm->p2p_dev_queue = IWL_MVM_DQA_P2P_DEVICE_QUEUE; | |
678 | ||
1f3b0ff8 | 679 | mvm->sf_state = SF_UNINIT; |
7d6222e2 | 680 | if (iwl_mvm_has_unified_ucode(mvm)) |
702e975d | 681 | iwl_fw_set_current_image(&mvm->fwrt, IWL_UCODE_REGULAR); |
1f370650 | 682 | else |
702e975d | 683 | iwl_fw_set_current_image(&mvm->fwrt, IWL_UCODE_INIT); |
c89e333d | 684 | mvm->drop_bcn_ap_mode = true; |
19e737c9 | 685 | |
8ca151b5 JB |
686 | mutex_init(&mvm->mutex); |
687 | spin_lock_init(&mvm->async_handlers_lock); | |
688 | INIT_LIST_HEAD(&mvm->time_event_list); | |
b112889c | 689 | INIT_LIST_HEAD(&mvm->aux_roc_te_list); |
8ca151b5 JB |
690 | INIT_LIST_HEAD(&mvm->async_handlers_list); |
691 | spin_lock_init(&mvm->time_event_lock); | |
fc36ffda | 692 | INIT_LIST_HEAD(&mvm->ftm_initiator.loc_list); |
0739a7d7 | 693 | INIT_LIST_HEAD(&mvm->ftm_initiator.pasn_list); |
be82ecd3 | 694 | INIT_LIST_HEAD(&mvm->resp_pasn_list); |
8ca151b5 JB |
695 | |
696 | INIT_WORK(&mvm->async_handlers_wk, iwl_mvm_async_handlers_wk); | |
697 | INIT_WORK(&mvm->roc_done_wk, iwl_mvm_roc_done_wk); | |
1d3c3f63 | 698 | INIT_DELAYED_WORK(&mvm->tdls_cs.dwork, iwl_mvm_tdls_ch_switch_work); |
69e04642 | 699 | INIT_DELAYED_WORK(&mvm->scan_timeout_dwork, iwl_mvm_scan_timeout_wk); |
24afba76 | 700 | INIT_WORK(&mvm->add_stream_wk, iwl_mvm_add_new_dqa_stream_wk); |
cfbc6c4c | 701 | INIT_LIST_HEAD(&mvm->add_stream_txqs); |
8ca151b5 | 702 | |
3a732c65 | 703 | init_waitqueue_head(&mvm->rx_sync_waitq); |
b2492501 | 704 | |
0636b938 SS |
705 | atomic_set(&mvm->queue_sync_counter, 0); |
706 | ||
8ca151b5 JB |
707 | SET_IEEE80211_DEV(mvm->hw, mvm->trans->dev); |
708 | ||
7d9d0d56 LC |
709 | spin_lock_init(&mvm->tcm.lock); |
710 | INIT_DELAYED_WORK(&mvm->tcm.work, iwl_mvm_tcm_work); | |
711 | mvm->tcm.ts = jiffies; | |
712 | mvm->tcm.ll_ts = jiffies; | |
713 | mvm->tcm.uapsd_nonagg_ts = jiffies; | |
714 | ||
d3a108a4 AO |
715 | INIT_DELAYED_WORK(&mvm->cs_tx_unblock_dwork, iwl_mvm_tx_unblock_dwork); |
716 | ||
d3b4dc01 | 717 | mvm->cmd_ver.d0i3_resp = |
4af11950 MG |
718 | iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP, D0I3_END_CMD, |
719 | 0); | |
d3b4dc01 HD |
720 | /* we only support version 1 */ |
721 | if (WARN_ON_ONCE(mvm->cmd_ver.d0i3_resp > 1)) | |
722 | goto out_free; | |
723 | ||
1c096d89 AS |
724 | mvm->cmd_ver.range_resp = |
725 | iwl_fw_lookup_notif_ver(mvm->fw, LOCATION_GROUP, | |
726 | TOF_RANGE_RESPONSE_NOTIF, 5); | |
727 | /* we only support up to version 8 */ | |
728 | if (WARN_ON_ONCE(mvm->cmd_ver.range_resp > 8)) | |
729 | goto out_free; | |
730 | ||
8ca151b5 JB |
731 | /* |
732 | * Populate the state variables that the transport layer needs | |
733 | * to know about. | |
734 | */ | |
735 | trans_cfg.op_mode = op_mode; | |
736 | trans_cfg.no_reclaim_cmds = no_reclaim_cmds; | |
737 | trans_cfg.n_no_reclaim_cmds = ARRAY_SIZE(no_reclaim_cmds); | |
034925cb | 738 | |
3681021f | 739 | if (mvm->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) |
034925cb ST |
740 | rb_size_default = IWL_AMSDU_2K; |
741 | else | |
742 | rb_size_default = IWL_AMSDU_4K; | |
743 | ||
6c4fbcbc | 744 | switch (iwlwifi_mod_params.amsdu_size) { |
4bdd4dfe | 745 | case IWL_AMSDU_DEF: |
034925cb ST |
746 | trans_cfg.rx_buf_size = rb_size_default; |
747 | break; | |
6c4fbcbc EG |
748 | case IWL_AMSDU_4K: |
749 | trans_cfg.rx_buf_size = IWL_AMSDU_4K; | |
750 | break; | |
751 | case IWL_AMSDU_8K: | |
752 | trans_cfg.rx_buf_size = IWL_AMSDU_8K; | |
753 | break; | |
754 | case IWL_AMSDU_12K: | |
755 | trans_cfg.rx_buf_size = IWL_AMSDU_12K; | |
756 | break; | |
757 | default: | |
758 | pr_err("%s: Unsupported amsdu_size: %d\n", KBUILD_MODNAME, | |
759 | iwlwifi_mod_params.amsdu_size); | |
034925cb | 760 | trans_cfg.rx_buf_size = rb_size_default; |
6c4fbcbc | 761 | } |
4bdd4dfe | 762 | |
2a182fbb | 763 | trans_cfg.bc_table_dword = |
3681021f | 764 | mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210; |
8ca151b5 | 765 | |
39bdb17e SD |
766 | trans_cfg.command_groups = iwl_mvm_groups; |
767 | trans_cfg.command_groups_size = ARRAY_SIZE(iwl_mvm_groups); | |
8ca151b5 | 768 | |
c8f54701 | 769 | trans_cfg.cmd_queue = IWL_MVM_DQA_CMD_QUEUE; |
b2d81db7 | 770 | trans_cfg.cmd_fifo = IWL_MVM_TX_FIFO_CMD; |
3a736bcb | 771 | trans_cfg.scd_set_active = true; |
8ca151b5 | 772 | |
21cb3222 JB |
773 | trans_cfg.cb_data_offs = offsetof(struct ieee80211_tx_info, |
774 | driver_data[2]); | |
775 | ||
41837ca9 | 776 | trans_cfg.sw_csum_tx = IWL_MVM_SW_TX_CSUM_OFFLOAD; |
b4821767 | 777 | |
4cf677fd EG |
778 | /* Set a short watchdog for the command queue */ |
779 | trans_cfg.cmd_q_wdg_timeout = | |
5d42e7b2 | 780 | iwl_mvm_get_wd_timeout(mvm, NULL, false, true); |
4cf677fd | 781 | |
8ca151b5 JB |
782 | snprintf(mvm->hw->wiphy->fw_version, |
783 | sizeof(mvm->hw->wiphy->fw_version), | |
784 | "%s", fw->fw_version); | |
785 | ||
786 | /* Configure transport layer */ | |
787 | iwl_trans_configure(mvm->trans, &trans_cfg); | |
788 | ||
789 | trans->rx_mpdu_cmd = REPLY_RX_MPDU_CMD; | |
91c28b83 SM |
790 | trans->dbg.dest_tlv = mvm->fw->dbg.dest_tlv; |
791 | trans->dbg.n_dest_reg = mvm->fw->dbg.n_dest_reg; | |
792 | memcpy(trans->dbg.conf_tlv, mvm->fw->dbg.conf_tlv, | |
793 | sizeof(trans->dbg.conf_tlv)); | |
794 | trans->dbg.trigger_tlv = mvm->fw->dbg.trigger_tlv; | |
8ca151b5 | 795 | |
132db31c GBA |
796 | trans->iml = mvm->fw->iml; |
797 | trans->iml_len = mvm->fw->iml_len; | |
798 | ||
8ca151b5 JB |
799 | /* set up notification wait support */ |
800 | iwl_notification_wait_init(&mvm->notif_wait); | |
801 | ||
802 | /* Init phy db */ | |
803 | mvm->phy_db = iwl_phy_db_init(trans); | |
804 | if (!mvm->phy_db) { | |
805 | IWL_ERR(mvm, "Cannot init phy_db\n"); | |
806 | goto out_free; | |
807 | } | |
808 | ||
809 | IWL_INFO(mvm, "Detected %s, REV=0x%X\n", | |
0b295a1e | 810 | mvm->trans->name, mvm->trans->hw_rev); |
8ca151b5 | 811 | |
4fb06283 | 812 | if (iwlwifi_mod_params.nvm_file) |
e02a9d60 | 813 | mvm->nvm_file_name = iwlwifi_mod_params.nvm_file; |
4fb06283 EH |
814 | else |
815 | IWL_DEBUG_EEPROM(mvm->trans->dev, | |
816 | "working without external nvm file\n"); | |
9ee718aa | 817 | |
56f2929b SS |
818 | err = iwl_trans_start_hw(mvm->trans); |
819 | if (err) | |
14b485f0 EH |
820 | goto out_free; |
821 | ||
56f2929b | 822 | mutex_lock(&mvm->mutex); |
8c5f47b1 | 823 | err = iwl_run_init_mvm_ucode(mvm, true); |
72d3c7bb | 824 | if (err && err != -ERFKILL) |
700b3799 | 825 | iwl_fw_dbg_error_collect(&mvm->fwrt, FW_DBG_TRIGGER_DRIVER); |
f4744258 | 826 | if (!iwlmvm_mod_params.init_dbg || !err) |
56f2929b | 827 | iwl_mvm_stop_device(mvm); |
56f2929b | 828 | mutex_unlock(&mvm->mutex); |
de8ba41b | 829 | if (err < 0) { |
56f2929b SS |
830 | IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", err); |
831 | goto out_free; | |
8ca151b5 JB |
832 | } |
833 | ||
d2496221 | 834 | scan_size = iwl_mvm_scan_size(mvm); |
fb98be5e | 835 | |
8ca151b5 JB |
836 | mvm->scan_cmd = kmalloc(scan_size, GFP_KERNEL); |
837 | if (!mvm->scan_cmd) | |
838 | goto out_free; | |
839 | ||
5a4b2afa HD |
840 | /* Set EBS as successful as long as not stated otherwise by the FW. */ |
841 | mvm->last_ebs_successful = true; | |
842 | ||
8ca151b5 JB |
843 | err = iwl_mvm_mac_setup_register(mvm); |
844 | if (err) | |
845 | goto out_free; | |
1f370650 | 846 | mvm->hw_registered = true; |
8ca151b5 | 847 | |
f2abcfa6 | 848 | min_backoff = iwl_mvm_min_backoff(mvm); |
04ddc2aa CRI |
849 | iwl_mvm_thermal_initialize(mvm, min_backoff); |
850 | ||
c9af7528 | 851 | iwl_mvm_dbgfs_register(mvm, dbgfs_dir); |
8ca151b5 | 852 | |
678d9b6d LK |
853 | if (!iwl_mvm_has_new_rx_stats_api(mvm)) |
854 | memset(&mvm->rx_stats_v3, 0, | |
855 | sizeof(struct mvm_statistics_rx_v3)); | |
856 | else | |
857 | memset(&mvm->rx_stats, 0, sizeof(struct mvm_statistics_rx)); | |
3848ab66 | 858 | |
656fca00 AS |
859 | iwl_mvm_toggle_tx_ant(mvm, &mvm->mgmt_last_antenna_idx); |
860 | ||
8ca151b5 JB |
861 | return op_mode; |
862 | ||
8ca151b5 | 863 | out_free: |
c7ab138e | 864 | iwl_fw_flush_dumps(&mvm->fwrt); |
54f3f994 | 865 | iwl_fw_runtime_free(&mvm->fwrt); |
de8ba41b LK |
866 | |
867 | if (iwlmvm_mod_params.init_dbg) | |
868 | return op_mode; | |
8ca151b5 JB |
869 | iwl_phy_db_free(mvm->phy_db); |
870 | kfree(mvm->scan_cmd); | |
56f2929b SS |
871 | iwl_trans_op_mode_leave(trans); |
872 | ||
8ca151b5 JB |
873 | ieee80211_free_hw(mvm->hw); |
874 | return NULL; | |
875 | } | |
876 | ||
877 | static void iwl_op_mode_mvm_stop(struct iwl_op_mode *op_mode) | |
878 | { | |
879 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
880 | int i; | |
881 | ||
882 | iwl_mvm_leds_exit(mvm); | |
883 | ||
c221daf2 | 884 | iwl_mvm_thermal_exit(mvm); |
9ee718aa | 885 | |
cad7eb75 | 886 | ieee80211_unregister_hw(mvm->hw); |
8ca151b5 JB |
887 | |
888 | kfree(mvm->scan_cmd); | |
e59647ea EP |
889 | kfree(mvm->mcast_filter_cmd); |
890 | mvm->mcast_filter_cmd = NULL; | |
8ca151b5 | 891 | |
f130bb75 MG |
892 | kfree(mvm->error_recovery_buf); |
893 | mvm->error_recovery_buf = NULL; | |
894 | ||
a4082843 | 895 | iwl_trans_op_mode_leave(mvm->trans); |
8ca151b5 JB |
896 | |
897 | iwl_phy_db_free(mvm->phy_db); | |
898 | mvm->phy_db = NULL; | |
899 | ||
1dad3e0a | 900 | kfree(mvm->nvm_data); |
ae2b21b0 | 901 | for (i = 0; i < NVM_MAX_NUM_SECTIONS; i++) |
8ca151b5 JB |
902 | kfree(mvm->nvm_sections[i].data); |
903 | ||
7d9d0d56 LC |
904 | cancel_delayed_work_sync(&mvm->tcm.work); |
905 | ||
54f3f994 | 906 | iwl_fw_runtime_free(&mvm->fwrt); |
a2a57a35 | 907 | mutex_destroy(&mvm->mutex); |
a2a57a35 | 908 | |
8ca151b5 JB |
909 | ieee80211_free_hw(mvm->hw); |
910 | } | |
911 | ||
912 | struct iwl_async_handler_entry { | |
913 | struct list_head list; | |
914 | struct iwl_rx_cmd_buffer rxb; | |
c9cb14a6 | 915 | enum iwl_rx_handler_context context; |
0416841d | 916 | void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb); |
8ca151b5 JB |
917 | }; |
918 | ||
919 | void iwl_mvm_async_handlers_purge(struct iwl_mvm *mvm) | |
920 | { | |
921 | struct iwl_async_handler_entry *entry, *tmp; | |
922 | ||
923 | spin_lock_bh(&mvm->async_handlers_lock); | |
924 | list_for_each_entry_safe(entry, tmp, &mvm->async_handlers_list, list) { | |
925 | iwl_free_rxb(&entry->rxb); | |
926 | list_del(&entry->list); | |
927 | kfree(entry); | |
928 | } | |
929 | spin_unlock_bh(&mvm->async_handlers_lock); | |
930 | } | |
931 | ||
932 | static void iwl_mvm_async_handlers_wk(struct work_struct *wk) | |
933 | { | |
934 | struct iwl_mvm *mvm = | |
935 | container_of(wk, struct iwl_mvm, async_handlers_wk); | |
936 | struct iwl_async_handler_entry *entry, *tmp; | |
8098203f | 937 | LIST_HEAD(local_list); |
8ca151b5 JB |
938 | |
939 | /* Ensure that we are not in stop flow (check iwl_mvm_mac_stop) */ | |
8ca151b5 JB |
940 | |
941 | /* | |
942 | * Sync with Rx path with a lock. Remove all the entries from this list, | |
943 | * add them to a local one (lock free), and then handle them. | |
944 | */ | |
945 | spin_lock_bh(&mvm->async_handlers_lock); | |
946 | list_splice_init(&mvm->async_handlers_list, &local_list); | |
947 | spin_unlock_bh(&mvm->async_handlers_lock); | |
948 | ||
949 | list_for_each_entry_safe(entry, tmp, &local_list, list) { | |
c9cb14a6 CRI |
950 | if (entry->context == RX_HANDLER_ASYNC_LOCKED) |
951 | mutex_lock(&mvm->mutex); | |
0416841d | 952 | entry->fn(mvm, &entry->rxb); |
8ca151b5 JB |
953 | iwl_free_rxb(&entry->rxb); |
954 | list_del(&entry->list); | |
c9cb14a6 CRI |
955 | if (entry->context == RX_HANDLER_ASYNC_LOCKED) |
956 | mutex_unlock(&mvm->mutex); | |
8ca151b5 JB |
957 | kfree(entry); |
958 | } | |
8ca151b5 JB |
959 | } |
960 | ||
917f39bb EG |
961 | static inline void iwl_mvm_rx_check_trigger(struct iwl_mvm *mvm, |
962 | struct iwl_rx_packet *pkt) | |
963 | { | |
964 | struct iwl_fw_dbg_trigger_tlv *trig; | |
965 | struct iwl_fw_dbg_trigger_cmd *cmds_trig; | |
917f39bb EG |
966 | int i; |
967 | ||
6c042d75 SS |
968 | trig = iwl_fw_dbg_trigger_on(&mvm->fwrt, NULL, |
969 | FW_DBG_TRIGGER_FW_NOTIF); | |
970 | if (!trig) | |
917f39bb EG |
971 | return; |
972 | ||
917f39bb EG |
973 | cmds_trig = (void *)trig->data; |
974 | ||
917f39bb EG |
975 | for (i = 0; i < ARRAY_SIZE(cmds_trig->cmds); i++) { |
976 | /* don't collect on CMD 0 */ | |
977 | if (!cmds_trig->cmds[i].cmd_id) | |
978 | break; | |
979 | ||
0ab66e6d SS |
980 | if (cmds_trig->cmds[i].cmd_id != pkt->hdr.cmd || |
981 | cmds_trig->cmds[i].group_id != pkt->hdr.group_id) | |
917f39bb EG |
982 | continue; |
983 | ||
7174beb6 JB |
984 | iwl_fw_dbg_collect_trig(&mvm->fwrt, trig, |
985 | "CMD 0x%02x.%02x received", | |
986 | pkt->hdr.group_id, pkt->hdr.cmd); | |
917f39bb EG |
987 | break; |
988 | } | |
989 | } | |
990 | ||
0316d30e JB |
991 | static void iwl_mvm_rx_common(struct iwl_mvm *mvm, |
992 | struct iwl_rx_cmd_buffer *rxb, | |
993 | struct iwl_rx_packet *pkt) | |
8ca151b5 | 994 | { |
0316d30e | 995 | int i; |
b108d8c7 | 996 | union iwl_dbg_tlv_tp_data tp_data = { .fw_pkt = pkt }; |
1738d60b | 997 | |
b108d8c7 SM |
998 | iwl_dbg_tlv_time_point(&mvm->fwrt, |
999 | IWL_FW_INI_TIME_POINT_FW_RSP_OR_NOTIF, &tp_data); | |
917f39bb EG |
1000 | iwl_mvm_rx_check_trigger(mvm, pkt); |
1001 | ||
8ca151b5 JB |
1002 | /* |
1003 | * Do the notification wait before RX handlers so | |
1004 | * even if the RX handler consumes the RXB we have | |
1005 | * access to it in the notification wait entry. | |
1006 | */ | |
1007 | iwl_notification_wait_notify(&mvm->notif_wait, pkt); | |
1008 | ||
1009 | for (i = 0; i < ARRAY_SIZE(iwl_mvm_rx_handlers); i++) { | |
1010 | const struct iwl_rx_handlers *rx_h = &iwl_mvm_rx_handlers[i]; | |
36eed56a EG |
1011 | struct iwl_async_handler_entry *entry; |
1012 | ||
1230b16b | 1013 | if (rx_h->cmd_id != WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd)) |
36eed56a EG |
1014 | continue; |
1015 | ||
c9cb14a6 | 1016 | if (rx_h->context == RX_HANDLER_SYNC) { |
0416841d | 1017 | rx_h->fn(mvm, rxb); |
f7e6469f | 1018 | return; |
0416841d | 1019 | } |
36eed56a EG |
1020 | |
1021 | entry = kzalloc(sizeof(*entry), GFP_ATOMIC); | |
1022 | /* we can't do much... */ | |
1023 | if (!entry) | |
f7e6469f | 1024 | return; |
36eed56a EG |
1025 | |
1026 | entry->rxb._page = rxb_steal_page(rxb); | |
1027 | entry->rxb._offset = rxb->_offset; | |
1028 | entry->rxb._rx_page_order = rxb->_rx_page_order; | |
1029 | entry->fn = rx_h->fn; | |
c9cb14a6 | 1030 | entry->context = rx_h->context; |
36eed56a EG |
1031 | spin_lock(&mvm->async_handlers_lock); |
1032 | list_add_tail(&entry->list, &mvm->async_handlers_list); | |
1033 | spin_unlock(&mvm->async_handlers_lock); | |
1034 | schedule_work(&mvm->async_handlers_wk); | |
07fb3299 | 1035 | break; |
8ca151b5 | 1036 | } |
8ca151b5 JB |
1037 | } |
1038 | ||
0316d30e JB |
1039 | static void iwl_mvm_rx(struct iwl_op_mode *op_mode, |
1040 | struct napi_struct *napi, | |
1041 | struct iwl_rx_cmd_buffer *rxb) | |
1042 | { | |
1043 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1044 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
61b0f5d7 | 1045 | u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd); |
0316d30e | 1046 | |
61b0f5d7 | 1047 | if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD))) |
0316d30e | 1048 | iwl_mvm_rx_rx_mpdu(mvm, napi, rxb); |
61b0f5d7 | 1049 | else if (cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_PHY_CMD)) |
0316d30e JB |
1050 | iwl_mvm_rx_rx_phy_cmd(mvm, rxb); |
1051 | else | |
1052 | iwl_mvm_rx_common(mvm, rxb, pkt); | |
1053 | } | |
1054 | ||
1055 | static void iwl_mvm_rx_mq(struct iwl_op_mode *op_mode, | |
1056 | struct napi_struct *napi, | |
1057 | struct iwl_rx_cmd_buffer *rxb) | |
1058 | { | |
1059 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1060 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
61b0f5d7 | 1061 | u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd); |
0316d30e | 1062 | |
61b0f5d7 | 1063 | if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD))) |
780e87c2 | 1064 | iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, 0); |
61b0f5d7 JB |
1065 | else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP, |
1066 | RX_QUEUES_NOTIFICATION))) | |
c61b655a | 1067 | iwl_mvm_rx_queue_notif(mvm, napi, rxb, 0); |
61b0f5d7 | 1068 | else if (cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE)) |
58035432 | 1069 | iwl_mvm_rx_frame_release(mvm, napi, rxb, 0); |
fe69b7d1 JB |
1070 | else if (cmd == WIDE_ID(LEGACY_GROUP, BAR_FRAME_RELEASE)) |
1071 | iwl_mvm_rx_bar_frame_release(mvm, napi, rxb, 0); | |
bf9dfeda | 1072 | else if (cmd == WIDE_ID(DATA_PATH_GROUP, RX_NO_DATA_NOTIF)) |
d47cdb88 | 1073 | iwl_mvm_rx_monitor_no_data(mvm, napi, rxb, 0); |
0316d30e JB |
1074 | else |
1075 | iwl_mvm_rx_common(mvm, rxb, pkt); | |
1076 | } | |
1077 | ||
156f92f2 EG |
1078 | static void iwl_mvm_async_cb(struct iwl_op_mode *op_mode, |
1079 | const struct iwl_device_cmd *cmd) | |
1080 | { | |
1081 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
1082 | ||
1083 | /* | |
1084 | * For now, we only set the CMD_WANT_ASYNC_CALLBACK for ADD_STA | |
1085 | * commands that need to block the Tx queues. | |
1086 | */ | |
1087 | iwl_trans_block_txq_ptrs(mvm->trans, false); | |
1088 | } | |
1089 | ||
99944b73 AS |
1090 | static int iwl_mvm_is_static_queue(struct iwl_mvm *mvm, int queue) |
1091 | { | |
1092 | return queue == mvm->aux_queue || queue == mvm->probe_queue || | |
1093 | queue == mvm->p2p_dev_queue || queue == mvm->snif_queue; | |
1094 | } | |
1095 | ||
cfbc6c4c SS |
1096 | static void iwl_mvm_queue_state_change(struct iwl_op_mode *op_mode, |
1097 | int hw_queue, bool start) | |
8ca151b5 JB |
1098 | { |
1099 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
cfbc6c4c SS |
1100 | struct ieee80211_sta *sta; |
1101 | struct ieee80211_txq *txq; | |
1102 | struct iwl_mvm_txq *mvmtxq; | |
1103 | int i; | |
1104 | unsigned long tid_bitmap; | |
1105 | struct iwl_mvm_sta *mvmsta; | |
1106 | u8 sta_id; | |
b4f7a9d1 | 1107 | |
cfbc6c4c SS |
1108 | sta_id = iwl_mvm_has_new_tx_api(mvm) ? |
1109 | mvm->tvqm_info[hw_queue].sta_id : | |
1110 | mvm->queue_info[hw_queue].ra_sta_id; | |
b4f7a9d1 | 1111 | |
cfbc6c4c | 1112 | if (WARN_ON_ONCE(sta_id >= ARRAY_SIZE(mvm->fw_id_to_mac_id))) |
8ca151b5 | 1113 | return; |
8ca151b5 | 1114 | |
cfbc6c4c SS |
1115 | rcu_read_lock(); |
1116 | ||
1117 | sta = rcu_dereference(mvm->fw_id_to_mac_id[sta_id]); | |
1118 | if (IS_ERR_OR_NULL(sta)) | |
1119 | goto out; | |
1120 | mvmsta = iwl_mvm_sta_from_mac80211(sta); | |
1121 | ||
99944b73 AS |
1122 | if (iwl_mvm_is_static_queue(mvm, hw_queue)) { |
1123 | if (!start) | |
1124 | ieee80211_stop_queues(mvm->hw); | |
1125 | else if (mvmsta->sta_state != IEEE80211_STA_NOTEXIST) | |
1126 | ieee80211_wake_queues(mvm->hw); | |
1127 | ||
1128 | goto out; | |
1129 | } | |
1130 | ||
cfbc6c4c SS |
1131 | if (iwl_mvm_has_new_tx_api(mvm)) { |
1132 | int tid = mvm->tvqm_info[hw_queue].txq_tid; | |
1133 | ||
1134 | tid_bitmap = BIT(tid); | |
1135 | } else { | |
1136 | tid_bitmap = mvm->queue_info[hw_queue].tid_bitmap; | |
1137 | } | |
1138 | ||
1139 | for_each_set_bit(i, &tid_bitmap, IWL_MAX_TID_COUNT + 1) { | |
1140 | int tid = i; | |
1141 | ||
1142 | if (tid == IWL_MAX_TID_COUNT) | |
1143 | tid = IEEE80211_NUM_TIDS; | |
4ecafae9 | 1144 | |
cfbc6c4c SS |
1145 | txq = sta->txq[tid]; |
1146 | mvmtxq = iwl_mvm_txq_from_mac80211(txq); | |
1147 | mvmtxq->stopped = !start; | |
1148 | ||
1149 | if (start && mvmsta->sta_state != IEEE80211_STA_NOTEXIST) | |
1150 | iwl_mvm_mac_itxq_xmit(mvm->hw, txq); | |
4ecafae9 | 1151 | } |
cfbc6c4c SS |
1152 | |
1153 | out: | |
1154 | rcu_read_unlock(); | |
8ca151b5 JB |
1155 | } |
1156 | ||
cfbc6c4c | 1157 | static void iwl_mvm_stop_sw_queue(struct iwl_op_mode *op_mode, int hw_queue) |
b4f7a9d1 | 1158 | { |
cfbc6c4c SS |
1159 | iwl_mvm_queue_state_change(op_mode, hw_queue, false); |
1160 | } | |
b4f7a9d1 | 1161 | |
cfbc6c4c SS |
1162 | static void iwl_mvm_wake_sw_queue(struct iwl_op_mode *op_mode, int hw_queue) |
1163 | { | |
1164 | iwl_mvm_queue_state_change(op_mode, hw_queue, true); | |
b4f7a9d1 LK |
1165 | } |
1166 | ||
6ad04359 JB |
1167 | static void iwl_mvm_set_rfkill_state(struct iwl_mvm *mvm) |
1168 | { | |
1169 | bool state = iwl_mvm_is_radio_killed(mvm); | |
1170 | ||
1171 | if (state) | |
1172 | wake_up(&mvm->rx_sync_waitq); | |
1173 | ||
1174 | wiphy_rfkill_set_hw_state(mvm->hw->wiphy, state); | |
1175 | } | |
1176 | ||
9ee718aa EL |
1177 | void iwl_mvm_set_hw_ctkill_state(struct iwl_mvm *mvm, bool state) |
1178 | { | |
1179 | if (state) | |
1180 | set_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status); | |
1181 | else | |
1182 | clear_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status); | |
1183 | ||
6ad04359 | 1184 | iwl_mvm_set_rfkill_state(mvm); |
9ee718aa EL |
1185 | } |
1186 | ||
14cfca71 | 1187 | static bool iwl_mvm_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state) |
8ca151b5 JB |
1188 | { |
1189 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
b3500b47 EG |
1190 | bool rfkill_safe_init_done = READ_ONCE(mvm->rfkill_safe_init_done); |
1191 | bool unified = iwl_mvm_has_unified_ucode(mvm); | |
8ca151b5 JB |
1192 | |
1193 | if (state) | |
1194 | set_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status); | |
1195 | else | |
1196 | clear_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status); | |
1197 | ||
6ad04359 | 1198 | iwl_mvm_set_rfkill_state(mvm); |
14cfca71 | 1199 | |
b3500b47 EG |
1200 | /* iwl_run_init_mvm_ucode is waiting for results, abort it. */ |
1201 | if (rfkill_safe_init_done) | |
31b8b343 EG |
1202 | iwl_abort_notification_waits(&mvm->notif_wait); |
1203 | ||
b3500b47 EG |
1204 | /* |
1205 | * Don't ask the transport to stop the firmware. We'll do it | |
1206 | * after cfg80211 takes us down. | |
1207 | */ | |
1208 | if (unified) | |
1209 | return false; | |
1210 | ||
31b8b343 EG |
1211 | /* |
1212 | * Stop the device if we run OPERATIONAL firmware or if we are in the | |
1213 | * middle of the calibrations. | |
1214 | */ | |
07c89a60 | 1215 | return state && rfkill_safe_init_done; |
8ca151b5 JB |
1216 | } |
1217 | ||
1218 | static void iwl_mvm_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb) | |
1219 | { | |
1220 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
1221 | struct ieee80211_tx_info *info; | |
1222 | ||
1223 | info = IEEE80211_SKB_CB(skb); | |
1224 | iwl_trans_free_tx_cmd(mvm->trans, info->driver_data[1]); | |
1225 | ieee80211_free_txskb(mvm->hw, skb); | |
1226 | } | |
1227 | ||
ac1ed416 JB |
1228 | struct iwl_mvm_reprobe { |
1229 | struct device *dev; | |
1230 | struct work_struct work; | |
1231 | }; | |
1232 | ||
1233 | static void iwl_mvm_reprobe_wk(struct work_struct *wk) | |
1234 | { | |
1235 | struct iwl_mvm_reprobe *reprobe; | |
1236 | ||
1237 | reprobe = container_of(wk, struct iwl_mvm_reprobe, work); | |
1238 | if (device_reprobe(reprobe->dev)) | |
1239 | dev_err(reprobe->dev, "reprobe failed!\n"); | |
1240 | kfree(reprobe); | |
1241 | module_put(THIS_MODULE); | |
1242 | } | |
1243 | ||
b08c1d97 | 1244 | void iwl_mvm_nic_restart(struct iwl_mvm *mvm, bool fw_error) |
8ca151b5 | 1245 | { |
8ca151b5 | 1246 | iwl_abort_notification_waits(&mvm->notif_wait); |
9b1bcfcc | 1247 | iwl_dbg_tlv_del_timers(mvm->trans); |
8ca151b5 | 1248 | |
992f81fc DS |
1249 | /* |
1250 | * This is a bit racy, but worst case we tell mac80211 about | |
1251 | * a stopped/aborted scan when that was already done which | |
1252 | * is not a problem. It is necessary to abort any os scan | |
1253 | * here because mac80211 requires having the scan cleared | |
1254 | * before restarting. | |
1255 | * We'll reset the scan_status to NONE in restart cleanup in | |
1256 | * the next start() call from mac80211. If restart isn't called | |
1257 | * (no fw restart) scan status will stay busy. | |
1258 | */ | |
4ffb3650 | 1259 | iwl_mvm_report_scan_aborted(mvm); |
992f81fc | 1260 | |
8ca151b5 JB |
1261 | /* |
1262 | * If we're restarting already, don't cycle restarts. | |
1263 | * If INIT fw asserted, it will likely fail again. | |
1264 | * If WoWLAN fw asserted, don't restart either, mac80211 | |
1265 | * can't recover this since we're already half suspended. | |
1266 | */ | |
3b37f4c9 | 1267 | if (!mvm->fw_restart && fw_error) { |
4b1831e4 | 1268 | iwl_fw_error_collect(&mvm->fwrt); |
bf8b286f | 1269 | } else if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) { |
ac1ed416 JB |
1270 | struct iwl_mvm_reprobe *reprobe; |
1271 | ||
1272 | IWL_ERR(mvm, | |
1273 | "Firmware error during reconfiguration - reprobe!\n"); | |
1274 | ||
1275 | /* | |
1276 | * get a module reference to avoid doing this while unloading | |
1277 | * anyway and to avoid scheduling a work with code that's | |
1278 | * being removed. | |
1279 | */ | |
1280 | if (!try_module_get(THIS_MODULE)) { | |
1281 | IWL_ERR(mvm, "Module is being unloaded - abort\n"); | |
1282 | return; | |
1283 | } | |
1284 | ||
1285 | reprobe = kzalloc(sizeof(*reprobe), GFP_ATOMIC); | |
1286 | if (!reprobe) { | |
1287 | module_put(THIS_MODULE); | |
1288 | return; | |
1289 | } | |
1290 | reprobe->dev = mvm->trans->dev; | |
1291 | INIT_WORK(&reprobe->work, iwl_mvm_reprobe_wk); | |
1292 | schedule_work(&reprobe->work); | |
1e78e759 IP |
1293 | } else if (test_bit(IWL_MVM_STATUS_HW_RESTART_REQUESTED, |
1294 | &mvm->status)) { | |
1295 | IWL_ERR(mvm, "HW restart already requested, but not started\n"); | |
702e975d | 1296 | } else if (mvm->fwrt.cur_fw_img == IWL_UCODE_REGULAR && |
f60c9e59 EG |
1297 | mvm->hw_registered && |
1298 | !test_bit(STATUS_TRANS_DEAD, &mvm->trans->status)) { | |
f130bb75 MG |
1299 | if (mvm->fw->ucode_capa.error_log_size) { |
1300 | u32 src_size = mvm->fw->ucode_capa.error_log_size; | |
1301 | u32 src_addr = mvm->fw->ucode_capa.error_log_addr; | |
1302 | u8 *recover_buf = kzalloc(src_size, GFP_ATOMIC); | |
1303 | ||
1304 | if (recover_buf) { | |
1305 | mvm->error_recovery_buf = recover_buf; | |
1306 | iwl_trans_read_mem_bytes(mvm->trans, | |
1307 | src_addr, | |
1308 | recover_buf, | |
1309 | src_size); | |
1310 | } | |
1311 | } | |
1312 | ||
4b1831e4 SM |
1313 | iwl_fw_error_collect(&mvm->fwrt); |
1314 | ||
3b37f4c9 JB |
1315 | if (fw_error && mvm->fw_restart > 0) |
1316 | mvm->fw_restart--; | |
bf8b286f | 1317 | set_bit(IWL_MVM_STATUS_HW_RESTART_REQUESTED, &mvm->status); |
8ca151b5 JB |
1318 | ieee80211_restart_hw(mvm->hw); |
1319 | } | |
1320 | } | |
1321 | ||
715c998f EG |
1322 | static void iwl_mvm_nic_error(struct iwl_op_mode *op_mode) |
1323 | { | |
1324 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
1325 | ||
f60c9e59 EG |
1326 | if (!test_bit(STATUS_TRANS_DEAD, &mvm->trans->status)) |
1327 | iwl_mvm_dump_nic_error_log(mvm); | |
1bd3cbc1 | 1328 | |
b08c1d97 | 1329 | iwl_mvm_nic_restart(mvm, true); |
715c998f EG |
1330 | } |
1331 | ||
8ca151b5 JB |
1332 | static void iwl_mvm_cmd_queue_full(struct iwl_op_mode *op_mode) |
1333 | { | |
715c998f EG |
1334 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); |
1335 | ||
8ca151b5 | 1336 | WARN_ON(1); |
b08c1d97 | 1337 | iwl_mvm_nic_restart(mvm, true); |
8ca151b5 JB |
1338 | } |
1339 | ||
0316d30e JB |
1340 | #define IWL_MVM_COMMON_OPS \ |
1341 | /* these could be differentiated */ \ | |
156f92f2 | 1342 | .async_cb = iwl_mvm_async_cb, \ |
0316d30e JB |
1343 | .queue_full = iwl_mvm_stop_sw_queue, \ |
1344 | .queue_not_full = iwl_mvm_wake_sw_queue, \ | |
1345 | .hw_rf_kill = iwl_mvm_set_hw_rfkill_state, \ | |
1346 | .free_skb = iwl_mvm_free_skb, \ | |
1347 | .nic_error = iwl_mvm_nic_error, \ | |
1348 | .cmd_queue_full = iwl_mvm_cmd_queue_full, \ | |
1349 | .nic_config = iwl_mvm_nic_config, \ | |
0316d30e JB |
1350 | /* as we only register one, these MUST be common! */ \ |
1351 | .start = iwl_op_mode_mvm_start, \ | |
1352 | .stop = iwl_op_mode_mvm_stop | |
1353 | ||
8ca151b5 | 1354 | static const struct iwl_op_mode_ops iwl_mvm_ops = { |
0316d30e JB |
1355 | IWL_MVM_COMMON_OPS, |
1356 | .rx = iwl_mvm_rx, | |
1357 | }; | |
1358 | ||
1359 | static void iwl_mvm_rx_mq_rss(struct iwl_op_mode *op_mode, | |
1360 | struct napi_struct *napi, | |
1361 | struct iwl_rx_cmd_buffer *rxb, | |
1362 | unsigned int queue) | |
1363 | { | |
1364 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
585a6fcc | 1365 | struct iwl_rx_packet *pkt = rxb_addr(rxb); |
61b0f5d7 | 1366 | u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd); |
0316d30e | 1367 | |
61b0f5d7 | 1368 | if (unlikely(cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE))) |
a338384b | 1369 | iwl_mvm_rx_frame_release(mvm, napi, rxb, queue); |
61b0f5d7 JB |
1370 | else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP, |
1371 | RX_QUEUES_NOTIFICATION))) | |
c61b655a | 1372 | iwl_mvm_rx_queue_notif(mvm, napi, rxb, queue); |
61b0f5d7 | 1373 | else if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD))) |
585a6fcc | 1374 | iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, queue); |
0316d30e JB |
1375 | } |
1376 | ||
1377 | static const struct iwl_op_mode_ops iwl_mvm_ops_mq = { | |
1378 | IWL_MVM_COMMON_OPS, | |
1379 | .rx = iwl_mvm_rx_mq, | |
1380 | .rx_rss = iwl_mvm_rx_mq_rss, | |
8ca151b5 | 1381 | }; |