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8ca151b5 JB |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
51368bf7 | 8 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
4fb06283 | 9 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
de8ba41b | 10 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH |
8ca151b5 JB |
11 | * |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of version 2 of the GNU General Public License as | |
14 | * published by the Free Software Foundation. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
24 | * USA | |
25 | * | |
26 | * The full GNU General Public License is included in this distribution | |
410dc5aa | 27 | * in the file called COPYING. |
8ca151b5 JB |
28 | * |
29 | * Contact Information: | |
cb2f8277 | 30 | * Intel Linux Wireless <linuxwifi@intel.com> |
8ca151b5 JB |
31 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
32 | * | |
33 | * BSD LICENSE | |
34 | * | |
51368bf7 | 35 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
4fb06283 | 36 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
de8ba41b | 37 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH |
8ca151b5 JB |
38 | * All rights reserved. |
39 | * | |
40 | * Redistribution and use in source and binary forms, with or without | |
41 | * modification, are permitted provided that the following conditions | |
42 | * are met: | |
43 | * | |
44 | * * Redistributions of source code must retain the above copyright | |
45 | * notice, this list of conditions and the following disclaimer. | |
46 | * * Redistributions in binary form must reproduce the above copyright | |
47 | * notice, this list of conditions and the following disclaimer in | |
48 | * the documentation and/or other materials provided with the | |
49 | * distribution. | |
50 | * * Neither the name Intel Corporation nor the names of its | |
51 | * contributors may be used to endorse or promote products derived | |
52 | * from this software without specific prior written permission. | |
53 | * | |
54 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
55 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
56 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
57 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
58 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
59 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
60 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
61 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
62 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
63 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
64 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
65 | * | |
66 | *****************************************************************************/ | |
67 | #include <linux/module.h> | |
1bd3cbc1 | 68 | #include <linux/vmalloc.h> |
8ca151b5 JB |
69 | #include <net/mac80211.h> |
70 | ||
9fca9d5c | 71 | #include "fw/notif-wait.h" |
8ca151b5 JB |
72 | #include "iwl-trans.h" |
73 | #include "iwl-op-mode.h" | |
d962f9b1 | 74 | #include "fw/img.h" |
8ca151b5 JB |
75 | #include "iwl-debug.h" |
76 | #include "iwl-drv.h" | |
77 | #include "iwl-modparams.h" | |
78 | #include "mvm.h" | |
79 | #include "iwl-phy-db.h" | |
80 | #include "iwl-eeprom-parse.h" | |
81 | #include "iwl-csr.h" | |
82 | #include "iwl-io.h" | |
83 | #include "iwl-prph.h" | |
84 | #include "rs.h" | |
85 | #include "fw-api-scan.h" | |
86 | #include "time-event.h" | |
2f89a5d7 | 87 | #include "fw-dbg.h" |
39bdb17e SD |
88 | #include "fw-api.h" |
89 | #include "fw-api-scan.h" | |
8ca151b5 | 90 | |
8ca151b5 | 91 | #define DRV_DESCRIPTION "The new Intel(R) wireless AGN driver for Linux" |
8ca151b5 | 92 | MODULE_DESCRIPTION(DRV_DESCRIPTION); |
8ca151b5 JB |
93 | MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); |
94 | MODULE_LICENSE("GPL"); | |
95 | ||
96 | static const struct iwl_op_mode_ops iwl_mvm_ops; | |
0316d30e | 97 | static const struct iwl_op_mode_ops iwl_mvm_ops_mq; |
8ca151b5 JB |
98 | |
99 | struct iwl_mvm_mod_params iwlmvm_mod_params = { | |
100 | .power_scheme = IWL_POWER_SCHEME_BPS, | |
ce71c2f7 | 101 | .tfd_q_hang_detect = true |
8ca151b5 JB |
102 | /* rest of fields are 0 by default */ |
103 | }; | |
104 | ||
105 | module_param_named(init_dbg, iwlmvm_mod_params.init_dbg, bool, S_IRUGO); | |
106 | MODULE_PARM_DESC(init_dbg, | |
107 | "set to true to debug an ASSERT in INIT fw (default: false"); | |
108 | module_param_named(power_scheme, iwlmvm_mod_params.power_scheme, int, S_IRUGO); | |
109 | MODULE_PARM_DESC(power_scheme, | |
110 | "power management scheme: 1-active, 2-balanced, 3-low power, default: 2"); | |
ce71c2f7 EG |
111 | module_param_named(tfd_q_hang_detect, iwlmvm_mod_params.tfd_q_hang_detect, |
112 | bool, S_IRUGO); | |
113 | MODULE_PARM_DESC(tfd_q_hang_detect, | |
114 | "TFD queues hang detection (default: true"); | |
8ca151b5 JB |
115 | |
116 | /* | |
117 | * module init and exit functions | |
118 | */ | |
119 | static int __init iwl_mvm_init(void) | |
120 | { | |
121 | int ret; | |
122 | ||
123 | ret = iwl_mvm_rate_control_register(); | |
124 | if (ret) { | |
125 | pr_err("Unable to register rate control algorithm: %d\n", ret); | |
126 | return ret; | |
127 | } | |
128 | ||
129 | ret = iwl_opmode_register("iwlmvm", &iwl_mvm_ops); | |
130 | ||
131 | if (ret) { | |
132 | pr_err("Unable to register MVM op_mode: %d\n", ret); | |
133 | iwl_mvm_rate_control_unregister(); | |
134 | } | |
135 | ||
136 | return ret; | |
137 | } | |
138 | module_init(iwl_mvm_init); | |
139 | ||
140 | static void __exit iwl_mvm_exit(void) | |
141 | { | |
142 | iwl_opmode_deregister("iwlmvm"); | |
143 | iwl_mvm_rate_control_unregister(); | |
144 | } | |
145 | module_exit(iwl_mvm_exit); | |
146 | ||
147 | static void iwl_mvm_nic_config(struct iwl_op_mode *op_mode) | |
148 | { | |
149 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
150 | u8 radio_cfg_type, radio_cfg_step, radio_cfg_dash; | |
151 | u32 reg_val = 0; | |
a0544272 MH |
152 | u32 phy_config = iwl_mvm_get_phy_config(mvm); |
153 | ||
154 | radio_cfg_type = (phy_config & FW_PHY_CFG_RADIO_TYPE) >> | |
155 | FW_PHY_CFG_RADIO_TYPE_POS; | |
156 | radio_cfg_step = (phy_config & FW_PHY_CFG_RADIO_STEP) >> | |
157 | FW_PHY_CFG_RADIO_STEP_POS; | |
158 | radio_cfg_dash = (phy_config & FW_PHY_CFG_RADIO_DASH) >> | |
159 | FW_PHY_CFG_RADIO_DASH_POS; | |
8ca151b5 JB |
160 | |
161 | /* SKU control */ | |
162 | reg_val |= CSR_HW_REV_STEP(mvm->trans->hw_rev) << | |
163 | CSR_HW_IF_CONFIG_REG_POS_MAC_STEP; | |
164 | reg_val |= CSR_HW_REV_DASH(mvm->trans->hw_rev) << | |
165 | CSR_HW_IF_CONFIG_REG_POS_MAC_DASH; | |
166 | ||
167 | /* radio configuration */ | |
168 | reg_val |= radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE; | |
169 | reg_val |= radio_cfg_step << CSR_HW_IF_CONFIG_REG_POS_PHY_STEP; | |
170 | reg_val |= radio_cfg_dash << CSR_HW_IF_CONFIG_REG_POS_PHY_DASH; | |
171 | ||
172 | WARN_ON((radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE) & | |
173 | ~CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE); | |
174 | ||
9b1fcc11 | 175 | /* |
6e584873 SS |
176 | * TODO: Bits 7-8 of CSR in 8000 HW family and higher set the ADC |
177 | * sampling, and shouldn't be set to any non-zero value. | |
178 | * The same is supposed to be true of the other HW, but unsetting | |
179 | * them (such as the 7260) causes automatic tests to fail on seemingly | |
180 | * unrelated errors. Need to further investigate this, but for now | |
181 | * we'll separate cases. | |
9b1fcc11 | 182 | */ |
6e584873 | 183 | if (mvm->trans->cfg->device_family < IWL_DEVICE_FAMILY_8000) |
9b1fcc11 | 184 | reg_val |= CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI; |
8ca151b5 | 185 | |
e139dc4a LE |
186 | iwl_trans_set_bits_mask(mvm->trans, CSR_HW_IF_CONFIG_REG, |
187 | CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH | | |
188 | CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP | | |
189 | CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE | | |
190 | CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP | | |
191 | CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH | | |
192 | CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | | |
193 | CSR_HW_IF_CONFIG_REG_BIT_MAC_SI, | |
194 | reg_val); | |
8ca151b5 JB |
195 | |
196 | IWL_DEBUG_INFO(mvm, "Radio type=0x%x-0x%x-0x%x\n", radio_cfg_type, | |
197 | radio_cfg_step, radio_cfg_dash); | |
198 | ||
199 | /* | |
200 | * W/A : NIC is stuck in a reset state after Early PCIe power off | |
201 | * (PCIe power is lost before PERST# is asserted), causing ME FW | |
202 | * to lose ownership and not being able to obtain it back. | |
203 | */ | |
95411d04 | 204 | if (!mvm->trans->cfg->apmg_not_supported) |
3073d8c0 EH |
205 | iwl_set_bits_mask_prph(mvm->trans, APMG_PS_CTRL_REG, |
206 | APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS, | |
207 | ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS); | |
8ca151b5 JB |
208 | } |
209 | ||
c9cb14a6 CRI |
210 | /** |
211 | * enum iwl_rx_handler_context context for Rx handler | |
212 | * @RX_HANDLER_SYNC : this means that it will be called in the Rx path | |
213 | * which can't acquire mvm->mutex. | |
214 | * @RX_HANDLER_ASYNC_LOCKED : If the handler needs to hold mvm->mutex | |
215 | * (and only in this case!), it should be set as ASYNC. In that case, | |
216 | * it will be called from a worker with mvm->mutex held. | |
217 | * @RX_HANDLER_ASYNC_UNLOCKED : in case the handler needs to lock the | |
218 | * mutex itself, it will be called from a worker without mvm->mutex held. | |
219 | */ | |
220 | enum iwl_rx_handler_context { | |
221 | RX_HANDLER_SYNC, | |
222 | RX_HANDLER_ASYNC_LOCKED, | |
223 | RX_HANDLER_ASYNC_UNLOCKED, | |
224 | }; | |
225 | ||
226 | /** | |
227 | * struct iwl_rx_handlers handler for FW notification | |
228 | * @cmd_id: command id | |
229 | * @context: see &iwl_rx_handler_context | |
230 | * @fn: the function is called when notification is received | |
231 | */ | |
8ca151b5 | 232 | struct iwl_rx_handlers { |
1230b16b | 233 | u16 cmd_id; |
c9cb14a6 | 234 | enum iwl_rx_handler_context context; |
0416841d | 235 | void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb); |
8ca151b5 JB |
236 | }; |
237 | ||
c9cb14a6 CRI |
238 | #define RX_HANDLER(_cmd_id, _fn, _context) \ |
239 | { .cmd_id = _cmd_id, .fn = _fn, .context = _context } | |
240 | #define RX_HANDLER_GRP(_grp, _cmd, _fn, _context) \ | |
241 | { .cmd_id = WIDE_ID(_grp, _cmd), .fn = _fn, .context = _context } | |
8ca151b5 JB |
242 | |
243 | /* | |
244 | * Handlers for fw notifications | |
245 | * Convention: RX_HANDLER(CMD_NAME, iwl_mvm_rx_CMD_NAME | |
246 | * This list should be in order of frequency for performance purposes. | |
247 | * | |
c9cb14a6 | 248 | * The handler can be one from three contexts, see &iwl_rx_handler_context |
8ca151b5 JB |
249 | */ |
250 | static const struct iwl_rx_handlers iwl_mvm_rx_handlers[] = { | |
c9cb14a6 CRI |
251 | RX_HANDLER(TX_CMD, iwl_mvm_rx_tx_cmd, RX_HANDLER_SYNC), |
252 | RX_HANDLER(BA_NOTIF, iwl_mvm_rx_ba_notif, RX_HANDLER_SYNC), | |
253 | ||
254 | RX_HANDLER(BT_PROFILE_NOTIFICATION, iwl_mvm_rx_bt_coex_notif, | |
255 | RX_HANDLER_ASYNC_LOCKED), | |
256 | RX_HANDLER(BEACON_NOTIFICATION, iwl_mvm_rx_beacon_notif, | |
257 | RX_HANDLER_ASYNC_LOCKED), | |
258 | RX_HANDLER(STATISTICS_NOTIFICATION, iwl_mvm_rx_statistics, | |
259 | RX_HANDLER_ASYNC_LOCKED), | |
b9fae2d5 | 260 | RX_HANDLER(ANTENNA_COUPLING_NOTIFICATION, |
c9cb14a6 | 261 | iwl_mvm_rx_ant_coupling_notif, RX_HANDLER_ASYNC_LOCKED), |
f421f9c3 | 262 | |
3af512d6 | 263 | RX_HANDLER(BA_WINDOW_STATUS_NOTIFICATION_ID, |
c9cb14a6 | 264 | iwl_mvm_window_status_notif, RX_HANDLER_SYNC), |
3af512d6 | 265 | |
c9cb14a6 CRI |
266 | RX_HANDLER(TIME_EVENT_NOTIFICATION, iwl_mvm_rx_time_event_notif, |
267 | RX_HANDLER_SYNC), | |
268 | RX_HANDLER(MCC_CHUB_UPDATE_CMD, iwl_mvm_rx_chub_update_mcc, | |
269 | RX_HANDLER_ASYNC_LOCKED), | |
497b49d2 | 270 | |
c9cb14a6 | 271 | RX_HANDLER(EOSP_NOTIFICATION, iwl_mvm_rx_eosp_notif, RX_HANDLER_SYNC), |
3e56eadf | 272 | |
e5d74646 | 273 | RX_HANDLER(SCAN_ITERATION_COMPLETE, |
c9cb14a6 | 274 | iwl_mvm_rx_lmac_scan_iter_complete_notif, RX_HANDLER_SYNC), |
35a000b7 | 275 | RX_HANDLER(SCAN_OFFLOAD_COMPLETE, |
c9cb14a6 CRI |
276 | iwl_mvm_rx_lmac_scan_complete_notif, |
277 | RX_HANDLER_ASYNC_LOCKED), | |
6e56f01d | 278 | RX_HANDLER(MATCH_FOUND_NOTIFICATION, iwl_mvm_rx_scan_match_found, |
c9cb14a6 | 279 | RX_HANDLER_SYNC), |
d2496221 | 280 | RX_HANDLER(SCAN_COMPLETE_UMAC, iwl_mvm_rx_umac_scan_complete_notif, |
c9cb14a6 | 281 | RX_HANDLER_ASYNC_LOCKED), |
ee9219b2 | 282 | RX_HANDLER(SCAN_ITERATION_COMPLETE_UMAC, |
c9cb14a6 | 283 | iwl_mvm_rx_umac_scan_iter_complete_notif, RX_HANDLER_SYNC), |
497b49d2 | 284 | |
c9cb14a6 CRI |
285 | RX_HANDLER(CARD_STATE_NOTIFICATION, iwl_mvm_rx_card_state_notif, |
286 | RX_HANDLER_SYNC), | |
8ca151b5 | 287 | |
d64048ed | 288 | RX_HANDLER(MISSED_BEACONS_NOTIFICATION, iwl_mvm_rx_missed_beacons_notif, |
c9cb14a6 | 289 | RX_HANDLER_SYNC), |
d64048ed | 290 | |
c9cb14a6 | 291 | RX_HANDLER(REPLY_ERROR, iwl_mvm_rx_fw_error, RX_HANDLER_SYNC), |
175a70b7 | 292 | RX_HANDLER(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION, |
c9cb14a6 CRI |
293 | iwl_mvm_power_uapsd_misbehaving_ap_notif, RX_HANDLER_SYNC), |
294 | RX_HANDLER(DTS_MEASUREMENT_NOTIFICATION, iwl_mvm_temp_notif, | |
295 | RX_HANDLER_ASYNC_LOCKED), | |
09eef330 | 296 | RX_HANDLER_GRP(PHY_OPS_GROUP, DTS_MEASUREMENT_NOTIF_WIDE, |
ec77a33e | 297 | iwl_mvm_temp_notif, RX_HANDLER_ASYNC_UNLOCKED), |
0a3b7119 | 298 | RX_HANDLER_GRP(PHY_OPS_GROUP, CT_KILL_NOTIFICATION, |
c9cb14a6 | 299 | iwl_mvm_ct_kill_notif, RX_HANDLER_SYNC), |
ea9af24d | 300 | |
1d3c3f63 | 301 | RX_HANDLER(TDLS_CHANNEL_SWITCH_NOTIFICATION, iwl_mvm_rx_tdls_notif, |
c9cb14a6 CRI |
302 | RX_HANDLER_ASYNC_LOCKED), |
303 | RX_HANDLER(MFUART_LOAD_NOTIFICATION, iwl_mvm_rx_mfuart_notif, | |
304 | RX_HANDLER_SYNC), | |
305 | RX_HANDLER(TOF_NOTIFICATION, iwl_mvm_tof_resp_handler, | |
306 | RX_HANDLER_ASYNC_LOCKED), | |
bdccdb85 GBA |
307 | RX_HANDLER_GRP(DEBUG_GROUP, MFU_ASSERT_DUMP_NTF, |
308 | iwl_mvm_mfu_assert_dump_notif, RX_HANDLER_SYNC), | |
0db056d3 | 309 | RX_HANDLER_GRP(PROT_OFFLOAD_GROUP, STORED_BEACON_NTF, |
c9cb14a6 | 310 | iwl_mvm_rx_stored_beacon_notif, RX_HANDLER_SYNC), |
f92659a1 | 311 | RX_HANDLER_GRP(DATA_PATH_GROUP, MU_GROUP_MGMT_NOTIF, |
c9cb14a6 | 312 | iwl_mvm_mu_mimo_grp_notif, RX_HANDLER_SYNC), |
65e25482 JB |
313 | RX_HANDLER_GRP(DATA_PATH_GROUP, STA_PM_NOTIF, |
314 | iwl_mvm_sta_pm_notif, RX_HANDLER_SYNC), | |
8ca151b5 JB |
315 | }; |
316 | #undef RX_HANDLER | |
1230b16b | 317 | #undef RX_HANDLER_GRP |
39bdb17e SD |
318 | |
319 | /* Please keep this array *SORTED* by hex value. | |
320 | * Access is done through binary search | |
321 | */ | |
322 | static const struct iwl_hcmd_names iwl_mvm_legacy_names[] = { | |
323 | HCMD_NAME(MVM_ALIVE), | |
324 | HCMD_NAME(REPLY_ERROR), | |
325 | HCMD_NAME(ECHO_CMD), | |
326 | HCMD_NAME(INIT_COMPLETE_NOTIF), | |
327 | HCMD_NAME(PHY_CONTEXT_CMD), | |
328 | HCMD_NAME(DBG_CFG), | |
329 | HCMD_NAME(ANTENNA_COUPLING_NOTIFICATION), | |
330 | HCMD_NAME(SCAN_CFG_CMD), | |
331 | HCMD_NAME(SCAN_REQ_UMAC), | |
332 | HCMD_NAME(SCAN_ABORT_UMAC), | |
333 | HCMD_NAME(SCAN_COMPLETE_UMAC), | |
334 | HCMD_NAME(TOF_CMD), | |
335 | HCMD_NAME(TOF_NOTIFICATION), | |
3af512d6 | 336 | HCMD_NAME(BA_WINDOW_STATUS_NOTIFICATION_ID), |
39bdb17e SD |
337 | HCMD_NAME(ADD_STA_KEY), |
338 | HCMD_NAME(ADD_STA), | |
339 | HCMD_NAME(REMOVE_STA), | |
340 | HCMD_NAME(FW_GET_ITEM_CMD), | |
341 | HCMD_NAME(TX_CMD), | |
342 | HCMD_NAME(SCD_QUEUE_CFG), | |
343 | HCMD_NAME(TXPATH_FLUSH), | |
344 | HCMD_NAME(MGMT_MCAST_KEY), | |
345 | HCMD_NAME(WEP_KEY), | |
346 | HCMD_NAME(SHARED_MEM_CFG), | |
347 | HCMD_NAME(TDLS_CHANNEL_SWITCH_CMD), | |
348 | HCMD_NAME(MAC_CONTEXT_CMD), | |
349 | HCMD_NAME(TIME_EVENT_CMD), | |
350 | HCMD_NAME(TIME_EVENT_NOTIFICATION), | |
351 | HCMD_NAME(BINDING_CONTEXT_CMD), | |
352 | HCMD_NAME(TIME_QUOTA_CMD), | |
353 | HCMD_NAME(NON_QOS_TX_COUNTER_CMD), | |
354 | HCMD_NAME(LQ_CMD), | |
355 | HCMD_NAME(FW_PAGING_BLOCK_CMD), | |
356 | HCMD_NAME(SCAN_OFFLOAD_REQUEST_CMD), | |
357 | HCMD_NAME(SCAN_OFFLOAD_ABORT_CMD), | |
358 | HCMD_NAME(HOT_SPOT_CMD), | |
359 | HCMD_NAME(SCAN_OFFLOAD_PROFILES_QUERY_CMD), | |
39bdb17e SD |
360 | HCMD_NAME(BT_COEX_UPDATE_CORUN_LUT), |
361 | HCMD_NAME(BT_COEX_UPDATE_REDUCED_TXP), | |
362 | HCMD_NAME(BT_COEX_CI), | |
363 | HCMD_NAME(PHY_CONFIGURATION_CMD), | |
364 | HCMD_NAME(CALIB_RES_NOTIF_PHY_DB), | |
176aa60b | 365 | HCMD_NAME(PHY_DB_CMD), |
39bdb17e SD |
366 | HCMD_NAME(SCAN_OFFLOAD_COMPLETE), |
367 | HCMD_NAME(SCAN_OFFLOAD_UPDATE_PROFILES_CMD), | |
39bdb17e SD |
368 | HCMD_NAME(POWER_TABLE_CMD), |
369 | HCMD_NAME(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION), | |
370 | HCMD_NAME(REPLY_THERMAL_MNG_BACKOFF), | |
371 | HCMD_NAME(DC2DC_CONFIG_CMD), | |
372 | HCMD_NAME(NVM_ACCESS_CMD), | |
39bdb17e SD |
373 | HCMD_NAME(BEACON_NOTIFICATION), |
374 | HCMD_NAME(BEACON_TEMPLATE_CMD), | |
375 | HCMD_NAME(TX_ANT_CONFIGURATION_CMD), | |
376 | HCMD_NAME(BT_CONFIG), | |
377 | HCMD_NAME(STATISTICS_CMD), | |
378 | HCMD_NAME(STATISTICS_NOTIFICATION), | |
379 | HCMD_NAME(EOSP_NOTIFICATION), | |
380 | HCMD_NAME(REDUCE_TX_POWER_CMD), | |
39bdb17e SD |
381 | HCMD_NAME(CARD_STATE_NOTIFICATION), |
382 | HCMD_NAME(MISSED_BEACONS_NOTIFICATION), | |
383 | HCMD_NAME(TDLS_CONFIG_CMD), | |
384 | HCMD_NAME(MAC_PM_POWER_TABLE), | |
385 | HCMD_NAME(TDLS_CHANNEL_SWITCH_NOTIFICATION), | |
386 | HCMD_NAME(MFUART_LOAD_NOTIFICATION), | |
43413a97 | 387 | HCMD_NAME(RSS_CONFIG_CMD), |
39bdb17e SD |
388 | HCMD_NAME(SCAN_ITERATION_COMPLETE_UMAC), |
389 | HCMD_NAME(REPLY_RX_PHY_CMD), | |
390 | HCMD_NAME(REPLY_RX_MPDU_CMD), | |
391 | HCMD_NAME(BA_NOTIF), | |
392 | HCMD_NAME(MCC_UPDATE_CMD), | |
393 | HCMD_NAME(MCC_CHUB_UPDATE_CMD), | |
394 | HCMD_NAME(MARKER_CMD), | |
39bdb17e SD |
395 | HCMD_NAME(BT_PROFILE_NOTIFICATION), |
396 | HCMD_NAME(BCAST_FILTER_CMD), | |
397 | HCMD_NAME(MCAST_FILTER_CMD), | |
398 | HCMD_NAME(REPLY_SF_CFG_CMD), | |
399 | HCMD_NAME(REPLY_BEACON_FILTERING_CMD), | |
400 | HCMD_NAME(D3_CONFIG_CMD), | |
401 | HCMD_NAME(PROT_OFFLOAD_CONFIG_CMD), | |
402 | HCMD_NAME(OFFLOADS_QUERY_CMD), | |
403 | HCMD_NAME(REMOTE_WAKE_CONFIG_CMD), | |
404 | HCMD_NAME(MATCH_FOUND_NOTIFICATION), | |
39bdb17e SD |
405 | HCMD_NAME(DTS_MEASUREMENT_NOTIFICATION), |
406 | HCMD_NAME(WOWLAN_PATTERNS), | |
407 | HCMD_NAME(WOWLAN_CONFIGURATION), | |
408 | HCMD_NAME(WOWLAN_TSC_RSC_PARAM), | |
409 | HCMD_NAME(WOWLAN_TKIP_PARAM), | |
410 | HCMD_NAME(WOWLAN_KEK_KCK_MATERIAL), | |
411 | HCMD_NAME(WOWLAN_GET_STATUSES), | |
39bdb17e SD |
412 | HCMD_NAME(SCAN_ITERATION_COMPLETE), |
413 | HCMD_NAME(D0I3_END_CMD), | |
414 | HCMD_NAME(LTR_CONFIG), | |
8ca151b5 | 415 | }; |
39bdb17e | 416 | |
5b086414 GBA |
417 | /* Please keep this array *SORTED* by hex value. |
418 | * Access is done through binary search | |
419 | */ | |
420 | static const struct iwl_hcmd_names iwl_mvm_system_names[] = { | |
421 | HCMD_NAME(SHARED_MEM_CFG_CMD), | |
4399caaa | 422 | HCMD_NAME(INIT_EXTENDED_CFG_CMD), |
5b086414 GBA |
423 | }; |
424 | ||
03098268 AE |
425 | /* Please keep this array *SORTED* by hex value. |
426 | * Access is done through binary search | |
427 | */ | |
428 | static const struct iwl_hcmd_names iwl_mvm_mac_conf_names[] = { | |
429 | HCMD_NAME(LINK_QUALITY_MEASUREMENT_CMD), | |
430 | HCMD_NAME(LINK_QUALITY_MEASUREMENT_COMPLETE_NOTIF), | |
d3a108a4 | 431 | HCMD_NAME(CHANNEL_SWITCH_NOA_NOTIF), |
03098268 AE |
432 | }; |
433 | ||
39bdb17e SD |
434 | /* Please keep this array *SORTED* by hex value. |
435 | * Access is done through binary search | |
436 | */ | |
437 | static const struct iwl_hcmd_names iwl_mvm_phy_names[] = { | |
438 | HCMD_NAME(CMD_DTS_MEASUREMENT_TRIGGER_WIDE), | |
5c89e7bc | 439 | HCMD_NAME(CTDP_CONFIG_CMD), |
c221daf2 | 440 | HCMD_NAME(TEMP_REPORTING_THRESHOLDS_CMD), |
a6bff3cb | 441 | HCMD_NAME(GEO_TX_POWER_LIMIT), |
0a3b7119 | 442 | HCMD_NAME(CT_KILL_NOTIFICATION), |
39bdb17e SD |
443 | HCMD_NAME(DTS_MEASUREMENT_NOTIF_WIDE), |
444 | }; | |
445 | ||
e0d8fdec SS |
446 | /* Please keep this array *SORTED* by hex value. |
447 | * Access is done through binary search | |
448 | */ | |
449 | static const struct iwl_hcmd_names iwl_mvm_data_path_names[] = { | |
ddef2f98 | 450 | HCMD_NAME(DQA_ENABLE_CMD), |
e0d8fdec | 451 | HCMD_NAME(UPDATE_MU_GROUPS_CMD), |
94bb4481 | 452 | HCMD_NAME(TRIGGER_RX_QUEUES_NOTIF_CMD), |
65e25482 | 453 | HCMD_NAME(STA_PM_NOTIF), |
f92659a1 | 454 | HCMD_NAME(MU_GROUP_MGMT_NOTIF), |
94bb4481 | 455 | HCMD_NAME(RX_QUEUES_NOTIFICATION), |
e0d8fdec SS |
456 | }; |
457 | ||
bdccdb85 GBA |
458 | /* Please keep this array *SORTED* by hex value. |
459 | * Access is done through binary search | |
460 | */ | |
461 | static const struct iwl_hcmd_names iwl_mvm_debug_names[] = { | |
462 | HCMD_NAME(MFU_ASSERT_DUMP_NTF), | |
463 | }; | |
464 | ||
0db056d3 SS |
465 | /* Please keep this array *SORTED* by hex value. |
466 | * Access is done through binary search | |
467 | */ | |
468 | static const struct iwl_hcmd_names iwl_mvm_prot_offload_names[] = { | |
469 | HCMD_NAME(STORED_BEACON_NTF), | |
470 | }; | |
471 | ||
1f370650 SS |
472 | /* Please keep this array *SORTED* by hex value. |
473 | * Access is done through binary search | |
474 | */ | |
475 | static const struct iwl_hcmd_names iwl_mvm_regulatory_and_nvm_names[] = { | |
476 | HCMD_NAME(NVM_ACCESS_COMPLETE), | |
e9e1ba3d | 477 | HCMD_NAME(NVM_GET_INFO), |
1f370650 SS |
478 | }; |
479 | ||
39bdb17e SD |
480 | static const struct iwl_hcmd_arr iwl_mvm_groups[] = { |
481 | [LEGACY_GROUP] = HCMD_ARR(iwl_mvm_legacy_names), | |
482 | [LONG_GROUP] = HCMD_ARR(iwl_mvm_legacy_names), | |
5b086414 | 483 | [SYSTEM_GROUP] = HCMD_ARR(iwl_mvm_system_names), |
03098268 | 484 | [MAC_CONF_GROUP] = HCMD_ARR(iwl_mvm_mac_conf_names), |
39bdb17e | 485 | [PHY_OPS_GROUP] = HCMD_ARR(iwl_mvm_phy_names), |
e0d8fdec | 486 | [DATA_PATH_GROUP] = HCMD_ARR(iwl_mvm_data_path_names), |
0db056d3 | 487 | [PROT_OFFLOAD_GROUP] = HCMD_ARR(iwl_mvm_prot_offload_names), |
1f370650 SS |
488 | [REGULATORY_AND_NVM_GROUP] = |
489 | HCMD_ARR(iwl_mvm_regulatory_and_nvm_names), | |
39bdb17e SD |
490 | }; |
491 | ||
8ca151b5 JB |
492 | /* this forward declaration can avoid to export the function */ |
493 | static void iwl_mvm_async_handlers_wk(struct work_struct *wk); | |
37577fe2 | 494 | static void iwl_mvm_d0i3_exit_work(struct work_struct *wk); |
8ca151b5 | 495 | |
0c0e2c71 IY |
496 | static u32 calc_min_backoff(struct iwl_trans *trans, const struct iwl_cfg *cfg) |
497 | { | |
498 | const struct iwl_pwr_tx_backoff *pwr_tx_backoff = cfg->pwr_tx_backoffs; | |
499 | ||
500 | if (!pwr_tx_backoff) | |
501 | return 0; | |
502 | ||
503 | while (pwr_tx_backoff->pwr) { | |
504 | if (trans->dflt_pwr_limit >= pwr_tx_backoff->pwr) | |
505 | return pwr_tx_backoff->backoff; | |
506 | ||
507 | pwr_tx_backoff++; | |
508 | } | |
509 | ||
510 | return 0; | |
511 | } | |
512 | ||
4bfa47f3 EG |
513 | static void iwl_mvm_fw_error_dump_wk(struct work_struct *work); |
514 | ||
d3a108a4 AO |
515 | static void iwl_mvm_tx_unblock_dwork(struct work_struct *work) |
516 | { | |
517 | struct iwl_mvm *mvm = | |
518 | container_of(work, struct iwl_mvm, cs_tx_unblock_dwork.work); | |
519 | struct ieee80211_vif *tx_blocked_vif; | |
520 | struct iwl_mvm_vif *mvmvif; | |
521 | ||
522 | mutex_lock(&mvm->mutex); | |
523 | ||
524 | tx_blocked_vif = | |
525 | rcu_dereference_protected(mvm->csa_tx_blocked_vif, | |
526 | lockdep_is_held(&mvm->mutex)); | |
527 | ||
528 | if (!tx_blocked_vif) | |
529 | goto unlock; | |
530 | ||
531 | mvmvif = iwl_mvm_vif_from_mac80211(tx_blocked_vif); | |
532 | iwl_mvm_modify_all_sta_disable_tx(mvm, mvmvif, false); | |
533 | RCU_INIT_POINTER(mvm->csa_tx_blocked_vif, NULL); | |
534 | unlock: | |
535 | mutex_unlock(&mvm->mutex); | |
536 | } | |
537 | ||
8ca151b5 JB |
538 | static struct iwl_op_mode * |
539 | iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg, | |
540 | const struct iwl_fw *fw, struct dentry *dbgfs_dir) | |
541 | { | |
542 | struct ieee80211_hw *hw; | |
543 | struct iwl_op_mode *op_mode; | |
544 | struct iwl_mvm *mvm; | |
545 | struct iwl_trans_config trans_cfg = {}; | |
546 | static const u8 no_reclaim_cmds[] = { | |
547 | TX_CMD, | |
548 | }; | |
549 | int err, scan_size; | |
0c0e2c71 | 550 | u32 min_backoff; |
8ca151b5 | 551 | |
c4d83271 EG |
552 | /* |
553 | * We use IWL_MVM_STATION_COUNT to check the validity of the station | |
554 | * index all over the driver - check that its value corresponds to the | |
555 | * array size. | |
556 | */ | |
557 | BUILD_BUG_ON(ARRAY_SIZE(mvm->fw_id_to_mac_id) != IWL_MVM_STATION_COUNT); | |
558 | ||
8ca151b5 JB |
559 | /******************************** |
560 | * 1. Allocating and configuring HW data | |
561 | ********************************/ | |
562 | hw = ieee80211_alloc_hw(sizeof(struct iwl_op_mode) + | |
563 | sizeof(struct iwl_mvm), | |
564 | &iwl_mvm_hw_ops); | |
565 | if (!hw) | |
566 | return NULL; | |
567 | ||
745160ee OG |
568 | if (cfg->max_rx_agg_size) |
569 | hw->max_rx_aggregation_subframes = cfg->max_rx_agg_size; | |
570 | ||
77d96730 GG |
571 | if (cfg->max_tx_agg_size) |
572 | hw->max_tx_aggregation_subframes = cfg->max_tx_agg_size; | |
573 | ||
8ca151b5 | 574 | op_mode = hw->priv; |
8ca151b5 JB |
575 | |
576 | mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
577 | mvm->dev = trans->dev; | |
578 | mvm->trans = trans; | |
579 | mvm->cfg = cfg; | |
580 | mvm->fw = fw; | |
581 | mvm->hw = hw; | |
582 | ||
de8ba41b LK |
583 | mvm->init_status = 0; |
584 | ||
0316d30e JB |
585 | if (iwl_mvm_has_new_rx_api(mvm)) { |
586 | op_mode->ops = &iwl_mvm_ops_mq; | |
25c2b22c | 587 | trans->rx_mpdu_cmd_hdr_size = sizeof(struct iwl_rx_mpdu_desc); |
0316d30e JB |
588 | } else { |
589 | op_mode->ops = &iwl_mvm_ops; | |
25c2b22c SS |
590 | trans->rx_mpdu_cmd_hdr_size = |
591 | sizeof(struct iwl_rx_mpdu_res_start); | |
0316d30e JB |
592 | |
593 | if (WARN_ON(trans->num_rx_queues > 1)) | |
594 | goto out_free; | |
595 | } | |
596 | ||
3b37f4c9 | 597 | mvm->fw_restart = iwlwifi_mod_params.fw_restart ? -1 : 0; |
291aa7c4 | 598 | |
cf961e16 | 599 | if (!iwl_mvm_is_dqa_supported(mvm)) { |
cf961e16 | 600 | mvm->last_agg_queue = mvm->cfg->base_params->num_of_queues - 1; |
28d0793e LK |
601 | |
602 | if (mvm->cfg->base_params->num_of_queues == 16) { | |
603 | mvm->aux_queue = 11; | |
604 | mvm->first_agg_queue = 12; | |
37e474ac JB |
605 | BUILD_BUG_ON(BITS_PER_BYTE * |
606 | sizeof(mvm->hw_queue_to_mac80211[0]) < 12); | |
28d0793e LK |
607 | } else { |
608 | mvm->aux_queue = 15; | |
609 | mvm->first_agg_queue = 16; | |
37e474ac JB |
610 | BUILD_BUG_ON(BITS_PER_BYTE * |
611 | sizeof(mvm->hw_queue_to_mac80211[0]) < 16); | |
28d0793e | 612 | } |
cf961e16 | 613 | } else { |
28d0793e | 614 | mvm->aux_queue = IWL_MVM_DQA_AUX_QUEUE; |
49f71713 SS |
615 | mvm->probe_queue = IWL_MVM_DQA_AP_PROBE_RESP_QUEUE; |
616 | mvm->p2p_dev_queue = IWL_MVM_DQA_P2P_DEVICE_QUEUE; | |
cf961e16 LK |
617 | mvm->first_agg_queue = IWL_MVM_DQA_MIN_DATA_QUEUE; |
618 | mvm->last_agg_queue = IWL_MVM_DQA_MAX_DATA_QUEUE; | |
619 | } | |
1f3b0ff8 | 620 | mvm->sf_state = SF_UNINIT; |
1f370650 SS |
621 | if (iwl_mvm_has_new_tx_api(mvm)) |
622 | mvm->cur_ucode = IWL_UCODE_REGULAR; | |
623 | else | |
624 | mvm->cur_ucode = IWL_UCODE_INIT; | |
c89e333d | 625 | mvm->drop_bcn_ap_mode = true; |
19e737c9 | 626 | |
8ca151b5 | 627 | mutex_init(&mvm->mutex); |
d15a747f | 628 | mutex_init(&mvm->d0i3_suspend_mutex); |
8ca151b5 JB |
629 | spin_lock_init(&mvm->async_handlers_lock); |
630 | INIT_LIST_HEAD(&mvm->time_event_list); | |
b112889c | 631 | INIT_LIST_HEAD(&mvm->aux_roc_te_list); |
8ca151b5 JB |
632 | INIT_LIST_HEAD(&mvm->async_handlers_list); |
633 | spin_lock_init(&mvm->time_event_lock); | |
4ecafae9 | 634 | spin_lock_init(&mvm->queue_info_lock); |
8ca151b5 JB |
635 | |
636 | INIT_WORK(&mvm->async_handlers_wk, iwl_mvm_async_handlers_wk); | |
637 | INIT_WORK(&mvm->roc_done_wk, iwl_mvm_roc_done_wk); | |
638 | INIT_WORK(&mvm->sta_drained_wk, iwl_mvm_sta_drained_wk); | |
37577fe2 | 639 | INIT_WORK(&mvm->d0i3_exit_work, iwl_mvm_d0i3_exit_work); |
d2709ad7 | 640 | INIT_DELAYED_WORK(&mvm->fw_dump_wk, iwl_mvm_fw_error_dump_wk); |
1d3c3f63 | 641 | INIT_DELAYED_WORK(&mvm->tdls_cs.dwork, iwl_mvm_tdls_ch_switch_work); |
69e04642 | 642 | INIT_DELAYED_WORK(&mvm->scan_timeout_dwork, iwl_mvm_scan_timeout_wk); |
24afba76 | 643 | INIT_WORK(&mvm->add_stream_wk, iwl_mvm_add_new_dqa_stream_wk); |
8ca151b5 | 644 | |
b2492501 | 645 | spin_lock_init(&mvm->d0i3_tx_lock); |
576eeee9 | 646 | spin_lock_init(&mvm->refs_lock); |
b2492501 AN |
647 | skb_queue_head_init(&mvm->d0i3_tx); |
648 | init_waitqueue_head(&mvm->d0i3_exit_waitq); | |
3a732c65 | 649 | init_waitqueue_head(&mvm->rx_sync_waitq); |
b2492501 | 650 | |
0636b938 SS |
651 | atomic_set(&mvm->queue_sync_counter, 0); |
652 | ||
8ca151b5 JB |
653 | SET_IEEE80211_DEV(mvm->hw, mvm->trans->dev); |
654 | ||
d3a108a4 AO |
655 | INIT_DELAYED_WORK(&mvm->cs_tx_unblock_dwork, iwl_mvm_tx_unblock_dwork); |
656 | ||
8ca151b5 JB |
657 | /* |
658 | * Populate the state variables that the transport layer needs | |
659 | * to know about. | |
660 | */ | |
661 | trans_cfg.op_mode = op_mode; | |
662 | trans_cfg.no_reclaim_cmds = no_reclaim_cmds; | |
663 | trans_cfg.n_no_reclaim_cmds = ARRAY_SIZE(no_reclaim_cmds); | |
6c4fbcbc | 664 | switch (iwlwifi_mod_params.amsdu_size) { |
4bdd4dfe | 665 | case IWL_AMSDU_DEF: |
6c4fbcbc EG |
666 | case IWL_AMSDU_4K: |
667 | trans_cfg.rx_buf_size = IWL_AMSDU_4K; | |
668 | break; | |
669 | case IWL_AMSDU_8K: | |
670 | trans_cfg.rx_buf_size = IWL_AMSDU_8K; | |
671 | break; | |
672 | case IWL_AMSDU_12K: | |
673 | trans_cfg.rx_buf_size = IWL_AMSDU_12K; | |
674 | break; | |
675 | default: | |
676 | pr_err("%s: Unsupported amsdu_size: %d\n", KBUILD_MODNAME, | |
677 | iwlwifi_mod_params.amsdu_size); | |
678 | trans_cfg.rx_buf_size = IWL_AMSDU_4K; | |
679 | } | |
4bdd4dfe EG |
680 | |
681 | /* the hardware splits the A-MSDU */ | |
682 | if (mvm->cfg->mq_rx_supported) | |
683 | trans_cfg.rx_buf_size = IWL_AMSDU_4K; | |
8ca151b5 | 684 | |
4b87e5af LC |
685 | trans->wide_cmd_header = true; |
686 | trans_cfg.bc_table_dword = true; | |
8ca151b5 | 687 | |
39bdb17e SD |
688 | trans_cfg.command_groups = iwl_mvm_groups; |
689 | trans_cfg.command_groups_size = ARRAY_SIZE(iwl_mvm_groups); | |
8ca151b5 | 690 | |
097129c9 LK |
691 | if (iwl_mvm_is_dqa_supported(mvm)) |
692 | trans_cfg.cmd_queue = IWL_MVM_DQA_CMD_QUEUE; | |
693 | else | |
694 | trans_cfg.cmd_queue = IWL_MVM_CMD_QUEUE; | |
b2d81db7 | 695 | trans_cfg.cmd_fifo = IWL_MVM_TX_FIFO_CMD; |
3a736bcb | 696 | trans_cfg.scd_set_active = true; |
8ca151b5 | 697 | |
21cb3222 JB |
698 | trans_cfg.cb_data_offs = offsetof(struct ieee80211_tx_info, |
699 | driver_data[2]); | |
700 | ||
b4821767 | 701 | trans_cfg.sdio_adma_addr = fw->sdio_adma_addr; |
41837ca9 | 702 | trans_cfg.sw_csum_tx = IWL_MVM_SW_TX_CSUM_OFFLOAD; |
b4821767 | 703 | |
4cf677fd EG |
704 | /* Set a short watchdog for the command queue */ |
705 | trans_cfg.cmd_q_wdg_timeout = | |
5d42e7b2 | 706 | iwl_mvm_get_wd_timeout(mvm, NULL, false, true); |
4cf677fd | 707 | |
8ca151b5 JB |
708 | snprintf(mvm->hw->wiphy->fw_version, |
709 | sizeof(mvm->hw->wiphy->fw_version), | |
710 | "%s", fw->fw_version); | |
711 | ||
712 | /* Configure transport layer */ | |
713 | iwl_trans_configure(mvm->trans, &trans_cfg); | |
714 | ||
715 | trans->rx_mpdu_cmd = REPLY_RX_MPDU_CMD; | |
09e350f7 LK |
716 | trans->dbg_dest_tlv = mvm->fw->dbg_dest_tlv; |
717 | trans->dbg_dest_reg_num = mvm->fw->dbg_dest_reg_num; | |
718 | memcpy(trans->dbg_conf_tlv, mvm->fw->dbg_conf_tlv, | |
719 | sizeof(trans->dbg_conf_tlv)); | |
d2709ad7 | 720 | trans->dbg_trigger_tlv = mvm->fw->dbg_trigger_tlv; |
8ca151b5 JB |
721 | |
722 | /* set up notification wait support */ | |
723 | iwl_notification_wait_init(&mvm->notif_wait); | |
724 | ||
725 | /* Init phy db */ | |
726 | mvm->phy_db = iwl_phy_db_init(trans); | |
727 | if (!mvm->phy_db) { | |
728 | IWL_ERR(mvm, "Cannot init phy_db\n"); | |
729 | goto out_free; | |
730 | } | |
731 | ||
732 | IWL_INFO(mvm, "Detected %s, REV=0x%X\n", | |
733 | mvm->cfg->name, mvm->trans->hw_rev); | |
734 | ||
4fb06283 | 735 | if (iwlwifi_mod_params.nvm_file) |
e02a9d60 | 736 | mvm->nvm_file_name = iwlwifi_mod_params.nvm_file; |
4fb06283 EH |
737 | else |
738 | IWL_DEBUG_EEPROM(mvm->trans->dev, | |
739 | "working without external nvm file\n"); | |
9ee718aa | 740 | |
56f2929b SS |
741 | err = iwl_trans_start_hw(mvm->trans); |
742 | if (err) | |
14b485f0 EH |
743 | goto out_free; |
744 | ||
56f2929b SS |
745 | mutex_lock(&mvm->mutex); |
746 | iwl_mvm_ref(mvm, IWL_MVM_REF_INIT_UCODE); | |
8c5f47b1 | 747 | err = iwl_run_init_mvm_ucode(mvm, true); |
b092c9f2 | 748 | if (!iwlmvm_mod_params.init_dbg) |
56f2929b SS |
749 | iwl_mvm_stop_device(mvm); |
750 | iwl_mvm_unref(mvm, IWL_MVM_REF_INIT_UCODE); | |
751 | mutex_unlock(&mvm->mutex); | |
752 | /* returns 0 if successful, 1 if success but in rfkill */ | |
de8ba41b | 753 | if (err < 0) { |
56f2929b SS |
754 | IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", err); |
755 | goto out_free; | |
8ca151b5 JB |
756 | } |
757 | ||
d2496221 | 758 | scan_size = iwl_mvm_scan_size(mvm); |
fb98be5e | 759 | |
8ca151b5 JB |
760 | mvm->scan_cmd = kmalloc(scan_size, GFP_KERNEL); |
761 | if (!mvm->scan_cmd) | |
762 | goto out_free; | |
763 | ||
5a4b2afa HD |
764 | /* Set EBS as successful as long as not stated otherwise by the FW. */ |
765 | mvm->last_ebs_successful = true; | |
766 | ||
8ca151b5 JB |
767 | err = iwl_mvm_mac_setup_register(mvm); |
768 | if (err) | |
769 | goto out_free; | |
1f370650 | 770 | mvm->hw_registered = true; |
8ca151b5 | 771 | |
04ddc2aa CRI |
772 | min_backoff = calc_min_backoff(trans, cfg); |
773 | iwl_mvm_thermal_initialize(mvm, min_backoff); | |
774 | ||
8ca151b5 JB |
775 | err = iwl_mvm_dbgfs_register(mvm, dbgfs_dir); |
776 | if (err) | |
777 | goto out_unregister; | |
778 | ||
3848ab66 MG |
779 | memset(&mvm->rx_stats, 0, sizeof(struct mvm_statistics_rx)); |
780 | ||
33c85ead LC |
781 | /* The transport always starts with a taken reference, we can |
782 | * release it now if d0i3 is supported */ | |
783 | if (iwl_mvm_is_d0i3_supported(mvm)) | |
784 | iwl_trans_unref(mvm->trans); | |
7498cf4c | 785 | |
ce792918 GG |
786 | iwl_mvm_tof_init(mvm); |
787 | ||
8ca151b5 JB |
788 | return op_mode; |
789 | ||
790 | out_unregister: | |
de8ba41b LK |
791 | if (iwlmvm_mod_params.init_dbg) |
792 | return op_mode; | |
793 | ||
8ca151b5 | 794 | ieee80211_unregister_hw(mvm->hw); |
1f370650 | 795 | mvm->hw_registered = false; |
91b0d119 | 796 | iwl_mvm_leds_exit(mvm); |
c221daf2 | 797 | iwl_mvm_thermal_exit(mvm); |
8ca151b5 | 798 | out_free: |
dbf73d4a | 799 | flush_delayed_work(&mvm->fw_dump_wk); |
de8ba41b LK |
800 | |
801 | if (iwlmvm_mod_params.init_dbg) | |
802 | return op_mode; | |
8ca151b5 JB |
803 | iwl_phy_db_free(mvm->phy_db); |
804 | kfree(mvm->scan_cmd); | |
56f2929b SS |
805 | iwl_trans_op_mode_leave(trans); |
806 | ||
8ca151b5 JB |
807 | ieee80211_free_hw(mvm->hw); |
808 | return NULL; | |
809 | } | |
810 | ||
811 | static void iwl_op_mode_mvm_stop(struct iwl_op_mode *op_mode) | |
812 | { | |
813 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
814 | int i; | |
815 | ||
e27deb45 LC |
816 | /* If d0i3 is supported, we have released the reference that |
817 | * the transport started with, so we should take it back now | |
818 | * that we are leaving. | |
819 | */ | |
820 | if (iwl_mvm_is_d0i3_supported(mvm)) | |
821 | iwl_trans_ref(mvm->trans); | |
822 | ||
8ca151b5 JB |
823 | iwl_mvm_leds_exit(mvm); |
824 | ||
c221daf2 | 825 | iwl_mvm_thermal_exit(mvm); |
9ee718aa | 826 | |
de8ba41b LK |
827 | if (mvm->init_status & IWL_MVM_INIT_STATUS_REG_HW_INIT_COMPLETE) { |
828 | ieee80211_unregister_hw(mvm->hw); | |
829 | mvm->init_status &= ~IWL_MVM_INIT_STATUS_REG_HW_INIT_COMPLETE; | |
830 | } | |
8ca151b5 JB |
831 | |
832 | kfree(mvm->scan_cmd); | |
e59647ea EP |
833 | kfree(mvm->mcast_filter_cmd); |
834 | mvm->mcast_filter_cmd = NULL; | |
8ca151b5 | 835 | |
afc66bb7 JB |
836 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_IWLWIFI_DEBUGFS) |
837 | kfree(mvm->d3_resume_sram); | |
838 | #endif | |
839 | ||
a4082843 | 840 | iwl_trans_op_mode_leave(mvm->trans); |
8ca151b5 JB |
841 | |
842 | iwl_phy_db_free(mvm->phy_db); | |
843 | mvm->phy_db = NULL; | |
844 | ||
1dad3e0a | 845 | kfree(mvm->nvm_data); |
ae2b21b0 | 846 | for (i = 0; i < NVM_MAX_NUM_SECTIONS; i++) |
8ca151b5 JB |
847 | kfree(mvm->nvm_sections[i].data); |
848 | ||
ce792918 GG |
849 | iwl_mvm_tof_clean(mvm); |
850 | ||
a2a57a35 EG |
851 | mutex_destroy(&mvm->mutex); |
852 | mutex_destroy(&mvm->d0i3_suspend_mutex); | |
853 | ||
8ca151b5 JB |
854 | ieee80211_free_hw(mvm->hw); |
855 | } | |
856 | ||
857 | struct iwl_async_handler_entry { | |
858 | struct list_head list; | |
859 | struct iwl_rx_cmd_buffer rxb; | |
c9cb14a6 | 860 | enum iwl_rx_handler_context context; |
0416841d | 861 | void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb); |
8ca151b5 JB |
862 | }; |
863 | ||
864 | void iwl_mvm_async_handlers_purge(struct iwl_mvm *mvm) | |
865 | { | |
866 | struct iwl_async_handler_entry *entry, *tmp; | |
867 | ||
868 | spin_lock_bh(&mvm->async_handlers_lock); | |
869 | list_for_each_entry_safe(entry, tmp, &mvm->async_handlers_list, list) { | |
870 | iwl_free_rxb(&entry->rxb); | |
871 | list_del(&entry->list); | |
872 | kfree(entry); | |
873 | } | |
874 | spin_unlock_bh(&mvm->async_handlers_lock); | |
875 | } | |
876 | ||
877 | static void iwl_mvm_async_handlers_wk(struct work_struct *wk) | |
878 | { | |
879 | struct iwl_mvm *mvm = | |
880 | container_of(wk, struct iwl_mvm, async_handlers_wk); | |
881 | struct iwl_async_handler_entry *entry, *tmp; | |
8098203f | 882 | LIST_HEAD(local_list); |
8ca151b5 JB |
883 | |
884 | /* Ensure that we are not in stop flow (check iwl_mvm_mac_stop) */ | |
8ca151b5 JB |
885 | |
886 | /* | |
887 | * Sync with Rx path with a lock. Remove all the entries from this list, | |
888 | * add them to a local one (lock free), and then handle them. | |
889 | */ | |
890 | spin_lock_bh(&mvm->async_handlers_lock); | |
891 | list_splice_init(&mvm->async_handlers_list, &local_list); | |
892 | spin_unlock_bh(&mvm->async_handlers_lock); | |
893 | ||
894 | list_for_each_entry_safe(entry, tmp, &local_list, list) { | |
c9cb14a6 CRI |
895 | if (entry->context == RX_HANDLER_ASYNC_LOCKED) |
896 | mutex_lock(&mvm->mutex); | |
0416841d | 897 | entry->fn(mvm, &entry->rxb); |
8ca151b5 JB |
898 | iwl_free_rxb(&entry->rxb); |
899 | list_del(&entry->list); | |
c9cb14a6 CRI |
900 | if (entry->context == RX_HANDLER_ASYNC_LOCKED) |
901 | mutex_unlock(&mvm->mutex); | |
8ca151b5 JB |
902 | kfree(entry); |
903 | } | |
8ca151b5 JB |
904 | } |
905 | ||
917f39bb EG |
906 | static inline void iwl_mvm_rx_check_trigger(struct iwl_mvm *mvm, |
907 | struct iwl_rx_packet *pkt) | |
908 | { | |
909 | struct iwl_fw_dbg_trigger_tlv *trig; | |
910 | struct iwl_fw_dbg_trigger_cmd *cmds_trig; | |
917f39bb EG |
911 | int i; |
912 | ||
913 | if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_FW_NOTIF)) | |
914 | return; | |
915 | ||
916 | trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_FW_NOTIF); | |
917 | cmds_trig = (void *)trig->data; | |
918 | ||
919 | if (!iwl_fw_dbg_trigger_check_stop(mvm, NULL, trig)) | |
920 | return; | |
921 | ||
922 | for (i = 0; i < ARRAY_SIZE(cmds_trig->cmds); i++) { | |
923 | /* don't collect on CMD 0 */ | |
924 | if (!cmds_trig->cmds[i].cmd_id) | |
925 | break; | |
926 | ||
0ab66e6d SS |
927 | if (cmds_trig->cmds[i].cmd_id != pkt->hdr.cmd || |
928 | cmds_trig->cmds[i].group_id != pkt->hdr.group_id) | |
917f39bb EG |
929 | continue; |
930 | ||
5d4f929e | 931 | iwl_mvm_fw_dbg_collect_trig(mvm, trig, |
0ab66e6d SS |
932 | "CMD 0x%02x.%02x received", |
933 | pkt->hdr.group_id, pkt->hdr.cmd); | |
917f39bb EG |
934 | break; |
935 | } | |
936 | } | |
937 | ||
0316d30e JB |
938 | static void iwl_mvm_rx_common(struct iwl_mvm *mvm, |
939 | struct iwl_rx_cmd_buffer *rxb, | |
940 | struct iwl_rx_packet *pkt) | |
8ca151b5 | 941 | { |
0316d30e | 942 | int i; |
1738d60b | 943 | |
917f39bb EG |
944 | iwl_mvm_rx_check_trigger(mvm, pkt); |
945 | ||
8ca151b5 JB |
946 | /* |
947 | * Do the notification wait before RX handlers so | |
948 | * even if the RX handler consumes the RXB we have | |
949 | * access to it in the notification wait entry. | |
950 | */ | |
951 | iwl_notification_wait_notify(&mvm->notif_wait, pkt); | |
952 | ||
953 | for (i = 0; i < ARRAY_SIZE(iwl_mvm_rx_handlers); i++) { | |
954 | const struct iwl_rx_handlers *rx_h = &iwl_mvm_rx_handlers[i]; | |
36eed56a EG |
955 | struct iwl_async_handler_entry *entry; |
956 | ||
1230b16b | 957 | if (rx_h->cmd_id != WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd)) |
36eed56a EG |
958 | continue; |
959 | ||
c9cb14a6 | 960 | if (rx_h->context == RX_HANDLER_SYNC) { |
0416841d | 961 | rx_h->fn(mvm, rxb); |
f7e6469f | 962 | return; |
0416841d | 963 | } |
36eed56a EG |
964 | |
965 | entry = kzalloc(sizeof(*entry), GFP_ATOMIC); | |
966 | /* we can't do much... */ | |
967 | if (!entry) | |
f7e6469f | 968 | return; |
36eed56a EG |
969 | |
970 | entry->rxb._page = rxb_steal_page(rxb); | |
971 | entry->rxb._offset = rxb->_offset; | |
972 | entry->rxb._rx_page_order = rxb->_rx_page_order; | |
973 | entry->fn = rx_h->fn; | |
c9cb14a6 | 974 | entry->context = rx_h->context; |
36eed56a EG |
975 | spin_lock(&mvm->async_handlers_lock); |
976 | list_add_tail(&entry->list, &mvm->async_handlers_list); | |
977 | spin_unlock(&mvm->async_handlers_lock); | |
978 | schedule_work(&mvm->async_handlers_wk); | |
979 | break; | |
8ca151b5 | 980 | } |
8ca151b5 JB |
981 | } |
982 | ||
0316d30e JB |
983 | static void iwl_mvm_rx(struct iwl_op_mode *op_mode, |
984 | struct napi_struct *napi, | |
985 | struct iwl_rx_cmd_buffer *rxb) | |
986 | { | |
987 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
988 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
61b0f5d7 | 989 | u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd); |
0316d30e | 990 | |
61b0f5d7 | 991 | if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD))) |
0316d30e | 992 | iwl_mvm_rx_rx_mpdu(mvm, napi, rxb); |
61b0f5d7 | 993 | else if (cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_PHY_CMD)) |
0316d30e JB |
994 | iwl_mvm_rx_rx_phy_cmd(mvm, rxb); |
995 | else | |
996 | iwl_mvm_rx_common(mvm, rxb, pkt); | |
997 | } | |
998 | ||
999 | static void iwl_mvm_rx_mq(struct iwl_op_mode *op_mode, | |
1000 | struct napi_struct *napi, | |
1001 | struct iwl_rx_cmd_buffer *rxb) | |
1002 | { | |
1003 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1004 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
61b0f5d7 | 1005 | u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd); |
0316d30e | 1006 | |
61b0f5d7 | 1007 | if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD))) |
780e87c2 | 1008 | iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, 0); |
61b0f5d7 JB |
1009 | else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP, |
1010 | RX_QUEUES_NOTIFICATION))) | |
94bb4481 | 1011 | iwl_mvm_rx_queue_notif(mvm, rxb, 0); |
61b0f5d7 | 1012 | else if (cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE)) |
58035432 | 1013 | iwl_mvm_rx_frame_release(mvm, napi, rxb, 0); |
0316d30e JB |
1014 | else |
1015 | iwl_mvm_rx_common(mvm, rxb, pkt); | |
1016 | } | |
1017 | ||
b4f7a9d1 | 1018 | void iwl_mvm_stop_mac_queues(struct iwl_mvm *mvm, unsigned long mq) |
8ca151b5 | 1019 | { |
4ecafae9 | 1020 | int q; |
8ca151b5 | 1021 | |
4ecafae9 | 1022 | if (WARN_ON_ONCE(!mq)) |
8ca151b5 | 1023 | return; |
8ca151b5 | 1024 | |
4ecafae9 LK |
1025 | for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) { |
1026 | if (atomic_inc_return(&mvm->mac80211_queue_stop_count[q]) > 1) { | |
1027 | IWL_DEBUG_TX_QUEUES(mvm, | |
b4f7a9d1 | 1028 | "mac80211 %d already stopped\n", q); |
4ecafae9 LK |
1029 | continue; |
1030 | } | |
1031 | ||
1032 | ieee80211_stop_queue(mvm->hw, q); | |
1033 | } | |
8ca151b5 JB |
1034 | } |
1035 | ||
156f92f2 EG |
1036 | static void iwl_mvm_async_cb(struct iwl_op_mode *op_mode, |
1037 | const struct iwl_device_cmd *cmd) | |
1038 | { | |
1039 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
1040 | ||
1041 | /* | |
1042 | * For now, we only set the CMD_WANT_ASYNC_CALLBACK for ADD_STA | |
1043 | * commands that need to block the Tx queues. | |
1044 | */ | |
1045 | iwl_trans_block_txq_ptrs(mvm->trans, false); | |
1046 | } | |
1047 | ||
b4f7a9d1 | 1048 | static void iwl_mvm_stop_sw_queue(struct iwl_op_mode *op_mode, int hw_queue) |
8ca151b5 JB |
1049 | { |
1050 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
4ecafae9 | 1051 | unsigned long mq; |
8ca151b5 | 1052 | |
4ecafae9 | 1053 | spin_lock_bh(&mvm->queue_info_lock); |
34e10860 | 1054 | mq = mvm->hw_queue_to_mac80211[hw_queue]; |
4ecafae9 | 1055 | spin_unlock_bh(&mvm->queue_info_lock); |
8ca151b5 | 1056 | |
b4f7a9d1 LK |
1057 | iwl_mvm_stop_mac_queues(mvm, mq); |
1058 | } | |
1059 | ||
1060 | void iwl_mvm_start_mac_queues(struct iwl_mvm *mvm, unsigned long mq) | |
1061 | { | |
1062 | int q; | |
1063 | ||
4ecafae9 | 1064 | if (WARN_ON_ONCE(!mq)) |
8ca151b5 | 1065 | return; |
8ca151b5 | 1066 | |
4ecafae9 LK |
1067 | for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) { |
1068 | if (atomic_dec_return(&mvm->mac80211_queue_stop_count[q]) > 0) { | |
1069 | IWL_DEBUG_TX_QUEUES(mvm, | |
b4f7a9d1 | 1070 | "mac80211 %d still stopped\n", q); |
4ecafae9 LK |
1071 | continue; |
1072 | } | |
1073 | ||
1074 | ieee80211_wake_queue(mvm->hw, q); | |
1075 | } | |
8ca151b5 JB |
1076 | } |
1077 | ||
b4f7a9d1 LK |
1078 | static void iwl_mvm_wake_sw_queue(struct iwl_op_mode *op_mode, int hw_queue) |
1079 | { | |
1080 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
1081 | unsigned long mq; | |
1082 | ||
1083 | spin_lock_bh(&mvm->queue_info_lock); | |
34e10860 | 1084 | mq = mvm->hw_queue_to_mac80211[hw_queue]; |
b4f7a9d1 LK |
1085 | spin_unlock_bh(&mvm->queue_info_lock); |
1086 | ||
1087 | iwl_mvm_start_mac_queues(mvm, mq); | |
1088 | } | |
1089 | ||
6ad04359 JB |
1090 | static void iwl_mvm_set_rfkill_state(struct iwl_mvm *mvm) |
1091 | { | |
1092 | bool state = iwl_mvm_is_radio_killed(mvm); | |
1093 | ||
1094 | if (state) | |
1095 | wake_up(&mvm->rx_sync_waitq); | |
1096 | ||
1097 | wiphy_rfkill_set_hw_state(mvm->hw->wiphy, state); | |
1098 | } | |
1099 | ||
9ee718aa EL |
1100 | void iwl_mvm_set_hw_ctkill_state(struct iwl_mvm *mvm, bool state) |
1101 | { | |
1102 | if (state) | |
1103 | set_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status); | |
1104 | else | |
1105 | clear_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status); | |
1106 | ||
6ad04359 | 1107 | iwl_mvm_set_rfkill_state(mvm); |
9ee718aa EL |
1108 | } |
1109 | ||
14cfca71 | 1110 | static bool iwl_mvm_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state) |
8ca151b5 JB |
1111 | { |
1112 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
31b8b343 | 1113 | bool calibrating = ACCESS_ONCE(mvm->calibrating); |
8ca151b5 JB |
1114 | |
1115 | if (state) | |
1116 | set_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status); | |
1117 | else | |
1118 | clear_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status); | |
1119 | ||
6ad04359 | 1120 | iwl_mvm_set_rfkill_state(mvm); |
14cfca71 | 1121 | |
31b8b343 EG |
1122 | /* iwl_run_init_mvm_ucode is waiting for results, abort it */ |
1123 | if (calibrating) | |
1124 | iwl_abort_notification_waits(&mvm->notif_wait); | |
1125 | ||
1126 | /* | |
1127 | * Stop the device if we run OPERATIONAL firmware or if we are in the | |
1128 | * middle of the calibrations. | |
1129 | */ | |
1130 | return state && (mvm->cur_ucode != IWL_UCODE_INIT || calibrating); | |
8ca151b5 JB |
1131 | } |
1132 | ||
1133 | static void iwl_mvm_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb) | |
1134 | { | |
1135 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
1136 | struct ieee80211_tx_info *info; | |
1137 | ||
1138 | info = IEEE80211_SKB_CB(skb); | |
1139 | iwl_trans_free_tx_cmd(mvm->trans, info->driver_data[1]); | |
1140 | ieee80211_free_txskb(mvm->hw, skb); | |
1141 | } | |
1142 | ||
ac1ed416 JB |
1143 | struct iwl_mvm_reprobe { |
1144 | struct device *dev; | |
1145 | struct work_struct work; | |
1146 | }; | |
1147 | ||
1148 | static void iwl_mvm_reprobe_wk(struct work_struct *wk) | |
1149 | { | |
1150 | struct iwl_mvm_reprobe *reprobe; | |
1151 | ||
1152 | reprobe = container_of(wk, struct iwl_mvm_reprobe, work); | |
1153 | if (device_reprobe(reprobe->dev)) | |
1154 | dev_err(reprobe->dev, "reprobe failed!\n"); | |
1155 | kfree(reprobe); | |
1156 | module_put(THIS_MODULE); | |
1157 | } | |
1158 | ||
4bfa47f3 EG |
1159 | static void iwl_mvm_fw_error_dump_wk(struct work_struct *work) |
1160 | { | |
1161 | struct iwl_mvm *mvm = | |
d2709ad7 | 1162 | container_of(work, struct iwl_mvm, fw_dump_wk.work); |
4bfa47f3 | 1163 | |
fb2380a2 LK |
1164 | if (iwl_mvm_ref_sync(mvm, IWL_MVM_REF_FW_DBG_COLLECT)) |
1165 | return; | |
1166 | ||
4bfa47f3 | 1167 | mutex_lock(&mvm->mutex); |
145d90b6 | 1168 | |
145d90b6 | 1169 | if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_7000) { |
addce854 | 1170 | /* stop recording */ |
145d90b6 | 1171 | iwl_set_bits_prph(mvm->trans, MON_BUFF_SAMPLE_CTL, 0x100); |
addce854 EG |
1172 | |
1173 | iwl_mvm_fw_error_dump(mvm); | |
1174 | ||
1175 | /* start recording again if the firmware is not crashed */ | |
1176 | if (!test_bit(STATUS_FW_ERROR, &mvm->trans->status) && | |
3e731484 | 1177 | mvm->fw->dbg_dest_tlv) { |
addce854 EG |
1178 | iwl_clear_bits_prph(mvm->trans, |
1179 | MON_BUFF_SAMPLE_CTL, 0x100); | |
3e731484 LK |
1180 | iwl_clear_bits_prph(mvm->trans, |
1181 | MON_BUFF_SAMPLE_CTL, 0x1); | |
1182 | iwl_set_bits_prph(mvm->trans, MON_BUFF_SAMPLE_CTL, 0x1); | |
1183 | } | |
145d90b6 | 1184 | } else { |
addce854 EG |
1185 | u32 in_sample = iwl_read_prph(mvm->trans, DBGC_IN_SAMPLE); |
1186 | u32 out_ctrl = iwl_read_prph(mvm->trans, DBGC_OUT_CTRL); | |
1187 | ||
1188 | /* stop recording */ | |
145d90b6 | 1189 | iwl_write_prph(mvm->trans, DBGC_IN_SAMPLE, 0); |
145d90b6 | 1190 | udelay(100); |
addce854 EG |
1191 | iwl_write_prph(mvm->trans, DBGC_OUT_CTRL, 0); |
1192 | /* wait before we collect the data till the DBGC stop */ | |
1193 | udelay(500); | |
145d90b6 | 1194 | |
addce854 | 1195 | iwl_mvm_fw_error_dump(mvm); |
e66e0b70 | 1196 | |
addce854 EG |
1197 | /* start recording again if the firmware is not crashed */ |
1198 | if (!test_bit(STATUS_FW_ERROR, &mvm->trans->status) && | |
1199 | mvm->fw->dbg_dest_tlv) { | |
1200 | iwl_write_prph(mvm->trans, DBGC_IN_SAMPLE, in_sample); | |
1201 | iwl_write_prph(mvm->trans, DBGC_OUT_CTRL, out_ctrl); | |
1202 | } | |
1203 | } | |
e66e0b70 | 1204 | |
4bfa47f3 | 1205 | mutex_unlock(&mvm->mutex); |
fb2380a2 LK |
1206 | |
1207 | iwl_mvm_unref(mvm, IWL_MVM_REF_FW_DBG_COLLECT); | |
4bfa47f3 EG |
1208 | } |
1209 | ||
b08c1d97 | 1210 | void iwl_mvm_nic_restart(struct iwl_mvm *mvm, bool fw_error) |
8ca151b5 | 1211 | { |
8ca151b5 JB |
1212 | iwl_abort_notification_waits(&mvm->notif_wait); |
1213 | ||
992f81fc DS |
1214 | /* |
1215 | * This is a bit racy, but worst case we tell mac80211 about | |
1216 | * a stopped/aborted scan when that was already done which | |
1217 | * is not a problem. It is necessary to abort any os scan | |
1218 | * here because mac80211 requires having the scan cleared | |
1219 | * before restarting. | |
1220 | * We'll reset the scan_status to NONE in restart cleanup in | |
1221 | * the next start() call from mac80211. If restart isn't called | |
1222 | * (no fw restart) scan status will stay busy. | |
1223 | */ | |
4ffb3650 | 1224 | iwl_mvm_report_scan_aborted(mvm); |
992f81fc | 1225 | |
8ca151b5 JB |
1226 | /* |
1227 | * If we're restarting already, don't cycle restarts. | |
1228 | * If INIT fw asserted, it will likely fail again. | |
1229 | * If WoWLAN fw asserted, don't restart either, mac80211 | |
1230 | * can't recover this since we're already half suspended. | |
1231 | */ | |
3b37f4c9 | 1232 | if (!mvm->fw_restart && fw_error) { |
36fb9017 OG |
1233 | iwl_mvm_fw_dbg_collect_desc(mvm, &iwl_mvm_dump_desc_assert, |
1234 | NULL); | |
60f1071c LC |
1235 | } else if (test_and_set_bit(IWL_MVM_STATUS_IN_HW_RESTART, |
1236 | &mvm->status)) { | |
ac1ed416 JB |
1237 | struct iwl_mvm_reprobe *reprobe; |
1238 | ||
1239 | IWL_ERR(mvm, | |
1240 | "Firmware error during reconfiguration - reprobe!\n"); | |
1241 | ||
1242 | /* | |
1243 | * get a module reference to avoid doing this while unloading | |
1244 | * anyway and to avoid scheduling a work with code that's | |
1245 | * being removed. | |
1246 | */ | |
1247 | if (!try_module_get(THIS_MODULE)) { | |
1248 | IWL_ERR(mvm, "Module is being unloaded - abort\n"); | |
1249 | return; | |
1250 | } | |
1251 | ||
1252 | reprobe = kzalloc(sizeof(*reprobe), GFP_ATOMIC); | |
1253 | if (!reprobe) { | |
1254 | module_put(THIS_MODULE); | |
1255 | return; | |
1256 | } | |
1257 | reprobe->dev = mvm->trans->dev; | |
1258 | INIT_WORK(&reprobe->work, iwl_mvm_reprobe_wk); | |
1259 | schedule_work(&reprobe->work); | |
1f370650 SS |
1260 | } else if (mvm->cur_ucode == IWL_UCODE_REGULAR && |
1261 | mvm->hw_registered) { | |
7498cf4c EP |
1262 | /* don't let the transport/FW power down */ |
1263 | iwl_mvm_ref(mvm, IWL_MVM_REF_UCODE_DOWN); | |
1264 | ||
3b37f4c9 JB |
1265 | if (fw_error && mvm->fw_restart > 0) |
1266 | mvm->fw_restart--; | |
8ca151b5 JB |
1267 | ieee80211_restart_hw(mvm->hw); |
1268 | } | |
1269 | } | |
1270 | ||
715c998f EG |
1271 | static void iwl_mvm_nic_error(struct iwl_op_mode *op_mode) |
1272 | { | |
1273 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
1274 | ||
1275 | iwl_mvm_dump_nic_error_log(mvm); | |
1bd3cbc1 | 1276 | |
b08c1d97 | 1277 | iwl_mvm_nic_restart(mvm, true); |
715c998f EG |
1278 | } |
1279 | ||
8ca151b5 JB |
1280 | static void iwl_mvm_cmd_queue_full(struct iwl_op_mode *op_mode) |
1281 | { | |
715c998f EG |
1282 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); |
1283 | ||
8ca151b5 | 1284 | WARN_ON(1); |
b08c1d97 | 1285 | iwl_mvm_nic_restart(mvm, true); |
8ca151b5 JB |
1286 | } |
1287 | ||
37577fe2 EP |
1288 | struct iwl_d0i3_iter_data { |
1289 | struct iwl_mvm *mvm; | |
a3f7ba5c | 1290 | struct ieee80211_vif *connected_vif; |
37577fe2 EP |
1291 | u8 ap_sta_id; |
1292 | u8 vif_count; | |
b2492501 AN |
1293 | u8 offloading_tid; |
1294 | bool disable_offloading; | |
37577fe2 EP |
1295 | }; |
1296 | ||
b2492501 AN |
1297 | static bool iwl_mvm_disallow_offloading(struct iwl_mvm *mvm, |
1298 | struct ieee80211_vif *vif, | |
1299 | struct iwl_d0i3_iter_data *iter_data) | |
1300 | { | |
1301 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
b2492501 AN |
1302 | struct iwl_mvm_sta *mvmsta; |
1303 | u32 available_tids = 0; | |
1304 | u8 tid; | |
1305 | ||
1306 | if (WARN_ON(vif->type != NL80211_IFTYPE_STATION || | |
0ae98812 | 1307 | mvmvif->ap_sta_id == IWL_MVM_INVALID_STA)) |
b2492501 AN |
1308 | return false; |
1309 | ||
13303c0f SS |
1310 | mvmsta = iwl_mvm_sta_from_staid_rcu(mvm, mvmvif->ap_sta_id); |
1311 | if (!mvmsta) | |
b2492501 AN |
1312 | return false; |
1313 | ||
b2492501 AN |
1314 | spin_lock_bh(&mvmsta->lock); |
1315 | for (tid = 0; tid < IWL_MAX_TID_COUNT; tid++) { | |
1316 | struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid]; | |
1317 | ||
1318 | /* | |
1319 | * in case of pending tx packets, don't use this tid | |
1320 | * for offloading in order to prevent reuse of the same | |
1321 | * qos seq counters. | |
1322 | */ | |
dd32162d | 1323 | if (iwl_mvm_tid_queued(mvm, tid_data)) |
b2492501 AN |
1324 | continue; |
1325 | ||
1326 | if (tid_data->state != IWL_AGG_OFF) | |
1327 | continue; | |
1328 | ||
1329 | available_tids |= BIT(tid); | |
1330 | } | |
1331 | spin_unlock_bh(&mvmsta->lock); | |
1332 | ||
1333 | /* | |
1334 | * disallow protocol offloading if we have no available tid | |
1335 | * (with no pending frames and no active aggregation, | |
1336 | * as we don't handle "holes" properly - the scheduler needs the | |
1337 | * frame's seq number and TFD index to match) | |
1338 | */ | |
1339 | if (!available_tids) | |
1340 | return true; | |
1341 | ||
1342 | /* for simplicity, just use the first available tid */ | |
1343 | iter_data->offloading_tid = ffs(available_tids) - 1; | |
1344 | return false; | |
1345 | } | |
1346 | ||
d6230972 EP |
1347 | static void iwl_mvm_enter_d0i3_iterator(void *_data, u8 *mac, |
1348 | struct ieee80211_vif *vif) | |
1349 | { | |
37577fe2 EP |
1350 | struct iwl_d0i3_iter_data *data = _data; |
1351 | struct iwl_mvm *mvm = data->mvm; | |
1352 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
d6230972 EP |
1353 | u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE; |
1354 | ||
1355 | IWL_DEBUG_RPM(mvm, "entering D0i3 - vif %pM\n", vif->addr); | |
1356 | if (vif->type != NL80211_IFTYPE_STATION || | |
1357 | !vif->bss_conf.assoc) | |
1358 | return; | |
1359 | ||
b2492501 AN |
1360 | /* |
1361 | * in case of pending tx packets or active aggregations, | |
1362 | * avoid offloading features in order to prevent reuse of | |
1363 | * the same qos seq counters. | |
1364 | */ | |
1365 | if (iwl_mvm_disallow_offloading(mvm, vif, data)) | |
1366 | data->disable_offloading = true; | |
1367 | ||
d6230972 | 1368 | iwl_mvm_update_d0i3_power_mode(mvm, vif, true, flags); |
c97dab40 SS |
1369 | iwl_mvm_send_proto_offload(mvm, vif, data->disable_offloading, |
1370 | false, flags); | |
d6230972 EP |
1371 | |
1372 | /* | |
1373 | * on init/association, mvm already configures POWER_TABLE_CMD | |
1374 | * and REPLY_MCAST_FILTER_CMD, so currently don't | |
1375 | * reconfigure them (we might want to use different | |
1376 | * params later on, though). | |
1377 | */ | |
37577fe2 EP |
1378 | data->ap_sta_id = mvmvif->ap_sta_id; |
1379 | data->vif_count++; | |
a3f7ba5c EP |
1380 | |
1381 | /* | |
1382 | * no new commands can be sent at this stage, so it's safe | |
1383 | * to save the vif pointer during d0i3 entrance. | |
1384 | */ | |
1385 | data->connected_vif = vif; | |
d6230972 EP |
1386 | } |
1387 | ||
1a95c8df | 1388 | static void iwl_mvm_set_wowlan_data(struct iwl_mvm *mvm, |
c8b06a99 | 1389 | struct iwl_wowlan_config_cmd *cmd, |
1a95c8df EP |
1390 | struct iwl_d0i3_iter_data *iter_data) |
1391 | { | |
1392 | struct ieee80211_sta *ap_sta; | |
1393 | struct iwl_mvm_sta *mvm_ap_sta; | |
1394 | ||
0ae98812 | 1395 | if (iter_data->ap_sta_id == IWL_MVM_INVALID_STA) |
1a95c8df EP |
1396 | return; |
1397 | ||
1398 | rcu_read_lock(); | |
1399 | ||
1400 | ap_sta = rcu_dereference(mvm->fw_id_to_mac_id[iter_data->ap_sta_id]); | |
1401 | if (IS_ERR_OR_NULL(ap_sta)) | |
1402 | goto out; | |
1403 | ||
1404 | mvm_ap_sta = iwl_mvm_sta_from_mac80211(ap_sta); | |
c8b06a99 | 1405 | cmd->is_11n_connection = ap_sta->ht_cap.ht_supported; |
b2492501 | 1406 | cmd->offloading_tid = iter_data->offloading_tid; |
70b4c536 | 1407 | cmd->flags = ENABLE_L3_FILTERING | ENABLE_NBNS_FILTERING | |
0db056d3 | 1408 | ENABLE_DHCP_FILTERING | ENABLE_STORE_BEACON; |
1a95c8df EP |
1409 | /* |
1410 | * The d0i3 uCode takes care of the nonqos counters, | |
1411 | * so configure only the qos seq ones. | |
1412 | */ | |
c8b06a99 | 1413 | iwl_mvm_set_wowlan_qos_seq(mvm_ap_sta, cmd); |
1a95c8df EP |
1414 | out: |
1415 | rcu_read_unlock(); | |
1416 | } | |
6735943f EP |
1417 | |
1418 | int iwl_mvm_enter_d0i3(struct iwl_op_mode *op_mode) | |
b3370d47 EP |
1419 | { |
1420 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
98ee7783 | 1421 | u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE; |
b77f06d9 | 1422 | int ret; |
37577fe2 EP |
1423 | struct iwl_d0i3_iter_data d0i3_iter_data = { |
1424 | .mvm = mvm, | |
1425 | }; | |
c8b06a99 EG |
1426 | struct iwl_wowlan_config_cmd wowlan_config_cmd = { |
1427 | .wakeup_filter = cpu_to_le32(IWL_WOWLAN_WAKEUP_RX_FRAME | | |
1428 | IWL_WOWLAN_WAKEUP_BEACON_MISS | | |
0db056d3 | 1429 | IWL_WOWLAN_WAKEUP_LINK_CHANGE), |
b77f06d9 | 1430 | }; |
98ee7783 AN |
1431 | struct iwl_d3_manager_config d3_cfg_cmd = { |
1432 | .min_sleep_time = cpu_to_le32(1000), | |
d9f1fc20 | 1433 | .wakeup_flags = cpu_to_le32(IWL_WAKEUP_D3_CONFIG_FW_ERROR), |
98ee7783 | 1434 | }; |
b3370d47 EP |
1435 | |
1436 | IWL_DEBUG_RPM(mvm, "MVM entering D0i3\n"); | |
98ee7783 | 1437 | |
08f0d23d EP |
1438 | if (WARN_ON_ONCE(mvm->cur_ucode != IWL_UCODE_REGULAR)) |
1439 | return -EINVAL; | |
1440 | ||
b2492501 | 1441 | set_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status); |
b2492501 | 1442 | |
f4cf8680 EP |
1443 | /* |
1444 | * iwl_mvm_ref_sync takes a reference before checking the flag. | |
1445 | * so by checking there is no held reference we prevent a state | |
1446 | * in which iwl_mvm_ref_sync continues successfully while we | |
1447 | * configure the firmware to enter d0i3 | |
1448 | */ | |
1449 | if (iwl_mvm_ref_taken(mvm)) { | |
1450 | IWL_DEBUG_RPM(mvm->trans, "abort d0i3 due to taken ref\n"); | |
1451 | clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status); | |
caf1578a | 1452 | wake_up(&mvm->d0i3_exit_waitq); |
f4cf8680 EP |
1453 | return 1; |
1454 | } | |
1455 | ||
d6230972 EP |
1456 | ieee80211_iterate_active_interfaces_atomic(mvm->hw, |
1457 | IEEE80211_IFACE_ITER_NORMAL, | |
1458 | iwl_mvm_enter_d0i3_iterator, | |
37577fe2 EP |
1459 | &d0i3_iter_data); |
1460 | if (d0i3_iter_data.vif_count == 1) { | |
1461 | mvm->d0i3_ap_sta_id = d0i3_iter_data.ap_sta_id; | |
b2492501 | 1462 | mvm->d0i3_offloading = !d0i3_iter_data.disable_offloading; |
37577fe2 EP |
1463 | } else { |
1464 | WARN_ON_ONCE(d0i3_iter_data.vif_count > 1); | |
0ae98812 | 1465 | mvm->d0i3_ap_sta_id = IWL_MVM_INVALID_STA; |
b2492501 | 1466 | mvm->d0i3_offloading = false; |
37577fe2 | 1467 | } |
d6230972 | 1468 | |
ecc7c518 EG |
1469 | /* make sure we have no running tx while configuring the seqno */ |
1470 | synchronize_net(); | |
1471 | ||
eb3908d3 | 1472 | /* Flush the hw queues, in case something got queued during entry */ |
d167e81a MG |
1473 | /* TODO new tx api */ |
1474 | if (iwl_mvm_has_new_tx_api(mvm)) { | |
1475 | WARN_ONCE(1, "d0i3: Need to implement flush TX queue\n"); | |
1476 | } else { | |
1477 | ret = iwl_mvm_flush_tx_path(mvm, iwl_mvm_flushable_queues(mvm), | |
1478 | flags); | |
1479 | if (ret) | |
1480 | return ret; | |
1481 | } | |
eb3908d3 | 1482 | |
183edd84 | 1483 | /* configure wowlan configuration only if needed */ |
0ae98812 | 1484 | if (mvm->d0i3_ap_sta_id != IWL_MVM_INVALID_STA) { |
0db056d3 SS |
1485 | /* wake on beacons only if beacon storing isn't supported */ |
1486 | if (!fw_has_capa(&mvm->fw->ucode_capa, | |
1487 | IWL_UCODE_TLV_CAPA_BEACON_STORING)) | |
1488 | wowlan_config_cmd.wakeup_filter |= | |
1489 | cpu_to_le32(IWL_WOWLAN_WAKEUP_BCN_FILTERING); | |
1490 | ||
a3f7ba5c EP |
1491 | iwl_mvm_wowlan_config_key_params(mvm, |
1492 | d0i3_iter_data.connected_vif, | |
1493 | true, flags); | |
1494 | ||
183edd84 EP |
1495 | iwl_mvm_set_wowlan_data(mvm, &wowlan_config_cmd, |
1496 | &d0i3_iter_data); | |
1497 | ||
1498 | ret = iwl_mvm_send_cmd_pdu(mvm, WOWLAN_CONFIGURATION, flags, | |
1499 | sizeof(wowlan_config_cmd), | |
1500 | &wowlan_config_cmd); | |
1501 | if (ret) | |
1502 | return ret; | |
1503 | } | |
b77f06d9 | 1504 | |
98ee7783 AN |
1505 | return iwl_mvm_send_cmd_pdu(mvm, D3_CONFIG_CMD, |
1506 | flags | CMD_MAKE_TRANS_IDLE, | |
1507 | sizeof(d3_cfg_cmd), &d3_cfg_cmd); | |
b3370d47 EP |
1508 | } |
1509 | ||
d6230972 EP |
1510 | static void iwl_mvm_exit_d0i3_iterator(void *_data, u8 *mac, |
1511 | struct ieee80211_vif *vif) | |
1512 | { | |
1513 | struct iwl_mvm *mvm = _data; | |
1514 | u32 flags = CMD_ASYNC | CMD_HIGH_PRIO; | |
1515 | ||
1516 | IWL_DEBUG_RPM(mvm, "exiting D0i3 - vif %pM\n", vif->addr); | |
1517 | if (vif->type != NL80211_IFTYPE_STATION || | |
1518 | !vif->bss_conf.assoc) | |
1519 | return; | |
1520 | ||
1521 | iwl_mvm_update_d0i3_power_mode(mvm, vif, false, flags); | |
1522 | } | |
1523 | ||
a3f7ba5c | 1524 | struct iwl_mvm_d0i3_exit_work_iter_data { |
b3df2247 | 1525 | struct iwl_mvm *mvm; |
a3f7ba5c | 1526 | struct iwl_wowlan_status *status; |
b3df2247 DS |
1527 | u32 wakeup_reasons; |
1528 | }; | |
1529 | ||
a3f7ba5c EP |
1530 | static void iwl_mvm_d0i3_exit_work_iter(void *_data, u8 *mac, |
1531 | struct ieee80211_vif *vif) | |
37577fe2 | 1532 | { |
a3f7ba5c | 1533 | struct iwl_mvm_d0i3_exit_work_iter_data *data = _data; |
37577fe2 | 1534 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); |
a3f7ba5c | 1535 | u32 reasons = data->wakeup_reasons; |
37577fe2 | 1536 | |
a3f7ba5c EP |
1537 | /* consider only the relevant station interface */ |
1538 | if (vif->type != NL80211_IFTYPE_STATION || !vif->bss_conf.assoc || | |
1539 | data->mvm->d0i3_ap_sta_id != mvmvif->ap_sta_id) | |
1540 | return; | |
1541 | ||
1542 | if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_DEAUTH) | |
1543 | iwl_mvm_connection_loss(data->mvm, vif, "D0i3"); | |
1544 | else if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_MISSED_BEACON) | |
1545 | ieee80211_beacon_loss(vif); | |
1546 | else | |
1547 | iwl_mvm_d0i3_update_keys(data->mvm, vif, data->status); | |
37577fe2 EP |
1548 | } |
1549 | ||
b2492501 AN |
1550 | void iwl_mvm_d0i3_enable_tx(struct iwl_mvm *mvm, __le16 *qos_seq) |
1551 | { | |
1552 | struct ieee80211_sta *sta = NULL; | |
1553 | struct iwl_mvm_sta *mvm_ap_sta; | |
1554 | int i; | |
1555 | bool wake_queues = false; | |
1556 | ||
1557 | lockdep_assert_held(&mvm->mutex); | |
1558 | ||
1559 | spin_lock_bh(&mvm->d0i3_tx_lock); | |
1560 | ||
0ae98812 | 1561 | if (mvm->d0i3_ap_sta_id == IWL_MVM_INVALID_STA) |
b2492501 AN |
1562 | goto out; |
1563 | ||
1564 | IWL_DEBUG_RPM(mvm, "re-enqueue packets\n"); | |
1565 | ||
1566 | /* get the sta in order to update seq numbers and re-enqueue skbs */ | |
1567 | sta = rcu_dereference_protected( | |
1568 | mvm->fw_id_to_mac_id[mvm->d0i3_ap_sta_id], | |
1569 | lockdep_is_held(&mvm->mutex)); | |
1570 | ||
1571 | if (IS_ERR_OR_NULL(sta)) { | |
1572 | sta = NULL; | |
1573 | goto out; | |
1574 | } | |
1575 | ||
1576 | if (mvm->d0i3_offloading && qos_seq) { | |
1577 | /* update qos seq numbers if offloading was enabled */ | |
9d8ce6af | 1578 | mvm_ap_sta = iwl_mvm_sta_from_mac80211(sta); |
b2492501 AN |
1579 | for (i = 0; i < IWL_MAX_TID_COUNT; i++) { |
1580 | u16 seq = le16_to_cpu(qos_seq[i]); | |
1581 | /* firmware stores last-used one, we store next one */ | |
1582 | seq += 0x10; | |
1583 | mvm_ap_sta->tid_data[i].seq_number = seq; | |
1584 | } | |
1585 | } | |
1586 | out: | |
1587 | /* re-enqueue (or drop) all packets */ | |
1588 | while (!skb_queue_empty(&mvm->d0i3_tx)) { | |
1589 | struct sk_buff *skb = __skb_dequeue(&mvm->d0i3_tx); | |
1590 | ||
1591 | if (!sta || iwl_mvm_tx_skb(mvm, skb, sta)) | |
1592 | ieee80211_free_txskb(mvm->hw, skb); | |
1593 | ||
1594 | /* if the skb_queue is not empty, we need to wake queues */ | |
1595 | wake_queues = true; | |
1596 | } | |
1597 | clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status); | |
1598 | wake_up(&mvm->d0i3_exit_waitq); | |
0ae98812 | 1599 | mvm->d0i3_ap_sta_id = IWL_MVM_INVALID_STA; |
b2492501 AN |
1600 | if (wake_queues) |
1601 | ieee80211_wake_queues(mvm->hw); | |
1602 | ||
1603 | spin_unlock_bh(&mvm->d0i3_tx_lock); | |
1604 | } | |
1605 | ||
37577fe2 EP |
1606 | static void iwl_mvm_d0i3_exit_work(struct work_struct *wk) |
1607 | { | |
1608 | struct iwl_mvm *mvm = container_of(wk, struct iwl_mvm, d0i3_exit_work); | |
1609 | struct iwl_host_cmd get_status_cmd = { | |
1610 | .id = WOWLAN_GET_STATUSES, | |
a1022927 | 1611 | .flags = CMD_HIGH_PRIO | CMD_WANT_SKB, |
37577fe2 | 1612 | }; |
a3f7ba5c EP |
1613 | struct iwl_mvm_d0i3_exit_work_iter_data iter_data = { |
1614 | .mvm = mvm, | |
1615 | }; | |
1616 | ||
3afec639 | 1617 | struct iwl_wowlan_status *status; |
37577fe2 | 1618 | int ret; |
a3f7ba5c | 1619 | u32 wakeup_reasons = 0; |
b2492501 | 1620 | __le16 *qos_seq = NULL; |
37577fe2 EP |
1621 | |
1622 | mutex_lock(&mvm->mutex); | |
1623 | ret = iwl_mvm_send_cmd(mvm, &get_status_cmd); | |
1624 | if (ret) | |
1625 | goto out; | |
1626 | ||
37577fe2 EP |
1627 | status = (void *)get_status_cmd.resp_pkt->data; |
1628 | wakeup_reasons = le32_to_cpu(status->wakeup_reasons); | |
b2492501 | 1629 | qos_seq = status->qos_seq_ctr; |
37577fe2 EP |
1630 | |
1631 | IWL_DEBUG_RPM(mvm, "wakeup reasons: 0x%x\n", wakeup_reasons); | |
1632 | ||
a3f7ba5c EP |
1633 | iter_data.wakeup_reasons = wakeup_reasons; |
1634 | iter_data.status = status; | |
1635 | ieee80211_iterate_active_interfaces(mvm->hw, | |
1636 | IEEE80211_IFACE_ITER_NORMAL, | |
1637 | iwl_mvm_d0i3_exit_work_iter, | |
1638 | &iter_data); | |
37577fe2 | 1639 | out: |
b2492501 | 1640 | iwl_mvm_d0i3_enable_tx(mvm, qos_seq); |
47c8b154 | 1641 | |
7c014e35 EP |
1642 | IWL_DEBUG_INFO(mvm, "d0i3 exit completed (wakeup reasons: 0x%x)\n", |
1643 | wakeup_reasons); | |
1644 | ||
e5629be7 EP |
1645 | /* qos_seq might point inside resp_pkt, so free it only now */ |
1646 | if (get_status_cmd.resp_pkt) | |
1647 | iwl_free_resp(&get_status_cmd); | |
1648 | ||
47c8b154 JD |
1649 | /* the FW might have updated the regdomain */ |
1650 | iwl_mvm_update_changed_regdom(mvm); | |
1651 | ||
d15a747f | 1652 | iwl_mvm_unref(mvm, IWL_MVM_REF_EXIT_WORK); |
37577fe2 EP |
1653 | mutex_unlock(&mvm->mutex); |
1654 | } | |
1655 | ||
d15a747f | 1656 | int _iwl_mvm_exit_d0i3(struct iwl_mvm *mvm) |
b3370d47 | 1657 | { |
98ee7783 AN |
1658 | u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE | |
1659 | CMD_WAKE_UP_TRANS; | |
d6230972 | 1660 | int ret; |
b3370d47 EP |
1661 | |
1662 | IWL_DEBUG_RPM(mvm, "MVM exiting D0i3\n"); | |
98ee7783 | 1663 | |
08f0d23d EP |
1664 | if (WARN_ON_ONCE(mvm->cur_ucode != IWL_UCODE_REGULAR)) |
1665 | return -EINVAL; | |
1666 | ||
d15a747f EP |
1667 | mutex_lock(&mvm->d0i3_suspend_mutex); |
1668 | if (test_bit(D0I3_DEFER_WAKEUP, &mvm->d0i3_suspend_flags)) { | |
1669 | IWL_DEBUG_RPM(mvm, "Deferring d0i3 exit until resume\n"); | |
1670 | __set_bit(D0I3_PENDING_WAKEUP, &mvm->d0i3_suspend_flags); | |
1671 | mutex_unlock(&mvm->d0i3_suspend_mutex); | |
1672 | return 0; | |
1673 | } | |
1674 | mutex_unlock(&mvm->d0i3_suspend_mutex); | |
1675 | ||
d6230972 EP |
1676 | ret = iwl_mvm_send_cmd_pdu(mvm, D0I3_END_CMD, flags, 0, NULL); |
1677 | if (ret) | |
37577fe2 | 1678 | goto out; |
d6230972 EP |
1679 | |
1680 | ieee80211_iterate_active_interfaces_atomic(mvm->hw, | |
1681 | IEEE80211_IFACE_ITER_NORMAL, | |
1682 | iwl_mvm_exit_d0i3_iterator, | |
1683 | mvm); | |
37577fe2 EP |
1684 | out: |
1685 | schedule_work(&mvm->d0i3_exit_work); | |
1686 | return ret; | |
b3370d47 EP |
1687 | } |
1688 | ||
6735943f | 1689 | int iwl_mvm_exit_d0i3(struct iwl_op_mode *op_mode) |
d15a747f EP |
1690 | { |
1691 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
1692 | ||
1693 | iwl_mvm_ref(mvm, IWL_MVM_REF_EXIT_WORK); | |
1694 | return _iwl_mvm_exit_d0i3(mvm); | |
1695 | } | |
1696 | ||
0316d30e JB |
1697 | #define IWL_MVM_COMMON_OPS \ |
1698 | /* these could be differentiated */ \ | |
156f92f2 | 1699 | .async_cb = iwl_mvm_async_cb, \ |
0316d30e JB |
1700 | .queue_full = iwl_mvm_stop_sw_queue, \ |
1701 | .queue_not_full = iwl_mvm_wake_sw_queue, \ | |
1702 | .hw_rf_kill = iwl_mvm_set_hw_rfkill_state, \ | |
1703 | .free_skb = iwl_mvm_free_skb, \ | |
1704 | .nic_error = iwl_mvm_nic_error, \ | |
1705 | .cmd_queue_full = iwl_mvm_cmd_queue_full, \ | |
1706 | .nic_config = iwl_mvm_nic_config, \ | |
1707 | .enter_d0i3 = iwl_mvm_enter_d0i3, \ | |
1708 | .exit_d0i3 = iwl_mvm_exit_d0i3, \ | |
1709 | /* as we only register one, these MUST be common! */ \ | |
1710 | .start = iwl_op_mode_mvm_start, \ | |
1711 | .stop = iwl_op_mode_mvm_stop | |
1712 | ||
8ca151b5 | 1713 | static const struct iwl_op_mode_ops iwl_mvm_ops = { |
0316d30e JB |
1714 | IWL_MVM_COMMON_OPS, |
1715 | .rx = iwl_mvm_rx, | |
1716 | }; | |
1717 | ||
1718 | static void iwl_mvm_rx_mq_rss(struct iwl_op_mode *op_mode, | |
1719 | struct napi_struct *napi, | |
1720 | struct iwl_rx_cmd_buffer *rxb, | |
1721 | unsigned int queue) | |
1722 | { | |
1723 | struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); | |
585a6fcc | 1724 | struct iwl_rx_packet *pkt = rxb_addr(rxb); |
61b0f5d7 | 1725 | u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd); |
0316d30e | 1726 | |
61b0f5d7 | 1727 | if (unlikely(cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE))) |
a338384b | 1728 | iwl_mvm_rx_frame_release(mvm, napi, rxb, queue); |
61b0f5d7 JB |
1729 | else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP, |
1730 | RX_QUEUES_NOTIFICATION))) | |
94bb4481 | 1731 | iwl_mvm_rx_queue_notif(mvm, rxb, queue); |
61b0f5d7 | 1732 | else if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD))) |
585a6fcc | 1733 | iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, queue); |
0316d30e JB |
1734 | } |
1735 | ||
1736 | static const struct iwl_op_mode_ops iwl_mvm_ops_mq = { | |
1737 | IWL_MVM_COMMON_OPS, | |
1738 | .rx = iwl_mvm_rx_mq, | |
1739 | .rx_rss = iwl_mvm_rx_mq_rss, | |
8ca151b5 | 1740 | }; |