iwlwifi: Read the correct addresses when getting the crf id
[linux-2.6-block.git] / drivers / net / wireless / intel / iwlwifi / mvm / fw.c
CommitLineData
8e99ea8d
JB
1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2/*
4f7411d6 3 * Copyright (C) 2012-2014, 2018-2021 Intel Corporation
8e99ea8d
JB
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
8ca151b5 7#include <net/mac80211.h>
854d773e 8#include <linux/netdevice.h>
a2ac0f48 9#include <linux/dmi.h>
8ca151b5
JB
10
11#include "iwl-trans.h"
12#include "iwl-op-mode.h"
d962f9b1 13#include "fw/img.h"
8ca151b5
JB
14#include "iwl-debug.h"
15#include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
16#include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
8c23f95c 17#include "iwl-prph.h"
813df5ce 18#include "fw/acpi.h"
b3e4c0f3 19#include "fw/pnvm.h"
8ca151b5
JB
20
21#include "mvm.h"
7174beb6 22#include "fw/dbg.h"
8ca151b5 23#include "iwl-phy-db.h"
9c4f7d51
ST
24#include "iwl-modparams.h"
25#include "iwl-nvm-parse.h"
8ca151b5 26
b3e4c0f3
LC
27#define MVM_UCODE_ALIVE_TIMEOUT (HZ)
28#define MVM_UCODE_CALIB_TIMEOUT (2 * HZ)
8ca151b5
JB
29
30#define UCODE_VALID_OK cpu_to_le32(0x1)
31
e12cfc7b
MK
32#define IWL_PPAG_MASK 3
33#define IWL_PPAG_ETSI_MASK BIT(0)
34
8ca151b5
JB
35struct iwl_mvm_alive_data {
36 bool valid;
37 u32 scd_base_addr;
38};
39
8ca151b5
JB
40static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
41{
42 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
43 .valid = cpu_to_le32(valid_tx_ant),
44 };
45
33223542 46 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
a1022927 47 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
8ca151b5
JB
48 sizeof(tx_ant_cmd), &tx_ant_cmd);
49}
50
43413a97
SS
51static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
52{
53 int i;
54 struct iwl_rss_config_cmd cmd = {
55 .flags = cpu_to_le32(IWL_RSS_ENABLE),
608dce95
SS
56 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
57 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
58 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
59 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
60 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
61 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
43413a97
SS
62 };
63
f43495fd
SS
64 if (mvm->trans->num_rx_queues == 1)
65 return 0;
66
854d773e 67 /* Do not direct RSS traffic to Q 0 which is our fallback queue */
43413a97 68 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
854d773e
SS
69 cmd.indirection_table[i] =
70 1 + (i % (mvm->trans->num_rx_queues - 1));
71 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
43413a97
SS
72
73 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
74}
75
97d5be7e
LK
76static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
77{
78 struct iwl_dqa_enable_cmd dqa_cmd = {
79 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
80 };
81 u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
82 int ret;
83
84 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
85 if (ret)
86 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
87 else
88 IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
89
90 return ret;
91}
92
bdccdb85
GBA
93void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
94 struct iwl_rx_cmd_buffer *rxb)
95{
96 struct iwl_rx_packet *pkt = rxb_addr(rxb);
97 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
98 __le32 *dump_data = mfu_dump_notif->data;
99 int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
100 int i;
101
102 if (mfu_dump_notif->index_num == 0)
103 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
104 le32_to_cpu(mfu_dump_notif->assert_id));
105
106 for (i = 0; i < n_words; i++)
107 IWL_DEBUG_INFO(mvm,
108 "MFUART assert dump, dword %u: 0x%08x\n",
109 le16_to_cpu(mfu_dump_notif->index_num) *
110 n_words + i,
111 le32_to_cpu(dump_data[i]));
112}
113
8ca151b5
JB
114static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
115 struct iwl_rx_packet *pkt, void *data)
116{
fd1c3318 117 unsigned int pkt_len = iwl_rx_packet_payload_len(pkt);
8ca151b5
JB
118 struct iwl_mvm *mvm =
119 container_of(notif_wait, struct iwl_mvm, notif_wait);
120 struct iwl_mvm_alive_data *alive_data = data;
5c228d63
SS
121 struct iwl_umac_alive *umac;
122 struct iwl_lmac_alive *lmac1;
123 struct iwl_lmac_alive *lmac2 = NULL;
124 u16 status;
cfa5d0ca 125 u32 lmac_error_event_table, umac_error_table;
708d8c53
JB
126 u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP,
127 UCODE_ALIVE_NTFY, 0);
01a9ca51 128
90824f2f
LC
129 /*
130 * For v5 and above, we can check the version, for older
131 * versions we need to check the size.
132 */
708d8c53
JB
133 if (version == 5 || version == 6) {
134 /* v5 and v6 are compatible (only IMR addition) */
90824f2f
LC
135 struct iwl_alive_ntf_v5 *palive;
136
fd1c3318
JB
137 if (pkt_len < sizeof(*palive))
138 return false;
139
90824f2f
LC
140 palive = (void *)pkt->data;
141 umac = &palive->umac_data;
142 lmac1 = &palive->lmac_data[0];
143 lmac2 = &palive->lmac_data[1];
144 status = le16_to_cpu(palive->status);
145
146 mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]);
147 mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]);
148 mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]);
149
150 IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n",
151 mvm->trans->sku_id[0],
152 mvm->trans->sku_id[1],
153 mvm->trans->sku_id[2]);
154 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) {
9422b978
LC
155 struct iwl_alive_ntf_v4 *palive;
156
fd1c3318
JB
157 if (pkt_len < sizeof(*palive))
158 return false;
159
5c228d63
SS
160 palive = (void *)pkt->data;
161 umac = &palive->umac_data;
162 lmac1 = &palive->lmac_data[0];
163 lmac2 = &palive->lmac_data[1];
164 status = le16_to_cpu(palive->status);
9422b978
LC
165 } else if (iwl_rx_packet_payload_len(pkt) ==
166 sizeof(struct iwl_alive_ntf_v3)) {
167 struct iwl_alive_ntf_v3 *palive3;
168
fd1c3318
JB
169 if (pkt_len < sizeof(*palive3))
170 return false;
171
5c228d63
SS
172 palive3 = (void *)pkt->data;
173 umac = &palive3->umac_data;
174 lmac1 = &palive3->lmac_data;
175 status = le16_to_cpu(palive3->status);
9422b978
LC
176 } else {
177 WARN(1, "unsupported alive notification (size %d)\n",
178 iwl_rx_packet_payload_len(pkt));
179 /* get timeout later */
180 return false;
5c228d63 181 }
01a9ca51 182
22463857
SM
183 lmac_error_event_table =
184 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
185 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
186
5c228d63 187 if (lmac2)
91c28b83 188 mvm->trans->dbg.lmac_error_event_table[1] =
22463857 189 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
ffa70264 190
4f7411d6
RG
191 umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) &
192 ~FW_ADDR_CACHE_CONTROL;
cfa5d0ca
MG
193
194 if (umac_error_table) {
195 if (umac_error_table >=
196 mvm->trans->cfg->min_umac_error_event_table) {
197 iwl_fw_umac_set_alive_err_table(mvm->trans,
198 umac_error_table);
199 } else {
200 IWL_ERR(mvm,
201 "Not valid error log pointer 0x%08X for %s uCode\n",
202 umac_error_table,
203 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
204 "Init" : "RT");
205 }
3485e76e 206 }
fb5b2846 207
22463857 208 alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr);
5c228d63 209 alive_data->valid = status == IWL_ALIVE_STATUS_OK;
7e1223b5 210
5c228d63
SS
211 IWL_DEBUG_FW(mvm,
212 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
213 status, lmac1->ver_type, lmac1->ver_subtype);
7e1223b5 214
5c228d63
SS
215 if (lmac2)
216 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
7e1223b5 217
5c228d63
SS
218 IWL_DEBUG_FW(mvm,
219 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
220 le32_to_cpu(umac->umac_major),
221 le32_to_cpu(umac->umac_minor));
8ca151b5 222
0a3a3e9e
SM
223 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
224
8ca151b5
JB
225 return true;
226}
227
1f370650
SS
228static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
229 struct iwl_rx_packet *pkt, void *data)
230{
231 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
232
233 return true;
234}
235
8ca151b5
JB
236static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
237 struct iwl_rx_packet *pkt, void *data)
238{
239 struct iwl_phy_db *phy_db = data;
240
241 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
242 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
243 return true;
244 }
245
ce1f2778 246 WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
8ca151b5
JB
247
248 return false;
249}
250
251static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
252 enum iwl_ucode_type ucode_type)
253{
254 struct iwl_notification_wait alive_wait;
94a8d87c 255 struct iwl_mvm_alive_data alive_data = {};
8ca151b5 256 const struct fw_img *fw;
cfbc6c4c 257 int ret;
702e975d 258 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
9422b978 259 static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY };
b3500b47
EG
260 bool run_in_rfkill =
261 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
8ca151b5 262
61df750c 263 if (ucode_type == IWL_UCODE_REGULAR &&
3d2d4422
GBA
264 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
265 !(fw_has_capa(&mvm->fw->ucode_capa,
266 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
612da1ef 267 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
61df750c 268 else
612da1ef 269 fw = iwl_get_ucode_image(mvm->fw, ucode_type);
befe9b6f 270 if (WARN_ON(!fw))
8ca151b5 271 return -EINVAL;
702e975d 272 iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
65b280fe 273 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
8ca151b5
JB
274
275 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
276 alive_cmd, ARRAY_SIZE(alive_cmd),
277 iwl_alive_fn, &alive_data);
278
b3500b47
EG
279 /*
280 * We want to load the INIT firmware even in RFKILL
281 * For the unified firmware case, the ucode_type is not
282 * INIT, but we still need to run it.
283 */
284 ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill);
8ca151b5 285 if (ret) {
702e975d 286 iwl_fw_set_current_image(&mvm->fwrt, old_type);
8ca151b5
JB
287 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
288 return ret;
289 }
290
291 /*
292 * Some things may run in the background now, but we
293 * just wait for the ALIVE notification here.
294 */
295 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
296 MVM_UCODE_ALIVE_TIMEOUT);
297 if (ret) {
d6be9c1d
SS
298 struct iwl_trans *trans = mvm->trans;
299
5667ccc2 300 /* SecBoot info */
20f5aef5
JB
301 if (trans->trans_cfg->device_family >=
302 IWL_DEVICE_FAMILY_22000) {
d6be9c1d
SS
303 IWL_ERR(mvm,
304 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
ea695b7c
ST
305 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
306 iwl_read_umac_prph(trans,
307 UMAG_SB_CPU_2_STATUS));
5667ccc2
MG
308 } else if (trans->trans_cfg->device_family >=
309 IWL_DEVICE_FAMILY_8000) {
310 IWL_ERR(mvm,
311 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
312 iwl_read_prph(trans, SB_CPU_1_STATUS),
313 iwl_read_prph(trans, SB_CPU_2_STATUS));
314 }
315
316 /* LMAC/UMAC PC info */
317 if (trans->trans_cfg->device_family >=
318 IWL_DEVICE_FAMILY_9000) {
20f5aef5
JB
319 IWL_ERR(mvm, "UMAC PC: 0x%x\n",
320 iwl_read_umac_prph(trans,
321 UREG_UMAC_CURRENT_PC));
322 IWL_ERR(mvm, "LMAC PC: 0x%x\n",
323 iwl_read_umac_prph(trans,
324 UREG_LMAC1_CURRENT_PC));
325 if (iwl_mvm_is_cdb_supported(mvm))
326 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
327 iwl_read_umac_prph(trans,
328 UREG_LMAC2_CURRENT_PC));
20f5aef5
JB
329 }
330
331 if (ret == -ETIMEDOUT)
332 iwl_fw_dbg_error_collect(&mvm->fwrt,
333 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
334
702e975d 335 iwl_fw_set_current_image(&mvm->fwrt, old_type);
8ca151b5
JB
336 return ret;
337 }
338
339 if (!alive_data.valid) {
340 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
702e975d 341 iwl_fw_set_current_image(&mvm->fwrt, old_type);
8ca151b5
JB
342 return -EIO;
343 }
344
b3e4c0f3 345 ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait);
70d3ca86
LC
346 if (ret) {
347 IWL_ERR(mvm, "Timeout waiting for PNVM load!\n");
348 iwl_fw_set_current_image(&mvm->fwrt, old_type);
349 return ret;
350 }
351
8ca151b5
JB
352 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
353
354 /*
355 * Note: all the queues are enabled as part of the interface
356 * initialization, but in firmware restart scenarios they
357 * could be stopped, so wake them up. In firmware restart,
358 * mac80211 will have the queues stopped as well until the
359 * reconfiguration completes. During normal startup, they
360 * will be empty.
361 */
362
4ecafae9 363 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
1c14089e
JB
364 /*
365 * Set a 'fake' TID for the command queue, since we use the
366 * hweight() of the tid_bitmap as a refcount now. Not that
367 * we ever even consider the command queue as one we might
368 * want to reuse, but be safe nevertheless.
369 */
370 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
371 BIT(IWL_MAX_TID_COUNT + 2);
8ca151b5 372
65b280fe 373 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
f7805b33
LC
374#ifdef CONFIG_IWLWIFI_DEBUGFS
375 iwl_fw_set_dbg_rec_on(&mvm->fwrt);
376#endif
8ca151b5 377
d3d9b4fc
EG
378 /*
379 * All the BSSes in the BSS table include the GP2 in the system
380 * at the beacon Rx time, this is of course no longer relevant
381 * since we are resetting the firmware.
382 * Purge all the BSS table.
383 */
384 cfg80211_bss_flush(mvm->hw->wiphy);
385
8ca151b5
JB
386 return 0;
387}
8ca151b5 388
52b15521 389static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm)
8c5f47b1
JB
390{
391 struct iwl_notification_wait init_wait;
392 struct iwl_nvm_access_complete_cmd nvm_complete = {};
393 struct iwl_init_extended_cfg_cmd init_cfg = {
394 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
395 };
396 static const u16 init_complete[] = {
397 INIT_COMPLETE_NOTIF,
398 };
399 int ret;
400
a4584729
HD
401 if (mvm->trans->cfg->tx_with_siso_diversity)
402 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
403
8c5f47b1
JB
404 lockdep_assert_held(&mvm->mutex);
405
94022562
EG
406 mvm->rfkill_safe_init_done = false;
407
8c5f47b1
JB
408 iwl_init_notification_wait(&mvm->notif_wait,
409 &init_wait,
410 init_complete,
411 ARRAY_SIZE(init_complete),
412 iwl_wait_init_complete,
413 NULL);
414
b108d8c7 415 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
86ce5c74 416
8c5f47b1
JB
417 /* Will also start the device */
418 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
419 if (ret) {
420 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
421 goto error;
422 }
b108d8c7
SM
423 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
424 NULL);
8c5f47b1
JB
425
426 /* Send init config command to mark that we are sending NVM access
427 * commands
428 */
429 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
b3500b47
EG
430 INIT_EXTENDED_CFG_CMD),
431 CMD_SEND_IN_RFKILL,
8c5f47b1
JB
432 sizeof(init_cfg), &init_cfg);
433 if (ret) {
434 IWL_ERR(mvm, "Failed to run init config command: %d\n",
435 ret);
436 goto error;
437 }
438
e9e1ba3d
SS
439 /* Load NVM to NIC if needed */
440 if (mvm->nvm_file_name) {
9ce505fe
AN
441 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
442 mvm->nvm_sections);
443 if (ret)
444 goto error;
445 ret = iwl_mvm_load_nvm_to_nic(mvm);
446 if (ret)
447 goto error;
e9e1ba3d 448 }
8c5f47b1 449
52b15521 450 if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
5bd1d2c1 451 ret = iwl_nvm_init(mvm);
d4f3695e
SS
452 if (ret) {
453 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
454 goto error;
455 }
456 }
457
8c5f47b1 458 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
b3500b47
EG
459 NVM_ACCESS_COMPLETE),
460 CMD_SEND_IN_RFKILL,
8c5f47b1
JB
461 sizeof(nvm_complete), &nvm_complete);
462 if (ret) {
463 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
464 ret);
465 goto error;
466 }
467
468 /* We wait for the INIT complete notification */
e9e1ba3d
SS
469 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
470 MVM_UCODE_ALIVE_TIMEOUT);
471 if (ret)
472 return ret;
473
474 /* Read the NVM only at driver load time, no need to do this twice */
52b15521 475 if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
4c625c56 476 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
c135cb56
ST
477 if (IS_ERR(mvm->nvm_data)) {
478 ret = PTR_ERR(mvm->nvm_data);
479 mvm->nvm_data = NULL;
e9e1ba3d
SS
480 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
481 return ret;
482 }
483 }
484
b3500b47
EG
485 mvm->rfkill_safe_init_done = true;
486
e9e1ba3d 487 return 0;
8c5f47b1
JB
488
489error:
490 iwl_remove_notification(&mvm->notif_wait, &init_wait);
491 return ret;
492}
493
c4ace426
GA
494#ifdef CONFIG_ACPI
495static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
496 struct iwl_phy_specific_cfg *phy_filters)
497{
498 /*
499 * TODO: read specific phy config from BIOS
500 * ACPI table for this feature has not been defined yet,
501 * so for now we use hardcoded values.
502 */
503
504 if (IWL_MVM_PHY_FILTER_CHAIN_A) {
505 phy_filters->filter_cfg_chain_a =
506 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A);
507 }
508 if (IWL_MVM_PHY_FILTER_CHAIN_B) {
509 phy_filters->filter_cfg_chain_b =
510 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B);
511 }
512 if (IWL_MVM_PHY_FILTER_CHAIN_C) {
513 phy_filters->filter_cfg_chain_c =
514 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C);
515 }
516 if (IWL_MVM_PHY_FILTER_CHAIN_D) {
517 phy_filters->filter_cfg_chain_d =
518 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D);
519 }
520}
c4ace426
GA
521#else /* CONFIG_ACPI */
522
523static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
524 struct iwl_phy_specific_cfg *phy_filters)
525{
526}
527#endif /* CONFIG_ACPI */
528
c593d2fa
AB
529#if defined(CONFIG_ACPI) && defined(CONFIG_EFI)
530static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
531{
532 u8 cmd_ver;
533 int ret;
534 struct iwl_host_cmd cmd = {
535 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
536 SAR_OFFSET_MAPPING_TABLE_CMD),
537 .flags = 0,
538 .data[0] = &mvm->fwrt.sgom_table,
539 .len[0] = sizeof(mvm->fwrt.sgom_table),
540 .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
541 };
542
543 if (!mvm->fwrt.sgom_enabled) {
544 IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n");
545 return 0;
546 }
547
548 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, REGULATORY_AND_NVM_GROUP,
549 SAR_OFFSET_MAPPING_TABLE_CMD,
550 IWL_FW_CMD_VER_UNKNOWN);
551
552 if (cmd_ver != 2) {
553 IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n",
554 cmd_ver);
555 return 0;
556 }
557
558 ret = iwl_mvm_send_cmd(mvm, &cmd);
559 if (ret < 0)
560 IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret);
561
562 return ret;
563}
564#else
565
566static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
567{
568 return 0;
569}
570#endif
571
8ca151b5
JB
572static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
573{
c4ace426 574 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd;
702e975d 575 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
c4ace426
GA
576 struct iwl_phy_specific_cfg phy_filters = {};
577 u8 cmd_ver;
578 size_t cmd_size;
8ca151b5 579
bb99ff9b 580 if (iwl_mvm_has_unified_ucode(mvm) &&
d923b020 581 !mvm->trans->cfg->tx_with_siso_diversity)
bb99ff9b 582 return 0;
d923b020
LC
583
584 if (mvm->trans->cfg->tx_with_siso_diversity) {
bb99ff9b
LC
585 /*
586 * TODO: currently we don't set the antenna but letting the NIC
587 * to decide which antenna to use. This should come from BIOS.
588 */
589 phy_cfg_cmd.phy_cfg =
590 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED);
591 }
592
8ca151b5 593 /* Set parameters */
a0544272 594 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
86a2b204
LC
595
596 /* set flags extra PHY configuration flags from the device's cfg */
7897dfa2
LC
597 phy_cfg_cmd.phy_cfg |=
598 cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags);
86a2b204 599
8ca151b5
JB
600 phy_cfg_cmd.calib_control.event_trigger =
601 mvm->fw->default_calib[ucode_type].event_trigger;
602 phy_cfg_cmd.calib_control.flow_trigger =
603 mvm->fw->default_calib[ucode_type].flow_trigger;
604
c4ace426 605 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP,
e80bfd11
MG
606 PHY_CONFIGURATION_CMD,
607 IWL_FW_CMD_VER_UNKNOWN);
c4ace426
GA
608 if (cmd_ver == 3) {
609 iwl_mvm_phy_filter_init(mvm, &phy_filters);
610 memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters,
611 sizeof(struct iwl_phy_specific_cfg));
612 }
613
8ca151b5
JB
614 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
615 phy_cfg_cmd.phy_cfg);
c4ace426
GA
616 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) :
617 sizeof(struct iwl_phy_cfg_cmd_v1);
a1022927 618 return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
c4ace426 619 cmd_size, &phy_cfg_cmd);
8ca151b5
JB
620}
621
3b25f1af 622int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm)
8ca151b5
JB
623{
624 struct iwl_notification_wait calib_wait;
6eb031d2 625 static const u16 init_complete[] = {
8ca151b5
JB
626 INIT_COMPLETE_NOTIF,
627 CALIB_RES_NOTIF_PHY_DB
628 };
629 int ret;
630
7d6222e2 631 if (iwl_mvm_has_unified_ucode(mvm))
52b15521 632 return iwl_run_unified_mvm_ucode(mvm);
8c5f47b1 633
8ca151b5
JB
634 lockdep_assert_held(&mvm->mutex);
635
94022562 636 mvm->rfkill_safe_init_done = false;
8ca151b5
JB
637
638 iwl_init_notification_wait(&mvm->notif_wait,
639 &calib_wait,
640 init_complete,
641 ARRAY_SIZE(init_complete),
642 iwl_wait_phy_db_entry,
643 mvm->phy_db);
644
11f8c533
LC
645 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
646
8ca151b5
JB
647 /* Will also start the device */
648 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
649 if (ret) {
650 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
00e0c6c8 651 goto remove_notif;
8ca151b5
JB
652 }
653
7d34a7d7 654 if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
b3de3ef4
EG
655 ret = iwl_mvm_send_bt_init_conf(mvm);
656 if (ret)
00e0c6c8 657 goto remove_notif;
b3de3ef4 658 }
931d4160 659
81a67e32 660 /* Read the NVM only at driver load time, no need to do this twice */
3b25f1af 661 if (!mvm->nvm_data) {
5bd1d2c1 662 ret = iwl_nvm_init(mvm);
8ca151b5
JB
663 if (ret) {
664 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
00e0c6c8 665 goto remove_notif;
8ca151b5
JB
666 }
667 }
668
81a67e32 669 /* In case we read the NVM from external file, load it to the NIC */
9ce505fe
AN
670 if (mvm->nvm_file_name) {
671 ret = iwl_mvm_load_nvm_to_nic(mvm);
672 if (ret)
673 goto remove_notif;
674 }
81a67e32 675
64866e5d
LC
676 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
677 "Too old NVM version (0x%0x, required = 0x%0x)",
678 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
8ca151b5 679
4f59334b
EH
680 /*
681 * abort after reading the nvm in case RF Kill is on, we will complete
682 * the init seq later when RF kill will switch to off
683 */
1a3fe0b2 684 if (iwl_mvm_is_radio_hw_killed(mvm)) {
4f59334b
EH
685 IWL_DEBUG_RF_KILL(mvm,
686 "jump over all phy activities due to RF kill\n");
00e0c6c8 687 goto remove_notif;
4f59334b
EH
688 }
689
b3500b47 690 mvm->rfkill_safe_init_done = true;
31b8b343 691
e07cbb53 692 /* Send TX valid antennas before triggering calibrations */
a0544272 693 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
e07cbb53 694 if (ret)
00e0c6c8 695 goto remove_notif;
e07cbb53 696
8ca151b5
JB
697 ret = iwl_send_phy_cfg_cmd(mvm);
698 if (ret) {
699 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
700 ret);
00e0c6c8 701 goto remove_notif;
8ca151b5
JB
702 }
703
704 /*
705 * Some things may run in the background now, but we
706 * just wait for the calibration complete notification.
707 */
708 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
00e0c6c8
LC
709 MVM_UCODE_CALIB_TIMEOUT);
710 if (!ret)
711 goto out;
31b8b343 712
00e0c6c8 713 if (iwl_mvm_is_radio_hw_killed(mvm)) {
31b8b343 714 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
00e0c6c8
LC
715 ret = 0;
716 } else {
717 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
718 ret);
31b8b343 719 }
00e0c6c8 720
8ca151b5
JB
721 goto out;
722
00e0c6c8 723remove_notif:
8ca151b5
JB
724 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
725out:
b3500b47 726 mvm->rfkill_safe_init_done = false;
a4082843 727 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
8ca151b5
JB
728 /* we want to debug INIT and we have no NVM - fake */
729 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
730 sizeof(struct ieee80211_channel) +
731 sizeof(struct ieee80211_rate),
732 GFP_KERNEL);
733 if (!mvm->nvm_data)
734 return -ENOMEM;
8ca151b5
JB
735 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
736 mvm->nvm_data->bands[0].n_channels = 1;
737 mvm->nvm_data->bands[0].n_bitrates = 1;
738 mvm->nvm_data->bands[0].bitrates =
739 (void *)mvm->nvm_data->channels + 1;
740 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
741 }
742
743 return ret;
744}
745
84bfffa9
EG
746static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
747{
748 struct iwl_ltr_config_cmd cmd = {
749 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
750 };
751
752 if (!mvm->trans->ltr_enabled)
753 return 0;
754
84bfffa9
EG
755 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
756 sizeof(cmd), &cmd);
757}
758
c386dacb 759#ifdef CONFIG_ACPI
42ce76d6 760int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
da2830ac 761{
216cdfb5
LC
762 struct iwl_dev_tx_power_cmd cmd = {
763 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
71e9378b 764 };
9c08cef8 765 __le16 *per_chain;
1edd56e6 766 int ret;
39c1a972 767 u16 len = 0;
fbb7957d
LC
768 u32 n_subbands;
769 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
e80bfd11
MG
770 REDUCE_TX_POWER_CMD,
771 IWL_FW_CMD_VER_UNKNOWN);
fbb7957d
LC
772
773 if (cmd_ver == 6) {
774 len = sizeof(cmd.v6);
775 n_subbands = IWL_NUM_SUB_BANDS_V2;
776 per_chain = cmd.v6.per_chain[0][0];
777 } else if (fw_has_api(&mvm->fw->ucode_capa,
778 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) {
0791c2fc 779 len = sizeof(cmd.v5);
e12cfc7b 780 n_subbands = IWL_NUM_SUB_BANDS_V1;
9c08cef8
LC
781 per_chain = cmd.v5.per_chain[0][0];
782 } else if (fw_has_capa(&mvm->fw->ucode_capa,
fbb7957d 783 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) {
216cdfb5 784 len = sizeof(cmd.v4);
e12cfc7b 785 n_subbands = IWL_NUM_SUB_BANDS_V1;
9c08cef8
LC
786 per_chain = cmd.v4.per_chain[0][0];
787 } else {
216cdfb5 788 len = sizeof(cmd.v3);
e12cfc7b 789 n_subbands = IWL_NUM_SUB_BANDS_V1;
9c08cef8
LC
790 per_chain = cmd.v3.per_chain[0][0];
791 }
55bfa4b9 792
216cdfb5
LC
793 /* all structs have the same common part, add it */
794 len += sizeof(cmd.common);
da2830ac 795
dac7171c
LC
796 ret = iwl_sar_select_profile(&mvm->fwrt, per_chain,
797 IWL_NUM_CHAIN_TABLES,
fbb7957d 798 n_subbands, prof_a, prof_b);
1edd56e6
LC
799
800 /* return on error or if the profile is disabled (positive number) */
801 if (ret)
802 return ret;
803
6d19a5eb
EG
804 iwl_mei_set_power_limit(per_chain);
805
42ce76d6 806 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
42ce76d6
LC
807 return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
808}
809
7fe90e0e
HD
810int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
811{
dd2a1256 812 union iwl_geo_tx_power_profiles_cmd geo_tx_cmd;
f604324e 813 struct iwl_geo_tx_power_profiles_resp *resp;
0c3d7282 814 u16 len;
39c1a972 815 int ret;
0c3d7282 816 struct iwl_host_cmd cmd;
e80bfd11 817 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP,
523de6c8 818 PER_CHAIN_LIMIT_OFFSET_CMD,
e80bfd11 819 IWL_FW_CMD_VER_UNKNOWN);
0c3d7282 820
dd2a1256
LC
821 /* the ops field is at the same spot for all versions, so set in v1 */
822 geo_tx_cmd.v1.ops =
823 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
824
97f8a3d1
AB
825 if (cmd_ver == 5)
826 len = sizeof(geo_tx_cmd.v5);
827 else if (cmd_ver == 4)
828 len = sizeof(geo_tx_cmd.v4);
829 else if (cmd_ver == 3)
0ea788ed
LC
830 len = sizeof(geo_tx_cmd.v3);
831 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
832 IWL_UCODE_TLV_API_SAR_TABLE_VER))
dd2a1256
LC
833 len = sizeof(geo_tx_cmd.v2);
834 else
835 len = sizeof(geo_tx_cmd.v1);
7fe90e0e 836
39c1a972
IZ
837 if (!iwl_sar_geo_support(&mvm->fwrt))
838 return -EOPNOTSUPP;
839
0c3d7282 840 cmd = (struct iwl_host_cmd){
523de6c8 841 .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD),
0c3d7282 842 .len = { len, },
7fe90e0e 843 .flags = CMD_WANT_SKB,
39c1a972 844 .data = { &geo_tx_cmd },
7fe90e0e
HD
845 };
846
847 ret = iwl_mvm_send_cmd(mvm, &cmd);
848 if (ret) {
849 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
850 return ret;
851 }
f604324e
LC
852
853 resp = (void *)cmd.resp_pkt->data;
854 ret = le32_to_cpu(resp->profile_idx);
855
97f8a3d1 856 if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES_REV3))
f604324e
LC
857 ret = -EIO;
858
7fe90e0e
HD
859 iwl_free_resp(&cmd);
860 return ret;
861}
862
a6bff3cb
HD
863static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
864{
dd2a1256 865 union iwl_geo_tx_power_profiles_cmd cmd;
39c1a972 866 u16 len;
45acebf8 867 u32 n_bands;
97f8a3d1 868 u32 n_profiles;
0433ae55 869 int ret;
e80bfd11 870 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP,
523de6c8 871 PER_CHAIN_LIMIT_OFFSET_CMD,
e80bfd11 872 IWL_FW_CMD_VER_UNKNOWN);
a6bff3cb 873
45acebf8
NG
874 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) !=
875 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) ||
876 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) !=
97f8a3d1
AB
877 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) ||
878 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) !=
879 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) ||
880 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) !=
881 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops));
882
dd2a1256
LC
883 /* the ops field is at the same spot for all versions, so set in v1 */
884 cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES);
0c3d7282 885
97f8a3d1
AB
886 if (cmd_ver == 5) {
887 len = sizeof(cmd.v5);
888 n_bands = ARRAY_SIZE(cmd.v5.table[0]);
889 n_profiles = ACPI_NUM_GEO_PROFILES_REV3;
890 } else if (cmd_ver == 4) {
891 len = sizeof(cmd.v4);
892 n_bands = ARRAY_SIZE(cmd.v4.table[0]);
893 n_profiles = ACPI_NUM_GEO_PROFILES_REV3;
894 } else if (cmd_ver == 3) {
0ea788ed 895 len = sizeof(cmd.v3);
45acebf8 896 n_bands = ARRAY_SIZE(cmd.v3.table[0]);
97f8a3d1 897 n_profiles = ACPI_NUM_GEO_PROFILES;
0ea788ed
LC
898 } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
899 IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
dd2a1256 900 len = sizeof(cmd.v2);
45acebf8 901 n_bands = ARRAY_SIZE(cmd.v2.table[0]);
97f8a3d1 902 n_profiles = ACPI_NUM_GEO_PROFILES;
39c1a972 903 } else {
dd2a1256 904 len = sizeof(cmd.v1);
45acebf8 905 n_bands = ARRAY_SIZE(cmd.v1.table[0]);
97f8a3d1 906 n_profiles = ACPI_NUM_GEO_PROFILES;
0c3d7282
HD
907 }
908
45acebf8
NG
909 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) !=
910 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) ||
911 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) !=
97f8a3d1
AB
912 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) ||
913 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) !=
914 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) ||
915 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) !=
916 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table));
45acebf8 917 /* the table is at the same position for all versions, so set use v1 */
97f8a3d1
AB
918 ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0],
919 n_bands, n_profiles);
45acebf8
NG
920
921 /*
922 * It is a valid scenario to not support SAR, or miss wgds table,
923 * but in that case there is no need to send the command.
924 */
925 if (ret)
926 return 0;
927
28db1862
LC
928 /*
929 * Set the revision on versions that contain it.
930 * This must be done after calling iwl_sar_geo_init().
931 */
97f8a3d1
AB
932 if (cmd_ver == 5)
933 cmd.v5.table_revision = cpu_to_le32(mvm->fwrt.geo_rev);
934 else if (cmd_ver == 4)
935 cmd.v4.table_revision = cpu_to_le32(mvm->fwrt.geo_rev);
936 else if (cmd_ver == 3)
28db1862
LC
937 cmd.v3.table_revision = cpu_to_le32(mvm->fwrt.geo_rev);
938 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
939 IWL_UCODE_TLV_API_SAR_TABLE_VER))
940 cmd.v2.table_revision = cpu_to_le32(mvm->fwrt.geo_rev);
941
dd2a1256 942 return iwl_mvm_send_cmd_pdu(mvm,
523de6c8
LC
943 WIDE_ID(PHY_OPS_GROUP,
944 PER_CHAIN_LIMIT_OFFSET_CMD),
dd2a1256 945 0, len, &cmd);
a6bff3cb
HD
946}
947
6ce1e5c0
GA
948static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm)
949{
e12cfc7b 950 union acpi_object *wifi_pkg, *data, *flags;
f2134f66 951 int i, j, ret, tbl_rev, num_sub_bands;
6ce1e5c0 952 int idx = 2;
f2134f66 953 s8 *gain;
6ce1e5c0 954
f2134f66 955 /*
e12cfc7b 956 * The 'flags' field is the same in v1 and in v2 so we can just
f2134f66
GA
957 * use v1 to access it.
958 */
e12cfc7b
MK
959 mvm->fwrt.ppag_table.v1.flags = cpu_to_le32(0);
960
6ce1e5c0
GA
961 data = iwl_acpi_get_object(mvm->dev, ACPI_PPAG_METHOD);
962 if (IS_ERR(data))
963 return PTR_ERR(data);
964
e12cfc7b 965 /* try to read ppag table rev 2 or 1 (both have the same data size) */
6ce1e5c0 966 wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
f2134f66
GA
967 ACPI_PPAG_WIFI_DATA_SIZE_V2, &tbl_rev);
968 if (!IS_ERR(wifi_pkg)) {
e12cfc7b
MK
969 if (tbl_rev == 1 || tbl_rev == 2) {
970 num_sub_bands = IWL_NUM_SUB_BANDS_V2;
971 gain = mvm->fwrt.ppag_table.v2.gain[0];
972 mvm->fwrt.ppag_ver = tbl_rev;
973 IWL_DEBUG_RADIO(mvm,
974 "Reading PPAG table v2 (tbl_rev=%d)\n",
975 tbl_rev);
976 goto read_table;
977 } else {
f2134f66
GA
978 ret = -EINVAL;
979 goto out_free;
980 }
6ce1e5c0
GA
981 }
982
f2134f66
GA
983 /* try to read ppag table revision 0 */
984 wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
e12cfc7b 985 ACPI_PPAG_WIFI_DATA_SIZE_V1, &tbl_rev);
f2134f66
GA
986 if (!IS_ERR(wifi_pkg)) {
987 if (tbl_rev != 0) {
988 ret = -EINVAL;
989 goto out_free;
990 }
e12cfc7b 991 num_sub_bands = IWL_NUM_SUB_BANDS_V1;
f2134f66 992 gain = mvm->fwrt.ppag_table.v1.gain[0];
e12cfc7b 993 mvm->fwrt.ppag_ver = 0;
f2134f66
GA
994 IWL_DEBUG_RADIO(mvm, "Reading PPAG table v1 (tbl_rev=0)\n");
995 goto read_table;
3ed83da3 996 }
f2134f66
GA
997 ret = PTR_ERR(wifi_pkg);
998 goto out_free;
3ed83da3 999
f2134f66 1000read_table:
e12cfc7b
MK
1001 flags = &wifi_pkg->package.elements[1];
1002
1003 if (flags->type != ACPI_TYPE_INTEGER) {
6ce1e5c0
GA
1004 ret = -EINVAL;
1005 goto out_free;
1006 }
1007
e12cfc7b
MK
1008 mvm->fwrt.ppag_table.v1.flags = cpu_to_le32(flags->integer.value &
1009 IWL_PPAG_MASK);
1010
1011 if (!mvm->fwrt.ppag_table.v1.flags) {
6ce1e5c0
GA
1012 ret = 0;
1013 goto out_free;
1014 }
1015
1016 /*
1017 * read, verify gain values and save them into the PPAG table.
1018 * first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the
1019 * following sub-bands to High-Band (5GHz).
1020 */
f2134f66
GA
1021 for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
1022 for (j = 0; j < num_sub_bands; j++) {
6ce1e5c0
GA
1023 union acpi_object *ent;
1024
1025 ent = &wifi_pkg->package.elements[idx++];
5a684245 1026 if (ent->type != ACPI_TYPE_INTEGER) {
6ce1e5c0
GA
1027 ret = -EINVAL;
1028 goto out_free;
1029 }
5a684245 1030
f2134f66 1031 gain[i * num_sub_bands + j] = ent->integer.value;
5a684245
LC
1032
1033 if ((j == 0 &&
1034 (gain[i * num_sub_bands + j] > ACPI_PPAG_MAX_LB ||
1035 gain[i * num_sub_bands + j] < ACPI_PPAG_MIN_LB)) ||
1036 (j != 0 &&
1037 (gain[i * num_sub_bands + j] > ACPI_PPAG_MAX_HB ||
1038 gain[i * num_sub_bands + j] < ACPI_PPAG_MIN_HB))) {
e12cfc7b 1039 mvm->fwrt.ppag_table.v1.flags = cpu_to_le32(0);
5a684245
LC
1040 ret = -EINVAL;
1041 goto out_free;
1042 }
6ce1e5c0
GA
1043 }
1044 }
e12cfc7b 1045
6ce1e5c0
GA
1046 ret = 0;
1047out_free:
1048 kfree(data);
1049 return ret;
1050}
1051
1052int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1053{
f2134f66
GA
1054 u8 cmd_ver;
1055 int i, j, ret, num_sub_bands, cmd_size;
f2134f66 1056 s8 *gain;
6ce1e5c0
GA
1057
1058 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) {
1059 IWL_DEBUG_RADIO(mvm,
1060 "PPAG capability not supported by FW, command not sent.\n");
1061 return 0;
1062 }
e12cfc7b 1063 if (!mvm->fwrt.ppag_table.v1.flags) {
f2134f66 1064 IWL_DEBUG_RADIO(mvm, "PPAG not enabled, command not sent.\n");
160bab43
GA
1065 return 0;
1066 }
1067
f2134f66 1068 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP,
e80bfd11
MG
1069 PER_PLATFORM_ANT_GAIN_CMD,
1070 IWL_FW_CMD_VER_UNKNOWN);
f2134f66 1071 if (cmd_ver == 1) {
e12cfc7b 1072 num_sub_bands = IWL_NUM_SUB_BANDS_V1;
f2134f66 1073 gain = mvm->fwrt.ppag_table.v1.gain[0];
659844d3 1074 cmd_size = sizeof(mvm->fwrt.ppag_table.v1);
e12cfc7b 1075 if (mvm->fwrt.ppag_ver == 1 || mvm->fwrt.ppag_ver == 2) {
f2134f66 1076 IWL_DEBUG_RADIO(mvm,
e12cfc7b
MK
1077 "PPAG table rev is %d but FW supports v1, sending truncated table\n",
1078 mvm->fwrt.ppag_ver);
1079 mvm->fwrt.ppag_table.v1.flags &=
1080 cpu_to_le32(IWL_PPAG_ETSI_MASK);
f2134f66 1081 }
e12cfc7b 1082 } else if (cmd_ver == 2 || cmd_ver == 3) {
f2134f66
GA
1083 num_sub_bands = IWL_NUM_SUB_BANDS_V2;
1084 gain = mvm->fwrt.ppag_table.v2.gain[0];
659844d3 1085 cmd_size = sizeof(mvm->fwrt.ppag_table.v2);
e12cfc7b 1086 if (mvm->fwrt.ppag_ver == 0) {
f2134f66
GA
1087 IWL_DEBUG_RADIO(mvm,
1088 "PPAG table is v1 but FW supports v2, sending padded table\n");
e12cfc7b
MK
1089 } else if (cmd_ver == 2 && mvm->fwrt.ppag_ver == 2) {
1090 IWL_DEBUG_RADIO(mvm,
1091 "PPAG table is v3 but FW supports v2, sending partial bitmap.\n");
1092 mvm->fwrt.ppag_table.v1.flags &=
1093 cpu_to_le32(IWL_PPAG_ETSI_MASK);
f2134f66
GA
1094 }
1095 } else {
1096 IWL_DEBUG_RADIO(mvm, "Unsupported PPAG command version\n");
1097 return 0;
1098 }
6ce1e5c0 1099
f2134f66
GA
1100 for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
1101 for (j = 0; j < num_sub_bands; j++) {
6ce1e5c0
GA
1102 IWL_DEBUG_RADIO(mvm,
1103 "PPAG table: chain[%d] band[%d]: gain = %d\n",
f2134f66 1104 i, j, gain[i * num_sub_bands + j]);
6ce1e5c0
GA
1105 }
1106 }
f2134f66 1107 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
6ce1e5c0
GA
1108 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
1109 PER_PLATFORM_ANT_GAIN_CMD),
659844d3 1110 0, cmd_size, &mvm->fwrt.ppag_table);
6ce1e5c0
GA
1111 if (ret < 0)
1112 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
1113 ret);
1114
1115 return ret;
1116}
1117
a2ac0f48 1118static const struct dmi_system_id dmi_ppag_approved_list[] = {
ca176edd
LC
1119 { .ident = "HP",
1120 .matches = {
1121 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
1122 },
1123 },
dd158ed6
LC
1124 { .ident = "SAMSUNG",
1125 .matches = {
1126 DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"),
1127 },
1128 },
4a76553c
LC
1129 { .ident = "MSFT",
1130 .matches = {
1131 DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
1132 },
1133 },
a7abc1ea
LC
1134 { .ident = "ASUS",
1135 .matches = {
1136 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTek COMPUTER INC."),
1137 },
1138 },
a22549f1 1139 {}
a2ac0f48
LC
1140};
1141
6ce1e5c0
GA
1142static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1143{
78a19d52 1144 /* no need to read the table, done in INIT stage */
a2ac0f48
LC
1145 if (!dmi_check_system(dmi_ppag_approved_list)) {
1146 IWL_DEBUG_RADIO(mvm,
1147 "System vendor '%s' is not in the approved list, disabling PPAG.\n",
1148 dmi_get_system_info(DMI_SYS_VENDOR));
e12cfc7b 1149 mvm->fwrt.ppag_table.v1.flags = cpu_to_le32(0);
a2ac0f48
LC
1150 return 0;
1151 }
1152
6ce1e5c0
GA
1153 return iwl_mvm_ppag_send_cmd(mvm);
1154}
1155
28dd7ccd
MG
1156static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1157{
1158 int ret;
1159 struct iwl_tas_config_cmd cmd = {};
1160 int list_size;
1161
cdaba917 1162 BUILD_BUG_ON(ARRAY_SIZE(cmd.block_list_array) <
28dd7ccd
MG
1163 APCI_WTAS_BLACK_LIST_MAX);
1164
1165 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) {
1166 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n");
1167 return;
1168 }
1169
cdaba917 1170 ret = iwl_acpi_get_tas(&mvm->fwrt, cmd.block_list_array, &list_size);
28dd7ccd
MG
1171 if (ret < 0) {
1172 IWL_DEBUG_RADIO(mvm,
1173 "TAS table invalid or unavailable. (%d)\n",
1174 ret);
1175 return;
1176 }
1177
1178 if (list_size < 0)
1179 return;
1180
1181 /* list size if TAS enabled can only be non-negative */
cdaba917 1182 cmd.block_list_size = cpu_to_le32((u32)list_size);
28dd7ccd
MG
1183
1184 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
1185 TAS_CONFIG),
1186 0, sizeof(cmd), &cmd);
1187 if (ret < 0)
1188 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret);
1189}
f5b1cb2e 1190
4e8fe214
GG
1191static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm)
1192{
1193 u8 value;
45fe1b6b 1194 int ret = iwl_acpi_get_dsm_u8(mvm->fwrt.dev, 0, DSM_RFI_FUNC_ENABLE,
4e8fe214
GG
1195 &iwl_rfi_guid, &value);
1196
1197 if (ret < 0) {
1198 IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret);
1199
1200 } else if (value >= DSM_VALUE_RFI_MAX) {
1201 IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n",
1202 value);
1203
1204 } else if (value == DSM_VALUE_RFI_ENABLE) {
1205 IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n");
1206 return DSM_VALUE_RFI_ENABLE;
1207 }
1208
1209 IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n");
1210
1211 /* default behaviour is disabled */
1212 return DSM_VALUE_RFI_DISABLE;
1213}
1214
f5b1cb2e
GA
1215static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1216{
7119f02b
MK
1217 int ret;
1218 u32 value;
1f578d4f 1219 struct iwl_lari_config_change_cmd_v5 cmd = {};
f5b1cb2e 1220
f21afaba 1221 cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt);
d2bfda8a 1222
45fe1b6b 1223 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, DSM_FUNC_11AX_ENABLEMENT,
7119f02b
MK
1224 &iwl_guid, &value);
1225 if (!ret)
1226 cmd.oem_11ax_allow_bitmap = cpu_to_le32(value);
f5b1cb2e 1227
45fe1b6b 1228 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
54b4fda5
AN
1229 DSM_FUNC_ENABLE_UNII4_CHAN,
1230 &iwl_guid, &value);
1231 if (!ret)
1232 cmd.oem_unii4_allow_bitmap = cpu_to_le32(value);
1233
45fe1b6b 1234 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1f578d4f
MK
1235 DSM_FUNC_ACTIVATE_CHANNEL,
1236 &iwl_guid, &value);
1237 if (!ret)
1238 cmd.chan_state_active_bitmap = cpu_to_le32(value);
1239
698b166e
LC
1240 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1241 DSM_FUNC_ENABLE_6E,
1242 &iwl_guid, &value);
1243 if (!ret)
1244 cmd.oem_uhb_allow_bitmap = cpu_to_le32(value);
1245
54b4fda5 1246 if (cmd.config_bitmap ||
698b166e 1247 cmd.oem_uhb_allow_bitmap ||
54b4fda5 1248 cmd.oem_11ax_allow_bitmap ||
1f578d4f
MK
1249 cmd.oem_unii4_allow_bitmap ||
1250 cmd.chan_state_active_bitmap) {
3c21990b
MK
1251 size_t cmd_size;
1252 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw,
1253 REGULATORY_AND_NVM_GROUP,
1254 LARI_CONFIG_CHANGE, 1);
1f578d4f
MK
1255 if (cmd_ver == 5)
1256 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5);
1257 else if (cmd_ver == 4)
54b4fda5
AN
1258 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4);
1259 else if (cmd_ver == 3)
3c21990b
MK
1260 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3);
1261 else if (cmd_ver == 2)
1262 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2);
1263 else
1264 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1);
1265
3ce88247 1266 IWL_DEBUG_RADIO(mvm,
7119f02b
MK
1267 "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n",
1268 le32_to_cpu(cmd.config_bitmap),
1269 le32_to_cpu(cmd.oem_11ax_allow_bitmap));
54b4fda5 1270 IWL_DEBUG_RADIO(mvm,
1f578d4f 1271 "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n",
54b4fda5 1272 le32_to_cpu(cmd.oem_unii4_allow_bitmap),
1f578d4f 1273 le32_to_cpu(cmd.chan_state_active_bitmap),
54b4fda5 1274 cmd_ver);
698b166e
LC
1275 IWL_DEBUG_RADIO(mvm,
1276 "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x\n",
1277 le32_to_cpu(cmd.oem_uhb_allow_bitmap));
7119f02b
MK
1278 ret = iwl_mvm_send_cmd_pdu(mvm,
1279 WIDE_ID(REGULATORY_AND_NVM_GROUP,
1280 LARI_CONFIG_CHANGE),
1281 0, cmd_size, &cmd);
1282 if (ret < 0)
f5b1cb2e
GA
1283 IWL_DEBUG_RADIO(mvm,
1284 "Failed to send LARI_CONFIG_CHANGE (%d)\n",
7119f02b 1285 ret);
f5b1cb2e
GA
1286 }
1287}
78a19d52
MK
1288
1289void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm)
1290{
1291 int ret;
1292
1293 /* read PPAG table */
1294 ret = iwl_mvm_get_ppag_table(mvm);
1295 if (ret < 0) {
1296 IWL_DEBUG_RADIO(mvm,
1297 "PPAG BIOS table invalid or unavailable. (%d)\n",
1298 ret);
1299 }
1300
1301 /* read SAR tables */
1302 ret = iwl_sar_get_wrds_table(&mvm->fwrt);
1303 if (ret < 0) {
1304 IWL_DEBUG_RADIO(mvm,
1305 "WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1306 ret);
1307 /*
1308 * If not available, don't fail and don't bother with EWRD and
1309 * WGDS */
1310
1311 if (!iwl_sar_get_wgds_table(&mvm->fwrt)) {
1312 /*
1313 * If basic SAR is not available, we check for WGDS,
1314 * which should *not* be available either. If it is
1315 * available, issue an error, because we can't use SAR
1316 * Geo without basic SAR.
1317 */
1318 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
1319 }
1320
1321 } else {
1322 ret = iwl_sar_get_ewrd_table(&mvm->fwrt);
1323 /* if EWRD is not available, we can still use
1324 * WRDS, so don't fail */
1325 if (ret < 0)
1326 IWL_DEBUG_RADIO(mvm,
1327 "EWRD SAR BIOS table invalid or unavailable. (%d)\n",
1328 ret);
1329
1330 /* read geo SAR table */
1331 if (iwl_sar_geo_support(&mvm->fwrt)) {
1332 ret = iwl_sar_get_wgds_table(&mvm->fwrt);
1333 if (ret < 0)
1334 IWL_DEBUG_RADIO(mvm,
1335 "Geo SAR BIOS table invalid or unavailable. (%d)\n",
1336 ret);
1337 /* we don't fail if the table is not available */
1338 }
1339 }
1340}
69964905 1341#else /* CONFIG_ACPI */
69964905 1342
39c1a972
IZ
1343inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm,
1344 int prof_a, int prof_b)
69964905 1345{
78a19d52 1346 return 1;
69964905 1347}
a6bff3cb 1348
39c1a972 1349inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
5d041c46
LC
1350{
1351 return -ENOENT;
1352}
1353
a6bff3cb
HD
1354static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
1355{
1356 return 0;
1357}
18f1755d 1358
6ce1e5c0
GA
1359int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1360{
1361 return -ENOENT;
1362}
1363
1364static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1365{
7937fd32 1366 return 0;
6ce1e5c0 1367}
28dd7ccd
MG
1368
1369static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1370{
1371}
f5b1cb2e
GA
1372
1373static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1374{
1375}
4e8fe214
GG
1376
1377static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm)
1378{
1379 return DSM_VALUE_RFI_DISABLE;
1380}
78a19d52
MK
1381
1382void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm)
1383{
1384}
c593d2fa 1385
69964905
LC
1386#endif /* CONFIG_ACPI */
1387
f130bb75
MG
1388void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1389{
1390 u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1391 int ret;
1392 u32 resp;
1393
1394 struct iwl_fw_error_recovery_cmd recovery_cmd = {
1395 .flags = cpu_to_le32(flags),
1396 .buf_size = 0,
1397 };
1398 struct iwl_host_cmd host_cmd = {
1399 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1400 .flags = CMD_WANT_SKB,
1401 .data = {&recovery_cmd, },
1402 .len = {sizeof(recovery_cmd), },
1403 };
1404
1405 /* no error log was defined in TLV */
1406 if (!error_log_size)
1407 return;
1408
1409 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1410 /* no buf was allocated while HW reset */
1411 if (!mvm->error_recovery_buf)
1412 return;
1413
1414 host_cmd.data[1] = mvm->error_recovery_buf;
1415 host_cmd.len[1] = error_log_size;
1416 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1417 recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1418 }
1419
1420 ret = iwl_mvm_send_cmd(mvm, &host_cmd);
1421 kfree(mvm->error_recovery_buf);
1422 mvm->error_recovery_buf = NULL;
1423
1424 if (ret) {
1425 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1426 return;
1427 }
1428
1429 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1430 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1431 resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data);
1432 if (resp)
1433 IWL_ERR(mvm,
1434 "Failed to send recovery cmd blob was invalid %d\n",
1435 resp);
1436 }
1437}
1438
42ce76d6
LC
1439static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1440{
1edd56e6 1441 return iwl_mvm_sar_select_profile(mvm, 1, 1);
da2830ac
LC
1442}
1443
1f370650 1444static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
8ca151b5 1445{
1f370650 1446 int ret;
8ca151b5 1447
7d6222e2 1448 if (iwl_mvm_has_unified_ucode(mvm))
52b15521 1449 return iwl_run_unified_mvm_ucode(mvm);
8ca151b5 1450
3b25f1af 1451 ret = iwl_run_init_mvm_ucode(mvm);
f2082a53 1452
f2082a53 1453 if (ret) {
8d193ca2 1454 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
f4744258
LK
1455
1456 if (iwlmvm_mod_params.init_dbg)
1457 return 0;
1f370650 1458 return ret;
8d193ca2 1459 }
8ca151b5 1460
203c83d3 1461 iwl_fw_dbg_stop_sync(&mvm->fwrt);
bab3cb92
EG
1462 iwl_trans_stop_device(mvm->trans);
1463 ret = iwl_trans_start_hw(mvm->trans);
f2082a53 1464 if (ret)
1f370650 1465 return ret;
8ca151b5 1466
94022562 1467 mvm->rfkill_safe_init_done = false;
8ca151b5 1468 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1f370650
SS
1469 if (ret)
1470 return ret;
1471
94022562
EG
1472 mvm->rfkill_safe_init_done = true;
1473
b108d8c7
SM
1474 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1475 NULL);
da2eb669 1476
702e975d 1477 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
1f370650
SS
1478}
1479
1480int iwl_mvm_up(struct iwl_mvm *mvm)
1481{
1482 int ret, i;
1483 struct ieee80211_channel *chan;
1484 struct cfg80211_chan_def chandef;
dd36a507 1485 struct ieee80211_supported_band *sband = NULL;
1f370650
SS
1486
1487 lockdep_assert_held(&mvm->mutex);
1488
1489 ret = iwl_trans_start_hw(mvm->trans);
1490 if (ret)
1491 return ret;
1492
1493 ret = iwl_mvm_load_rt_fw(mvm);
8ca151b5
JB
1494 if (ret) {
1495 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
72d3c7bb
JB
1496 if (ret != -ERFKILL)
1497 iwl_fw_dbg_error_collect(&mvm->fwrt,
1498 FW_DBG_TRIGGER_DRIVER);
8ca151b5
JB
1499 goto error;
1500 }
1501
d0b813fc 1502 iwl_get_shared_mem_conf(&mvm->fwrt);
04fd2c28 1503
1f3b0ff8
LE
1504 ret = iwl_mvm_sf_update(mvm, NULL, false);
1505 if (ret)
1506 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1507
a1af4c48 1508 if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
7a14c23d
SS
1509 mvm->fwrt.dump.conf = FW_DBG_INVALID;
1510 /* if we have a destination, assume EARLY START */
1511 if (mvm->fw->dbg.dest_tlv)
1512 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
1513 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
1514 }
6a951267 1515
a0544272 1516 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
8ca151b5
JB
1517 if (ret)
1518 goto error;
1519
7d6222e2
JB
1520 if (!iwl_mvm_has_unified_ucode(mvm)) {
1521 /* Send phy db control command and then phy db calibration */
1f370650
SS
1522 ret = iwl_send_phy_db_data(mvm->phy_db);
1523 if (ret)
1524 goto error;
1f370650 1525 }
8ca151b5 1526
bb99ff9b
LC
1527 ret = iwl_send_phy_cfg_cmd(mvm);
1528 if (ret)
1529 goto error;
1530
b3de3ef4
EG
1531 ret = iwl_mvm_send_bt_init_conf(mvm);
1532 if (ret)
1533 goto error;
1534
cceb4507
SM
1535 if (fw_has_capa(&mvm->fw->ucode_capa,
1536 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) {
a8eb340f 1537 ret = iwl_set_soc_latency(&mvm->fwrt);
cceb4507
SM
1538 if (ret)
1539 goto error;
1540 }
1541
43413a97 1542 /* Init RSS configuration */
9cd243f2
MG
1543 ret = iwl_configure_rxq(&mvm->fwrt);
1544 if (ret)
1545 goto error;
8edbfaa1
SS
1546
1547 if (iwl_mvm_has_new_rx_api(mvm)) {
43413a97
SS
1548 ret = iwl_send_rss_cfg_cmd(mvm);
1549 if (ret) {
1550 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1551 ret);
1552 goto error;
1553 }
1554 }
1555
8ca151b5 1556 /* init the fw <-> mac80211 STA mapping */
be9ae34e 1557 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++)
8ca151b5
JB
1558 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1559
0ae98812 1560 mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1d3c3f63 1561
b2b7875b
JB
1562 /* reset quota debouncing buffer - 0xff will yield invalid data */
1563 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1564
79660869
IL
1565 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
1566 ret = iwl_mvm_send_dqa_cmd(mvm);
1567 if (ret)
1568 goto error;
1569 }
97d5be7e 1570
2c2c3647
NE
1571 /*
1572 * Add auxiliary station for scanning.
1573 * Newer versions of this command implies that the fw uses
1574 * internal aux station for all aux activities that don't
1575 * requires a dedicated data queue.
1576 */
1577 if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
1578 ADD_STA,
1579 0) < 12) {
1580 /*
1581 * In old version the aux station uses mac id like other
1582 * station and not lmac id
1583 */
1584 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1585 if (ret)
1586 goto error;
1587 }
8ca151b5 1588
53a9d61e 1589 /* Add all the PHY contexts */
dd36a507
TM
1590 i = 0;
1591 while (!sband && i < NUM_NL80211_BANDS)
1592 sband = mvm->hw->wiphy->bands[i++];
1593
1594 if (WARN_ON_ONCE(!sband))
1595 goto error;
1596
1597 chan = &sband->channels[0];
1598
53a9d61e
IP
1599 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1600 for (i = 0; i < NUM_PHY_CTX; i++) {
1601 /*
1602 * The channel used here isn't relevant as it's
1603 * going to be overwritten in the other flows.
1604 * For now use the first channel we have.
1605 */
1606 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1607 &chandef, 1, 1);
1608 if (ret)
1609 goto error;
1610 }
8ca151b5 1611
c221daf2
CRI
1612 if (iwl_mvm_is_tt_in_fw(mvm)) {
1613 /* in order to give the responsibility of ct-kill and
1614 * TX backoff to FW we need to send empty temperature reporting
1615 * cmd during init time
1616 */
1617 iwl_mvm_send_temp_report_ths_cmd(mvm);
1618 } else {
1619 /* Initialize tx backoffs to the minimal possible */
1620 iwl_mvm_tt_tx_backoff(mvm, 0);
1621 }
5c89e7bc 1622
242d9c8b 1623#ifdef CONFIG_THERMAL
5c89e7bc 1624 /* TODO: read the budget from BIOS / Platform NVM */
944eafc2
CRI
1625
1626 /*
1627 * In case there is no budget from BIOS / Platform NVM the default
1628 * budget should be 2000mW (cooling state 0).
1629 */
1630 if (iwl_mvm_is_ctdp_supported(mvm)) {
5c89e7bc
CRI
1631 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1632 mvm->cooling_dev.cur_state);
75cfe338
LC
1633 if (ret)
1634 goto error;
1635 }
c221daf2 1636#endif
0c0e2c71 1637
aa43ae12
AM
1638 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1639 WARN_ON(iwl_mvm_config_ltr(mvm));
9180ac50 1640
c1cb92fc 1641 ret = iwl_mvm_power_update_device(mvm);
64b928c4
AB
1642 if (ret)
1643 goto error;
1644
f5b1cb2e 1645 iwl_mvm_lari_cfg(mvm);
35af15d1
AN
1646 /*
1647 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1648 * anyway, so don't init MCC.
1649 */
1650 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1651 ret = iwl_mvm_init_mcc(mvm);
1652 if (ret)
1653 goto error;
1654 }
90d4f7db 1655
859d914c 1656 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
4ca87a5f 1657 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
b66b5817 1658 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
d2496221
DS
1659 ret = iwl_mvm_config_scan(mvm);
1660 if (ret)
1661 goto error;
1662 }
1663
f130bb75
MG
1664 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1665 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1666
48e775e6
HD
1667 if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid))
1668 IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n");
1669
6ce1e5c0
GA
1670 ret = iwl_mvm_ppag_init(mvm);
1671 if (ret)
1672 goto error;
1673
da2830ac 1674 ret = iwl_mvm_sar_init(mvm);
78a19d52 1675 if (ret == 0)
5d041c46 1676 ret = iwl_mvm_sar_geo_init(mvm);
78a19d52 1677 else if (ret < 0)
a6bff3cb
HD
1678 goto error;
1679
c593d2fa
AB
1680 ret = iwl_mvm_sgom_init(mvm);
1681 if (ret)
1682 goto error;
1683
28dd7ccd 1684 iwl_mvm_tas_init(mvm);
7089ae63
JB
1685 iwl_mvm_leds_sync(mvm);
1686
b68bd2e3
IP
1687 iwl_mvm_ftm_initiator_smooth_config(mvm);
1688
4e8fe214
GG
1689 if (fw_has_capa(&mvm->fw->ucode_capa,
1690 IWL_UCODE_TLV_CAPA_RFIM_SUPPORT)) {
1691 if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE)
1692 iwl_rfi_send_config_cmd(mvm, NULL);
1693 }
1694
53a9d61e 1695 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
8ca151b5
JB
1696 return 0;
1697 error:
f4744258 1698 if (!iwlmvm_mod_params.init_dbg || !ret)
de8ba41b 1699 iwl_mvm_stop_device(mvm);
8ca151b5
JB
1700 return ret;
1701}
1702
1703int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1704{
1705 int ret, i;
1706
1707 lockdep_assert_held(&mvm->mutex);
1708
1709 ret = iwl_trans_start_hw(mvm->trans);
1710 if (ret)
1711 return ret;
1712
1713 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1714 if (ret) {
1715 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1716 goto error;
1717 }
1718
a0544272 1719 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
8ca151b5
JB
1720 if (ret)
1721 goto error;
1722
1723 /* Send phy db control command and then phy db calibration*/
1724 ret = iwl_send_phy_db_data(mvm->phy_db);
1725 if (ret)
1726 goto error;
1727
1728 ret = iwl_send_phy_cfg_cmd(mvm);
1729 if (ret)
1730 goto error;
1731
1732 /* init the fw <-> mac80211 STA mapping */
be9ae34e 1733 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++)
8ca151b5
JB
1734 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1735
2c2c3647
NE
1736 if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
1737 ADD_STA,
1738 0) < 12) {
1739 /*
1740 * Add auxiliary station for scanning.
1741 * Newer versions of this command implies that the fw uses
1742 * internal aux station for all aux activities that don't
1743 * requires a dedicated data queue.
1744 * In old version the aux station uses mac id like other
1745 * station and not lmac id
1746 */
1747 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1748 if (ret)
1749 goto error;
1750 }
8ca151b5
JB
1751
1752 return 0;
1753 error:
fcb6b92a 1754 iwl_mvm_stop_device(mvm);
8ca151b5
JB
1755 return ret;
1756}
1757
0416841d
JB
1758void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1759 struct iwl_rx_cmd_buffer *rxb)
8ca151b5
JB
1760{
1761 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1762 struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1763 u32 flags = le32_to_cpu(card_state_notif->flags);
1764
1765 IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1766 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1767 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1768 (flags & CT_KILL_CARD_DISABLED) ?
1769 "Reached" : "Not reached");
8ca151b5
JB
1770}
1771
0416841d
JB
1772void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1773 struct iwl_rx_cmd_buffer *rxb)
30269c12
CRI
1774{
1775 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1776 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1777
0c8d0a47
GBA
1778 IWL_DEBUG_INFO(mvm,
1779 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1780 le32_to_cpu(mfuart_notif->installed_ver),
1781 le32_to_cpu(mfuart_notif->external_ver),
1782 le32_to_cpu(mfuart_notif->status),
1783 le32_to_cpu(mfuart_notif->duration));
1784
19f63c53
GBA
1785 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
1786 IWL_DEBUG_INFO(mvm,
0c8d0a47 1787 "MFUART: image size: 0x%08x\n",
19f63c53 1788 le32_to_cpu(mfuart_notif->image_size));
30269c12 1789}