iwlwifi: fix module init error paths
[linux-block.git] / drivers / net / wireless / intel / iwlwifi / mvm / fw.c
CommitLineData
8ca151b5
JB
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8d193ca2 9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
bdccdb85 10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
48e775e6 11 * Copyright(c) 2018 - 2019 Intel Corporation
8ca151b5
JB
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of version 2 of the GNU General Public License as
15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
8ca151b5 22 * The full GNU General Public License is included in this distribution
410dc5aa 23 * in the file called COPYING.
8ca151b5
JB
24 *
25 * Contact Information:
cb2f8277 26 * Intel Linux Wireless <linuxwifi@intel.com>
8ca151b5
JB
27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *
29 * BSD LICENSE
30 *
51368bf7 31 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8d193ca2 32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
bdccdb85 33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
48e775e6 34 * Copyright(c) 2018 - 2019 Intel Corporation
8ca151b5
JB
35 * All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 *
41 * * Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * * Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in
45 * the documentation and/or other materials provided with the
46 * distribution.
47 * * Neither the name Intel Corporation nor the names of its
48 * contributors may be used to endorse or promote products derived
49 * from this software without specific prior written permission.
50 *
51 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
52 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
53 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
54 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
55 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
56 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
57 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
61 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 *
63 *****************************************************************************/
64#include <net/mac80211.h>
854d773e 65#include <linux/netdevice.h>
8ca151b5
JB
66
67#include "iwl-trans.h"
68#include "iwl-op-mode.h"
d962f9b1 69#include "fw/img.h"
8ca151b5
JB
70#include "iwl-debug.h"
71#include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
72#include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
8c23f95c 73#include "iwl-prph.h"
813df5ce 74#include "fw/acpi.h"
8ca151b5
JB
75
76#include "mvm.h"
7174beb6 77#include "fw/dbg.h"
8ca151b5 78#include "iwl-phy-db.h"
9c4f7d51
ST
79#include "iwl-modparams.h"
80#include "iwl-nvm-parse.h"
8ca151b5
JB
81
82#define MVM_UCODE_ALIVE_TIMEOUT HZ
83#define MVM_UCODE_CALIB_TIMEOUT (2*HZ)
84
85#define UCODE_VALID_OK cpu_to_le32(0x1)
86
8ca151b5
JB
87struct iwl_mvm_alive_data {
88 bool valid;
89 u32 scd_base_addr;
90};
91
8ca151b5
JB
92static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
93{
94 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
95 .valid = cpu_to_le32(valid_tx_ant),
96 };
97
33223542 98 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
a1022927 99 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
8ca151b5
JB
100 sizeof(tx_ant_cmd), &tx_ant_cmd);
101}
102
43413a97
SS
103static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
104{
105 int i;
106 struct iwl_rss_config_cmd cmd = {
107 .flags = cpu_to_le32(IWL_RSS_ENABLE),
608dce95
SS
108 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
109 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
110 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
111 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
112 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
113 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
43413a97
SS
114 };
115
f43495fd
SS
116 if (mvm->trans->num_rx_queues == 1)
117 return 0;
118
854d773e 119 /* Do not direct RSS traffic to Q 0 which is our fallback queue */
43413a97 120 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
854d773e
SS
121 cmd.indirection_table[i] =
122 1 + (i % (mvm->trans->num_rx_queues - 1));
123 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
43413a97
SS
124
125 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
126}
127
8edbfaa1
SS
128static int iwl_configure_rxq(struct iwl_mvm *mvm)
129{
dbf592f3 130 int i, num_queues, size, ret;
8edbfaa1 131 struct iwl_rfh_queue_config *cmd;
dbf592f3
JB
132 struct iwl_host_cmd hcmd = {
133 .id = WIDE_ID(DATA_PATH_GROUP, RFH_QUEUE_CONFIG_CMD),
134 .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
135 };
8edbfaa1
SS
136
137 /* Do not configure default queue, it is configured via context info */
138 num_queues = mvm->trans->num_rx_queues - 1;
139
dbf592f3 140 size = struct_size(cmd, data, num_queues);
8edbfaa1
SS
141
142 cmd = kzalloc(size, GFP_KERNEL);
143 if (!cmd)
144 return -ENOMEM;
145
146 cmd->num_queues = num_queues;
147
148 for (i = 0; i < num_queues; i++) {
149 struct iwl_trans_rxq_dma_data data;
150
151 cmd->data[i].q_num = i + 1;
152 iwl_trans_get_rxq_dma_data(mvm->trans, i + 1, &data);
153
154 cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb);
155 cmd->data[i].urbd_stts_wrptr =
156 cpu_to_le64(data.urbd_stts_wrptr);
157 cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb);
158 cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid);
159 }
160
dbf592f3
JB
161 hcmd.data[0] = cmd;
162 hcmd.len[0] = size;
163
164 ret = iwl_mvm_send_cmd(mvm, &hcmd);
165
166 kfree(cmd);
167
168 return ret;
8edbfaa1
SS
169}
170
97d5be7e
LK
171static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
172{
173 struct iwl_dqa_enable_cmd dqa_cmd = {
174 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
175 };
176 u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
177 int ret;
178
179 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
180 if (ret)
181 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
182 else
183 IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
184
185 return ret;
186}
187
bdccdb85
GBA
188void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
189 struct iwl_rx_cmd_buffer *rxb)
190{
191 struct iwl_rx_packet *pkt = rxb_addr(rxb);
192 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
193 __le32 *dump_data = mfu_dump_notif->data;
194 int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
195 int i;
196
197 if (mfu_dump_notif->index_num == 0)
198 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
199 le32_to_cpu(mfu_dump_notif->assert_id));
200
201 for (i = 0; i < n_words; i++)
202 IWL_DEBUG_INFO(mvm,
203 "MFUART assert dump, dword %u: 0x%08x\n",
204 le16_to_cpu(mfu_dump_notif->index_num) *
205 n_words + i,
206 le32_to_cpu(dump_data[i]));
207}
208
8ca151b5
JB
209static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
210 struct iwl_rx_packet *pkt, void *data)
211{
212 struct iwl_mvm *mvm =
213 container_of(notif_wait, struct iwl_mvm, notif_wait);
214 struct iwl_mvm_alive_data *alive_data = data;
5c228d63 215 struct mvm_alive_resp_v3 *palive3;
7e1223b5 216 struct mvm_alive_resp *palive;
5c228d63
SS
217 struct iwl_umac_alive *umac;
218 struct iwl_lmac_alive *lmac1;
219 struct iwl_lmac_alive *lmac2 = NULL;
220 u16 status;
22463857 221 u32 lmac_error_event_table, umac_error_event_table;
01a9ca51 222
5c228d63
SS
223 if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
224 palive = (void *)pkt->data;
225 umac = &palive->umac_data;
226 lmac1 = &palive->lmac_data[0];
227 lmac2 = &palive->lmac_data[1];
228 status = le16_to_cpu(palive->status);
229 } else {
230 palive3 = (void *)pkt->data;
231 umac = &palive3->umac_data;
232 lmac1 = &palive3->lmac_data;
233 status = le16_to_cpu(palive3->status);
234 }
01a9ca51 235
22463857
SM
236 lmac_error_event_table =
237 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
238 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
239
5c228d63 240 if (lmac2)
22463857
SM
241 mvm->trans->lmac_error_event_table[1] =
242 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
ffa70264 243
22463857 244 umac_error_event_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr);
01a9ca51 245
3485e76e
LC
246 if (!umac_error_event_table) {
247 mvm->support_umac_log = false;
248 } else if (umac_error_event_table >=
249 mvm->trans->cfg->min_umac_error_event_table) {
250 mvm->support_umac_log = true;
3485e76e 251 } else {
fb5b2846
LC
252 IWL_ERR(mvm,
253 "Not valid error log pointer 0x%08X for %s uCode\n",
22463857 254 umac_error_event_table,
fb5b2846
LC
255 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
256 "Init" : "RT");
3485e76e
LC
257 mvm->support_umac_log = false;
258 }
fb5b2846 259
22463857
SM
260 if (mvm->support_umac_log)
261 iwl_fw_umac_set_alive_err_table(mvm->trans,
262 umac_error_event_table);
263
264 alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr);
5c228d63 265 alive_data->valid = status == IWL_ALIVE_STATUS_OK;
7e1223b5 266
5c228d63
SS
267 IWL_DEBUG_FW(mvm,
268 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
269 status, lmac1->ver_type, lmac1->ver_subtype);
7e1223b5 270
5c228d63
SS
271 if (lmac2)
272 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
7e1223b5 273
5c228d63
SS
274 IWL_DEBUG_FW(mvm,
275 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
276 le32_to_cpu(umac->umac_major),
277 le32_to_cpu(umac->umac_minor));
8ca151b5 278
0a3a3e9e
SM
279 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
280
8ca151b5
JB
281 return true;
282}
283
1f370650
SS
284static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
285 struct iwl_rx_packet *pkt, void *data)
286{
287 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
288
289 return true;
290}
291
8ca151b5
JB
292static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
293 struct iwl_rx_packet *pkt, void *data)
294{
295 struct iwl_phy_db *phy_db = data;
296
297 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
298 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
299 return true;
300 }
301
ce1f2778 302 WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
8ca151b5
JB
303
304 return false;
305}
306
307static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
308 enum iwl_ucode_type ucode_type)
309{
310 struct iwl_notification_wait alive_wait;
94a8d87c 311 struct iwl_mvm_alive_data alive_data = {};
8ca151b5 312 const struct fw_img *fw;
cfbc6c4c 313 int ret;
702e975d 314 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
6eb031d2 315 static const u16 alive_cmd[] = { MVM_ALIVE };
b3500b47
EG
316 bool run_in_rfkill =
317 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
8ca151b5 318
61df750c 319 if (ucode_type == IWL_UCODE_REGULAR &&
3d2d4422
GBA
320 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
321 !(fw_has_capa(&mvm->fw->ucode_capa,
322 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
612da1ef 323 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
61df750c 324 else
612da1ef 325 fw = iwl_get_ucode_image(mvm->fw, ucode_type);
befe9b6f 326 if (WARN_ON(!fw))
8ca151b5 327 return -EINVAL;
702e975d 328 iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
65b280fe 329 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
8ca151b5
JB
330
331 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
332 alive_cmd, ARRAY_SIZE(alive_cmd),
333 iwl_alive_fn, &alive_data);
334
b3500b47
EG
335 /*
336 * We want to load the INIT firmware even in RFKILL
337 * For the unified firmware case, the ucode_type is not
338 * INIT, but we still need to run it.
339 */
340 ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill);
8ca151b5 341 if (ret) {
702e975d 342 iwl_fw_set_current_image(&mvm->fwrt, old_type);
8ca151b5
JB
343 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
344 return ret;
345 }
346
347 /*
348 * Some things may run in the background now, but we
349 * just wait for the ALIVE notification here.
350 */
351 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
352 MVM_UCODE_ALIVE_TIMEOUT);
353 if (ret) {
d6be9c1d
SS
354 struct iwl_trans *trans = mvm->trans;
355
67b8261c 356 if (ret == -ETIMEDOUT)
700b3799
SM
357 iwl_fw_dbg_error_collect(&mvm->fwrt,
358 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
67b8261c 359
5f01df3f 360 if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_22000)
d6be9c1d
SS
361 IWL_ERR(mvm,
362 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
ea695b7c
ST
363 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
364 iwl_read_umac_prph(trans,
365 UMAG_SB_CPU_2_STATUS));
6e584873 366 else if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000)
192de2b4
DS
367 IWL_ERR(mvm,
368 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
d6be9c1d
SS
369 iwl_read_prph(trans, SB_CPU_1_STATUS),
370 iwl_read_prph(trans, SB_CPU_2_STATUS));
702e975d 371 iwl_fw_set_current_image(&mvm->fwrt, old_type);
8ca151b5
JB
372 return ret;
373 }
374
375 if (!alive_data.valid) {
376 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
702e975d 377 iwl_fw_set_current_image(&mvm->fwrt, old_type);
8ca151b5
JB
378 return -EIO;
379 }
380
381 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
382
383 /*
384 * Note: all the queues are enabled as part of the interface
385 * initialization, but in firmware restart scenarios they
386 * could be stopped, so wake them up. In firmware restart,
387 * mac80211 will have the queues stopped as well until the
388 * reconfiguration completes. During normal startup, they
389 * will be empty.
390 */
391
4ecafae9 392 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
1c14089e
JB
393 /*
394 * Set a 'fake' TID for the command queue, since we use the
395 * hweight() of the tid_bitmap as a refcount now. Not that
396 * we ever even consider the command queue as one we might
397 * want to reuse, but be safe nevertheless.
398 */
399 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
400 BIT(IWL_MAX_TID_COUNT + 2);
8ca151b5 401
65b280fe 402 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
f7805b33
LC
403#ifdef CONFIG_IWLWIFI_DEBUGFS
404 iwl_fw_set_dbg_rec_on(&mvm->fwrt);
405#endif
8ca151b5
JB
406
407 return 0;
408}
8ca151b5 409
8c5f47b1
JB
410static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
411{
412 struct iwl_notification_wait init_wait;
413 struct iwl_nvm_access_complete_cmd nvm_complete = {};
414 struct iwl_init_extended_cfg_cmd init_cfg = {
415 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
416 };
417 static const u16 init_complete[] = {
418 INIT_COMPLETE_NOTIF,
419 };
420 int ret;
421
422 lockdep_assert_held(&mvm->mutex);
423
424 iwl_init_notification_wait(&mvm->notif_wait,
425 &init_wait,
426 init_complete,
427 ARRAY_SIZE(init_complete),
428 iwl_wait_init_complete,
429 NULL);
430
86ce5c74
SM
431 iwl_fw_dbg_apply_point(&mvm->fwrt, IWL_FW_INI_APPLY_EARLY);
432
8c5f47b1
JB
433 /* Will also start the device */
434 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
435 if (ret) {
436 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
437 goto error;
438 }
86ce5c74 439 iwl_fw_dbg_apply_point(&mvm->fwrt, IWL_FW_INI_APPLY_AFTER_ALIVE);
8c5f47b1
JB
440
441 /* Send init config command to mark that we are sending NVM access
442 * commands
443 */
444 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
b3500b47
EG
445 INIT_EXTENDED_CFG_CMD),
446 CMD_SEND_IN_RFKILL,
8c5f47b1
JB
447 sizeof(init_cfg), &init_cfg);
448 if (ret) {
449 IWL_ERR(mvm, "Failed to run init config command: %d\n",
450 ret);
451 goto error;
452 }
453
e9e1ba3d
SS
454 /* Load NVM to NIC if needed */
455 if (mvm->nvm_file_name) {
9c4f7d51
ST
456 iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
457 mvm->nvm_sections);
8c5f47b1 458 iwl_mvm_load_nvm_to_nic(mvm);
e9e1ba3d 459 }
8c5f47b1 460
d4f3695e 461 if (IWL_MVM_PARSE_NVM && read_nvm) {
5bd1d2c1 462 ret = iwl_nvm_init(mvm);
d4f3695e
SS
463 if (ret) {
464 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
465 goto error;
466 }
467 }
468
8c5f47b1 469 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
b3500b47
EG
470 NVM_ACCESS_COMPLETE),
471 CMD_SEND_IN_RFKILL,
8c5f47b1
JB
472 sizeof(nvm_complete), &nvm_complete);
473 if (ret) {
474 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
475 ret);
476 goto error;
477 }
478
479 /* We wait for the INIT complete notification */
e9e1ba3d
SS
480 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
481 MVM_UCODE_ALIVE_TIMEOUT);
482 if (ret)
483 return ret;
484
485 /* Read the NVM only at driver load time, no need to do this twice */
d4f3695e 486 if (!IWL_MVM_PARSE_NVM && read_nvm) {
4c625c56 487 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
c135cb56
ST
488 if (IS_ERR(mvm->nvm_data)) {
489 ret = PTR_ERR(mvm->nvm_data);
490 mvm->nvm_data = NULL;
e9e1ba3d
SS
491 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
492 return ret;
493 }
494 }
495
b3500b47
EG
496 mvm->rfkill_safe_init_done = true;
497
e9e1ba3d 498 return 0;
8c5f47b1
JB
499
500error:
501 iwl_remove_notification(&mvm->notif_wait, &init_wait);
502 return ret;
503}
504
8ca151b5
JB
505static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
506{
507 struct iwl_phy_cfg_cmd phy_cfg_cmd;
702e975d 508 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
8ca151b5
JB
509
510 /* Set parameters */
a0544272 511 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
86a2b204
LC
512
513 /* set flags extra PHY configuration flags from the device's cfg */
514 phy_cfg_cmd.phy_cfg |= cpu_to_le32(mvm->cfg->extra_phy_cfg_flags);
515
8ca151b5
JB
516 phy_cfg_cmd.calib_control.event_trigger =
517 mvm->fw->default_calib[ucode_type].event_trigger;
518 phy_cfg_cmd.calib_control.flow_trigger =
519 mvm->fw->default_calib[ucode_type].flow_trigger;
520
521 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
522 phy_cfg_cmd.phy_cfg);
523
a1022927 524 return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
8ca151b5
JB
525 sizeof(phy_cfg_cmd), &phy_cfg_cmd);
526}
527
8ca151b5
JB
528int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
529{
530 struct iwl_notification_wait calib_wait;
6eb031d2 531 static const u16 init_complete[] = {
8ca151b5
JB
532 INIT_COMPLETE_NOTIF,
533 CALIB_RES_NOTIF_PHY_DB
534 };
535 int ret;
536
7d6222e2 537 if (iwl_mvm_has_unified_ucode(mvm))
8c5f47b1
JB
538 return iwl_run_unified_mvm_ucode(mvm, true);
539
8ca151b5
JB
540 lockdep_assert_held(&mvm->mutex);
541
b3500b47 542 if (WARN_ON_ONCE(mvm->rfkill_safe_init_done))
8ca151b5
JB
543 return 0;
544
545 iwl_init_notification_wait(&mvm->notif_wait,
546 &calib_wait,
547 init_complete,
548 ARRAY_SIZE(init_complete),
549 iwl_wait_phy_db_entry,
550 mvm->phy_db);
551
552 /* Will also start the device */
553 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
554 if (ret) {
555 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
00e0c6c8 556 goto remove_notif;
8ca151b5
JB
557 }
558
b3de3ef4
EG
559 if (mvm->cfg->device_family < IWL_DEVICE_FAMILY_8000) {
560 ret = iwl_mvm_send_bt_init_conf(mvm);
561 if (ret)
00e0c6c8 562 goto remove_notif;
b3de3ef4 563 }
931d4160 564
81a67e32 565 /* Read the NVM only at driver load time, no need to do this twice */
8ca151b5 566 if (read_nvm) {
5bd1d2c1 567 ret = iwl_nvm_init(mvm);
8ca151b5
JB
568 if (ret) {
569 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
00e0c6c8 570 goto remove_notif;
8ca151b5
JB
571 }
572 }
573
81a67e32 574 /* In case we read the NVM from external file, load it to the NIC */
e02a9d60 575 if (mvm->nvm_file_name)
81a67e32
EL
576 iwl_mvm_load_nvm_to_nic(mvm);
577
64866e5d
LC
578 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
579 "Too old NVM version (0x%0x, required = 0x%0x)",
580 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
8ca151b5 581
4f59334b
EH
582 /*
583 * abort after reading the nvm in case RF Kill is on, we will complete
584 * the init seq later when RF kill will switch to off
585 */
1a3fe0b2 586 if (iwl_mvm_is_radio_hw_killed(mvm)) {
4f59334b
EH
587 IWL_DEBUG_RF_KILL(mvm,
588 "jump over all phy activities due to RF kill\n");
00e0c6c8 589 goto remove_notif;
4f59334b
EH
590 }
591
b3500b47 592 mvm->rfkill_safe_init_done = true;
31b8b343 593
e07cbb53 594 /* Send TX valid antennas before triggering calibrations */
a0544272 595 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
e07cbb53 596 if (ret)
00e0c6c8 597 goto remove_notif;
e07cbb53 598
8ca151b5
JB
599 ret = iwl_send_phy_cfg_cmd(mvm);
600 if (ret) {
601 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
602 ret);
00e0c6c8 603 goto remove_notif;
8ca151b5
JB
604 }
605
606 /*
607 * Some things may run in the background now, but we
608 * just wait for the calibration complete notification.
609 */
610 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
00e0c6c8
LC
611 MVM_UCODE_CALIB_TIMEOUT);
612 if (!ret)
613 goto out;
31b8b343 614
00e0c6c8 615 if (iwl_mvm_is_radio_hw_killed(mvm)) {
31b8b343 616 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
00e0c6c8
LC
617 ret = 0;
618 } else {
619 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
620 ret);
31b8b343 621 }
00e0c6c8 622
8ca151b5
JB
623 goto out;
624
00e0c6c8 625remove_notif:
8ca151b5
JB
626 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
627out:
b3500b47 628 mvm->rfkill_safe_init_done = false;
a4082843 629 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
8ca151b5
JB
630 /* we want to debug INIT and we have no NVM - fake */
631 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
632 sizeof(struct ieee80211_channel) +
633 sizeof(struct ieee80211_rate),
634 GFP_KERNEL);
635 if (!mvm->nvm_data)
636 return -ENOMEM;
8ca151b5
JB
637 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
638 mvm->nvm_data->bands[0].n_channels = 1;
639 mvm->nvm_data->bands[0].n_bitrates = 1;
640 mvm->nvm_data->bands[0].bitrates =
641 (void *)mvm->nvm_data->channels + 1;
642 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
643 }
644
645 return ret;
646}
647
84bfffa9
EG
648static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
649{
650 struct iwl_ltr_config_cmd cmd = {
651 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
652 };
653
654 if (!mvm->trans->ltr_enabled)
655 return 0;
656
84bfffa9
EG
657 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
658 sizeof(cmd), &cmd);
659}
660
c386dacb 661#ifdef CONFIG_ACPI
e8698301
AB
662static inline int iwl_mvm_sar_set_profile(struct iwl_mvm *mvm,
663 union acpi_object *table,
664 struct iwl_mvm_sar_profile *profile,
665 bool enabled)
c386dacb
HD
666{
667 int i;
da2830ac 668
c386dacb 669 profile->enabled = enabled;
da2830ac 670
e7a3b8d8 671 for (i = 0; i < ACPI_SAR_TABLE_SIZE; i++) {
c386dacb
HD
672 if ((table[i].type != ACPI_TYPE_INTEGER) ||
673 (table[i].integer.value > U8_MAX))
674 return -EINVAL;
675
676 profile->table[i] = table[i].integer.value;
677 }
678
679 return 0;
680}
681
c386dacb 682static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
da2830ac 683{
813df5ce 684 union acpi_object *wifi_pkg, *table, *data;
c386dacb 685 bool enabled;
da2830ac
LC
686 int ret;
687
813df5ce
LC
688 data = iwl_acpi_get_object(mvm->dev, ACPI_WRDS_METHOD);
689 if (IS_ERR(data))
690 return PTR_ERR(data);
da2830ac 691
2fa388cf
LC
692 wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
693 ACPI_WRDS_WIFI_DATA_SIZE);
c386dacb
HD
694 if (IS_ERR(wifi_pkg)) {
695 ret = PTR_ERR(wifi_pkg);
696 goto out_free;
697 }
698
699 if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) {
700 ret = -EINVAL;
701 goto out_free;
702 }
703
704 enabled = !!(wifi_pkg->package.elements[1].integer.value);
da2830ac 705
c386dacb
HD
706 /* position of the actual table */
707 table = &wifi_pkg->package.elements[2];
708
709 /* The profile from WRDS is officially profile 1, but goes
710 * into sar_profiles[0] (because we don't have a profile 0).
711 */
712 ret = iwl_mvm_sar_set_profile(mvm, table, &mvm->sar_profiles[0],
713 enabled);
c386dacb 714out_free:
813df5ce 715 kfree(data);
da2830ac
LC
716 return ret;
717}
da2830ac 718
69964905
LC
719static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
720{
813df5ce 721 union acpi_object *wifi_pkg, *data;
69964905
LC
722 bool enabled;
723 int i, n_profiles, ret;
724
813df5ce
LC
725 data = iwl_acpi_get_object(mvm->dev, ACPI_EWRD_METHOD);
726 if (IS_ERR(data))
727 return PTR_ERR(data);
69964905 728
2fa388cf
LC
729 wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
730 ACPI_EWRD_WIFI_DATA_SIZE);
69964905
LC
731 if (IS_ERR(wifi_pkg)) {
732 ret = PTR_ERR(wifi_pkg);
733 goto out_free;
734 }
735
736 if ((wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) ||
737 (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER)) {
738 ret = -EINVAL;
739 goto out_free;
740 }
741
742 enabled = !!(wifi_pkg->package.elements[1].integer.value);
743 n_profiles = wifi_pkg->package.elements[2].integer.value;
744
2e1976bb
LC
745 /*
746 * Check the validity of n_profiles. The EWRD profiles start
747 * from index 1, so the maximum value allowed here is
748 * ACPI_SAR_PROFILES_NUM - 1.
749 */
750 if (n_profiles <= 0 || n_profiles >= ACPI_SAR_PROFILE_NUM) {
e2ef1476
SD
751 ret = -EINVAL;
752 goto out_free;
753 }
754
69964905
LC
755 for (i = 0; i < n_profiles; i++) {
756 /* the tables start at element 3 */
757 static int pos = 3;
758
759 /* The EWRD profiles officially go from 2 to 4, but we
760 * save them in sar_profiles[1-3] (because we don't
761 * have profile 0). So in the array we start from 1.
762 */
763 ret = iwl_mvm_sar_set_profile(mvm,
764 &wifi_pkg->package.elements[pos],
765 &mvm->sar_profiles[i + 1],
766 enabled);
767 if (ret < 0)
768 break;
769
770 /* go to the next table */
e7a3b8d8 771 pos += ACPI_SAR_TABLE_SIZE;
69964905
LC
772 }
773
774out_free:
813df5ce 775 kfree(data);
69964905
LC
776 return ret;
777}
778
7fe90e0e 779static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm)
a6bff3cb 780{
813df5ce 781 union acpi_object *wifi_pkg, *data;
7fe90e0e
HD
782 int i, j, ret;
783 int idx = 1;
a6bff3cb 784
813df5ce
LC
785 data = iwl_acpi_get_object(mvm->dev, ACPI_WGDS_METHOD);
786 if (IS_ERR(data))
787 return PTR_ERR(data);
a6bff3cb 788
2fa388cf
LC
789 wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
790 ACPI_WGDS_WIFI_DATA_SIZE);
a6bff3cb
HD
791 if (IS_ERR(wifi_pkg)) {
792 ret = PTR_ERR(wifi_pkg);
793 goto out_free;
794 }
795
e7a3b8d8
LC
796 for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
797 for (j = 0; j < ACPI_GEO_TABLE_SIZE; j++) {
7fe90e0e 798 union acpi_object *entry;
a6bff3cb 799
7fe90e0e
HD
800 entry = &wifi_pkg->package.elements[idx++];
801 if ((entry->type != ACPI_TYPE_INTEGER) ||
aae9d563
CJ
802 (entry->integer.value > U8_MAX)) {
803 ret = -EINVAL;
804 goto out_free;
805 }
a6bff3cb 806
7fe90e0e
HD
807 mvm->geo_profiles[i].values[j] = entry->integer.value;
808 }
a6bff3cb
HD
809 }
810 ret = 0;
811out_free:
813df5ce 812 kfree(data);
a6bff3cb
HD
813 return ret;
814}
815
42ce76d6 816int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
da2830ac 817{
0791c2fc
HD
818 union {
819 struct iwl_dev_tx_power_cmd v5;
820 struct iwl_dev_tx_power_cmd_v4 v4;
821 } cmd;
42ce76d6 822 int i, j, idx;
e7a3b8d8 823 int profs[ACPI_SAR_NUM_CHAIN_LIMITS] = { prof_a, prof_b };
0791c2fc 824 int len;
da2830ac 825
e7a3b8d8
LC
826 BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS < 2);
827 BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS * ACPI_SAR_NUM_SUB_BANDS !=
828 ACPI_SAR_TABLE_SIZE);
42ce76d6 829
0791c2fc
HD
830 cmd.v5.v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS);
831
832 if (fw_has_api(&mvm->fw->ucode_capa,
833 IWL_UCODE_TLV_API_REDUCE_TX_POWER))
834 len = sizeof(cmd.v5);
835 else if (fw_has_capa(&mvm->fw->ucode_capa,
836 IWL_UCODE_TLV_CAPA_TX_POWER_ACK))
837 len = sizeof(cmd.v4);
838 else
839 len = sizeof(cmd.v4.v3);
55bfa4b9 840
e7a3b8d8 841 for (i = 0; i < ACPI_SAR_NUM_CHAIN_LIMITS; i++) {
42ce76d6 842 struct iwl_mvm_sar_profile *prof;
da2830ac 843
42ce76d6
LC
844 /* don't allow SAR to be disabled (profile 0 means disable) */
845 if (profs[i] == 0)
846 return -EPERM;
da2830ac 847
e7a3b8d8
LC
848 /* we are off by one, so allow up to ACPI_SAR_PROFILE_NUM */
849 if (profs[i] > ACPI_SAR_PROFILE_NUM)
42ce76d6 850 return -EINVAL;
da2830ac 851
42ce76d6
LC
852 /* profiles go from 1 to 4, so decrement to access the array */
853 prof = &mvm->sar_profiles[profs[i] - 1];
854
855 /* if the profile is disabled, do nothing */
856 if (!prof->enabled) {
857 IWL_DEBUG_RADIO(mvm, "SAR profile %d is disabled.\n",
858 profs[i]);
859 /* if one of the profiles is disabled, we fail all */
860 return -ENOENT;
861 }
da2830ac 862
da2830ac 863 IWL_DEBUG_RADIO(mvm, " Chain[%d]:\n", i);
e7a3b8d8
LC
864 for (j = 0; j < ACPI_SAR_NUM_SUB_BANDS; j++) {
865 idx = (i * ACPI_SAR_NUM_SUB_BANDS) + j;
0791c2fc 866 cmd.v5.v3.per_chain_restriction[i][j] =
42ce76d6 867 cpu_to_le16(prof->table[idx]);
da2830ac 868 IWL_DEBUG_RADIO(mvm, " Band[%d] = %d * .125dBm\n",
42ce76d6 869 j, prof->table[idx]);
da2830ac
LC
870 }
871 }
872
42ce76d6
LC
873 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
874
875 return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
876}
877
7fe90e0e
HD
878int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
879{
880 struct iwl_geo_tx_power_profiles_resp *resp;
881 int ret;
882
883 struct iwl_geo_tx_power_profiles_cmd geo_cmd = {
884 .ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE),
885 };
886 struct iwl_host_cmd cmd = {
887 .id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
888 .len = { sizeof(geo_cmd), },
889 .flags = CMD_WANT_SKB,
890 .data = { &geo_cmd },
891 };
892
893 ret = iwl_mvm_send_cmd(mvm, &cmd);
894 if (ret) {
895 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
896 return ret;
897 }
898
899 resp = (void *)cmd.resp_pkt->data;
900 ret = le32_to_cpu(resp->profile_idx);
e7a3b8d8 901 if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES)) {
7fe90e0e
HD
902 ret = -EIO;
903 IWL_WARN(mvm, "Invalid geographic profile idx (%d)\n", ret);
904 }
905
906 iwl_free_resp(&cmd);
907 return ret;
908}
909
a6bff3cb
HD
910static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
911{
a6bff3cb
HD
912 struct iwl_geo_tx_power_profiles_cmd cmd = {
913 .ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES),
914 };
7fe90e0e 915 int ret, i, j;
a6bff3cb
HD
916 u16 cmd_wide_id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT);
917
eca1e56c
EG
918 /*
919 * This command is not supported on earlier firmware versions.
920 * Unfortunately, we don't have a TLV API flag to rely on, so
921 * rely on the major version which is in the first byte of
922 * ucode_ver.
923 */
924 if (IWL_UCODE_SERIAL(mvm->fw->ucode_ver) < 41)
925 return 0;
926
7fe90e0e 927 ret = iwl_mvm_sar_get_wgds_table(mvm);
a6bff3cb
HD
928 if (ret < 0) {
929 IWL_DEBUG_RADIO(mvm,
930 "Geo SAR BIOS table invalid or unavailable. (%d)\n",
931 ret);
932 /* we don't fail if the table is not available */
933 return 0;
934 }
935
936 IWL_DEBUG_RADIO(mvm, "Sending GEO_TX_POWER_LIMIT\n");
937
e7a3b8d8 938 BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES * ACPI_WGDS_NUM_BANDS *
66e83903 939 ACPI_WGDS_TABLE_SIZE + 1 != ACPI_WGDS_WIFI_DATA_SIZE);
a6bff3cb 940
e7a3b8d8
LC
941 BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES > IWL_NUM_GEO_PROFILES);
942
943 for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
a6bff3cb
HD
944 struct iwl_per_chain_offset *chain =
945 (struct iwl_per_chain_offset *)&cmd.table[i];
946
947 for (j = 0; j < ACPI_WGDS_NUM_BANDS; j++) {
948 u8 *value;
949
7fe90e0e 950 value = &mvm->geo_profiles[i].values[j *
e7a3b8d8 951 ACPI_GEO_PER_CHAIN_SIZE];
a6bff3cb
HD
952 chain[j].max_tx_power = cpu_to_le16(value[0]);
953 chain[j].chain_a = value[1];
954 chain[j].chain_b = value[2];
955 IWL_DEBUG_RADIO(mvm,
956 "SAR geographic profile[%d] Band[%d]: chain A = %d chain B = %d max_tx_power = %d\n",
957 i, j, value[1], value[2], value[0]);
958 }
959 }
960 return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0, sizeof(cmd), &cmd);
961}
962
69964905
LC
963#else /* CONFIG_ACPI */
964static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
965{
966 return -ENOENT;
967}
968
969static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
970{
971 return -ENOENT;
972}
a6bff3cb 973
5d041c46
LC
974static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm)
975{
976 return -ENOENT;
977}
978
a6bff3cb
HD
979static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
980{
981 return 0;
982}
18f1755d
LC
983
984int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a,
985 int prof_b)
986{
987 return -ENOENT;
988}
989
990int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
991{
992 return -ENOENT;
993}
69964905
LC
994#endif /* CONFIG_ACPI */
995
f130bb75
MG
996void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
997{
998 u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
999 int ret;
1000 u32 resp;
1001
1002 struct iwl_fw_error_recovery_cmd recovery_cmd = {
1003 .flags = cpu_to_le32(flags),
1004 .buf_size = 0,
1005 };
1006 struct iwl_host_cmd host_cmd = {
1007 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1008 .flags = CMD_WANT_SKB,
1009 .data = {&recovery_cmd, },
1010 .len = {sizeof(recovery_cmd), },
1011 };
1012
1013 /* no error log was defined in TLV */
1014 if (!error_log_size)
1015 return;
1016
1017 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1018 /* no buf was allocated while HW reset */
1019 if (!mvm->error_recovery_buf)
1020 return;
1021
1022 host_cmd.data[1] = mvm->error_recovery_buf;
1023 host_cmd.len[1] = error_log_size;
1024 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1025 recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1026 }
1027
1028 ret = iwl_mvm_send_cmd(mvm, &host_cmd);
1029 kfree(mvm->error_recovery_buf);
1030 mvm->error_recovery_buf = NULL;
1031
1032 if (ret) {
1033 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1034 return;
1035 }
1036
1037 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1038 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1039 resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data);
1040 if (resp)
1041 IWL_ERR(mvm,
1042 "Failed to send recovery cmd blob was invalid %d\n",
1043 resp);
1044 }
1045}
1046
42ce76d6
LC
1047static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1048{
1049 int ret;
1050
1051 ret = iwl_mvm_sar_get_wrds_table(mvm);
1052 if (ret < 0) {
1053 IWL_DEBUG_RADIO(mvm,
69964905 1054 "WRDS SAR BIOS table invalid or unavailable. (%d)\n",
42ce76d6 1055 ret);
5d041c46
LC
1056 /*
1057 * If not available, don't fail and don't bother with EWRD.
1058 * Return 1 to tell that we can't use WGDS either.
1059 */
1060 return 1;
42ce76d6
LC
1061 }
1062
69964905
LC
1063 ret = iwl_mvm_sar_get_ewrd_table(mvm);
1064 /* if EWRD is not available, we can still use WRDS, so don't fail */
1065 if (ret < 0)
1066 IWL_DEBUG_RADIO(mvm,
1067 "EWRD SAR BIOS table invalid or unavailable. (%d)\n",
1068 ret);
1069
42ce76d6
LC
1070 /* choose profile 1 (WRDS) as default for both chains */
1071 ret = iwl_mvm_sar_select_profile(mvm, 1, 1);
1072
5d041c46
LC
1073 /*
1074 * If we don't have profile 0 from BIOS, just skip it. This
1075 * means that SAR Geo will not be enabled either, even if we
1076 * have other valid profiles.
1077 */
42ce76d6 1078 if (ret == -ENOENT)
5d041c46 1079 return 1;
da2830ac
LC
1080
1081 return ret;
1082}
1083
1f370650 1084static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
8ca151b5 1085{
1f370650 1086 int ret;
8ca151b5 1087
7d6222e2 1088 if (iwl_mvm_has_unified_ucode(mvm))
1f370650 1089 return iwl_run_unified_mvm_ucode(mvm, false);
8ca151b5 1090
8d193ca2 1091 ret = iwl_run_init_mvm_ucode(mvm, false);
f2082a53 1092
f2082a53 1093 if (ret) {
8d193ca2 1094 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
f4744258
LK
1095
1096 if (iwlmvm_mod_params.init_dbg)
1097 return 0;
1f370650 1098 return ret;
8d193ca2 1099 }
8ca151b5 1100
f2082a53
SS
1101 /*
1102 * Stop and start the transport without entering low power
1103 * mode. This will save the state of other components on the
1104 * device that are triggered by the INIT firwmare (MFUART).
1105 */
1106 _iwl_trans_stop_device(mvm->trans, false);
1107 ret = _iwl_trans_start_hw(mvm->trans, false);
1108 if (ret)
1f370650 1109 return ret;
8ca151b5 1110
da2eb669
SS
1111 iwl_fw_dbg_apply_point(&mvm->fwrt, IWL_FW_INI_APPLY_EARLY);
1112
8ca151b5 1113 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1f370650
SS
1114 if (ret)
1115 return ret;
1116
da2eb669
SS
1117 iwl_fw_dbg_apply_point(&mvm->fwrt, IWL_FW_INI_APPLY_AFTER_ALIVE);
1118
702e975d 1119 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
1f370650
SS
1120}
1121
1122int iwl_mvm_up(struct iwl_mvm *mvm)
1123{
1124 int ret, i;
1125 struct ieee80211_channel *chan;
1126 struct cfg80211_chan_def chandef;
1127
1128 lockdep_assert_held(&mvm->mutex);
1129
1130 ret = iwl_trans_start_hw(mvm->trans);
1131 if (ret)
1132 return ret;
1133
1134 ret = iwl_mvm_load_rt_fw(mvm);
8ca151b5
JB
1135 if (ret) {
1136 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
72d3c7bb
JB
1137 if (ret != -ERFKILL)
1138 iwl_fw_dbg_error_collect(&mvm->fwrt,
1139 FW_DBG_TRIGGER_DRIVER);
8ca151b5
JB
1140 goto error;
1141 }
1142
d0b813fc 1143 iwl_get_shared_mem_conf(&mvm->fwrt);
04fd2c28 1144
1f3b0ff8
LE
1145 ret = iwl_mvm_sf_update(mvm, NULL, false);
1146 if (ret)
1147 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1148
7a14c23d
SS
1149 if (!mvm->trans->ini_valid) {
1150 mvm->fwrt.dump.conf = FW_DBG_INVALID;
1151 /* if we have a destination, assume EARLY START */
1152 if (mvm->fw->dbg.dest_tlv)
1153 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
1154 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
1155 }
6a951267 1156
a0544272 1157 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
8ca151b5
JB
1158 if (ret)
1159 goto error;
1160
7d6222e2
JB
1161 if (!iwl_mvm_has_unified_ucode(mvm)) {
1162 /* Send phy db control command and then phy db calibration */
1f370650
SS
1163 ret = iwl_send_phy_db_data(mvm->phy_db);
1164 if (ret)
1165 goto error;
8ca151b5 1166
1f370650
SS
1167 ret = iwl_send_phy_cfg_cmd(mvm);
1168 if (ret)
1169 goto error;
1170 }
8ca151b5 1171
b3de3ef4
EG
1172 ret = iwl_mvm_send_bt_init_conf(mvm);
1173 if (ret)
1174 goto error;
1175
43413a97 1176 /* Init RSS configuration */
8edbfaa1
SS
1177 if (mvm->trans->cfg->device_family >= IWL_DEVICE_FAMILY_22000) {
1178 ret = iwl_configure_rxq(mvm);
1179 if (ret) {
1180 IWL_ERR(mvm, "Failed to configure RX queues: %d\n",
1181 ret);
1182 goto error;
1183 }
1184 }
1185
1186 if (iwl_mvm_has_new_rx_api(mvm)) {
43413a97
SS
1187 ret = iwl_send_rss_cfg_cmd(mvm);
1188 if (ret) {
1189 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1190 ret);
1191 goto error;
1192 }
1193 }
1194
8ca151b5 1195 /* init the fw <-> mac80211 STA mapping */
0ae98812 1196 for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
8ca151b5
JB
1197 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1198
0ae98812 1199 mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1d3c3f63 1200
b2b7875b
JB
1201 /* reset quota debouncing buffer - 0xff will yield invalid data */
1202 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1203
c8f54701
JB
1204 ret = iwl_mvm_send_dqa_cmd(mvm);
1205 if (ret)
1206 goto error;
97d5be7e 1207
8ca151b5
JB
1208 /* Add auxiliary station for scanning */
1209 ret = iwl_mvm_add_aux_sta(mvm);
1210 if (ret)
1211 goto error;
1212
53a9d61e 1213 /* Add all the PHY contexts */
57fbcce3 1214 chan = &mvm->hw->wiphy->bands[NL80211_BAND_2GHZ]->channels[0];
53a9d61e
IP
1215 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1216 for (i = 0; i < NUM_PHY_CTX; i++) {
1217 /*
1218 * The channel used here isn't relevant as it's
1219 * going to be overwritten in the other flows.
1220 * For now use the first channel we have.
1221 */
1222 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1223 &chandef, 1, 1);
1224 if (ret)
1225 goto error;
1226 }
8ca151b5 1227
c221daf2
CRI
1228#ifdef CONFIG_THERMAL
1229 if (iwl_mvm_is_tt_in_fw(mvm)) {
1230 /* in order to give the responsibility of ct-kill and
1231 * TX backoff to FW we need to send empty temperature reporting
1232 * cmd during init time
1233 */
1234 iwl_mvm_send_temp_report_ths_cmd(mvm);
1235 } else {
1236 /* Initialize tx backoffs to the minimal possible */
1237 iwl_mvm_tt_tx_backoff(mvm, 0);
1238 }
5c89e7bc
CRI
1239
1240 /* TODO: read the budget from BIOS / Platform NVM */
944eafc2
CRI
1241
1242 /*
1243 * In case there is no budget from BIOS / Platform NVM the default
1244 * budget should be 2000mW (cooling state 0).
1245 */
1246 if (iwl_mvm_is_ctdp_supported(mvm)) {
5c89e7bc
CRI
1247 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1248 mvm->cooling_dev.cur_state);
75cfe338
LC
1249 if (ret)
1250 goto error;
1251 }
c221daf2 1252#else
0c0e2c71
IY
1253 /* Initialize tx backoffs to the minimal possible */
1254 iwl_mvm_tt_tx_backoff(mvm, 0);
c221daf2 1255#endif
0c0e2c71 1256
84bfffa9 1257 WARN_ON(iwl_mvm_config_ltr(mvm));
9180ac50 1258
c1cb92fc 1259 ret = iwl_mvm_power_update_device(mvm);
64b928c4
AB
1260 if (ret)
1261 goto error;
1262
35af15d1
AN
1263 /*
1264 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1265 * anyway, so don't init MCC.
1266 */
1267 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1268 ret = iwl_mvm_init_mcc(mvm);
1269 if (ret)
1270 goto error;
1271 }
90d4f7db 1272
859d914c 1273 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
4ca87a5f 1274 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
b66b5817 1275 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
d2496221
DS
1276 ret = iwl_mvm_config_scan(mvm);
1277 if (ret)
1278 goto error;
1279 }
1280
7498cf4c
EP
1281 /* allow FW/transport low power modes if not during restart */
1282 if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1283 iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN);
1284
f130bb75
MG
1285 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1286 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1287
48e775e6
HD
1288 if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid))
1289 IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n");
1290
da2830ac 1291 ret = iwl_mvm_sar_init(mvm);
5d041c46
LC
1292 if (ret == 0) {
1293 ret = iwl_mvm_sar_geo_init(mvm);
1294 } else if (ret > 0 && !iwl_mvm_sar_get_wgds_table(mvm)) {
1295 /*
1296 * If basic SAR is not available, we check for WGDS,
1297 * which should *not* be available either. If it is
1298 * available, issue an error, because we can't use SAR
1299 * Geo without basic SAR.
1300 */
1301 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
1302 }
da2830ac 1303
5d041c46 1304 if (ret < 0)
a6bff3cb
HD
1305 goto error;
1306
7089ae63
JB
1307 iwl_mvm_leds_sync(mvm);
1308
53a9d61e 1309 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
8ca151b5
JB
1310 return 0;
1311 error:
f4744258 1312 if (!iwlmvm_mod_params.init_dbg || !ret)
de8ba41b 1313 iwl_mvm_stop_device(mvm);
8ca151b5
JB
1314 return ret;
1315}
1316
1317int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1318{
1319 int ret, i;
1320
1321 lockdep_assert_held(&mvm->mutex);
1322
1323 ret = iwl_trans_start_hw(mvm->trans);
1324 if (ret)
1325 return ret;
1326
1327 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1328 if (ret) {
1329 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1330 goto error;
1331 }
1332
a0544272 1333 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
8ca151b5
JB
1334 if (ret)
1335 goto error;
1336
1337 /* Send phy db control command and then phy db calibration*/
1338 ret = iwl_send_phy_db_data(mvm->phy_db);
1339 if (ret)
1340 goto error;
1341
1342 ret = iwl_send_phy_cfg_cmd(mvm);
1343 if (ret)
1344 goto error;
1345
1346 /* init the fw <-> mac80211 STA mapping */
0ae98812 1347 for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
8ca151b5
JB
1348 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1349
1350 /* Add auxiliary station for scanning */
1351 ret = iwl_mvm_add_aux_sta(mvm);
1352 if (ret)
1353 goto error;
1354
1355 return 0;
1356 error:
fcb6b92a 1357 iwl_mvm_stop_device(mvm);
8ca151b5
JB
1358 return ret;
1359}
1360
0416841d
JB
1361void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1362 struct iwl_rx_cmd_buffer *rxb)
8ca151b5
JB
1363{
1364 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1365 struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1366 u32 flags = le32_to_cpu(card_state_notif->flags);
1367
1368 IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1369 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1370 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1371 (flags & CT_KILL_CARD_DISABLED) ?
1372 "Reached" : "Not reached");
8ca151b5
JB
1373}
1374
0416841d
JB
1375void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1376 struct iwl_rx_cmd_buffer *rxb)
30269c12
CRI
1377{
1378 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1379 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1380
0c8d0a47
GBA
1381 IWL_DEBUG_INFO(mvm,
1382 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1383 le32_to_cpu(mfuart_notif->installed_ver),
1384 le32_to_cpu(mfuart_notif->external_ver),
1385 le32_to_cpu(mfuart_notif->status),
1386 le32_to_cpu(mfuart_notif->duration));
1387
19f63c53
GBA
1388 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
1389 IWL_DEBUG_INFO(mvm,
0c8d0a47 1390 "MFUART: image size: 0x%08x\n",
19f63c53 1391 le32_to_cpu(mfuart_notif->image_size));
30269c12 1392}