iwlwifi: mvm: fw: clean up hcmd struct creation
[linux-2.6-block.git] / drivers / net / wireless / intel / iwlwifi / mvm / fw.c
CommitLineData
8e99ea8d
JB
1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2/*
4f7411d6 3 * Copyright (C) 2012-2014, 2018-2021 Intel Corporation
8e99ea8d
JB
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
8ca151b5 7#include <net/mac80211.h>
854d773e 8#include <linux/netdevice.h>
a2ac0f48 9#include <linux/dmi.h>
8ca151b5
JB
10
11#include "iwl-trans.h"
12#include "iwl-op-mode.h"
d962f9b1 13#include "fw/img.h"
8ca151b5 14#include "iwl-debug.h"
8c23f95c 15#include "iwl-prph.h"
813df5ce 16#include "fw/acpi.h"
b3e4c0f3 17#include "fw/pnvm.h"
8ca151b5
JB
18
19#include "mvm.h"
7174beb6 20#include "fw/dbg.h"
8ca151b5 21#include "iwl-phy-db.h"
9c4f7d51
ST
22#include "iwl-modparams.h"
23#include "iwl-nvm-parse.h"
8ca151b5 24
b3e4c0f3
LC
25#define MVM_UCODE_ALIVE_TIMEOUT (HZ)
26#define MVM_UCODE_CALIB_TIMEOUT (2 * HZ)
8ca151b5
JB
27
28#define UCODE_VALID_OK cpu_to_le32(0x1)
29
e12cfc7b
MK
30#define IWL_PPAG_MASK 3
31#define IWL_PPAG_ETSI_MASK BIT(0)
32
c3f40c3e
MK
33#define IWL_TAS_US_MCC 0x5553
34#define IWL_TAS_CANADA_MCC 0x4341
35
8ca151b5
JB
36struct iwl_mvm_alive_data {
37 bool valid;
38 u32 scd_base_addr;
39};
40
8ca151b5
JB
41static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
42{
43 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
44 .valid = cpu_to_le32(valid_tx_ant),
45 };
46
33223542 47 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
a1022927 48 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
8ca151b5
JB
49 sizeof(tx_ant_cmd), &tx_ant_cmd);
50}
51
43413a97
SS
52static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
53{
54 int i;
55 struct iwl_rss_config_cmd cmd = {
56 .flags = cpu_to_le32(IWL_RSS_ENABLE),
608dce95
SS
57 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
58 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
59 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
60 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
61 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
62 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
43413a97
SS
63 };
64
f43495fd
SS
65 if (mvm->trans->num_rx_queues == 1)
66 return 0;
67
854d773e 68 /* Do not direct RSS traffic to Q 0 which is our fallback queue */
43413a97 69 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
854d773e
SS
70 cmd.indirection_table[i] =
71 1 + (i % (mvm->trans->num_rx_queues - 1));
72 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
43413a97
SS
73
74 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
75}
76
97d5be7e
LK
77static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
78{
79 struct iwl_dqa_enable_cmd dqa_cmd = {
80 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
81 };
f0c86427 82 u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD);
97d5be7e
LK
83 int ret;
84
85 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
86 if (ret)
87 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
88 else
89 IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
90
91 return ret;
92}
93
bdccdb85
GBA
94void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
95 struct iwl_rx_cmd_buffer *rxb)
96{
97 struct iwl_rx_packet *pkt = rxb_addr(rxb);
98 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
99 __le32 *dump_data = mfu_dump_notif->data;
100 int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
101 int i;
102
103 if (mfu_dump_notif->index_num == 0)
104 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
105 le32_to_cpu(mfu_dump_notif->assert_id));
106
107 for (i = 0; i < n_words; i++)
108 IWL_DEBUG_INFO(mvm,
109 "MFUART assert dump, dword %u: 0x%08x\n",
110 le16_to_cpu(mfu_dump_notif->index_num) *
111 n_words + i,
112 le32_to_cpu(dump_data[i]));
113}
114
8ca151b5
JB
115static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
116 struct iwl_rx_packet *pkt, void *data)
117{
fd1c3318 118 unsigned int pkt_len = iwl_rx_packet_payload_len(pkt);
8ca151b5
JB
119 struct iwl_mvm *mvm =
120 container_of(notif_wait, struct iwl_mvm, notif_wait);
121 struct iwl_mvm_alive_data *alive_data = data;
5c228d63
SS
122 struct iwl_umac_alive *umac;
123 struct iwl_lmac_alive *lmac1;
124 struct iwl_lmac_alive *lmac2 = NULL;
125 u16 status;
cfa5d0ca 126 u32 lmac_error_event_table, umac_error_table;
708d8c53
JB
127 u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP,
128 UCODE_ALIVE_NTFY, 0);
01a9ca51 129
90824f2f
LC
130 /*
131 * For v5 and above, we can check the version, for older
132 * versions we need to check the size.
133 */
708d8c53
JB
134 if (version == 5 || version == 6) {
135 /* v5 and v6 are compatible (only IMR addition) */
90824f2f
LC
136 struct iwl_alive_ntf_v5 *palive;
137
fd1c3318
JB
138 if (pkt_len < sizeof(*palive))
139 return false;
140
90824f2f
LC
141 palive = (void *)pkt->data;
142 umac = &palive->umac_data;
143 lmac1 = &palive->lmac_data[0];
144 lmac2 = &palive->lmac_data[1];
145 status = le16_to_cpu(palive->status);
146
147 mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]);
148 mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]);
149 mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]);
150
151 IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n",
152 mvm->trans->sku_id[0],
153 mvm->trans->sku_id[1],
154 mvm->trans->sku_id[2]);
155 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) {
9422b978
LC
156 struct iwl_alive_ntf_v4 *palive;
157
fd1c3318
JB
158 if (pkt_len < sizeof(*palive))
159 return false;
160
5c228d63
SS
161 palive = (void *)pkt->data;
162 umac = &palive->umac_data;
163 lmac1 = &palive->lmac_data[0];
164 lmac2 = &palive->lmac_data[1];
165 status = le16_to_cpu(palive->status);
9422b978
LC
166 } else if (iwl_rx_packet_payload_len(pkt) ==
167 sizeof(struct iwl_alive_ntf_v3)) {
168 struct iwl_alive_ntf_v3 *palive3;
169
fd1c3318
JB
170 if (pkt_len < sizeof(*palive3))
171 return false;
172
5c228d63
SS
173 palive3 = (void *)pkt->data;
174 umac = &palive3->umac_data;
175 lmac1 = &palive3->lmac_data;
176 status = le16_to_cpu(palive3->status);
9422b978
LC
177 } else {
178 WARN(1, "unsupported alive notification (size %d)\n",
179 iwl_rx_packet_payload_len(pkt));
180 /* get timeout later */
181 return false;
5c228d63 182 }
01a9ca51 183
22463857
SM
184 lmac_error_event_table =
185 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
186 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
187
5c228d63 188 if (lmac2)
91c28b83 189 mvm->trans->dbg.lmac_error_event_table[1] =
22463857 190 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
ffa70264 191
4f7411d6
RG
192 umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) &
193 ~FW_ADDR_CACHE_CONTROL;
cfa5d0ca
MG
194
195 if (umac_error_table) {
196 if (umac_error_table >=
197 mvm->trans->cfg->min_umac_error_event_table) {
198 iwl_fw_umac_set_alive_err_table(mvm->trans,
199 umac_error_table);
200 } else {
201 IWL_ERR(mvm,
202 "Not valid error log pointer 0x%08X for %s uCode\n",
203 umac_error_table,
204 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
205 "Init" : "RT");
206 }
3485e76e 207 }
fb5b2846 208
22463857 209 alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr);
5c228d63 210 alive_data->valid = status == IWL_ALIVE_STATUS_OK;
7e1223b5 211
5c228d63
SS
212 IWL_DEBUG_FW(mvm,
213 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
214 status, lmac1->ver_type, lmac1->ver_subtype);
7e1223b5 215
5c228d63
SS
216 if (lmac2)
217 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
7e1223b5 218
5c228d63
SS
219 IWL_DEBUG_FW(mvm,
220 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
221 le32_to_cpu(umac->umac_major),
222 le32_to_cpu(umac->umac_minor));
8ca151b5 223
0a3a3e9e
SM
224 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
225
8ca151b5
JB
226 return true;
227}
228
1f370650
SS
229static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
230 struct iwl_rx_packet *pkt, void *data)
231{
232 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
233
234 return true;
235}
236
8ca151b5
JB
237static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
238 struct iwl_rx_packet *pkt, void *data)
239{
240 struct iwl_phy_db *phy_db = data;
241
242 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
243 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
244 return true;
245 }
246
ce1f2778 247 WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
8ca151b5
JB
248
249 return false;
250}
251
252static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
253 enum iwl_ucode_type ucode_type)
254{
255 struct iwl_notification_wait alive_wait;
94a8d87c 256 struct iwl_mvm_alive_data alive_data = {};
8ca151b5 257 const struct fw_img *fw;
cfbc6c4c 258 int ret;
702e975d 259 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
9422b978 260 static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY };
b3500b47
EG
261 bool run_in_rfkill =
262 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
8ca151b5 263
61df750c 264 if (ucode_type == IWL_UCODE_REGULAR &&
3d2d4422
GBA
265 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
266 !(fw_has_capa(&mvm->fw->ucode_capa,
267 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
612da1ef 268 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
61df750c 269 else
612da1ef 270 fw = iwl_get_ucode_image(mvm->fw, ucode_type);
befe9b6f 271 if (WARN_ON(!fw))
8ca151b5 272 return -EINVAL;
702e975d 273 iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
65b280fe 274 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
8ca151b5
JB
275
276 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
277 alive_cmd, ARRAY_SIZE(alive_cmd),
278 iwl_alive_fn, &alive_data);
279
b3500b47
EG
280 /*
281 * We want to load the INIT firmware even in RFKILL
282 * For the unified firmware case, the ucode_type is not
283 * INIT, but we still need to run it.
284 */
285 ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill);
8ca151b5 286 if (ret) {
702e975d 287 iwl_fw_set_current_image(&mvm->fwrt, old_type);
8ca151b5
JB
288 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
289 return ret;
290 }
291
292 /*
293 * Some things may run in the background now, but we
294 * just wait for the ALIVE notification here.
295 */
296 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
297 MVM_UCODE_ALIVE_TIMEOUT);
298 if (ret) {
d6be9c1d
SS
299 struct iwl_trans *trans = mvm->trans;
300
5667ccc2 301 /* SecBoot info */
20f5aef5
JB
302 if (trans->trans_cfg->device_family >=
303 IWL_DEVICE_FAMILY_22000) {
d6be9c1d
SS
304 IWL_ERR(mvm,
305 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
ea695b7c
ST
306 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
307 iwl_read_umac_prph(trans,
308 UMAG_SB_CPU_2_STATUS));
5667ccc2
MG
309 } else if (trans->trans_cfg->device_family >=
310 IWL_DEVICE_FAMILY_8000) {
311 IWL_ERR(mvm,
312 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
313 iwl_read_prph(trans, SB_CPU_1_STATUS),
314 iwl_read_prph(trans, SB_CPU_2_STATUS));
315 }
316
317 /* LMAC/UMAC PC info */
318 if (trans->trans_cfg->device_family >=
319 IWL_DEVICE_FAMILY_9000) {
20f5aef5
JB
320 IWL_ERR(mvm, "UMAC PC: 0x%x\n",
321 iwl_read_umac_prph(trans,
322 UREG_UMAC_CURRENT_PC));
323 IWL_ERR(mvm, "LMAC PC: 0x%x\n",
324 iwl_read_umac_prph(trans,
325 UREG_LMAC1_CURRENT_PC));
326 if (iwl_mvm_is_cdb_supported(mvm))
327 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
328 iwl_read_umac_prph(trans,
329 UREG_LMAC2_CURRENT_PC));
20f5aef5
JB
330 }
331
332 if (ret == -ETIMEDOUT)
333 iwl_fw_dbg_error_collect(&mvm->fwrt,
334 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
335
702e975d 336 iwl_fw_set_current_image(&mvm->fwrt, old_type);
8ca151b5
JB
337 return ret;
338 }
339
340 if (!alive_data.valid) {
341 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
702e975d 342 iwl_fw_set_current_image(&mvm->fwrt, old_type);
8ca151b5
JB
343 return -EIO;
344 }
345
b3e4c0f3 346 ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait);
70d3ca86
LC
347 if (ret) {
348 IWL_ERR(mvm, "Timeout waiting for PNVM load!\n");
349 iwl_fw_set_current_image(&mvm->fwrt, old_type);
350 return ret;
351 }
352
8ca151b5
JB
353 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
354
355 /*
356 * Note: all the queues are enabled as part of the interface
357 * initialization, but in firmware restart scenarios they
358 * could be stopped, so wake them up. In firmware restart,
359 * mac80211 will have the queues stopped as well until the
360 * reconfiguration completes. During normal startup, they
361 * will be empty.
362 */
363
4ecafae9 364 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
1c14089e
JB
365 /*
366 * Set a 'fake' TID for the command queue, since we use the
367 * hweight() of the tid_bitmap as a refcount now. Not that
368 * we ever even consider the command queue as one we might
369 * want to reuse, but be safe nevertheless.
370 */
371 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
372 BIT(IWL_MAX_TID_COUNT + 2);
8ca151b5 373
65b280fe 374 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
f7805b33
LC
375#ifdef CONFIG_IWLWIFI_DEBUGFS
376 iwl_fw_set_dbg_rec_on(&mvm->fwrt);
377#endif
8ca151b5 378
d3d9b4fc
EG
379 /*
380 * All the BSSes in the BSS table include the GP2 in the system
381 * at the beacon Rx time, this is of course no longer relevant
382 * since we are resetting the firmware.
383 * Purge all the BSS table.
384 */
385 cfg80211_bss_flush(mvm->hw->wiphy);
386
8ca151b5
JB
387 return 0;
388}
8ca151b5 389
52b15521 390static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm)
8c5f47b1
JB
391{
392 struct iwl_notification_wait init_wait;
393 struct iwl_nvm_access_complete_cmd nvm_complete = {};
394 struct iwl_init_extended_cfg_cmd init_cfg = {
395 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
396 };
397 static const u16 init_complete[] = {
398 INIT_COMPLETE_NOTIF,
399 };
400 int ret;
401
a4584729
HD
402 if (mvm->trans->cfg->tx_with_siso_diversity)
403 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
404
8c5f47b1
JB
405 lockdep_assert_held(&mvm->mutex);
406
94022562
EG
407 mvm->rfkill_safe_init_done = false;
408
8c5f47b1
JB
409 iwl_init_notification_wait(&mvm->notif_wait,
410 &init_wait,
411 init_complete,
412 ARRAY_SIZE(init_complete),
413 iwl_wait_init_complete,
414 NULL);
415
b108d8c7 416 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
86ce5c74 417
8c5f47b1
JB
418 /* Will also start the device */
419 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
420 if (ret) {
421 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
422 goto error;
423 }
b108d8c7
SM
424 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
425 NULL);
8c5f47b1
JB
426
427 /* Send init config command to mark that we are sending NVM access
428 * commands
429 */
430 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
b3500b47
EG
431 INIT_EXTENDED_CFG_CMD),
432 CMD_SEND_IN_RFKILL,
8c5f47b1
JB
433 sizeof(init_cfg), &init_cfg);
434 if (ret) {
435 IWL_ERR(mvm, "Failed to run init config command: %d\n",
436 ret);
437 goto error;
438 }
439
e9e1ba3d
SS
440 /* Load NVM to NIC if needed */
441 if (mvm->nvm_file_name) {
9ce505fe
AN
442 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
443 mvm->nvm_sections);
444 if (ret)
445 goto error;
446 ret = iwl_mvm_load_nvm_to_nic(mvm);
447 if (ret)
448 goto error;
e9e1ba3d 449 }
8c5f47b1 450
52b15521 451 if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
5bd1d2c1 452 ret = iwl_nvm_init(mvm);
d4f3695e
SS
453 if (ret) {
454 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
455 goto error;
456 }
457 }
458
8c5f47b1 459 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
b3500b47
EG
460 NVM_ACCESS_COMPLETE),
461 CMD_SEND_IN_RFKILL,
8c5f47b1
JB
462 sizeof(nvm_complete), &nvm_complete);
463 if (ret) {
464 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
465 ret);
466 goto error;
467 }
468
469 /* We wait for the INIT complete notification */
e9e1ba3d
SS
470 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
471 MVM_UCODE_ALIVE_TIMEOUT);
472 if (ret)
473 return ret;
474
475 /* Read the NVM only at driver load time, no need to do this twice */
52b15521 476 if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
4c625c56 477 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
c135cb56
ST
478 if (IS_ERR(mvm->nvm_data)) {
479 ret = PTR_ERR(mvm->nvm_data);
480 mvm->nvm_data = NULL;
e9e1ba3d
SS
481 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
482 return ret;
483 }
484 }
485
b3500b47
EG
486 mvm->rfkill_safe_init_done = true;
487
e9e1ba3d 488 return 0;
8c5f47b1
JB
489
490error:
491 iwl_remove_notification(&mvm->notif_wait, &init_wait);
492 return ret;
493}
494
c4ace426
GA
495#ifdef CONFIG_ACPI
496static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
497 struct iwl_phy_specific_cfg *phy_filters)
498{
499 /*
500 * TODO: read specific phy config from BIOS
501 * ACPI table for this feature has not been defined yet,
502 * so for now we use hardcoded values.
503 */
504
505 if (IWL_MVM_PHY_FILTER_CHAIN_A) {
506 phy_filters->filter_cfg_chain_a =
507 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_A);
508 }
509 if (IWL_MVM_PHY_FILTER_CHAIN_B) {
510 phy_filters->filter_cfg_chain_b =
511 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_B);
512 }
513 if (IWL_MVM_PHY_FILTER_CHAIN_C) {
514 phy_filters->filter_cfg_chain_c =
515 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_C);
516 }
517 if (IWL_MVM_PHY_FILTER_CHAIN_D) {
518 phy_filters->filter_cfg_chain_d =
519 cpu_to_le32(IWL_MVM_PHY_FILTER_CHAIN_D);
520 }
521}
c4ace426
GA
522#else /* CONFIG_ACPI */
523
524static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
525 struct iwl_phy_specific_cfg *phy_filters)
526{
527}
528#endif /* CONFIG_ACPI */
529
c593d2fa
AB
530#if defined(CONFIG_ACPI) && defined(CONFIG_EFI)
531static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
532{
533 u8 cmd_ver;
534 int ret;
535 struct iwl_host_cmd cmd = {
536 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
537 SAR_OFFSET_MAPPING_TABLE_CMD),
538 .flags = 0,
539 .data[0] = &mvm->fwrt.sgom_table,
540 .len[0] = sizeof(mvm->fwrt.sgom_table),
541 .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
542 };
543
544 if (!mvm->fwrt.sgom_enabled) {
545 IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n");
546 return 0;
547 }
548
549 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, REGULATORY_AND_NVM_GROUP,
550 SAR_OFFSET_MAPPING_TABLE_CMD,
551 IWL_FW_CMD_VER_UNKNOWN);
552
553 if (cmd_ver != 2) {
554 IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n",
555 cmd_ver);
556 return 0;
557 }
558
559 ret = iwl_mvm_send_cmd(mvm, &cmd);
560 if (ret < 0)
561 IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret);
562
563 return ret;
564}
565#else
566
567static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
568{
569 return 0;
570}
571#endif
572
8ca151b5
JB
573static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
574{
c4ace426 575 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd;
702e975d 576 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
c4ace426
GA
577 struct iwl_phy_specific_cfg phy_filters = {};
578 u8 cmd_ver;
579 size_t cmd_size;
8ca151b5 580
bb99ff9b 581 if (iwl_mvm_has_unified_ucode(mvm) &&
d923b020 582 !mvm->trans->cfg->tx_with_siso_diversity)
bb99ff9b 583 return 0;
d923b020
LC
584
585 if (mvm->trans->cfg->tx_with_siso_diversity) {
bb99ff9b
LC
586 /*
587 * TODO: currently we don't set the antenna but letting the NIC
588 * to decide which antenna to use. This should come from BIOS.
589 */
590 phy_cfg_cmd.phy_cfg =
591 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED);
592 }
593
8ca151b5 594 /* Set parameters */
a0544272 595 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
86a2b204
LC
596
597 /* set flags extra PHY configuration flags from the device's cfg */
7897dfa2
LC
598 phy_cfg_cmd.phy_cfg |=
599 cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags);
86a2b204 600
8ca151b5
JB
601 phy_cfg_cmd.calib_control.event_trigger =
602 mvm->fw->default_calib[ucode_type].event_trigger;
603 phy_cfg_cmd.calib_control.flow_trigger =
604 mvm->fw->default_calib[ucode_type].flow_trigger;
605
c4ace426 606 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP,
e80bfd11
MG
607 PHY_CONFIGURATION_CMD,
608 IWL_FW_CMD_VER_UNKNOWN);
c4ace426
GA
609 if (cmd_ver == 3) {
610 iwl_mvm_phy_filter_init(mvm, &phy_filters);
611 memcpy(&phy_cfg_cmd.phy_specific_cfg, &phy_filters,
612 sizeof(struct iwl_phy_specific_cfg));
613 }
614
8ca151b5
JB
615 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
616 phy_cfg_cmd.phy_cfg);
c4ace426
GA
617 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) :
618 sizeof(struct iwl_phy_cfg_cmd_v1);
a1022927 619 return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
c4ace426 620 cmd_size, &phy_cfg_cmd);
8ca151b5
JB
621}
622
3b25f1af 623int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm)
8ca151b5
JB
624{
625 struct iwl_notification_wait calib_wait;
6eb031d2 626 static const u16 init_complete[] = {
8ca151b5
JB
627 INIT_COMPLETE_NOTIF,
628 CALIB_RES_NOTIF_PHY_DB
629 };
630 int ret;
631
7d6222e2 632 if (iwl_mvm_has_unified_ucode(mvm))
52b15521 633 return iwl_run_unified_mvm_ucode(mvm);
8c5f47b1 634
8ca151b5
JB
635 lockdep_assert_held(&mvm->mutex);
636
94022562 637 mvm->rfkill_safe_init_done = false;
8ca151b5
JB
638
639 iwl_init_notification_wait(&mvm->notif_wait,
640 &calib_wait,
641 init_complete,
642 ARRAY_SIZE(init_complete),
643 iwl_wait_phy_db_entry,
644 mvm->phy_db);
645
11f8c533
LC
646 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
647
8ca151b5
JB
648 /* Will also start the device */
649 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
650 if (ret) {
651 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
00e0c6c8 652 goto remove_notif;
8ca151b5
JB
653 }
654
7d34a7d7 655 if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
b3de3ef4
EG
656 ret = iwl_mvm_send_bt_init_conf(mvm);
657 if (ret)
00e0c6c8 658 goto remove_notif;
b3de3ef4 659 }
931d4160 660
81a67e32 661 /* Read the NVM only at driver load time, no need to do this twice */
3b25f1af 662 if (!mvm->nvm_data) {
5bd1d2c1 663 ret = iwl_nvm_init(mvm);
8ca151b5
JB
664 if (ret) {
665 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
00e0c6c8 666 goto remove_notif;
8ca151b5
JB
667 }
668 }
669
81a67e32 670 /* In case we read the NVM from external file, load it to the NIC */
9ce505fe
AN
671 if (mvm->nvm_file_name) {
672 ret = iwl_mvm_load_nvm_to_nic(mvm);
673 if (ret)
674 goto remove_notif;
675 }
81a67e32 676
64866e5d
LC
677 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
678 "Too old NVM version (0x%0x, required = 0x%0x)",
679 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
8ca151b5 680
4f59334b
EH
681 /*
682 * abort after reading the nvm in case RF Kill is on, we will complete
683 * the init seq later when RF kill will switch to off
684 */
1a3fe0b2 685 if (iwl_mvm_is_radio_hw_killed(mvm)) {
4f59334b
EH
686 IWL_DEBUG_RF_KILL(mvm,
687 "jump over all phy activities due to RF kill\n");
00e0c6c8 688 goto remove_notif;
4f59334b
EH
689 }
690
b3500b47 691 mvm->rfkill_safe_init_done = true;
31b8b343 692
e07cbb53 693 /* Send TX valid antennas before triggering calibrations */
a0544272 694 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
e07cbb53 695 if (ret)
00e0c6c8 696 goto remove_notif;
e07cbb53 697
8ca151b5
JB
698 ret = iwl_send_phy_cfg_cmd(mvm);
699 if (ret) {
700 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
701 ret);
00e0c6c8 702 goto remove_notif;
8ca151b5
JB
703 }
704
705 /*
706 * Some things may run in the background now, but we
707 * just wait for the calibration complete notification.
708 */
709 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
00e0c6c8
LC
710 MVM_UCODE_CALIB_TIMEOUT);
711 if (!ret)
712 goto out;
31b8b343 713
00e0c6c8 714 if (iwl_mvm_is_radio_hw_killed(mvm)) {
31b8b343 715 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
00e0c6c8
LC
716 ret = 0;
717 } else {
718 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
719 ret);
31b8b343 720 }
00e0c6c8 721
8ca151b5
JB
722 goto out;
723
00e0c6c8 724remove_notif:
8ca151b5
JB
725 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
726out:
b3500b47 727 mvm->rfkill_safe_init_done = false;
a4082843 728 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
8ca151b5
JB
729 /* we want to debug INIT and we have no NVM - fake */
730 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
731 sizeof(struct ieee80211_channel) +
732 sizeof(struct ieee80211_rate),
733 GFP_KERNEL);
734 if (!mvm->nvm_data)
735 return -ENOMEM;
8ca151b5
JB
736 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
737 mvm->nvm_data->bands[0].n_channels = 1;
738 mvm->nvm_data->bands[0].n_bitrates = 1;
739 mvm->nvm_data->bands[0].bitrates =
740 (void *)mvm->nvm_data->channels + 1;
741 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
742 }
743
744 return ret;
745}
746
84bfffa9
EG
747static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
748{
749 struct iwl_ltr_config_cmd cmd = {
750 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
751 };
752
753 if (!mvm->trans->ltr_enabled)
754 return 0;
755
84bfffa9
EG
756 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
757 sizeof(cmd), &cmd);
758}
759
c386dacb 760#ifdef CONFIG_ACPI
42ce76d6 761int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
da2830ac 762{
216cdfb5
LC
763 struct iwl_dev_tx_power_cmd cmd = {
764 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
71e9378b 765 };
9c08cef8 766 __le16 *per_chain;
1edd56e6 767 int ret;
39c1a972 768 u16 len = 0;
fbb7957d
LC
769 u32 n_subbands;
770 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
e80bfd11
MG
771 REDUCE_TX_POWER_CMD,
772 IWL_FW_CMD_VER_UNKNOWN);
fbb7957d
LC
773
774 if (cmd_ver == 6) {
775 len = sizeof(cmd.v6);
776 n_subbands = IWL_NUM_SUB_BANDS_V2;
777 per_chain = cmd.v6.per_chain[0][0];
778 } else if (fw_has_api(&mvm->fw->ucode_capa,
779 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) {
0791c2fc 780 len = sizeof(cmd.v5);
e12cfc7b 781 n_subbands = IWL_NUM_SUB_BANDS_V1;
9c08cef8
LC
782 per_chain = cmd.v5.per_chain[0][0];
783 } else if (fw_has_capa(&mvm->fw->ucode_capa,
fbb7957d 784 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) {
216cdfb5 785 len = sizeof(cmd.v4);
e12cfc7b 786 n_subbands = IWL_NUM_SUB_BANDS_V1;
9c08cef8
LC
787 per_chain = cmd.v4.per_chain[0][0];
788 } else {
216cdfb5 789 len = sizeof(cmd.v3);
e12cfc7b 790 n_subbands = IWL_NUM_SUB_BANDS_V1;
9c08cef8
LC
791 per_chain = cmd.v3.per_chain[0][0];
792 }
55bfa4b9 793
216cdfb5
LC
794 /* all structs have the same common part, add it */
795 len += sizeof(cmd.common);
da2830ac 796
dac7171c
LC
797 ret = iwl_sar_select_profile(&mvm->fwrt, per_chain,
798 IWL_NUM_CHAIN_TABLES,
fbb7957d 799 n_subbands, prof_a, prof_b);
1edd56e6
LC
800
801 /* return on error or if the profile is disabled (positive number) */
802 if (ret)
803 return ret;
804
6d19a5eb
EG
805 iwl_mei_set_power_limit(per_chain);
806
42ce76d6 807 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
42ce76d6
LC
808 return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
809}
810
7fe90e0e
HD
811int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
812{
dd2a1256 813 union iwl_geo_tx_power_profiles_cmd geo_tx_cmd;
f604324e 814 struct iwl_geo_tx_power_profiles_resp *resp;
0c3d7282 815 u16 len;
39c1a972 816 int ret;
c8611331
JB
817 struct iwl_host_cmd cmd = {
818 .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD),
819 .flags = CMD_WANT_SKB,
820 .data = { &geo_tx_cmd },
821 };
e80bfd11 822 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP,
523de6c8 823 PER_CHAIN_LIMIT_OFFSET_CMD,
e80bfd11 824 IWL_FW_CMD_VER_UNKNOWN);
0c3d7282 825
dd2a1256
LC
826 /* the ops field is at the same spot for all versions, so set in v1 */
827 geo_tx_cmd.v1.ops =
828 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
829
97f8a3d1
AB
830 if (cmd_ver == 5)
831 len = sizeof(geo_tx_cmd.v5);
832 else if (cmd_ver == 4)
833 len = sizeof(geo_tx_cmd.v4);
834 else if (cmd_ver == 3)
0ea788ed
LC
835 len = sizeof(geo_tx_cmd.v3);
836 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
837 IWL_UCODE_TLV_API_SAR_TABLE_VER))
dd2a1256
LC
838 len = sizeof(geo_tx_cmd.v2);
839 else
840 len = sizeof(geo_tx_cmd.v1);
7fe90e0e 841
39c1a972
IZ
842 if (!iwl_sar_geo_support(&mvm->fwrt))
843 return -EOPNOTSUPP;
844
c8611331 845 cmd.len[0] = len;
7fe90e0e
HD
846
847 ret = iwl_mvm_send_cmd(mvm, &cmd);
848 if (ret) {
849 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
850 return ret;
851 }
f604324e
LC
852
853 resp = (void *)cmd.resp_pkt->data;
854 ret = le32_to_cpu(resp->profile_idx);
855
97f8a3d1 856 if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES_REV3))
f604324e
LC
857 ret = -EIO;
858
7fe90e0e
HD
859 iwl_free_resp(&cmd);
860 return ret;
861}
862
a6bff3cb
HD
863static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
864{
dd2a1256 865 union iwl_geo_tx_power_profiles_cmd cmd;
39c1a972 866 u16 len;
45acebf8 867 u32 n_bands;
97f8a3d1 868 u32 n_profiles;
ac9952f6 869 u32 sk = 0;
0433ae55 870 int ret;
e80bfd11 871 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP,
523de6c8 872 PER_CHAIN_LIMIT_OFFSET_CMD,
e80bfd11 873 IWL_FW_CMD_VER_UNKNOWN);
a6bff3cb 874
45acebf8
NG
875 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) !=
876 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) ||
877 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) !=
97f8a3d1
AB
878 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) ||
879 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) !=
880 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) ||
881 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) !=
882 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops));
883
dd2a1256
LC
884 /* the ops field is at the same spot for all versions, so set in v1 */
885 cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES);
0c3d7282 886
97f8a3d1
AB
887 if (cmd_ver == 5) {
888 len = sizeof(cmd.v5);
889 n_bands = ARRAY_SIZE(cmd.v5.table[0]);
890 n_profiles = ACPI_NUM_GEO_PROFILES_REV3;
891 } else if (cmd_ver == 4) {
892 len = sizeof(cmd.v4);
893 n_bands = ARRAY_SIZE(cmd.v4.table[0]);
894 n_profiles = ACPI_NUM_GEO_PROFILES_REV3;
895 } else if (cmd_ver == 3) {
0ea788ed 896 len = sizeof(cmd.v3);
45acebf8 897 n_bands = ARRAY_SIZE(cmd.v3.table[0]);
97f8a3d1 898 n_profiles = ACPI_NUM_GEO_PROFILES;
0ea788ed
LC
899 } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
900 IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
dd2a1256 901 len = sizeof(cmd.v2);
45acebf8 902 n_bands = ARRAY_SIZE(cmd.v2.table[0]);
97f8a3d1 903 n_profiles = ACPI_NUM_GEO_PROFILES;
39c1a972 904 } else {
dd2a1256 905 len = sizeof(cmd.v1);
45acebf8 906 n_bands = ARRAY_SIZE(cmd.v1.table[0]);
97f8a3d1 907 n_profiles = ACPI_NUM_GEO_PROFILES;
0c3d7282
HD
908 }
909
45acebf8
NG
910 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) !=
911 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) ||
912 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) !=
97f8a3d1
AB
913 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) ||
914 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) !=
915 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) ||
916 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) !=
917 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table));
45acebf8 918 /* the table is at the same position for all versions, so set use v1 */
97f8a3d1
AB
919 ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0],
920 n_bands, n_profiles);
45acebf8
NG
921
922 /*
923 * It is a valid scenario to not support SAR, or miss wgds table,
924 * but in that case there is no need to send the command.
925 */
926 if (ret)
927 return 0;
928
ac9952f6
LC
929 /* Only set to South Korea if the table revision is 1 */
930 if (mvm->fwrt.geo_rev == 1)
931 sk = 1;
932
28db1862 933 /*
ac9952f6
LC
934 * Set the table_revision to South Korea (1) or not (0). The
935 * element name is misleading, as it doesn't contain the table
936 * revision number, but whether the South Korea variation
937 * should be used.
28db1862
LC
938 * This must be done after calling iwl_sar_geo_init().
939 */
97f8a3d1 940 if (cmd_ver == 5)
ac9952f6 941 cmd.v5.table_revision = cpu_to_le32(sk);
97f8a3d1 942 else if (cmd_ver == 4)
ac9952f6 943 cmd.v4.table_revision = cpu_to_le32(sk);
97f8a3d1 944 else if (cmd_ver == 3)
ac9952f6 945 cmd.v3.table_revision = cpu_to_le32(sk);
28db1862
LC
946 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
947 IWL_UCODE_TLV_API_SAR_TABLE_VER))
ac9952f6 948 cmd.v2.table_revision = cpu_to_le32(sk);
28db1862 949
dd2a1256 950 return iwl_mvm_send_cmd_pdu(mvm,
523de6c8
LC
951 WIDE_ID(PHY_OPS_GROUP,
952 PER_CHAIN_LIMIT_OFFSET_CMD),
dd2a1256 953 0, len, &cmd);
a6bff3cb
HD
954}
955
6ce1e5c0
GA
956static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm)
957{
e12cfc7b 958 union acpi_object *wifi_pkg, *data, *flags;
f2134f66 959 int i, j, ret, tbl_rev, num_sub_bands;
6ce1e5c0
GA
960 int idx = 2;
961
8bdc52b9 962 mvm->fwrt.ppag_flags = 0;
e12cfc7b 963
6ce1e5c0
GA
964 data = iwl_acpi_get_object(mvm->dev, ACPI_PPAG_METHOD);
965 if (IS_ERR(data))
966 return PTR_ERR(data);
967
e12cfc7b 968 /* try to read ppag table rev 2 or 1 (both have the same data size) */
6ce1e5c0 969 wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
f2134f66
GA
970 ACPI_PPAG_WIFI_DATA_SIZE_V2, &tbl_rev);
971 if (!IS_ERR(wifi_pkg)) {
e12cfc7b
MK
972 if (tbl_rev == 1 || tbl_rev == 2) {
973 num_sub_bands = IWL_NUM_SUB_BANDS_V2;
e12cfc7b
MK
974 IWL_DEBUG_RADIO(mvm,
975 "Reading PPAG table v2 (tbl_rev=%d)\n",
976 tbl_rev);
977 goto read_table;
978 } else {
f2134f66
GA
979 ret = -EINVAL;
980 goto out_free;
981 }
6ce1e5c0
GA
982 }
983
f2134f66
GA
984 /* try to read ppag table revision 0 */
985 wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
e12cfc7b 986 ACPI_PPAG_WIFI_DATA_SIZE_V1, &tbl_rev);
f2134f66
GA
987 if (!IS_ERR(wifi_pkg)) {
988 if (tbl_rev != 0) {
989 ret = -EINVAL;
990 goto out_free;
991 }
e12cfc7b 992 num_sub_bands = IWL_NUM_SUB_BANDS_V1;
f2134f66
GA
993 IWL_DEBUG_RADIO(mvm, "Reading PPAG table v1 (tbl_rev=0)\n");
994 goto read_table;
3ed83da3 995 }
f2134f66
GA
996 ret = PTR_ERR(wifi_pkg);
997 goto out_free;
3ed83da3 998
f2134f66 999read_table:
8bdc52b9 1000 mvm->fwrt.ppag_ver = tbl_rev;
e12cfc7b
MK
1001 flags = &wifi_pkg->package.elements[1];
1002
1003 if (flags->type != ACPI_TYPE_INTEGER) {
6ce1e5c0
GA
1004 ret = -EINVAL;
1005 goto out_free;
1006 }
1007
8bdc52b9 1008 mvm->fwrt.ppag_flags = flags->integer.value & IWL_PPAG_MASK;
e12cfc7b 1009
8bdc52b9 1010 if (!mvm->fwrt.ppag_flags) {
6ce1e5c0
GA
1011 ret = 0;
1012 goto out_free;
1013 }
1014
1015 /*
1016 * read, verify gain values and save them into the PPAG table.
1017 * first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the
1018 * following sub-bands to High-Band (5GHz).
1019 */
f2134f66
GA
1020 for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
1021 for (j = 0; j < num_sub_bands; j++) {
6ce1e5c0
GA
1022 union acpi_object *ent;
1023
1024 ent = &wifi_pkg->package.elements[idx++];
5a684245 1025 if (ent->type != ACPI_TYPE_INTEGER) {
6ce1e5c0
GA
1026 ret = -EINVAL;
1027 goto out_free;
1028 }
5a684245 1029
8bdc52b9 1030 mvm->fwrt.ppag_chains[i].subbands[j] = ent->integer.value;
5a684245
LC
1031
1032 if ((j == 0 &&
8bdc52b9
MK
1033 (mvm->fwrt.ppag_chains[i].subbands[j] > ACPI_PPAG_MAX_LB ||
1034 mvm->fwrt.ppag_chains[i].subbands[j] < ACPI_PPAG_MIN_LB)) ||
5a684245 1035 (j != 0 &&
8bdc52b9
MK
1036 (mvm->fwrt.ppag_chains[i].subbands[j] > ACPI_PPAG_MAX_HB ||
1037 mvm->fwrt.ppag_chains[i].subbands[j] < ACPI_PPAG_MIN_HB))) {
1038 mvm->fwrt.ppag_flags = 0;
5a684245
LC
1039 ret = -EINVAL;
1040 goto out_free;
1041 }
6ce1e5c0
GA
1042 }
1043 }
e12cfc7b 1044
6ce1e5c0
GA
1045 ret = 0;
1046out_free:
1047 kfree(data);
1048 return ret;
1049}
1050
1051int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1052{
8bdc52b9 1053 union iwl_ppag_table_cmd cmd;
f2134f66
GA
1054 u8 cmd_ver;
1055 int i, j, ret, num_sub_bands, cmd_size;
f2134f66 1056 s8 *gain;
6ce1e5c0
GA
1057
1058 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) {
1059 IWL_DEBUG_RADIO(mvm,
1060 "PPAG capability not supported by FW, command not sent.\n");
1061 return 0;
1062 }
8bdc52b9 1063 if (!mvm->fwrt.ppag_flags) {
f2134f66 1064 IWL_DEBUG_RADIO(mvm, "PPAG not enabled, command not sent.\n");
160bab43
GA
1065 return 0;
1066 }
1067
8bdc52b9
MK
1068 /* The 'flags' field is the same in v1 and in v2 so we can just
1069 * use v1 to access it.
1070 */
1071 cmd.v1.flags = cpu_to_le32(mvm->fwrt.ppag_flags);
f2134f66 1072 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP,
e80bfd11
MG
1073 PER_PLATFORM_ANT_GAIN_CMD,
1074 IWL_FW_CMD_VER_UNKNOWN);
f2134f66 1075 if (cmd_ver == 1) {
e12cfc7b 1076 num_sub_bands = IWL_NUM_SUB_BANDS_V1;
8bdc52b9
MK
1077 gain = cmd.v1.gain[0];
1078 cmd_size = sizeof(cmd.v1);
e12cfc7b 1079 if (mvm->fwrt.ppag_ver == 1 || mvm->fwrt.ppag_ver == 2) {
f2134f66 1080 IWL_DEBUG_RADIO(mvm,
e12cfc7b
MK
1081 "PPAG table rev is %d but FW supports v1, sending truncated table\n",
1082 mvm->fwrt.ppag_ver);
8bdc52b9 1083 cmd.v1.flags &= cpu_to_le32(IWL_PPAG_ETSI_MASK);
f2134f66 1084 }
e12cfc7b 1085 } else if (cmd_ver == 2 || cmd_ver == 3) {
f2134f66 1086 num_sub_bands = IWL_NUM_SUB_BANDS_V2;
8bdc52b9
MK
1087 gain = cmd.v2.gain[0];
1088 cmd_size = sizeof(cmd.v2);
e12cfc7b 1089 if (mvm->fwrt.ppag_ver == 0) {
f2134f66
GA
1090 IWL_DEBUG_RADIO(mvm,
1091 "PPAG table is v1 but FW supports v2, sending padded table\n");
e12cfc7b
MK
1092 } else if (cmd_ver == 2 && mvm->fwrt.ppag_ver == 2) {
1093 IWL_DEBUG_RADIO(mvm,
1094 "PPAG table is v3 but FW supports v2, sending partial bitmap.\n");
8bdc52b9 1095 cmd.v1.flags &= cpu_to_le32(IWL_PPAG_ETSI_MASK);
f2134f66
GA
1096 }
1097 } else {
1098 IWL_DEBUG_RADIO(mvm, "Unsupported PPAG command version\n");
1099 return 0;
1100 }
6ce1e5c0 1101
f2134f66
GA
1102 for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
1103 for (j = 0; j < num_sub_bands; j++) {
8bdc52b9
MK
1104 gain[i * num_sub_bands + j] =
1105 mvm->fwrt.ppag_chains[i].subbands[j];
6ce1e5c0
GA
1106 IWL_DEBUG_RADIO(mvm,
1107 "PPAG table: chain[%d] band[%d]: gain = %d\n",
f2134f66 1108 i, j, gain[i * num_sub_bands + j]);
6ce1e5c0
GA
1109 }
1110 }
f2134f66 1111 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
6ce1e5c0
GA
1112 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
1113 PER_PLATFORM_ANT_GAIN_CMD),
8bdc52b9 1114 0, cmd_size, &cmd);
6ce1e5c0
GA
1115 if (ret < 0)
1116 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
1117 ret);
1118
1119 return ret;
1120}
1121
a2ac0f48 1122static const struct dmi_system_id dmi_ppag_approved_list[] = {
ca176edd
LC
1123 { .ident = "HP",
1124 .matches = {
1125 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
1126 },
1127 },
dd158ed6
LC
1128 { .ident = "SAMSUNG",
1129 .matches = {
1130 DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"),
1131 },
1132 },
4a76553c
LC
1133 { .ident = "MSFT",
1134 .matches = {
1135 DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
1136 },
1137 },
a7abc1ea
LC
1138 { .ident = "ASUS",
1139 .matches = {
1140 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTek COMPUTER INC."),
1141 },
1142 },
a22549f1 1143 {}
a2ac0f48
LC
1144};
1145
6ce1e5c0
GA
1146static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1147{
78a19d52 1148 /* no need to read the table, done in INIT stage */
a2ac0f48
LC
1149 if (!dmi_check_system(dmi_ppag_approved_list)) {
1150 IWL_DEBUG_RADIO(mvm,
1151 "System vendor '%s' is not in the approved list, disabling PPAG.\n",
1152 dmi_get_system_info(DMI_SYS_VENDOR));
8bdc52b9 1153 mvm->fwrt.ppag_flags = 0;
a2ac0f48
LC
1154 return 0;
1155 }
1156
6ce1e5c0
GA
1157 return iwl_mvm_ppag_send_cmd(mvm);
1158}
1159
2856f623
AB
1160static const struct dmi_system_id dmi_tas_approved_list[] = {
1161 { .ident = "HP",
1162 .matches = {
1163 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
1164 },
1165 },
1166 { .ident = "SAMSUNG",
1167 .matches = {
1168 DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"),
1169 },
1170 },
1171 { .ident = "LENOVO",
1172 .matches = {
1173 DMI_MATCH(DMI_SYS_VENDOR, "Lenovo"),
1174 },
1175 },
1176 { .ident = "DELL",
1177 .matches = {
1178 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
1179 },
1180 },
1181
1182 /* keep last */
1183 {}
1184};
1185
c3f40c3e
MK
1186static bool iwl_mvm_add_to_tas_block_list(__le32 *list, __le32 *le_size, unsigned int mcc)
1187{
1188 int i;
1189 u32 size = le32_to_cpu(*le_size);
1190
1191 /* Verify that there is room for another country */
1192 if (size >= IWL_TAS_BLOCK_LIST_MAX)
1193 return false;
1194
1195 for (i = 0; i < size; i++) {
1196 if (list[i] == cpu_to_le32(mcc))
1197 return true;
1198 }
1199
1200 list[size++] = cpu_to_le32(mcc);
1201 *le_size = cpu_to_le32(size);
1202 return true;
1203}
1204
28dd7ccd
MG
1205static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1206{
1207 int ret;
6da7ba3a
AB
1208 union iwl_tas_config_cmd cmd = {};
1209 int cmd_size, fw_ver;
28dd7ccd 1210
6da7ba3a 1211 BUILD_BUG_ON(ARRAY_SIZE(cmd.v3.block_list_array) <
28dd7ccd
MG
1212 APCI_WTAS_BLACK_LIST_MAX);
1213
1214 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) {
1215 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n");
1216 return;
1217 }
1218
6da7ba3a
AB
1219 fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, REGULATORY_AND_NVM_GROUP,
1220 TAS_CONFIG, IWL_FW_CMD_VER_UNKNOWN);
1221
1222 ret = iwl_acpi_get_tas(&mvm->fwrt, &cmd, fw_ver);
28dd7ccd
MG
1223 if (ret < 0) {
1224 IWL_DEBUG_RADIO(mvm,
1225 "TAS table invalid or unavailable. (%d)\n",
1226 ret);
1227 return;
1228 }
1229
7c530588 1230 if (ret == 0)
28dd7ccd
MG
1231 return;
1232
c3f40c3e
MK
1233 if (!dmi_check_system(dmi_tas_approved_list)) {
1234 IWL_DEBUG_RADIO(mvm,
1235 "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n",
1236 dmi_get_system_info(DMI_SYS_VENDOR));
6da7ba3a
AB
1237 if ((!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array,
1238 &cmd.v4.block_list_size,
1239 IWL_TAS_US_MCC)) ||
1240 (!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array,
1241 &cmd.v4.block_list_size,
1242 IWL_TAS_CANADA_MCC))) {
c3f40c3e
MK
1243 IWL_DEBUG_RADIO(mvm,
1244 "Unable to add US/Canada to TAS block list, disabling TAS\n");
1245 return;
1246 }
1247 }
1248
6da7ba3a
AB
1249 /* v4 is the same size as v3, so no need to differentiate here */
1250 cmd_size = fw_ver < 3 ?
7c530588
MK
1251 sizeof(struct iwl_tas_config_cmd_v2) :
1252 sizeof(struct iwl_tas_config_cmd_v3);
28dd7ccd
MG
1253
1254 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
1255 TAS_CONFIG),
7c530588 1256 0, cmd_size, &cmd);
28dd7ccd
MG
1257 if (ret < 0)
1258 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret);
1259}
f5b1cb2e 1260
4e8fe214
GG
1261static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm)
1262{
1263 u8 value;
45fe1b6b 1264 int ret = iwl_acpi_get_dsm_u8(mvm->fwrt.dev, 0, DSM_RFI_FUNC_ENABLE,
4e8fe214
GG
1265 &iwl_rfi_guid, &value);
1266
1267 if (ret < 0) {
1268 IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret);
1269
1270 } else if (value >= DSM_VALUE_RFI_MAX) {
1271 IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n",
1272 value);
1273
1274 } else if (value == DSM_VALUE_RFI_ENABLE) {
1275 IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n");
1276 return DSM_VALUE_RFI_ENABLE;
1277 }
1278
1279 IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n");
1280
1281 /* default behaviour is disabled */
1282 return DSM_VALUE_RFI_DISABLE;
1283}
1284
f5b1cb2e
GA
1285static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1286{
7119f02b
MK
1287 int ret;
1288 u32 value;
1f578d4f 1289 struct iwl_lari_config_change_cmd_v5 cmd = {};
f5b1cb2e 1290
f21afaba 1291 cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt);
d2bfda8a 1292
45fe1b6b 1293 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, DSM_FUNC_11AX_ENABLEMENT,
7119f02b
MK
1294 &iwl_guid, &value);
1295 if (!ret)
1296 cmd.oem_11ax_allow_bitmap = cpu_to_le32(value);
f5b1cb2e 1297
45fe1b6b 1298 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
54b4fda5
AN
1299 DSM_FUNC_ENABLE_UNII4_CHAN,
1300 &iwl_guid, &value);
1301 if (!ret)
1302 cmd.oem_unii4_allow_bitmap = cpu_to_le32(value);
1303
45fe1b6b 1304 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1f578d4f
MK
1305 DSM_FUNC_ACTIVATE_CHANNEL,
1306 &iwl_guid, &value);
1307 if (!ret)
1308 cmd.chan_state_active_bitmap = cpu_to_le32(value);
1309
698b166e
LC
1310 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1311 DSM_FUNC_ENABLE_6E,
1312 &iwl_guid, &value);
1313 if (!ret)
1314 cmd.oem_uhb_allow_bitmap = cpu_to_le32(value);
1315
54b4fda5 1316 if (cmd.config_bitmap ||
698b166e 1317 cmd.oem_uhb_allow_bitmap ||
54b4fda5 1318 cmd.oem_11ax_allow_bitmap ||
1f578d4f
MK
1319 cmd.oem_unii4_allow_bitmap ||
1320 cmd.chan_state_active_bitmap) {
3c21990b
MK
1321 size_t cmd_size;
1322 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw,
1323 REGULATORY_AND_NVM_GROUP,
1324 LARI_CONFIG_CHANGE, 1);
1f578d4f
MK
1325 if (cmd_ver == 5)
1326 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5);
1327 else if (cmd_ver == 4)
54b4fda5
AN
1328 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4);
1329 else if (cmd_ver == 3)
3c21990b
MK
1330 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3);
1331 else if (cmd_ver == 2)
1332 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2);
1333 else
1334 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1);
1335
3ce88247 1336 IWL_DEBUG_RADIO(mvm,
7119f02b
MK
1337 "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n",
1338 le32_to_cpu(cmd.config_bitmap),
1339 le32_to_cpu(cmd.oem_11ax_allow_bitmap));
54b4fda5 1340 IWL_DEBUG_RADIO(mvm,
1f578d4f 1341 "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n",
54b4fda5 1342 le32_to_cpu(cmd.oem_unii4_allow_bitmap),
1f578d4f 1343 le32_to_cpu(cmd.chan_state_active_bitmap),
54b4fda5 1344 cmd_ver);
698b166e
LC
1345 IWL_DEBUG_RADIO(mvm,
1346 "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x\n",
1347 le32_to_cpu(cmd.oem_uhb_allow_bitmap));
7119f02b
MK
1348 ret = iwl_mvm_send_cmd_pdu(mvm,
1349 WIDE_ID(REGULATORY_AND_NVM_GROUP,
1350 LARI_CONFIG_CHANGE),
1351 0, cmd_size, &cmd);
1352 if (ret < 0)
f5b1cb2e
GA
1353 IWL_DEBUG_RADIO(mvm,
1354 "Failed to send LARI_CONFIG_CHANGE (%d)\n",
7119f02b 1355 ret);
f5b1cb2e
GA
1356 }
1357}
78a19d52
MK
1358
1359void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm)
1360{
1361 int ret;
1362
1363 /* read PPAG table */
1364 ret = iwl_mvm_get_ppag_table(mvm);
1365 if (ret < 0) {
1366 IWL_DEBUG_RADIO(mvm,
1367 "PPAG BIOS table invalid or unavailable. (%d)\n",
1368 ret);
1369 }
1370
1371 /* read SAR tables */
1372 ret = iwl_sar_get_wrds_table(&mvm->fwrt);
1373 if (ret < 0) {
1374 IWL_DEBUG_RADIO(mvm,
1375 "WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1376 ret);
1377 /*
1378 * If not available, don't fail and don't bother with EWRD and
1379 * WGDS */
1380
1381 if (!iwl_sar_get_wgds_table(&mvm->fwrt)) {
1382 /*
1383 * If basic SAR is not available, we check for WGDS,
1384 * which should *not* be available either. If it is
1385 * available, issue an error, because we can't use SAR
1386 * Geo without basic SAR.
1387 */
1388 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
1389 }
1390
1391 } else {
1392 ret = iwl_sar_get_ewrd_table(&mvm->fwrt);
1393 /* if EWRD is not available, we can still use
1394 * WRDS, so don't fail */
1395 if (ret < 0)
1396 IWL_DEBUG_RADIO(mvm,
1397 "EWRD SAR BIOS table invalid or unavailable. (%d)\n",
1398 ret);
1399
1400 /* read geo SAR table */
1401 if (iwl_sar_geo_support(&mvm->fwrt)) {
1402 ret = iwl_sar_get_wgds_table(&mvm->fwrt);
1403 if (ret < 0)
1404 IWL_DEBUG_RADIO(mvm,
1405 "Geo SAR BIOS table invalid or unavailable. (%d)\n",
1406 ret);
1407 /* we don't fail if the table is not available */
1408 }
1409 }
1410}
69964905 1411#else /* CONFIG_ACPI */
69964905 1412
39c1a972
IZ
1413inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm,
1414 int prof_a, int prof_b)
69964905 1415{
78a19d52 1416 return 1;
69964905 1417}
a6bff3cb 1418
39c1a972 1419inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
5d041c46
LC
1420{
1421 return -ENOENT;
1422}
1423
a6bff3cb
HD
1424static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
1425{
1426 return 0;
1427}
18f1755d 1428
6ce1e5c0
GA
1429int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1430{
1431 return -ENOENT;
1432}
1433
1434static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1435{
7937fd32 1436 return 0;
6ce1e5c0 1437}
28dd7ccd
MG
1438
1439static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1440{
1441}
f5b1cb2e
GA
1442
1443static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1444{
1445}
4e8fe214
GG
1446
1447static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm)
1448{
1449 return DSM_VALUE_RFI_DISABLE;
1450}
78a19d52
MK
1451
1452void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm)
1453{
1454}
c593d2fa 1455
69964905
LC
1456#endif /* CONFIG_ACPI */
1457
f130bb75
MG
1458void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1459{
1460 u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1461 int ret;
1462 u32 resp;
1463
1464 struct iwl_fw_error_recovery_cmd recovery_cmd = {
1465 .flags = cpu_to_le32(flags),
1466 .buf_size = 0,
1467 };
1468 struct iwl_host_cmd host_cmd = {
1469 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1470 .flags = CMD_WANT_SKB,
1471 .data = {&recovery_cmd, },
1472 .len = {sizeof(recovery_cmd), },
1473 };
1474
1475 /* no error log was defined in TLV */
1476 if (!error_log_size)
1477 return;
1478
1479 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1480 /* no buf was allocated while HW reset */
1481 if (!mvm->error_recovery_buf)
1482 return;
1483
1484 host_cmd.data[1] = mvm->error_recovery_buf;
1485 host_cmd.len[1] = error_log_size;
1486 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1487 recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1488 }
1489
1490 ret = iwl_mvm_send_cmd(mvm, &host_cmd);
1491 kfree(mvm->error_recovery_buf);
1492 mvm->error_recovery_buf = NULL;
1493
1494 if (ret) {
1495 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1496 return;
1497 }
1498
1499 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1500 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1501 resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data);
1502 if (resp)
1503 IWL_ERR(mvm,
1504 "Failed to send recovery cmd blob was invalid %d\n",
1505 resp);
1506 }
1507}
1508
42ce76d6
LC
1509static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1510{
1edd56e6 1511 return iwl_mvm_sar_select_profile(mvm, 1, 1);
da2830ac
LC
1512}
1513
1f370650 1514static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
8ca151b5 1515{
1f370650 1516 int ret;
8ca151b5 1517
7d6222e2 1518 if (iwl_mvm_has_unified_ucode(mvm))
52b15521 1519 return iwl_run_unified_mvm_ucode(mvm);
8ca151b5 1520
3b25f1af 1521 ret = iwl_run_init_mvm_ucode(mvm);
f2082a53 1522
f2082a53 1523 if (ret) {
8d193ca2 1524 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
f4744258
LK
1525
1526 if (iwlmvm_mod_params.init_dbg)
1527 return 0;
1f370650 1528 return ret;
8d193ca2 1529 }
8ca151b5 1530
203c83d3 1531 iwl_fw_dbg_stop_sync(&mvm->fwrt);
bab3cb92
EG
1532 iwl_trans_stop_device(mvm->trans);
1533 ret = iwl_trans_start_hw(mvm->trans);
f2082a53 1534 if (ret)
1f370650 1535 return ret;
8ca151b5 1536
94022562 1537 mvm->rfkill_safe_init_done = false;
8ca151b5 1538 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1f370650
SS
1539 if (ret)
1540 return ret;
1541
94022562
EG
1542 mvm->rfkill_safe_init_done = true;
1543
b108d8c7
SM
1544 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1545 NULL);
da2eb669 1546
702e975d 1547 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
1f370650
SS
1548}
1549
1550int iwl_mvm_up(struct iwl_mvm *mvm)
1551{
1552 int ret, i;
1553 struct ieee80211_channel *chan;
1554 struct cfg80211_chan_def chandef;
dd36a507 1555 struct ieee80211_supported_band *sband = NULL;
1f370650
SS
1556
1557 lockdep_assert_held(&mvm->mutex);
1558
1559 ret = iwl_trans_start_hw(mvm->trans);
1560 if (ret)
1561 return ret;
1562
1563 ret = iwl_mvm_load_rt_fw(mvm);
8ca151b5
JB
1564 if (ret) {
1565 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
72d3c7bb
JB
1566 if (ret != -ERFKILL)
1567 iwl_fw_dbg_error_collect(&mvm->fwrt,
1568 FW_DBG_TRIGGER_DRIVER);
8ca151b5
JB
1569 goto error;
1570 }
1571
d0b813fc 1572 iwl_get_shared_mem_conf(&mvm->fwrt);
04fd2c28 1573
1f3b0ff8
LE
1574 ret = iwl_mvm_sf_update(mvm, NULL, false);
1575 if (ret)
1576 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1577
a1af4c48 1578 if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
7a14c23d
SS
1579 mvm->fwrt.dump.conf = FW_DBG_INVALID;
1580 /* if we have a destination, assume EARLY START */
1581 if (mvm->fw->dbg.dest_tlv)
1582 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
1583 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
1584 }
6a951267 1585
a0544272 1586 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
8ca151b5
JB
1587 if (ret)
1588 goto error;
1589
7d6222e2
JB
1590 if (!iwl_mvm_has_unified_ucode(mvm)) {
1591 /* Send phy db control command and then phy db calibration */
1f370650
SS
1592 ret = iwl_send_phy_db_data(mvm->phy_db);
1593 if (ret)
1594 goto error;
1f370650 1595 }
8ca151b5 1596
bb99ff9b
LC
1597 ret = iwl_send_phy_cfg_cmd(mvm);
1598 if (ret)
1599 goto error;
1600
b3de3ef4
EG
1601 ret = iwl_mvm_send_bt_init_conf(mvm);
1602 if (ret)
1603 goto error;
1604
cceb4507
SM
1605 if (fw_has_capa(&mvm->fw->ucode_capa,
1606 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) {
a8eb340f 1607 ret = iwl_set_soc_latency(&mvm->fwrt);
cceb4507
SM
1608 if (ret)
1609 goto error;
1610 }
1611
43413a97 1612 /* Init RSS configuration */
9cd243f2
MG
1613 ret = iwl_configure_rxq(&mvm->fwrt);
1614 if (ret)
1615 goto error;
8edbfaa1
SS
1616
1617 if (iwl_mvm_has_new_rx_api(mvm)) {
43413a97
SS
1618 ret = iwl_send_rss_cfg_cmd(mvm);
1619 if (ret) {
1620 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1621 ret);
1622 goto error;
1623 }
1624 }
1625
8ca151b5 1626 /* init the fw <-> mac80211 STA mapping */
be9ae34e 1627 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++)
8ca151b5
JB
1628 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1629
0ae98812 1630 mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1d3c3f63 1631
b2b7875b
JB
1632 /* reset quota debouncing buffer - 0xff will yield invalid data */
1633 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1634
79660869
IL
1635 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
1636 ret = iwl_mvm_send_dqa_cmd(mvm);
1637 if (ret)
1638 goto error;
1639 }
97d5be7e 1640
2c2c3647
NE
1641 /*
1642 * Add auxiliary station for scanning.
1643 * Newer versions of this command implies that the fw uses
1644 * internal aux station for all aux activities that don't
1645 * requires a dedicated data queue.
1646 */
1647 if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
1648 ADD_STA,
1649 0) < 12) {
1650 /*
1651 * In old version the aux station uses mac id like other
1652 * station and not lmac id
1653 */
1654 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1655 if (ret)
1656 goto error;
1657 }
8ca151b5 1658
53a9d61e 1659 /* Add all the PHY contexts */
dd36a507
TM
1660 i = 0;
1661 while (!sband && i < NUM_NL80211_BANDS)
1662 sband = mvm->hw->wiphy->bands[i++];
1663
1664 if (WARN_ON_ONCE(!sband))
1665 goto error;
1666
1667 chan = &sband->channels[0];
1668
53a9d61e
IP
1669 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1670 for (i = 0; i < NUM_PHY_CTX; i++) {
1671 /*
1672 * The channel used here isn't relevant as it's
1673 * going to be overwritten in the other flows.
1674 * For now use the first channel we have.
1675 */
1676 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1677 &chandef, 1, 1);
1678 if (ret)
1679 goto error;
1680 }
8ca151b5 1681
c221daf2
CRI
1682 if (iwl_mvm_is_tt_in_fw(mvm)) {
1683 /* in order to give the responsibility of ct-kill and
1684 * TX backoff to FW we need to send empty temperature reporting
1685 * cmd during init time
1686 */
1687 iwl_mvm_send_temp_report_ths_cmd(mvm);
1688 } else {
1689 /* Initialize tx backoffs to the minimal possible */
1690 iwl_mvm_tt_tx_backoff(mvm, 0);
1691 }
5c89e7bc 1692
242d9c8b 1693#ifdef CONFIG_THERMAL
5c89e7bc 1694 /* TODO: read the budget from BIOS / Platform NVM */
944eafc2
CRI
1695
1696 /*
1697 * In case there is no budget from BIOS / Platform NVM the default
1698 * budget should be 2000mW (cooling state 0).
1699 */
1700 if (iwl_mvm_is_ctdp_supported(mvm)) {
5c89e7bc
CRI
1701 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1702 mvm->cooling_dev.cur_state);
75cfe338
LC
1703 if (ret)
1704 goto error;
1705 }
c221daf2 1706#endif
0c0e2c71 1707
aa43ae12
AM
1708 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1709 WARN_ON(iwl_mvm_config_ltr(mvm));
9180ac50 1710
c1cb92fc 1711 ret = iwl_mvm_power_update_device(mvm);
64b928c4
AB
1712 if (ret)
1713 goto error;
1714
f5b1cb2e 1715 iwl_mvm_lari_cfg(mvm);
35af15d1
AN
1716 /*
1717 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1718 * anyway, so don't init MCC.
1719 */
1720 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1721 ret = iwl_mvm_init_mcc(mvm);
1722 if (ret)
1723 goto error;
1724 }
90d4f7db 1725
859d914c 1726 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
4ca87a5f 1727 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
b66b5817 1728 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
d2496221
DS
1729 ret = iwl_mvm_config_scan(mvm);
1730 if (ret)
1731 goto error;
1732 }
1733
f130bb75
MG
1734 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1735 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1736
48e775e6
HD
1737 if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid))
1738 IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n");
1739
6ce1e5c0
GA
1740 ret = iwl_mvm_ppag_init(mvm);
1741 if (ret)
1742 goto error;
1743
da2830ac 1744 ret = iwl_mvm_sar_init(mvm);
78a19d52 1745 if (ret == 0)
5d041c46 1746 ret = iwl_mvm_sar_geo_init(mvm);
78a19d52 1747 else if (ret < 0)
a6bff3cb
HD
1748 goto error;
1749
c593d2fa
AB
1750 ret = iwl_mvm_sgom_init(mvm);
1751 if (ret)
1752 goto error;
1753
28dd7ccd 1754 iwl_mvm_tas_init(mvm);
7089ae63
JB
1755 iwl_mvm_leds_sync(mvm);
1756
b68bd2e3
IP
1757 iwl_mvm_ftm_initiator_smooth_config(mvm);
1758
4e8fe214
GG
1759 if (fw_has_capa(&mvm->fw->ucode_capa,
1760 IWL_UCODE_TLV_CAPA_RFIM_SUPPORT)) {
1761 if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE)
1762 iwl_rfi_send_config_cmd(mvm, NULL);
1763 }
1764
53a9d61e 1765 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
8ca151b5
JB
1766 return 0;
1767 error:
f4744258 1768 if (!iwlmvm_mod_params.init_dbg || !ret)
de8ba41b 1769 iwl_mvm_stop_device(mvm);
8ca151b5
JB
1770 return ret;
1771}
1772
1773int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1774{
1775 int ret, i;
1776
1777 lockdep_assert_held(&mvm->mutex);
1778
1779 ret = iwl_trans_start_hw(mvm->trans);
1780 if (ret)
1781 return ret;
1782
1783 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1784 if (ret) {
1785 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1786 goto error;
1787 }
1788
a0544272 1789 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
8ca151b5
JB
1790 if (ret)
1791 goto error;
1792
1793 /* Send phy db control command and then phy db calibration*/
1794 ret = iwl_send_phy_db_data(mvm->phy_db);
1795 if (ret)
1796 goto error;
1797
1798 ret = iwl_send_phy_cfg_cmd(mvm);
1799 if (ret)
1800 goto error;
1801
1802 /* init the fw <-> mac80211 STA mapping */
be9ae34e 1803 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++)
8ca151b5
JB
1804 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1805
2c2c3647
NE
1806 if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP,
1807 ADD_STA,
1808 0) < 12) {
1809 /*
1810 * Add auxiliary station for scanning.
1811 * Newer versions of this command implies that the fw uses
1812 * internal aux station for all aux activities that don't
1813 * requires a dedicated data queue.
1814 * In old version the aux station uses mac id like other
1815 * station and not lmac id
1816 */
1817 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1818 if (ret)
1819 goto error;
1820 }
8ca151b5
JB
1821
1822 return 0;
1823 error:
fcb6b92a 1824 iwl_mvm_stop_device(mvm);
8ca151b5
JB
1825 return ret;
1826}
1827
0416841d
JB
1828void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1829 struct iwl_rx_cmd_buffer *rxb)
30269c12
CRI
1830{
1831 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1832 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1833
0c8d0a47
GBA
1834 IWL_DEBUG_INFO(mvm,
1835 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1836 le32_to_cpu(mfuart_notif->installed_ver),
1837 le32_to_cpu(mfuart_notif->external_ver),
1838 le32_to_cpu(mfuart_notif->status),
1839 le32_to_cpu(mfuart_notif->duration));
1840
19f63c53
GBA
1841 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
1842 IWL_DEBUG_INFO(mvm,
0c8d0a47 1843 "MFUART: image size: 0x%08x\n",
19f63c53 1844 le32_to_cpu(mfuart_notif->image_size));
30269c12 1845}