Commit | Line | Data |
---|---|---|
8ca151b5 JB |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
51368bf7 | 8 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
8d193ca2 | 9 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
bdccdb85 | 10 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH |
8ca151b5 JB |
11 | * |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of version 2 of the GNU General Public License as | |
14 | * published by the Free Software Foundation. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
24 | * USA | |
25 | * | |
26 | * The full GNU General Public License is included in this distribution | |
410dc5aa | 27 | * in the file called COPYING. |
8ca151b5 JB |
28 | * |
29 | * Contact Information: | |
cb2f8277 | 30 | * Intel Linux Wireless <linuxwifi@intel.com> |
8ca151b5 JB |
31 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
32 | * | |
33 | * BSD LICENSE | |
34 | * | |
51368bf7 | 35 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
8d193ca2 | 36 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
bdccdb85 | 37 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH |
8ca151b5 JB |
38 | * All rights reserved. |
39 | * | |
40 | * Redistribution and use in source and binary forms, with or without | |
41 | * modification, are permitted provided that the following conditions | |
42 | * are met: | |
43 | * | |
44 | * * Redistributions of source code must retain the above copyright | |
45 | * notice, this list of conditions and the following disclaimer. | |
46 | * * Redistributions in binary form must reproduce the above copyright | |
47 | * notice, this list of conditions and the following disclaimer in | |
48 | * the documentation and/or other materials provided with the | |
49 | * distribution. | |
50 | * * Neither the name Intel Corporation nor the names of its | |
51 | * contributors may be used to endorse or promote products derived | |
52 | * from this software without specific prior written permission. | |
53 | * | |
54 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
55 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
56 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
57 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
58 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
59 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
60 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
61 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
62 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
63 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
64 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
65 | * | |
66 | *****************************************************************************/ | |
67 | #include <net/mac80211.h> | |
854d773e | 68 | #include <linux/netdevice.h> |
da2830ac | 69 | #include <linux/acpi.h> |
8ca151b5 JB |
70 | |
71 | #include "iwl-trans.h" | |
72 | #include "iwl-op-mode.h" | |
d962f9b1 | 73 | #include "fw/img.h" |
8ca151b5 JB |
74 | #include "iwl-debug.h" |
75 | #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */ | |
76 | #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */ | |
8c23f95c | 77 | #include "iwl-prph.h" |
8ca151b5 JB |
78 | #include "iwl-eeprom-parse.h" |
79 | ||
80 | #include "mvm.h" | |
2f89a5d7 | 81 | #include "fw-dbg.h" |
8ca151b5 JB |
82 | #include "iwl-phy-db.h" |
83 | ||
84 | #define MVM_UCODE_ALIVE_TIMEOUT HZ | |
85 | #define MVM_UCODE_CALIB_TIMEOUT (2*HZ) | |
86 | ||
87 | #define UCODE_VALID_OK cpu_to_le32(0x1) | |
88 | ||
8ca151b5 JB |
89 | struct iwl_mvm_alive_data { |
90 | bool valid; | |
91 | u32 scd_base_addr; | |
92 | }; | |
93 | ||
8ca151b5 JB |
94 | static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant) |
95 | { | |
96 | struct iwl_tx_ant_cfg_cmd tx_ant_cmd = { | |
97 | .valid = cpu_to_le32(valid_tx_ant), | |
98 | }; | |
99 | ||
33223542 | 100 | IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant); |
a1022927 | 101 | return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0, |
8ca151b5 JB |
102 | sizeof(tx_ant_cmd), &tx_ant_cmd); |
103 | } | |
104 | ||
43413a97 SS |
105 | static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm) |
106 | { | |
107 | int i; | |
108 | struct iwl_rss_config_cmd cmd = { | |
109 | .flags = cpu_to_le32(IWL_RSS_ENABLE), | |
110 | .hash_mask = IWL_RSS_HASH_TYPE_IPV4_TCP | | |
854d773e | 111 | IWL_RSS_HASH_TYPE_IPV4_UDP | |
43413a97 SS |
112 | IWL_RSS_HASH_TYPE_IPV4_PAYLOAD | |
113 | IWL_RSS_HASH_TYPE_IPV6_TCP | | |
854d773e | 114 | IWL_RSS_HASH_TYPE_IPV6_UDP | |
43413a97 SS |
115 | IWL_RSS_HASH_TYPE_IPV6_PAYLOAD, |
116 | }; | |
117 | ||
f43495fd SS |
118 | if (mvm->trans->num_rx_queues == 1) |
119 | return 0; | |
120 | ||
854d773e | 121 | /* Do not direct RSS traffic to Q 0 which is our fallback queue */ |
43413a97 | 122 | for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++) |
854d773e SS |
123 | cmd.indirection_table[i] = |
124 | 1 + (i % (mvm->trans->num_rx_queues - 1)); | |
125 | netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key)); | |
43413a97 SS |
126 | |
127 | return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd); | |
128 | } | |
129 | ||
97d5be7e LK |
130 | static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) |
131 | { | |
132 | struct iwl_dqa_enable_cmd dqa_cmd = { | |
133 | .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), | |
134 | }; | |
135 | u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0); | |
136 | int ret; | |
137 | ||
138 | ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); | |
139 | if (ret) | |
140 | IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret); | |
141 | else | |
142 | IWL_DEBUG_FW(mvm, "Working in DQA mode\n"); | |
143 | ||
144 | return ret; | |
145 | } | |
146 | ||
905e36ae | 147 | void iwl_free_fw_paging(struct iwl_mvm *mvm) |
a6c4fb44 MG |
148 | { |
149 | int i; | |
150 | ||
151 | if (!mvm->fw_paging_db[0].fw_paging_block) | |
152 | return; | |
153 | ||
154 | for (i = 0; i < NUM_OF_FW_PAGING_BLOCKS; i++) { | |
3edbc7da EG |
155 | struct iwl_fw_paging *paging = &mvm->fw_paging_db[i]; |
156 | ||
157 | if (!paging->fw_paging_block) { | |
a6c4fb44 MG |
158 | IWL_DEBUG_FW(mvm, |
159 | "Paging: block %d already freed, continue to next page\n", | |
160 | i); | |
161 | ||
162 | continue; | |
163 | } | |
3edbc7da EG |
164 | dma_unmap_page(mvm->trans->dev, paging->fw_paging_phys, |
165 | paging->fw_paging_size, DMA_BIDIRECTIONAL); | |
a6c4fb44 | 166 | |
3edbc7da EG |
167 | __free_pages(paging->fw_paging_block, |
168 | get_order(paging->fw_paging_size)); | |
169 | paging->fw_paging_block = NULL; | |
a6c4fb44 | 170 | } |
e1120187 | 171 | kfree(mvm->trans->paging_download_buf); |
905e36ae | 172 | mvm->trans->paging_download_buf = NULL; |
f742aaf3 | 173 | mvm->trans->paging_db = NULL; |
905e36ae | 174 | |
a6c4fb44 MG |
175 | memset(mvm->fw_paging_db, 0, sizeof(mvm->fw_paging_db)); |
176 | } | |
177 | ||
178 | static int iwl_fill_paging_mem(struct iwl_mvm *mvm, const struct fw_img *image) | |
179 | { | |
180 | int sec_idx, idx; | |
181 | u32 offset = 0; | |
182 | ||
183 | /* | |
184 | * find where is the paging image start point: | |
185 | * if CPU2 exist and it's in paging format, then the image looks like: | |
186 | * CPU1 sections (2 or more) | |
187 | * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between CPU1 to CPU2 | |
188 | * CPU2 sections (not paged) | |
189 | * PAGING_SEPARATOR_SECTION delimiter - separate between CPU2 | |
190 | * non paged to CPU2 paging sec | |
191 | * CPU2 paging CSS | |
192 | * CPU2 paging image (including instruction and data) | |
193 | */ | |
eef187a7 | 194 | for (sec_idx = 0; sec_idx < image->num_sec; sec_idx++) { |
a6c4fb44 MG |
195 | if (image->sec[sec_idx].offset == PAGING_SEPARATOR_SECTION) { |
196 | sec_idx++; | |
197 | break; | |
198 | } | |
199 | } | |
200 | ||
cd47a3d3 MG |
201 | /* |
202 | * If paging is enabled there should be at least 2 more sections left | |
203 | * (one for CSS and one for Paging data) | |
204 | */ | |
eef187a7 | 205 | if (sec_idx >= image->num_sec - 1) { |
cd47a3d3 | 206 | IWL_ERR(mvm, "Paging: Missing CSS and/or paging sections\n"); |
a6c4fb44 MG |
207 | iwl_free_fw_paging(mvm); |
208 | return -EINVAL; | |
209 | } | |
210 | ||
211 | /* copy the CSS block to the dram */ | |
212 | IWL_DEBUG_FW(mvm, "Paging: load paging CSS to FW, sec = %d\n", | |
213 | sec_idx); | |
214 | ||
215 | memcpy(page_address(mvm->fw_paging_db[0].fw_paging_block), | |
216 | image->sec[sec_idx].data, | |
217 | mvm->fw_paging_db[0].fw_paging_size); | |
4b70f076 SS |
218 | dma_sync_single_for_device(mvm->trans->dev, |
219 | mvm->fw_paging_db[0].fw_paging_phys, | |
220 | mvm->fw_paging_db[0].fw_paging_size, | |
221 | DMA_BIDIRECTIONAL); | |
a6c4fb44 MG |
222 | |
223 | IWL_DEBUG_FW(mvm, | |
224 | "Paging: copied %d CSS bytes to first block\n", | |
225 | mvm->fw_paging_db[0].fw_paging_size); | |
226 | ||
227 | sec_idx++; | |
228 | ||
229 | /* | |
230 | * copy the paging blocks to the dram | |
231 | * loop index start from 1 since that CSS block already copied to dram | |
232 | * and CSS index is 0. | |
233 | * loop stop at num_of_paging_blk since that last block is not full. | |
234 | */ | |
235 | for (idx = 1; idx < mvm->num_of_paging_blk; idx++) { | |
4b70f076 SS |
236 | struct iwl_fw_paging *block = &mvm->fw_paging_db[idx]; |
237 | ||
238 | memcpy(page_address(block->fw_paging_block), | |
a6c4fb44 | 239 | image->sec[sec_idx].data + offset, |
4b70f076 SS |
240 | block->fw_paging_size); |
241 | dma_sync_single_for_device(mvm->trans->dev, | |
242 | block->fw_paging_phys, | |
243 | block->fw_paging_size, | |
244 | DMA_BIDIRECTIONAL); | |
245 | ||
a6c4fb44 MG |
246 | |
247 | IWL_DEBUG_FW(mvm, | |
248 | "Paging: copied %d paging bytes to block %d\n", | |
249 | mvm->fw_paging_db[idx].fw_paging_size, | |
250 | idx); | |
251 | ||
252 | offset += mvm->fw_paging_db[idx].fw_paging_size; | |
253 | } | |
254 | ||
255 | /* copy the last paging block */ | |
256 | if (mvm->num_of_pages_in_last_blk > 0) { | |
4b70f076 SS |
257 | struct iwl_fw_paging *block = &mvm->fw_paging_db[idx]; |
258 | ||
259 | memcpy(page_address(block->fw_paging_block), | |
a6c4fb44 MG |
260 | image->sec[sec_idx].data + offset, |
261 | FW_PAGING_SIZE * mvm->num_of_pages_in_last_blk); | |
4b70f076 SS |
262 | dma_sync_single_for_device(mvm->trans->dev, |
263 | block->fw_paging_phys, | |
264 | block->fw_paging_size, | |
265 | DMA_BIDIRECTIONAL); | |
a6c4fb44 MG |
266 | |
267 | IWL_DEBUG_FW(mvm, | |
268 | "Paging: copied %d pages in the last block %d\n", | |
269 | mvm->num_of_pages_in_last_blk, idx); | |
270 | } | |
271 | ||
272 | return 0; | |
273 | } | |
274 | ||
bdccdb85 GBA |
275 | void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm, |
276 | struct iwl_rx_cmd_buffer *rxb) | |
277 | { | |
278 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
279 | struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data; | |
280 | __le32 *dump_data = mfu_dump_notif->data; | |
281 | int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32); | |
282 | int i; | |
283 | ||
284 | if (mfu_dump_notif->index_num == 0) | |
285 | IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n", | |
286 | le32_to_cpu(mfu_dump_notif->assert_id)); | |
287 | ||
288 | for (i = 0; i < n_words; i++) | |
289 | IWL_DEBUG_INFO(mvm, | |
290 | "MFUART assert dump, dword %u: 0x%08x\n", | |
291 | le16_to_cpu(mfu_dump_notif->index_num) * | |
292 | n_words + i, | |
293 | le32_to_cpu(dump_data[i])); | |
294 | } | |
295 | ||
a6c4fb44 MG |
296 | static int iwl_alloc_fw_paging_mem(struct iwl_mvm *mvm, |
297 | const struct fw_img *image) | |
298 | { | |
299 | struct page *block; | |
300 | dma_addr_t phys = 0; | |
08d785fd | 301 | int blk_idx, order, num_of_pages, size, dma_enabled; |
a6c4fb44 MG |
302 | |
303 | if (mvm->fw_paging_db[0].fw_paging_block) | |
304 | return 0; | |
305 | ||
306 | dma_enabled = is_device_dma_capable(mvm->trans->dev); | |
307 | ||
308 | /* ensure BLOCK_2_EXP_SIZE is power of 2 of PAGING_BLOCK_SIZE */ | |
309 | BUILD_BUG_ON(BIT(BLOCK_2_EXP_SIZE) != PAGING_BLOCK_SIZE); | |
310 | ||
311 | num_of_pages = image->paging_mem_size / FW_PAGING_SIZE; | |
850fe9af SS |
312 | mvm->num_of_paging_blk = |
313 | DIV_ROUND_UP(num_of_pages, NUM_OF_PAGE_PER_GROUP); | |
a6c4fb44 MG |
314 | mvm->num_of_pages_in_last_blk = |
315 | num_of_pages - | |
316 | NUM_OF_PAGE_PER_GROUP * (mvm->num_of_paging_blk - 1); | |
317 | ||
318 | IWL_DEBUG_FW(mvm, | |
319 | "Paging: allocating mem for %d paging blocks, each block holds 8 pages, last block holds %d pages\n", | |
320 | mvm->num_of_paging_blk, | |
321 | mvm->num_of_pages_in_last_blk); | |
322 | ||
a6c4fb44 | 323 | /* |
08d785fd | 324 | * Allocate CSS and paging blocks in dram. |
a6c4fb44 | 325 | */ |
08d785fd SS |
326 | for (blk_idx = 0; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) { |
327 | /* For CSS allocate 4KB, for others PAGING_BLOCK_SIZE (32K) */ | |
328 | size = blk_idx ? PAGING_BLOCK_SIZE : FW_PAGING_SIZE; | |
329 | order = get_order(size); | |
a6c4fb44 MG |
330 | block = alloc_pages(GFP_KERNEL, order); |
331 | if (!block) { | |
332 | /* free all the previous pages since we failed */ | |
333 | iwl_free_fw_paging(mvm); | |
334 | return -ENOMEM; | |
335 | } | |
336 | ||
337 | mvm->fw_paging_db[blk_idx].fw_paging_block = block; | |
08d785fd | 338 | mvm->fw_paging_db[blk_idx].fw_paging_size = size; |
a6c4fb44 MG |
339 | |
340 | if (dma_enabled) { | |
341 | phys = dma_map_page(mvm->trans->dev, block, 0, | |
342 | PAGE_SIZE << order, | |
343 | DMA_BIDIRECTIONAL); | |
344 | if (dma_mapping_error(mvm->trans->dev, phys)) { | |
345 | /* | |
346 | * free the previous pages and the current one | |
347 | * since we failed to map_page. | |
348 | */ | |
349 | iwl_free_fw_paging(mvm); | |
350 | return -ENOMEM; | |
351 | } | |
352 | mvm->fw_paging_db[blk_idx].fw_paging_phys = phys; | |
e1120187 MG |
353 | } else { |
354 | mvm->fw_paging_db[blk_idx].fw_paging_phys = | |
355 | PAGING_ADDR_SIG | | |
356 | blk_idx << BLOCK_2_EXP_SIZE; | |
a6c4fb44 MG |
357 | } |
358 | ||
08d785fd SS |
359 | if (!blk_idx) |
360 | IWL_DEBUG_FW(mvm, | |
361 | "Paging: allocated 4K(CSS) bytes (order %d) for firmware paging.\n", | |
362 | order); | |
363 | else | |
364 | IWL_DEBUG_FW(mvm, | |
365 | "Paging: allocated 32K bytes (order %d) for firmware paging.\n", | |
366 | order); | |
a6c4fb44 MG |
367 | } |
368 | ||
369 | return 0; | |
370 | } | |
371 | ||
372 | static int iwl_save_fw_paging(struct iwl_mvm *mvm, | |
373 | const struct fw_img *fw) | |
374 | { | |
375 | int ret; | |
376 | ||
377 | ret = iwl_alloc_fw_paging_mem(mvm, fw); | |
378 | if (ret) | |
379 | return ret; | |
380 | ||
381 | return iwl_fill_paging_mem(mvm, fw); | |
382 | } | |
383 | ||
384 | /* send paging cmd to FW in case CPU2 has paging image */ | |
385 | static int iwl_send_paging_cmd(struct iwl_mvm *mvm, const struct fw_img *fw) | |
386 | { | |
3b43fbca JB |
387 | union { |
388 | struct iwl_fw_paging_cmd v2; | |
389 | struct iwl_fw_paging_cmd_v1 v1; | |
390 | } paging_cmd = { | |
391 | .v2.flags = | |
a6c4fb44 MG |
392 | cpu_to_le32(PAGING_CMD_IS_SECURED | |
393 | PAGING_CMD_IS_ENABLED | | |
394 | (mvm->num_of_pages_in_last_blk << | |
395 | PAGING_CMD_NUM_OF_PAGES_IN_LAST_GRP_POS)), | |
3b43fbca JB |
396 | .v2.block_size = cpu_to_le32(BLOCK_2_EXP_SIZE), |
397 | .v2.block_num = cpu_to_le32(mvm->num_of_paging_blk), | |
a6c4fb44 | 398 | }; |
3b43fbca | 399 | int blk_idx, size = sizeof(paging_cmd.v2); |
d975d720 SS |
400 | |
401 | /* A bit hard coded - but this is the old API and will be deprecated */ | |
402 | if (!iwl_mvm_has_new_tx_api(mvm)) | |
3b43fbca | 403 | size = sizeof(paging_cmd.v1); |
a6c4fb44 MG |
404 | |
405 | /* loop for for all paging blocks + CSS block */ | |
406 | for (blk_idx = 0; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) { | |
d975d720 SS |
407 | dma_addr_t addr = mvm->fw_paging_db[blk_idx].fw_paging_phys; |
408 | ||
409 | addr = addr >> PAGE_2_EXP_SIZE; | |
410 | ||
411 | if (iwl_mvm_has_new_tx_api(mvm)) { | |
412 | __le64 phy_addr = cpu_to_le64(addr); | |
413 | ||
3b43fbca | 414 | paging_cmd.v2.device_phy_addr[blk_idx] = phy_addr; |
d975d720 SS |
415 | } else { |
416 | __le32 phy_addr = cpu_to_le32(addr); | |
417 | ||
3b43fbca | 418 | paging_cmd.v1.device_phy_addr[blk_idx] = phy_addr; |
d975d720 | 419 | } |
a6c4fb44 MG |
420 | } |
421 | ||
422 | return iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(FW_PAGING_BLOCK_CMD, | |
423 | IWL_ALWAYS_LONG_GROUP, 0), | |
d975d720 | 424 | 0, size, &paging_cmd); |
a6c4fb44 MG |
425 | } |
426 | ||
e1120187 MG |
427 | /* |
428 | * Send paging item cmd to FW in case CPU2 has paging image | |
429 | */ | |
430 | static int iwl_trans_get_paging_item(struct iwl_mvm *mvm) | |
431 | { | |
432 | int ret; | |
433 | struct iwl_fw_get_item_cmd fw_get_item_cmd = { | |
434 | .item_id = cpu_to_le32(IWL_FW_ITEM_ID_PAGING), | |
435 | }; | |
436 | ||
437 | struct iwl_fw_get_item_resp *item_resp; | |
438 | struct iwl_host_cmd cmd = { | |
439 | .id = iwl_cmd_id(FW_GET_ITEM_CMD, IWL_ALWAYS_LONG_GROUP, 0), | |
440 | .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL, | |
441 | .data = { &fw_get_item_cmd, }, | |
442 | }; | |
443 | ||
444 | cmd.len[0] = sizeof(struct iwl_fw_get_item_cmd); | |
445 | ||
446 | ret = iwl_mvm_send_cmd(mvm, &cmd); | |
447 | if (ret) { | |
448 | IWL_ERR(mvm, | |
449 | "Paging: Failed to send FW_GET_ITEM_CMD cmd (err = %d)\n", | |
450 | ret); | |
451 | return ret; | |
452 | } | |
453 | ||
454 | item_resp = (void *)((struct iwl_rx_packet *)cmd.resp_pkt)->data; | |
455 | if (item_resp->item_id != cpu_to_le32(IWL_FW_ITEM_ID_PAGING)) { | |
456 | IWL_ERR(mvm, | |
457 | "Paging: got wrong item in FW_GET_ITEM_CMD resp (item_id = %u)\n", | |
458 | le32_to_cpu(item_resp->item_id)); | |
459 | ret = -EIO; | |
460 | goto exit; | |
461 | } | |
462 | ||
c94d7996 MG |
463 | /* Add an extra page for headers */ |
464 | mvm->trans->paging_download_buf = kzalloc(PAGING_BLOCK_SIZE + | |
465 | FW_PAGING_SIZE, | |
e1120187 MG |
466 | GFP_KERNEL); |
467 | if (!mvm->trans->paging_download_buf) { | |
468 | ret = -ENOMEM; | |
469 | goto exit; | |
470 | } | |
471 | mvm->trans->paging_req_addr = le32_to_cpu(item_resp->item_val); | |
472 | mvm->trans->paging_db = mvm->fw_paging_db; | |
473 | IWL_DEBUG_FW(mvm, | |
474 | "Paging: got paging request address (paging_req_addr 0x%08x)\n", | |
475 | mvm->trans->paging_req_addr); | |
476 | ||
477 | exit: | |
478 | iwl_free_resp(&cmd); | |
479 | ||
480 | return ret; | |
481 | } | |
482 | ||
8ca151b5 JB |
483 | static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, |
484 | struct iwl_rx_packet *pkt, void *data) | |
485 | { | |
486 | struct iwl_mvm *mvm = | |
487 | container_of(notif_wait, struct iwl_mvm, notif_wait); | |
488 | struct iwl_mvm_alive_data *alive_data = data; | |
5c228d63 | 489 | struct mvm_alive_resp_v3 *palive3; |
7e1223b5 | 490 | struct mvm_alive_resp *palive; |
5c228d63 SS |
491 | struct iwl_umac_alive *umac; |
492 | struct iwl_lmac_alive *lmac1; | |
493 | struct iwl_lmac_alive *lmac2 = NULL; | |
494 | u16 status; | |
01a9ca51 | 495 | |
5c228d63 SS |
496 | if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) { |
497 | palive = (void *)pkt->data; | |
498 | umac = &palive->umac_data; | |
499 | lmac1 = &palive->lmac_data[0]; | |
500 | lmac2 = &palive->lmac_data[1]; | |
501 | status = le16_to_cpu(palive->status); | |
502 | } else { | |
503 | palive3 = (void *)pkt->data; | |
504 | umac = &palive3->umac_data; | |
505 | lmac1 = &palive3->lmac_data; | |
506 | status = le16_to_cpu(palive3->status); | |
507 | } | |
01a9ca51 | 508 | |
5c228d63 SS |
509 | mvm->error_event_table[0] = le32_to_cpu(lmac1->error_event_table_ptr); |
510 | if (lmac2) | |
511 | mvm->error_event_table[1] = | |
512 | le32_to_cpu(lmac2->error_event_table_ptr); | |
513 | mvm->log_event_table = le32_to_cpu(lmac1->log_event_table_ptr); | |
514 | mvm->sf_space.addr = le32_to_cpu(lmac1->st_fwrd_addr); | |
515 | mvm->sf_space.size = le32_to_cpu(lmac1->st_fwrd_size); | |
ffa70264 | 516 | |
5c228d63 | 517 | mvm->umac_error_event_table = le32_to_cpu(umac->error_info_addr); |
01a9ca51 | 518 | |
5c228d63 SS |
519 | alive_data->scd_base_addr = le32_to_cpu(lmac1->scd_base_ptr); |
520 | alive_data->valid = status == IWL_ALIVE_STATUS_OK; | |
521 | if (mvm->umac_error_event_table) | |
522 | mvm->support_umac_log = true; | |
7e1223b5 | 523 | |
5c228d63 SS |
524 | IWL_DEBUG_FW(mvm, |
525 | "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n", | |
526 | status, lmac1->ver_type, lmac1->ver_subtype); | |
7e1223b5 | 527 | |
5c228d63 SS |
528 | if (lmac2) |
529 | IWL_DEBUG_FW(mvm, "Alive ucode CDB\n"); | |
7e1223b5 | 530 | |
5c228d63 SS |
531 | IWL_DEBUG_FW(mvm, |
532 | "UMAC version: Major - 0x%x, Minor - 0x%x\n", | |
533 | le32_to_cpu(umac->umac_major), | |
534 | le32_to_cpu(umac->umac_minor)); | |
8ca151b5 JB |
535 | |
536 | return true; | |
537 | } | |
538 | ||
1f370650 SS |
539 | static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait, |
540 | struct iwl_rx_packet *pkt, void *data) | |
541 | { | |
542 | WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); | |
543 | ||
544 | return true; | |
545 | } | |
546 | ||
8ca151b5 JB |
547 | static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, |
548 | struct iwl_rx_packet *pkt, void *data) | |
549 | { | |
550 | struct iwl_phy_db *phy_db = data; | |
551 | ||
552 | if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) { | |
553 | WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF); | |
554 | return true; | |
555 | } | |
556 | ||
ce1f2778 | 557 | WARN_ON(iwl_phy_db_set_section(phy_db, pkt)); |
8ca151b5 JB |
558 | |
559 | return false; | |
560 | } | |
561 | ||
1f370650 SS |
562 | static int iwl_mvm_init_paging(struct iwl_mvm *mvm) |
563 | { | |
564 | const struct fw_img *fw = &mvm->fw->img[mvm->cur_ucode]; | |
565 | int ret; | |
566 | ||
567 | /* | |
568 | * Configure and operate fw paging mechanism. | |
569 | * The driver configures the paging flow only once. | |
570 | * The CPU2 paging image is included in the IWL_UCODE_INIT image. | |
571 | */ | |
572 | if (!fw->paging_mem_size) | |
573 | return 0; | |
574 | ||
575 | /* | |
576 | * When dma is not enabled, the driver needs to copy / write | |
577 | * the downloaded / uploaded page to / from the smem. | |
578 | * This gets the location of the place were the pages are | |
579 | * stored. | |
580 | */ | |
581 | if (!is_device_dma_capable(mvm->trans->dev)) { | |
582 | ret = iwl_trans_get_paging_item(mvm); | |
583 | if (ret) { | |
584 | IWL_ERR(mvm, "failed to get FW paging item\n"); | |
585 | return ret; | |
586 | } | |
587 | } | |
588 | ||
589 | ret = iwl_save_fw_paging(mvm, fw); | |
590 | if (ret) { | |
591 | IWL_ERR(mvm, "failed to save the FW paging image\n"); | |
592 | return ret; | |
593 | } | |
594 | ||
595 | ret = iwl_send_paging_cmd(mvm, fw); | |
596 | if (ret) { | |
597 | IWL_ERR(mvm, "failed to send the paging cmd\n"); | |
598 | iwl_free_fw_paging(mvm); | |
599 | return ret; | |
600 | } | |
601 | ||
602 | return 0; | |
603 | } | |
8ca151b5 JB |
604 | static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, |
605 | enum iwl_ucode_type ucode_type) | |
606 | { | |
607 | struct iwl_notification_wait alive_wait; | |
608 | struct iwl_mvm_alive_data alive_data; | |
609 | const struct fw_img *fw; | |
610 | int ret, i; | |
611 | enum iwl_ucode_type old_type = mvm->cur_ucode; | |
6eb031d2 | 612 | static const u16 alive_cmd[] = { MVM_ALIVE }; |
91479b64 | 613 | struct iwl_sf_region st_fwrd_space; |
8ca151b5 | 614 | |
61df750c | 615 | if (ucode_type == IWL_UCODE_REGULAR && |
3d2d4422 GBA |
616 | iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) && |
617 | !(fw_has_capa(&mvm->fw->ucode_capa, | |
618 | IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED))) | |
612da1ef | 619 | fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER); |
61df750c | 620 | else |
612da1ef | 621 | fw = iwl_get_ucode_image(mvm->fw, ucode_type); |
befe9b6f | 622 | if (WARN_ON(!fw)) |
8ca151b5 | 623 | return -EINVAL; |
befe9b6f | 624 | mvm->cur_ucode = ucode_type; |
65b280fe | 625 | clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); |
8ca151b5 JB |
626 | |
627 | iwl_init_notification_wait(&mvm->notif_wait, &alive_wait, | |
628 | alive_cmd, ARRAY_SIZE(alive_cmd), | |
629 | iwl_alive_fn, &alive_data); | |
630 | ||
631 | ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT); | |
632 | if (ret) { | |
633 | mvm->cur_ucode = old_type; | |
634 | iwl_remove_notification(&mvm->notif_wait, &alive_wait); | |
635 | return ret; | |
636 | } | |
637 | ||
638 | /* | |
639 | * Some things may run in the background now, but we | |
640 | * just wait for the ALIVE notification here. | |
641 | */ | |
642 | ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait, | |
643 | MVM_UCODE_ALIVE_TIMEOUT); | |
644 | if (ret) { | |
d6be9c1d SS |
645 | struct iwl_trans *trans = mvm->trans; |
646 | ||
6e584873 | 647 | if (trans->cfg->device_family == IWL_DEVICE_FAMILY_A000) |
d6be9c1d SS |
648 | IWL_ERR(mvm, |
649 | "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", | |
650 | iwl_read_prph(trans, UMAG_SB_CPU_1_STATUS), | |
651 | iwl_read_prph(trans, UMAG_SB_CPU_2_STATUS)); | |
6e584873 | 652 | else if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000) |
192de2b4 DS |
653 | IWL_ERR(mvm, |
654 | "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n", | |
d6be9c1d SS |
655 | iwl_read_prph(trans, SB_CPU_1_STATUS), |
656 | iwl_read_prph(trans, SB_CPU_2_STATUS)); | |
8ca151b5 JB |
657 | mvm->cur_ucode = old_type; |
658 | return ret; | |
659 | } | |
660 | ||
661 | if (!alive_data.valid) { | |
662 | IWL_ERR(mvm, "Loaded ucode is not valid!\n"); | |
663 | mvm->cur_ucode = old_type; | |
664 | return -EIO; | |
665 | } | |
666 | ||
91479b64 EH |
667 | /* |
668 | * update the sdio allocation according to the pointer we get in the | |
669 | * alive notification. | |
670 | */ | |
671 | st_fwrd_space.addr = mvm->sf_space.addr; | |
672 | st_fwrd_space.size = mvm->sf_space.size; | |
673 | ret = iwl_trans_update_sf(mvm->trans, &st_fwrd_space); | |
82e8aea0 ES |
674 | if (ret) { |
675 | IWL_ERR(mvm, "Failed to update SF size. ret %d\n", ret); | |
676 | return ret; | |
677 | } | |
91479b64 | 678 | |
8ca151b5 JB |
679 | iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr); |
680 | ||
681 | /* | |
682 | * Note: all the queues are enabled as part of the interface | |
683 | * initialization, but in firmware restart scenarios they | |
684 | * could be stopped, so wake them up. In firmware restart, | |
685 | * mac80211 will have the queues stopped as well until the | |
686 | * reconfiguration completes. During normal startup, they | |
687 | * will be empty. | |
688 | */ | |
689 | ||
4ecafae9 | 690 | memset(&mvm->queue_info, 0, sizeof(mvm->queue_info)); |
097129c9 LK |
691 | if (iwl_mvm_is_dqa_supported(mvm)) |
692 | mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].hw_queue_refcount = 1; | |
693 | else | |
694 | mvm->queue_info[IWL_MVM_CMD_QUEUE].hw_queue_refcount = 1; | |
8ca151b5 | 695 | |
df197c00 JB |
696 | for (i = 0; i < IEEE80211_MAX_QUEUES; i++) |
697 | atomic_set(&mvm->mac80211_queue_stop_count[i], 0); | |
8ca151b5 | 698 | |
65b280fe | 699 | set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status); |
8ca151b5 JB |
700 | |
701 | return 0; | |
702 | } | |
8ca151b5 | 703 | |
8c5f47b1 JB |
704 | static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) |
705 | { | |
706 | struct iwl_notification_wait init_wait; | |
707 | struct iwl_nvm_access_complete_cmd nvm_complete = {}; | |
708 | struct iwl_init_extended_cfg_cmd init_cfg = { | |
709 | .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)), | |
710 | }; | |
711 | static const u16 init_complete[] = { | |
712 | INIT_COMPLETE_NOTIF, | |
713 | }; | |
714 | int ret; | |
715 | ||
716 | lockdep_assert_held(&mvm->mutex); | |
717 | ||
718 | iwl_init_notification_wait(&mvm->notif_wait, | |
719 | &init_wait, | |
720 | init_complete, | |
721 | ARRAY_SIZE(init_complete), | |
722 | iwl_wait_init_complete, | |
723 | NULL); | |
724 | ||
725 | /* Will also start the device */ | |
726 | ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); | |
727 | if (ret) { | |
728 | IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); | |
729 | goto error; | |
730 | } | |
731 | ||
732 | /* Send init config command to mark that we are sending NVM access | |
733 | * commands | |
734 | */ | |
735 | ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP, | |
736 | INIT_EXTENDED_CFG_CMD), 0, | |
737 | sizeof(init_cfg), &init_cfg); | |
738 | if (ret) { | |
739 | IWL_ERR(mvm, "Failed to run init config command: %d\n", | |
740 | ret); | |
741 | goto error; | |
742 | } | |
743 | ||
e9e1ba3d SS |
744 | /* Load NVM to NIC if needed */ |
745 | if (mvm->nvm_file_name) { | |
746 | iwl_mvm_read_external_nvm(mvm); | |
8c5f47b1 | 747 | iwl_mvm_load_nvm_to_nic(mvm); |
e9e1ba3d | 748 | } |
8c5f47b1 | 749 | |
d4f3695e SS |
750 | if (IWL_MVM_PARSE_NVM && read_nvm) { |
751 | ret = iwl_nvm_init(mvm, true); | |
752 | if (ret) { | |
753 | IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); | |
754 | goto error; | |
755 | } | |
756 | } | |
757 | ||
8c5f47b1 JB |
758 | ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, |
759 | NVM_ACCESS_COMPLETE), 0, | |
760 | sizeof(nvm_complete), &nvm_complete); | |
761 | if (ret) { | |
762 | IWL_ERR(mvm, "Failed to run complete NVM access: %d\n", | |
763 | ret); | |
764 | goto error; | |
765 | } | |
766 | ||
767 | /* We wait for the INIT complete notification */ | |
e9e1ba3d SS |
768 | ret = iwl_wait_notification(&mvm->notif_wait, &init_wait, |
769 | MVM_UCODE_ALIVE_TIMEOUT); | |
770 | if (ret) | |
771 | return ret; | |
772 | ||
773 | /* Read the NVM only at driver load time, no need to do this twice */ | |
d4f3695e | 774 | if (!IWL_MVM_PARSE_NVM && read_nvm) { |
e9e1ba3d SS |
775 | ret = iwl_mvm_nvm_get_from_fw(mvm); |
776 | if (ret) { | |
777 | IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); | |
778 | return ret; | |
779 | } | |
780 | } | |
781 | ||
782 | return 0; | |
8c5f47b1 JB |
783 | |
784 | error: | |
785 | iwl_remove_notification(&mvm->notif_wait, &init_wait); | |
786 | return ret; | |
787 | } | |
788 | ||
8ca151b5 JB |
789 | static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) |
790 | { | |
791 | struct iwl_phy_cfg_cmd phy_cfg_cmd; | |
792 | enum iwl_ucode_type ucode_type = mvm->cur_ucode; | |
793 | ||
794 | /* Set parameters */ | |
a0544272 | 795 | phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm)); |
8ca151b5 JB |
796 | phy_cfg_cmd.calib_control.event_trigger = |
797 | mvm->fw->default_calib[ucode_type].event_trigger; | |
798 | phy_cfg_cmd.calib_control.flow_trigger = | |
799 | mvm->fw->default_calib[ucode_type].flow_trigger; | |
800 | ||
801 | IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n", | |
802 | phy_cfg_cmd.phy_cfg); | |
803 | ||
a1022927 | 804 | return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0, |
8ca151b5 JB |
805 | sizeof(phy_cfg_cmd), &phy_cfg_cmd); |
806 | } | |
807 | ||
8ca151b5 JB |
808 | int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) |
809 | { | |
810 | struct iwl_notification_wait calib_wait; | |
6eb031d2 | 811 | static const u16 init_complete[] = { |
8ca151b5 JB |
812 | INIT_COMPLETE_NOTIF, |
813 | CALIB_RES_NOTIF_PHY_DB | |
814 | }; | |
815 | int ret; | |
816 | ||
8c5f47b1 JB |
817 | if (iwl_mvm_has_new_tx_api(mvm)) |
818 | return iwl_run_unified_mvm_ucode(mvm, true); | |
819 | ||
8ca151b5 JB |
820 | lockdep_assert_held(&mvm->mutex); |
821 | ||
8d193ca2 | 822 | if (WARN_ON_ONCE(mvm->calibrating)) |
8ca151b5 JB |
823 | return 0; |
824 | ||
825 | iwl_init_notification_wait(&mvm->notif_wait, | |
826 | &calib_wait, | |
827 | init_complete, | |
828 | ARRAY_SIZE(init_complete), | |
829 | iwl_wait_phy_db_entry, | |
830 | mvm->phy_db); | |
831 | ||
832 | /* Will also start the device */ | |
833 | ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT); | |
834 | if (ret) { | |
835 | IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); | |
836 | goto error; | |
837 | } | |
838 | ||
b3de3ef4 EG |
839 | if (mvm->cfg->device_family < IWL_DEVICE_FAMILY_8000) { |
840 | ret = iwl_mvm_send_bt_init_conf(mvm); | |
841 | if (ret) | |
842 | goto error; | |
843 | } | |
931d4160 | 844 | |
81a67e32 | 845 | /* Read the NVM only at driver load time, no need to do this twice */ |
8ca151b5 JB |
846 | if (read_nvm) { |
847 | /* Read nvm */ | |
14b485f0 | 848 | ret = iwl_nvm_init(mvm, true); |
8ca151b5 JB |
849 | if (ret) { |
850 | IWL_ERR(mvm, "Failed to read NVM: %d\n", ret); | |
851 | goto error; | |
852 | } | |
853 | } | |
854 | ||
81a67e32 | 855 | /* In case we read the NVM from external file, load it to the NIC */ |
e02a9d60 | 856 | if (mvm->nvm_file_name) |
81a67e32 EL |
857 | iwl_mvm_load_nvm_to_nic(mvm); |
858 | ||
8ca151b5 JB |
859 | ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans); |
860 | WARN_ON(ret); | |
861 | ||
4f59334b EH |
862 | /* |
863 | * abort after reading the nvm in case RF Kill is on, we will complete | |
864 | * the init seq later when RF kill will switch to off | |
865 | */ | |
1a3fe0b2 | 866 | if (iwl_mvm_is_radio_hw_killed(mvm)) { |
4f59334b EH |
867 | IWL_DEBUG_RF_KILL(mvm, |
868 | "jump over all phy activities due to RF kill\n"); | |
869 | iwl_remove_notification(&mvm->notif_wait, &calib_wait); | |
a4082843 AN |
870 | ret = 1; |
871 | goto out; | |
4f59334b EH |
872 | } |
873 | ||
31b8b343 EG |
874 | mvm->calibrating = true; |
875 | ||
e07cbb53 | 876 | /* Send TX valid antennas before triggering calibrations */ |
a0544272 | 877 | ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); |
e07cbb53 DS |
878 | if (ret) |
879 | goto error; | |
880 | ||
8ca151b5 JB |
881 | /* |
882 | * Send phy configurations command to init uCode | |
883 | * to start the 16.0 uCode init image internal calibrations. | |
884 | */ | |
885 | ret = iwl_send_phy_cfg_cmd(mvm); | |
886 | if (ret) { | |
887 | IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n", | |
888 | ret); | |
889 | goto error; | |
890 | } | |
891 | ||
892 | /* | |
893 | * Some things may run in the background now, but we | |
894 | * just wait for the calibration complete notification. | |
895 | */ | |
896 | ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, | |
897 | MVM_UCODE_CALIB_TIMEOUT); | |
31b8b343 | 898 | |
1a3fe0b2 | 899 | if (ret && iwl_mvm_is_radio_hw_killed(mvm)) { |
31b8b343 EG |
900 | IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); |
901 | ret = 1; | |
902 | } | |
8ca151b5 JB |
903 | goto out; |
904 | ||
905 | error: | |
906 | iwl_remove_notification(&mvm->notif_wait, &calib_wait); | |
907 | out: | |
31b8b343 | 908 | mvm->calibrating = false; |
a4082843 | 909 | if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) { |
8ca151b5 JB |
910 | /* we want to debug INIT and we have no NVM - fake */ |
911 | mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) + | |
912 | sizeof(struct ieee80211_channel) + | |
913 | sizeof(struct ieee80211_rate), | |
914 | GFP_KERNEL); | |
915 | if (!mvm->nvm_data) | |
916 | return -ENOMEM; | |
8ca151b5 JB |
917 | mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels; |
918 | mvm->nvm_data->bands[0].n_channels = 1; | |
919 | mvm->nvm_data->bands[0].n_bitrates = 1; | |
920 | mvm->nvm_data->bands[0].bitrates = | |
921 | (void *)mvm->nvm_data->channels + 1; | |
922 | mvm->nvm_data->bands[0].bitrates->hw_value = 10; | |
923 | } | |
924 | ||
925 | return ret; | |
926 | } | |
927 | ||
db06f04d SS |
928 | static void iwl_mvm_parse_shared_mem_a000(struct iwl_mvm *mvm, |
929 | struct iwl_rx_packet *pkt) | |
04fd2c28 | 930 | { |
db06f04d | 931 | struct iwl_shared_mem_cfg *mem_cfg = (void *)pkt->data; |
fa1f2b61 SS |
932 | int i, lmac; |
933 | int lmac_num = le32_to_cpu(mem_cfg->lmac_num); | |
04fd2c28 | 934 | |
fa1f2b61 SS |
935 | if (WARN_ON(lmac_num > ARRAY_SIZE(mem_cfg->lmac_smem))) |
936 | return; | |
04fd2c28 | 937 | |
fa1f2b61 SS |
938 | mvm->smem_cfg.num_lmacs = lmac_num; |
939 | mvm->smem_cfg.num_txfifo_entries = | |
940 | ARRAY_SIZE(mem_cfg->lmac_smem[0].txfifo_size); | |
941 | mvm->smem_cfg.rxfifo2_size = le32_to_cpu(mem_cfg->rxfifo2_size); | |
5b086414 | 942 | |
fa1f2b61 SS |
943 | for (lmac = 0; lmac < lmac_num; lmac++) { |
944 | struct iwl_shared_mem_lmac_cfg *lmac_cfg = | |
945 | &mem_cfg->lmac_smem[lmac]; | |
946 | ||
947 | for (i = 0; i < ARRAY_SIZE(lmac_cfg->txfifo_size); i++) | |
948 | mvm->smem_cfg.lmac[lmac].txfifo_size[i] = | |
949 | le32_to_cpu(lmac_cfg->txfifo_size[i]); | |
950 | mvm->smem_cfg.lmac[lmac].rxfifo1_size = | |
951 | le32_to_cpu(lmac_cfg->rxfifo1_size); | |
952 | } | |
db06f04d | 953 | } |
04fd2c28 | 954 | |
db06f04d SS |
955 | static void iwl_mvm_parse_shared_mem(struct iwl_mvm *mvm, |
956 | struct iwl_rx_packet *pkt) | |
957 | { | |
b4f48985 | 958 | struct iwl_shared_mem_cfg_v2 *mem_cfg = (void *)pkt->data; |
db06f04d SS |
959 | int i; |
960 | ||
fa1f2b61 SS |
961 | mvm->smem_cfg.num_lmacs = 1; |
962 | ||
963 | mvm->smem_cfg.num_txfifo_entries = ARRAY_SIZE(mem_cfg->txfifo_size); | |
db06f04d | 964 | for (i = 0; i < ARRAY_SIZE(mem_cfg->txfifo_size); i++) |
fa1f2b61 | 965 | mvm->smem_cfg.lmac[0].txfifo_size[i] = |
04fd2c28 | 966 | le32_to_cpu(mem_cfg->txfifo_size[i]); |
fa1f2b61 SS |
967 | |
968 | mvm->smem_cfg.lmac[0].rxfifo1_size = | |
969 | le32_to_cpu(mem_cfg->rxfifo_size[0]); | |
970 | mvm->smem_cfg.rxfifo2_size = le32_to_cpu(mem_cfg->rxfifo_size[1]); | |
5b086414 | 971 | |
db06f04d | 972 | /* new API has more data, from rxfifo_addr field and on */ |
5b086414 GBA |
973 | if (fw_has_capa(&mvm->fw->ucode_capa, |
974 | IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) { | |
fa1f2b61 | 975 | BUILD_BUG_ON(sizeof(mvm->smem_cfg.internal_txfifo_size) != |
5b086414 GBA |
976 | sizeof(mem_cfg->internal_txfifo_size)); |
977 | ||
978 | for (i = 0; | |
fa1f2b61 | 979 | i < ARRAY_SIZE(mvm->smem_cfg.internal_txfifo_size); |
5b086414 | 980 | i++) |
fa1f2b61 | 981 | mvm->smem_cfg.internal_txfifo_size[i] = |
5b086414 GBA |
982 | le32_to_cpu(mem_cfg->internal_txfifo_size[i]); |
983 | } | |
db06f04d SS |
984 | } |
985 | ||
986 | static void iwl_mvm_get_shared_mem_conf(struct iwl_mvm *mvm) | |
987 | { | |
988 | struct iwl_host_cmd cmd = { | |
989 | .flags = CMD_WANT_SKB, | |
990 | .data = { NULL, }, | |
991 | .len = { 0, }, | |
992 | }; | |
993 | struct iwl_rx_packet *pkt; | |
994 | ||
995 | lockdep_assert_held(&mvm->mutex); | |
996 | ||
997 | if (fw_has_capa(&mvm->fw->ucode_capa, | |
998 | IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) | |
999 | cmd.id = iwl_cmd_id(SHARED_MEM_CFG_CMD, SYSTEM_GROUP, 0); | |
1000 | else | |
1001 | cmd.id = SHARED_MEM_CFG; | |
1002 | ||
1003 | if (WARN_ON(iwl_mvm_send_cmd(mvm, &cmd))) | |
1004 | return; | |
1005 | ||
1006 | pkt = cmd.resp_pkt; | |
1007 | if (iwl_mvm_has_new_tx_api(mvm)) | |
1008 | iwl_mvm_parse_shared_mem_a000(mvm, pkt); | |
1009 | else | |
1010 | iwl_mvm_parse_shared_mem(mvm, pkt); | |
5b086414 | 1011 | |
04fd2c28 LK |
1012 | IWL_DEBUG_INFO(mvm, "SHARED MEM CFG: got memory offsets/sizes\n"); |
1013 | ||
04fd2c28 LK |
1014 | iwl_free_resp(&cmd); |
1015 | } | |
1016 | ||
84bfffa9 EG |
1017 | static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) |
1018 | { | |
1019 | struct iwl_ltr_config_cmd cmd = { | |
1020 | .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE), | |
1021 | }; | |
1022 | ||
1023 | if (!mvm->trans->ltr_enabled) | |
1024 | return 0; | |
1025 | ||
84bfffa9 EG |
1026 | return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0, |
1027 | sizeof(cmd), &cmd); | |
1028 | } | |
1029 | ||
c386dacb HD |
1030 | #ifdef CONFIG_ACPI |
1031 | #define ACPI_WRDS_METHOD "WRDS" | |
69964905 | 1032 | #define ACPI_EWRD_METHOD "EWRD" |
a6bff3cb | 1033 | #define ACPI_WGDS_METHOD "WGDS" |
69964905 | 1034 | #define ACPI_WIFI_DOMAIN (0x07) |
c386dacb | 1035 | #define ACPI_WRDS_WIFI_DATA_SIZE (IWL_MVM_SAR_TABLE_SIZE + 2) |
69964905 LC |
1036 | #define ACPI_EWRD_WIFI_DATA_SIZE ((IWL_MVM_SAR_PROFILE_NUM - 1) * \ |
1037 | IWL_MVM_SAR_TABLE_SIZE + 3) | |
a6bff3cb HD |
1038 | #define ACPI_WGDS_WIFI_DATA_SIZE 18 |
1039 | #define ACPI_WGDS_NUM_BANDS 2 | |
1040 | #define ACPI_WGDS_TABLE_SIZE 3 | |
c386dacb HD |
1041 | |
1042 | static int iwl_mvm_sar_set_profile(struct iwl_mvm *mvm, | |
1043 | union acpi_object *table, | |
1044 | struct iwl_mvm_sar_profile *profile, | |
1045 | bool enabled) | |
1046 | { | |
1047 | int i; | |
da2830ac | 1048 | |
c386dacb | 1049 | profile->enabled = enabled; |
da2830ac | 1050 | |
c386dacb HD |
1051 | for (i = 0; i < IWL_MVM_SAR_TABLE_SIZE; i++) { |
1052 | if ((table[i].type != ACPI_TYPE_INTEGER) || | |
1053 | (table[i].integer.value > U8_MAX)) | |
1054 | return -EINVAL; | |
1055 | ||
1056 | profile->table[i] = table[i].integer.value; | |
1057 | } | |
1058 | ||
1059 | return 0; | |
1060 | } | |
1061 | ||
1062 | static union acpi_object *iwl_mvm_sar_find_wifi_pkg(struct iwl_mvm *mvm, | |
1063 | union acpi_object *data, | |
1064 | int data_size) | |
da2830ac | 1065 | { |
c386dacb HD |
1066 | int i; |
1067 | union acpi_object *wifi_pkg; | |
da2830ac | 1068 | |
c386dacb HD |
1069 | /* |
1070 | * We need at least two packages, one for the revision and one | |
da2830ac LC |
1071 | * for the data itself. Also check that the revision is valid |
1072 | * (i.e. it is an integer set to 0). | |
c386dacb HD |
1073 | */ |
1074 | if (data->type != ACPI_TYPE_PACKAGE || | |
1075 | data->package.count < 2 || | |
1076 | data->package.elements[0].type != ACPI_TYPE_INTEGER || | |
1077 | data->package.elements[0].integer.value != 0) { | |
1078 | IWL_DEBUG_RADIO(mvm, "Unsupported packages structure\n"); | |
1079 | return ERR_PTR(-EINVAL); | |
da2830ac LC |
1080 | } |
1081 | ||
1082 | /* loop through all the packages to find the one for WiFi */ | |
c386dacb | 1083 | for (i = 1; i < data->package.count; i++) { |
da2830ac LC |
1084 | union acpi_object *domain; |
1085 | ||
c386dacb | 1086 | wifi_pkg = &data->package.elements[i]; |
da2830ac LC |
1087 | |
1088 | /* Skip anything that is not a package with the right | |
1089 | * amount of elements (i.e. domain_type, | |
c386dacb | 1090 | * enabled/disabled plus the actual data size. |
da2830ac | 1091 | */ |
c386dacb HD |
1092 | if (wifi_pkg->type != ACPI_TYPE_PACKAGE || |
1093 | wifi_pkg->package.count != data_size) | |
da2830ac LC |
1094 | continue; |
1095 | ||
c386dacb | 1096 | domain = &wifi_pkg->package.elements[0]; |
da2830ac | 1097 | if (domain->type == ACPI_TYPE_INTEGER && |
69964905 | 1098 | domain->integer.value == ACPI_WIFI_DOMAIN) |
da2830ac LC |
1099 | break; |
1100 | ||
c386dacb | 1101 | wifi_pkg = NULL; |
da2830ac LC |
1102 | } |
1103 | ||
c386dacb HD |
1104 | if (!wifi_pkg) |
1105 | return ERR_PTR(-ENOENT); | |
da2830ac | 1106 | |
c386dacb | 1107 | return wifi_pkg; |
da2830ac LC |
1108 | } |
1109 | ||
c386dacb | 1110 | static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm) |
da2830ac | 1111 | { |
c386dacb | 1112 | union acpi_object *wifi_pkg, *table; |
da2830ac LC |
1113 | acpi_handle root_handle; |
1114 | acpi_handle handle; | |
1115 | struct acpi_buffer wrds = {ACPI_ALLOCATE_BUFFER, NULL}; | |
1116 | acpi_status status; | |
c386dacb | 1117 | bool enabled; |
da2830ac LC |
1118 | int ret; |
1119 | ||
1120 | root_handle = ACPI_HANDLE(mvm->dev); | |
1121 | if (!root_handle) { | |
1122 | IWL_DEBUG_RADIO(mvm, | |
1123 | "Could not retrieve root port ACPI handle\n"); | |
1124 | return -ENOENT; | |
1125 | } | |
1126 | ||
1127 | /* Get the method's handle */ | |
1128 | status = acpi_get_handle(root_handle, (acpi_string)ACPI_WRDS_METHOD, | |
1129 | &handle); | |
1130 | if (ACPI_FAILURE(status)) { | |
1131 | IWL_DEBUG_RADIO(mvm, "WRDS method not found\n"); | |
1132 | return -ENOENT; | |
1133 | } | |
1134 | ||
1135 | /* Call WRDS with no arguments */ | |
1136 | status = acpi_evaluate_object(handle, NULL, NULL, &wrds); | |
1137 | if (ACPI_FAILURE(status)) { | |
1138 | IWL_DEBUG_RADIO(mvm, "WRDS invocation failed (0x%x)\n", status); | |
1139 | return -ENOENT; | |
1140 | } | |
1141 | ||
c386dacb HD |
1142 | wifi_pkg = iwl_mvm_sar_find_wifi_pkg(mvm, wrds.pointer, |
1143 | ACPI_WRDS_WIFI_DATA_SIZE); | |
1144 | if (IS_ERR(wifi_pkg)) { | |
1145 | ret = PTR_ERR(wifi_pkg); | |
1146 | goto out_free; | |
1147 | } | |
1148 | ||
1149 | if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) { | |
1150 | ret = -EINVAL; | |
1151 | goto out_free; | |
1152 | } | |
1153 | ||
1154 | enabled = !!(wifi_pkg->package.elements[1].integer.value); | |
da2830ac | 1155 | |
c386dacb HD |
1156 | /* position of the actual table */ |
1157 | table = &wifi_pkg->package.elements[2]; | |
1158 | ||
1159 | /* The profile from WRDS is officially profile 1, but goes | |
1160 | * into sar_profiles[0] (because we don't have a profile 0). | |
1161 | */ | |
1162 | ret = iwl_mvm_sar_set_profile(mvm, table, &mvm->sar_profiles[0], | |
1163 | enabled); | |
1164 | ||
1165 | out_free: | |
1166 | kfree(wrds.pointer); | |
da2830ac LC |
1167 | return ret; |
1168 | } | |
da2830ac | 1169 | |
69964905 LC |
1170 | static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm) |
1171 | { | |
1172 | union acpi_object *wifi_pkg; | |
1173 | acpi_handle root_handle; | |
1174 | acpi_handle handle; | |
1175 | struct acpi_buffer ewrd = {ACPI_ALLOCATE_BUFFER, NULL}; | |
1176 | acpi_status status; | |
1177 | bool enabled; | |
1178 | int i, n_profiles, ret; | |
1179 | ||
1180 | root_handle = ACPI_HANDLE(mvm->dev); | |
1181 | if (!root_handle) { | |
1182 | IWL_DEBUG_RADIO(mvm, | |
1183 | "Could not retrieve root port ACPI handle\n"); | |
1184 | return -ENOENT; | |
1185 | } | |
1186 | ||
1187 | /* Get the method's handle */ | |
1188 | status = acpi_get_handle(root_handle, (acpi_string)ACPI_EWRD_METHOD, | |
1189 | &handle); | |
1190 | if (ACPI_FAILURE(status)) { | |
1191 | IWL_DEBUG_RADIO(mvm, "EWRD method not found\n"); | |
1192 | return -ENOENT; | |
1193 | } | |
1194 | ||
1195 | /* Call EWRD with no arguments */ | |
1196 | status = acpi_evaluate_object(handle, NULL, NULL, &ewrd); | |
1197 | if (ACPI_FAILURE(status)) { | |
1198 | IWL_DEBUG_RADIO(mvm, "EWRD invocation failed (0x%x)\n", status); | |
1199 | return -ENOENT; | |
1200 | } | |
1201 | ||
1202 | wifi_pkg = iwl_mvm_sar_find_wifi_pkg(mvm, ewrd.pointer, | |
1203 | ACPI_EWRD_WIFI_DATA_SIZE); | |
1204 | if (IS_ERR(wifi_pkg)) { | |
1205 | ret = PTR_ERR(wifi_pkg); | |
1206 | goto out_free; | |
1207 | } | |
1208 | ||
1209 | if ((wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) || | |
1210 | (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER)) { | |
1211 | ret = -EINVAL; | |
1212 | goto out_free; | |
1213 | } | |
1214 | ||
1215 | enabled = !!(wifi_pkg->package.elements[1].integer.value); | |
1216 | n_profiles = wifi_pkg->package.elements[2].integer.value; | |
1217 | ||
e2ef1476 SD |
1218 | /* in case of BIOS bug */ |
1219 | if (n_profiles <= 0) { | |
1220 | ret = -EINVAL; | |
1221 | goto out_free; | |
1222 | } | |
1223 | ||
69964905 LC |
1224 | for (i = 0; i < n_profiles; i++) { |
1225 | /* the tables start at element 3 */ | |
1226 | static int pos = 3; | |
1227 | ||
1228 | /* The EWRD profiles officially go from 2 to 4, but we | |
1229 | * save them in sar_profiles[1-3] (because we don't | |
1230 | * have profile 0). So in the array we start from 1. | |
1231 | */ | |
1232 | ret = iwl_mvm_sar_set_profile(mvm, | |
1233 | &wifi_pkg->package.elements[pos], | |
1234 | &mvm->sar_profiles[i + 1], | |
1235 | enabled); | |
1236 | if (ret < 0) | |
1237 | break; | |
1238 | ||
1239 | /* go to the next table */ | |
1240 | pos += IWL_MVM_SAR_TABLE_SIZE; | |
1241 | } | |
1242 | ||
1243 | out_free: | |
1244 | kfree(ewrd.pointer); | |
1245 | return ret; | |
1246 | } | |
1247 | ||
7fe90e0e | 1248 | static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm) |
a6bff3cb HD |
1249 | { |
1250 | union acpi_object *wifi_pkg; | |
1251 | acpi_handle root_handle; | |
1252 | acpi_handle handle; | |
1253 | struct acpi_buffer wgds = {ACPI_ALLOCATE_BUFFER, NULL}; | |
1254 | acpi_status status; | |
7fe90e0e HD |
1255 | int i, j, ret; |
1256 | int idx = 1; | |
a6bff3cb HD |
1257 | |
1258 | root_handle = ACPI_HANDLE(mvm->dev); | |
1259 | if (!root_handle) { | |
1260 | IWL_DEBUG_RADIO(mvm, | |
1261 | "Could not retrieve root port ACPI handle\n"); | |
1262 | return -ENOENT; | |
1263 | } | |
1264 | ||
1265 | /* Get the method's handle */ | |
1266 | status = acpi_get_handle(root_handle, (acpi_string)ACPI_WGDS_METHOD, | |
1267 | &handle); | |
1268 | if (ACPI_FAILURE(status)) { | |
1269 | IWL_DEBUG_RADIO(mvm, "WGDS method not found\n"); | |
1270 | return -ENOENT; | |
1271 | } | |
1272 | ||
1273 | /* Call WGDS with no arguments */ | |
1274 | status = acpi_evaluate_object(handle, NULL, NULL, &wgds); | |
1275 | if (ACPI_FAILURE(status)) { | |
1276 | IWL_DEBUG_RADIO(mvm, "WGDS invocation failed (0x%x)\n", status); | |
1277 | return -ENOENT; | |
1278 | } | |
1279 | ||
1280 | wifi_pkg = iwl_mvm_sar_find_wifi_pkg(mvm, wgds.pointer, | |
1281 | ACPI_WGDS_WIFI_DATA_SIZE); | |
1282 | if (IS_ERR(wifi_pkg)) { | |
1283 | ret = PTR_ERR(wifi_pkg); | |
1284 | goto out_free; | |
1285 | } | |
1286 | ||
7fe90e0e HD |
1287 | for (i = 0; i < IWL_NUM_GEO_PROFILES; i++) { |
1288 | for (j = 0; j < IWL_MVM_GEO_TABLE_SIZE; j++) { | |
1289 | union acpi_object *entry; | |
a6bff3cb | 1290 | |
7fe90e0e HD |
1291 | entry = &wifi_pkg->package.elements[idx++]; |
1292 | if ((entry->type != ACPI_TYPE_INTEGER) || | |
1293 | (entry->integer.value > U8_MAX)) | |
1294 | return -EINVAL; | |
a6bff3cb | 1295 | |
7fe90e0e HD |
1296 | mvm->geo_profiles[i].values[j] = entry->integer.value; |
1297 | } | |
a6bff3cb HD |
1298 | } |
1299 | ret = 0; | |
1300 | out_free: | |
1301 | kfree(wgds.pointer); | |
1302 | return ret; | |
1303 | } | |
1304 | ||
42ce76d6 | 1305 | int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) |
da2830ac | 1306 | { |
da2830ac | 1307 | struct iwl_dev_tx_power_cmd cmd = { |
4b87e5af | 1308 | .v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), |
da2830ac | 1309 | }; |
42ce76d6 LC |
1310 | int i, j, idx; |
1311 | int profs[IWL_NUM_CHAIN_LIMITS] = { prof_a, prof_b }; | |
55bfa4b9 | 1312 | int len = sizeof(cmd); |
da2830ac | 1313 | |
42ce76d6 LC |
1314 | BUILD_BUG_ON(IWL_NUM_CHAIN_LIMITS < 2); |
1315 | BUILD_BUG_ON(IWL_NUM_CHAIN_LIMITS * IWL_NUM_SUB_BANDS != | |
1316 | IWL_MVM_SAR_TABLE_SIZE); | |
1317 | ||
55bfa4b9 LC |
1318 | if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) |
1319 | len = sizeof(cmd.v3); | |
1320 | ||
42ce76d6 LC |
1321 | for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) { |
1322 | struct iwl_mvm_sar_profile *prof; | |
da2830ac | 1323 | |
42ce76d6 LC |
1324 | /* don't allow SAR to be disabled (profile 0 means disable) */ |
1325 | if (profs[i] == 0) | |
1326 | return -EPERM; | |
da2830ac | 1327 | |
42ce76d6 LC |
1328 | /* we are off by one, so allow up to IWL_MVM_SAR_PROFILE_NUM */ |
1329 | if (profs[i] > IWL_MVM_SAR_PROFILE_NUM) | |
1330 | return -EINVAL; | |
da2830ac | 1331 | |
42ce76d6 LC |
1332 | /* profiles go from 1 to 4, so decrement to access the array */ |
1333 | prof = &mvm->sar_profiles[profs[i] - 1]; | |
1334 | ||
1335 | /* if the profile is disabled, do nothing */ | |
1336 | if (!prof->enabled) { | |
1337 | IWL_DEBUG_RADIO(mvm, "SAR profile %d is disabled.\n", | |
1338 | profs[i]); | |
1339 | /* if one of the profiles is disabled, we fail all */ | |
1340 | return -ENOENT; | |
1341 | } | |
da2830ac | 1342 | |
da2830ac LC |
1343 | IWL_DEBUG_RADIO(mvm, " Chain[%d]:\n", i); |
1344 | for (j = 0; j < IWL_NUM_SUB_BANDS; j++) { | |
1345 | idx = (i * IWL_NUM_SUB_BANDS) + j; | |
55bfa4b9 | 1346 | cmd.v3.per_chain_restriction[i][j] = |
42ce76d6 | 1347 | cpu_to_le16(prof->table[idx]); |
da2830ac | 1348 | IWL_DEBUG_RADIO(mvm, " Band[%d] = %d * .125dBm\n", |
42ce76d6 | 1349 | j, prof->table[idx]); |
da2830ac LC |
1350 | } |
1351 | } | |
1352 | ||
42ce76d6 LC |
1353 | IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); |
1354 | ||
1355 | return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd); | |
1356 | } | |
1357 | ||
7fe90e0e HD |
1358 | int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) |
1359 | { | |
1360 | struct iwl_geo_tx_power_profiles_resp *resp; | |
1361 | int ret; | |
1362 | ||
1363 | struct iwl_geo_tx_power_profiles_cmd geo_cmd = { | |
1364 | .ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE), | |
1365 | }; | |
1366 | struct iwl_host_cmd cmd = { | |
1367 | .id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT), | |
1368 | .len = { sizeof(geo_cmd), }, | |
1369 | .flags = CMD_WANT_SKB, | |
1370 | .data = { &geo_cmd }, | |
1371 | }; | |
1372 | ||
1373 | ret = iwl_mvm_send_cmd(mvm, &cmd); | |
1374 | if (ret) { | |
1375 | IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret); | |
1376 | return ret; | |
1377 | } | |
1378 | ||
1379 | resp = (void *)cmd.resp_pkt->data; | |
1380 | ret = le32_to_cpu(resp->profile_idx); | |
1381 | if (WARN_ON(ret > IWL_NUM_GEO_PROFILES)) { | |
1382 | ret = -EIO; | |
1383 | IWL_WARN(mvm, "Invalid geographic profile idx (%d)\n", ret); | |
1384 | } | |
1385 | ||
1386 | iwl_free_resp(&cmd); | |
1387 | return ret; | |
1388 | } | |
1389 | ||
a6bff3cb HD |
1390 | static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) |
1391 | { | |
a6bff3cb HD |
1392 | struct iwl_geo_tx_power_profiles_cmd cmd = { |
1393 | .ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES), | |
1394 | }; | |
7fe90e0e | 1395 | int ret, i, j; |
a6bff3cb HD |
1396 | u16 cmd_wide_id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT); |
1397 | ||
7fe90e0e | 1398 | ret = iwl_mvm_sar_get_wgds_table(mvm); |
a6bff3cb HD |
1399 | if (ret < 0) { |
1400 | IWL_DEBUG_RADIO(mvm, | |
1401 | "Geo SAR BIOS table invalid or unavailable. (%d)\n", | |
1402 | ret); | |
1403 | /* we don't fail if the table is not available */ | |
1404 | return 0; | |
1405 | } | |
1406 | ||
1407 | IWL_DEBUG_RADIO(mvm, "Sending GEO_TX_POWER_LIMIT\n"); | |
1408 | ||
1409 | BUILD_BUG_ON(IWL_NUM_GEO_PROFILES * ACPI_WGDS_NUM_BANDS * | |
1410 | ACPI_WGDS_TABLE_SIZE != ACPI_WGDS_WIFI_DATA_SIZE); | |
1411 | ||
1412 | for (i = 0; i < IWL_NUM_GEO_PROFILES; i++) { | |
1413 | struct iwl_per_chain_offset *chain = | |
1414 | (struct iwl_per_chain_offset *)&cmd.table[i]; | |
1415 | ||
1416 | for (j = 0; j < ACPI_WGDS_NUM_BANDS; j++) { | |
1417 | u8 *value; | |
1418 | ||
7fe90e0e HD |
1419 | value = &mvm->geo_profiles[i].values[j * |
1420 | IWL_GEO_PER_CHAIN_SIZE]; | |
a6bff3cb HD |
1421 | chain[j].max_tx_power = cpu_to_le16(value[0]); |
1422 | chain[j].chain_a = value[1]; | |
1423 | chain[j].chain_b = value[2]; | |
1424 | IWL_DEBUG_RADIO(mvm, | |
1425 | "SAR geographic profile[%d] Band[%d]: chain A = %d chain B = %d max_tx_power = %d\n", | |
1426 | i, j, value[1], value[2], value[0]); | |
1427 | } | |
1428 | } | |
1429 | return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0, sizeof(cmd), &cmd); | |
1430 | } | |
1431 | ||
69964905 LC |
1432 | #else /* CONFIG_ACPI */ |
1433 | static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm) | |
1434 | { | |
1435 | return -ENOENT; | |
1436 | } | |
1437 | ||
1438 | static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm) | |
1439 | { | |
1440 | return -ENOENT; | |
1441 | } | |
a6bff3cb HD |
1442 | |
1443 | static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) | |
1444 | { | |
1445 | return 0; | |
1446 | } | |
69964905 LC |
1447 | #endif /* CONFIG_ACPI */ |
1448 | ||
42ce76d6 LC |
1449 | static int iwl_mvm_sar_init(struct iwl_mvm *mvm) |
1450 | { | |
1451 | int ret; | |
1452 | ||
1453 | ret = iwl_mvm_sar_get_wrds_table(mvm); | |
1454 | if (ret < 0) { | |
1455 | IWL_DEBUG_RADIO(mvm, | |
69964905 | 1456 | "WRDS SAR BIOS table invalid or unavailable. (%d)\n", |
42ce76d6 | 1457 | ret); |
69964905 | 1458 | /* if not available, don't fail and don't bother with EWRD */ |
42ce76d6 LC |
1459 | return 0; |
1460 | } | |
1461 | ||
69964905 LC |
1462 | ret = iwl_mvm_sar_get_ewrd_table(mvm); |
1463 | /* if EWRD is not available, we can still use WRDS, so don't fail */ | |
1464 | if (ret < 0) | |
1465 | IWL_DEBUG_RADIO(mvm, | |
1466 | "EWRD SAR BIOS table invalid or unavailable. (%d)\n", | |
1467 | ret); | |
1468 | ||
42ce76d6 LC |
1469 | /* choose profile 1 (WRDS) as default for both chains */ |
1470 | ret = iwl_mvm_sar_select_profile(mvm, 1, 1); | |
1471 | ||
1472 | /* if we don't have profile 0 from BIOS, just skip it */ | |
1473 | if (ret == -ENOENT) | |
1474 | return 0; | |
da2830ac LC |
1475 | |
1476 | return ret; | |
1477 | } | |
1478 | ||
1f370650 | 1479 | static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) |
8ca151b5 | 1480 | { |
1f370650 | 1481 | int ret; |
8ca151b5 | 1482 | |
1f370650 SS |
1483 | if (iwl_mvm_has_new_tx_api(mvm)) |
1484 | return iwl_run_unified_mvm_ucode(mvm, false); | |
8ca151b5 | 1485 | |
8d193ca2 | 1486 | ret = iwl_run_init_mvm_ucode(mvm, false); |
f2082a53 SS |
1487 | |
1488 | if (iwlmvm_mod_params.init_dbg) | |
1489 | return 0; | |
1490 | ||
1491 | if (ret) { | |
8d193ca2 EH |
1492 | IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); |
1493 | /* this can't happen */ | |
1494 | if (WARN_ON(ret > 0)) | |
1495 | ret = -ERFKILL; | |
1f370650 | 1496 | return ret; |
8d193ca2 | 1497 | } |
8ca151b5 | 1498 | |
f2082a53 SS |
1499 | /* |
1500 | * Stop and start the transport without entering low power | |
1501 | * mode. This will save the state of other components on the | |
1502 | * device that are triggered by the INIT firwmare (MFUART). | |
1503 | */ | |
1504 | _iwl_trans_stop_device(mvm->trans, false); | |
1505 | ret = _iwl_trans_start_hw(mvm->trans, false); | |
1506 | if (ret) | |
1f370650 | 1507 | return ret; |
8ca151b5 JB |
1508 | |
1509 | ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR); | |
1f370650 SS |
1510 | if (ret) |
1511 | return ret; | |
1512 | ||
1513 | return iwl_mvm_init_paging(mvm); | |
1514 | } | |
1515 | ||
1516 | int iwl_mvm_up(struct iwl_mvm *mvm) | |
1517 | { | |
1518 | int ret, i; | |
1519 | struct ieee80211_channel *chan; | |
1520 | struct cfg80211_chan_def chandef; | |
1521 | ||
1522 | lockdep_assert_held(&mvm->mutex); | |
1523 | ||
1524 | ret = iwl_trans_start_hw(mvm->trans); | |
1525 | if (ret) | |
1526 | return ret; | |
1527 | ||
1528 | ret = iwl_mvm_load_rt_fw(mvm); | |
8ca151b5 JB |
1529 | if (ret) { |
1530 | IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); | |
1531 | goto error; | |
1532 | } | |
1533 | ||
6c7d32cf | 1534 | iwl_mvm_get_shared_mem_conf(mvm); |
04fd2c28 | 1535 | |
1f3b0ff8 LE |
1536 | ret = iwl_mvm_sf_update(mvm, NULL, false); |
1537 | if (ret) | |
1538 | IWL_ERR(mvm, "Failed to initialize Smart Fifo\n"); | |
1539 | ||
6a951267 | 1540 | mvm->fw_dbg_conf = FW_DBG_INVALID; |
945d4202 EG |
1541 | /* if we have a destination, assume EARLY START */ |
1542 | if (mvm->fw->dbg_dest_tlv) | |
1543 | mvm->fw_dbg_conf = FW_DBG_START_FROM_ALIVE; | |
d2709ad7 | 1544 | iwl_mvm_start_fw_dbg_conf(mvm, FW_DBG_START_FROM_ALIVE); |
6a951267 | 1545 | |
a0544272 | 1546 | ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); |
8ca151b5 JB |
1547 | if (ret) |
1548 | goto error; | |
1549 | ||
1550 | /* Send phy db control command and then phy db calibration*/ | |
1f370650 SS |
1551 | if (!iwl_mvm_has_new_tx_api(mvm)) { |
1552 | ret = iwl_send_phy_db_data(mvm->phy_db); | |
1553 | if (ret) | |
1554 | goto error; | |
8ca151b5 | 1555 | |
1f370650 SS |
1556 | ret = iwl_send_phy_cfg_cmd(mvm); |
1557 | if (ret) | |
1558 | goto error; | |
1559 | } | |
8ca151b5 | 1560 | |
b3de3ef4 EG |
1561 | ret = iwl_mvm_send_bt_init_conf(mvm); |
1562 | if (ret) | |
1563 | goto error; | |
1564 | ||
43413a97 | 1565 | /* Init RSS configuration */ |
09a2e25d SS |
1566 | /* TODO - remove a000 disablement when we have RXQ config API */ |
1567 | if (iwl_mvm_has_new_rx_api(mvm) && !iwl_mvm_has_new_tx_api(mvm)) { | |
43413a97 SS |
1568 | ret = iwl_send_rss_cfg_cmd(mvm); |
1569 | if (ret) { | |
1570 | IWL_ERR(mvm, "Failed to configure RSS queues: %d\n", | |
1571 | ret); | |
1572 | goto error; | |
1573 | } | |
1574 | } | |
1575 | ||
8ca151b5 | 1576 | /* init the fw <-> mac80211 STA mapping */ |
0ae98812 | 1577 | for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++) |
8ca151b5 JB |
1578 | RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); |
1579 | ||
0ae98812 | 1580 | mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA; |
1d3c3f63 | 1581 | |
b2b7875b JB |
1582 | /* reset quota debouncing buffer - 0xff will yield invalid data */ |
1583 | memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd)); | |
1584 | ||
97d5be7e LK |
1585 | /* Enable DQA-mode if required */ |
1586 | if (iwl_mvm_is_dqa_supported(mvm)) { | |
1587 | ret = iwl_mvm_send_dqa_cmd(mvm); | |
1588 | if (ret) | |
1589 | goto error; | |
1590 | } else { | |
1591 | IWL_DEBUG_FW(mvm, "Working in non-DQA mode\n"); | |
1592 | } | |
1593 | ||
8ca151b5 JB |
1594 | /* Add auxiliary station for scanning */ |
1595 | ret = iwl_mvm_add_aux_sta(mvm); | |
1596 | if (ret) | |
1597 | goto error; | |
1598 | ||
53a9d61e | 1599 | /* Add all the PHY contexts */ |
57fbcce3 | 1600 | chan = &mvm->hw->wiphy->bands[NL80211_BAND_2GHZ]->channels[0]; |
53a9d61e IP |
1601 | cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); |
1602 | for (i = 0; i < NUM_PHY_CTX; i++) { | |
1603 | /* | |
1604 | * The channel used here isn't relevant as it's | |
1605 | * going to be overwritten in the other flows. | |
1606 | * For now use the first channel we have. | |
1607 | */ | |
1608 | ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i], | |
1609 | &chandef, 1, 1); | |
1610 | if (ret) | |
1611 | goto error; | |
1612 | } | |
8ca151b5 | 1613 | |
c221daf2 CRI |
1614 | #ifdef CONFIG_THERMAL |
1615 | if (iwl_mvm_is_tt_in_fw(mvm)) { | |
1616 | /* in order to give the responsibility of ct-kill and | |
1617 | * TX backoff to FW we need to send empty temperature reporting | |
1618 | * cmd during init time | |
1619 | */ | |
1620 | iwl_mvm_send_temp_report_ths_cmd(mvm); | |
1621 | } else { | |
1622 | /* Initialize tx backoffs to the minimal possible */ | |
1623 | iwl_mvm_tt_tx_backoff(mvm, 0); | |
1624 | } | |
5c89e7bc CRI |
1625 | |
1626 | /* TODO: read the budget from BIOS / Platform NVM */ | |
75cfe338 | 1627 | if (iwl_mvm_is_ctdp_supported(mvm) && mvm->cooling_dev.cur_state > 0) { |
5c89e7bc CRI |
1628 | ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START, |
1629 | mvm->cooling_dev.cur_state); | |
75cfe338 LC |
1630 | if (ret) |
1631 | goto error; | |
1632 | } | |
c221daf2 | 1633 | #else |
0c0e2c71 IY |
1634 | /* Initialize tx backoffs to the minimal possible */ |
1635 | iwl_mvm_tt_tx_backoff(mvm, 0); | |
c221daf2 | 1636 | #endif |
0c0e2c71 | 1637 | |
84bfffa9 | 1638 | WARN_ON(iwl_mvm_config_ltr(mvm)); |
9180ac50 | 1639 | |
c1cb92fc | 1640 | ret = iwl_mvm_power_update_device(mvm); |
64b928c4 AB |
1641 | if (ret) |
1642 | goto error; | |
1643 | ||
35af15d1 AN |
1644 | /* |
1645 | * RTNL is not taken during Ct-kill, but we don't need to scan/Tx | |
1646 | * anyway, so don't init MCC. | |
1647 | */ | |
1648 | if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) { | |
1649 | ret = iwl_mvm_init_mcc(mvm); | |
1650 | if (ret) | |
1651 | goto error; | |
1652 | } | |
90d4f7db | 1653 | |
859d914c | 1654 | if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) { |
4ca87a5f | 1655 | mvm->scan_type = IWL_SCAN_TYPE_NOT_SET; |
d2496221 DS |
1656 | ret = iwl_mvm_config_scan(mvm); |
1657 | if (ret) | |
1658 | goto error; | |
1659 | } | |
1660 | ||
7498cf4c EP |
1661 | /* allow FW/transport low power modes if not during restart */ |
1662 | if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) | |
1663 | iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN); | |
1664 | ||
da2830ac LC |
1665 | ret = iwl_mvm_sar_init(mvm); |
1666 | if (ret) | |
1667 | goto error; | |
1668 | ||
a6bff3cb HD |
1669 | ret = iwl_mvm_sar_geo_init(mvm); |
1670 | if (ret) | |
1671 | goto error; | |
1672 | ||
53a9d61e | 1673 | IWL_DEBUG_INFO(mvm, "RT uCode started.\n"); |
8ca151b5 JB |
1674 | return 0; |
1675 | error: | |
de8ba41b LK |
1676 | if (!iwlmvm_mod_params.init_dbg) |
1677 | iwl_mvm_stop_device(mvm); | |
8ca151b5 JB |
1678 | return ret; |
1679 | } | |
1680 | ||
1681 | int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) | |
1682 | { | |
1683 | int ret, i; | |
1684 | ||
1685 | lockdep_assert_held(&mvm->mutex); | |
1686 | ||
1687 | ret = iwl_trans_start_hw(mvm->trans); | |
1688 | if (ret) | |
1689 | return ret; | |
1690 | ||
1691 | ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN); | |
1692 | if (ret) { | |
1693 | IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret); | |
1694 | goto error; | |
1695 | } | |
1696 | ||
a0544272 | 1697 | ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm)); |
8ca151b5 JB |
1698 | if (ret) |
1699 | goto error; | |
1700 | ||
1701 | /* Send phy db control command and then phy db calibration*/ | |
1702 | ret = iwl_send_phy_db_data(mvm->phy_db); | |
1703 | if (ret) | |
1704 | goto error; | |
1705 | ||
1706 | ret = iwl_send_phy_cfg_cmd(mvm); | |
1707 | if (ret) | |
1708 | goto error; | |
1709 | ||
1710 | /* init the fw <-> mac80211 STA mapping */ | |
0ae98812 | 1711 | for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++) |
8ca151b5 JB |
1712 | RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); |
1713 | ||
1714 | /* Add auxiliary station for scanning */ | |
1715 | ret = iwl_mvm_add_aux_sta(mvm); | |
1716 | if (ret) | |
1717 | goto error; | |
1718 | ||
1719 | return 0; | |
1720 | error: | |
fcb6b92a | 1721 | iwl_mvm_stop_device(mvm); |
8ca151b5 JB |
1722 | return ret; |
1723 | } | |
1724 | ||
0416841d JB |
1725 | void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm, |
1726 | struct iwl_rx_cmd_buffer *rxb) | |
8ca151b5 JB |
1727 | { |
1728 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1729 | struct iwl_card_state_notif *card_state_notif = (void *)pkt->data; | |
1730 | u32 flags = le32_to_cpu(card_state_notif->flags); | |
1731 | ||
1732 | IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n", | |
1733 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | |
1734 | (flags & SW_CARD_DISABLED) ? "Kill" : "On", | |
1735 | (flags & CT_KILL_CARD_DISABLED) ? | |
1736 | "Reached" : "Not reached"); | |
8ca151b5 JB |
1737 | } |
1738 | ||
0416841d JB |
1739 | void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm, |
1740 | struct iwl_rx_cmd_buffer *rxb) | |
30269c12 CRI |
1741 | { |
1742 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1743 | struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data; | |
1744 | ||
0c8d0a47 GBA |
1745 | IWL_DEBUG_INFO(mvm, |
1746 | "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n", | |
1747 | le32_to_cpu(mfuart_notif->installed_ver), | |
1748 | le32_to_cpu(mfuart_notif->external_ver), | |
1749 | le32_to_cpu(mfuart_notif->status), | |
1750 | le32_to_cpu(mfuart_notif->duration)); | |
1751 | ||
19f63c53 GBA |
1752 | if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif)) |
1753 | IWL_DEBUG_INFO(mvm, | |
0c8d0a47 | 1754 | "MFUART: image size: 0x%08x\n", |
19f63c53 | 1755 | le32_to_cpu(mfuart_notif->image_size)); |
30269c12 | 1756 | } |