iwlwifi: remove useless NVM_HW_SECTION_NUM_FAMILY_* macros
[linux-2.6-block.git] / drivers / net / wireless / intel / iwlwifi / mvm / fw.c
CommitLineData
8ca151b5
JB
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8d193ca2 9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
bdccdb85 10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
9c4f7d51 11 * Copyright(c) 2018 Intel Corporation
8ca151b5
JB
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of version 2 of the GNU General Public License as
15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
8ca151b5 22 * The full GNU General Public License is included in this distribution
410dc5aa 23 * in the file called COPYING.
8ca151b5
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24 *
25 * Contact Information:
cb2f8277 26 * Intel Linux Wireless <linuxwifi@intel.com>
8ca151b5
JB
27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *
29 * BSD LICENSE
30 *
51368bf7 31 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8d193ca2 32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
bdccdb85 33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
9c4f7d51 34 * Copyright(c) 2018 Intel Corporation
8ca151b5
JB
35 * All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 *
41 * * Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * * Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in
45 * the documentation and/or other materials provided with the
46 * distribution.
47 * * Neither the name Intel Corporation nor the names of its
48 * contributors may be used to endorse or promote products derived
49 * from this software without specific prior written permission.
50 *
51 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
52 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
53 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
54 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
55 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
56 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
57 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
61 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 *
63 *****************************************************************************/
64#include <net/mac80211.h>
854d773e 65#include <linux/netdevice.h>
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JB
66
67#include "iwl-trans.h"
68#include "iwl-op-mode.h"
d962f9b1 69#include "fw/img.h"
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JB
70#include "iwl-debug.h"
71#include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
72#include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
8c23f95c 73#include "iwl-prph.h"
813df5ce 74#include "fw/acpi.h"
8ca151b5
JB
75
76#include "mvm.h"
7174beb6 77#include "fw/dbg.h"
8ca151b5 78#include "iwl-phy-db.h"
9c4f7d51
ST
79#include "iwl-modparams.h"
80#include "iwl-nvm-parse.h"
8ca151b5
JB
81
82#define MVM_UCODE_ALIVE_TIMEOUT HZ
83#define MVM_UCODE_CALIB_TIMEOUT (2*HZ)
84
85#define UCODE_VALID_OK cpu_to_le32(0x1)
86
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JB
87struct iwl_mvm_alive_data {
88 bool valid;
89 u32 scd_base_addr;
90};
91
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JB
92static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
93{
94 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
95 .valid = cpu_to_le32(valid_tx_ant),
96 };
97
33223542 98 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
a1022927 99 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
8ca151b5
JB
100 sizeof(tx_ant_cmd), &tx_ant_cmd);
101}
102
43413a97
SS
103static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
104{
105 int i;
106 struct iwl_rss_config_cmd cmd = {
107 .flags = cpu_to_le32(IWL_RSS_ENABLE),
108 .hash_mask = IWL_RSS_HASH_TYPE_IPV4_TCP |
854d773e 109 IWL_RSS_HASH_TYPE_IPV4_UDP |
43413a97
SS
110 IWL_RSS_HASH_TYPE_IPV4_PAYLOAD |
111 IWL_RSS_HASH_TYPE_IPV6_TCP |
854d773e 112 IWL_RSS_HASH_TYPE_IPV6_UDP |
43413a97
SS
113 IWL_RSS_HASH_TYPE_IPV6_PAYLOAD,
114 };
115
f43495fd
SS
116 if (mvm->trans->num_rx_queues == 1)
117 return 0;
118
854d773e 119 /* Do not direct RSS traffic to Q 0 which is our fallback queue */
43413a97 120 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
854d773e
SS
121 cmd.indirection_table[i] =
122 1 + (i % (mvm->trans->num_rx_queues - 1));
123 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
43413a97
SS
124
125 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
126}
127
8edbfaa1
SS
128static int iwl_configure_rxq(struct iwl_mvm *mvm)
129{
130 int i, num_queues, size;
131 struct iwl_rfh_queue_config *cmd;
132
133 /* Do not configure default queue, it is configured via context info */
134 num_queues = mvm->trans->num_rx_queues - 1;
135
136 size = sizeof(*cmd) + num_queues * sizeof(struct iwl_rfh_queue_data);
137
138 cmd = kzalloc(size, GFP_KERNEL);
139 if (!cmd)
140 return -ENOMEM;
141
142 cmd->num_queues = num_queues;
143
144 for (i = 0; i < num_queues; i++) {
145 struct iwl_trans_rxq_dma_data data;
146
147 cmd->data[i].q_num = i + 1;
148 iwl_trans_get_rxq_dma_data(mvm->trans, i + 1, &data);
149
150 cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb);
151 cmd->data[i].urbd_stts_wrptr =
152 cpu_to_le64(data.urbd_stts_wrptr);
153 cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb);
154 cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid);
155 }
156
157 return iwl_mvm_send_cmd_pdu(mvm,
158 WIDE_ID(DATA_PATH_GROUP,
159 RFH_QUEUE_CONFIG_CMD),
160 0, size, cmd);
161}
162
97d5be7e
LK
163static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
164{
165 struct iwl_dqa_enable_cmd dqa_cmd = {
166 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
167 };
168 u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
169 int ret;
170
171 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
172 if (ret)
173 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
174 else
175 IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
176
177 return ret;
178}
179
bdccdb85
GBA
180void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
181 struct iwl_rx_cmd_buffer *rxb)
182{
183 struct iwl_rx_packet *pkt = rxb_addr(rxb);
184 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
185 __le32 *dump_data = mfu_dump_notif->data;
186 int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
187 int i;
188
189 if (mfu_dump_notif->index_num == 0)
190 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
191 le32_to_cpu(mfu_dump_notif->assert_id));
192
193 for (i = 0; i < n_words; i++)
194 IWL_DEBUG_INFO(mvm,
195 "MFUART assert dump, dword %u: 0x%08x\n",
196 le16_to_cpu(mfu_dump_notif->index_num) *
197 n_words + i,
198 le32_to_cpu(dump_data[i]));
199}
200
8ca151b5
JB
201static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
202 struct iwl_rx_packet *pkt, void *data)
203{
204 struct iwl_mvm *mvm =
205 container_of(notif_wait, struct iwl_mvm, notif_wait);
206 struct iwl_mvm_alive_data *alive_data = data;
5c228d63 207 struct mvm_alive_resp_v3 *palive3;
7e1223b5 208 struct mvm_alive_resp *palive;
5c228d63
SS
209 struct iwl_umac_alive *umac;
210 struct iwl_lmac_alive *lmac1;
211 struct iwl_lmac_alive *lmac2 = NULL;
212 u16 status;
3485e76e 213 u32 umac_error_event_table;
01a9ca51 214
5c228d63
SS
215 if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
216 palive = (void *)pkt->data;
217 umac = &palive->umac_data;
218 lmac1 = &palive->lmac_data[0];
219 lmac2 = &palive->lmac_data[1];
220 status = le16_to_cpu(palive->status);
221 } else {
222 palive3 = (void *)pkt->data;
223 umac = &palive3->umac_data;
224 lmac1 = &palive3->lmac_data;
225 status = le16_to_cpu(palive3->status);
226 }
01a9ca51 227
5c228d63
SS
228 mvm->error_event_table[0] = le32_to_cpu(lmac1->error_event_table_ptr);
229 if (lmac2)
230 mvm->error_event_table[1] =
231 le32_to_cpu(lmac2->error_event_table_ptr);
232 mvm->log_event_table = le32_to_cpu(lmac1->log_event_table_ptr);
ffa70264 233
3485e76e 234 umac_error_event_table = le32_to_cpu(umac->error_info_addr);
01a9ca51 235
3485e76e
LC
236 if (!umac_error_event_table) {
237 mvm->support_umac_log = false;
238 } else if (umac_error_event_table >=
239 mvm->trans->cfg->min_umac_error_event_table) {
240 mvm->support_umac_log = true;
241 mvm->umac_error_event_table = umac_error_event_table;
242 } else {
fb5b2846
LC
243 IWL_ERR(mvm,
244 "Not valid error log pointer 0x%08X for %s uCode\n",
245 mvm->umac_error_event_table,
246 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
247 "Init" : "RT");
3485e76e
LC
248 mvm->support_umac_log = false;
249 }
fb5b2846 250
5c228d63
SS
251 alive_data->scd_base_addr = le32_to_cpu(lmac1->scd_base_ptr);
252 alive_data->valid = status == IWL_ALIVE_STATUS_OK;
7e1223b5 253
5c228d63
SS
254 IWL_DEBUG_FW(mvm,
255 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
256 status, lmac1->ver_type, lmac1->ver_subtype);
7e1223b5 257
5c228d63
SS
258 if (lmac2)
259 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
7e1223b5 260
5c228d63
SS
261 IWL_DEBUG_FW(mvm,
262 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
263 le32_to_cpu(umac->umac_major),
264 le32_to_cpu(umac->umac_minor));
8ca151b5
JB
265
266 return true;
267}
268
1f370650
SS
269static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
270 struct iwl_rx_packet *pkt, void *data)
271{
272 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
273
274 return true;
275}
276
8ca151b5
JB
277static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
278 struct iwl_rx_packet *pkt, void *data)
279{
280 struct iwl_phy_db *phy_db = data;
281
282 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
283 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
284 return true;
285 }
286
ce1f2778 287 WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
8ca151b5
JB
288
289 return false;
290}
291
292static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
293 enum iwl_ucode_type ucode_type)
294{
295 struct iwl_notification_wait alive_wait;
296 struct iwl_mvm_alive_data alive_data;
297 const struct fw_img *fw;
298 int ret, i;
702e975d 299 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
6eb031d2 300 static const u16 alive_cmd[] = { MVM_ALIVE };
8ca151b5 301
f38efdb2 302 set_bit(IWL_FWRT_STATUS_WAIT_ALIVE, &mvm->fwrt.status);
61df750c 303 if (ucode_type == IWL_UCODE_REGULAR &&
3d2d4422
GBA
304 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
305 !(fw_has_capa(&mvm->fw->ucode_capa,
306 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
612da1ef 307 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
61df750c 308 else
612da1ef 309 fw = iwl_get_ucode_image(mvm->fw, ucode_type);
befe9b6f 310 if (WARN_ON(!fw))
8ca151b5 311 return -EINVAL;
702e975d 312 iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
65b280fe 313 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
8ca151b5
JB
314
315 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
316 alive_cmd, ARRAY_SIZE(alive_cmd),
317 iwl_alive_fn, &alive_data);
318
319 ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT);
320 if (ret) {
702e975d 321 iwl_fw_set_current_image(&mvm->fwrt, old_type);
8ca151b5
JB
322 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
323 return ret;
324 }
325
326 /*
327 * Some things may run in the background now, but we
328 * just wait for the ALIVE notification here.
329 */
330 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
331 MVM_UCODE_ALIVE_TIMEOUT);
332 if (ret) {
d6be9c1d
SS
333 struct iwl_trans *trans = mvm->trans;
334
5f01df3f 335 if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_22000)
d6be9c1d
SS
336 IWL_ERR(mvm,
337 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
338 iwl_read_prph(trans, UMAG_SB_CPU_1_STATUS),
339 iwl_read_prph(trans, UMAG_SB_CPU_2_STATUS));
6e584873 340 else if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000)
192de2b4
DS
341 IWL_ERR(mvm,
342 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
d6be9c1d
SS
343 iwl_read_prph(trans, SB_CPU_1_STATUS),
344 iwl_read_prph(trans, SB_CPU_2_STATUS));
702e975d 345 iwl_fw_set_current_image(&mvm->fwrt, old_type);
8ca151b5
JB
346 return ret;
347 }
348
349 if (!alive_data.valid) {
350 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
702e975d 351 iwl_fw_set_current_image(&mvm->fwrt, old_type);
8ca151b5
JB
352 return -EIO;
353 }
354
355 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
356
357 /*
358 * Note: all the queues are enabled as part of the interface
359 * initialization, but in firmware restart scenarios they
360 * could be stopped, so wake them up. In firmware restart,
361 * mac80211 will have the queues stopped as well until the
362 * reconfiguration completes. During normal startup, they
363 * will be empty.
364 */
365
4ecafae9 366 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
1c14089e
JB
367 /*
368 * Set a 'fake' TID for the command queue, since we use the
369 * hweight() of the tid_bitmap as a refcount now. Not that
370 * we ever even consider the command queue as one we might
371 * want to reuse, but be safe nevertheless.
372 */
373 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
374 BIT(IWL_MAX_TID_COUNT + 2);
8ca151b5 375
df197c00
JB
376 for (i = 0; i < IEEE80211_MAX_QUEUES; i++)
377 atomic_set(&mvm->mac80211_queue_stop_count[i], 0);
8ca151b5 378
65b280fe 379 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
f7805b33
LC
380#ifdef CONFIG_IWLWIFI_DEBUGFS
381 iwl_fw_set_dbg_rec_on(&mvm->fwrt);
382#endif
f38efdb2 383 clear_bit(IWL_FWRT_STATUS_WAIT_ALIVE, &mvm->fwrt.status);
8ca151b5
JB
384
385 return 0;
386}
8ca151b5 387
8c5f47b1
JB
388static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
389{
390 struct iwl_notification_wait init_wait;
391 struct iwl_nvm_access_complete_cmd nvm_complete = {};
392 struct iwl_init_extended_cfg_cmd init_cfg = {
393 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
394 };
395 static const u16 init_complete[] = {
396 INIT_COMPLETE_NOTIF,
397 };
398 int ret;
399
400 lockdep_assert_held(&mvm->mutex);
401
402 iwl_init_notification_wait(&mvm->notif_wait,
403 &init_wait,
404 init_complete,
405 ARRAY_SIZE(init_complete),
406 iwl_wait_init_complete,
407 NULL);
408
409 /* Will also start the device */
410 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
411 if (ret) {
412 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
71256480 413 iwl_fw_assert_error_dump(&mvm->fwrt);
8c5f47b1
JB
414 goto error;
415 }
416
417 /* Send init config command to mark that we are sending NVM access
418 * commands
419 */
420 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
421 INIT_EXTENDED_CFG_CMD), 0,
422 sizeof(init_cfg), &init_cfg);
423 if (ret) {
424 IWL_ERR(mvm, "Failed to run init config command: %d\n",
425 ret);
426 goto error;
427 }
428
e9e1ba3d
SS
429 /* Load NVM to NIC if needed */
430 if (mvm->nvm_file_name) {
9c4f7d51
ST
431 iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
432 mvm->nvm_sections);
8c5f47b1 433 iwl_mvm_load_nvm_to_nic(mvm);
e9e1ba3d 434 }
8c5f47b1 435
d4f3695e 436 if (IWL_MVM_PARSE_NVM && read_nvm) {
5bd1d2c1 437 ret = iwl_nvm_init(mvm);
d4f3695e
SS
438 if (ret) {
439 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
440 goto error;
441 }
442 }
443
8c5f47b1
JB
444 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
445 NVM_ACCESS_COMPLETE), 0,
446 sizeof(nvm_complete), &nvm_complete);
447 if (ret) {
448 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
449 ret);
450 goto error;
451 }
452
453 /* We wait for the INIT complete notification */
e9e1ba3d
SS
454 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
455 MVM_UCODE_ALIVE_TIMEOUT);
456 if (ret)
457 return ret;
458
459 /* Read the NVM only at driver load time, no need to do this twice */
d4f3695e 460 if (!IWL_MVM_PARSE_NVM && read_nvm) {
4c625c56 461 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
c135cb56
ST
462 if (IS_ERR(mvm->nvm_data)) {
463 ret = PTR_ERR(mvm->nvm_data);
464 mvm->nvm_data = NULL;
e9e1ba3d
SS
465 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
466 return ret;
467 }
468 }
469
470 return 0;
8c5f47b1
JB
471
472error:
473 iwl_remove_notification(&mvm->notif_wait, &init_wait);
474 return ret;
475}
476
8ca151b5
JB
477static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
478{
479 struct iwl_phy_cfg_cmd phy_cfg_cmd;
702e975d 480 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
8ca151b5
JB
481
482 /* Set parameters */
a0544272 483 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
86a2b204
LC
484
485 /* set flags extra PHY configuration flags from the device's cfg */
486 phy_cfg_cmd.phy_cfg |= cpu_to_le32(mvm->cfg->extra_phy_cfg_flags);
487
8ca151b5
JB
488 phy_cfg_cmd.calib_control.event_trigger =
489 mvm->fw->default_calib[ucode_type].event_trigger;
490 phy_cfg_cmd.calib_control.flow_trigger =
491 mvm->fw->default_calib[ucode_type].flow_trigger;
492
493 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
494 phy_cfg_cmd.phy_cfg);
495
a1022927 496 return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
8ca151b5
JB
497 sizeof(phy_cfg_cmd), &phy_cfg_cmd);
498}
499
8ca151b5
JB
500int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
501{
502 struct iwl_notification_wait calib_wait;
6eb031d2 503 static const u16 init_complete[] = {
8ca151b5
JB
504 INIT_COMPLETE_NOTIF,
505 CALIB_RES_NOTIF_PHY_DB
506 };
507 int ret;
508
7d6222e2 509 if (iwl_mvm_has_unified_ucode(mvm))
8c5f47b1
JB
510 return iwl_run_unified_mvm_ucode(mvm, true);
511
8ca151b5
JB
512 lockdep_assert_held(&mvm->mutex);
513
8d193ca2 514 if (WARN_ON_ONCE(mvm->calibrating))
8ca151b5
JB
515 return 0;
516
517 iwl_init_notification_wait(&mvm->notif_wait,
518 &calib_wait,
519 init_complete,
520 ARRAY_SIZE(init_complete),
521 iwl_wait_phy_db_entry,
522 mvm->phy_db);
523
524 /* Will also start the device */
525 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
526 if (ret) {
527 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
00e0c6c8 528 goto remove_notif;
8ca151b5
JB
529 }
530
b3de3ef4
EG
531 if (mvm->cfg->device_family < IWL_DEVICE_FAMILY_8000) {
532 ret = iwl_mvm_send_bt_init_conf(mvm);
533 if (ret)
00e0c6c8 534 goto remove_notif;
b3de3ef4 535 }
931d4160 536
81a67e32 537 /* Read the NVM only at driver load time, no need to do this twice */
8ca151b5 538 if (read_nvm) {
5bd1d2c1 539 ret = iwl_nvm_init(mvm);
8ca151b5
JB
540 if (ret) {
541 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
00e0c6c8 542 goto remove_notif;
8ca151b5
JB
543 }
544 }
545
81a67e32 546 /* In case we read the NVM from external file, load it to the NIC */
e02a9d60 547 if (mvm->nvm_file_name)
81a67e32
EL
548 iwl_mvm_load_nvm_to_nic(mvm);
549
00e0c6c8 550 WARN_ON(iwl_nvm_check_version(mvm->nvm_data, mvm->trans));
8ca151b5 551
4f59334b
EH
552 /*
553 * abort after reading the nvm in case RF Kill is on, we will complete
554 * the init seq later when RF kill will switch to off
555 */
1a3fe0b2 556 if (iwl_mvm_is_radio_hw_killed(mvm)) {
4f59334b
EH
557 IWL_DEBUG_RF_KILL(mvm,
558 "jump over all phy activities due to RF kill\n");
00e0c6c8 559 goto remove_notif;
4f59334b
EH
560 }
561
31b8b343
EG
562 mvm->calibrating = true;
563
e07cbb53 564 /* Send TX valid antennas before triggering calibrations */
a0544272 565 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
e07cbb53 566 if (ret)
00e0c6c8 567 goto remove_notif;
e07cbb53 568
8ca151b5
JB
569 ret = iwl_send_phy_cfg_cmd(mvm);
570 if (ret) {
571 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
572 ret);
00e0c6c8 573 goto remove_notif;
8ca151b5
JB
574 }
575
576 /*
577 * Some things may run in the background now, but we
578 * just wait for the calibration complete notification.
579 */
580 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
00e0c6c8
LC
581 MVM_UCODE_CALIB_TIMEOUT);
582 if (!ret)
583 goto out;
31b8b343 584
00e0c6c8 585 if (iwl_mvm_is_radio_hw_killed(mvm)) {
31b8b343 586 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
00e0c6c8
LC
587 ret = 0;
588 } else {
589 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
590 ret);
31b8b343 591 }
00e0c6c8 592
8ca151b5
JB
593 goto out;
594
00e0c6c8 595remove_notif:
8ca151b5
JB
596 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
597out:
31b8b343 598 mvm->calibrating = false;
a4082843 599 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
8ca151b5
JB
600 /* we want to debug INIT and we have no NVM - fake */
601 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
602 sizeof(struct ieee80211_channel) +
603 sizeof(struct ieee80211_rate),
604 GFP_KERNEL);
605 if (!mvm->nvm_data)
606 return -ENOMEM;
8ca151b5
JB
607 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
608 mvm->nvm_data->bands[0].n_channels = 1;
609 mvm->nvm_data->bands[0].n_bitrates = 1;
610 mvm->nvm_data->bands[0].bitrates =
611 (void *)mvm->nvm_data->channels + 1;
612 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
613 }
614
615 return ret;
616}
617
84bfffa9
EG
618static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
619{
620 struct iwl_ltr_config_cmd cmd = {
621 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
622 };
623
624 if (!mvm->trans->ltr_enabled)
625 return 0;
626
84bfffa9
EG
627 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
628 sizeof(cmd), &cmd);
629}
630
c386dacb 631#ifdef CONFIG_ACPI
c386dacb
HD
632static int iwl_mvm_sar_set_profile(struct iwl_mvm *mvm,
633 union acpi_object *table,
634 struct iwl_mvm_sar_profile *profile,
635 bool enabled)
636{
637 int i;
da2830ac 638
c386dacb 639 profile->enabled = enabled;
da2830ac 640
e7a3b8d8 641 for (i = 0; i < ACPI_SAR_TABLE_SIZE; i++) {
c386dacb
HD
642 if ((table[i].type != ACPI_TYPE_INTEGER) ||
643 (table[i].integer.value > U8_MAX))
644 return -EINVAL;
645
646 profile->table[i] = table[i].integer.value;
647 }
648
649 return 0;
650}
651
c386dacb 652static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
da2830ac 653{
813df5ce 654 union acpi_object *wifi_pkg, *table, *data;
c386dacb 655 bool enabled;
da2830ac
LC
656 int ret;
657
813df5ce
LC
658 data = iwl_acpi_get_object(mvm->dev, ACPI_WRDS_METHOD);
659 if (IS_ERR(data))
660 return PTR_ERR(data);
da2830ac 661
2fa388cf
LC
662 wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
663 ACPI_WRDS_WIFI_DATA_SIZE);
c386dacb
HD
664 if (IS_ERR(wifi_pkg)) {
665 ret = PTR_ERR(wifi_pkg);
666 goto out_free;
667 }
668
669 if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) {
670 ret = -EINVAL;
671 goto out_free;
672 }
673
674 enabled = !!(wifi_pkg->package.elements[1].integer.value);
da2830ac 675
c386dacb
HD
676 /* position of the actual table */
677 table = &wifi_pkg->package.elements[2];
678
679 /* The profile from WRDS is officially profile 1, but goes
680 * into sar_profiles[0] (because we don't have a profile 0).
681 */
682 ret = iwl_mvm_sar_set_profile(mvm, table, &mvm->sar_profiles[0],
683 enabled);
c386dacb 684out_free:
813df5ce 685 kfree(data);
da2830ac
LC
686 return ret;
687}
da2830ac 688
69964905
LC
689static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
690{
813df5ce 691 union acpi_object *wifi_pkg, *data;
69964905
LC
692 bool enabled;
693 int i, n_profiles, ret;
694
813df5ce
LC
695 data = iwl_acpi_get_object(mvm->dev, ACPI_EWRD_METHOD);
696 if (IS_ERR(data))
697 return PTR_ERR(data);
69964905 698
2fa388cf
LC
699 wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
700 ACPI_EWRD_WIFI_DATA_SIZE);
69964905
LC
701 if (IS_ERR(wifi_pkg)) {
702 ret = PTR_ERR(wifi_pkg);
703 goto out_free;
704 }
705
706 if ((wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) ||
707 (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER)) {
708 ret = -EINVAL;
709 goto out_free;
710 }
711
712 enabled = !!(wifi_pkg->package.elements[1].integer.value);
713 n_profiles = wifi_pkg->package.elements[2].integer.value;
714
2e1976bb
LC
715 /*
716 * Check the validity of n_profiles. The EWRD profiles start
717 * from index 1, so the maximum value allowed here is
718 * ACPI_SAR_PROFILES_NUM - 1.
719 */
720 if (n_profiles <= 0 || n_profiles >= ACPI_SAR_PROFILE_NUM) {
e2ef1476
SD
721 ret = -EINVAL;
722 goto out_free;
723 }
724
69964905
LC
725 for (i = 0; i < n_profiles; i++) {
726 /* the tables start at element 3 */
727 static int pos = 3;
728
729 /* The EWRD profiles officially go from 2 to 4, but we
730 * save them in sar_profiles[1-3] (because we don't
731 * have profile 0). So in the array we start from 1.
732 */
733 ret = iwl_mvm_sar_set_profile(mvm,
734 &wifi_pkg->package.elements[pos],
735 &mvm->sar_profiles[i + 1],
736 enabled);
737 if (ret < 0)
738 break;
739
740 /* go to the next table */
e7a3b8d8 741 pos += ACPI_SAR_TABLE_SIZE;
69964905
LC
742 }
743
744out_free:
813df5ce 745 kfree(data);
69964905
LC
746 return ret;
747}
748
7fe90e0e 749static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm)
a6bff3cb 750{
813df5ce 751 union acpi_object *wifi_pkg, *data;
7fe90e0e
HD
752 int i, j, ret;
753 int idx = 1;
a6bff3cb 754
813df5ce
LC
755 data = iwl_acpi_get_object(mvm->dev, ACPI_WGDS_METHOD);
756 if (IS_ERR(data))
757 return PTR_ERR(data);
a6bff3cb 758
2fa388cf
LC
759 wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
760 ACPI_WGDS_WIFI_DATA_SIZE);
a6bff3cb
HD
761 if (IS_ERR(wifi_pkg)) {
762 ret = PTR_ERR(wifi_pkg);
763 goto out_free;
764 }
765
e7a3b8d8
LC
766 for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
767 for (j = 0; j < ACPI_GEO_TABLE_SIZE; j++) {
7fe90e0e 768 union acpi_object *entry;
a6bff3cb 769
7fe90e0e
HD
770 entry = &wifi_pkg->package.elements[idx++];
771 if ((entry->type != ACPI_TYPE_INTEGER) ||
aae9d563
CJ
772 (entry->integer.value > U8_MAX)) {
773 ret = -EINVAL;
774 goto out_free;
775 }
a6bff3cb 776
7fe90e0e
HD
777 mvm->geo_profiles[i].values[j] = entry->integer.value;
778 }
a6bff3cb
HD
779 }
780 ret = 0;
781out_free:
813df5ce 782 kfree(data);
a6bff3cb
HD
783 return ret;
784}
785
42ce76d6 786int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
da2830ac 787{
0791c2fc
HD
788 union {
789 struct iwl_dev_tx_power_cmd v5;
790 struct iwl_dev_tx_power_cmd_v4 v4;
791 } cmd;
42ce76d6 792 int i, j, idx;
e7a3b8d8 793 int profs[ACPI_SAR_NUM_CHAIN_LIMITS] = { prof_a, prof_b };
0791c2fc 794 int len;
da2830ac 795
e7a3b8d8
LC
796 BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS < 2);
797 BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS * ACPI_SAR_NUM_SUB_BANDS !=
798 ACPI_SAR_TABLE_SIZE);
42ce76d6 799
0791c2fc
HD
800 cmd.v5.v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS);
801
802 if (fw_has_api(&mvm->fw->ucode_capa,
803 IWL_UCODE_TLV_API_REDUCE_TX_POWER))
804 len = sizeof(cmd.v5);
805 else if (fw_has_capa(&mvm->fw->ucode_capa,
806 IWL_UCODE_TLV_CAPA_TX_POWER_ACK))
807 len = sizeof(cmd.v4);
808 else
809 len = sizeof(cmd.v4.v3);
55bfa4b9 810
e7a3b8d8 811 for (i = 0; i < ACPI_SAR_NUM_CHAIN_LIMITS; i++) {
42ce76d6 812 struct iwl_mvm_sar_profile *prof;
da2830ac 813
42ce76d6
LC
814 /* don't allow SAR to be disabled (profile 0 means disable) */
815 if (profs[i] == 0)
816 return -EPERM;
da2830ac 817
e7a3b8d8
LC
818 /* we are off by one, so allow up to ACPI_SAR_PROFILE_NUM */
819 if (profs[i] > ACPI_SAR_PROFILE_NUM)
42ce76d6 820 return -EINVAL;
da2830ac 821
42ce76d6
LC
822 /* profiles go from 1 to 4, so decrement to access the array */
823 prof = &mvm->sar_profiles[profs[i] - 1];
824
825 /* if the profile is disabled, do nothing */
826 if (!prof->enabled) {
827 IWL_DEBUG_RADIO(mvm, "SAR profile %d is disabled.\n",
828 profs[i]);
829 /* if one of the profiles is disabled, we fail all */
830 return -ENOENT;
831 }
da2830ac 832
da2830ac 833 IWL_DEBUG_RADIO(mvm, " Chain[%d]:\n", i);
e7a3b8d8
LC
834 for (j = 0; j < ACPI_SAR_NUM_SUB_BANDS; j++) {
835 idx = (i * ACPI_SAR_NUM_SUB_BANDS) + j;
0791c2fc 836 cmd.v5.v3.per_chain_restriction[i][j] =
42ce76d6 837 cpu_to_le16(prof->table[idx]);
da2830ac 838 IWL_DEBUG_RADIO(mvm, " Band[%d] = %d * .125dBm\n",
42ce76d6 839 j, prof->table[idx]);
da2830ac
LC
840 }
841 }
842
42ce76d6
LC
843 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
844
845 return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
846}
847
7fe90e0e
HD
848int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
849{
850 struct iwl_geo_tx_power_profiles_resp *resp;
851 int ret;
852
853 struct iwl_geo_tx_power_profiles_cmd geo_cmd = {
854 .ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE),
855 };
856 struct iwl_host_cmd cmd = {
857 .id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
858 .len = { sizeof(geo_cmd), },
859 .flags = CMD_WANT_SKB,
860 .data = { &geo_cmd },
861 };
862
863 ret = iwl_mvm_send_cmd(mvm, &cmd);
864 if (ret) {
865 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
866 return ret;
867 }
868
869 resp = (void *)cmd.resp_pkt->data;
870 ret = le32_to_cpu(resp->profile_idx);
e7a3b8d8 871 if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES)) {
7fe90e0e
HD
872 ret = -EIO;
873 IWL_WARN(mvm, "Invalid geographic profile idx (%d)\n", ret);
874 }
875
876 iwl_free_resp(&cmd);
877 return ret;
878}
879
a6bff3cb
HD
880static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
881{
a6bff3cb
HD
882 struct iwl_geo_tx_power_profiles_cmd cmd = {
883 .ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES),
884 };
7fe90e0e 885 int ret, i, j;
a6bff3cb
HD
886 u16 cmd_wide_id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT);
887
7fe90e0e 888 ret = iwl_mvm_sar_get_wgds_table(mvm);
a6bff3cb
HD
889 if (ret < 0) {
890 IWL_DEBUG_RADIO(mvm,
891 "Geo SAR BIOS table invalid or unavailable. (%d)\n",
892 ret);
893 /* we don't fail if the table is not available */
894 return 0;
895 }
896
897 IWL_DEBUG_RADIO(mvm, "Sending GEO_TX_POWER_LIMIT\n");
898
e7a3b8d8 899 BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES * ACPI_WGDS_NUM_BANDS *
66e83903 900 ACPI_WGDS_TABLE_SIZE + 1 != ACPI_WGDS_WIFI_DATA_SIZE);
a6bff3cb 901
e7a3b8d8
LC
902 BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES > IWL_NUM_GEO_PROFILES);
903
904 for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
a6bff3cb
HD
905 struct iwl_per_chain_offset *chain =
906 (struct iwl_per_chain_offset *)&cmd.table[i];
907
908 for (j = 0; j < ACPI_WGDS_NUM_BANDS; j++) {
909 u8 *value;
910
7fe90e0e 911 value = &mvm->geo_profiles[i].values[j *
e7a3b8d8 912 ACPI_GEO_PER_CHAIN_SIZE];
a6bff3cb
HD
913 chain[j].max_tx_power = cpu_to_le16(value[0]);
914 chain[j].chain_a = value[1];
915 chain[j].chain_b = value[2];
916 IWL_DEBUG_RADIO(mvm,
917 "SAR geographic profile[%d] Band[%d]: chain A = %d chain B = %d max_tx_power = %d\n",
918 i, j, value[1], value[2], value[0]);
919 }
920 }
921 return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0, sizeof(cmd), &cmd);
922}
923
69964905
LC
924#else /* CONFIG_ACPI */
925static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
926{
927 return -ENOENT;
928}
929
930static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
931{
932 return -ENOENT;
933}
a6bff3cb 934
5d041c46
LC
935static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm)
936{
937 return -ENOENT;
938}
939
a6bff3cb
HD
940static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
941{
942 return 0;
943}
18f1755d
LC
944
945int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a,
946 int prof_b)
947{
948 return -ENOENT;
949}
950
951int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
952{
953 return -ENOENT;
954}
69964905
LC
955#endif /* CONFIG_ACPI */
956
42ce76d6
LC
957static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
958{
959 int ret;
960
961 ret = iwl_mvm_sar_get_wrds_table(mvm);
962 if (ret < 0) {
963 IWL_DEBUG_RADIO(mvm,
69964905 964 "WRDS SAR BIOS table invalid or unavailable. (%d)\n",
42ce76d6 965 ret);
5d041c46
LC
966 /*
967 * If not available, don't fail and don't bother with EWRD.
968 * Return 1 to tell that we can't use WGDS either.
969 */
970 return 1;
42ce76d6
LC
971 }
972
69964905
LC
973 ret = iwl_mvm_sar_get_ewrd_table(mvm);
974 /* if EWRD is not available, we can still use WRDS, so don't fail */
975 if (ret < 0)
976 IWL_DEBUG_RADIO(mvm,
977 "EWRD SAR BIOS table invalid or unavailable. (%d)\n",
978 ret);
979
42ce76d6
LC
980 /* choose profile 1 (WRDS) as default for both chains */
981 ret = iwl_mvm_sar_select_profile(mvm, 1, 1);
982
5d041c46
LC
983 /*
984 * If we don't have profile 0 from BIOS, just skip it. This
985 * means that SAR Geo will not be enabled either, even if we
986 * have other valid profiles.
987 */
42ce76d6 988 if (ret == -ENOENT)
5d041c46 989 return 1;
da2830ac
LC
990
991 return ret;
992}
993
1f370650 994static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
8ca151b5 995{
1f370650 996 int ret;
8ca151b5 997
7d6222e2 998 if (iwl_mvm_has_unified_ucode(mvm))
1f370650 999 return iwl_run_unified_mvm_ucode(mvm, false);
8ca151b5 1000
8d193ca2 1001 ret = iwl_run_init_mvm_ucode(mvm, false);
f2082a53 1002
f2082a53 1003 if (ret) {
8d193ca2 1004 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
f4744258
LK
1005
1006 if (iwlmvm_mod_params.init_dbg)
1007 return 0;
1f370650 1008 return ret;
8d193ca2 1009 }
8ca151b5 1010
f2082a53
SS
1011 /*
1012 * Stop and start the transport without entering low power
1013 * mode. This will save the state of other components on the
1014 * device that are triggered by the INIT firwmare (MFUART).
1015 */
1016 _iwl_trans_stop_device(mvm->trans, false);
1017 ret = _iwl_trans_start_hw(mvm->trans, false);
1018 if (ret)
1f370650 1019 return ret;
8ca151b5 1020
da2eb669
SS
1021 iwl_fw_dbg_apply_point(&mvm->fwrt, IWL_FW_INI_APPLY_EARLY);
1022
8ca151b5 1023 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1f370650
SS
1024 if (ret)
1025 return ret;
1026
da2eb669
SS
1027 iwl_fw_dbg_apply_point(&mvm->fwrt, IWL_FW_INI_APPLY_AFTER_ALIVE);
1028
702e975d 1029 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
1f370650
SS
1030}
1031
1032int iwl_mvm_up(struct iwl_mvm *mvm)
1033{
1034 int ret, i;
1035 struct ieee80211_channel *chan;
1036 struct cfg80211_chan_def chandef;
1037
1038 lockdep_assert_held(&mvm->mutex);
1039
1040 ret = iwl_trans_start_hw(mvm->trans);
1041 if (ret)
1042 return ret;
1043
1044 ret = iwl_mvm_load_rt_fw(mvm);
8ca151b5
JB
1045 if (ret) {
1046 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
71256480 1047 iwl_fw_assert_error_dump(&mvm->fwrt);
8ca151b5
JB
1048 goto error;
1049 }
1050
d0b813fc 1051 iwl_get_shared_mem_conf(&mvm->fwrt);
04fd2c28 1052
1f3b0ff8
LE
1053 ret = iwl_mvm_sf_update(mvm, NULL, false);
1054 if (ret)
1055 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1056
7a14c23d
SS
1057 if (!mvm->trans->ini_valid) {
1058 mvm->fwrt.dump.conf = FW_DBG_INVALID;
1059 /* if we have a destination, assume EARLY START */
1060 if (mvm->fw->dbg.dest_tlv)
1061 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
1062 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
1063 }
6a951267 1064
a0544272 1065 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
8ca151b5
JB
1066 if (ret)
1067 goto error;
1068
7d6222e2
JB
1069 if (!iwl_mvm_has_unified_ucode(mvm)) {
1070 /* Send phy db control command and then phy db calibration */
1f370650
SS
1071 ret = iwl_send_phy_db_data(mvm->phy_db);
1072 if (ret)
1073 goto error;
8ca151b5 1074
1f370650
SS
1075 ret = iwl_send_phy_cfg_cmd(mvm);
1076 if (ret)
1077 goto error;
1078 }
8ca151b5 1079
b3de3ef4
EG
1080 ret = iwl_mvm_send_bt_init_conf(mvm);
1081 if (ret)
1082 goto error;
1083
43413a97 1084 /* Init RSS configuration */
8edbfaa1
SS
1085 if (mvm->trans->cfg->device_family >= IWL_DEVICE_FAMILY_22000) {
1086 ret = iwl_configure_rxq(mvm);
1087 if (ret) {
1088 IWL_ERR(mvm, "Failed to configure RX queues: %d\n",
1089 ret);
1090 goto error;
1091 }
1092 }
1093
1094 if (iwl_mvm_has_new_rx_api(mvm)) {
43413a97
SS
1095 ret = iwl_send_rss_cfg_cmd(mvm);
1096 if (ret) {
1097 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1098 ret);
1099 goto error;
1100 }
1101 }
1102
8ca151b5 1103 /* init the fw <-> mac80211 STA mapping */
0ae98812 1104 for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
8ca151b5
JB
1105 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1106
0ae98812 1107 mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1d3c3f63 1108
b2b7875b
JB
1109 /* reset quota debouncing buffer - 0xff will yield invalid data */
1110 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1111
c8f54701
JB
1112 ret = iwl_mvm_send_dqa_cmd(mvm);
1113 if (ret)
1114 goto error;
97d5be7e 1115
8ca151b5
JB
1116 /* Add auxiliary station for scanning */
1117 ret = iwl_mvm_add_aux_sta(mvm);
1118 if (ret)
1119 goto error;
1120
53a9d61e 1121 /* Add all the PHY contexts */
57fbcce3 1122 chan = &mvm->hw->wiphy->bands[NL80211_BAND_2GHZ]->channels[0];
53a9d61e
IP
1123 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1124 for (i = 0; i < NUM_PHY_CTX; i++) {
1125 /*
1126 * The channel used here isn't relevant as it's
1127 * going to be overwritten in the other flows.
1128 * For now use the first channel we have.
1129 */
1130 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1131 &chandef, 1, 1);
1132 if (ret)
1133 goto error;
1134 }
8ca151b5 1135
c221daf2
CRI
1136#ifdef CONFIG_THERMAL
1137 if (iwl_mvm_is_tt_in_fw(mvm)) {
1138 /* in order to give the responsibility of ct-kill and
1139 * TX backoff to FW we need to send empty temperature reporting
1140 * cmd during init time
1141 */
1142 iwl_mvm_send_temp_report_ths_cmd(mvm);
1143 } else {
1144 /* Initialize tx backoffs to the minimal possible */
1145 iwl_mvm_tt_tx_backoff(mvm, 0);
1146 }
5c89e7bc
CRI
1147
1148 /* TODO: read the budget from BIOS / Platform NVM */
944eafc2
CRI
1149
1150 /*
1151 * In case there is no budget from BIOS / Platform NVM the default
1152 * budget should be 2000mW (cooling state 0).
1153 */
1154 if (iwl_mvm_is_ctdp_supported(mvm)) {
5c89e7bc
CRI
1155 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1156 mvm->cooling_dev.cur_state);
75cfe338
LC
1157 if (ret)
1158 goto error;
1159 }
c221daf2 1160#else
0c0e2c71
IY
1161 /* Initialize tx backoffs to the minimal possible */
1162 iwl_mvm_tt_tx_backoff(mvm, 0);
c221daf2 1163#endif
0c0e2c71 1164
84bfffa9 1165 WARN_ON(iwl_mvm_config_ltr(mvm));
9180ac50 1166
c1cb92fc 1167 ret = iwl_mvm_power_update_device(mvm);
64b928c4
AB
1168 if (ret)
1169 goto error;
1170
35af15d1
AN
1171 /*
1172 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1173 * anyway, so don't init MCC.
1174 */
1175 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1176 ret = iwl_mvm_init_mcc(mvm);
1177 if (ret)
1178 goto error;
1179 }
90d4f7db 1180
859d914c 1181 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
4ca87a5f 1182 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
b66b5817 1183 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
d2496221
DS
1184 ret = iwl_mvm_config_scan(mvm);
1185 if (ret)
1186 goto error;
1187 }
1188
7498cf4c
EP
1189 /* allow FW/transport low power modes if not during restart */
1190 if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1191 iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN);
1192
da2830ac 1193 ret = iwl_mvm_sar_init(mvm);
5d041c46
LC
1194 if (ret == 0) {
1195 ret = iwl_mvm_sar_geo_init(mvm);
1196 } else if (ret > 0 && !iwl_mvm_sar_get_wgds_table(mvm)) {
1197 /*
1198 * If basic SAR is not available, we check for WGDS,
1199 * which should *not* be available either. If it is
1200 * available, issue an error, because we can't use SAR
1201 * Geo without basic SAR.
1202 */
1203 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
1204 }
da2830ac 1205
5d041c46 1206 if (ret < 0)
a6bff3cb
HD
1207 goto error;
1208
7089ae63
JB
1209 iwl_mvm_leds_sync(mvm);
1210
53a9d61e 1211 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
8ca151b5
JB
1212 return 0;
1213 error:
f4744258 1214 if (!iwlmvm_mod_params.init_dbg || !ret)
de8ba41b 1215 iwl_mvm_stop_device(mvm);
8ca151b5
JB
1216 return ret;
1217}
1218
1219int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1220{
1221 int ret, i;
1222
1223 lockdep_assert_held(&mvm->mutex);
1224
1225 ret = iwl_trans_start_hw(mvm->trans);
1226 if (ret)
1227 return ret;
1228
1229 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1230 if (ret) {
1231 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1232 goto error;
1233 }
1234
a0544272 1235 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
8ca151b5
JB
1236 if (ret)
1237 goto error;
1238
1239 /* Send phy db control command and then phy db calibration*/
1240 ret = iwl_send_phy_db_data(mvm->phy_db);
1241 if (ret)
1242 goto error;
1243
1244 ret = iwl_send_phy_cfg_cmd(mvm);
1245 if (ret)
1246 goto error;
1247
1248 /* init the fw <-> mac80211 STA mapping */
0ae98812 1249 for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
8ca151b5
JB
1250 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1251
1252 /* Add auxiliary station for scanning */
1253 ret = iwl_mvm_add_aux_sta(mvm);
1254 if (ret)
1255 goto error;
1256
1257 return 0;
1258 error:
fcb6b92a 1259 iwl_mvm_stop_device(mvm);
8ca151b5
JB
1260 return ret;
1261}
1262
0416841d
JB
1263void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1264 struct iwl_rx_cmd_buffer *rxb)
8ca151b5
JB
1265{
1266 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1267 struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1268 u32 flags = le32_to_cpu(card_state_notif->flags);
1269
1270 IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1271 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1272 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1273 (flags & CT_KILL_CARD_DISABLED) ?
1274 "Reached" : "Not reached");
8ca151b5
JB
1275}
1276
0416841d
JB
1277void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1278 struct iwl_rx_cmd_buffer *rxb)
30269c12
CRI
1279{
1280 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1281 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1282
0c8d0a47
GBA
1283 IWL_DEBUG_INFO(mvm,
1284 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1285 le32_to_cpu(mfuart_notif->installed_ver),
1286 le32_to_cpu(mfuart_notif->external_ver),
1287 le32_to_cpu(mfuart_notif->status),
1288 le32_to_cpu(mfuart_notif->duration));
1289
19f63c53
GBA
1290 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
1291 IWL_DEBUG_INFO(mvm,
0c8d0a47 1292 "MFUART: image size: 0x%08x\n",
19f63c53 1293 le32_to_cpu(mfuart_notif->image_size));
30269c12 1294}