iwlwifi: don't access trans_cfg via cfg
[linux-block.git] / drivers / net / wireless / intel / iwlwifi / mvm / fw.c
CommitLineData
8ca151b5
JB
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8d193ca2 9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
bdccdb85 10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
48e775e6 11 * Copyright(c) 2018 - 2019 Intel Corporation
8ca151b5
JB
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of version 2 of the GNU General Public License as
15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
8ca151b5 22 * The full GNU General Public License is included in this distribution
410dc5aa 23 * in the file called COPYING.
8ca151b5
JB
24 *
25 * Contact Information:
cb2f8277 26 * Intel Linux Wireless <linuxwifi@intel.com>
8ca151b5
JB
27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *
29 * BSD LICENSE
30 *
51368bf7 31 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8d193ca2 32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
bdccdb85 33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
48e775e6 34 * Copyright(c) 2018 - 2019 Intel Corporation
8ca151b5
JB
35 * All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 *
41 * * Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * * Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in
45 * the documentation and/or other materials provided with the
46 * distribution.
47 * * Neither the name Intel Corporation nor the names of its
48 * contributors may be used to endorse or promote products derived
49 * from this software without specific prior written permission.
50 *
51 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
52 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
53 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
54 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
55 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
56 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
57 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
61 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 *
63 *****************************************************************************/
64#include <net/mac80211.h>
854d773e 65#include <linux/netdevice.h>
8ca151b5
JB
66
67#include "iwl-trans.h"
68#include "iwl-op-mode.h"
d962f9b1 69#include "fw/img.h"
8ca151b5
JB
70#include "iwl-debug.h"
71#include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
72#include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
8c23f95c 73#include "iwl-prph.h"
813df5ce 74#include "fw/acpi.h"
8ca151b5
JB
75
76#include "mvm.h"
7174beb6 77#include "fw/dbg.h"
8ca151b5 78#include "iwl-phy-db.h"
9c4f7d51
ST
79#include "iwl-modparams.h"
80#include "iwl-nvm-parse.h"
8ca151b5
JB
81
82#define MVM_UCODE_ALIVE_TIMEOUT HZ
83#define MVM_UCODE_CALIB_TIMEOUT (2*HZ)
84
85#define UCODE_VALID_OK cpu_to_le32(0x1)
86
8ca151b5
JB
87struct iwl_mvm_alive_data {
88 bool valid;
89 u32 scd_base_addr;
90};
91
8ca151b5
JB
92static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
93{
94 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
95 .valid = cpu_to_le32(valid_tx_ant),
96 };
97
33223542 98 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
a1022927 99 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
8ca151b5
JB
100 sizeof(tx_ant_cmd), &tx_ant_cmd);
101}
102
43413a97
SS
103static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
104{
105 int i;
106 struct iwl_rss_config_cmd cmd = {
107 .flags = cpu_to_le32(IWL_RSS_ENABLE),
608dce95
SS
108 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
109 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
110 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
111 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
112 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
113 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
43413a97
SS
114 };
115
f43495fd
SS
116 if (mvm->trans->num_rx_queues == 1)
117 return 0;
118
854d773e 119 /* Do not direct RSS traffic to Q 0 which is our fallback queue */
43413a97 120 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
854d773e
SS
121 cmd.indirection_table[i] =
122 1 + (i % (mvm->trans->num_rx_queues - 1));
123 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
43413a97
SS
124
125 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
126}
127
8edbfaa1
SS
128static int iwl_configure_rxq(struct iwl_mvm *mvm)
129{
dbf592f3 130 int i, num_queues, size, ret;
8edbfaa1 131 struct iwl_rfh_queue_config *cmd;
dbf592f3
JB
132 struct iwl_host_cmd hcmd = {
133 .id = WIDE_ID(DATA_PATH_GROUP, RFH_QUEUE_CONFIG_CMD),
134 .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
135 };
8edbfaa1
SS
136
137 /* Do not configure default queue, it is configured via context info */
138 num_queues = mvm->trans->num_rx_queues - 1;
139
dbf592f3 140 size = struct_size(cmd, data, num_queues);
8edbfaa1
SS
141
142 cmd = kzalloc(size, GFP_KERNEL);
143 if (!cmd)
144 return -ENOMEM;
145
146 cmd->num_queues = num_queues;
147
148 for (i = 0; i < num_queues; i++) {
149 struct iwl_trans_rxq_dma_data data;
150
151 cmd->data[i].q_num = i + 1;
152 iwl_trans_get_rxq_dma_data(mvm->trans, i + 1, &data);
153
154 cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb);
155 cmd->data[i].urbd_stts_wrptr =
156 cpu_to_le64(data.urbd_stts_wrptr);
157 cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb);
158 cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid);
159 }
160
dbf592f3
JB
161 hcmd.data[0] = cmd;
162 hcmd.len[0] = size;
163
164 ret = iwl_mvm_send_cmd(mvm, &hcmd);
165
166 kfree(cmd);
167
168 return ret;
8edbfaa1
SS
169}
170
97d5be7e
LK
171static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
172{
173 struct iwl_dqa_enable_cmd dqa_cmd = {
174 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
175 };
176 u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
177 int ret;
178
179 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
180 if (ret)
181 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
182 else
183 IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
184
185 return ret;
186}
187
bdccdb85
GBA
188void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
189 struct iwl_rx_cmd_buffer *rxb)
190{
191 struct iwl_rx_packet *pkt = rxb_addr(rxb);
192 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
193 __le32 *dump_data = mfu_dump_notif->data;
194 int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
195 int i;
196
197 if (mfu_dump_notif->index_num == 0)
198 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
199 le32_to_cpu(mfu_dump_notif->assert_id));
200
201 for (i = 0; i < n_words; i++)
202 IWL_DEBUG_INFO(mvm,
203 "MFUART assert dump, dword %u: 0x%08x\n",
204 le16_to_cpu(mfu_dump_notif->index_num) *
205 n_words + i,
206 le32_to_cpu(dump_data[i]));
207}
208
8ca151b5
JB
209static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
210 struct iwl_rx_packet *pkt, void *data)
211{
212 struct iwl_mvm *mvm =
213 container_of(notif_wait, struct iwl_mvm, notif_wait);
214 struct iwl_mvm_alive_data *alive_data = data;
5c228d63 215 struct mvm_alive_resp_v3 *palive3;
7e1223b5 216 struct mvm_alive_resp *palive;
5c228d63
SS
217 struct iwl_umac_alive *umac;
218 struct iwl_lmac_alive *lmac1;
219 struct iwl_lmac_alive *lmac2 = NULL;
220 u16 status;
22463857 221 u32 lmac_error_event_table, umac_error_event_table;
01a9ca51 222
5c228d63
SS
223 if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
224 palive = (void *)pkt->data;
225 umac = &palive->umac_data;
226 lmac1 = &palive->lmac_data[0];
227 lmac2 = &palive->lmac_data[1];
228 status = le16_to_cpu(palive->status);
229 } else {
230 palive3 = (void *)pkt->data;
231 umac = &palive3->umac_data;
232 lmac1 = &palive3->lmac_data;
233 status = le16_to_cpu(palive3->status);
234 }
01a9ca51 235
22463857
SM
236 lmac_error_event_table =
237 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
238 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
239
5c228d63 240 if (lmac2)
91c28b83 241 mvm->trans->dbg.lmac_error_event_table[1] =
22463857 242 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
ffa70264 243
22463857 244 umac_error_event_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr);
01a9ca51 245
3485e76e
LC
246 if (!umac_error_event_table) {
247 mvm->support_umac_log = false;
248 } else if (umac_error_event_table >=
249 mvm->trans->cfg->min_umac_error_event_table) {
250 mvm->support_umac_log = true;
3485e76e 251 } else {
fb5b2846
LC
252 IWL_ERR(mvm,
253 "Not valid error log pointer 0x%08X for %s uCode\n",
22463857 254 umac_error_event_table,
fb5b2846
LC
255 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
256 "Init" : "RT");
3485e76e
LC
257 mvm->support_umac_log = false;
258 }
fb5b2846 259
22463857
SM
260 if (mvm->support_umac_log)
261 iwl_fw_umac_set_alive_err_table(mvm->trans,
262 umac_error_event_table);
263
264 alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr);
5c228d63 265 alive_data->valid = status == IWL_ALIVE_STATUS_OK;
7e1223b5 266
5c228d63
SS
267 IWL_DEBUG_FW(mvm,
268 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
269 status, lmac1->ver_type, lmac1->ver_subtype);
7e1223b5 270
5c228d63
SS
271 if (lmac2)
272 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
7e1223b5 273
5c228d63
SS
274 IWL_DEBUG_FW(mvm,
275 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
276 le32_to_cpu(umac->umac_major),
277 le32_to_cpu(umac->umac_minor));
8ca151b5 278
0a3a3e9e
SM
279 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
280
8ca151b5
JB
281 return true;
282}
283
1f370650
SS
284static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
285 struct iwl_rx_packet *pkt, void *data)
286{
287 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
288
289 return true;
290}
291
8ca151b5
JB
292static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
293 struct iwl_rx_packet *pkt, void *data)
294{
295 struct iwl_phy_db *phy_db = data;
296
297 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
298 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
299 return true;
300 }
301
ce1f2778 302 WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
8ca151b5
JB
303
304 return false;
305}
306
307static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
308 enum iwl_ucode_type ucode_type)
309{
310 struct iwl_notification_wait alive_wait;
94a8d87c 311 struct iwl_mvm_alive_data alive_data = {};
8ca151b5 312 const struct fw_img *fw;
cfbc6c4c 313 int ret;
702e975d 314 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
6eb031d2 315 static const u16 alive_cmd[] = { MVM_ALIVE };
b3500b47
EG
316 bool run_in_rfkill =
317 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
8ca151b5 318
61df750c 319 if (ucode_type == IWL_UCODE_REGULAR &&
3d2d4422
GBA
320 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
321 !(fw_has_capa(&mvm->fw->ucode_capa,
322 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
612da1ef 323 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
61df750c 324 else
612da1ef 325 fw = iwl_get_ucode_image(mvm->fw, ucode_type);
befe9b6f 326 if (WARN_ON(!fw))
8ca151b5 327 return -EINVAL;
702e975d 328 iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
65b280fe 329 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
8ca151b5
JB
330
331 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
332 alive_cmd, ARRAY_SIZE(alive_cmd),
333 iwl_alive_fn, &alive_data);
334
b3500b47
EG
335 /*
336 * We want to load the INIT firmware even in RFKILL
337 * For the unified firmware case, the ucode_type is not
338 * INIT, but we still need to run it.
339 */
340 ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill);
8ca151b5 341 if (ret) {
702e975d 342 iwl_fw_set_current_image(&mvm->fwrt, old_type);
8ca151b5
JB
343 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
344 return ret;
345 }
346
347 /*
348 * Some things may run in the background now, but we
349 * just wait for the ALIVE notification here.
350 */
351 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
352 MVM_UCODE_ALIVE_TIMEOUT);
353 if (ret) {
d6be9c1d
SS
354 struct iwl_trans *trans = mvm->trans;
355
67b8261c 356 if (ret == -ETIMEDOUT)
700b3799
SM
357 iwl_fw_dbg_error_collect(&mvm->fwrt,
358 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
67b8261c 359
286ca8eb 360 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_22000)
d6be9c1d
SS
361 IWL_ERR(mvm,
362 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
ea695b7c
ST
363 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
364 iwl_read_umac_prph(trans,
365 UMAG_SB_CPU_2_STATUS));
286ca8eb 366 else if (trans->trans_cfg->device_family >=
79b6c8fe 367 IWL_DEVICE_FAMILY_8000)
192de2b4
DS
368 IWL_ERR(mvm,
369 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
d6be9c1d
SS
370 iwl_read_prph(trans, SB_CPU_1_STATUS),
371 iwl_read_prph(trans, SB_CPU_2_STATUS));
702e975d 372 iwl_fw_set_current_image(&mvm->fwrt, old_type);
8ca151b5
JB
373 return ret;
374 }
375
376 if (!alive_data.valid) {
377 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
702e975d 378 iwl_fw_set_current_image(&mvm->fwrt, old_type);
8ca151b5
JB
379 return -EIO;
380 }
381
382 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
383
384 /*
385 * Note: all the queues are enabled as part of the interface
386 * initialization, but in firmware restart scenarios they
387 * could be stopped, so wake them up. In firmware restart,
388 * mac80211 will have the queues stopped as well until the
389 * reconfiguration completes. During normal startup, they
390 * will be empty.
391 */
392
4ecafae9 393 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
1c14089e
JB
394 /*
395 * Set a 'fake' TID for the command queue, since we use the
396 * hweight() of the tid_bitmap as a refcount now. Not that
397 * we ever even consider the command queue as one we might
398 * want to reuse, but be safe nevertheless.
399 */
400 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
401 BIT(IWL_MAX_TID_COUNT + 2);
8ca151b5 402
65b280fe 403 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
f7805b33
LC
404#ifdef CONFIG_IWLWIFI_DEBUGFS
405 iwl_fw_set_dbg_rec_on(&mvm->fwrt);
406#endif
8ca151b5
JB
407
408 return 0;
409}
8ca151b5 410
8c5f47b1
JB
411static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
412{
413 struct iwl_notification_wait init_wait;
414 struct iwl_nvm_access_complete_cmd nvm_complete = {};
415 struct iwl_init_extended_cfg_cmd init_cfg = {
416 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
417 };
418 static const u16 init_complete[] = {
419 INIT_COMPLETE_NOTIF,
420 };
421 int ret;
422
423 lockdep_assert_held(&mvm->mutex);
424
94022562
EG
425 mvm->rfkill_safe_init_done = false;
426
8c5f47b1
JB
427 iwl_init_notification_wait(&mvm->notif_wait,
428 &init_wait,
429 init_complete,
430 ARRAY_SIZE(init_complete),
431 iwl_wait_init_complete,
432 NULL);
433
b108d8c7 434 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
86ce5c74 435
8c5f47b1
JB
436 /* Will also start the device */
437 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
438 if (ret) {
439 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
440 goto error;
441 }
b108d8c7
SM
442 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
443 NULL);
8c5f47b1
JB
444
445 /* Send init config command to mark that we are sending NVM access
446 * commands
447 */
448 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
b3500b47
EG
449 INIT_EXTENDED_CFG_CMD),
450 CMD_SEND_IN_RFKILL,
8c5f47b1
JB
451 sizeof(init_cfg), &init_cfg);
452 if (ret) {
453 IWL_ERR(mvm, "Failed to run init config command: %d\n",
454 ret);
455 goto error;
456 }
457
e9e1ba3d
SS
458 /* Load NVM to NIC if needed */
459 if (mvm->nvm_file_name) {
9c4f7d51
ST
460 iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
461 mvm->nvm_sections);
8c5f47b1 462 iwl_mvm_load_nvm_to_nic(mvm);
e9e1ba3d 463 }
8c5f47b1 464
d4f3695e 465 if (IWL_MVM_PARSE_NVM && read_nvm) {
5bd1d2c1 466 ret = iwl_nvm_init(mvm);
d4f3695e
SS
467 if (ret) {
468 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
469 goto error;
470 }
471 }
472
8c5f47b1 473 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
b3500b47
EG
474 NVM_ACCESS_COMPLETE),
475 CMD_SEND_IN_RFKILL,
8c5f47b1
JB
476 sizeof(nvm_complete), &nvm_complete);
477 if (ret) {
478 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
479 ret);
480 goto error;
481 }
482
483 /* We wait for the INIT complete notification */
e9e1ba3d
SS
484 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
485 MVM_UCODE_ALIVE_TIMEOUT);
486 if (ret)
487 return ret;
488
489 /* Read the NVM only at driver load time, no need to do this twice */
d4f3695e 490 if (!IWL_MVM_PARSE_NVM && read_nvm) {
4c625c56 491 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
c135cb56
ST
492 if (IS_ERR(mvm->nvm_data)) {
493 ret = PTR_ERR(mvm->nvm_data);
494 mvm->nvm_data = NULL;
e9e1ba3d
SS
495 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
496 return ret;
497 }
498 }
499
b3500b47
EG
500 mvm->rfkill_safe_init_done = true;
501
e9e1ba3d 502 return 0;
8c5f47b1
JB
503
504error:
505 iwl_remove_notification(&mvm->notif_wait, &init_wait);
506 return ret;
507}
508
8ca151b5
JB
509static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
510{
511 struct iwl_phy_cfg_cmd phy_cfg_cmd;
702e975d 512 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
8ca151b5
JB
513
514 /* Set parameters */
a0544272 515 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
86a2b204
LC
516
517 /* set flags extra PHY configuration flags from the device's cfg */
518 phy_cfg_cmd.phy_cfg |= cpu_to_le32(mvm->cfg->extra_phy_cfg_flags);
519
8ca151b5
JB
520 phy_cfg_cmd.calib_control.event_trigger =
521 mvm->fw->default_calib[ucode_type].event_trigger;
522 phy_cfg_cmd.calib_control.flow_trigger =
523 mvm->fw->default_calib[ucode_type].flow_trigger;
524
525 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
526 phy_cfg_cmd.phy_cfg);
527
a1022927 528 return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
8ca151b5
JB
529 sizeof(phy_cfg_cmd), &phy_cfg_cmd);
530}
531
8ca151b5
JB
532int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
533{
534 struct iwl_notification_wait calib_wait;
6eb031d2 535 static const u16 init_complete[] = {
8ca151b5
JB
536 INIT_COMPLETE_NOTIF,
537 CALIB_RES_NOTIF_PHY_DB
538 };
539 int ret;
540
7d6222e2 541 if (iwl_mvm_has_unified_ucode(mvm))
8c5f47b1
JB
542 return iwl_run_unified_mvm_ucode(mvm, true);
543
8ca151b5
JB
544 lockdep_assert_held(&mvm->mutex);
545
94022562 546 mvm->rfkill_safe_init_done = false;
8ca151b5
JB
547
548 iwl_init_notification_wait(&mvm->notif_wait,
549 &calib_wait,
550 init_complete,
551 ARRAY_SIZE(init_complete),
552 iwl_wait_phy_db_entry,
553 mvm->phy_db);
554
555 /* Will also start the device */
556 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
557 if (ret) {
558 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
00e0c6c8 559 goto remove_notif;
8ca151b5
JB
560 }
561
7d34a7d7 562 if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
b3de3ef4
EG
563 ret = iwl_mvm_send_bt_init_conf(mvm);
564 if (ret)
00e0c6c8 565 goto remove_notif;
b3de3ef4 566 }
931d4160 567
81a67e32 568 /* Read the NVM only at driver load time, no need to do this twice */
8ca151b5 569 if (read_nvm) {
5bd1d2c1 570 ret = iwl_nvm_init(mvm);
8ca151b5
JB
571 if (ret) {
572 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
00e0c6c8 573 goto remove_notif;
8ca151b5
JB
574 }
575 }
576
81a67e32 577 /* In case we read the NVM from external file, load it to the NIC */
e02a9d60 578 if (mvm->nvm_file_name)
81a67e32
EL
579 iwl_mvm_load_nvm_to_nic(mvm);
580
64866e5d
LC
581 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
582 "Too old NVM version (0x%0x, required = 0x%0x)",
583 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
8ca151b5 584
4f59334b
EH
585 /*
586 * abort after reading the nvm in case RF Kill is on, we will complete
587 * the init seq later when RF kill will switch to off
588 */
1a3fe0b2 589 if (iwl_mvm_is_radio_hw_killed(mvm)) {
4f59334b
EH
590 IWL_DEBUG_RF_KILL(mvm,
591 "jump over all phy activities due to RF kill\n");
00e0c6c8 592 goto remove_notif;
4f59334b
EH
593 }
594
b3500b47 595 mvm->rfkill_safe_init_done = true;
31b8b343 596
e07cbb53 597 /* Send TX valid antennas before triggering calibrations */
a0544272 598 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
e07cbb53 599 if (ret)
00e0c6c8 600 goto remove_notif;
e07cbb53 601
8ca151b5
JB
602 ret = iwl_send_phy_cfg_cmd(mvm);
603 if (ret) {
604 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
605 ret);
00e0c6c8 606 goto remove_notif;
8ca151b5
JB
607 }
608
609 /*
610 * Some things may run in the background now, but we
611 * just wait for the calibration complete notification.
612 */
613 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
00e0c6c8
LC
614 MVM_UCODE_CALIB_TIMEOUT);
615 if (!ret)
616 goto out;
31b8b343 617
00e0c6c8 618 if (iwl_mvm_is_radio_hw_killed(mvm)) {
31b8b343 619 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
00e0c6c8
LC
620 ret = 0;
621 } else {
622 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
623 ret);
31b8b343 624 }
00e0c6c8 625
8ca151b5
JB
626 goto out;
627
00e0c6c8 628remove_notif:
8ca151b5
JB
629 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
630out:
b3500b47 631 mvm->rfkill_safe_init_done = false;
a4082843 632 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
8ca151b5
JB
633 /* we want to debug INIT and we have no NVM - fake */
634 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
635 sizeof(struct ieee80211_channel) +
636 sizeof(struct ieee80211_rate),
637 GFP_KERNEL);
638 if (!mvm->nvm_data)
639 return -ENOMEM;
8ca151b5
JB
640 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
641 mvm->nvm_data->bands[0].n_channels = 1;
642 mvm->nvm_data->bands[0].n_bitrates = 1;
643 mvm->nvm_data->bands[0].bitrates =
644 (void *)mvm->nvm_data->channels + 1;
645 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
646 }
647
648 return ret;
649}
650
84bfffa9
EG
651static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
652{
653 struct iwl_ltr_config_cmd cmd = {
654 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
655 };
656
657 if (!mvm->trans->ltr_enabled)
658 return 0;
659
84bfffa9
EG
660 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
661 sizeof(cmd), &cmd);
662}
663
c386dacb 664#ifdef CONFIG_ACPI
e8698301
AB
665static inline int iwl_mvm_sar_set_profile(struct iwl_mvm *mvm,
666 union acpi_object *table,
667 struct iwl_mvm_sar_profile *profile,
668 bool enabled)
c386dacb
HD
669{
670 int i;
da2830ac 671
c386dacb 672 profile->enabled = enabled;
da2830ac 673
e7a3b8d8 674 for (i = 0; i < ACPI_SAR_TABLE_SIZE; i++) {
c386dacb
HD
675 if ((table[i].type != ACPI_TYPE_INTEGER) ||
676 (table[i].integer.value > U8_MAX))
677 return -EINVAL;
678
679 profile->table[i] = table[i].integer.value;
680 }
681
682 return 0;
683}
684
c386dacb 685static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
da2830ac 686{
813df5ce 687 union acpi_object *wifi_pkg, *table, *data;
c386dacb 688 bool enabled;
0c3d7282 689 int ret, tbl_rev;
da2830ac 690
813df5ce
LC
691 data = iwl_acpi_get_object(mvm->dev, ACPI_WRDS_METHOD);
692 if (IS_ERR(data))
693 return PTR_ERR(data);
da2830ac 694
2fa388cf 695 wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
0c3d7282
HD
696 ACPI_WRDS_WIFI_DATA_SIZE, &tbl_rev);
697 if (IS_ERR(wifi_pkg) || tbl_rev != 0) {
c386dacb
HD
698 ret = PTR_ERR(wifi_pkg);
699 goto out_free;
700 }
701
702 if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) {
703 ret = -EINVAL;
704 goto out_free;
705 }
706
707 enabled = !!(wifi_pkg->package.elements[1].integer.value);
da2830ac 708
c386dacb
HD
709 /* position of the actual table */
710 table = &wifi_pkg->package.elements[2];
711
712 /* The profile from WRDS is officially profile 1, but goes
713 * into sar_profiles[0] (because we don't have a profile 0).
714 */
715 ret = iwl_mvm_sar_set_profile(mvm, table, &mvm->sar_profiles[0],
716 enabled);
c386dacb 717out_free:
813df5ce 718 kfree(data);
da2830ac
LC
719 return ret;
720}
da2830ac 721
69964905
LC
722static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
723{
813df5ce 724 union acpi_object *wifi_pkg, *data;
69964905 725 bool enabled;
0c3d7282 726 int i, n_profiles, ret, tbl_rev;
69964905 727
813df5ce
LC
728 data = iwl_acpi_get_object(mvm->dev, ACPI_EWRD_METHOD);
729 if (IS_ERR(data))
730 return PTR_ERR(data);
69964905 731
2fa388cf 732 wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
0c3d7282
HD
733 ACPI_EWRD_WIFI_DATA_SIZE, &tbl_rev);
734 if (IS_ERR(wifi_pkg) || tbl_rev != 0) {
69964905
LC
735 ret = PTR_ERR(wifi_pkg);
736 goto out_free;
737 }
738
739 if ((wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) ||
740 (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER)) {
741 ret = -EINVAL;
742 goto out_free;
743 }
744
745 enabled = !!(wifi_pkg->package.elements[1].integer.value);
746 n_profiles = wifi_pkg->package.elements[2].integer.value;
747
2e1976bb
LC
748 /*
749 * Check the validity of n_profiles. The EWRD profiles start
750 * from index 1, so the maximum value allowed here is
751 * ACPI_SAR_PROFILES_NUM - 1.
752 */
753 if (n_profiles <= 0 || n_profiles >= ACPI_SAR_PROFILE_NUM) {
e2ef1476
SD
754 ret = -EINVAL;
755 goto out_free;
756 }
757
69964905
LC
758 for (i = 0; i < n_profiles; i++) {
759 /* the tables start at element 3 */
ba3224db 760 int pos = 3;
69964905
LC
761
762 /* The EWRD profiles officially go from 2 to 4, but we
763 * save them in sar_profiles[1-3] (because we don't
764 * have profile 0). So in the array we start from 1.
765 */
766 ret = iwl_mvm_sar_set_profile(mvm,
767 &wifi_pkg->package.elements[pos],
768 &mvm->sar_profiles[i + 1],
769 enabled);
770 if (ret < 0)
771 break;
772
773 /* go to the next table */
e7a3b8d8 774 pos += ACPI_SAR_TABLE_SIZE;
69964905
LC
775 }
776
777out_free:
813df5ce 778 kfree(data);
69964905
LC
779 return ret;
780}
781
7fe90e0e 782static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm)
a6bff3cb 783{
813df5ce 784 union acpi_object *wifi_pkg, *data;
0c3d7282 785 int i, j, ret, tbl_rev;
7fe90e0e 786 int idx = 1;
a6bff3cb 787
813df5ce
LC
788 data = iwl_acpi_get_object(mvm->dev, ACPI_WGDS_METHOD);
789 if (IS_ERR(data))
790 return PTR_ERR(data);
a6bff3cb 791
2fa388cf 792 wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
0c3d7282
HD
793 ACPI_WGDS_WIFI_DATA_SIZE, &tbl_rev);
794 if (IS_ERR(wifi_pkg) || tbl_rev > 1) {
a6bff3cb
HD
795 ret = PTR_ERR(wifi_pkg);
796 goto out_free;
797 }
798
0c3d7282 799 mvm->geo_rev = tbl_rev;
e7a3b8d8
LC
800 for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
801 for (j = 0; j < ACPI_GEO_TABLE_SIZE; j++) {
7fe90e0e 802 union acpi_object *entry;
a6bff3cb 803
7fe90e0e
HD
804 entry = &wifi_pkg->package.elements[idx++];
805 if ((entry->type != ACPI_TYPE_INTEGER) ||
aae9d563
CJ
806 (entry->integer.value > U8_MAX)) {
807 ret = -EINVAL;
808 goto out_free;
809 }
a6bff3cb 810
7fe90e0e
HD
811 mvm->geo_profiles[i].values[j] = entry->integer.value;
812 }
a6bff3cb
HD
813 }
814 ret = 0;
815out_free:
813df5ce 816 kfree(data);
a6bff3cb
HD
817 return ret;
818}
819
42ce76d6 820int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
da2830ac 821{
0791c2fc
HD
822 union {
823 struct iwl_dev_tx_power_cmd v5;
824 struct iwl_dev_tx_power_cmd_v4 v4;
825 } cmd;
42ce76d6 826 int i, j, idx;
e7a3b8d8 827 int profs[ACPI_SAR_NUM_CHAIN_LIMITS] = { prof_a, prof_b };
0791c2fc 828 int len;
da2830ac 829
e7a3b8d8
LC
830 BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS < 2);
831 BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS * ACPI_SAR_NUM_SUB_BANDS !=
832 ACPI_SAR_TABLE_SIZE);
42ce76d6 833
0791c2fc
HD
834 cmd.v5.v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS);
835
836 if (fw_has_api(&mvm->fw->ucode_capa,
837 IWL_UCODE_TLV_API_REDUCE_TX_POWER))
838 len = sizeof(cmd.v5);
839 else if (fw_has_capa(&mvm->fw->ucode_capa,
840 IWL_UCODE_TLV_CAPA_TX_POWER_ACK))
841 len = sizeof(cmd.v4);
842 else
843 len = sizeof(cmd.v4.v3);
55bfa4b9 844
e7a3b8d8 845 for (i = 0; i < ACPI_SAR_NUM_CHAIN_LIMITS; i++) {
42ce76d6 846 struct iwl_mvm_sar_profile *prof;
da2830ac 847
42ce76d6
LC
848 /* don't allow SAR to be disabled (profile 0 means disable) */
849 if (profs[i] == 0)
850 return -EPERM;
da2830ac 851
e7a3b8d8
LC
852 /* we are off by one, so allow up to ACPI_SAR_PROFILE_NUM */
853 if (profs[i] > ACPI_SAR_PROFILE_NUM)
42ce76d6 854 return -EINVAL;
da2830ac 855
42ce76d6
LC
856 /* profiles go from 1 to 4, so decrement to access the array */
857 prof = &mvm->sar_profiles[profs[i] - 1];
858
859 /* if the profile is disabled, do nothing */
860 if (!prof->enabled) {
861 IWL_DEBUG_RADIO(mvm, "SAR profile %d is disabled.\n",
862 profs[i]);
863 /* if one of the profiles is disabled, we fail all */
864 return -ENOENT;
865 }
da2830ac 866
4fd445a2
HD
867 IWL_DEBUG_INFO(mvm,
868 "SAR EWRD: chain %d profile index %d\n",
869 i, profs[i]);
da2830ac 870 IWL_DEBUG_RADIO(mvm, " Chain[%d]:\n", i);
e7a3b8d8
LC
871 for (j = 0; j < ACPI_SAR_NUM_SUB_BANDS; j++) {
872 idx = (i * ACPI_SAR_NUM_SUB_BANDS) + j;
0791c2fc 873 cmd.v5.v3.per_chain_restriction[i][j] =
42ce76d6 874 cpu_to_le16(prof->table[idx]);
da2830ac 875 IWL_DEBUG_RADIO(mvm, " Band[%d] = %d * .125dBm\n",
42ce76d6 876 j, prof->table[idx]);
da2830ac
LC
877 }
878 }
879
42ce76d6
LC
880 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
881
882 return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
883}
884
39bd984c
LC
885static bool iwl_mvm_sar_geo_support(struct iwl_mvm *mvm)
886{
887 /*
888 * The GEO_TX_POWER_LIMIT command is not supported on earlier
889 * firmware versions. Unfortunately, we don't have a TLV API
890 * flag to rely on, so rely on the major version which is in
f5a47fae 891 * the first byte of ucode_ver. This was implemented
fddbfeec
LC
892 * initially on version 38 and then backported to29 and 17.
893 * The intention was to have it in 36 as well, but not all
894 * 8000 family got this feature enabled. The 8000 family is
895 * the only one using version 36, so skip this version
896 * entirely.
39bd984c 897 */
f5a47fae 898 return IWL_UCODE_SERIAL(mvm->fw->ucode_ver) >= 38 ||
f5a47fae
LC
899 IWL_UCODE_SERIAL(mvm->fw->ucode_ver) == 29 ||
900 IWL_UCODE_SERIAL(mvm->fw->ucode_ver) == 17;
39bd984c
LC
901}
902
7fe90e0e
HD
903int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
904{
905 struct iwl_geo_tx_power_profiles_resp *resp;
906 int ret;
0c3d7282
HD
907 u16 len;
908 void *data;
909 struct iwl_geo_tx_power_profiles_cmd geo_cmd;
910 struct iwl_geo_tx_power_profiles_cmd_v1 geo_cmd_v1;
911 struct iwl_host_cmd cmd;
912
913 if (fw_has_api(&mvm->fw->ucode_capa, IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
914 geo_cmd.ops =
915 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
916 len = sizeof(geo_cmd);
917 data = &geo_cmd;
918 } else {
919 geo_cmd_v1.ops =
920 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
921 len = sizeof(geo_cmd_v1);
922 data = &geo_cmd_v1;
923 }
7fe90e0e 924
0c3d7282 925 cmd = (struct iwl_host_cmd){
7fe90e0e 926 .id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
0c3d7282 927 .len = { len, },
7fe90e0e 928 .flags = CMD_WANT_SKB,
0c3d7282 929 .data = { data },
7fe90e0e
HD
930 };
931
39bd984c
LC
932 if (!iwl_mvm_sar_geo_support(mvm))
933 return -EOPNOTSUPP;
934
7fe90e0e
HD
935 ret = iwl_mvm_send_cmd(mvm, &cmd);
936 if (ret) {
937 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
938 return ret;
939 }
940
941 resp = (void *)cmd.resp_pkt->data;
942 ret = le32_to_cpu(resp->profile_idx);
e7a3b8d8 943 if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES)) {
7fe90e0e
HD
944 ret = -EIO;
945 IWL_WARN(mvm, "Invalid geographic profile idx (%d)\n", ret);
946 }
947
948 iwl_free_resp(&cmd);
949 return ret;
950}
951
a6bff3cb
HD
952static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
953{
a6bff3cb
HD
954 struct iwl_geo_tx_power_profiles_cmd cmd = {
955 .ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES),
956 };
7fe90e0e 957 int ret, i, j;
a6bff3cb
HD
958 u16 cmd_wide_id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT);
959
39bd984c 960 if (!iwl_mvm_sar_geo_support(mvm))
eca1e56c
EG
961 return 0;
962
7fe90e0e 963 ret = iwl_mvm_sar_get_wgds_table(mvm);
a6bff3cb
HD
964 if (ret < 0) {
965 IWL_DEBUG_RADIO(mvm,
966 "Geo SAR BIOS table invalid or unavailable. (%d)\n",
967 ret);
968 /* we don't fail if the table is not available */
969 return 0;
970 }
971
972 IWL_DEBUG_RADIO(mvm, "Sending GEO_TX_POWER_LIMIT\n");
973
e7a3b8d8 974 BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES * ACPI_WGDS_NUM_BANDS *
66e83903 975 ACPI_WGDS_TABLE_SIZE + 1 != ACPI_WGDS_WIFI_DATA_SIZE);
a6bff3cb 976
e7a3b8d8
LC
977 BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES > IWL_NUM_GEO_PROFILES);
978
979 for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
a6bff3cb
HD
980 struct iwl_per_chain_offset *chain =
981 (struct iwl_per_chain_offset *)&cmd.table[i];
982
983 for (j = 0; j < ACPI_WGDS_NUM_BANDS; j++) {
984 u8 *value;
985
7fe90e0e 986 value = &mvm->geo_profiles[i].values[j *
e7a3b8d8 987 ACPI_GEO_PER_CHAIN_SIZE];
a6bff3cb
HD
988 chain[j].max_tx_power = cpu_to_le16(value[0]);
989 chain[j].chain_a = value[1];
990 chain[j].chain_b = value[2];
991 IWL_DEBUG_RADIO(mvm,
992 "SAR geographic profile[%d] Band[%d]: chain A = %d chain B = %d max_tx_power = %d\n",
993 i, j, value[1], value[2], value[0]);
994 }
995 }
0c3d7282
HD
996
997 cmd.table_revision = cpu_to_le32(mvm->geo_rev);
998
999 if (!fw_has_api(&mvm->fw->ucode_capa,
1000 IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
1001 return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0,
1002 sizeof(struct iwl_geo_tx_power_profiles_cmd_v1),
1003 &cmd);
1004 }
1005
a6bff3cb
HD
1006 return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0, sizeof(cmd), &cmd);
1007}
1008
6ce1e5c0
GA
1009static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm)
1010{
1011 union acpi_object *wifi_pkg, *data, *enabled;
1012 int i, j, ret, tbl_rev;
1013 int idx = 2;
1014
1015 mvm->ppag_table.enabled = cpu_to_le32(0);
1016 data = iwl_acpi_get_object(mvm->dev, ACPI_PPAG_METHOD);
1017 if (IS_ERR(data))
1018 return PTR_ERR(data);
1019
1020 wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
1021 ACPI_PPAG_WIFI_DATA_SIZE, &tbl_rev);
1022
1023 if (IS_ERR(wifi_pkg) || tbl_rev != 0) {
1024 ret = PTR_ERR(wifi_pkg);
1025 goto out_free;
1026 }
1027
1028 enabled = &wifi_pkg->package.elements[1];
1029 if (enabled->type != ACPI_TYPE_INTEGER ||
1030 (enabled->integer.value != 0 && enabled->integer.value != 1)) {
1031 ret = -EINVAL;
1032 goto out_free;
1033 }
1034
1035 mvm->ppag_table.enabled = cpu_to_le32(enabled->integer.value);
1036 if (!mvm->ppag_table.enabled) {
1037 ret = 0;
1038 goto out_free;
1039 }
1040
1041 /*
1042 * read, verify gain values and save them into the PPAG table.
1043 * first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the
1044 * following sub-bands to High-Band (5GHz).
1045 */
1046 for (i = 0; i < ACPI_PPAG_NUM_CHAINS; i++) {
1047 for (j = 0; j < ACPI_PPAG_NUM_SUB_BANDS; j++) {
1048 union acpi_object *ent;
1049
1050 ent = &wifi_pkg->package.elements[idx++];
1051 if (ent->type != ACPI_TYPE_INTEGER ||
1052 (j == 0 && ent->integer.value > ACPI_PPAG_MAX_LB) ||
1053 (j == 0 && ent->integer.value < ACPI_PPAG_MIN_LB) ||
1054 (j != 0 && ent->integer.value > ACPI_PPAG_MAX_HB) ||
1055 (j != 0 && ent->integer.value < ACPI_PPAG_MIN_HB)) {
1056 mvm->ppag_table.enabled = cpu_to_le32(0);
1057 ret = -EINVAL;
1058 goto out_free;
1059 }
1060 mvm->ppag_table.gain[i][j] = ent->integer.value;
1061 }
1062 }
1063 ret = 0;
1064out_free:
1065 kfree(data);
1066 return ret;
1067}
1068
1069int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1070{
1071 int i, j, ret;
1072
1073 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) {
1074 IWL_DEBUG_RADIO(mvm,
1075 "PPAG capability not supported by FW, command not sent.\n");
1076 return 0;
1077 }
1078
1079 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
1080 IWL_DEBUG_RADIO(mvm, "PPAG is %s\n",
1081 mvm->ppag_table.enabled ? "enabled" : "disabled");
1082
1083 for (i = 0; i < ACPI_PPAG_NUM_CHAINS; i++) {
1084 for (j = 0; j < ACPI_PPAG_NUM_SUB_BANDS; j++) {
1085 IWL_DEBUG_RADIO(mvm,
1086 "PPAG table: chain[%d] band[%d]: gain = %d\n",
1087 i, j, mvm->ppag_table.gain[i][j]);
1088 }
1089 }
1090
1091 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
1092 PER_PLATFORM_ANT_GAIN_CMD),
1093 0, sizeof(mvm->ppag_table),
1094 &mvm->ppag_table);
1095 if (ret < 0)
1096 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
1097 ret);
1098
1099 return ret;
1100}
1101
1102static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1103{
1104 int ret;
1105
1106 ret = iwl_mvm_get_ppag_table(mvm);
1107 if (ret < 0) {
1108 IWL_DEBUG_RADIO(mvm,
1109 "PPAG BIOS table invalid or unavailable. (%d)\n",
1110 ret);
1111 return 0;
1112 }
1113 return iwl_mvm_ppag_send_cmd(mvm);
1114}
1115
69964905
LC
1116#else /* CONFIG_ACPI */
1117static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
1118{
1119 return -ENOENT;
1120}
1121
1122static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
1123{
1124 return -ENOENT;
1125}
a6bff3cb 1126
5d041c46
LC
1127static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm)
1128{
1129 return -ENOENT;
1130}
1131
a6bff3cb
HD
1132static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
1133{
1134 return 0;
1135}
18f1755d
LC
1136
1137int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a,
1138 int prof_b)
1139{
1140 return -ENOENT;
1141}
1142
1143int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
1144{
1145 return -ENOENT;
1146}
6ce1e5c0
GA
1147
1148int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1149{
1150 return -ENOENT;
1151}
1152
1153static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1154{
1155 return -ENOENT;
1156}
69964905
LC
1157#endif /* CONFIG_ACPI */
1158
f130bb75
MG
1159void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1160{
1161 u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1162 int ret;
1163 u32 resp;
1164
1165 struct iwl_fw_error_recovery_cmd recovery_cmd = {
1166 .flags = cpu_to_le32(flags),
1167 .buf_size = 0,
1168 };
1169 struct iwl_host_cmd host_cmd = {
1170 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1171 .flags = CMD_WANT_SKB,
1172 .data = {&recovery_cmd, },
1173 .len = {sizeof(recovery_cmd), },
1174 };
1175
1176 /* no error log was defined in TLV */
1177 if (!error_log_size)
1178 return;
1179
1180 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1181 /* no buf was allocated while HW reset */
1182 if (!mvm->error_recovery_buf)
1183 return;
1184
1185 host_cmd.data[1] = mvm->error_recovery_buf;
1186 host_cmd.len[1] = error_log_size;
1187 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1188 recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1189 }
1190
1191 ret = iwl_mvm_send_cmd(mvm, &host_cmd);
1192 kfree(mvm->error_recovery_buf);
1193 mvm->error_recovery_buf = NULL;
1194
1195 if (ret) {
1196 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1197 return;
1198 }
1199
1200 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1201 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1202 resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data);
1203 if (resp)
1204 IWL_ERR(mvm,
1205 "Failed to send recovery cmd blob was invalid %d\n",
1206 resp);
1207 }
1208}
1209
42ce76d6
LC
1210static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1211{
1212 int ret;
1213
1214 ret = iwl_mvm_sar_get_wrds_table(mvm);
1215 if (ret < 0) {
1216 IWL_DEBUG_RADIO(mvm,
69964905 1217 "WRDS SAR BIOS table invalid or unavailable. (%d)\n",
42ce76d6 1218 ret);
5d041c46
LC
1219 /*
1220 * If not available, don't fail and don't bother with EWRD.
1221 * Return 1 to tell that we can't use WGDS either.
1222 */
1223 return 1;
42ce76d6
LC
1224 }
1225
69964905
LC
1226 ret = iwl_mvm_sar_get_ewrd_table(mvm);
1227 /* if EWRD is not available, we can still use WRDS, so don't fail */
1228 if (ret < 0)
1229 IWL_DEBUG_RADIO(mvm,
1230 "EWRD SAR BIOS table invalid or unavailable. (%d)\n",
1231 ret);
1232
42ce76d6
LC
1233 /* choose profile 1 (WRDS) as default for both chains */
1234 ret = iwl_mvm_sar_select_profile(mvm, 1, 1);
1235
5d041c46
LC
1236 /*
1237 * If we don't have profile 0 from BIOS, just skip it. This
1238 * means that SAR Geo will not be enabled either, even if we
1239 * have other valid profiles.
1240 */
42ce76d6 1241 if (ret == -ENOENT)
5d041c46 1242 return 1;
da2830ac
LC
1243
1244 return ret;
1245}
1246
1f370650 1247static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
8ca151b5 1248{
1f370650 1249 int ret;
8ca151b5 1250
7d6222e2 1251 if (iwl_mvm_has_unified_ucode(mvm))
1f370650 1252 return iwl_run_unified_mvm_ucode(mvm, false);
8ca151b5 1253
8d193ca2 1254 ret = iwl_run_init_mvm_ucode(mvm, false);
f2082a53 1255
f2082a53 1256 if (ret) {
8d193ca2 1257 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
f4744258
LK
1258
1259 if (iwlmvm_mod_params.init_dbg)
1260 return 0;
1f370650 1261 return ret;
8d193ca2 1262 }
8ca151b5 1263
203c83d3 1264 iwl_fw_dbg_stop_sync(&mvm->fwrt);
bab3cb92
EG
1265 iwl_trans_stop_device(mvm->trans);
1266 ret = iwl_trans_start_hw(mvm->trans);
f2082a53 1267 if (ret)
1f370650 1268 return ret;
8ca151b5 1269
b108d8c7 1270 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
da2eb669 1271
94022562 1272 mvm->rfkill_safe_init_done = false;
8ca151b5 1273 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1f370650
SS
1274 if (ret)
1275 return ret;
1276
94022562
EG
1277 mvm->rfkill_safe_init_done = true;
1278
b108d8c7
SM
1279 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1280 NULL);
da2eb669 1281
702e975d 1282 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
1f370650
SS
1283}
1284
1285int iwl_mvm_up(struct iwl_mvm *mvm)
1286{
1287 int ret, i;
1288 struct ieee80211_channel *chan;
1289 struct cfg80211_chan_def chandef;
dd36a507 1290 struct ieee80211_supported_band *sband = NULL;
1f370650
SS
1291
1292 lockdep_assert_held(&mvm->mutex);
1293
1294 ret = iwl_trans_start_hw(mvm->trans);
1295 if (ret)
1296 return ret;
1297
1298 ret = iwl_mvm_load_rt_fw(mvm);
8ca151b5
JB
1299 if (ret) {
1300 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
72d3c7bb
JB
1301 if (ret != -ERFKILL)
1302 iwl_fw_dbg_error_collect(&mvm->fwrt,
1303 FW_DBG_TRIGGER_DRIVER);
8ca151b5
JB
1304 goto error;
1305 }
1306
d0b813fc 1307 iwl_get_shared_mem_conf(&mvm->fwrt);
04fd2c28 1308
1f3b0ff8
LE
1309 ret = iwl_mvm_sf_update(mvm, NULL, false);
1310 if (ret)
1311 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1312
a1af4c48 1313 if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
7a14c23d
SS
1314 mvm->fwrt.dump.conf = FW_DBG_INVALID;
1315 /* if we have a destination, assume EARLY START */
1316 if (mvm->fw->dbg.dest_tlv)
1317 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
1318 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
1319 }
6a951267 1320
a0544272 1321 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
8ca151b5
JB
1322 if (ret)
1323 goto error;
1324
7d6222e2
JB
1325 if (!iwl_mvm_has_unified_ucode(mvm)) {
1326 /* Send phy db control command and then phy db calibration */
1f370650
SS
1327 ret = iwl_send_phy_db_data(mvm->phy_db);
1328 if (ret)
1329 goto error;
8ca151b5 1330
1f370650
SS
1331 ret = iwl_send_phy_cfg_cmd(mvm);
1332 if (ret)
1333 goto error;
1334 }
8ca151b5 1335
b3de3ef4
EG
1336 ret = iwl_mvm_send_bt_init_conf(mvm);
1337 if (ret)
1338 goto error;
1339
43413a97 1340 /* Init RSS configuration */
286ca8eb 1341 if (mvm->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_22000) {
8edbfaa1
SS
1342 ret = iwl_configure_rxq(mvm);
1343 if (ret) {
1344 IWL_ERR(mvm, "Failed to configure RX queues: %d\n",
1345 ret);
1346 goto error;
1347 }
1348 }
1349
1350 if (iwl_mvm_has_new_rx_api(mvm)) {
43413a97
SS
1351 ret = iwl_send_rss_cfg_cmd(mvm);
1352 if (ret) {
1353 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1354 ret);
1355 goto error;
1356 }
1357 }
1358
8ca151b5 1359 /* init the fw <-> mac80211 STA mapping */
0ae98812 1360 for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
8ca151b5
JB
1361 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1362
0ae98812 1363 mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1d3c3f63 1364
b2b7875b
JB
1365 /* reset quota debouncing buffer - 0xff will yield invalid data */
1366 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1367
79660869
IL
1368 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
1369 ret = iwl_mvm_send_dqa_cmd(mvm);
1370 if (ret)
1371 goto error;
1372 }
97d5be7e 1373
8ca151b5
JB
1374 /* Add auxiliary station for scanning */
1375 ret = iwl_mvm_add_aux_sta(mvm);
1376 if (ret)
1377 goto error;
1378
53a9d61e 1379 /* Add all the PHY contexts */
dd36a507
TM
1380 i = 0;
1381 while (!sband && i < NUM_NL80211_BANDS)
1382 sband = mvm->hw->wiphy->bands[i++];
1383
1384 if (WARN_ON_ONCE(!sband))
1385 goto error;
1386
1387 chan = &sband->channels[0];
1388
53a9d61e
IP
1389 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1390 for (i = 0; i < NUM_PHY_CTX; i++) {
1391 /*
1392 * The channel used here isn't relevant as it's
1393 * going to be overwritten in the other flows.
1394 * For now use the first channel we have.
1395 */
1396 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1397 &chandef, 1, 1);
1398 if (ret)
1399 goto error;
1400 }
8ca151b5 1401
c221daf2
CRI
1402 if (iwl_mvm_is_tt_in_fw(mvm)) {
1403 /* in order to give the responsibility of ct-kill and
1404 * TX backoff to FW we need to send empty temperature reporting
1405 * cmd during init time
1406 */
1407 iwl_mvm_send_temp_report_ths_cmd(mvm);
1408 } else {
1409 /* Initialize tx backoffs to the minimal possible */
1410 iwl_mvm_tt_tx_backoff(mvm, 0);
1411 }
5c89e7bc 1412
242d9c8b 1413#ifdef CONFIG_THERMAL
5c89e7bc 1414 /* TODO: read the budget from BIOS / Platform NVM */
944eafc2
CRI
1415
1416 /*
1417 * In case there is no budget from BIOS / Platform NVM the default
1418 * budget should be 2000mW (cooling state 0).
1419 */
1420 if (iwl_mvm_is_ctdp_supported(mvm)) {
5c89e7bc
CRI
1421 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1422 mvm->cooling_dev.cur_state);
75cfe338
LC
1423 if (ret)
1424 goto error;
1425 }
c221daf2 1426#endif
0c0e2c71 1427
aa43ae12
AM
1428 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1429 WARN_ON(iwl_mvm_config_ltr(mvm));
9180ac50 1430
c1cb92fc 1431 ret = iwl_mvm_power_update_device(mvm);
64b928c4
AB
1432 if (ret)
1433 goto error;
1434
35af15d1
AN
1435 /*
1436 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1437 * anyway, so don't init MCC.
1438 */
1439 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1440 ret = iwl_mvm_init_mcc(mvm);
1441 if (ret)
1442 goto error;
1443 }
90d4f7db 1444
859d914c 1445 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
4ca87a5f 1446 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
b66b5817 1447 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
d2496221
DS
1448 ret = iwl_mvm_config_scan(mvm);
1449 if (ret)
1450 goto error;
1451 }
1452
f130bb75
MG
1453 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1454 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1455
48e775e6
HD
1456 if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid))
1457 IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n");
1458
6ce1e5c0
GA
1459 ret = iwl_mvm_ppag_init(mvm);
1460 if (ret)
1461 goto error;
1462
da2830ac 1463 ret = iwl_mvm_sar_init(mvm);
5d041c46
LC
1464 if (ret == 0) {
1465 ret = iwl_mvm_sar_geo_init(mvm);
1466 } else if (ret > 0 && !iwl_mvm_sar_get_wgds_table(mvm)) {
1467 /*
1468 * If basic SAR is not available, we check for WGDS,
1469 * which should *not* be available either. If it is
1470 * available, issue an error, because we can't use SAR
1471 * Geo without basic SAR.
1472 */
1473 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
1474 }
da2830ac 1475
5d041c46 1476 if (ret < 0)
a6bff3cb
HD
1477 goto error;
1478
7089ae63
JB
1479 iwl_mvm_leds_sync(mvm);
1480
53a9d61e 1481 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
8ca151b5
JB
1482 return 0;
1483 error:
f4744258 1484 if (!iwlmvm_mod_params.init_dbg || !ret)
de8ba41b 1485 iwl_mvm_stop_device(mvm);
8ca151b5
JB
1486 return ret;
1487}
1488
1489int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1490{
1491 int ret, i;
1492
1493 lockdep_assert_held(&mvm->mutex);
1494
1495 ret = iwl_trans_start_hw(mvm->trans);
1496 if (ret)
1497 return ret;
1498
1499 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1500 if (ret) {
1501 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1502 goto error;
1503 }
1504
a0544272 1505 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
8ca151b5
JB
1506 if (ret)
1507 goto error;
1508
1509 /* Send phy db control command and then phy db calibration*/
1510 ret = iwl_send_phy_db_data(mvm->phy_db);
1511 if (ret)
1512 goto error;
1513
1514 ret = iwl_send_phy_cfg_cmd(mvm);
1515 if (ret)
1516 goto error;
1517
1518 /* init the fw <-> mac80211 STA mapping */
0ae98812 1519 for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
8ca151b5
JB
1520 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1521
1522 /* Add auxiliary station for scanning */
1523 ret = iwl_mvm_add_aux_sta(mvm);
1524 if (ret)
1525 goto error;
1526
1527 return 0;
1528 error:
fcb6b92a 1529 iwl_mvm_stop_device(mvm);
8ca151b5
JB
1530 return ret;
1531}
1532
0416841d
JB
1533void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1534 struct iwl_rx_cmd_buffer *rxb)
8ca151b5
JB
1535{
1536 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1537 struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1538 u32 flags = le32_to_cpu(card_state_notif->flags);
1539
1540 IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1541 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1542 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1543 (flags & CT_KILL_CARD_DISABLED) ?
1544 "Reached" : "Not reached");
8ca151b5
JB
1545}
1546
0416841d
JB
1547void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1548 struct iwl_rx_cmd_buffer *rxb)
30269c12
CRI
1549{
1550 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1551 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1552
0c8d0a47
GBA
1553 IWL_DEBUG_INFO(mvm,
1554 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1555 le32_to_cpu(mfuart_notif->installed_ver),
1556 le32_to_cpu(mfuart_notif->external_ver),
1557 le32_to_cpu(mfuart_notif->status),
1558 le32_to_cpu(mfuart_notif->duration));
1559
19f63c53
GBA
1560 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
1561 IWL_DEBUG_INFO(mvm,
0c8d0a47 1562 "MFUART: image size: 0x%08x\n",
19f63c53 1563 le32_to_cpu(mfuart_notif->image_size));
30269c12 1564}