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iwlwifi: fix module init error paths
[linux-2.6-block.git] / drivers / net / wireless / intel / iwlwifi / fw / file.h
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edf38334
DF		 1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
96c285da 9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
fd527eb5 10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
132db31c 11 * Copyright(c) 2018 Intel Corporation
ff418fee 12 * Copyright(c) 2019 Intel Corporation
edf38334
DF		 13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of version 2 of the GNU General Public License as
16 * published by the Free Software Foundation.
17 *
18 * This program is distributed in the hope that it will be useful, but
19 * WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 * General Public License for more details.
22 *
edf38334 23 * The full GNU General Public License is included in this distribution
410dc5aa 24 * in the file called COPYING.
edf38334
DF		 25 *
26 * Contact Information:
cb2f8277 27 * Intel Linux Wireless <linuxwifi@intel.com>
edf38334
DF		 28 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
29 *
30 * BSD LICENSE
31 *
51368bf7 32 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
96c285da 33 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
fd527eb5 34 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
132db31c 35 * Copyright(c) 2018 Intel Corporation
ff418fee 36 * Copyright(c) 2019 Intel Corporation
edf38334
DF		 37 * All rights reserved.
38 *
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
41 * are met:
42 *
43 * * Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * * Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in
47 * the documentation and/or other materials provided with the
48 * distribution.
49 * * Neither the name Intel Corporation nor the names of its
50 * contributors may be used to endorse or promote products derived
51 * from this software without specific prior written permission.
52 *
53 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
54 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
55 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
56 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
57 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
58 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
59 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
60 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
61 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
63 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
64 *****************************************************************************/
65
3995deaf
JB		 66#ifndef __iwl_fw_file_h__
67#define __iwl_fw_file_h__
edf38334 68
b1c23d9e 69#include <linux/netdevice.h>
d2709ad7 70#include <linux/nl80211.h>
b1c23d9e 71
edf38334
DF		 72/* v1/v2 uCode file layout */
73struct iwl_ucode_header {
74 __le32 ver; /* major/minor/API/serial */
75 union {
76 struct {
77 __le32 inst_size; /* bytes of runtime code */
78 __le32 data_size; /* bytes of runtime data */
79 __le32 init_size; /* bytes of init code */
80 __le32 init_data_size; /* bytes of init data */
81 __le32 boot_size; /* bytes of bootstrap code */
82 u8 data[0]; /* in same order as sizes */
83 } v1;
84 struct {
85 __le32 build; /* build number */
86 __le32 inst_size; /* bytes of runtime code */
87 __le32 data_size; /* bytes of runtime data */
88 __le32 init_size; /* bytes of init code */
89 __le32 init_data_size; /* bytes of init data */
90 __le32 boot_size; /* bytes of bootstrap code */
91 u8 data[0]; /* in same order as sizes */
92 } v2;
93 } u;
94};
95
b35f6397 96#define IWL_UCODE_INI_TLV_GROUP 0x1000000
f14cda6f 97
edf38334
DF		 98/*
99 * new TLV uCode file layout
100 *
101 * The new TLV file format contains TLVs, that each specify
0479c19d 102 * some piece of data.
edf38334
DF		 103 */
104
105enum iwl_ucode_tlv_type {
106 IWL_UCODE_TLV_INVALID = 0, /* unused */
107 IWL_UCODE_TLV_INST = 1,
108 IWL_UCODE_TLV_DATA = 2,
109 IWL_UCODE_TLV_INIT = 3,
110 IWL_UCODE_TLV_INIT_DATA = 4,
111 IWL_UCODE_TLV_BOOT = 5,
112 IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */
113 IWL_UCODE_TLV_PAN = 7,
114 IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8,
115 IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9,
116 IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10,
117 IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11,
118 IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12,
119 IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13,
120 IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14,
121 IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
122 IWL_UCODE_TLV_WOWLAN_INST = 16,
123 IWL_UCODE_TLV_WOWLAN_DATA = 17,
124 IWL_UCODE_TLV_FLAGS = 18,
ed8c8365
DS		 125 IWL_UCODE_TLV_SEC_RT = 19,
126 IWL_UCODE_TLV_SEC_INIT = 20,
127 IWL_UCODE_TLV_SEC_WOWLAN = 21,
128 IWL_UCODE_TLV_DEF_CALIB = 22,
129 IWL_UCODE_TLV_PHY_SKU = 23,
e2d6f4e7
EH		 130 IWL_UCODE_TLV_SECURE_SEC_RT = 24,
131 IWL_UCODE_TLV_SECURE_SEC_INIT = 25,
132 IWL_UCODE_TLV_SECURE_SEC_WOWLAN = 26,
133 IWL_UCODE_TLV_NUM_OF_CPU = 27,
e36e5433 134 IWL_UCODE_TLV_CSCHEME = 28,
a2978b11
EH		 135 IWL_UCODE_TLV_API_CHANGES_SET = 29,
136 IWL_UCODE_TLV_ENABLED_CAPABILITIES = 30,
762533ba 137 IWL_UCODE_TLV_N_SCAN_CHANNELS = 31,
a6c4fb44 138 IWL_UCODE_TLV_PAGING = 32,
61df750c 139 IWL_UCODE_TLV_SEC_RT_USNIFFER = 34,
fb7eba71 140 /* 35 is unused */
7e1223b5 141 IWL_UCODE_TLV_FW_VERSION = 36,
490fefeb
LK		 142 IWL_UCODE_TLV_FW_DBG_DEST = 38,
143 IWL_UCODE_TLV_FW_DBG_CONF = 39,
d2709ad7 144 IWL_UCODE_TLV_FW_DBG_TRIGGER = 40,
b081e23c 145 IWL_UCODE_TLV_CMD_VERSIONS = 48,
17564dde 146 IWL_UCODE_TLV_FW_GSCAN_CAPA = 50,
a6017b90 147 IWL_UCODE_TLV_FW_MEM_SEG = 51,
132db31c 148 IWL_UCODE_TLV_IML = 52,
22463857
SM		 149 IWL_UCODE_TLV_UMAC_DEBUG_ADDRS = 54,
150 IWL_UCODE_TLV_LMAC_DEBUG_ADDRS = 55,
f130bb75 151 IWL_UCODE_TLV_FW_RECOVERY_INFO = 57,
6ffe0acc 152 IWL_UCODE_TLV_FW_FSEQ_VERSION = 60,
b35f6397 153
57d88b11
SM		 154 IWL_UCODE_TLV_DEBUG_BASE = IWL_UCODE_INI_TLV_GROUP,
155 IWL_UCODE_TLV_TYPE_DEBUG_INFO = IWL_UCODE_TLV_DEBUG_BASE + 0,
156 IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION = IWL_UCODE_TLV_DEBUG_BASE + 1,
157 IWL_UCODE_TLV_TYPE_HCMD = IWL_UCODE_TLV_DEBUG_BASE + 2,
158 IWL_UCODE_TLV_TYPE_REGIONS = IWL_UCODE_TLV_DEBUG_BASE + 3,
159 IWL_UCODE_TLV_TYPE_TRIGGERS = IWL_UCODE_TLV_DEBUG_BASE + 4,
160 IWL_UCODE_TLV_TYPE_DEBUG_FLOW = IWL_UCODE_TLV_DEBUG_BASE + 5,
b35f6397 161 IWL_UCODE_TLV_DEBUG_MAX = IWL_UCODE_TLV_TYPE_DEBUG_FLOW,
520f03ea
SM		 162
163 /* TLVs 0x1000-0x2000 are for internal driver usage */
164 IWL_UCODE_TLV_FW_DBG_DUMP_LST = 0x1000,
edf38334
DF		 165};
166
edf38334 167struct iwl_ucode_tlv {
0479c19d 168 __le32 type; /* see above */
edf38334
DF		 169 __le32 length; /* not including type/length fields */
170 u8 data[0];
171};
172
06ddbf5a
EG		 173#define IWL_TLV_UCODE_MAGIC 0x0a4c5749
174#define FW_VER_HUMAN_READABLE_SZ 64
edf38334
DF		 175
176struct iwl_tlv_ucode_header {
177 /*
178 * The TLV style ucode header is distinguished from
179 * the v1/v2 style header by first four bytes being
180 * zero, as such is an invalid combination of
181 * major/minor/API/serial versions.
182 */
183 __le32 zero;
184 __le32 magic;
06ddbf5a 185 u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
7e1223b5
EG		 186 /* major/minor/API/serial or major in new format */
187 __le32 ver;
edf38334 188 __le32 build;
0479c19d 189 __le64 ignore;
edf38334
DF		 190 /*
191 * The data contained herein has a TLV layout,
192 * see above for the TLV header and types.
193 * Note that each TLV is padded to a length
194 * that is a multiple of 4 for alignment.
195 */
196 u8 data[0];
197};
198
a2978b11
EH		 199/*
200 * ucode TLVs
201 *
202 * ability to get extension for: flags & capabilities from ucode binaries files
203 */
204struct iwl_ucode_api {
205 __le32 api_index;
206 __le32 api_flags;
207} __packed;
208
209struct iwl_ucode_capa {
210 __le32 api_index;
211 __le32 api_capa;
212} __packed;
213
a52703b2
JB		 214/**
215 * enum iwl_ucode_tlv_flag - ucode API flags
216 * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously
217 * was a separate TLV but moved here to save space.
0d365ae5 218 * @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behavior on hidden SSID,
a52703b2
JB		 219 * treats good CRC threshold as a boolean
220 * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w).
a52703b2
JB		 221 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: This uCode image supports uAPSD
222 * @IWL_UCODE_TLV_FLAGS_SHORT_BL: 16 entries of black list instead of 64 in scan
223 * offload profile config command.
224 * @IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS: D3 image supports up to six
225 * (rather than two) IPv6 addresses
226 * @IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID: not sending a probe with the SSID element
227 * from the probe request template.
228 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL: new NS offload (small version)
229 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version)
a52703b2
JB		 230 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD
231 * @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save
232 * @IWL_UCODE_TLV_FLAGS_BCAST_FILTERING: uCode supports broadcast filtering.
a52703b2
JB		 233 * @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS.
234 */
235enum iwl_ucode_tlv_flag {
236 IWL_UCODE_TLV_FLAGS_PAN = BIT(0),
237 IWL_UCODE_TLV_FLAGS_NEWSCAN = BIT(1),
238 IWL_UCODE_TLV_FLAGS_MFP = BIT(2),
a52703b2
JB		 239 IWL_UCODE_TLV_FLAGS_SHORT_BL = BIT(7),
240 IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS = BIT(10),
241 IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID = BIT(12),
242 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL = BIT(15),
243 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE = BIT(16),
a52703b2
JB		 244 IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT = BIT(24),
245 IWL_UCODE_TLV_FLAGS_EBS_SUPPORT = BIT(25),
246 IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD = BIT(26),
247 IWL_UCODE_TLV_FLAGS_BCAST_FILTERING = BIT(29),
a52703b2
JB		 248};
249
9efeccac 250typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
859d914c 251
a52703b2
JB		 252/**
253 * enum iwl_ucode_tlv_api - ucode api
a52703b2
JB		 254 * @IWL_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time
255 * longer than the passive one, which is essential for fragmented scan.
8ba2d7a1 256 * @IWL_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source.
c5d679a5 257 * @IWL_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params
f0d8f38c 258 * @IWL_UCODE_TLV_API_NEW_VERSION: new versioning format
aacf8f18
AS		 259 * @IWL_UCODE_TLV_API_SCAN_TSF_REPORT: Scan start time reported in scan
260 * iteration complete notification, and the timestamp reported for RX
261 * received during scan, are reported in TSF of the mac specified in the
262 * scan request.
45c458b4
SS		 263 * @IWL_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of
264 * ADD_MODIFY_STA_KEY_API_S_VER_2.
ced19f26 265 * @IWL_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement.
1247070d 266 * @IWL_UCODE_TLV_API_NAN2_VER2: This ucode supports NAN API version 2
678d9b6d 267 * @IWL_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used
72cbb73e
DS		 268 * @IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY: Quota command includes a field
269 * indicating low latency direction.
57df3839
SS		 270 * @IWL_UCODE_TLV_API_DEPRECATE_TTAK: RX status flag TTAK ok (bit 7) is
271 * deprecated.
66fa2424
AB		 272 * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2: This ucode supports version 8
273 * of scan request: SCAN_REQUEST_CMD_UMAC_API_S_VER_8
4c2f445c 274 * @IWL_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS
0791c2fc
HD		 275 * @IWL_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of
276 * the REDUCE_TX_POWER_CMD.
15e28c78
EG		 277 * @IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF: This ucode supports the short
278 * version of the beacon notification.
537ea3bb
AG		 279 * @IWL_UCODE_TLV_API_BEACON_FILTER_V4: This ucode supports v4 of
280 * BEACON_FILTER_CONFIG_API_S_VER_4.
2785ce00
ST		 281 * @IWL_UCODE_TLV_API_REGULATORY_NVM_INFO: This ucode supports v4 of
282 * REGULATORY_NVM_GET_INFO_RSP_API_S.
ff418fee
AS		 283 * @IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ: This ucode supports v7 of
284 * LOCATION_RANGE_REQ_CMD_API_S and v6 of LOCATION_RANGE_RESP_NTFY_API_S.
e4fe5d4b
IP		 285 * @IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS: This ucode supports v2 of
286 * SCAN_OFFLOAD_PROFILE_MATCH_RESULTS_S and v3 of
287 * SCAN_OFFLOAD_PROFILES_QUERY_RSP_S.
d14ae796
SS		 288 * @IWL_UCODE_TLV_API_MBSSID_HE: This ucode supports v2 of
289 * STA_CONTEXT_DOT11AX_API_S
d3f555f4
JB		 290 *
291 * @NUM_IWL_UCODE_TLV_API: number of bits used
a52703b2
JB		 292 */
293enum iwl_ucode_tlv_api {
678d9b6d 294 /* API Set 0 */
859d914c
JB		 295 IWL_UCODE_TLV_API_FRAGMENTED_SCAN = (__force iwl_ucode_tlv_api_t)8,
296 IWL_UCODE_TLV_API_WIFI_MCC_UPDATE = (__force iwl_ucode_tlv_api_t)9,
859d914c 297 IWL_UCODE_TLV_API_LQ_SS_PARAMS = (__force iwl_ucode_tlv_api_t)18,
4b87e5af 298 IWL_UCODE_TLV_API_NEW_VERSION = (__force iwl_ucode_tlv_api_t)20,
aacf8f18 299 IWL_UCODE_TLV_API_SCAN_TSF_REPORT = (__force iwl_ucode_tlv_api_t)28,
45c458b4 300 IWL_UCODE_TLV_API_TKIP_MIC_KEYS = (__force iwl_ucode_tlv_api_t)29,
ced19f26 301 IWL_UCODE_TLV_API_STA_TYPE = (__force iwl_ucode_tlv_api_t)30,
1247070d 302 IWL_UCODE_TLV_API_NAN2_VER2 = (__force iwl_ucode_tlv_api_t)31,
678d9b6d 303 /* API Set 1 */
dac4df1c 304 IWL_UCODE_TLV_API_ADAPTIVE_DWELL = (__force iwl_ucode_tlv_api_t)32,
8f691af9 305 IWL_UCODE_TLV_API_OCE = (__force iwl_ucode_tlv_api_t)33,
6ca33f8b 306 IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE = (__force iwl_ucode_tlv_api_t)34,
678d9b6d 307 IWL_UCODE_TLV_API_NEW_RX_STATS = (__force iwl_ucode_tlv_api_t)35,
2afa6a73 308 IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL = (__force iwl_ucode_tlv_api_t)36,
72cbb73e 309 IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY = (__force iwl_ucode_tlv_api_t)38,
57df3839 310 IWL_UCODE_TLV_API_DEPRECATE_TTAK = (__force iwl_ucode_tlv_api_t)41,
66fa2424 311 IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2 = (__force iwl_ucode_tlv_api_t)42,
4c2f445c 312 IWL_UCODE_TLV_API_FRAG_EBS = (__force iwl_ucode_tlv_api_t)44,
0791c2fc 313 IWL_UCODE_TLV_API_REDUCE_TX_POWER = (__force iwl_ucode_tlv_api_t)45,
15e28c78 314 IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF = (__force iwl_ucode_tlv_api_t)46,
537ea3bb 315 IWL_UCODE_TLV_API_BEACON_FILTER_V4 = (__force iwl_ucode_tlv_api_t)47,
2785ce00 316 IWL_UCODE_TLV_API_REGULATORY_NVM_INFO = (__force iwl_ucode_tlv_api_t)48,
ff418fee 317 IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ = (__force iwl_ucode_tlv_api_t)49,
e4fe5d4b 318 IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS = (__force iwl_ucode_tlv_api_t)50,
d14ae796 319 IWL_UCODE_TLV_API_MBSSID_HE = (__force iwl_ucode_tlv_api_t)52,
0c546fb6 320 IWL_UCODE_TLV_API_WOWLAN_TCP_SYN_WAKE = (__force iwl_ucode_tlv_api_t)53,
957a67c8 321 IWL_UCODE_TLV_API_FTM_RTT_ACCURACY = (__force iwl_ucode_tlv_api_t)54,
3e832fd1 322 IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP = (__force iwl_ucode_tlv_api_t)57,
d3f555f4
JB		 323
324 NUM_IWL_UCODE_TLV_API
325#ifdef __CHECKER__
326 /* sparse says it cannot increment the previous enum member */
327 = 128
328#endif
a52703b2
JB		 329};
330
9efeccac 331typedef unsigned int __bitwise iwl_ucode_tlv_capa_t;
859d914c 332
a52703b2
JB		 333/**
334 * enum iwl_ucode_tlv_capa - ucode capabilities
335 * @IWL_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3
336 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT: supports Location Aware Regulatory
337 * @IWL_UCODE_TLV_CAPA_UMAC_SCAN: supports UMAC scan.
3d44eebf 338 * @IWL_UCODE_TLV_CAPA_BEAMFORMER: supports Beamformer
a52703b2
JB		 339 * @IWL_UCODE_TLV_CAPA_TDLS_SUPPORT: support basic TDLS functionality
340 * @IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT: supports insertion of current
341 * tx power value into TPC Report action frame and Link Measurement Report
342 * action frame
343 * @IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT: supports updating current
344 * channel in DS parameter set element in probe requests.
345 * @IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT: supports adding TPC Report IE in
346 * probe requests.
347 * @IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT: supports Quiet Period requests
348 * @IWL_UCODE_TLV_CAPA_DQA_SUPPORT: supports dynamic queue allocation (DQA),
349 * which also implies support for the scheduler configuration command
350 * @IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching
23ae6128 351 * @IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image
a52703b2 352 * @IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command
0becb377 353 * @IWL_UCODE_TLV_CAPA_DC2DC_SUPPORT: supports DC2DC Command
93190fb0 354 * @IWL_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload
91a8bcde 355 * @IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics
c5241b0c
AS		 356 * @IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD: supports U-APSD on p2p interface when it
357 * is standalone or with a BSS station interface in the same binding.
0522588d 358 * @IWL_UCODE_TLV_CAPA_BT_COEX_PLCR: enabled BT Coex packet level co-running
4d165d12
AN		 359 * @IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different
360 * sources for the MCC. This TLV bit is a future replacement to
361 * IWL_UCODE_TLV_API_WIFI_MCC_UPDATE. When either is set, multi-source LAR
362 * is supported.
70e90992 363 * @IWL_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC
266ab689 364 * @IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan (no longer used)
65e25482 365 * @IWL_UCODE_TLV_CAPA_STA_PM_NOTIF: firmware will send STA PM notification
ecaf71de 366 * @IWL_UCODE_TLV_CAPA_TLC_OFFLOAD: firmware implements rate scaling algorithm
dad3340f 367 * @IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA: firmware implements quota related
50f067b3 368 * @IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2: firmware implements Coex Schema 2
74a10252 369 * IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD: firmware supports CSA command
57e861d9
DS		 370 * @IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS: firmware supports ultra high band
371 * (6 GHz).
c37763d2 372 * @IWL_UCODE_TLV_CAPA_CS_MODIFY: firmware supports modify action CSA command
78efc702 373 * @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement
b08dbed7 374 * @IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts
e7c2e1fd 375 * @IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT: supports bt-coex Multi-priority LUT
d3a108a4
AO		 376 * @IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD: the firmware supports CSA
377 * countdown offloading. Beacon notifications are not sent to the host.
378 * The fw also offloads TBTT alignment.
1e3c3c35
EG		 379 * @IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION: firmware will decide on what
380 * antenna the beacon should be transmitted
0db056d3
SS		 381 * @IWL_UCODE_TLV_CAPA_BEACON_STORING: firmware will store the latest beacon
382 * from AP and will send it upon d0i3 exit.
47fe2f8e 383 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3: support LAR API V3
0a3b7119
CRI		 384 * @IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW: firmware responsible for CT-kill
385 * @IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT: supports temperature
386 * thresholds reporting
5c89e7bc 387 * @IWL_UCODE_TLV_CAPA_CTDP_SUPPORT: supports cTDP command
3d2d4422
GBA		 388 * @IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED: supports usniffer enabled in
389 * regular image.
5b086414
GBA		 390 * @IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG: support getting more shared
391 * memory addresses from the firmware.
03098268 392 * @IWL_UCODE_TLV_CAPA_LQM_SUPPORT: supports Link Quality Measurement
55bfa4b9
LC		 393 * @IWL_UCODE_TLV_CAPA_TX_POWER_ACK: reduced TX power API has larger
394 * command size (command version 4) that supports toggling ACK TX
395 * power reduction.
2d8c2615 396 * @IWL_UCODE_TLV_CAPA_D3_DEBUG: supports debug recording during D3
47fe2f8e
HD		 397 * @IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT: MCC response support 11ax
398 * capability.
5213e8a8
JB		 399 * @IWL_UCODE_TLV_CAPA_CSI_REPORTING: firmware is capable of being configured
400 * to report the CSI information with (certain) RX frames
b73f9a4a
JB		 401 * @IWL_UCODE_TLV_CAPA_FTM_CALIBRATED: has FTM calibrated and thus supports both
402 * initiator and responder
5213e8a8
JB		 403 *
404 * @IWL_UCODE_TLV_CAPA_MLME_OFFLOAD: supports MLME offload
d3f555f4
JB		 405 *
406 * @NUM_IWL_UCODE_TLV_CAPA: number of bits used
a52703b2
JB		 407 */
408enum iwl_ucode_tlv_capa {
b73f9a4a 409 /* set 0 */
859d914c
JB		 410 IWL_UCODE_TLV_CAPA_D0I3_SUPPORT = (__force iwl_ucode_tlv_capa_t)0,
411 IWL_UCODE_TLV_CAPA_LAR_SUPPORT = (__force iwl_ucode_tlv_capa_t)1,
412 IWL_UCODE_TLV_CAPA_UMAC_SCAN = (__force iwl_ucode_tlv_capa_t)2,
413 IWL_UCODE_TLV_CAPA_BEAMFORMER = (__force iwl_ucode_tlv_capa_t)3,
414 IWL_UCODE_TLV_CAPA_TDLS_SUPPORT = (__force iwl_ucode_tlv_capa_t)6,
415 IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT = (__force iwl_ucode_tlv_capa_t)8,
416 IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)9,
417 IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)10,
418 IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT = (__force iwl_ucode_tlv_capa_t)11,
419 IWL_UCODE_TLV_CAPA_DQA_SUPPORT = (__force iwl_ucode_tlv_capa_t)12,
420 IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH = (__force iwl_ucode_tlv_capa_t)13,
23ae6128 421 IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG = (__force iwl_ucode_tlv_capa_t)17,
859d914c 422 IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT = (__force iwl_ucode_tlv_capa_t)18,
0becb377 423 IWL_UCODE_TLV_CAPA_DC2DC_CONFIG_SUPPORT = (__force iwl_ucode_tlv_capa_t)19,
93190fb0 424 IWL_UCODE_TLV_CAPA_CSUM_SUPPORT = (__force iwl_ucode_tlv_capa_t)21,
859d914c 425 IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS = (__force iwl_ucode_tlv_capa_t)22,
c5241b0c 426 IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD = (__force iwl_ucode_tlv_capa_t)26,
859d914c
JB		 427 IWL_UCODE_TLV_CAPA_BT_COEX_PLCR = (__force iwl_ucode_tlv_capa_t)28,
428 IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC = (__force iwl_ucode_tlv_capa_t)29,
429 IWL_UCODE_TLV_CAPA_BT_COEX_RRC = (__force iwl_ucode_tlv_capa_t)30,
17564dde 430 IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)31,
b73f9a4a
JB		 431
432 /* set 1 */
65e25482 433 IWL_UCODE_TLV_CAPA_STA_PM_NOTIF = (__force iwl_ucode_tlv_capa_t)38,
9415af7f
SS		 434 IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)39,
435 IWL_UCODE_TLV_CAPA_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)40,
fcea37b2 436 IWL_UCODE_TLV_CAPA_D0I3_END_FIRST = (__force iwl_ucode_tlv_capa_t)41,
ecaf71de 437 IWL_UCODE_TLV_CAPA_TLC_OFFLOAD = (__force iwl_ucode_tlv_capa_t)43,
dad3340f 438 IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA = (__force iwl_ucode_tlv_capa_t)44,
50f067b3 439 IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2 = (__force iwl_ucode_tlv_capa_t)45,
74a10252 440 IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD = (__force iwl_ucode_tlv_capa_t)46,
57e861d9 441 IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS = (__force iwl_ucode_tlv_capa_t)48,
b73f9a4a 442 IWL_UCODE_TLV_CAPA_FTM_CALIBRATED = (__force iwl_ucode_tlv_capa_t)47,
c37763d2 443 IWL_UCODE_TLV_CAPA_CS_MODIFY = (__force iwl_ucode_tlv_capa_t)49,
b73f9a4a
JB		 444
445 /* set 2 */
78efc702 446 IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE = (__force iwl_ucode_tlv_capa_t)64,
b08dbed7 447 IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS = (__force iwl_ucode_tlv_capa_t)65,
e7c2e1fd 448 IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT = (__force iwl_ucode_tlv_capa_t)67,
81f02ba3 449 IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT = (__force iwl_ucode_tlv_capa_t)68,
d3a108a4 450 IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD = (__force iwl_ucode_tlv_capa_t)70,
1e3c3c35 451 IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION = (__force iwl_ucode_tlv_capa_t)71,
0db056d3 452 IWL_UCODE_TLV_CAPA_BEACON_STORING = (__force iwl_ucode_tlv_capa_t)72,
47fe2f8e 453 IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3 = (__force iwl_ucode_tlv_capa_t)73,
0a3b7119
CRI		 454 IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW = (__force iwl_ucode_tlv_capa_t)74,
455 IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT = (__force iwl_ucode_tlv_capa_t)75,
5c89e7bc 456 IWL_UCODE_TLV_CAPA_CTDP_SUPPORT = (__force iwl_ucode_tlv_capa_t)76,
3d2d4422 457 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED = (__force iwl_ucode_tlv_capa_t)77,
5b086414 458 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG = (__force iwl_ucode_tlv_capa_t)80,
03098268 459 IWL_UCODE_TLV_CAPA_LQM_SUPPORT = (__force iwl_ucode_tlv_capa_t)81,
55bfa4b9 460 IWL_UCODE_TLV_CAPA_TX_POWER_ACK = (__force iwl_ucode_tlv_capa_t)84,
2d8c2615 461 IWL_UCODE_TLV_CAPA_D3_DEBUG = (__force iwl_ucode_tlv_capa_t)87,
4ef66965 462 IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT = (__force iwl_ucode_tlv_capa_t)88,
47fe2f8e 463 IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT = (__force iwl_ucode_tlv_capa_t)89,
5213e8a8
JB		 464 IWL_UCODE_TLV_CAPA_CSI_REPORTING = (__force iwl_ucode_tlv_capa_t)90,
465
b73f9a4a 466 /* set 3 */
58877d74 467 IWL_UCODE_TLV_CAPA_MLME_OFFLOAD = (__force iwl_ucode_tlv_capa_t)96,
d3f555f4
JB		 468
469 NUM_IWL_UCODE_TLV_CAPA
470#ifdef __CHECKER__
471 /* sparse says it cannot increment the previous enum member */
472 = 128
473#endif
a52703b2
JB		 474};
475
476/* The default calibrate table size if not specified by firmware file */
477#define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18
478#define IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE 19
479#define IWL_MAX_PHY_CALIBRATE_TBL_SIZE 253
480
481/* The default max probe length if not specified by the firmware file */
482#define IWL_DEFAULT_MAX_PROBE_LENGTH 200
483
484/*
485 * For 16.0 uCode and above, there is no differentiation between sections,
486 * just an offset to the HW address.
487 */
a52703b2 488#define CPU1_CPU2_SEPARATOR_SECTION 0xFFFFCCCC
a6c4fb44 489#define PAGING_SEPARATOR_SECTION 0xAAAABBBB
a52703b2
JB		 490
491/* uCode version contains 4 values: Major/Minor/API/Serial */
492#define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24)
493#define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16)
494#define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8)
495#define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF)
496
31a658b2
JB		 497/**
498 * struct iwl_tlv_calib_ctrl - Calibration control struct.
a52703b2
JB		 499 * Sent as part of the phy configuration command.
500 * @flow_trigger: bitmap for which calibrations to perform according to
501 * flow triggers.
502 * @event_trigger: bitmap for which calibrations to perform according to
503 * event triggers.
504 */
505struct iwl_tlv_calib_ctrl {
506 __le32 flow_trigger;
507 __le32 event_trigger;
508} __packed;
509
510enum iwl_fw_phy_cfg {
511 FW_PHY_CFG_RADIO_TYPE_POS = 0,
512 FW_PHY_CFG_RADIO_TYPE = 0x3 << FW_PHY_CFG_RADIO_TYPE_POS,
513 FW_PHY_CFG_RADIO_STEP_POS = 2,
514 FW_PHY_CFG_RADIO_STEP = 0x3 << FW_PHY_CFG_RADIO_STEP_POS,
515 FW_PHY_CFG_RADIO_DASH_POS = 4,
516 FW_PHY_CFG_RADIO_DASH = 0x3 << FW_PHY_CFG_RADIO_DASH_POS,
517 FW_PHY_CFG_TX_CHAIN_POS = 16,
518 FW_PHY_CFG_TX_CHAIN = 0xf << FW_PHY_CFG_TX_CHAIN_POS,
519 FW_PHY_CFG_RX_CHAIN_POS = 20,
520 FW_PHY_CFG_RX_CHAIN = 0xf << FW_PHY_CFG_RX_CHAIN_POS,
86a2b204 521 FW_PHY_CFG_SHARED_CLK = BIT(31),
a52703b2
JB		 522};
523
524#define IWL_UCODE_MAX_CS 1
525
526/**
527 * struct iwl_fw_cipher_scheme - a cipher scheme supported by FW.
528 * @cipher: a cipher suite selector
529 * @flags: cipher scheme flags (currently reserved for a future use)
530 * @hdr_len: a size of MPDU security header
531 * @pn_len: a size of PN
532 * @pn_off: an offset of pn from the beginning of the security header
533 * @key_idx_off: an offset of key index byte in the security header
534 * @key_idx_mask: a bit mask of key_idx bits
535 * @key_idx_shift: bit shift needed to get key_idx
536 * @mic_len: mic length in bytes
537 * @hw_cipher: a HW cipher index used in host commands
538 */
539struct iwl_fw_cipher_scheme {
540 __le32 cipher;
541 u8 flags;
542 u8 hdr_len;
543 u8 pn_len;
544 u8 pn_off;
545 u8 key_idx_off;
546 u8 key_idx_mask;
547 u8 key_idx_shift;
548 u8 mic_len;
549 u8 hw_cipher;
550} __packed;
551
490fefeb
LK		 552enum iwl_fw_dbg_reg_operator {
553 CSR_ASSIGN,
554 CSR_SETBIT,
555 CSR_CLEARBIT,
556
557 PRPH_ASSIGN,
558 PRPH_SETBIT,
559 PRPH_CLEARBIT,
869f3b15
HD		 560
561 INDIRECT_ASSIGN,
562 INDIRECT_SETBIT,
563 INDIRECT_CLEARBIT,
564
565 PRPH_BLOCKBIT,
490fefeb
LK		 566};
567
568/**
569 * struct iwl_fw_dbg_reg_op - an operation on a register
570 *
69d22e73 571 * @op: &enum iwl_fw_dbg_reg_operator
490fefeb
LK		 572 * @addr: offset of the register
573 * @val: value
574 */
575struct iwl_fw_dbg_reg_op {
576 u8 op;
577 u8 reserved[3];
578 __le32 addr;
579 __le32 val;
580} __packed;
581
582/**
583 * enum iwl_fw_dbg_monitor_mode - available monitor recording modes
584 *
585 * @SMEM_MODE: monitor stores the data in SMEM
586 * @EXTERNAL_MODE: monitor stores the data in allocated DRAM
587 * @MARBH_MODE: monitor stores the data in MARBH buffer
6a8ac59c 588 * @MIPI_MODE: monitor outputs the data through the MIPI interface
490fefeb
LK		 589 */
590enum iwl_fw_dbg_monitor_mode {
591 SMEM_MODE = 0,
592 EXTERNAL_MODE = 1,
593 MARBH_MODE = 2,
6a8ac59c 594 MIPI_MODE = 3,
490fefeb
LK		 595};
596
a6017b90
GBA		 597/**
598 * struct iwl_fw_dbg_mem_seg_tlv - configures the debug data memory segments
599 *
ea7c2bfd 600 * @data_type: the memory segment type to record
a6017b90
GBA		 601 * @ofs: the memory segment offset
602 * @len: the memory segment length, in bytes
603 *
604 * This parses IWL_UCODE_TLV_FW_MEM_SEG
605 */
606struct iwl_fw_dbg_mem_seg_tlv {
607 __le32 data_type;
608 __le32 ofs;
609 __le32 len;
610} __packed;
611
490fefeb 612/**
fd527eb5 613 * struct iwl_fw_dbg_dest_tlv_v1 - configures the destination of the debug data
490fefeb
LK		 614 *
615 * @version: version of the TLV - currently 0
69d22e73 616 * @monitor_mode: &enum iwl_fw_dbg_monitor_mode
96c285da 617 * @size_power: buffer size will be 2^(size_power + 11)
490fefeb
LK		 618 * @base_reg: addr of the base addr register (PRPH)
619 * @end_reg: addr of the end addr register (PRPH)
620 * @write_ptr_reg: the addr of the reg of the write pointer
621 * @wrap_count: the addr of the reg of the wrap_count
622 * @base_shift: shift right of the base addr reg
623 * @end_shift: shift right of the end addr reg
624 * @reg_ops: array of registers operations
625 *
626 * This parses IWL_UCODE_TLV_FW_DBG_DEST
627 */
fd527eb5 628struct iwl_fw_dbg_dest_tlv_v1 {
490fefeb
LK		 629 u8 version;
630 u8 monitor_mode;
96c285da
EG		 631 u8 size_power;
632 u8 reserved;
490fefeb
LK		 633 __le32 base_reg;
634 __le32 end_reg;
635 __le32 write_ptr_reg;
636 __le32 wrap_count;
637 u8 base_shift;
638 u8 end_shift;
639 struct iwl_fw_dbg_reg_op reg_ops[0];
640} __packed;
641
fd527eb5
GBA		 642/* Mask of the register for defining the LDBG MAC2SMEM buffer SMEM size */
643#define IWL_LDBG_M2S_BUF_SIZE_MSK 0x0fff0000
644/* Mask of the register for defining the LDBG MAC2SMEM SMEM base address */
645#define IWL_LDBG_M2S_BUF_BA_MSK 0x00000fff
646/* The smem buffer chunks are in units of 256 bits */
647#define IWL_M2S_UNIT_SIZE 0x100
648
649struct iwl_fw_dbg_dest_tlv {
650 u8 version;
651 u8 monitor_mode;
652 u8 size_power;
653 u8 reserved;
654 __le32 cfg_reg;
655 __le32 write_ptr_reg;
656 __le32 wrap_count;
657 u8 base_shift;
658 u8 size_shift;
659 struct iwl_fw_dbg_reg_op reg_ops[0];
660} __packed;
661
490fefeb
LK		 662struct iwl_fw_dbg_conf_hcmd {
663 u8 id;
664 u8 reserved;
665 __le16 len;
666 u8 data[0];
667} __packed;
668
669/**
d2709ad7 670 * enum iwl_fw_dbg_trigger_mode - triggers functionalities
490fefeb 671 *
d2709ad7
EG		 672 * @IWL_FW_DBG_TRIGGER_START: when trigger occurs re-conf the dbg mechanism
673 * @IWL_FW_DBG_TRIGGER_STOP: when trigger occurs pull the dbg data
36fb9017
OG		 674 * @IWL_FW_DBG_TRIGGER_MONITOR_ONLY: when trigger occurs trigger is set to
675 * collect only monitor data
490fefeb 676 */
d2709ad7
EG		 677enum iwl_fw_dbg_trigger_mode {
678 IWL_FW_DBG_TRIGGER_START = BIT(0),
679 IWL_FW_DBG_TRIGGER_STOP = BIT(1),
36fb9017 680 IWL_FW_DBG_TRIGGER_MONITOR_ONLY = BIT(2),
d2709ad7 681};
490fefeb 682
378c8931
SM		 683/**
684 * enum iwl_fw_dbg_trigger_flags - the flags supported by wrt triggers
685 * @IWL_FW_DBG_FORCE_RESTART: force a firmware restart
686 */
687enum iwl_fw_dbg_trigger_flags {
688 IWL_FW_DBG_FORCE_RESTART = BIT(0),
689};
690
490fefeb 691/**
d2709ad7
EG		 692 * enum iwl_fw_dbg_trigger_vif_type - define the VIF type for a trigger
693 * @IWL_FW_DBG_CONF_VIF_ANY: any vif type
694 * @IWL_FW_DBG_CONF_VIF_IBSS: IBSS mode
695 * @IWL_FW_DBG_CONF_VIF_STATION: BSS mode
696 * @IWL_FW_DBG_CONF_VIF_AP: AP mode
697 * @IWL_FW_DBG_CONF_VIF_P2P_CLIENT: P2P Client mode
698 * @IWL_FW_DBG_CONF_VIF_P2P_GO: P2P GO mode
699 * @IWL_FW_DBG_CONF_VIF_P2P_DEVICE: P2P device
490fefeb 700 */
d2709ad7
EG		 701enum iwl_fw_dbg_trigger_vif_type {
702 IWL_FW_DBG_CONF_VIF_ANY = NL80211_IFTYPE_UNSPECIFIED,
703 IWL_FW_DBG_CONF_VIF_IBSS = NL80211_IFTYPE_ADHOC,
704 IWL_FW_DBG_CONF_VIF_STATION = NL80211_IFTYPE_STATION,
705 IWL_FW_DBG_CONF_VIF_AP = NL80211_IFTYPE_AP,
706 IWL_FW_DBG_CONF_VIF_P2P_CLIENT = NL80211_IFTYPE_P2P_CLIENT,
707 IWL_FW_DBG_CONF_VIF_P2P_GO = NL80211_IFTYPE_P2P_GO,
708 IWL_FW_DBG_CONF_VIF_P2P_DEVICE = NL80211_IFTYPE_P2P_DEVICE,
490fefeb
LK		 709};
710
711/**
d2709ad7 712 * struct iwl_fw_dbg_trigger_tlv - a TLV that describes the trigger
69d22e73
JB		 713 * @id: &enum iwl_fw_dbg_trigger
714 * @vif_type: &enum iwl_fw_dbg_trigger_vif_type
d2709ad7
EG		 715 * @stop_conf_ids: bitmap of configurations this trigger relates to.
716 * if the mode is %IWL_FW_DBG_TRIGGER_STOP, then if the bit corresponding
717 * to the currently running configuration is set, the data should be
718 * collected.
719 * @stop_delay: how many milliseconds to wait before collecting the data
720 * after the STOP trigger fires.
69d22e73 721 * @mode: &enum iwl_fw_dbg_trigger_mode - can be stop / start of both
d2709ad7
EG		 722 * @start_conf_id: if mode is %IWL_FW_DBG_TRIGGER_START, this defines what
723 * configuration should be applied when the triggers kicks in.
724 * @occurrences: number of occurrences. 0 means the trigger will never fire.
a977a150
GBA		 725 * @trig_dis_ms: the time, in milliseconds, after an occurrence of this
726 * trigger in which another occurrence should be ignored.
378c8931 727 * @flags: &enum iwl_fw_dbg_trigger_flags
d2709ad7
EG		 728 */
729struct iwl_fw_dbg_trigger_tlv {
730 __le32 id;
731 __le32 vif_type;
732 __le32 stop_conf_ids;
733 __le32 stop_delay;
734 u8 mode;
735 u8 start_conf_id;
736 __le16 occurrences;
a977a150 737 __le16 trig_dis_ms;
378c8931
SM		 738 u8 flags;
739 u8 reserved[5];
d2709ad7
EG		 740
741 u8 data[0];
742} __packed;
743
744#define FW_DBG_START_FROM_ALIVE 0
745#define FW_DBG_CONF_MAX 32
746#define FW_DBG_INVALID 0xff
747
9d761fd8
EG		 748/**
749 * struct iwl_fw_dbg_trigger_missed_bcon - configures trigger for missed beacons
750 * @stop_consec_missed_bcon: stop recording if threshold is crossed.
751 * @stop_consec_missed_bcon_since_rx: stop recording if threshold is crossed.
752 * @start_consec_missed_bcon: start recording if threshold is crossed.
753 * @start_consec_missed_bcon_since_rx: start recording if threshold is crossed.
754 * @reserved1: reserved
755 * @reserved2: reserved
756 */
757struct iwl_fw_dbg_trigger_missed_bcon {
758 __le32 stop_consec_missed_bcon;
759 __le32 stop_consec_missed_bcon_since_rx;
760 __le32 reserved2[2];
761 __le32 start_consec_missed_bcon;
762 __le32 start_consec_missed_bcon_since_rx;
763 __le32 reserved1[2];
764} __packed;
765
917f39bb
EG		 766/**
767 * struct iwl_fw_dbg_trigger_cmd - configures trigger for messages from FW.
768 * cmds: the list of commands to trigger the collection on
769 */
770struct iwl_fw_dbg_trigger_cmd {
771 struct cmd {
772 u8 cmd_id;
773 u8 group_id;
774 } __packed cmds[16];
775} __packed;
776
5a756c20
EG		 777/**
778 * iwl_fw_dbg_trigger_stats - configures trigger for statistics
779 * @stop_offset: the offset of the value to be monitored
780 * @stop_threshold: the threshold above which to collect
781 * @start_offset: the offset of the value to be monitored
782 * @start_threshold: the threshold above which to start recording
783 */
784struct iwl_fw_dbg_trigger_stats {
785 __le32 stop_offset;
786 __le32 stop_threshold;
787 __le32 start_offset;
788 __le32 start_threshold;
789} __packed;
790
3ec50b5e
EG		 791/**
792 * struct iwl_fw_dbg_trigger_low_rssi - trigger for low beacon RSSI
793 * @rssi: RSSI value to trigger at
794 */
795struct iwl_fw_dbg_trigger_low_rssi {
796 __le32 rssi;
797} __packed;
798
d42f5350
EG		 799/**
800 * struct iwl_fw_dbg_trigger_mlme - configures trigger for mlme events
801 * @stop_auth_denied: number of denied authentication to collect
802 * @stop_auth_timeout: number of authentication timeout to collect
803 * @stop_rx_deauth: number of Rx deauth before to collect
804 * @stop_tx_deauth: number of Tx deauth before to collect
805 * @stop_assoc_denied: number of denied association to collect
806 * @stop_assoc_timeout: number of association timeout to collect
31755207 807 * @stop_connection_loss: number of connection loss to collect
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EG		 808 * @start_auth_denied: number of denied authentication to start recording
809 * @start_auth_timeout: number of authentication timeout to start recording
810 * @start_rx_deauth: number of Rx deauth to start recording
811 * @start_tx_deauth: number of Tx deauth to start recording
812 * @start_assoc_denied: number of denied association to start recording
813 * @start_assoc_timeout: number of association timeout to start recording
31755207 814 * @start_connection_loss: number of connection loss to start recording
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EG		 815 */
816struct iwl_fw_dbg_trigger_mlme {
817 u8 stop_auth_denied;
818 u8 stop_auth_timeout;
819 u8 stop_rx_deauth;
820 u8 stop_tx_deauth;
821
822 u8 stop_assoc_denied;
823 u8 stop_assoc_timeout;
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EG		 824 u8 stop_connection_loss;
825 u8 reserved;
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EG		 826
827 u8 start_auth_denied;
828 u8 start_auth_timeout;
829 u8 start_rx_deauth;
830 u8 start_tx_deauth;
831
832 u8 start_assoc_denied;
833 u8 start_assoc_timeout;
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EG		 834 u8 start_connection_loss;
835 u8 reserved2;
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EG		 836} __packed;
837
5d42e7b2
EG		 838/**
839 * struct iwl_fw_dbg_trigger_txq_timer - configures the Tx queue's timer
840 * @command_queue: timeout for the command queue in ms
841 * @bss: timeout for the queues of a BSS (except for TDLS queues) in ms
842 * @softap: timeout for the queues of a softAP in ms
843 * @p2p_go: timeout for the queues of a P2P GO in ms
844 * @p2p_client: timeout for the queues of a P2P client in ms
845 * @p2p_device: timeout for the queues of a P2P device in ms
846 * @ibss: timeout for the queues of an IBSS in ms
847 * @tdls: timeout for the queues of a TDLS station in ms
848 */
849struct iwl_fw_dbg_trigger_txq_timer {
850 __le32 command_queue;
851 __le32 bss;
852 __le32 softap;
853 __le32 p2p_go;
854 __le32 p2p_client;
855 __le32 p2p_device;
856 __le32 ibss;
857 __le32 tdls;
858 __le32 reserved[4];
859} __packed;
860
874c174e
EG		 861/**
862 * struct iwl_fw_dbg_trigger_time_event - configures a time event trigger
863 * time_Events: a list of tuples <id, action_bitmap>. The driver will issue a
864 * trigger each time a time event notification that relates to time event
865 * id with one of the actions in the bitmap is received and
866 * BIT(notif->status) is set in status_bitmap.
867 *
868 */
869struct iwl_fw_dbg_trigger_time_event {
870 struct {
871 __le32 id;
872 __le32 action_bitmap;
873 __le32 status_bitmap;
874 } __packed time_events[16];
875} __packed;
876
4203263d
EG		 877/**
878 * struct iwl_fw_dbg_trigger_ba - configures BlockAck related trigger
879 * rx_ba_start: tid bitmap to configure on what tid the trigger should occur
880 * when an Rx BlockAck session is started.
881 * rx_ba_stop: tid bitmap to configure on what tid the trigger should occur
882 * when an Rx BlockAck session is stopped.
883 * tx_ba_start: tid bitmap to configure on what tid the trigger should occur
884 * when a Tx BlockAck session is started.
885 * tx_ba_stop: tid bitmap to configure on what tid the trigger should occur
886 * when a Tx BlockAck session is stopped.
887 * rx_bar: tid bitmap to configure on what tid the trigger should occur
888 * when a BAR is received (for a Tx BlockAck session).
889 * tx_bar: tid bitmap to configure on what tid the trigger should occur
890 * when a BAR is send (for an Rx BlocAck session).
891 * frame_timeout: tid bitmap to configure on what tid the trigger should occur
892 * when a frame times out in the reodering buffer.
893 */
894struct iwl_fw_dbg_trigger_ba {
895 __le16 rx_ba_start;
896 __le16 rx_ba_stop;
897 __le16 tx_ba_start;
898 __le16 tx_ba_stop;
899 __le16 rx_bar;
900 __le16 tx_bar;
901 __le16 frame_timeout;
902} __packed;
903
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GBA		 904/**
905 * struct iwl_fw_dbg_trigger_tdls - configures trigger for TDLS events.
906 * @action_bitmap: the TDLS action to trigger the collection upon
907 * @peer_mode: trigger on specific peer or all
908 * @peer: the TDLS peer to trigger the collection on
909 */
910struct iwl_fw_dbg_trigger_tdls {
911 u8 action_bitmap;
912 u8 peer_mode;
913 u8 peer[ETH_ALEN];
914 u8 reserved[4];
915} __packed;
916
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GBA		 917/**
918 * struct iwl_fw_dbg_trigger_tx_status - configures trigger for tx response
919 * status.
920 * @statuses: the list of statuses to trigger the collection on
921 */
922struct iwl_fw_dbg_trigger_tx_status {
923 struct tx_status {
924 u8 status;
925 u8 reserved[3];
926 } __packed statuses[16];
927 __le32 reserved[2];
928} __packed;
929
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EG		 930/**
931 * struct iwl_fw_dbg_conf_tlv - a TLV that describes a debug configuration.
932 * @id: conf id
490fefeb
LK		 933 * @usniffer: should the uSniffer image be used
934 * @num_of_hcmds: how many HCMDs to send are present here
935 * @hcmd: a variable length host command to be sent to apply the configuration.
936 * If there is more than one HCMD to send, they will appear one after the
937 * other and be sent in the order that they appear in.
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EG		 938 * This parses IWL_UCODE_TLV_FW_DBG_CONF. The user can add up-to
939 * %FW_DBG_CONF_MAX configuration per run.
490fefeb
LK		 940 */
941struct iwl_fw_dbg_conf_tlv {
942 u8 id;
943 u8 usniffer;
944 u8 reserved;
945 u8 num_of_hcmds;
946 struct iwl_fw_dbg_conf_hcmd hcmd;
490fefeb
LK		 947} __packed;
948
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JB		 949#define IWL_FW_CMD_VER_UNKNOWN 99
950
951/**
952 * struct iwl_fw_cmd_version - firmware command version entry
953 * @cmd: command ID
954 * @group: group ID
955 * @cmd_ver: command version
956 * @notif_ver: notification version
957 */
958struct iwl_fw_cmd_version {
959 u8 cmd;
960 u8 group;
961 u8 cmd_ver;
962 u8 notif_ver;
963} __packed;
964
3995deaf 965#endif /* __iwl_fw_file_h__ */
Linux 6.x block layer and io_uring tree(s)