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iwiwifi: mvm: Fix FW scan concurrency support assumptions
[linux-2.6-block.git] / drivers / net / wireless / intel / iwlwifi / fw / file.h
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edf38334
DF		 1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
96c285da 9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
fd527eb5 10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
132db31c 11 * Copyright(c) 2018 Intel Corporation
edf38334
DF		 12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of version 2 of the GNU General Public License as
15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
edf38334 22 * The full GNU General Public License is included in this distribution
410dc5aa 23 * in the file called COPYING.
edf38334
DF		 24 *
25 * Contact Information:
cb2f8277 26 * Intel Linux Wireless <linuxwifi@intel.com>
edf38334
DF		 27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *
29 * BSD LICENSE
30 *
51368bf7 31 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
96c285da 32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
fd527eb5 33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
132db31c 34 * Copyright(c) 2018 Intel Corporation
edf38334
DF		 35 * All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 *
41 * * Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * * Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in
45 * the documentation and/or other materials provided with the
46 * distribution.
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48 * contributors may be used to endorse or promote products derived
49 * from this software without specific prior written permission.
50 *
51 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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53 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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57 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
61 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 *****************************************************************************/
63
3995deaf
JB		 64#ifndef __iwl_fw_file_h__
65#define __iwl_fw_file_h__
edf38334 66
b1c23d9e 67#include <linux/netdevice.h>
d2709ad7 68#include <linux/nl80211.h>
b1c23d9e 69
edf38334
DF		 70/* v1/v2 uCode file layout */
71struct iwl_ucode_header {
72 __le32 ver; /* major/minor/API/serial */
73 union {
74 struct {
75 __le32 inst_size; /* bytes of runtime code */
76 __le32 data_size; /* bytes of runtime data */
77 __le32 init_size; /* bytes of init code */
78 __le32 init_data_size; /* bytes of init data */
79 __le32 boot_size; /* bytes of bootstrap code */
80 u8 data[0]; /* in same order as sizes */
81 } v1;
82 struct {
83 __le32 build; /* build number */
84 __le32 inst_size; /* bytes of runtime code */
85 __le32 data_size; /* bytes of runtime data */
86 __le32 init_size; /* bytes of init code */
87 __le32 init_data_size; /* bytes of init data */
88 __le32 boot_size; /* bytes of bootstrap code */
89 u8 data[0]; /* in same order as sizes */
90 } v2;
91 } u;
92};
93
f14cda6f
SS		 94#define IWL_UCODE_INI_TLV_GROUP BIT(24)
95
edf38334
DF		 96/*
97 * new TLV uCode file layout
98 *
99 * The new TLV file format contains TLVs, that each specify
0479c19d 100 * some piece of data.
edf38334
DF		 101 */
102
103enum iwl_ucode_tlv_type {
104 IWL_UCODE_TLV_INVALID = 0, /* unused */
105 IWL_UCODE_TLV_INST = 1,
106 IWL_UCODE_TLV_DATA = 2,
107 IWL_UCODE_TLV_INIT = 3,
108 IWL_UCODE_TLV_INIT_DATA = 4,
109 IWL_UCODE_TLV_BOOT = 5,
110 IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */
111 IWL_UCODE_TLV_PAN = 7,
112 IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8,
113 IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9,
114 IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10,
115 IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11,
116 IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12,
117 IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13,
118 IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14,
119 IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
120 IWL_UCODE_TLV_WOWLAN_INST = 16,
121 IWL_UCODE_TLV_WOWLAN_DATA = 17,
122 IWL_UCODE_TLV_FLAGS = 18,
ed8c8365
DS		 123 IWL_UCODE_TLV_SEC_RT = 19,
124 IWL_UCODE_TLV_SEC_INIT = 20,
125 IWL_UCODE_TLV_SEC_WOWLAN = 21,
126 IWL_UCODE_TLV_DEF_CALIB = 22,
127 IWL_UCODE_TLV_PHY_SKU = 23,
e2d6f4e7
EH		 128 IWL_UCODE_TLV_SECURE_SEC_RT = 24,
129 IWL_UCODE_TLV_SECURE_SEC_INIT = 25,
130 IWL_UCODE_TLV_SECURE_SEC_WOWLAN = 26,
131 IWL_UCODE_TLV_NUM_OF_CPU = 27,
e36e5433 132 IWL_UCODE_TLV_CSCHEME = 28,
a2978b11
EH		 133 IWL_UCODE_TLV_API_CHANGES_SET = 29,
134 IWL_UCODE_TLV_ENABLED_CAPABILITIES = 30,
762533ba 135 IWL_UCODE_TLV_N_SCAN_CHANNELS = 31,
a6c4fb44 136 IWL_UCODE_TLV_PAGING = 32,
61df750c 137 IWL_UCODE_TLV_SEC_RT_USNIFFER = 34,
fb7eba71 138 /* 35 is unused */
7e1223b5 139 IWL_UCODE_TLV_FW_VERSION = 36,
490fefeb
LK		 140 IWL_UCODE_TLV_FW_DBG_DEST = 38,
141 IWL_UCODE_TLV_FW_DBG_CONF = 39,
d2709ad7 142 IWL_UCODE_TLV_FW_DBG_TRIGGER = 40,
17564dde 143 IWL_UCODE_TLV_FW_GSCAN_CAPA = 50,
a6017b90 144 IWL_UCODE_TLV_FW_MEM_SEG = 51,
132db31c 145 IWL_UCODE_TLV_IML = 52,
22463857
SM		 146 IWL_UCODE_TLV_UMAC_DEBUG_ADDRS = 54,
147 IWL_UCODE_TLV_LMAC_DEBUG_ADDRS = 55,
f130bb75 148 IWL_UCODE_TLV_FW_RECOVERY_INFO = 57,
f14cda6f
SS		 149 IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION = IWL_UCODE_INI_TLV_GROUP | 0x1,
150 IWL_UCODE_TLV_TYPE_HCMD = IWL_UCODE_INI_TLV_GROUP | 0x2,
151 IWL_UCODE_TLV_TYPE_REGIONS = IWL_UCODE_INI_TLV_GROUP | 0x3,
152 IWL_UCODE_TLV_TYPE_TRIGGERS = IWL_UCODE_INI_TLV_GROUP | 0x4,
153 IWL_UCODE_TLV_TYPE_DEBUG_FLOW = IWL_UCODE_INI_TLV_GROUP | 0x5,
520f03ea
SM		 154
155 /* TLVs 0x1000-0x2000 are for internal driver usage */
156 IWL_UCODE_TLV_FW_DBG_DUMP_LST = 0x1000,
edf38334
DF		 157};
158
edf38334 159struct iwl_ucode_tlv {
0479c19d 160 __le32 type; /* see above */
edf38334
DF		 161 __le32 length; /* not including type/length fields */
162 u8 data[0];
163};
164
06ddbf5a
EG		 165#define IWL_TLV_UCODE_MAGIC 0x0a4c5749
166#define FW_VER_HUMAN_READABLE_SZ 64
edf38334
DF		 167
168struct iwl_tlv_ucode_header {
169 /*
170 * The TLV style ucode header is distinguished from
171 * the v1/v2 style header by first four bytes being
172 * zero, as such is an invalid combination of
173 * major/minor/API/serial versions.
174 */
175 __le32 zero;
176 __le32 magic;
06ddbf5a 177 u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
7e1223b5
EG		 178 /* major/minor/API/serial or major in new format */
179 __le32 ver;
edf38334 180 __le32 build;
0479c19d 181 __le64 ignore;
edf38334
DF		 182 /*
183 * The data contained herein has a TLV layout,
184 * see above for the TLV header and types.
185 * Note that each TLV is padded to a length
186 * that is a multiple of 4 for alignment.
187 */
188 u8 data[0];
189};
190
a2978b11
EH		 191/*
192 * ucode TLVs
193 *
194 * ability to get extension for: flags & capabilities from ucode binaries files
195 */
196struct iwl_ucode_api {
197 __le32 api_index;
198 __le32 api_flags;
199} __packed;
200
201struct iwl_ucode_capa {
202 __le32 api_index;
203 __le32 api_capa;
204} __packed;
205
a52703b2
JB		 206/**
207 * enum iwl_ucode_tlv_flag - ucode API flags
208 * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously
209 * was a separate TLV but moved here to save space.
0d365ae5 210 * @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behavior on hidden SSID,
a52703b2
JB		 211 * treats good CRC threshold as a boolean
212 * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w).
a52703b2
JB		 213 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: This uCode image supports uAPSD
214 * @IWL_UCODE_TLV_FLAGS_SHORT_BL: 16 entries of black list instead of 64 in scan
215 * offload profile config command.
216 * @IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS: D3 image supports up to six
217 * (rather than two) IPv6 addresses
218 * @IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID: not sending a probe with the SSID element
219 * from the probe request template.
220 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL: new NS offload (small version)
221 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version)
a52703b2
JB		 222 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD
223 * @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save
224 * @IWL_UCODE_TLV_FLAGS_BCAST_FILTERING: uCode supports broadcast filtering.
a52703b2
JB		 225 * @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS.
226 */
227enum iwl_ucode_tlv_flag {
228 IWL_UCODE_TLV_FLAGS_PAN = BIT(0),
229 IWL_UCODE_TLV_FLAGS_NEWSCAN = BIT(1),
230 IWL_UCODE_TLV_FLAGS_MFP = BIT(2),
a52703b2
JB		 231 IWL_UCODE_TLV_FLAGS_SHORT_BL = BIT(7),
232 IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS = BIT(10),
233 IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID = BIT(12),
234 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL = BIT(15),
235 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE = BIT(16),
a52703b2
JB		 236 IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT = BIT(24),
237 IWL_UCODE_TLV_FLAGS_EBS_SUPPORT = BIT(25),
238 IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD = BIT(26),
239 IWL_UCODE_TLV_FLAGS_BCAST_FILTERING = BIT(29),
a52703b2
JB		 240};
241
9efeccac 242typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
859d914c 243
a52703b2
JB		 244/**
245 * enum iwl_ucode_tlv_api - ucode api
a52703b2
JB		 246 * @IWL_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time
247 * longer than the passive one, which is essential for fragmented scan.
8ba2d7a1 248 * @IWL_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source.
c5d679a5 249 * @IWL_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params
f0d8f38c 250 * @IWL_UCODE_TLV_API_NEW_VERSION: new versioning format
aacf8f18
AS		 251 * @IWL_UCODE_TLV_API_SCAN_TSF_REPORT: Scan start time reported in scan
252 * iteration complete notification, and the timestamp reported for RX
253 * received during scan, are reported in TSF of the mac specified in the
254 * scan request.
45c458b4
SS		 255 * @IWL_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of
256 * ADD_MODIFY_STA_KEY_API_S_VER_2.
ced19f26 257 * @IWL_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement.
1247070d 258 * @IWL_UCODE_TLV_API_NAN2_VER2: This ucode supports NAN API version 2
678d9b6d 259 * @IWL_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used
72cbb73e
DS		 260 * @IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY: Quota command includes a field
261 * indicating low latency direction.
57df3839
SS		 262 * @IWL_UCODE_TLV_API_DEPRECATE_TTAK: RX status flag TTAK ok (bit 7) is
263 * deprecated.
66fa2424
AB		 264 * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2: This ucode supports version 8
265 * of scan request: SCAN_REQUEST_CMD_UMAC_API_S_VER_8
4c2f445c 266 * @IWL_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS
0791c2fc
HD		 267 * @IWL_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of
268 * the REDUCE_TX_POWER_CMD.
15e28c78
EG		 269 * @IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF: This ucode supports the short
270 * version of the beacon notification.
537ea3bb
AG		 271 * @IWL_UCODE_TLV_API_BEACON_FILTER_V4: This ucode supports v4 of
272 * BEACON_FILTER_CONFIG_API_S_VER_4.
d3f555f4
JB		 273 *
274 * @NUM_IWL_UCODE_TLV_API: number of bits used
a52703b2
JB		 275 */
276enum iwl_ucode_tlv_api {
678d9b6d 277 /* API Set 0 */
859d914c
JB		 278 IWL_UCODE_TLV_API_FRAGMENTED_SCAN = (__force iwl_ucode_tlv_api_t)8,
279 IWL_UCODE_TLV_API_WIFI_MCC_UPDATE = (__force iwl_ucode_tlv_api_t)9,
859d914c 280 IWL_UCODE_TLV_API_LQ_SS_PARAMS = (__force iwl_ucode_tlv_api_t)18,
4b87e5af 281 IWL_UCODE_TLV_API_NEW_VERSION = (__force iwl_ucode_tlv_api_t)20,
aacf8f18 282 IWL_UCODE_TLV_API_SCAN_TSF_REPORT = (__force iwl_ucode_tlv_api_t)28,
45c458b4 283 IWL_UCODE_TLV_API_TKIP_MIC_KEYS = (__force iwl_ucode_tlv_api_t)29,
ced19f26 284 IWL_UCODE_TLV_API_STA_TYPE = (__force iwl_ucode_tlv_api_t)30,
1247070d 285 IWL_UCODE_TLV_API_NAN2_VER2 = (__force iwl_ucode_tlv_api_t)31,
678d9b6d 286 /* API Set 1 */
dac4df1c 287 IWL_UCODE_TLV_API_ADAPTIVE_DWELL = (__force iwl_ucode_tlv_api_t)32,
8f691af9 288 IWL_UCODE_TLV_API_OCE = (__force iwl_ucode_tlv_api_t)33,
6ca33f8b 289 IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE = (__force iwl_ucode_tlv_api_t)34,
678d9b6d 290 IWL_UCODE_TLV_API_NEW_RX_STATS = (__force iwl_ucode_tlv_api_t)35,
2afa6a73 291 IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL = (__force iwl_ucode_tlv_api_t)36,
72cbb73e 292 IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY = (__force iwl_ucode_tlv_api_t)38,
57df3839 293 IWL_UCODE_TLV_API_DEPRECATE_TTAK = (__force iwl_ucode_tlv_api_t)41,
66fa2424 294 IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2 = (__force iwl_ucode_tlv_api_t)42,
4c2f445c 295 IWL_UCODE_TLV_API_FRAG_EBS = (__force iwl_ucode_tlv_api_t)44,
0791c2fc 296 IWL_UCODE_TLV_API_REDUCE_TX_POWER = (__force iwl_ucode_tlv_api_t)45,
15e28c78 297 IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF = (__force iwl_ucode_tlv_api_t)46,
537ea3bb 298 IWL_UCODE_TLV_API_BEACON_FILTER_V4 = (__force iwl_ucode_tlv_api_t)47,
d3f555f4
JB		 299
300 NUM_IWL_UCODE_TLV_API
301#ifdef __CHECKER__
302 /* sparse says it cannot increment the previous enum member */
303 = 128
304#endif
a52703b2
JB		 305};
306
9efeccac 307typedef unsigned int __bitwise iwl_ucode_tlv_capa_t;
859d914c 308
a52703b2
JB		 309/**
310 * enum iwl_ucode_tlv_capa - ucode capabilities
311 * @IWL_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3
312 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT: supports Location Aware Regulatory
313 * @IWL_UCODE_TLV_CAPA_UMAC_SCAN: supports UMAC scan.
3d44eebf 314 * @IWL_UCODE_TLV_CAPA_BEAMFORMER: supports Beamformer
a52703b2
JB		 315 * @IWL_UCODE_TLV_CAPA_TDLS_SUPPORT: support basic TDLS functionality
316 * @IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT: supports insertion of current
317 * tx power value into TPC Report action frame and Link Measurement Report
318 * action frame
319 * @IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT: supports updating current
320 * channel in DS parameter set element in probe requests.
321 * @IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT: supports adding TPC Report IE in
322 * probe requests.
323 * @IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT: supports Quiet Period requests
324 * @IWL_UCODE_TLV_CAPA_DQA_SUPPORT: supports dynamic queue allocation (DQA),
325 * which also implies support for the scheduler configuration command
326 * @IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching
23ae6128 327 * @IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image
a52703b2 328 * @IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command
0becb377 329 * @IWL_UCODE_TLV_CAPA_DC2DC_SUPPORT: supports DC2DC Command
93190fb0 330 * @IWL_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload
91a8bcde 331 * @IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics
c5241b0c
AS		 332 * @IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD: supports U-APSD on p2p interface when it
333 * is standalone or with a BSS station interface in the same binding.
0522588d 334 * @IWL_UCODE_TLV_CAPA_BT_COEX_PLCR: enabled BT Coex packet level co-running
4d165d12
AN		 335 * @IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different
336 * sources for the MCC. This TLV bit is a future replacement to
337 * IWL_UCODE_TLV_API_WIFI_MCC_UPDATE. When either is set, multi-source LAR
338 * is supported.
70e90992 339 * @IWL_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC
266ab689 340 * @IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan (no longer used)
65e25482 341 * @IWL_UCODE_TLV_CAPA_STA_PM_NOTIF: firmware will send STA PM notification
ecaf71de 342 * @IWL_UCODE_TLV_CAPA_TLC_OFFLOAD: firmware implements rate scaling algorithm
dad3340f 343 * @IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA: firmware implements quota related
50f067b3 344 * @IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2: firmware implements Coex Schema 2
74a10252 345 * IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD: firmware supports CSA command
57e861d9
DS		 346 * @IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS: firmware supports ultra high band
347 * (6 GHz).
78efc702 348 * @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement
b08dbed7 349 * @IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts
e7c2e1fd 350 * @IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT: supports bt-coex Multi-priority LUT
d3a108a4
AO		 351 * @IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD: the firmware supports CSA
352 * countdown offloading. Beacon notifications are not sent to the host.
353 * The fw also offloads TBTT alignment.
1e3c3c35
EG		 354 * @IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION: firmware will decide on what
355 * antenna the beacon should be transmitted
0db056d3
SS		 356 * @IWL_UCODE_TLV_CAPA_BEACON_STORING: firmware will store the latest beacon
357 * from AP and will send it upon d0i3 exit.
47fe2f8e 358 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3: support LAR API V3
0a3b7119
CRI		 359 * @IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW: firmware responsible for CT-kill
360 * @IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT: supports temperature
361 * thresholds reporting
5c89e7bc 362 * @IWL_UCODE_TLV_CAPA_CTDP_SUPPORT: supports cTDP command
3d2d4422
GBA		 363 * @IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED: supports usniffer enabled in
364 * regular image.
5b086414
GBA		 365 * @IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG: support getting more shared
366 * memory addresses from the firmware.
03098268 367 * @IWL_UCODE_TLV_CAPA_LQM_SUPPORT: supports Link Quality Measurement
55bfa4b9
LC		 368 * @IWL_UCODE_TLV_CAPA_TX_POWER_ACK: reduced TX power API has larger
369 * command size (command version 4) that supports toggling ACK TX
370 * power reduction.
2d8c2615 371 * @IWL_UCODE_TLV_CAPA_D3_DEBUG: supports debug recording during D3
47fe2f8e
HD		 372 * @IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT: MCC response support 11ax
373 * capability.
5213e8a8
JB		 374 * @IWL_UCODE_TLV_CAPA_CSI_REPORTING: firmware is capable of being configured
375 * to report the CSI information with (certain) RX frames
b73f9a4a
JB		 376 * @IWL_UCODE_TLV_CAPA_FTM_CALIBRATED: has FTM calibrated and thus supports both
377 * initiator and responder
5213e8a8
JB		 378 *
379 * @IWL_UCODE_TLV_CAPA_MLME_OFFLOAD: supports MLME offload
d3f555f4
JB		 380 *
381 * @NUM_IWL_UCODE_TLV_CAPA: number of bits used
a52703b2
JB		 382 */
383enum iwl_ucode_tlv_capa {
b73f9a4a 384 /* set 0 */
859d914c
JB		 385 IWL_UCODE_TLV_CAPA_D0I3_SUPPORT = (__force iwl_ucode_tlv_capa_t)0,
386 IWL_UCODE_TLV_CAPA_LAR_SUPPORT = (__force iwl_ucode_tlv_capa_t)1,
387 IWL_UCODE_TLV_CAPA_UMAC_SCAN = (__force iwl_ucode_tlv_capa_t)2,
388 IWL_UCODE_TLV_CAPA_BEAMFORMER = (__force iwl_ucode_tlv_capa_t)3,
389 IWL_UCODE_TLV_CAPA_TDLS_SUPPORT = (__force iwl_ucode_tlv_capa_t)6,
390 IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT = (__force iwl_ucode_tlv_capa_t)8,
391 IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)9,
392 IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)10,
393 IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT = (__force iwl_ucode_tlv_capa_t)11,
394 IWL_UCODE_TLV_CAPA_DQA_SUPPORT = (__force iwl_ucode_tlv_capa_t)12,
395 IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH = (__force iwl_ucode_tlv_capa_t)13,
23ae6128 396 IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG = (__force iwl_ucode_tlv_capa_t)17,
859d914c 397 IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT = (__force iwl_ucode_tlv_capa_t)18,
0becb377 398 IWL_UCODE_TLV_CAPA_DC2DC_CONFIG_SUPPORT = (__force iwl_ucode_tlv_capa_t)19,
93190fb0 399 IWL_UCODE_TLV_CAPA_CSUM_SUPPORT = (__force iwl_ucode_tlv_capa_t)21,
859d914c 400 IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS = (__force iwl_ucode_tlv_capa_t)22,
c5241b0c 401 IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD = (__force iwl_ucode_tlv_capa_t)26,
859d914c
JB		 402 IWL_UCODE_TLV_CAPA_BT_COEX_PLCR = (__force iwl_ucode_tlv_capa_t)28,
403 IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC = (__force iwl_ucode_tlv_capa_t)29,
404 IWL_UCODE_TLV_CAPA_BT_COEX_RRC = (__force iwl_ucode_tlv_capa_t)30,
17564dde 405 IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)31,
b73f9a4a
JB		 406
407 /* set 1 */
65e25482 408 IWL_UCODE_TLV_CAPA_STA_PM_NOTIF = (__force iwl_ucode_tlv_capa_t)38,
9415af7f
SS		 409 IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)39,
410 IWL_UCODE_TLV_CAPA_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)40,
fcea37b2 411 IWL_UCODE_TLV_CAPA_D0I3_END_FIRST = (__force iwl_ucode_tlv_capa_t)41,
ecaf71de 412 IWL_UCODE_TLV_CAPA_TLC_OFFLOAD = (__force iwl_ucode_tlv_capa_t)43,
dad3340f 413 IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA = (__force iwl_ucode_tlv_capa_t)44,
50f067b3 414 IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2 = (__force iwl_ucode_tlv_capa_t)45,
74a10252 415 IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD = (__force iwl_ucode_tlv_capa_t)46,
57e861d9 416 IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS = (__force iwl_ucode_tlv_capa_t)48,
b73f9a4a
JB		 417 IWL_UCODE_TLV_CAPA_FTM_CALIBRATED = (__force iwl_ucode_tlv_capa_t)47,
418
419 /* set 2 */
78efc702 420 IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE = (__force iwl_ucode_tlv_capa_t)64,
b08dbed7 421 IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS = (__force iwl_ucode_tlv_capa_t)65,
e7c2e1fd 422 IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT = (__force iwl_ucode_tlv_capa_t)67,
81f02ba3 423 IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT = (__force iwl_ucode_tlv_capa_t)68,
d3a108a4 424 IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD = (__force iwl_ucode_tlv_capa_t)70,
1e3c3c35 425 IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION = (__force iwl_ucode_tlv_capa_t)71,
0db056d3 426 IWL_UCODE_TLV_CAPA_BEACON_STORING = (__force iwl_ucode_tlv_capa_t)72,
47fe2f8e 427 IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3 = (__force iwl_ucode_tlv_capa_t)73,
0a3b7119
CRI		 428 IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW = (__force iwl_ucode_tlv_capa_t)74,
429 IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT = (__force iwl_ucode_tlv_capa_t)75,
5c89e7bc 430 IWL_UCODE_TLV_CAPA_CTDP_SUPPORT = (__force iwl_ucode_tlv_capa_t)76,
3d2d4422 431 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED = (__force iwl_ucode_tlv_capa_t)77,
5b086414 432 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG = (__force iwl_ucode_tlv_capa_t)80,
03098268 433 IWL_UCODE_TLV_CAPA_LQM_SUPPORT = (__force iwl_ucode_tlv_capa_t)81,
55bfa4b9 434 IWL_UCODE_TLV_CAPA_TX_POWER_ACK = (__force iwl_ucode_tlv_capa_t)84,
2d8c2615 435 IWL_UCODE_TLV_CAPA_D3_DEBUG = (__force iwl_ucode_tlv_capa_t)87,
4ef66965 436 IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT = (__force iwl_ucode_tlv_capa_t)88,
47fe2f8e 437 IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT = (__force iwl_ucode_tlv_capa_t)89,
5213e8a8
JB		 438 IWL_UCODE_TLV_CAPA_CSI_REPORTING = (__force iwl_ucode_tlv_capa_t)90,
439
b73f9a4a 440 /* set 3 */
58877d74 441 IWL_UCODE_TLV_CAPA_MLME_OFFLOAD = (__force iwl_ucode_tlv_capa_t)96,
d3f555f4
JB		 442
443 NUM_IWL_UCODE_TLV_CAPA
444#ifdef __CHECKER__
445 /* sparse says it cannot increment the previous enum member */
446 = 128
447#endif
a52703b2
JB		 448};
449
450/* The default calibrate table size if not specified by firmware file */
451#define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18
452#define IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE 19
453#define IWL_MAX_PHY_CALIBRATE_TBL_SIZE 253
454
455/* The default max probe length if not specified by the firmware file */
456#define IWL_DEFAULT_MAX_PROBE_LENGTH 200
457
458/*
459 * For 16.0 uCode and above, there is no differentiation between sections,
460 * just an offset to the HW address.
461 */
a52703b2 462#define CPU1_CPU2_SEPARATOR_SECTION 0xFFFFCCCC
a6c4fb44 463#define PAGING_SEPARATOR_SECTION 0xAAAABBBB
a52703b2
JB		 464
465/* uCode version contains 4 values: Major/Minor/API/Serial */
466#define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24)
467#define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16)
468#define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8)
469#define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF)
470
31a658b2
JB		 471/**
472 * struct iwl_tlv_calib_ctrl - Calibration control struct.
a52703b2
JB		 473 * Sent as part of the phy configuration command.
474 * @flow_trigger: bitmap for which calibrations to perform according to
475 * flow triggers.
476 * @event_trigger: bitmap for which calibrations to perform according to
477 * event triggers.
478 */
479struct iwl_tlv_calib_ctrl {
480 __le32 flow_trigger;
481 __le32 event_trigger;
482} __packed;
483
484enum iwl_fw_phy_cfg {
485 FW_PHY_CFG_RADIO_TYPE_POS = 0,
486 FW_PHY_CFG_RADIO_TYPE = 0x3 << FW_PHY_CFG_RADIO_TYPE_POS,
487 FW_PHY_CFG_RADIO_STEP_POS = 2,
488 FW_PHY_CFG_RADIO_STEP = 0x3 << FW_PHY_CFG_RADIO_STEP_POS,
489 FW_PHY_CFG_RADIO_DASH_POS = 4,
490 FW_PHY_CFG_RADIO_DASH = 0x3 << FW_PHY_CFG_RADIO_DASH_POS,
491 FW_PHY_CFG_TX_CHAIN_POS = 16,
492 FW_PHY_CFG_TX_CHAIN = 0xf << FW_PHY_CFG_TX_CHAIN_POS,
493 FW_PHY_CFG_RX_CHAIN_POS = 20,
494 FW_PHY_CFG_RX_CHAIN = 0xf << FW_PHY_CFG_RX_CHAIN_POS,
86a2b204 495 FW_PHY_CFG_SHARED_CLK = BIT(31),
a52703b2
JB		 496};
497
498#define IWL_UCODE_MAX_CS 1
499
500/**
501 * struct iwl_fw_cipher_scheme - a cipher scheme supported by FW.
502 * @cipher: a cipher suite selector
503 * @flags: cipher scheme flags (currently reserved for a future use)
504 * @hdr_len: a size of MPDU security header
505 * @pn_len: a size of PN
506 * @pn_off: an offset of pn from the beginning of the security header
507 * @key_idx_off: an offset of key index byte in the security header
508 * @key_idx_mask: a bit mask of key_idx bits
509 * @key_idx_shift: bit shift needed to get key_idx
510 * @mic_len: mic length in bytes
511 * @hw_cipher: a HW cipher index used in host commands
512 */
513struct iwl_fw_cipher_scheme {
514 __le32 cipher;
515 u8 flags;
516 u8 hdr_len;
517 u8 pn_len;
518 u8 pn_off;
519 u8 key_idx_off;
520 u8 key_idx_mask;
521 u8 key_idx_shift;
522 u8 mic_len;
523 u8 hw_cipher;
524} __packed;
525
490fefeb
LK		 526enum iwl_fw_dbg_reg_operator {
527 CSR_ASSIGN,
528 CSR_SETBIT,
529 CSR_CLEARBIT,
530
531 PRPH_ASSIGN,
532 PRPH_SETBIT,
533 PRPH_CLEARBIT,
869f3b15
HD		 534
535 INDIRECT_ASSIGN,
536 INDIRECT_SETBIT,
537 INDIRECT_CLEARBIT,
538
539 PRPH_BLOCKBIT,
490fefeb
LK		 540};
541
542/**
543 * struct iwl_fw_dbg_reg_op - an operation on a register
544 *
69d22e73 545 * @op: &enum iwl_fw_dbg_reg_operator
490fefeb
LK		 546 * @addr: offset of the register
547 * @val: value
548 */
549struct iwl_fw_dbg_reg_op {
550 u8 op;
551 u8 reserved[3];
552 __le32 addr;
553 __le32 val;
554} __packed;
555
556/**
557 * enum iwl_fw_dbg_monitor_mode - available monitor recording modes
558 *
559 * @SMEM_MODE: monitor stores the data in SMEM
560 * @EXTERNAL_MODE: monitor stores the data in allocated DRAM
561 * @MARBH_MODE: monitor stores the data in MARBH buffer
6a8ac59c 562 * @MIPI_MODE: monitor outputs the data through the MIPI interface
490fefeb
LK		 563 */
564enum iwl_fw_dbg_monitor_mode {
565 SMEM_MODE = 0,
566 EXTERNAL_MODE = 1,
567 MARBH_MODE = 2,
6a8ac59c 568 MIPI_MODE = 3,
490fefeb
LK		 569};
570
a6017b90
GBA		 571/**
572 * struct iwl_fw_dbg_mem_seg_tlv - configures the debug data memory segments
573 *
ea7c2bfd 574 * @data_type: the memory segment type to record
a6017b90
GBA		 575 * @ofs: the memory segment offset
576 * @len: the memory segment length, in bytes
577 *
578 * This parses IWL_UCODE_TLV_FW_MEM_SEG
579 */
580struct iwl_fw_dbg_mem_seg_tlv {
581 __le32 data_type;
582 __le32 ofs;
583 __le32 len;
584} __packed;
585
490fefeb 586/**
fd527eb5 587 * struct iwl_fw_dbg_dest_tlv_v1 - configures the destination of the debug data
490fefeb
LK		 588 *
589 * @version: version of the TLV - currently 0
69d22e73 590 * @monitor_mode: &enum iwl_fw_dbg_monitor_mode
96c285da 591 * @size_power: buffer size will be 2^(size_power + 11)
490fefeb
LK		 592 * @base_reg: addr of the base addr register (PRPH)
593 * @end_reg: addr of the end addr register (PRPH)
594 * @write_ptr_reg: the addr of the reg of the write pointer
595 * @wrap_count: the addr of the reg of the wrap_count
596 * @base_shift: shift right of the base addr reg
597 * @end_shift: shift right of the end addr reg
598 * @reg_ops: array of registers operations
599 *
600 * This parses IWL_UCODE_TLV_FW_DBG_DEST
601 */
fd527eb5 602struct iwl_fw_dbg_dest_tlv_v1 {
490fefeb
LK		 603 u8 version;
604 u8 monitor_mode;
96c285da
EG		 605 u8 size_power;
606 u8 reserved;
490fefeb
LK		 607 __le32 base_reg;
608 __le32 end_reg;
609 __le32 write_ptr_reg;
610 __le32 wrap_count;
611 u8 base_shift;
612 u8 end_shift;
613 struct iwl_fw_dbg_reg_op reg_ops[0];
614} __packed;
615
fd527eb5
GBA		 616/* Mask of the register for defining the LDBG MAC2SMEM buffer SMEM size */
617#define IWL_LDBG_M2S_BUF_SIZE_MSK 0x0fff0000
618/* Mask of the register for defining the LDBG MAC2SMEM SMEM base address */
619#define IWL_LDBG_M2S_BUF_BA_MSK 0x00000fff
620/* The smem buffer chunks are in units of 256 bits */
621#define IWL_M2S_UNIT_SIZE 0x100
622
623struct iwl_fw_dbg_dest_tlv {
624 u8 version;
625 u8 monitor_mode;
626 u8 size_power;
627 u8 reserved;
628 __le32 cfg_reg;
629 __le32 write_ptr_reg;
630 __le32 wrap_count;
631 u8 base_shift;
632 u8 size_shift;
633 struct iwl_fw_dbg_reg_op reg_ops[0];
634} __packed;
635
490fefeb
LK		 636struct iwl_fw_dbg_conf_hcmd {
637 u8 id;
638 u8 reserved;
639 __le16 len;
640 u8 data[0];
641} __packed;
642
643/**
d2709ad7 644 * enum iwl_fw_dbg_trigger_mode - triggers functionalities
490fefeb 645 *
d2709ad7
EG		 646 * @IWL_FW_DBG_TRIGGER_START: when trigger occurs re-conf the dbg mechanism
647 * @IWL_FW_DBG_TRIGGER_STOP: when trigger occurs pull the dbg data
36fb9017
OG		 648 * @IWL_FW_DBG_TRIGGER_MONITOR_ONLY: when trigger occurs trigger is set to
649 * collect only monitor data
490fefeb 650 */
d2709ad7
EG		 651enum iwl_fw_dbg_trigger_mode {
652 IWL_FW_DBG_TRIGGER_START = BIT(0),
653 IWL_FW_DBG_TRIGGER_STOP = BIT(1),
36fb9017 654 IWL_FW_DBG_TRIGGER_MONITOR_ONLY = BIT(2),
d2709ad7 655};
490fefeb 656
378c8931
SM		 657/**
658 * enum iwl_fw_dbg_trigger_flags - the flags supported by wrt triggers
659 * @IWL_FW_DBG_FORCE_RESTART: force a firmware restart
660 */
661enum iwl_fw_dbg_trigger_flags {
662 IWL_FW_DBG_FORCE_RESTART = BIT(0),
663};
664
490fefeb 665/**
d2709ad7
EG		 666 * enum iwl_fw_dbg_trigger_vif_type - define the VIF type for a trigger
667 * @IWL_FW_DBG_CONF_VIF_ANY: any vif type
668 * @IWL_FW_DBG_CONF_VIF_IBSS: IBSS mode
669 * @IWL_FW_DBG_CONF_VIF_STATION: BSS mode
670 * @IWL_FW_DBG_CONF_VIF_AP: AP mode
671 * @IWL_FW_DBG_CONF_VIF_P2P_CLIENT: P2P Client mode
672 * @IWL_FW_DBG_CONF_VIF_P2P_GO: P2P GO mode
673 * @IWL_FW_DBG_CONF_VIF_P2P_DEVICE: P2P device
490fefeb 674 */
d2709ad7
EG		 675enum iwl_fw_dbg_trigger_vif_type {
676 IWL_FW_DBG_CONF_VIF_ANY = NL80211_IFTYPE_UNSPECIFIED,
677 IWL_FW_DBG_CONF_VIF_IBSS = NL80211_IFTYPE_ADHOC,
678 IWL_FW_DBG_CONF_VIF_STATION = NL80211_IFTYPE_STATION,
679 IWL_FW_DBG_CONF_VIF_AP = NL80211_IFTYPE_AP,
680 IWL_FW_DBG_CONF_VIF_P2P_CLIENT = NL80211_IFTYPE_P2P_CLIENT,
681 IWL_FW_DBG_CONF_VIF_P2P_GO = NL80211_IFTYPE_P2P_GO,
682 IWL_FW_DBG_CONF_VIF_P2P_DEVICE = NL80211_IFTYPE_P2P_DEVICE,
490fefeb
LK		 683};
684
685/**
d2709ad7 686 * struct iwl_fw_dbg_trigger_tlv - a TLV that describes the trigger
69d22e73
JB		 687 * @id: &enum iwl_fw_dbg_trigger
688 * @vif_type: &enum iwl_fw_dbg_trigger_vif_type
d2709ad7
EG		 689 * @stop_conf_ids: bitmap of configurations this trigger relates to.
690 * if the mode is %IWL_FW_DBG_TRIGGER_STOP, then if the bit corresponding
691 * to the currently running configuration is set, the data should be
692 * collected.
693 * @stop_delay: how many milliseconds to wait before collecting the data
694 * after the STOP trigger fires.
69d22e73 695 * @mode: &enum iwl_fw_dbg_trigger_mode - can be stop / start of both
d2709ad7
EG		 696 * @start_conf_id: if mode is %IWL_FW_DBG_TRIGGER_START, this defines what
697 * configuration should be applied when the triggers kicks in.
698 * @occurrences: number of occurrences. 0 means the trigger will never fire.
a977a150
GBA		 699 * @trig_dis_ms: the time, in milliseconds, after an occurrence of this
700 * trigger in which another occurrence should be ignored.
378c8931 701 * @flags: &enum iwl_fw_dbg_trigger_flags
d2709ad7
EG		 702 */
703struct iwl_fw_dbg_trigger_tlv {
704 __le32 id;
705 __le32 vif_type;
706 __le32 stop_conf_ids;
707 __le32 stop_delay;
708 u8 mode;
709 u8 start_conf_id;
710 __le16 occurrences;
a977a150 711 __le16 trig_dis_ms;
378c8931
SM		 712 u8 flags;
713 u8 reserved[5];
d2709ad7
EG		 714
715 u8 data[0];
716} __packed;
717
718#define FW_DBG_START_FROM_ALIVE 0
719#define FW_DBG_CONF_MAX 32
720#define FW_DBG_INVALID 0xff
721
9d761fd8
EG		 722/**
723 * struct iwl_fw_dbg_trigger_missed_bcon - configures trigger for missed beacons
724 * @stop_consec_missed_bcon: stop recording if threshold is crossed.
725 * @stop_consec_missed_bcon_since_rx: stop recording if threshold is crossed.
726 * @start_consec_missed_bcon: start recording if threshold is crossed.
727 * @start_consec_missed_bcon_since_rx: start recording if threshold is crossed.
728 * @reserved1: reserved
729 * @reserved2: reserved
730 */
731struct iwl_fw_dbg_trigger_missed_bcon {
732 __le32 stop_consec_missed_bcon;
733 __le32 stop_consec_missed_bcon_since_rx;
734 __le32 reserved2[2];
735 __le32 start_consec_missed_bcon;
736 __le32 start_consec_missed_bcon_since_rx;
737 __le32 reserved1[2];
738} __packed;
739
917f39bb
EG		 740/**
741 * struct iwl_fw_dbg_trigger_cmd - configures trigger for messages from FW.
742 * cmds: the list of commands to trigger the collection on
743 */
744struct iwl_fw_dbg_trigger_cmd {
745 struct cmd {
746 u8 cmd_id;
747 u8 group_id;
748 } __packed cmds[16];
749} __packed;
750
5a756c20
EG		 751/**
752 * iwl_fw_dbg_trigger_stats - configures trigger for statistics
753 * @stop_offset: the offset of the value to be monitored
754 * @stop_threshold: the threshold above which to collect
755 * @start_offset: the offset of the value to be monitored
756 * @start_threshold: the threshold above which to start recording
757 */
758struct iwl_fw_dbg_trigger_stats {
759 __le32 stop_offset;
760 __le32 stop_threshold;
761 __le32 start_offset;
762 __le32 start_threshold;
763} __packed;
764
3ec50b5e
EG		 765/**
766 * struct iwl_fw_dbg_trigger_low_rssi - trigger for low beacon RSSI
767 * @rssi: RSSI value to trigger at
768 */
769struct iwl_fw_dbg_trigger_low_rssi {
770 __le32 rssi;
771} __packed;
772
d42f5350
EG		 773/**
774 * struct iwl_fw_dbg_trigger_mlme - configures trigger for mlme events
775 * @stop_auth_denied: number of denied authentication to collect
776 * @stop_auth_timeout: number of authentication timeout to collect
777 * @stop_rx_deauth: number of Rx deauth before to collect
778 * @stop_tx_deauth: number of Tx deauth before to collect
779 * @stop_assoc_denied: number of denied association to collect
780 * @stop_assoc_timeout: number of association timeout to collect
31755207 781 * @stop_connection_loss: number of connection loss to collect
d42f5350
EG		 782 * @start_auth_denied: number of denied authentication to start recording
783 * @start_auth_timeout: number of authentication timeout to start recording
784 * @start_rx_deauth: number of Rx deauth to start recording
785 * @start_tx_deauth: number of Tx deauth to start recording
786 * @start_assoc_denied: number of denied association to start recording
787 * @start_assoc_timeout: number of association timeout to start recording
31755207 788 * @start_connection_loss: number of connection loss to start recording
d42f5350
EG		 789 */
790struct iwl_fw_dbg_trigger_mlme {
791 u8 stop_auth_denied;
792 u8 stop_auth_timeout;
793 u8 stop_rx_deauth;
794 u8 stop_tx_deauth;
795
796 u8 stop_assoc_denied;
797 u8 stop_assoc_timeout;
31755207
EG		 798 u8 stop_connection_loss;
799 u8 reserved;
d42f5350
EG		 800
801 u8 start_auth_denied;
802 u8 start_auth_timeout;
803 u8 start_rx_deauth;
804 u8 start_tx_deauth;
805
806 u8 start_assoc_denied;
807 u8 start_assoc_timeout;
31755207
EG		 808 u8 start_connection_loss;
809 u8 reserved2;
d42f5350
EG		 810} __packed;
811
5d42e7b2
EG		 812/**
813 * struct iwl_fw_dbg_trigger_txq_timer - configures the Tx queue's timer
814 * @command_queue: timeout for the command queue in ms
815 * @bss: timeout for the queues of a BSS (except for TDLS queues) in ms
816 * @softap: timeout for the queues of a softAP in ms
817 * @p2p_go: timeout for the queues of a P2P GO in ms
818 * @p2p_client: timeout for the queues of a P2P client in ms
819 * @p2p_device: timeout for the queues of a P2P device in ms
820 * @ibss: timeout for the queues of an IBSS in ms
821 * @tdls: timeout for the queues of a TDLS station in ms
822 */
823struct iwl_fw_dbg_trigger_txq_timer {
824 __le32 command_queue;
825 __le32 bss;
826 __le32 softap;
827 __le32 p2p_go;
828 __le32 p2p_client;
829 __le32 p2p_device;
830 __le32 ibss;
831 __le32 tdls;
832 __le32 reserved[4];
833} __packed;
834
874c174e
EG		 835/**
836 * struct iwl_fw_dbg_trigger_time_event - configures a time event trigger
837 * time_Events: a list of tuples <id, action_bitmap>. The driver will issue a
838 * trigger each time a time event notification that relates to time event
839 * id with one of the actions in the bitmap is received and
840 * BIT(notif->status) is set in status_bitmap.
841 *
842 */
843struct iwl_fw_dbg_trigger_time_event {
844 struct {
845 __le32 id;
846 __le32 action_bitmap;
847 __le32 status_bitmap;
848 } __packed time_events[16];
849} __packed;
850
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EG		 851/**
852 * struct iwl_fw_dbg_trigger_ba - configures BlockAck related trigger
853 * rx_ba_start: tid bitmap to configure on what tid the trigger should occur
854 * when an Rx BlockAck session is started.
855 * rx_ba_stop: tid bitmap to configure on what tid the trigger should occur
856 * when an Rx BlockAck session is stopped.
857 * tx_ba_start: tid bitmap to configure on what tid the trigger should occur
858 * when a Tx BlockAck session is started.
859 * tx_ba_stop: tid bitmap to configure on what tid the trigger should occur
860 * when a Tx BlockAck session is stopped.
861 * rx_bar: tid bitmap to configure on what tid the trigger should occur
862 * when a BAR is received (for a Tx BlockAck session).
863 * tx_bar: tid bitmap to configure on what tid the trigger should occur
864 * when a BAR is send (for an Rx BlocAck session).
865 * frame_timeout: tid bitmap to configure on what tid the trigger should occur
866 * when a frame times out in the reodering buffer.
867 */
868struct iwl_fw_dbg_trigger_ba {
869 __le16 rx_ba_start;
870 __le16 rx_ba_stop;
871 __le16 tx_ba_start;
872 __le16 tx_ba_stop;
873 __le16 rx_bar;
874 __le16 tx_bar;
875 __le16 frame_timeout;
876} __packed;
877
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GBA		 878/**
879 * struct iwl_fw_dbg_trigger_tdls - configures trigger for TDLS events.
880 * @action_bitmap: the TDLS action to trigger the collection upon
881 * @peer_mode: trigger on specific peer or all
882 * @peer: the TDLS peer to trigger the collection on
883 */
884struct iwl_fw_dbg_trigger_tdls {
885 u8 action_bitmap;
886 u8 peer_mode;
887 u8 peer[ETH_ALEN];
888 u8 reserved[4];
889} __packed;
890
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GBA		 891/**
892 * struct iwl_fw_dbg_trigger_tx_status - configures trigger for tx response
893 * status.
894 * @statuses: the list of statuses to trigger the collection on
895 */
896struct iwl_fw_dbg_trigger_tx_status {
897 struct tx_status {
898 u8 status;
899 u8 reserved[3];
900 } __packed statuses[16];
901 __le32 reserved[2];
902} __packed;
903
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EG		 904/**
905 * struct iwl_fw_dbg_conf_tlv - a TLV that describes a debug configuration.
906 * @id: conf id
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LK		 907 * @usniffer: should the uSniffer image be used
908 * @num_of_hcmds: how many HCMDs to send are present here
909 * @hcmd: a variable length host command to be sent to apply the configuration.
910 * If there is more than one HCMD to send, they will appear one after the
911 * other and be sent in the order that they appear in.
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EG		 912 * This parses IWL_UCODE_TLV_FW_DBG_CONF. The user can add up-to
913 * %FW_DBG_CONF_MAX configuration per run.
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LK		 914 */
915struct iwl_fw_dbg_conf_tlv {
916 u8 id;
917 u8 usniffer;
918 u8 reserved;
919 u8 num_of_hcmds;
920 struct iwl_fw_dbg_conf_hcmd hcmd;
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LK		 921} __packed;
922
3995deaf 923#endif /* __iwl_fw_file_h__ */
Linux 6.x block layer and io_uring tree(s)