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iwlwifi: mvm: activate fragmented EBS in case of fragmented scan
[linux-2.6-block.git] / drivers / net / wireless / intel / iwlwifi / fw / file.h
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edf38334
DF		 1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
96c285da 9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
fd527eb5 10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
132db31c 11 * Copyright(c) 2018 Intel Corporation
edf38334
DF		 12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of version 2 of the GNU General Public License as
15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
edf38334 22 * The full GNU General Public License is included in this distribution
410dc5aa 23 * in the file called COPYING.
edf38334
DF		 24 *
25 * Contact Information:
cb2f8277 26 * Intel Linux Wireless <linuxwifi@intel.com>
edf38334
DF		 27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *
29 * BSD LICENSE
30 *
51368bf7 31 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
96c285da 32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
fd527eb5 33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
132db31c 34 * Copyright(c) 2018 Intel Corporation
edf38334
DF		 35 * All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 *
41 * * Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * * Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in
45 * the documentation and/or other materials provided with the
46 * distribution.
47 * * Neither the name Intel Corporation nor the names of its
48 * contributors may be used to endorse or promote products derived
49 * from this software without specific prior written permission.
50 *
51 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
52 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
53 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
54 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
55 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
56 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
57 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
61 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 *****************************************************************************/
63
3995deaf
JB		 64#ifndef __iwl_fw_file_h__
65#define __iwl_fw_file_h__
edf38334 66
b1c23d9e 67#include <linux/netdevice.h>
d2709ad7 68#include <linux/nl80211.h>
b1c23d9e 69
edf38334
DF		 70/* v1/v2 uCode file layout */
71struct iwl_ucode_header {
72 __le32 ver; /* major/minor/API/serial */
73 union {
74 struct {
75 __le32 inst_size; /* bytes of runtime code */
76 __le32 data_size; /* bytes of runtime data */
77 __le32 init_size; /* bytes of init code */
78 __le32 init_data_size; /* bytes of init data */
79 __le32 boot_size; /* bytes of bootstrap code */
80 u8 data[0]; /* in same order as sizes */
81 } v1;
82 struct {
83 __le32 build; /* build number */
84 __le32 inst_size; /* bytes of runtime code */
85 __le32 data_size; /* bytes of runtime data */
86 __le32 init_size; /* bytes of init code */
87 __le32 init_data_size; /* bytes of init data */
88 __le32 boot_size; /* bytes of bootstrap code */
89 u8 data[0]; /* in same order as sizes */
90 } v2;
91 } u;
92};
93
94/*
95 * new TLV uCode file layout
96 *
97 * The new TLV file format contains TLVs, that each specify
0479c19d 98 * some piece of data.
edf38334
DF		 99 */
100
101enum iwl_ucode_tlv_type {
102 IWL_UCODE_TLV_INVALID = 0, /* unused */
103 IWL_UCODE_TLV_INST = 1,
104 IWL_UCODE_TLV_DATA = 2,
105 IWL_UCODE_TLV_INIT = 3,
106 IWL_UCODE_TLV_INIT_DATA = 4,
107 IWL_UCODE_TLV_BOOT = 5,
108 IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */
109 IWL_UCODE_TLV_PAN = 7,
110 IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8,
111 IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9,
112 IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10,
113 IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11,
114 IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12,
115 IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13,
116 IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14,
117 IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
118 IWL_UCODE_TLV_WOWLAN_INST = 16,
119 IWL_UCODE_TLV_WOWLAN_DATA = 17,
120 IWL_UCODE_TLV_FLAGS = 18,
ed8c8365
DS		 121 IWL_UCODE_TLV_SEC_RT = 19,
122 IWL_UCODE_TLV_SEC_INIT = 20,
123 IWL_UCODE_TLV_SEC_WOWLAN = 21,
124 IWL_UCODE_TLV_DEF_CALIB = 22,
125 IWL_UCODE_TLV_PHY_SKU = 23,
e2d6f4e7
EH		 126 IWL_UCODE_TLV_SECURE_SEC_RT = 24,
127 IWL_UCODE_TLV_SECURE_SEC_INIT = 25,
128 IWL_UCODE_TLV_SECURE_SEC_WOWLAN = 26,
129 IWL_UCODE_TLV_NUM_OF_CPU = 27,
e36e5433 130 IWL_UCODE_TLV_CSCHEME = 28,
a2978b11
EH		 131 IWL_UCODE_TLV_API_CHANGES_SET = 29,
132 IWL_UCODE_TLV_ENABLED_CAPABILITIES = 30,
762533ba 133 IWL_UCODE_TLV_N_SCAN_CHANNELS = 31,
a6c4fb44 134 IWL_UCODE_TLV_PAGING = 32,
61df750c 135 IWL_UCODE_TLV_SEC_RT_USNIFFER = 34,
fb7eba71 136 /* 35 is unused */
7e1223b5 137 IWL_UCODE_TLV_FW_VERSION = 36,
490fefeb
LK		 138 IWL_UCODE_TLV_FW_DBG_DEST = 38,
139 IWL_UCODE_TLV_FW_DBG_CONF = 39,
d2709ad7 140 IWL_UCODE_TLV_FW_DBG_TRIGGER = 40,
17564dde 141 IWL_UCODE_TLV_FW_GSCAN_CAPA = 50,
a6017b90 142 IWL_UCODE_TLV_FW_MEM_SEG = 51,
132db31c 143 IWL_UCODE_TLV_IML = 52,
520f03ea
SM		 144
145 /* TLVs 0x1000-0x2000 are for internal driver usage */
146 IWL_UCODE_TLV_FW_DBG_DUMP_LST = 0x1000,
edf38334
DF		 147};
148
edf38334 149struct iwl_ucode_tlv {
0479c19d 150 __le32 type; /* see above */
edf38334
DF		 151 __le32 length; /* not including type/length fields */
152 u8 data[0];
153};
154
06ddbf5a
EG		 155#define IWL_TLV_UCODE_MAGIC 0x0a4c5749
156#define FW_VER_HUMAN_READABLE_SZ 64
edf38334
DF		 157
158struct iwl_tlv_ucode_header {
159 /*
160 * The TLV style ucode header is distinguished from
161 * the v1/v2 style header by first four bytes being
162 * zero, as such is an invalid combination of
163 * major/minor/API/serial versions.
164 */
165 __le32 zero;
166 __le32 magic;
06ddbf5a 167 u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
7e1223b5
EG		 168 /* major/minor/API/serial or major in new format */
169 __le32 ver;
edf38334 170 __le32 build;
0479c19d 171 __le64 ignore;
edf38334
DF		 172 /*
173 * The data contained herein has a TLV layout,
174 * see above for the TLV header and types.
175 * Note that each TLV is padded to a length
176 * that is a multiple of 4 for alignment.
177 */
178 u8 data[0];
179};
180
a2978b11
EH		 181/*
182 * ucode TLVs
183 *
184 * ability to get extension for: flags & capabilities from ucode binaries files
185 */
186struct iwl_ucode_api {
187 __le32 api_index;
188 __le32 api_flags;
189} __packed;
190
191struct iwl_ucode_capa {
192 __le32 api_index;
193 __le32 api_capa;
194} __packed;
195
a52703b2
JB		 196/**
197 * enum iwl_ucode_tlv_flag - ucode API flags
198 * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously
199 * was a separate TLV but moved here to save space.
0d365ae5 200 * @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behavior on hidden SSID,
a52703b2
JB		 201 * treats good CRC threshold as a boolean
202 * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w).
a52703b2
JB		 203 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: This uCode image supports uAPSD
204 * @IWL_UCODE_TLV_FLAGS_SHORT_BL: 16 entries of black list instead of 64 in scan
205 * offload profile config command.
206 * @IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS: D3 image supports up to six
207 * (rather than two) IPv6 addresses
208 * @IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID: not sending a probe with the SSID element
209 * from the probe request template.
210 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL: new NS offload (small version)
211 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version)
a52703b2
JB		 212 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD
213 * @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save
214 * @IWL_UCODE_TLV_FLAGS_BCAST_FILTERING: uCode supports broadcast filtering.
a52703b2
JB		 215 * @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS.
216 */
217enum iwl_ucode_tlv_flag {
218 IWL_UCODE_TLV_FLAGS_PAN = BIT(0),
219 IWL_UCODE_TLV_FLAGS_NEWSCAN = BIT(1),
220 IWL_UCODE_TLV_FLAGS_MFP = BIT(2),
a52703b2
JB		 221 IWL_UCODE_TLV_FLAGS_SHORT_BL = BIT(7),
222 IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS = BIT(10),
223 IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID = BIT(12),
224 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL = BIT(15),
225 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE = BIT(16),
a52703b2
JB		 226 IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT = BIT(24),
227 IWL_UCODE_TLV_FLAGS_EBS_SUPPORT = BIT(25),
228 IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD = BIT(26),
229 IWL_UCODE_TLV_FLAGS_BCAST_FILTERING = BIT(29),
a52703b2
JB		 230};
231
9efeccac 232typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
859d914c 233
a52703b2
JB		 234/**
235 * enum iwl_ucode_tlv_api - ucode api
a52703b2
JB		 236 * @IWL_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time
237 * longer than the passive one, which is essential for fragmented scan.
8ba2d7a1 238 * @IWL_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source.
c5d679a5 239 * @IWL_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params
f0d8f38c 240 * @IWL_UCODE_TLV_API_NEW_VERSION: new versioning format
aacf8f18
AS		 241 * @IWL_UCODE_TLV_API_SCAN_TSF_REPORT: Scan start time reported in scan
242 * iteration complete notification, and the timestamp reported for RX
243 * received during scan, are reported in TSF of the mac specified in the
244 * scan request.
45c458b4
SS		 245 * @IWL_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of
246 * ADD_MODIFY_STA_KEY_API_S_VER_2.
ced19f26 247 * @IWL_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement.
1247070d 248 * @IWL_UCODE_TLV_API_NAN2_VER2: This ucode supports NAN API version 2
678d9b6d 249 * @IWL_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used
72cbb73e
DS		 250 * @IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY: Quota command includes a field
251 * indicating low latency direction.
57df3839
SS		 252 * @IWL_UCODE_TLV_API_DEPRECATE_TTAK: RX status flag TTAK ok (bit 7) is
253 * deprecated.
66fa2424
AB		 254 * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2: This ucode supports version 8
255 * of scan request: SCAN_REQUEST_CMD_UMAC_API_S_VER_8
4c2f445c 256 * @IWL_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS
0791c2fc
HD		 257 * @IWL_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of
258 * the REDUCE_TX_POWER_CMD.
d3f555f4
JB		 259 *
260 * @NUM_IWL_UCODE_TLV_API: number of bits used
a52703b2
JB		 261 */
262enum iwl_ucode_tlv_api {
678d9b6d 263 /* API Set 0 */
859d914c
JB		 264 IWL_UCODE_TLV_API_FRAGMENTED_SCAN = (__force iwl_ucode_tlv_api_t)8,
265 IWL_UCODE_TLV_API_WIFI_MCC_UPDATE = (__force iwl_ucode_tlv_api_t)9,
859d914c 266 IWL_UCODE_TLV_API_LQ_SS_PARAMS = (__force iwl_ucode_tlv_api_t)18,
4b87e5af 267 IWL_UCODE_TLV_API_NEW_VERSION = (__force iwl_ucode_tlv_api_t)20,
aacf8f18 268 IWL_UCODE_TLV_API_SCAN_TSF_REPORT = (__force iwl_ucode_tlv_api_t)28,
45c458b4 269 IWL_UCODE_TLV_API_TKIP_MIC_KEYS = (__force iwl_ucode_tlv_api_t)29,
ced19f26 270 IWL_UCODE_TLV_API_STA_TYPE = (__force iwl_ucode_tlv_api_t)30,
1247070d 271 IWL_UCODE_TLV_API_NAN2_VER2 = (__force iwl_ucode_tlv_api_t)31,
678d9b6d 272 /* API Set 1 */
dac4df1c 273 IWL_UCODE_TLV_API_ADAPTIVE_DWELL = (__force iwl_ucode_tlv_api_t)32,
8f691af9 274 IWL_UCODE_TLV_API_OCE = (__force iwl_ucode_tlv_api_t)33,
6ca33f8b 275 IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE = (__force iwl_ucode_tlv_api_t)34,
678d9b6d 276 IWL_UCODE_TLV_API_NEW_RX_STATS = (__force iwl_ucode_tlv_api_t)35,
2afa6a73 277 IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL = (__force iwl_ucode_tlv_api_t)36,
72cbb73e 278 IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY = (__force iwl_ucode_tlv_api_t)38,
57df3839 279 IWL_UCODE_TLV_API_DEPRECATE_TTAK = (__force iwl_ucode_tlv_api_t)41,
66fa2424 280 IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2 = (__force iwl_ucode_tlv_api_t)42,
4c2f445c 281 IWL_UCODE_TLV_API_FRAG_EBS = (__force iwl_ucode_tlv_api_t)44,
0791c2fc 282 IWL_UCODE_TLV_API_REDUCE_TX_POWER = (__force iwl_ucode_tlv_api_t)45,
d3f555f4
JB		 283
284 NUM_IWL_UCODE_TLV_API
285#ifdef __CHECKER__
286 /* sparse says it cannot increment the previous enum member */
287 = 128
288#endif
a52703b2
JB		 289};
290
9efeccac 291typedef unsigned int __bitwise iwl_ucode_tlv_capa_t;
859d914c 292
a52703b2
JB		 293/**
294 * enum iwl_ucode_tlv_capa - ucode capabilities
295 * @IWL_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3
296 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT: supports Location Aware Regulatory
297 * @IWL_UCODE_TLV_CAPA_UMAC_SCAN: supports UMAC scan.
3d44eebf 298 * @IWL_UCODE_TLV_CAPA_BEAMFORMER: supports Beamformer
ce792918 299 * @IWL_UCODE_TLV_CAPA_TOF_SUPPORT: supports Time of Flight (802.11mc FTM)
a52703b2
JB		 300 * @IWL_UCODE_TLV_CAPA_TDLS_SUPPORT: support basic TDLS functionality
301 * @IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT: supports insertion of current
302 * tx power value into TPC Report action frame and Link Measurement Report
303 * action frame
304 * @IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT: supports updating current
305 * channel in DS parameter set element in probe requests.
306 * @IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT: supports adding TPC Report IE in
307 * probe requests.
308 * @IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT: supports Quiet Period requests
309 * @IWL_UCODE_TLV_CAPA_DQA_SUPPORT: supports dynamic queue allocation (DQA),
310 * which also implies support for the scheduler configuration command
311 * @IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching
23ae6128 312 * @IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image
a52703b2 313 * @IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command
0becb377 314 * @IWL_UCODE_TLV_CAPA_DC2DC_SUPPORT: supports DC2DC Command
93190fb0 315 * @IWL_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload
91a8bcde 316 * @IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics
c5241b0c
AS		 317 * @IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD: supports U-APSD on p2p interface when it
318 * is standalone or with a BSS station interface in the same binding.
0522588d 319 * @IWL_UCODE_TLV_CAPA_BT_COEX_PLCR: enabled BT Coex packet level co-running
4d165d12
AN		 320 * @IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different
321 * sources for the MCC. This TLV bit is a future replacement to
322 * IWL_UCODE_TLV_API_WIFI_MCC_UPDATE. When either is set, multi-source LAR
323 * is supported.
70e90992 324 * @IWL_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC
266ab689 325 * @IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan (no longer used)
65e25482 326 * @IWL_UCODE_TLV_CAPA_STA_PM_NOTIF: firmware will send STA PM notification
ecaf71de 327 * @IWL_UCODE_TLV_CAPA_TLC_OFFLOAD: firmware implements rate scaling algorithm
dad3340f 328 * @IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA: firmware implements quota related
50f067b3 329 * @IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2: firmware implements Coex Schema 2
78efc702 330 * @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement
b08dbed7 331 * @IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts
e7c2e1fd 332 * @IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT: supports bt-coex Multi-priority LUT
d3a108a4
AO		 333 * @IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD: the firmware supports CSA
334 * countdown offloading. Beacon notifications are not sent to the host.
335 * The fw also offloads TBTT alignment.
1e3c3c35
EG		 336 * @IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION: firmware will decide on what
337 * antenna the beacon should be transmitted
0db056d3
SS		 338 * @IWL_UCODE_TLV_CAPA_BEACON_STORING: firmware will store the latest beacon
339 * from AP and will send it upon d0i3 exit.
6fa52430 340 * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V2: support LAR API V2
0a3b7119
CRI		 341 * @IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW: firmware responsible for CT-kill
342 * @IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT: supports temperature
343 * thresholds reporting
5c89e7bc 344 * @IWL_UCODE_TLV_CAPA_CTDP_SUPPORT: supports cTDP command
3d2d4422
GBA		 345 * @IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED: supports usniffer enabled in
346 * regular image.
5b086414
GBA		 347 * @IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG: support getting more shared
348 * memory addresses from the firmware.
03098268 349 * @IWL_UCODE_TLV_CAPA_LQM_SUPPORT: supports Link Quality Measurement
55bfa4b9
LC		 350 * @IWL_UCODE_TLV_CAPA_TX_POWER_ACK: reduced TX power API has larger
351 * command size (command version 4) that supports toggling ACK TX
352 * power reduction.
58877d74 353 * @IWL_UCODE_TLV_CAPA_MLME_OFFLOAD: supports MLME offload
2d8c2615 354 * @IWL_UCODE_TLV_CAPA_D3_DEBUG: supports debug recording during D3
d3f555f4
JB		 355 *
356 * @NUM_IWL_UCODE_TLV_CAPA: number of bits used
a52703b2
JB		 357 */
358enum iwl_ucode_tlv_capa {
859d914c
JB		 359 IWL_UCODE_TLV_CAPA_D0I3_SUPPORT = (__force iwl_ucode_tlv_capa_t)0,
360 IWL_UCODE_TLV_CAPA_LAR_SUPPORT = (__force iwl_ucode_tlv_capa_t)1,
361 IWL_UCODE_TLV_CAPA_UMAC_SCAN = (__force iwl_ucode_tlv_capa_t)2,
362 IWL_UCODE_TLV_CAPA_BEAMFORMER = (__force iwl_ucode_tlv_capa_t)3,
ce792918 363 IWL_UCODE_TLV_CAPA_TOF_SUPPORT = (__force iwl_ucode_tlv_capa_t)5,
859d914c
JB		 364 IWL_UCODE_TLV_CAPA_TDLS_SUPPORT = (__force iwl_ucode_tlv_capa_t)6,
365 IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT = (__force iwl_ucode_tlv_capa_t)8,
366 IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)9,
367 IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)10,
368 IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT = (__force iwl_ucode_tlv_capa_t)11,
369 IWL_UCODE_TLV_CAPA_DQA_SUPPORT = (__force iwl_ucode_tlv_capa_t)12,
370 IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH = (__force iwl_ucode_tlv_capa_t)13,
23ae6128 371 IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG = (__force iwl_ucode_tlv_capa_t)17,
859d914c 372 IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT = (__force iwl_ucode_tlv_capa_t)18,
0becb377 373 IWL_UCODE_TLV_CAPA_DC2DC_CONFIG_SUPPORT = (__force iwl_ucode_tlv_capa_t)19,
93190fb0 374 IWL_UCODE_TLV_CAPA_CSUM_SUPPORT = (__force iwl_ucode_tlv_capa_t)21,
859d914c 375 IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS = (__force iwl_ucode_tlv_capa_t)22,
c5241b0c 376 IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD = (__force iwl_ucode_tlv_capa_t)26,
859d914c
JB		 377 IWL_UCODE_TLV_CAPA_BT_COEX_PLCR = (__force iwl_ucode_tlv_capa_t)28,
378 IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC = (__force iwl_ucode_tlv_capa_t)29,
379 IWL_UCODE_TLV_CAPA_BT_COEX_RRC = (__force iwl_ucode_tlv_capa_t)30,
17564dde 380 IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)31,
65e25482 381 IWL_UCODE_TLV_CAPA_STA_PM_NOTIF = (__force iwl_ucode_tlv_capa_t)38,
9415af7f
SS		 382 IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)39,
383 IWL_UCODE_TLV_CAPA_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)40,
fcea37b2 384 IWL_UCODE_TLV_CAPA_D0I3_END_FIRST = (__force iwl_ucode_tlv_capa_t)41,
ecaf71de 385 IWL_UCODE_TLV_CAPA_TLC_OFFLOAD = (__force iwl_ucode_tlv_capa_t)43,
dad3340f 386 IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA = (__force iwl_ucode_tlv_capa_t)44,
50f067b3 387 IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2 = (__force iwl_ucode_tlv_capa_t)45,
78efc702 388 IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE = (__force iwl_ucode_tlv_capa_t)64,
b08dbed7 389 IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS = (__force iwl_ucode_tlv_capa_t)65,
e7c2e1fd 390 IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT = (__force iwl_ucode_tlv_capa_t)67,
81f02ba3 391 IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT = (__force iwl_ucode_tlv_capa_t)68,
d3a108a4 392 IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD = (__force iwl_ucode_tlv_capa_t)70,
1e3c3c35 393 IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION = (__force iwl_ucode_tlv_capa_t)71,
0db056d3 394 IWL_UCODE_TLV_CAPA_BEACON_STORING = (__force iwl_ucode_tlv_capa_t)72,
6fa52430 395 IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V2 = (__force iwl_ucode_tlv_capa_t)73,
0a3b7119
CRI		 396 IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW = (__force iwl_ucode_tlv_capa_t)74,
397 IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT = (__force iwl_ucode_tlv_capa_t)75,
5c89e7bc 398 IWL_UCODE_TLV_CAPA_CTDP_SUPPORT = (__force iwl_ucode_tlv_capa_t)76,
3d2d4422 399 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED = (__force iwl_ucode_tlv_capa_t)77,
5b086414 400 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG = (__force iwl_ucode_tlv_capa_t)80,
03098268 401 IWL_UCODE_TLV_CAPA_LQM_SUPPORT = (__force iwl_ucode_tlv_capa_t)81,
55bfa4b9 402 IWL_UCODE_TLV_CAPA_TX_POWER_ACK = (__force iwl_ucode_tlv_capa_t)84,
2eabc84d 403 IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT = (__force iwl_ucode_tlv_capa_t)86,
2d8c2615 404 IWL_UCODE_TLV_CAPA_D3_DEBUG = (__force iwl_ucode_tlv_capa_t)87,
58877d74 405 IWL_UCODE_TLV_CAPA_MLME_OFFLOAD = (__force iwl_ucode_tlv_capa_t)96,
d3f555f4
JB		 406
407 NUM_IWL_UCODE_TLV_CAPA
408#ifdef __CHECKER__
409 /* sparse says it cannot increment the previous enum member */
410 = 128
411#endif
a52703b2
JB		 412};
413
414/* The default calibrate table size if not specified by firmware file */
415#define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18
416#define IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE 19
417#define IWL_MAX_PHY_CALIBRATE_TBL_SIZE 253
418
419/* The default max probe length if not specified by the firmware file */
420#define IWL_DEFAULT_MAX_PROBE_LENGTH 200
421
422/*
423 * For 16.0 uCode and above, there is no differentiation between sections,
424 * just an offset to the HW address.
425 */
a52703b2 426#define CPU1_CPU2_SEPARATOR_SECTION 0xFFFFCCCC
a6c4fb44 427#define PAGING_SEPARATOR_SECTION 0xAAAABBBB
a52703b2
JB		 428
429/* uCode version contains 4 values: Major/Minor/API/Serial */
430#define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24)
431#define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16)
432#define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8)
433#define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF)
434
31a658b2
JB		 435/**
436 * struct iwl_tlv_calib_ctrl - Calibration control struct.
a52703b2
JB		 437 * Sent as part of the phy configuration command.
438 * @flow_trigger: bitmap for which calibrations to perform according to
439 * flow triggers.
440 * @event_trigger: bitmap for which calibrations to perform according to
441 * event triggers.
442 */
443struct iwl_tlv_calib_ctrl {
444 __le32 flow_trigger;
445 __le32 event_trigger;
446} __packed;
447
448enum iwl_fw_phy_cfg {
449 FW_PHY_CFG_RADIO_TYPE_POS = 0,
450 FW_PHY_CFG_RADIO_TYPE = 0x3 << FW_PHY_CFG_RADIO_TYPE_POS,
451 FW_PHY_CFG_RADIO_STEP_POS = 2,
452 FW_PHY_CFG_RADIO_STEP = 0x3 << FW_PHY_CFG_RADIO_STEP_POS,
453 FW_PHY_CFG_RADIO_DASH_POS = 4,
454 FW_PHY_CFG_RADIO_DASH = 0x3 << FW_PHY_CFG_RADIO_DASH_POS,
455 FW_PHY_CFG_TX_CHAIN_POS = 16,
456 FW_PHY_CFG_TX_CHAIN = 0xf << FW_PHY_CFG_TX_CHAIN_POS,
457 FW_PHY_CFG_RX_CHAIN_POS = 20,
458 FW_PHY_CFG_RX_CHAIN = 0xf << FW_PHY_CFG_RX_CHAIN_POS,
86a2b204 459 FW_PHY_CFG_SHARED_CLK = BIT(31),
a52703b2
JB		 460};
461
462#define IWL_UCODE_MAX_CS 1
463
464/**
465 * struct iwl_fw_cipher_scheme - a cipher scheme supported by FW.
466 * @cipher: a cipher suite selector
467 * @flags: cipher scheme flags (currently reserved for a future use)
468 * @hdr_len: a size of MPDU security header
469 * @pn_len: a size of PN
470 * @pn_off: an offset of pn from the beginning of the security header
471 * @key_idx_off: an offset of key index byte in the security header
472 * @key_idx_mask: a bit mask of key_idx bits
473 * @key_idx_shift: bit shift needed to get key_idx
474 * @mic_len: mic length in bytes
475 * @hw_cipher: a HW cipher index used in host commands
476 */
477struct iwl_fw_cipher_scheme {
478 __le32 cipher;
479 u8 flags;
480 u8 hdr_len;
481 u8 pn_len;
482 u8 pn_off;
483 u8 key_idx_off;
484 u8 key_idx_mask;
485 u8 key_idx_shift;
486 u8 mic_len;
487 u8 hw_cipher;
488} __packed;
489
490fefeb
LK		 490enum iwl_fw_dbg_reg_operator {
491 CSR_ASSIGN,
492 CSR_SETBIT,
493 CSR_CLEARBIT,
494
495 PRPH_ASSIGN,
496 PRPH_SETBIT,
497 PRPH_CLEARBIT,
869f3b15
HD		 498
499 INDIRECT_ASSIGN,
500 INDIRECT_SETBIT,
501 INDIRECT_CLEARBIT,
502
503 PRPH_BLOCKBIT,
490fefeb
LK		 504};
505
506/**
507 * struct iwl_fw_dbg_reg_op - an operation on a register
508 *
69d22e73 509 * @op: &enum iwl_fw_dbg_reg_operator
490fefeb
LK		 510 * @addr: offset of the register
511 * @val: value
512 */
513struct iwl_fw_dbg_reg_op {
514 u8 op;
515 u8 reserved[3];
516 __le32 addr;
517 __le32 val;
518} __packed;
519
520/**
521 * enum iwl_fw_dbg_monitor_mode - available monitor recording modes
522 *
523 * @SMEM_MODE: monitor stores the data in SMEM
524 * @EXTERNAL_MODE: monitor stores the data in allocated DRAM
525 * @MARBH_MODE: monitor stores the data in MARBH buffer
6a8ac59c 526 * @MIPI_MODE: monitor outputs the data through the MIPI interface
490fefeb
LK		 527 */
528enum iwl_fw_dbg_monitor_mode {
529 SMEM_MODE = 0,
530 EXTERNAL_MODE = 1,
531 MARBH_MODE = 2,
6a8ac59c 532 MIPI_MODE = 3,
490fefeb
LK		 533};
534
5bdaa0ef
JB		 535/**
536 * enum iwl_fw_mem_seg_type - memory segment type
537 * @FW_DBG_MEM_TYPE_MASK: mask for the type indication
538 * @FW_DBG_MEM_TYPE_REGULAR: regular memory
539 * @FW_DBG_MEM_TYPE_PRPH: periphery memory (requires special reading)
540 */
541enum iwl_fw_mem_seg_type {
542 FW_DBG_MEM_TYPE_MASK = 0xff000000,
543 FW_DBG_MEM_TYPE_REGULAR = 0x00000000,
544 FW_DBG_MEM_TYPE_PRPH = 0x01000000,
545};
546
a6017b90
GBA		 547/**
548 * struct iwl_fw_dbg_mem_seg_tlv - configures the debug data memory segments
549 *
5bdaa0ef
JB		 550 * @data_type: the memory segment type to record, see &enum iwl_fw_mem_seg_type
551 * for what we care about
a6017b90
GBA		 552 * @ofs: the memory segment offset
553 * @len: the memory segment length, in bytes
554 *
555 * This parses IWL_UCODE_TLV_FW_MEM_SEG
556 */
557struct iwl_fw_dbg_mem_seg_tlv {
558 __le32 data_type;
559 __le32 ofs;
560 __le32 len;
561} __packed;
562
490fefeb 563/**
fd527eb5 564 * struct iwl_fw_dbg_dest_tlv_v1 - configures the destination of the debug data
490fefeb
LK		 565 *
566 * @version: version of the TLV - currently 0
69d22e73 567 * @monitor_mode: &enum iwl_fw_dbg_monitor_mode
96c285da 568 * @size_power: buffer size will be 2^(size_power + 11)
490fefeb
LK		 569 * @base_reg: addr of the base addr register (PRPH)
570 * @end_reg: addr of the end addr register (PRPH)
571 * @write_ptr_reg: the addr of the reg of the write pointer
572 * @wrap_count: the addr of the reg of the wrap_count
573 * @base_shift: shift right of the base addr reg
574 * @end_shift: shift right of the end addr reg
575 * @reg_ops: array of registers operations
576 *
577 * This parses IWL_UCODE_TLV_FW_DBG_DEST
578 */
fd527eb5 579struct iwl_fw_dbg_dest_tlv_v1 {
490fefeb
LK		 580 u8 version;
581 u8 monitor_mode;
96c285da
EG		 582 u8 size_power;
583 u8 reserved;
490fefeb
LK		 584 __le32 base_reg;
585 __le32 end_reg;
586 __le32 write_ptr_reg;
587 __le32 wrap_count;
588 u8 base_shift;
589 u8 end_shift;
590 struct iwl_fw_dbg_reg_op reg_ops[0];
591} __packed;
592
fd527eb5
GBA		 593/* Mask of the register for defining the LDBG MAC2SMEM buffer SMEM size */
594#define IWL_LDBG_M2S_BUF_SIZE_MSK 0x0fff0000
595/* Mask of the register for defining the LDBG MAC2SMEM SMEM base address */
596#define IWL_LDBG_M2S_BUF_BA_MSK 0x00000fff
597/* The smem buffer chunks are in units of 256 bits */
598#define IWL_M2S_UNIT_SIZE 0x100
599
600struct iwl_fw_dbg_dest_tlv {
601 u8 version;
602 u8 monitor_mode;
603 u8 size_power;
604 u8 reserved;
605 __le32 cfg_reg;
606 __le32 write_ptr_reg;
607 __le32 wrap_count;
608 u8 base_shift;
609 u8 size_shift;
610 struct iwl_fw_dbg_reg_op reg_ops[0];
611} __packed;
612
490fefeb
LK		 613struct iwl_fw_dbg_conf_hcmd {
614 u8 id;
615 u8 reserved;
616 __le16 len;
617 u8 data[0];
618} __packed;
619
620/**
d2709ad7 621 * enum iwl_fw_dbg_trigger_mode - triggers functionalities
490fefeb 622 *
d2709ad7
EG		 623 * @IWL_FW_DBG_TRIGGER_START: when trigger occurs re-conf the dbg mechanism
624 * @IWL_FW_DBG_TRIGGER_STOP: when trigger occurs pull the dbg data
36fb9017
OG		 625 * @IWL_FW_DBG_TRIGGER_MONITOR_ONLY: when trigger occurs trigger is set to
626 * collect only monitor data
490fefeb 627 */
d2709ad7
EG		 628enum iwl_fw_dbg_trigger_mode {
629 IWL_FW_DBG_TRIGGER_START = BIT(0),
630 IWL_FW_DBG_TRIGGER_STOP = BIT(1),
36fb9017 631 IWL_FW_DBG_TRIGGER_MONITOR_ONLY = BIT(2),
d2709ad7 632};
490fefeb 633
378c8931
SM		 634/**
635 * enum iwl_fw_dbg_trigger_flags - the flags supported by wrt triggers
636 * @IWL_FW_DBG_FORCE_RESTART: force a firmware restart
637 */
638enum iwl_fw_dbg_trigger_flags {
639 IWL_FW_DBG_FORCE_RESTART = BIT(0),
640};
641
490fefeb 642/**
d2709ad7
EG		 643 * enum iwl_fw_dbg_trigger_vif_type - define the VIF type for a trigger
644 * @IWL_FW_DBG_CONF_VIF_ANY: any vif type
645 * @IWL_FW_DBG_CONF_VIF_IBSS: IBSS mode
646 * @IWL_FW_DBG_CONF_VIF_STATION: BSS mode
647 * @IWL_FW_DBG_CONF_VIF_AP: AP mode
648 * @IWL_FW_DBG_CONF_VIF_P2P_CLIENT: P2P Client mode
649 * @IWL_FW_DBG_CONF_VIF_P2P_GO: P2P GO mode
650 * @IWL_FW_DBG_CONF_VIF_P2P_DEVICE: P2P device
490fefeb 651 */
d2709ad7
EG		 652enum iwl_fw_dbg_trigger_vif_type {
653 IWL_FW_DBG_CONF_VIF_ANY = NL80211_IFTYPE_UNSPECIFIED,
654 IWL_FW_DBG_CONF_VIF_IBSS = NL80211_IFTYPE_ADHOC,
655 IWL_FW_DBG_CONF_VIF_STATION = NL80211_IFTYPE_STATION,
656 IWL_FW_DBG_CONF_VIF_AP = NL80211_IFTYPE_AP,
657 IWL_FW_DBG_CONF_VIF_P2P_CLIENT = NL80211_IFTYPE_P2P_CLIENT,
658 IWL_FW_DBG_CONF_VIF_P2P_GO = NL80211_IFTYPE_P2P_GO,
659 IWL_FW_DBG_CONF_VIF_P2P_DEVICE = NL80211_IFTYPE_P2P_DEVICE,
490fefeb
LK		 660};
661
662/**
d2709ad7 663 * struct iwl_fw_dbg_trigger_tlv - a TLV that describes the trigger
69d22e73
JB		 664 * @id: &enum iwl_fw_dbg_trigger
665 * @vif_type: &enum iwl_fw_dbg_trigger_vif_type
d2709ad7
EG		 666 * @stop_conf_ids: bitmap of configurations this trigger relates to.
667 * if the mode is %IWL_FW_DBG_TRIGGER_STOP, then if the bit corresponding
668 * to the currently running configuration is set, the data should be
669 * collected.
670 * @stop_delay: how many milliseconds to wait before collecting the data
671 * after the STOP trigger fires.
69d22e73 672 * @mode: &enum iwl_fw_dbg_trigger_mode - can be stop / start of both
d2709ad7
EG		 673 * @start_conf_id: if mode is %IWL_FW_DBG_TRIGGER_START, this defines what
674 * configuration should be applied when the triggers kicks in.
675 * @occurrences: number of occurrences. 0 means the trigger will never fire.
a977a150
GBA		 676 * @trig_dis_ms: the time, in milliseconds, after an occurrence of this
677 * trigger in which another occurrence should be ignored.
378c8931 678 * @flags: &enum iwl_fw_dbg_trigger_flags
d2709ad7
EG		 679 */
680struct iwl_fw_dbg_trigger_tlv {
681 __le32 id;
682 __le32 vif_type;
683 __le32 stop_conf_ids;
684 __le32 stop_delay;
685 u8 mode;
686 u8 start_conf_id;
687 __le16 occurrences;
a977a150 688 __le16 trig_dis_ms;
378c8931
SM		 689 u8 flags;
690 u8 reserved[5];
d2709ad7
EG		 691
692 u8 data[0];
693} __packed;
694
695#define FW_DBG_START_FROM_ALIVE 0
696#define FW_DBG_CONF_MAX 32
697#define FW_DBG_INVALID 0xff
698
9d761fd8
EG		 699/**
700 * struct iwl_fw_dbg_trigger_missed_bcon - configures trigger for missed beacons
701 * @stop_consec_missed_bcon: stop recording if threshold is crossed.
702 * @stop_consec_missed_bcon_since_rx: stop recording if threshold is crossed.
703 * @start_consec_missed_bcon: start recording if threshold is crossed.
704 * @start_consec_missed_bcon_since_rx: start recording if threshold is crossed.
705 * @reserved1: reserved
706 * @reserved2: reserved
707 */
708struct iwl_fw_dbg_trigger_missed_bcon {
709 __le32 stop_consec_missed_bcon;
710 __le32 stop_consec_missed_bcon_since_rx;
711 __le32 reserved2[2];
712 __le32 start_consec_missed_bcon;
713 __le32 start_consec_missed_bcon_since_rx;
714 __le32 reserved1[2];
715} __packed;
716
917f39bb
EG		 717/**
718 * struct iwl_fw_dbg_trigger_cmd - configures trigger for messages from FW.
719 * cmds: the list of commands to trigger the collection on
720 */
721struct iwl_fw_dbg_trigger_cmd {
722 struct cmd {
723 u8 cmd_id;
724 u8 group_id;
725 } __packed cmds[16];
726} __packed;
727
5a756c20
EG		 728/**
729 * iwl_fw_dbg_trigger_stats - configures trigger for statistics
730 * @stop_offset: the offset of the value to be monitored
731 * @stop_threshold: the threshold above which to collect
732 * @start_offset: the offset of the value to be monitored
733 * @start_threshold: the threshold above which to start recording
734 */
735struct iwl_fw_dbg_trigger_stats {
736 __le32 stop_offset;
737 __le32 stop_threshold;
738 __le32 start_offset;
739 __le32 start_threshold;
740} __packed;
741
3ec50b5e
EG		 742/**
743 * struct iwl_fw_dbg_trigger_low_rssi - trigger for low beacon RSSI
744 * @rssi: RSSI value to trigger at
745 */
746struct iwl_fw_dbg_trigger_low_rssi {
747 __le32 rssi;
748} __packed;
749
d42f5350
EG		 750/**
751 * struct iwl_fw_dbg_trigger_mlme - configures trigger for mlme events
752 * @stop_auth_denied: number of denied authentication to collect
753 * @stop_auth_timeout: number of authentication timeout to collect
754 * @stop_rx_deauth: number of Rx deauth before to collect
755 * @stop_tx_deauth: number of Tx deauth before to collect
756 * @stop_assoc_denied: number of denied association to collect
757 * @stop_assoc_timeout: number of association timeout to collect
31755207 758 * @stop_connection_loss: number of connection loss to collect
d42f5350
EG		 759 * @start_auth_denied: number of denied authentication to start recording
760 * @start_auth_timeout: number of authentication timeout to start recording
761 * @start_rx_deauth: number of Rx deauth to start recording
762 * @start_tx_deauth: number of Tx deauth to start recording
763 * @start_assoc_denied: number of denied association to start recording
764 * @start_assoc_timeout: number of association timeout to start recording
31755207 765 * @start_connection_loss: number of connection loss to start recording
d42f5350
EG		 766 */
767struct iwl_fw_dbg_trigger_mlme {
768 u8 stop_auth_denied;
769 u8 stop_auth_timeout;
770 u8 stop_rx_deauth;
771 u8 stop_tx_deauth;
772
773 u8 stop_assoc_denied;
774 u8 stop_assoc_timeout;
31755207
EG		 775 u8 stop_connection_loss;
776 u8 reserved;
d42f5350
EG		 777
778 u8 start_auth_denied;
779 u8 start_auth_timeout;
780 u8 start_rx_deauth;
781 u8 start_tx_deauth;
782
783 u8 start_assoc_denied;
784 u8 start_assoc_timeout;
31755207
EG		 785 u8 start_connection_loss;
786 u8 reserved2;
d42f5350
EG		 787} __packed;
788
5d42e7b2
EG		 789/**
790 * struct iwl_fw_dbg_trigger_txq_timer - configures the Tx queue's timer
791 * @command_queue: timeout for the command queue in ms
792 * @bss: timeout for the queues of a BSS (except for TDLS queues) in ms
793 * @softap: timeout for the queues of a softAP in ms
794 * @p2p_go: timeout for the queues of a P2P GO in ms
795 * @p2p_client: timeout for the queues of a P2P client in ms
796 * @p2p_device: timeout for the queues of a P2P device in ms
797 * @ibss: timeout for the queues of an IBSS in ms
798 * @tdls: timeout for the queues of a TDLS station in ms
799 */
800struct iwl_fw_dbg_trigger_txq_timer {
801 __le32 command_queue;
802 __le32 bss;
803 __le32 softap;
804 __le32 p2p_go;
805 __le32 p2p_client;
806 __le32 p2p_device;
807 __le32 ibss;
808 __le32 tdls;
809 __le32 reserved[4];
810} __packed;
811
874c174e
EG		 812/**
813 * struct iwl_fw_dbg_trigger_time_event - configures a time event trigger
814 * time_Events: a list of tuples <id, action_bitmap>. The driver will issue a
815 * trigger each time a time event notification that relates to time event
816 * id with one of the actions in the bitmap is received and
817 * BIT(notif->status) is set in status_bitmap.
818 *
819 */
820struct iwl_fw_dbg_trigger_time_event {
821 struct {
822 __le32 id;
823 __le32 action_bitmap;
824 __le32 status_bitmap;
825 } __packed time_events[16];
826} __packed;
827
4203263d
EG		 828/**
829 * struct iwl_fw_dbg_trigger_ba - configures BlockAck related trigger
830 * rx_ba_start: tid bitmap to configure on what tid the trigger should occur
831 * when an Rx BlockAck session is started.
832 * rx_ba_stop: tid bitmap to configure on what tid the trigger should occur
833 * when an Rx BlockAck session is stopped.
834 * tx_ba_start: tid bitmap to configure on what tid the trigger should occur
835 * when a Tx BlockAck session is started.
836 * tx_ba_stop: tid bitmap to configure on what tid the trigger should occur
837 * when a Tx BlockAck session is stopped.
838 * rx_bar: tid bitmap to configure on what tid the trigger should occur
839 * when a BAR is received (for a Tx BlockAck session).
840 * tx_bar: tid bitmap to configure on what tid the trigger should occur
841 * when a BAR is send (for an Rx BlocAck session).
842 * frame_timeout: tid bitmap to configure on what tid the trigger should occur
843 * when a frame times out in the reodering buffer.
844 */
845struct iwl_fw_dbg_trigger_ba {
846 __le16 rx_ba_start;
847 __le16 rx_ba_stop;
848 __le16 tx_ba_start;
849 __le16 tx_ba_stop;
850 __le16 rx_bar;
851 __le16 tx_bar;
852 __le16 frame_timeout;
853} __packed;
854
1e8f1329
GBA		 855/**
856 * struct iwl_fw_dbg_trigger_tdls - configures trigger for TDLS events.
857 * @action_bitmap: the TDLS action to trigger the collection upon
858 * @peer_mode: trigger on specific peer or all
859 * @peer: the TDLS peer to trigger the collection on
860 */
861struct iwl_fw_dbg_trigger_tdls {
862 u8 action_bitmap;
863 u8 peer_mode;
864 u8 peer[ETH_ALEN];
865 u8 reserved[4];
866} __packed;
867
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GBA		 868/**
869 * struct iwl_fw_dbg_trigger_tx_status - configures trigger for tx response
870 * status.
871 * @statuses: the list of statuses to trigger the collection on
872 */
873struct iwl_fw_dbg_trigger_tx_status {
874 struct tx_status {
875 u8 status;
876 u8 reserved[3];
877 } __packed statuses[16];
878 __le32 reserved[2];
879} __packed;
880
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EG		 881/**
882 * struct iwl_fw_dbg_conf_tlv - a TLV that describes a debug configuration.
883 * @id: conf id
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LK		 884 * @usniffer: should the uSniffer image be used
885 * @num_of_hcmds: how many HCMDs to send are present here
886 * @hcmd: a variable length host command to be sent to apply the configuration.
887 * If there is more than one HCMD to send, they will appear one after the
888 * other and be sent in the order that they appear in.
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EG		 889 * This parses IWL_UCODE_TLV_FW_DBG_CONF. The user can add up-to
890 * %FW_DBG_CONF_MAX configuration per run.
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LK		 891 */
892struct iwl_fw_dbg_conf_tlv {
893 u8 id;
894 u8 usniffer;
895 u8 reserved;
896 u8 num_of_hcmds;
897 struct iwl_fw_dbg_conf_hcmd hcmd;
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LK		 898} __packed;
899
3995deaf 900#endif /* __iwl_fw_file_h__ */
Linux 6.x block layer and io_uring tree(s)