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1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
8 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. | |
9 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH | |
10 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH | |
c4ace426 | 11 | * Copyright (C) 2018 - 2019 Intel Corporation |
d172a5ef JB |
12 | * |
13 | * This program is free software; you can redistribute it and/or modify | |
14 | * it under the terms of version 2 of the GNU General Public License as | |
15 | * published by the Free Software Foundation. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, but | |
18 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
20 | * General Public License for more details. | |
21 | * | |
22 | * The full GNU General Public License is included in this distribution | |
23 | * in the file called COPYING. | |
24 | * | |
25 | * Contact Information: | |
26 | * Intel Linux Wireless <linuxwifi@intel.com> | |
27 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
28 | * | |
29 | * BSD LICENSE | |
30 | * | |
31 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. | |
32 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH | |
33 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH | |
c4ace426 | 34 | * Copyright (C) 2018 - 2019 Intel Corporation |
d172a5ef JB |
35 | * All rights reserved. |
36 | * | |
37 | * Redistribution and use in source and binary forms, with or without | |
38 | * modification, are permitted provided that the following conditions | |
39 | * are met: | |
40 | * | |
41 | * * Redistributions of source code must retain the above copyright | |
42 | * notice, this list of conditions and the following disclaimer. | |
43 | * * Redistributions in binary form must reproduce the above copyright | |
44 | * notice, this list of conditions and the following disclaimer in | |
45 | * the documentation and/or other materials provided with the | |
46 | * distribution. | |
47 | * * Neither the name Intel Corporation nor the names of its | |
48 | * contributors may be used to endorse or promote products derived | |
49 | * from this software without specific prior written permission. | |
50 | * | |
51 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
52 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
53 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
54 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
55 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
56 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
57 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
58 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
59 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
60 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
61 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
62 | * | |
63 | *****************************************************************************/ | |
64 | ||
65 | #ifndef __iwl_fw_api_config_h__ | |
66 | #define __iwl_fw_api_config_h__ | |
67 | ||
68 | /* | |
69 | * struct iwl_dqa_enable_cmd | |
70 | * @cmd_queue: the TXQ number of the command queue | |
71 | */ | |
72 | struct iwl_dqa_enable_cmd { | |
73 | __le32 cmd_queue; | |
74 | } __packed; /* DQA_CONTROL_CMD_API_S_VER_1 */ | |
75 | ||
76 | /* | |
77 | * struct iwl_tx_ant_cfg_cmd | |
78 | * @valid: valid antenna configuration | |
79 | */ | |
80 | struct iwl_tx_ant_cfg_cmd { | |
81 | __le32 valid; | |
82 | } __packed; | |
83 | ||
84 | /** | |
85 | * struct iwl_calib_ctrl - Calibration control struct. | |
86 | * Sent as part of the phy configuration command. | |
87 | * @flow_trigger: bitmap for which calibrations to perform according to | |
88 | * flow triggers, using &enum iwl_calib_cfg | |
89 | * @event_trigger: bitmap for which calibrations to perform according to | |
90 | * event triggers, using &enum iwl_calib_cfg | |
91 | */ | |
92 | struct iwl_calib_ctrl { | |
93 | __le32 flow_trigger; | |
94 | __le32 event_trigger; | |
95 | } __packed; | |
96 | ||
97 | /* This enum defines the bitmap of various calibrations to enable in both | |
98 | * init ucode and runtime ucode through CALIBRATION_CFG_CMD. | |
99 | */ | |
100 | enum iwl_calib_cfg { | |
101 | IWL_CALIB_CFG_XTAL_IDX = BIT(0), | |
102 | IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1), | |
103 | IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2), | |
104 | IWL_CALIB_CFG_PAPD_IDX = BIT(3), | |
105 | IWL_CALIB_CFG_TX_PWR_IDX = BIT(4), | |
106 | IWL_CALIB_CFG_DC_IDX = BIT(5), | |
107 | IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6), | |
108 | IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7), | |
109 | IWL_CALIB_CFG_TX_IQ_IDX = BIT(8), | |
110 | IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9), | |
111 | IWL_CALIB_CFG_RX_IQ_IDX = BIT(10), | |
112 | IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11), | |
113 | IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12), | |
114 | IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13), | |
115 | IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14), | |
116 | IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15), | |
117 | IWL_CALIB_CFG_DAC_IDX = BIT(16), | |
118 | IWL_CALIB_CFG_ABS_IDX = BIT(17), | |
119 | IWL_CALIB_CFG_AGC_IDX = BIT(18), | |
120 | }; | |
121 | ||
c4ace426 GA |
122 | /** |
123 | * struct iwl_phy_specific_cfg - specific PHY filter configuration | |
124 | * | |
125 | * Sent as part of the phy configuration command (v3) to configure specific FW | |
126 | * defined PHY filters that can be applied to each antenna. | |
127 | * | |
128 | * @filter_cfg_chain_a: filter config id for LMAC1 chain A | |
129 | * @filter_cfg_chain_b: filter config id for LMAC1 chain B | |
130 | * @filter_cfg_chain_c: filter config id for LMAC2 chain A | |
131 | * @filter_cfg_chain_d: filter config id for LMAC2 chain B | |
132 | * values: 0 - no filter; 0xffffffff - reserved; otherwise - filter id | |
133 | */ | |
134 | struct iwl_phy_specific_cfg { | |
135 | __le32 filter_cfg_chain_a; | |
136 | __le32 filter_cfg_chain_b; | |
137 | __le32 filter_cfg_chain_c; | |
138 | __le32 filter_cfg_chain_d; | |
139 | } __packed; /* PHY_SPECIFIC_CONFIGURATION_API_VER_1*/ | |
140 | ||
d172a5ef JB |
141 | /** |
142 | * struct iwl_phy_cfg_cmd - Phy configuration command | |
c4ace426 | 143 | * |
d172a5ef JB |
144 | * @phy_cfg: PHY configuration value, uses &enum iwl_fw_phy_cfg |
145 | * @calib_control: calibration control data | |
146 | */ | |
c4ace426 | 147 | struct iwl_phy_cfg_cmd_v1 { |
d172a5ef JB |
148 | __le32 phy_cfg; |
149 | struct iwl_calib_ctrl calib_control; | |
150 | } __packed; | |
151 | ||
c4ace426 GA |
152 | /** |
153 | * struct iwl_phy_cfg_cmd_v3 - Phy configuration command (v3) | |
154 | * | |
155 | * @phy_cfg: PHY configuration value, uses &enum iwl_fw_phy_cfg | |
156 | * @calib_control: calibration control data | |
157 | * @phy_specific_cfg: configure predefined PHY filters | |
158 | */ | |
159 | struct iwl_phy_cfg_cmd_v3 { | |
160 | __le32 phy_cfg; | |
161 | struct iwl_calib_ctrl calib_control; | |
162 | struct iwl_phy_specific_cfg phy_specific_cfg; | |
163 | } __packed; /* PHY_CONFIGURATION_CMD_API_S_VER_3 */ | |
164 | ||
d172a5ef JB |
165 | /* |
166 | * enum iwl_dc2dc_config_id - flag ids | |
167 | * | |
168 | * Ids of dc2dc configuration flags | |
169 | */ | |
170 | enum iwl_dc2dc_config_id { | |
171 | DCDC_LOW_POWER_MODE_MSK_SET = 0x1, /* not used */ | |
172 | DCDC_FREQ_TUNE_SET = 0x2, | |
173 | }; /* MARKER_ID_API_E_VER_1 */ | |
174 | ||
175 | /** | |
176 | * struct iwl_dc2dc_config_cmd - configure dc2dc values | |
177 | * | |
178 | * (DC2DC_CONFIG_CMD = 0x83) | |
179 | * | |
180 | * Set/Get & configure dc2dc values. | |
181 | * The command always returns the current dc2dc values. | |
182 | * | |
183 | * @flags: set/get dc2dc | |
184 | * @enable_low_power_mode: not used. | |
185 | * @dc2dc_freq_tune0: frequency divider - digital domain | |
186 | * @dc2dc_freq_tune1: frequency divider - analog domain | |
187 | */ | |
188 | struct iwl_dc2dc_config_cmd { | |
189 | __le32 flags; | |
190 | __le32 enable_low_power_mode; /* not used */ | |
191 | __le32 dc2dc_freq_tune0; | |
192 | __le32 dc2dc_freq_tune1; | |
193 | } __packed; /* DC2DC_CONFIG_CMD_API_S_VER_1 */ | |
194 | ||
195 | /** | |
196 | * struct iwl_dc2dc_config_resp - response for iwl_dc2dc_config_cmd | |
197 | * | |
198 | * Current dc2dc values returned by the FW. | |
199 | * | |
200 | * @dc2dc_freq_tune0: frequency divider - digital domain | |
201 | * @dc2dc_freq_tune1: frequency divider - analog domain | |
202 | */ | |
203 | struct iwl_dc2dc_config_resp { | |
204 | __le32 dc2dc_freq_tune0; | |
205 | __le32 dc2dc_freq_tune1; | |
206 | } __packed; /* DC2DC_CONFIG_RESP_API_S_VER_1 */ | |
207 | ||
d172a5ef | 208 | #endif /* __iwl_fw_api_config_h__ */ |