Commit | Line | Data |
---|---|---|
b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
3f7bb3f3 RM |
2 | #ifndef B43_PHY_AC_H_ |
3 | #define B43_PHY_AC_H_ | |
4 | ||
5 | #include "phy_common.h" | |
6 | ||
7 | #define B43_PHY_AC_BBCFG 0x001 | |
8 | #define B43_PHY_AC_BBCFG_RSTCCA 0x4000 /* Reset CCA */ | |
9 | #define B43_PHY_AC_BANDCTL 0x003 /* Band control */ | |
10 | #define B43_PHY_AC_BANDCTL_5GHZ 0x0001 | |
11 | #define B43_PHY_AC_TABLE_ID 0x00d | |
12 | #define B43_PHY_AC_TABLE_OFFSET 0x00e | |
13 | #define B43_PHY_AC_TABLE_DATA1 0x00f | |
14 | #define B43_PHY_AC_TABLE_DATA2 0x010 | |
15 | #define B43_PHY_AC_TABLE_DATA3 0x011 | |
16 | #define B43_PHY_AC_CLASSCTL 0x140 /* Classifier control */ | |
17 | #define B43_PHY_AC_CLASSCTL_CCKEN 0x0001 /* CCK enable */ | |
18 | #define B43_PHY_AC_CLASSCTL_OFDMEN 0x0002 /* OFDM enable */ | |
19 | #define B43_PHY_AC_CLASSCTL_WAITEDEN 0x0004 /* Waited enable */ | |
20 | #define B43_PHY_AC_BW1A 0x371 | |
21 | #define B43_PHY_AC_BW2 0x372 | |
22 | #define B43_PHY_AC_BW3 0x373 | |
23 | #define B43_PHY_AC_BW4 0x374 | |
24 | #define B43_PHY_AC_BW5 0x375 | |
25 | #define B43_PHY_AC_BW6 0x376 | |
26 | #define B43_PHY_AC_RFCTL_CMD 0x408 | |
27 | #define B43_PHY_AC_C1_CLIP 0x6d4 | |
28 | #define B43_PHY_AC_C1_CLIP_DIS 0x4000 | |
29 | #define B43_PHY_AC_C2_CLIP 0x8d4 | |
30 | #define B43_PHY_AC_C2_CLIP_DIS 0x4000 | |
31 | #define B43_PHY_AC_C3_CLIP 0xad4 | |
32 | #define B43_PHY_AC_C3_CLIP_DIS 0x4000 | |
33 | ||
34 | struct b43_phy_ac { | |
35 | }; | |
36 | ||
37 | extern const struct b43_phy_operations b43_phyops_ac; | |
38 | ||
39 | #endif /* B43_PHY_AC_H_ */ |