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5b435de0 AS |
1 | /* |
2 | * Copyright (c) 2010 Broadcom Corporation | |
3 | * | |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY | |
11 | * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION | |
13 | * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN | |
14 | * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
17 | #ifndef _BRCM_PUB_H_ | |
18 | #define _BRCM_PUB_H_ | |
19 | ||
20 | #include <brcmu_wifi.h> | |
21 | #include "types.h" | |
22 | #include "defs.h" | |
23 | ||
24 | enum brcms_srom_id { | |
25 | BRCMS_SROM_NULL, | |
26 | BRCMS_SROM_CONT, | |
27 | BRCMS_SROM_AA2G, | |
28 | BRCMS_SROM_AA5G, | |
29 | BRCMS_SROM_AG0, | |
30 | BRCMS_SROM_AG1, | |
31 | BRCMS_SROM_AG2, | |
32 | BRCMS_SROM_AG3, | |
33 | BRCMS_SROM_ANTSWCTL2G, | |
34 | BRCMS_SROM_ANTSWCTL5G, | |
35 | BRCMS_SROM_ANTSWITCH, | |
36 | BRCMS_SROM_BOARDFLAGS2, | |
37 | BRCMS_SROM_BOARDFLAGS, | |
38 | BRCMS_SROM_BOARDNUM, | |
39 | BRCMS_SROM_BOARDREV, | |
40 | BRCMS_SROM_BOARDTYPE, | |
41 | BRCMS_SROM_BW40PO, | |
42 | BRCMS_SROM_BWDUPPO, | |
43 | BRCMS_SROM_BXA2G, | |
44 | BRCMS_SROM_BXA5G, | |
45 | BRCMS_SROM_CC, | |
46 | BRCMS_SROM_CCK2GPO, | |
47 | BRCMS_SROM_CCKBW202GPO, | |
48 | BRCMS_SROM_CCKBW20UL2GPO, | |
49 | BRCMS_SROM_CCODE, | |
50 | BRCMS_SROM_CDDPO, | |
51 | BRCMS_SROM_DEVID, | |
52 | BRCMS_SROM_ET1MACADDR, | |
53 | BRCMS_SROM_EXTPAGAIN2G, | |
54 | BRCMS_SROM_EXTPAGAIN5G, | |
55 | BRCMS_SROM_FREQOFFSET_CORR, | |
56 | BRCMS_SROM_HW_IQCAL_EN, | |
57 | BRCMS_SROM_IL0MACADDR, | |
58 | BRCMS_SROM_IQCAL_SWP_DIS, | |
59 | BRCMS_SROM_LEDBH0, | |
60 | BRCMS_SROM_LEDBH1, | |
61 | BRCMS_SROM_LEDBH2, | |
62 | BRCMS_SROM_LEDBH3, | |
63 | BRCMS_SROM_LEDDC, | |
64 | BRCMS_SROM_LEGOFDM40DUPPO, | |
65 | BRCMS_SROM_LEGOFDMBW202GPO, | |
66 | BRCMS_SROM_LEGOFDMBW205GHPO, | |
67 | BRCMS_SROM_LEGOFDMBW205GLPO, | |
68 | BRCMS_SROM_LEGOFDMBW205GMPO, | |
69 | BRCMS_SROM_LEGOFDMBW20UL2GPO, | |
70 | BRCMS_SROM_LEGOFDMBW20UL5GHPO, | |
71 | BRCMS_SROM_LEGOFDMBW20UL5GLPO, | |
72 | BRCMS_SROM_LEGOFDMBW20UL5GMPO, | |
73 | BRCMS_SROM_MACADDR, | |
74 | BRCMS_SROM_MCS2GPO0, | |
75 | BRCMS_SROM_MCS2GPO1, | |
76 | BRCMS_SROM_MCS2GPO2, | |
77 | BRCMS_SROM_MCS2GPO3, | |
78 | BRCMS_SROM_MCS2GPO4, | |
79 | BRCMS_SROM_MCS2GPO5, | |
80 | BRCMS_SROM_MCS2GPO6, | |
81 | BRCMS_SROM_MCS2GPO7, | |
82 | BRCMS_SROM_MCS32PO, | |
83 | BRCMS_SROM_MCS5GHPO0, | |
84 | BRCMS_SROM_MCS5GHPO1, | |
85 | BRCMS_SROM_MCS5GHPO2, | |
86 | BRCMS_SROM_MCS5GHPO3, | |
87 | BRCMS_SROM_MCS5GHPO4, | |
88 | BRCMS_SROM_MCS5GHPO5, | |
89 | BRCMS_SROM_MCS5GHPO6, | |
90 | BRCMS_SROM_MCS5GHPO7, | |
91 | BRCMS_SROM_MCS5GLPO0, | |
92 | BRCMS_SROM_MCS5GLPO1, | |
93 | BRCMS_SROM_MCS5GLPO2, | |
94 | BRCMS_SROM_MCS5GLPO3, | |
95 | BRCMS_SROM_MCS5GLPO4, | |
96 | BRCMS_SROM_MCS5GLPO5, | |
97 | BRCMS_SROM_MCS5GLPO6, | |
98 | BRCMS_SROM_MCS5GLPO7, | |
99 | BRCMS_SROM_MCS5GPO0, | |
100 | BRCMS_SROM_MCS5GPO1, | |
101 | BRCMS_SROM_MCS5GPO2, | |
102 | BRCMS_SROM_MCS5GPO3, | |
103 | BRCMS_SROM_MCS5GPO4, | |
104 | BRCMS_SROM_MCS5GPO5, | |
105 | BRCMS_SROM_MCS5GPO6, | |
106 | BRCMS_SROM_MCS5GPO7, | |
107 | BRCMS_SROM_MCSBW202GPO, | |
108 | BRCMS_SROM_MCSBW205GHPO, | |
109 | BRCMS_SROM_MCSBW205GLPO, | |
110 | BRCMS_SROM_MCSBW205GMPO, | |
111 | BRCMS_SROM_MCSBW20UL2GPO, | |
112 | BRCMS_SROM_MCSBW20UL5GHPO, | |
113 | BRCMS_SROM_MCSBW20UL5GLPO, | |
114 | BRCMS_SROM_MCSBW20UL5GMPO, | |
115 | BRCMS_SROM_MCSBW402GPO, | |
116 | BRCMS_SROM_MCSBW405GHPO, | |
117 | BRCMS_SROM_MCSBW405GLPO, | |
118 | BRCMS_SROM_MCSBW405GMPO, | |
119 | BRCMS_SROM_MEASPOWER, | |
120 | BRCMS_SROM_OFDM2GPO, | |
121 | BRCMS_SROM_OFDM5GHPO, | |
122 | BRCMS_SROM_OFDM5GLPO, | |
123 | BRCMS_SROM_OFDM5GPO, | |
124 | BRCMS_SROM_OPO, | |
125 | BRCMS_SROM_PA0B0, | |
126 | BRCMS_SROM_PA0B1, | |
127 | BRCMS_SROM_PA0B2, | |
128 | BRCMS_SROM_PA0ITSSIT, | |
129 | BRCMS_SROM_PA0MAXPWR, | |
130 | BRCMS_SROM_PA1B0, | |
131 | BRCMS_SROM_PA1B1, | |
132 | BRCMS_SROM_PA1B2, | |
133 | BRCMS_SROM_PA1HIB0, | |
134 | BRCMS_SROM_PA1HIB1, | |
135 | BRCMS_SROM_PA1HIB2, | |
136 | BRCMS_SROM_PA1HIMAXPWR, | |
137 | BRCMS_SROM_PA1ITSSIT, | |
138 | BRCMS_SROM_PA1LOB0, | |
139 | BRCMS_SROM_PA1LOB1, | |
140 | BRCMS_SROM_PA1LOB2, | |
141 | BRCMS_SROM_PA1LOMAXPWR, | |
142 | BRCMS_SROM_PA1MAXPWR, | |
143 | BRCMS_SROM_PDETRANGE2G, | |
144 | BRCMS_SROM_PDETRANGE5G, | |
145 | BRCMS_SROM_PHYCAL_TEMPDELTA, | |
146 | BRCMS_SROM_RAWTEMPSENSE, | |
147 | BRCMS_SROM_REGREV, | |
148 | BRCMS_SROM_REV, | |
149 | BRCMS_SROM_RSSISAV2G, | |
150 | BRCMS_SROM_RSSISAV5G, | |
151 | BRCMS_SROM_RSSISMC2G, | |
152 | BRCMS_SROM_RSSISMC5G, | |
153 | BRCMS_SROM_RSSISMF2G, | |
154 | BRCMS_SROM_RSSISMF5G, | |
155 | BRCMS_SROM_RXCHAIN, | |
156 | BRCMS_SROM_RXPO2G, | |
157 | BRCMS_SROM_RXPO5G, | |
158 | BRCMS_SROM_STBCPO, | |
159 | BRCMS_SROM_TEMPCORRX, | |
160 | BRCMS_SROM_TEMPOFFSET, | |
161 | BRCMS_SROM_TEMPSENSE_OPTION, | |
162 | BRCMS_SROM_TEMPSENSE_SLOPE, | |
163 | BRCMS_SROM_TEMPTHRESH, | |
164 | BRCMS_SROM_TRI2G, | |
165 | BRCMS_SROM_TRI5GH, | |
166 | BRCMS_SROM_TRI5GL, | |
167 | BRCMS_SROM_TRI5G, | |
168 | BRCMS_SROM_TRISO2G, | |
169 | BRCMS_SROM_TRISO5G, | |
170 | BRCMS_SROM_TSSIPOS2G, | |
171 | BRCMS_SROM_TSSIPOS5G, | |
172 | BRCMS_SROM_TXCHAIN, | |
5b435de0 AS |
173 | /* |
174 | * per-path identifiers (see srom.c) | |
175 | */ | |
176 | BRCMS_SROM_ITT2GA0, | |
177 | BRCMS_SROM_ITT2GA1, | |
178 | BRCMS_SROM_ITT2GA2, | |
179 | BRCMS_SROM_ITT2GA3, | |
180 | BRCMS_SROM_ITT5GA0, | |
181 | BRCMS_SROM_ITT5GA1, | |
182 | BRCMS_SROM_ITT5GA2, | |
183 | BRCMS_SROM_ITT5GA3, | |
184 | BRCMS_SROM_MAXP2GA0, | |
185 | BRCMS_SROM_MAXP2GA1, | |
186 | BRCMS_SROM_MAXP2GA2, | |
187 | BRCMS_SROM_MAXP2GA3, | |
188 | BRCMS_SROM_MAXP5GA0, | |
189 | BRCMS_SROM_MAXP5GA1, | |
190 | BRCMS_SROM_MAXP5GA2, | |
191 | BRCMS_SROM_MAXP5GA3, | |
192 | BRCMS_SROM_MAXP5GHA0, | |
193 | BRCMS_SROM_MAXP5GHA1, | |
194 | BRCMS_SROM_MAXP5GHA2, | |
195 | BRCMS_SROM_MAXP5GHA3, | |
196 | BRCMS_SROM_MAXP5GLA0, | |
197 | BRCMS_SROM_MAXP5GLA1, | |
198 | BRCMS_SROM_MAXP5GLA2, | |
199 | BRCMS_SROM_MAXP5GLA3, | |
200 | BRCMS_SROM_PA2GW0A0, | |
201 | BRCMS_SROM_PA2GW0A1, | |
202 | BRCMS_SROM_PA2GW0A2, | |
203 | BRCMS_SROM_PA2GW0A3, | |
204 | BRCMS_SROM_PA2GW1A0, | |
205 | BRCMS_SROM_PA2GW1A1, | |
206 | BRCMS_SROM_PA2GW1A2, | |
207 | BRCMS_SROM_PA2GW1A3, | |
208 | BRCMS_SROM_PA2GW2A0, | |
209 | BRCMS_SROM_PA2GW2A1, | |
210 | BRCMS_SROM_PA2GW2A2, | |
211 | BRCMS_SROM_PA2GW2A3, | |
5b435de0 AS |
212 | BRCMS_SROM_PA5GHW0A0, |
213 | BRCMS_SROM_PA5GHW0A1, | |
214 | BRCMS_SROM_PA5GHW0A2, | |
215 | BRCMS_SROM_PA5GHW0A3, | |
216 | BRCMS_SROM_PA5GHW1A0, | |
217 | BRCMS_SROM_PA5GHW1A1, | |
218 | BRCMS_SROM_PA5GHW1A2, | |
219 | BRCMS_SROM_PA5GHW1A3, | |
220 | BRCMS_SROM_PA5GHW2A0, | |
221 | BRCMS_SROM_PA5GHW2A1, | |
222 | BRCMS_SROM_PA5GHW2A2, | |
223 | BRCMS_SROM_PA5GHW2A3, | |
5b435de0 AS |
224 | BRCMS_SROM_PA5GLW0A0, |
225 | BRCMS_SROM_PA5GLW0A1, | |
226 | BRCMS_SROM_PA5GLW0A2, | |
227 | BRCMS_SROM_PA5GLW0A3, | |
228 | BRCMS_SROM_PA5GLW1A0, | |
229 | BRCMS_SROM_PA5GLW1A1, | |
230 | BRCMS_SROM_PA5GLW1A2, | |
231 | BRCMS_SROM_PA5GLW1A3, | |
232 | BRCMS_SROM_PA5GLW2A0, | |
233 | BRCMS_SROM_PA5GLW2A1, | |
234 | BRCMS_SROM_PA5GLW2A2, | |
235 | BRCMS_SROM_PA5GLW2A3, | |
5b435de0 AS |
236 | BRCMS_SROM_PA5GW0A0, |
237 | BRCMS_SROM_PA5GW0A1, | |
238 | BRCMS_SROM_PA5GW0A2, | |
239 | BRCMS_SROM_PA5GW0A3, | |
240 | BRCMS_SROM_PA5GW1A0, | |
241 | BRCMS_SROM_PA5GW1A1, | |
242 | BRCMS_SROM_PA5GW1A2, | |
243 | BRCMS_SROM_PA5GW1A3, | |
244 | BRCMS_SROM_PA5GW2A0, | |
245 | BRCMS_SROM_PA5GW2A1, | |
246 | BRCMS_SROM_PA5GW2A2, | |
247 | BRCMS_SROM_PA5GW2A3, | |
5b435de0 AS |
248 | }; |
249 | ||
250 | #define BRCMS_NUMRATES 16 /* max # of rates in a rateset */ | |
5b435de0 AS |
251 | |
252 | /* phy types */ | |
253 | #define PHY_TYPE_A 0 /* Phy type A */ | |
254 | #define PHY_TYPE_G 2 /* Phy type G */ | |
255 | #define PHY_TYPE_N 4 /* Phy type N */ | |
256 | #define PHY_TYPE_LP 5 /* Phy type Low Power A/B/G */ | |
257 | #define PHY_TYPE_SSN 6 /* Phy type Single Stream N */ | |
258 | #define PHY_TYPE_LCN 8 /* Phy type Single Stream N */ | |
259 | #define PHY_TYPE_LCNXN 9 /* Phy type 2-stream N */ | |
260 | #define PHY_TYPE_HT 7 /* Phy type 3-Stream N */ | |
261 | ||
262 | /* bw */ | |
263 | #define BRCMS_10_MHZ 10 /* 10Mhz nphy channel bandwidth */ | |
264 | #define BRCMS_20_MHZ 20 /* 20Mhz nphy channel bandwidth */ | |
265 | #define BRCMS_40_MHZ 40 /* 40Mhz nphy channel bandwidth */ | |
266 | ||
267 | #define BRCMS_RSSI_MINVAL -200 /* Low value, e.g. for forcing roam */ | |
268 | #define BRCMS_RSSI_NO_SIGNAL -91 /* NDIS RSSI link quality cutoffs */ | |
269 | #define BRCMS_RSSI_VERY_LOW -80 /* Very low quality cutoffs */ | |
270 | #define BRCMS_RSSI_LOW -70 /* Low quality cutoffs */ | |
271 | #define BRCMS_RSSI_GOOD -68 /* Good quality cutoffs */ | |
272 | #define BRCMS_RSSI_VERY_GOOD -58 /* Very good quality cutoffs */ | |
273 | #define BRCMS_RSSI_EXCELLENT -57 /* Excellent quality cutoffs */ | |
274 | ||
275 | /* a large TX Power as an init value to factor out of min() calculations, | |
276 | * keep low enough to fit in an s8, units are .25 dBm | |
277 | */ | |
278 | #define BRCMS_TXPWR_MAX (127) /* ~32 dBm = 1,500 mW */ | |
279 | ||
280 | /* rate related definitions */ | |
281 | #define BRCMS_RATE_FLAG 0x80 /* Flag to indicate it is a basic rate */ | |
282 | #define BRCMS_RATE_MASK 0x7f /* Rate value mask w/o basic rate flag */ | |
283 | ||
284 | /* legacy rx Antenna diversity for SISO rates */ | |
285 | #define ANT_RX_DIV_FORCE_0 0 /* Use antenna 0 */ | |
286 | #define ANT_RX_DIV_FORCE_1 1 /* Use antenna 1 */ | |
287 | #define ANT_RX_DIV_START_1 2 /* Choose starting with 1 */ | |
288 | #define ANT_RX_DIV_START_0 3 /* Choose starting with 0 */ | |
289 | #define ANT_RX_DIV_ENABLE 3 /* APHY bbConfig Enable RX Diversity */ | |
290 | /* default antdiv setting */ | |
291 | #define ANT_RX_DIV_DEF ANT_RX_DIV_START_0 | |
292 | ||
293 | /* legacy rx Antenna diversity for SISO rates */ | |
294 | /* Tx on antenna 0, "legacy term Main" */ | |
295 | #define ANT_TX_FORCE_0 0 | |
296 | /* Tx on antenna 1, "legacy term Aux" */ | |
297 | #define ANT_TX_FORCE_1 1 | |
298 | /* Tx on phy's last good Rx antenna */ | |
299 | #define ANT_TX_LAST_RX 3 | |
300 | /* driver's default tx antenna setting */ | |
301 | #define ANT_TX_DEF 3 | |
302 | ||
303 | /* Tx Chain values */ | |
304 | /* def bitmap of txchain */ | |
305 | #define TXCHAIN_DEF 0x1 | |
306 | /* default bitmap of tx chains for nphy */ | |
307 | #define TXCHAIN_DEF_NPHY 0x3 | |
308 | /* default bitmap of tx chains for nphy */ | |
309 | #define TXCHAIN_DEF_HTPHY 0x7 | |
310 | /* def bitmap of rxchain */ | |
311 | #define RXCHAIN_DEF 0x1 | |
312 | /* default bitmap of rx chains for nphy */ | |
313 | #define RXCHAIN_DEF_NPHY 0x3 | |
314 | /* default bitmap of rx chains for nphy */ | |
315 | #define RXCHAIN_DEF_HTPHY 0x7 | |
316 | /* no antenna switch */ | |
317 | #define ANTSWITCH_NONE 0 | |
318 | /* antenna switch on 4321CB2, 2of3 */ | |
319 | #define ANTSWITCH_TYPE_1 1 | |
320 | /* antenna switch on 4321MPCI, 2of3 */ | |
321 | #define ANTSWITCH_TYPE_2 2 | |
322 | /* antenna switch on 4322, 2of3 */ | |
323 | #define ANTSWITCH_TYPE_3 3 | |
324 | ||
325 | #define RXBUFSZ PKTBUFSZ | |
326 | ||
327 | #define MAX_STREAMS_SUPPORTED 4 /* max number of streams supported */ | |
328 | ||
329 | struct brcm_rateset { | |
330 | /* # rates in this set */ | |
331 | u32 count; | |
332 | /* rates in 500kbps units w/hi bit set if basic */ | |
333 | u8 rates[WL_NUMRATES]; | |
334 | }; | |
335 | ||
336 | struct brcms_c_rateset { | |
337 | uint count; /* number of rates in rates[] */ | |
338 | /* rates in 500kbps units w/hi bit set if basic */ | |
339 | u8 rates[BRCMS_NUMRATES]; | |
340 | u8 htphy_membership; /* HT PHY Membership */ | |
341 | u8 mcs[MCSSET_LEN]; /* supported mcs index bit map */ | |
342 | }; | |
343 | ||
344 | /* All the HT-specific default advertised capabilities (including AMPDU) | |
345 | * should be grouped here at one place | |
346 | */ | |
347 | #define AMPDU_DEF_MPDU_DENSITY 6 /* default mpdu density (110 ==> 4us) */ | |
348 | ||
349 | /* wlc internal bss_info */ | |
350 | struct brcms_bss_info { | |
351 | u8 BSSID[ETH_ALEN]; /* network BSSID */ | |
352 | u16 flags; /* flags for internal attributes */ | |
353 | u8 SSID_len; /* the length of SSID */ | |
354 | u8 SSID[32]; /* SSID string */ | |
355 | s16 RSSI; /* receive signal strength (in dBm) */ | |
356 | s16 SNR; /* receive signal SNR in dB */ | |
357 | u16 beacon_period; /* units are Kusec */ | |
358 | u16 chanspec; /* Channel num, bw, ctrl_sb and band */ | |
359 | struct brcms_c_rateset rateset; /* supported rates */ | |
360 | }; | |
361 | ||
362 | #define MAC80211_PROMISC_BCNS (1 << 0) | |
363 | #define MAC80211_SCAN (1 << 1) | |
364 | ||
365 | /* | |
366 | * Public portion of common driver state structure. | |
367 | * The wlc handle points at this. | |
368 | */ | |
369 | struct brcms_pub { | |
370 | struct brcms_c_info *wlc; | |
371 | struct ieee80211_hw *ieee_hw; | |
372 | struct scb_ampdu *global_ampdu; | |
373 | uint mac80211_state; | |
374 | uint unit; /* device instance number */ | |
375 | uint corerev; /* core revision */ | |
376 | struct si_pub *sih; /* SI handle (cookie for siutils calls) */ | |
377 | bool up; /* interface up and running */ | |
378 | bool hw_off; /* HW is off */ | |
379 | bool hw_up; /* one time hw up/down */ | |
380 | bool _piomode; /* true if pio mode */ | |
381 | uint _nbands; /* # bands supported */ | |
382 | uint now; /* # elapsed seconds */ | |
383 | ||
5b435de0 AS |
384 | bool delayed_down; /* down delayed */ |
385 | bool associated; /* true:part of [I]BSS, false: not */ | |
386 | /* (union of stas_associated, aps_associated) */ | |
387 | bool _ampdu; /* ampdu enabled or not */ | |
388 | u8 _n_enab; /* bitmap of 11N + HT support */ | |
389 | ||
390 | u8 cur_etheraddr[ETH_ALEN]; /* our local ethernet address */ | |
391 | ||
392 | int bcmerror; /* last bcm error */ | |
393 | ||
394 | u32 radio_disabled; /* bit vector for radio disabled reasons */ | |
395 | ||
396 | u16 boardrev; /* version # of particular board */ | |
397 | u8 sromrev; /* version # of the srom */ | |
398 | char srom_ccode[BRCM_CNTRY_BUF_SZ]; /* Country Code in SROM */ | |
399 | u32 boardflags; /* Board specific flags from srom */ | |
400 | u32 boardflags2; /* More board flags if sromrev >= 4 */ | |
401 | bool phy_11ncapable; /* the PHY/HW is capable of 802.11N */ | |
402 | ||
403 | struct wl_cnt *_cnt; /* low-level counters in driver */ | |
404 | }; | |
405 | ||
406 | enum wlc_par_id { | |
407 | IOV_MPC = 1, | |
408 | IOV_RTSTHRESH, | |
409 | IOV_QTXPOWER, | |
410 | IOV_BCN_LI_BCN /* Beacon listen interval in # of beacons */ | |
411 | }; | |
412 | ||
413 | /*********************************************** | |
414 | * Feature-related macros to optimize out code * | |
415 | * ********************************************* | |
416 | */ | |
417 | ||
418 | #define ENAB_1x1 0x01 | |
419 | #define ENAB_2x2 0x02 | |
420 | #define ENAB_3x3 0x04 | |
421 | #define ENAB_4x4 0x08 | |
422 | #define SUPPORT_11N (ENAB_1x1|ENAB_2x2) | |
423 | #define SUPPORT_HT (ENAB_1x1|ENAB_2x2|ENAB_3x3) | |
424 | ||
425 | /* WL11N Support */ | |
426 | #define AMPDU_AGG_HOST 1 | |
427 | ||
428 | /* pri is priority encoded in the packet. This maps the Packet priority to | |
429 | * enqueue precedence as defined in wlc_prec_map | |
430 | */ | |
431 | extern const u8 wlc_prio2prec_map[]; | |
432 | #define BRCMS_PRIO_TO_PREC(pri) wlc_prio2prec_map[(pri) & 7] | |
433 | ||
434 | #define BRCMS_PREC_COUNT 16 /* Max precedence level implemented */ | |
435 | ||
436 | /* Mask to describe all precedence levels */ | |
437 | #define BRCMS_PREC_BMP_ALL MAXBITVAL(BRCMS_PREC_COUNT) | |
438 | ||
439 | /* | |
440 | * This maps priority to one precedence higher - Used by PS-Poll response | |
441 | * packets to simulate enqueue-at-head operation, but still maintain the | |
442 | * order on the queue | |
443 | */ | |
444 | #define BRCMS_PRIO_TO_HI_PREC(pri) min(BRCMS_PRIO_TO_PREC(pri) + 1,\ | |
445 | BRCMS_PREC_COUNT - 1) | |
446 | ||
447 | /* Define a bitmap of precedences comprised by each AC */ | |
448 | #define BRCMS_PREC_BMP_AC_BE (NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_BE)) | \ | |
449 | NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_BE)) | \ | |
450 | NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_EE)) | \ | |
451 | NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_EE))) | |
452 | #define BRCMS_PREC_BMP_AC_BK (NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_BK)) | \ | |
453 | NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_BK)) | \ | |
454 | NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_NONE)) | \ | |
455 | NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_NONE))) | |
456 | #define BRCMS_PREC_BMP_AC_VI (NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_CL)) | \ | |
457 | NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_CL)) | \ | |
458 | NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_VI)) | \ | |
459 | NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_VI))) | |
460 | #define BRCMS_PREC_BMP_AC_VO (NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_VO)) | \ | |
461 | NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_VO)) | \ | |
462 | NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_NC)) | \ | |
463 | NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_NC))) | |
464 | ||
465 | /* network protection config */ | |
466 | #define BRCMS_PROT_G_SPEC 1 /* SPEC g protection */ | |
467 | #define BRCMS_PROT_G_OVR 2 /* SPEC g prot override */ | |
468 | #define BRCMS_PROT_G_USER 3 /* gmode specified by user */ | |
469 | #define BRCMS_PROT_OVERLAP 4 /* overlap */ | |
470 | #define BRCMS_PROT_N_USER 10 /* nmode specified by user */ | |
471 | #define BRCMS_PROT_N_CFG 11 /* n protection */ | |
472 | #define BRCMS_PROT_N_CFG_OVR 12 /* n protection override */ | |
473 | #define BRCMS_PROT_N_NONGF 13 /* non-GF protection */ | |
474 | #define BRCMS_PROT_N_NONGF_OVR 14 /* non-GF protection override */ | |
475 | #define BRCMS_PROT_N_PAM_OVR 15 /* n preamble override */ | |
476 | #define BRCMS_PROT_N_OBSS 16 /* non-HT OBSS present */ | |
477 | ||
478 | /* | |
479 | * 54g modes (basic bits may still be overridden) | |
480 | * | |
481 | * GMODE_LEGACY_B | |
482 | * Rateset: 1b, 2b, 5.5, 11 | |
483 | * Preamble: Long | |
484 | * Shortslot: Off | |
485 | * GMODE_AUTO | |
486 | * Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54 | |
487 | * Extended Rateset: 6, 9, 12, 48 | |
488 | * Preamble: Long | |
489 | * Shortslot: Auto | |
490 | * GMODE_ONLY | |
491 | * Rateset: 1b, 2b, 5.5b, 11b, 18, 24b, 36, 54 | |
492 | * Extended Rateset: 6b, 9, 12b, 48 | |
493 | * Preamble: Short required | |
494 | * Shortslot: Auto | |
495 | * GMODE_B_DEFERRED | |
496 | * Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54 | |
497 | * Extended Rateset: 6, 9, 12, 48 | |
498 | * Preamble: Long | |
499 | * Shortslot: On | |
500 | * GMODE_PERFORMANCE | |
501 | * Rateset: 1b, 2b, 5.5b, 6b, 9, 11b, 12b, 18, 24b, 36, 48, 54 | |
502 | * Preamble: Short required | |
503 | * Shortslot: On and required | |
504 | * GMODE_LRS | |
505 | * Rateset: 1b, 2b, 5.5b, 11b | |
506 | * Extended Rateset: 6, 9, 12, 18, 24, 36, 48, 54 | |
507 | * Preamble: Long | |
508 | * Shortslot: Auto | |
509 | */ | |
510 | #define GMODE_LEGACY_B 0 | |
511 | #define GMODE_AUTO 1 | |
512 | #define GMODE_ONLY 2 | |
513 | #define GMODE_B_DEFERRED 3 | |
514 | #define GMODE_PERFORMANCE 4 | |
515 | #define GMODE_LRS 5 | |
516 | #define GMODE_MAX 6 | |
517 | ||
518 | /* MCS values greater than this enable multiple streams */ | |
519 | #define HIGHEST_SINGLE_STREAM_MCS 7 | |
520 | ||
521 | #define MAXBANDS 2 /* Maximum #of bands */ | |
522 | ||
523 | /* max number of antenna configurations */ | |
524 | #define ANT_SELCFG_MAX 4 | |
525 | ||
526 | struct brcms_antselcfg { | |
527 | u8 ant_config[ANT_SELCFG_MAX]; /* antenna configuration */ | |
528 | u8 num_antcfg; /* number of available antenna configurations */ | |
529 | }; | |
530 | ||
531 | /* common functions for every port */ | |
94bdc2a2 | 532 | extern struct brcms_c_info * |
5b435de0 AS |
533 | brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit, |
534 | bool piomode, void __iomem *regsva, struct pci_dev *btparam, | |
535 | uint *perr); | |
536 | extern uint brcms_c_detach(struct brcms_c_info *wlc); | |
537 | extern int brcms_c_up(struct brcms_c_info *wlc); | |
538 | extern uint brcms_c_down(struct brcms_c_info *wlc); | |
539 | ||
540 | extern bool brcms_c_chipmatch(u16 vendor, u16 device); | |
dc460127 | 541 | extern void brcms_c_init(struct brcms_c_info *wlc, bool mute_tx); |
5b435de0 AS |
542 | extern void brcms_c_reset(struct brcms_c_info *wlc); |
543 | ||
544 | extern void brcms_c_intrson(struct brcms_c_info *wlc); | |
545 | extern u32 brcms_c_intrsoff(struct brcms_c_info *wlc); | |
546 | extern void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask); | |
547 | extern bool brcms_c_intrsupd(struct brcms_c_info *wlc); | |
548 | extern bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc); | |
549 | extern bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded); | |
550 | extern void brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, | |
551 | struct sk_buff *sdu, | |
552 | struct ieee80211_hw *hw); | |
553 | extern bool brcms_c_aggregatable(struct brcms_c_info *wlc, u8 tid); | |
5b435de0 AS |
554 | extern void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, |
555 | int val); | |
556 | extern int brcms_c_get_header_len(void); | |
5b435de0 AS |
557 | extern void brcms_c_set_addrmatch(struct brcms_c_info *wlc, |
558 | int match_reg_offset, | |
559 | const u8 *addr); | |
560 | extern void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci, | |
561 | const struct ieee80211_tx_queue_params *arg, | |
562 | bool suspend); | |
563 | extern struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc); | |
5b435de0 AS |
564 | extern void brcms_c_ampdu_flush(struct brcms_c_info *wlc, |
565 | struct ieee80211_sta *sta, u16 tid); | |
566 | extern void brcms_c_ampdu_tx_operational(struct brcms_c_info *wlc, u8 tid, | |
567 | u8 ba_wsize, uint max_rx_ampdu_bytes); | |
568 | extern char *getvar(struct si_pub *sih, enum brcms_srom_id id); | |
569 | extern int getintvar(struct si_pub *sih, enum brcms_srom_id id); | |
5b435de0 AS |
570 | extern int brcms_c_module_register(struct brcms_pub *pub, |
571 | const char *name, struct brcms_info *hdl, | |
572 | int (*down_fn)(void *handle)); | |
573 | extern int brcms_c_module_unregister(struct brcms_pub *pub, const char *name, | |
574 | struct brcms_info *hdl); | |
575 | extern void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc); | |
576 | extern void brcms_c_enable_mac(struct brcms_c_info *wlc); | |
577 | extern void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state); | |
578 | extern void brcms_c_scan_start(struct brcms_c_info *wlc); | |
579 | extern void brcms_c_scan_stop(struct brcms_c_info *wlc); | |
580 | extern int brcms_c_get_curband(struct brcms_c_info *wlc); | |
581 | extern void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, | |
582 | bool drop); | |
94bdc2a2 AB |
583 | extern int brcms_c_set_channel(struct brcms_c_info *wlc, u16 channel); |
584 | extern int brcms_c_set_rate_limit(struct brcms_c_info *wlc, u16 srl, u16 lrl); | |
585 | extern void brcms_c_get_current_rateset(struct brcms_c_info *wlc, | |
5b435de0 | 586 | struct brcm_rateset *currs); |
94bdc2a2 AB |
587 | extern int brcms_c_set_rateset(struct brcms_c_info *wlc, |
588 | struct brcm_rateset *rs); | |
589 | extern int brcms_c_set_beacon_period(struct brcms_c_info *wlc, u16 period); | |
590 | extern u16 brcms_c_get_phy_type(struct brcms_c_info *wlc, int phyidx); | |
591 | extern void brcms_c_set_shortslot_override(struct brcms_c_info *wlc, | |
5b435de0 | 592 | s8 sslot_override); |
94bdc2a2 AB |
593 | extern void brcms_c_set_beacon_listen_interval(struct brcms_c_info *wlc, |
594 | u8 interval); | |
595 | extern int brcms_c_set_tx_power(struct brcms_c_info *wlc, int txpwr); | |
596 | extern int brcms_c_get_tx_power(struct brcms_c_info *wlc); | |
5b435de0 | 597 | extern bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc); |
dc460127 | 598 | extern void brcms_c_mute(struct brcms_c_info *wlc, bool on); |
5b435de0 AS |
599 | |
600 | #endif /* _BRCM_PUB_H_ */ |