brcm80211: smac: fix channel frequency
[linux-block.git] / drivers / net / wireless / brcm80211 / brcmsmac / main.h
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5b435de0
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1/*
2 * Copyright (c) 2010 Broadcom Corporation
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#ifndef _BRCM_MAIN_H_
18#define _BRCM_MAIN_H_
19
20#include <linux/etherdevice.h>
21
22#include <brcmu_utils.h>
23#include "types.h"
24#include "d11.h"
25#include "scb.h"
26
27#define INVCHANNEL 255 /* invalid channel */
28
29/* max # brcms_c_module_register() calls */
30#define BRCMS_MAXMODULES 22
31
32#define SEQNUM_SHIFT 4
33#define SEQNUM_MAX 0x1000
34
35#define NTXRATE 64 /* # tx MPDUs rate is reported for */
36
37/* Maximum wait time for a MAC suspend */
38/* uS: 83mS is max packet time (64KB ampdu @ 6Mbps) */
39#define BRCMS_MAX_MAC_SUSPEND 83000
40
41/* responses for probe requests older that this are tossed, zero to disable */
42#define BRCMS_PRB_RESP_TIMEOUT 0 /* Disable probe response timeout */
43
44/* transmit buffer max headroom for protocol headers */
45#define TXOFF (D11_TXH_LEN + D11_PHY_HDR_LEN)
46
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47/* Macros for doing definition and get/set of bitfields
48 * Usage example, e.g. a three-bit field (bits 4-6):
49 * #define <NAME>_M BITFIELD_MASK(3)
50 * #define <NAME>_S 4
51 * ...
52 * regval = R_REG(osh, &regs->regfoo);
53 * field = GFIELD(regval, <NAME>);
54 * regval = SFIELD(regval, <NAME>, 1);
55 * W_REG(osh, &regs->regfoo, regval);
56 */
57#define BITFIELD_MASK(width) \
58 (((unsigned)1 << (width)) - 1)
59#define GFIELD(val, field) \
60 (((val) >> field ## _S) & field ## _M)
61#define SFIELD(val, field, bits) \
62 (((val) & (~(field ## _M << field ## _S))) | \
63 ((unsigned)(bits) << field ## _S))
64
65#define SW_TIMER_MAC_STAT_UPD 30 /* periodic MAC stats update */
66
67/* max # supported core revisions (0 .. MAXCOREREV - 1) */
68#define MAXCOREREV 28
69
70/* Double check that unsupported cores are not enabled */
71#if CONF_MSK(D11CONF, 0x4f) || CONF_GE(D11CONF, MAXCOREREV)
72#error "Configuration for D11CONF includes unsupported versions."
73#endif /* Bad versions */
74
75/* values for shortslot_override */
76#define BRCMS_SHORTSLOT_AUTO -1 /* Driver will manage Shortslot setting */
77#define BRCMS_SHORTSLOT_OFF 0 /* Turn off short slot */
78#define BRCMS_SHORTSLOT_ON 1 /* Turn on short slot */
79
80/* value for short/long and mixmode/greenfield preamble */
81#define BRCMS_LONG_PREAMBLE (0)
82#define BRCMS_SHORT_PREAMBLE (1 << 0)
83#define BRCMS_GF_PREAMBLE (1 << 1)
84#define BRCMS_MM_PREAMBLE (1 << 2)
85#define BRCMS_IS_MIMO_PREAMBLE(_pre) (((_pre) == BRCMS_GF_PREAMBLE) || \
86 ((_pre) == BRCMS_MM_PREAMBLE))
87
88/* TxFrameID */
89/* seq and frag bits: SEQNUM_SHIFT, FRAGNUM_MASK (802.11.h) */
90/* rate epoch bits: TXFID_RATE_SHIFT, TXFID_RATE_MASK ((wlc_rate.c) */
91#define TXFID_QUEUE_MASK 0x0007 /* Bits 0-2 */
92#define TXFID_SEQ_MASK 0x7FE0 /* Bits 5-15 */
93#define TXFID_SEQ_SHIFT 5 /* Number of bit shifts */
94#define TXFID_RATE_PROBE_MASK 0x8000 /* Bit 15 for rate probe */
95#define TXFID_RATE_MASK 0x0018 /* Mask for bits 3 and 4 */
96#define TXFID_RATE_SHIFT 3 /* Shift 3 bits for rate mask */
97
98/* promote boardrev */
99#define BOARDREV_PROMOTABLE 0xFF /* from */
100#define BOARDREV_PROMOTED 1 /* to */
101
102#define DATA_BLOCK_TX_SUPR (1 << 4)
103
104/* 802.1D Priority to TX FIFO number for wme */
105extern const u8 prio2fifo[];
106
107/* Ucode MCTL_WAKE override bits */
108#define BRCMS_WAKE_OVERRIDE_CLKCTL 0x01
109#define BRCMS_WAKE_OVERRIDE_PHYREG 0x02
110#define BRCMS_WAKE_OVERRIDE_MACSUSPEND 0x04
111#define BRCMS_WAKE_OVERRIDE_TXFIFO 0x08
112#define BRCMS_WAKE_OVERRIDE_FORCEFAST 0x10
113
114/* stuff pulled in from wlc.c */
115
116/* Interrupt bit error summary. Don't include I_RU: we refill DMA at other
117 * times; and if we run out, constant I_RU interrupts may cause lockup. We
118 * will still get error counts from rx0ovfl.
119 */
120#define I_ERRORS (I_PC | I_PD | I_DE | I_RO | I_XU)
121/* default software intmasks */
122#define DEF_RXINTMASK (I_RI) /* enable rx int on rxfifo only */
123#define DEF_MACINTMASK (MI_TXSTOP | MI_TBTT | MI_ATIMWINEND | MI_PMQ | \
124 MI_PHYTXERR | MI_DMAINT | MI_TFS | MI_BG_NOISE | \
125 MI_CCA | MI_TO | MI_GP0 | MI_RFDISABLE | MI_PWRUP)
126
127#define MAXTXPKTS 6 /* max # pkts pending */
128
129/* frameburst */
130#define MAXTXFRAMEBURST 8 /* vanilla xpress mode: max frames/burst */
131#define MAXFRAMEBURST_TXOP 10000 /* Frameburst TXOP in usec */
132
133#define NFIFO 6 /* # tx/rx fifopairs */
134
135/* PLL requests */
136
137/* pll is shared on old chips */
138#define BRCMS_PLLREQ_SHARED 0x1
139/* hold pll for radio monitor register checking */
140#define BRCMS_PLLREQ_RADIO_MON 0x2
141/* hold/release pll for some short operation */
142#define BRCMS_PLLREQ_FLIP 0x4
143
144#define CHANNEL_BANDUNIT(wlc, ch) \
145 (((ch) <= CH_MAX_2G_CHANNEL) ? BAND_2G_INDEX : BAND_5G_INDEX)
146
147#define OTHERBANDUNIT(wlc) \
148 ((uint)((wlc)->band->bandunit ? BAND_2G_INDEX : BAND_5G_INDEX))
149
150/*
151 * 802.11 protection information
152 *
153 * _g: use g spec protection, driver internal.
154 * g_override: override for use of g spec protection.
155 * gmode_user: user config gmode, operating band->gmode is different.
156 * overlap: Overlap BSS/IBSS protection for both 11g and 11n.
157 * nmode_user: user config nmode, operating pub->nmode is different.
158 * n_cfg: use OFDM protection on MIMO frames.
159 * n_cfg_override: override for use of N protection.
160 * nongf: non-GF present protection.
161 * nongf_override: override for use of GF protection.
162 * n_pam_override: override for preamble: MM or GF.
163 * n_obss: indicated OBSS Non-HT STA present.
164*/
165struct brcms_protection {
166 bool _g;
167 s8 g_override;
168 u8 gmode_user;
169 s8 overlap;
170 s8 nmode_user;
171 s8 n_cfg;
172 s8 n_cfg_override;
173 bool nongf;
174 s8 nongf_override;
175 s8 n_pam_override;
176 bool n_obss;
177};
178
179/*
180 * anything affecting the single/dual streams/antenna operation
181 *
182 * hw_txchain: HW txchain bitmap cfg.
183 * txchain: txchain bitmap being used.
184 * txstreams: number of txchains being used.
185 * hw_rxchain: HW rxchain bitmap cfg.
186 * rxchain: rxchain bitmap being used.
187 * rxstreams: number of rxchains being used.
188 * ant_rx_ovr: rx antenna override.
189 * txant: userTx antenna setting.
190 * phytxant: phyTx antenna setting in txheader.
191 * ss_opmode: singlestream Operational mode, 0:siso; 1:cdd.
192 * ss_algosel_auto: if true, use wlc->stf->ss_algo_channel;
193 * else use wlc->band->stf->ss_mode_band.
194 * ss_algo_channel: ss based on per-channel algo: 0: SISO, 1: CDD 2: STBC.
195 * rxchain_restore_delay: delay time to restore default rxchain.
196 * ldpc: AUTO/ON/OFF ldpc cap supported.
197 * txcore[MAX_STREAMS_SUPPORTED + 1]: bitmap of selected core for each Nsts.
198 * spatial_policy:
199 */
200struct brcms_stf {
201 u8 hw_txchain;
202 u8 txchain;
203 u8 txstreams;
204 u8 hw_rxchain;
205 u8 rxchain;
206 u8 rxstreams;
207 u8 ant_rx_ovr;
208 s8 txant;
209 u16 phytxant;
210 u8 ss_opmode;
211 bool ss_algosel_auto;
212 u16 ss_algo_channel;
213 u8 rxchain_restore_delay;
214 s8 ldpc;
215 u8 txcore[MAX_STREAMS_SUPPORTED + 1];
216 s8 spatial_policy;
217};
218
219#define BRCMS_STF_SS_STBC_TX(wlc, scb) \
220 (((wlc)->stf->txstreams > 1) && (((wlc)->band->band_stf_stbc_tx == ON) \
221 || (((scb)->flags & SCB_STBCCAP) && \
222 (wlc)->band->band_stf_stbc_tx == AUTO && \
223 isset(&((wlc)->stf->ss_algo_channel), PHY_TXC1_MODE_STBC))))
224
225#define BRCMS_STBC_CAP_PHY(wlc) (BRCMS_ISNPHY(wlc->band) && \
226 NREV_GE(wlc->band->phyrev, 3))
227
228#define BRCMS_SGI_CAP_PHY(wlc) ((BRCMS_ISNPHY(wlc->band) && \
229 NREV_GE(wlc->band->phyrev, 3)) || \
230 BRCMS_ISLCNPHY(wlc->band))
231
232#define BRCMS_CHAN_PHYTYPE(x) (((x) & RXS_CHAN_PHYTYPE_MASK) \
233 >> RXS_CHAN_PHYTYPE_SHIFT)
234#define BRCMS_CHAN_CHANNEL(x) (((x) & RXS_CHAN_ID_MASK) \
235 >> RXS_CHAN_ID_SHIFT)
236
237/*
238 * core state (mac)
239 */
240struct brcms_core {
241 uint coreidx; /* # sb enumerated core */
242
243 /* fifo */
244 uint *txavail[NFIFO]; /* # tx descriptors available */
245 s16 txpktpend[NFIFO]; /* tx admission control */
246
247 struct macstat *macstat_snapshot; /* mac hw prev read values */
248};
249
250/*
251 * band state (phy+ana+radio)
252 */
253struct brcms_band {
254 int bandtype; /* BRCM_BAND_2G, BRCM_BAND_5G */
255 uint bandunit; /* bandstate[] index */
256
257 u16 phytype; /* phytype */
258 u16 phyrev;
259 u16 radioid;
260 u16 radiorev;
261 struct brcms_phy_pub *pi; /* pointer to phy specific information */
262 bool abgphy_encore;
263
264 u8 gmode; /* currently active gmode */
265
266 struct scb *hwrs_scb; /* permanent scb for hw rateset */
267
268 /* band-specific copy of default_bss.rateset */
269 struct brcms_c_rateset defrateset;
270
271 u8 band_stf_ss_mode; /* Configured STF type, 0:siso; 1:cdd */
272 s8 band_stf_stbc_tx; /* STBC TX 0:off; 1:force on; -1:auto */
273 /* rates supported by chip (phy-specific) */
274 struct brcms_c_rateset hw_rateset;
275 u8 basic_rate[BRCM_MAXRATE + 1]; /* basic rates indexed by rate */
276 bool mimo_cap_40; /* 40 MHz cap enabled on this band */
277 s8 antgain; /* antenna gain from srom */
278
279 u16 CWmin; /* minimum size of contention window, in unit of aSlotTime */
280 u16 CWmax; /* maximum size of contention window, in unit of aSlotTime */
281 struct ieee80211_supported_band band;
282};
283
284/* module control blocks */
285struct modulecb {
286 /* module name : NULL indicates empty array member */
287 char name[32];
288 /* handle passed when handler 'doiovar' is called */
289 struct brcms_info *hdl;
290
291 int (*down_fn)(void *handle); /* down handler. Note: the int returned
292 * by the down function is a count of the
293 * number of timers that could not be
294 * freed.
295 */
296
297};
298
299struct brcms_hw_band {
300 int bandtype; /* BRCM_BAND_2G, BRCM_BAND_5G */
301 uint bandunit; /* bandstate[] index */
302 u16 mhfs[MHFMAX]; /* MHF array shadow */
303 u8 bandhw_stf_ss_mode; /* HW configured STF type, 0:siso; 1:cdd */
304 u16 CWmin;
305 u16 CWmax;
306 u32 core_flags;
307
308 u16 phytype; /* phytype */
309 u16 phyrev;
310 u16 radioid;
311 u16 radiorev;
312 struct brcms_phy_pub *pi; /* pointer to phy specific information */
313 bool abgphy_encore;
314};
315
316struct brcms_hardware {
317 bool _piomode; /* true if pio mode */
318 struct brcms_c_info *wlc;
319
320 /* fifo */
321 struct dma_pub *di[NFIFO]; /* dma handles, per fifo */
322
323 uint unit; /* device instance number */
324
325 /* version info */
326 u16 vendorid; /* PCI vendor id */
327 u16 deviceid; /* PCI device id */
328 uint corerev; /* core revision */
329 u8 sromrev; /* version # of the srom */
330 u16 boardrev; /* version # of particular board */
331 u32 boardflags; /* Board specific flags from srom */
332 u32 boardflags2; /* More board flags if sromrev >= 4 */
333 u32 machwcap; /* MAC capabilities */
334 u32 machwcap_backup; /* backup of machwcap */
335
336 struct si_pub *sih; /* SI handle (cookie for siutils calls) */
337 struct d11regs __iomem *regs; /* pointer to device registers */
338 struct phy_shim_info *physhim; /* phy shim layer handler */
339 struct shared_phy *phy_sh; /* pointer to shared phy state */
340 struct brcms_hw_band *band;/* pointer to active per-band state */
341 /* band state per phy/radio */
342 struct brcms_hw_band *bandstate[MAXBANDS];
343 u16 bmac_phytxant; /* cache of high phytxant state */
344 bool shortslot; /* currently using 11g ShortSlot timing */
345 u16 SRL; /* 802.11 dot11ShortRetryLimit */
346 u16 LRL; /* 802.11 dot11LongRetryLimit */
347 u16 SFBL; /* Short Frame Rate Fallback Limit */
348 u16 LFBL; /* Long Frame Rate Fallback Limit */
349
350 bool up; /* d11 hardware up and running */
351 uint now; /* # elapsed seconds */
352 uint _nbands; /* # bands supported */
353 u16 chanspec; /* bmac chanspec shadow */
354
355 uint *txavail[NFIFO]; /* # tx descriptors available */
356 const u16 *xmtfifo_sz; /* fifo size in 256B for each xmt fifo */
357
358 u32 pllreq; /* pll requests to keep PLL on */
359
360 u8 suspended_fifos; /* Which TX fifo to remain awake for */
361 u32 maccontrol; /* Cached value of maccontrol */
362 uint mac_suspend_depth; /* current depth of mac_suspend levels */
363 u32 wake_override; /* bit flags to force MAC to WAKE mode */
364 u32 mute_override; /* Prevent ucode from sending beacons */
365 u8 etheraddr[ETH_ALEN]; /* currently configured ethernet address */
366 bool noreset; /* true= do not reset hw, used by WLC_OUT */
367 bool forcefastclk; /* true if h/w is forcing to use fast clk */
368 bool clk; /* core is out of reset and has clock */
369 bool sbclk; /* sb has clock */
370 bool phyclk; /* phy is out of reset and has clock */
371
372 bool ucode_loaded; /* true after ucode downloaded */
373
374
375 u8 hw_stf_ss_opmode; /* STF single stream operation mode */
376 u8 antsel_type; /* Type of boardlevel mimo antenna switch-logic
377 * 0 = N/A, 1 = 2x4 board, 2 = 2x3 CB2 board
378 */
379 u32 antsel_avail; /*
380 * put struct antsel_info here if more info is
381 * needed
382 */
383};
384
385/* TX Queue information
386 *
387 * Each flow of traffic out of the device has a TX Queue with independent
388 * flow control. Several interfaces may be associated with a single TX Queue
389 * if they belong to the same flow of traffic from the device. For multi-channel
390 * operation there are independent TX Queues for each channel.
391 */
392struct brcms_txq_info {
393 struct brcms_txq_info *next;
394 struct pktq q;
395 uint stopped; /* tx flow control bits */
396};
397
398/*
399 * Principal common driver data structure.
400 *
401 * pub: pointer to driver public state.
402 * wl: pointer to specific private state.
403 * regs: pointer to device registers.
404 * hw: HW related state.
405 * clkreq_override: setting for clkreq for PCIE : Auto, 0, 1.
406 * fastpwrup_dly: time in us needed to bring up d11 fast clock.
407 * macintstatus: bit channel between isr and dpc.
408 * macintmask: sw runtime master macintmask value.
409 * defmacintmask: default "on" macintmask value.
410 * clk: core is out of reset and has clock.
411 * core: pointer to active io core.
412 * band: pointer to active per-band state.
413 * corestate: per-core state (one per hw core).
414 * bandstate: per-band state (one per phy/radio).
415 * qvalid: DirFrmQValid and BcMcFrmQValid.
416 * ampdu: ampdu module handler.
417 * asi: antsel module handler.
418 * cmi: channel manager module handler.
419 * vendorid: PCI vendor id.
420 * deviceid: PCI device id.
421 * ucode_rev: microcode revision.
422 * machwcap: MAC capabilities, BMAC shadow.
423 * perm_etheraddr: original sprom local ethernet address.
424 * bandlocked: disable auto multi-band switching.
425 * bandinit_pending: track band init in auto band.
426 * radio_monitor: radio timer is running.
427 * going_down: down path intermediate variable.
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428 * wdtimer: timer for watchdog routine.
429 * radio_timer: timer for hw radio button monitor routine.
430 * monitor: monitor (MPDU sniffing) mode.
431 * bcnmisc_monitor: bcns promisc mode override for monitor.
432 * _rifs: enable per-packet rifs.
433 * bcn_li_bcn: beacon listen interval in # beacons.
434 * bcn_li_dtim: beacon listen interval in # dtims.
435 * WDarmed: watchdog timer is armed.
436 * WDlast: last time wlc_watchdog() was called.
b7eec423 437 * edcf_txop[IEEE80211_NUM_ACS]: current txop for each ac.
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438 * wme_retries: per-AC retry limits.
439 * tx_prec_map: Precedence map based on HW FIFO space.
440 * fifo2prec_map[NFIFO]: pointer to fifo2_prec map based on WME.
441 * bsscfg: set of BSS configurations, idx 0 is default and always valid.
442 * cfg: the primary bsscfg (can be AP or STA).
443 * tx_queues: common TX Queue list.
444 * modulecb:
445 * mimoft: SIGN or 11N.
446 * cck_40txbw: 11N, cck tx b/w override when in 40MHZ mode.
447 * ofdm_40txbw: 11N, ofdm tx b/w override when in 40MHZ mode.
448 * mimo_40txbw: 11N, mimo tx b/w override when in 40MHZ mode.
449 * default_bss: configured BSS parameters.
450 * mc_fid_counter: BC/MC FIFO frame ID counter.
451 * country_default: saved country for leaving 802.11d auto-country mode.
452 * autocountry_default: initial country for 802.11d auto-country mode.
453 * prb_resp_timeout: do not send prb resp if request older
454 * than this, 0 = disable.
455 * home_chanspec: shared home chanspec.
456 * chanspec: target operational channel.
457 * usr_fragthresh: user configured fragmentation threshold.
458 * fragthresh[NFIFO]: per-fifo fragmentation thresholds.
459 * RTSThresh: 802.11 dot11RTSThreshold.
460 * SRL: 802.11 dot11ShortRetryLimit.
461 * LRL: 802.11 dot11LongRetryLimit.
462 * SFBL: Short Frame Rate Fallback Limit.
463 * LFBL: Long Frame Rate Fallback Limit.
464 * shortslot: currently using 11g ShortSlot timing.
465 * shortslot_override: 11g ShortSlot override.
466 * include_legacy_erp: include Legacy ERP info elt ID 47 as well as g ID 42.
467 * PLCPHdr_override: 802.11b Preamble Type override.
468 * stf:
469 * bcn_rspec: save bcn ratespec purpose.
470 * tempsense_lasttime;
471 * tx_duty_cycle_ofdm: maximum allowed duty cycle for OFDM.
472 * tx_duty_cycle_cck: maximum allowed duty cycle for CCK.
473 * pkt_queue: txq for transmit packets.
474 * wiphy:
475 * pri_scb: primary Station Control Block
476 */
477struct brcms_c_info {
478 struct brcms_pub *pub;
479 struct brcms_info *wl;
480 struct d11regs __iomem *regs;
481 struct brcms_hardware *hw;
482
483 /* clock */
484 u16 fastpwrup_dly;
485
486 /* interrupt */
487 u32 macintstatus;
488 u32 macintmask;
489 u32 defmacintmask;
490
491 bool clk;
492
493 /* multiband */
494 struct brcms_core *core;
495 struct brcms_band *band;
496 struct brcms_core *corestate;
497 struct brcms_band *bandstate[MAXBANDS];
498
499 /* packet queue */
500 uint qvalid;
501
502 struct ampdu_info *ampdu;
503 struct antsel_info *asi;
504 struct brcms_cm_info *cmi;
505
506 u16 vendorid;
507 u16 deviceid;
508 uint ucode_rev;
509
510 u8 perm_etheraddr[ETH_ALEN];
511
512 bool bandlocked;
513 bool bandinit_pending;
514
515 bool radio_monitor;
516 bool going_down;
517
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518 struct brcms_timer *wdtimer;
519 struct brcms_timer *radio_timer;
520
521 /* promiscuous */
522 bool monitor;
523 bool bcnmisc_monitor;
524
525 /* driver feature */
526 bool _rifs;
527
528 /* AP-STA synchronization, power save */
529 u8 bcn_li_bcn;
530 u8 bcn_li_dtim;
531
532 bool WDarmed;
533 u32 WDlast;
534
535 /* WME */
b7eec423 536 u16 edcf_txop[IEEE80211_NUM_ACS];
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b7eec423 538 u16 wme_retries[IEEE80211_NUM_ACS];
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539 u16 tx_prec_map;
540 u16 fifo2prec_map[NFIFO];
541
542 struct brcms_bss_cfg *bsscfg;
543
544 /* tx queue */
545 struct brcms_txq_info *tx_queues;
546
547 struct modulecb *modulecb;
548
549 u8 mimoft;
550 s8 cck_40txbw;
551 s8 ofdm_40txbw;
552 s8 mimo_40txbw;
553
554 struct brcms_bss_info *default_bss;
555
556 u16 mc_fid_counter;
557
558 char country_default[BRCM_CNTRY_BUF_SZ];
559 char autocountry_default[BRCM_CNTRY_BUF_SZ];
560 u16 prb_resp_timeout;
561
562 u16 home_chanspec;
563
564 /* PHY parameters */
565 u16 chanspec;
566 u16 usr_fragthresh;
567 u16 fragthresh[NFIFO];
568 u16 RTSThresh;
569 u16 SRL;
570 u16 LRL;
571 u16 SFBL;
572 u16 LFBL;
573
574 /* network config */
575 bool shortslot;
576 s8 shortslot_override;
577 bool include_legacy_erp;
578
579 struct brcms_protection *protection;
580 s8 PLCPHdr_override;
581
582 struct brcms_stf *stf;
583
584 u32 bcn_rspec;
585
586 uint tempsense_lasttime;
587
588 u16 tx_duty_cycle_ofdm;
589 u16 tx_duty_cycle_cck;
590
591 struct brcms_txq_info *pkt_queue;
592 struct wiphy *wiphy;
593 struct scb pri_scb;
594};
595
596/* antsel module specific state */
597struct antsel_info {
598 struct brcms_c_info *wlc; /* pointer to main wlc structure */
599 struct brcms_pub *pub; /* pointer to public fn */
600 u8 antsel_type; /* Type of boardlevel mimo antenna switch-logic
601 * 0 = N/A, 1 = 2x4 board, 2 = 2x3 CB2 board
602 */
603 u8 antsel_antswitch; /* board level antenna switch type */
604 bool antsel_avail; /* Ant selection availability (SROM based) */
605 struct brcms_antselcfg antcfg_11n; /* antenna configuration */
606 struct brcms_antselcfg antcfg_cur; /* current antenna config (auto) */
607};
608
609/*
610 * BSS configuration state
611 *
612 * wlc: wlc to which this bsscfg belongs to.
613 * up: is this configuration up operational
614 * enable: is this configuration enabled
615 * associated: is BSS in ASSOCIATED state
616 * BSS: infraustructure or adhoc
617 * SSID_len: the length of SSID
618 * SSID: SSID string
619 *
620 *
621 * BSSID: BSSID (associated)
622 * cur_etheraddr: h/w address
623 * flags: BSSCFG flags; see below
624 *
625 * current_bss: BSS parms in ASSOCIATED state
626 *
627 *
628 * ID: 'unique' ID of this bsscfg, assigned at bsscfg allocation
629 */
630struct brcms_bss_cfg {
631 struct brcms_c_info *wlc;
632 bool up;
633 bool enable;
634 bool associated;
635 bool BSS;
636 u8 SSID_len;
637 u8 SSID[IEEE80211_MAX_SSID_LEN];
638 u8 BSSID[ETH_ALEN];
639 u8 cur_etheraddr[ETH_ALEN];
640 struct brcms_bss_info *current_bss;
641};
642
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643extern void brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo,
644 struct sk_buff *p,
645 bool commit, s8 txpktpend);
646extern void brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo,
647 s8 txpktpend);
648extern void brcms_c_txq_enq(struct brcms_c_info *wlc, struct scb *scb,
649 struct sk_buff *sdu, uint prec);
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650extern void brcms_c_print_txstatus(struct tx_status *txs);
651extern int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
652 uint *blocks);
653
654#if defined(BCMDBG)
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655extern void brcms_c_print_txdesc(struct d11txh *txh);
656#else
657#define brcms_c_print_txdesc(a)
658#endif
659
5b435de0 660extern int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config);
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661extern void brcms_c_mac_bcn_promisc_change(struct brcms_c_info *wlc,
662 bool promisc);
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663extern void brcms_c_send_q(struct brcms_c_info *wlc);
664extern int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu,
665 uint *fifo);
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666extern u16 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec,
667 uint mac_len);
668extern u32 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc,
669 u32 rspec,
670 bool use_rspec, u16 mimo_ctlchbw);
671extern u16 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
672 u32 rts_rate,
673 u32 frame_rate,
674 u8 rts_preamble_type,
675 u8 frame_preamble_type, uint frame_len,
676 bool ba);
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677extern void brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
678 struct ieee80211_sta *sta,
679 void (*dma_callback_fn));
5b435de0 680extern void brcms_c_update_beacon(struct brcms_c_info *wlc);
5b435de0 681extern void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend);
5b435de0 682extern int brcms_c_set_nmode(struct brcms_c_info *wlc);
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683extern void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc,
684 u32 bcn_rate);
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685extern void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw,
686 u8 antsel_type);
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687extern void brcms_b_set_chanspec(struct brcms_hardware *wlc_hw,
688 u16 chanspec,
689 bool mute, struct txpwr_limits *txpwr);
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690extern void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset,
691 u16 v);
692extern u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset);
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693extern void brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask,
694 u16 val, int bands);
5b435de0 695extern void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags);
5b435de0 696extern void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val);
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697extern void brcms_b_phy_reset(struct brcms_hardware *wlc_hw);
698extern void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw);
699extern void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw);
700extern void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
701 u32 override_bit);
702extern void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
703 u32 override_bit);
704extern void brcms_b_write_template_ram(struct brcms_hardware *wlc_hw,
705 int offset, int len, void *buf);
706extern u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate);
707extern void brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw,
708 uint offset, const void *buf, int len,
709 u32 sel);
710extern void brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset,
711 void *buf, int len, u32 sel);
712extern void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode);
713extern u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw);
714extern void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk);
715extern void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk);
716extern void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on);
717extern void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant);
718extern void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw,
719 u8 stf_mode);
720extern void brcms_c_init_scb(struct scb *scb);
721
722#endif /* _BRCM_MAIN_H_ */