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75388acd LF |
1 | /* |
2 | * | |
3 | * Broadcom B43legacy wireless driver | |
4 | * | |
5 | * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de> | |
1f21ad2a | 6 | * Copyright (c) 2005-2007 Stefano Brivio <stefano.brivio@polimi.it> |
75388acd LF |
7 | * Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de> |
8 | * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org> | |
9 | * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch> | |
10 | * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net> | |
11 | * | |
12 | * Some parts of the code in this file are derived from the ipw2200 | |
13 | * driver Copyright(c) 2003 - 2004 Intel Corporation. | |
14 | ||
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; see the file COPYING. If not, write to | |
27 | * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor, | |
28 | * Boston, MA 02110-1301, USA. | |
29 | * | |
30 | */ | |
31 | ||
32 | #include <linux/delay.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/moduleparam.h> | |
35 | #include <linux/if_arp.h> | |
36 | #include <linux/etherdevice.h> | |
37 | #include <linux/version.h> | |
38 | #include <linux/firmware.h> | |
39 | #include <linux/wireless.h> | |
40 | #include <linux/workqueue.h> | |
41 | #include <linux/skbuff.h> | |
42 | #include <linux/dma-mapping.h> | |
43 | #include <net/dst.h> | |
44 | #include <asm/unaligned.h> | |
45 | ||
46 | #include "b43legacy.h" | |
47 | #include "main.h" | |
48 | #include "debugfs.h" | |
49 | #include "phy.h" | |
50 | #include "dma.h" | |
51 | #include "pio.h" | |
52 | #include "sysfs.h" | |
53 | #include "xmit.h" | |
54 | #include "radio.h" | |
55 | ||
56 | ||
57 | MODULE_DESCRIPTION("Broadcom B43legacy wireless driver"); | |
58 | MODULE_AUTHOR("Martin Langer"); | |
59 | MODULE_AUTHOR("Stefano Brivio"); | |
60 | MODULE_AUTHOR("Michael Buesch"); | |
61 | MODULE_LICENSE("GPL"); | |
62 | ||
63 | #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO) | |
64 | static int modparam_pio; | |
65 | module_param_named(pio, modparam_pio, int, 0444); | |
66 | MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode"); | |
67 | #elif defined(CONFIG_B43LEGACY_DMA) | |
68 | # define modparam_pio 0 | |
69 | #elif defined(CONFIG_B43LEGACY_PIO) | |
70 | # define modparam_pio 1 | |
71 | #endif | |
72 | ||
73 | static int modparam_bad_frames_preempt; | |
74 | module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444); | |
75 | MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames" | |
76 | " Preemption"); | |
77 | ||
75388acd LF |
78 | static char modparam_fwpostfix[16]; |
79 | module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444); | |
80 | MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load."); | |
81 | ||
75388acd LF |
82 | /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */ |
83 | static const struct ssb_device_id b43legacy_ssb_tbl[] = { | |
84 | SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2), | |
85 | SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4), | |
86 | SSB_DEVTABLE_END | |
87 | }; | |
88 | MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl); | |
89 | ||
90 | ||
91 | /* Channel and ratetables are shared for all devices. | |
92 | * They can't be const, because ieee80211 puts some precalculated | |
93 | * data in there. This data is the same for all devices, so we don't | |
94 | * get concurrency issues */ | |
95 | #define RATETAB_ENT(_rateid, _flags) \ | |
96 | { \ | |
97 | .rate = B43legacy_RATE_TO_100KBPS(_rateid), \ | |
98 | .val = (_rateid), \ | |
99 | .val2 = (_rateid), \ | |
100 | .flags = (_flags), \ | |
101 | } | |
102 | static struct ieee80211_rate __b43legacy_ratetable[] = { | |
103 | RATETAB_ENT(B43legacy_CCK_RATE_1MB, IEEE80211_RATE_CCK), | |
104 | RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_CCK_2), | |
105 | RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_CCK_2), | |
106 | RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_CCK_2), | |
107 | RATETAB_ENT(B43legacy_OFDM_RATE_6MB, IEEE80211_RATE_OFDM), | |
108 | RATETAB_ENT(B43legacy_OFDM_RATE_9MB, IEEE80211_RATE_OFDM), | |
109 | RATETAB_ENT(B43legacy_OFDM_RATE_12MB, IEEE80211_RATE_OFDM), | |
110 | RATETAB_ENT(B43legacy_OFDM_RATE_18MB, IEEE80211_RATE_OFDM), | |
111 | RATETAB_ENT(B43legacy_OFDM_RATE_24MB, IEEE80211_RATE_OFDM), | |
112 | RATETAB_ENT(B43legacy_OFDM_RATE_36MB, IEEE80211_RATE_OFDM), | |
113 | RATETAB_ENT(B43legacy_OFDM_RATE_48MB, IEEE80211_RATE_OFDM), | |
114 | RATETAB_ENT(B43legacy_OFDM_RATE_54MB, IEEE80211_RATE_OFDM), | |
115 | }; | |
116 | #define b43legacy_a_ratetable (__b43legacy_ratetable + 4) | |
117 | #define b43legacy_a_ratetable_size 8 | |
118 | #define b43legacy_b_ratetable (__b43legacy_ratetable + 0) | |
119 | #define b43legacy_b_ratetable_size 4 | |
120 | #define b43legacy_g_ratetable (__b43legacy_ratetable + 0) | |
121 | #define b43legacy_g_ratetable_size 12 | |
122 | ||
123 | #define CHANTAB_ENT(_chanid, _freq) \ | |
124 | { \ | |
125 | .chan = (_chanid), \ | |
126 | .freq = (_freq), \ | |
127 | .val = (_chanid), \ | |
128 | .flag = IEEE80211_CHAN_W_SCAN | \ | |
129 | IEEE80211_CHAN_W_ACTIVE_SCAN | \ | |
130 | IEEE80211_CHAN_W_IBSS, \ | |
131 | .power_level = 0x0A, \ | |
132 | .antenna_max = 0xFF, \ | |
133 | } | |
134 | static struct ieee80211_channel b43legacy_bg_chantable[] = { | |
135 | CHANTAB_ENT(1, 2412), | |
136 | CHANTAB_ENT(2, 2417), | |
137 | CHANTAB_ENT(3, 2422), | |
138 | CHANTAB_ENT(4, 2427), | |
139 | CHANTAB_ENT(5, 2432), | |
140 | CHANTAB_ENT(6, 2437), | |
141 | CHANTAB_ENT(7, 2442), | |
142 | CHANTAB_ENT(8, 2447), | |
143 | CHANTAB_ENT(9, 2452), | |
144 | CHANTAB_ENT(10, 2457), | |
145 | CHANTAB_ENT(11, 2462), | |
146 | CHANTAB_ENT(12, 2467), | |
147 | CHANTAB_ENT(13, 2472), | |
148 | CHANTAB_ENT(14, 2484), | |
149 | }; | |
150 | #define b43legacy_bg_chantable_size ARRAY_SIZE(b43legacy_bg_chantable) | |
151 | ||
152 | static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev); | |
153 | static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev); | |
154 | static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev); | |
155 | static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev); | |
156 | ||
157 | ||
158 | static int b43legacy_ratelimit(struct b43legacy_wl *wl) | |
159 | { | |
160 | if (!wl || !wl->current_dev) | |
161 | return 1; | |
162 | if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED) | |
163 | return 1; | |
164 | /* We are up and running. | |
165 | * Ratelimit the messages to avoid DoS over the net. */ | |
166 | return net_ratelimit(); | |
167 | } | |
168 | ||
169 | void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...) | |
170 | { | |
171 | va_list args; | |
172 | ||
173 | if (!b43legacy_ratelimit(wl)) | |
174 | return; | |
175 | va_start(args, fmt); | |
176 | printk(KERN_INFO "b43legacy-%s: ", | |
177 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); | |
178 | vprintk(fmt, args); | |
179 | va_end(args); | |
180 | } | |
181 | ||
182 | void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...) | |
183 | { | |
184 | va_list args; | |
185 | ||
186 | if (!b43legacy_ratelimit(wl)) | |
187 | return; | |
188 | va_start(args, fmt); | |
189 | printk(KERN_ERR "b43legacy-%s ERROR: ", | |
190 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); | |
191 | vprintk(fmt, args); | |
192 | va_end(args); | |
193 | } | |
194 | ||
195 | void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...) | |
196 | { | |
197 | va_list args; | |
198 | ||
199 | if (!b43legacy_ratelimit(wl)) | |
200 | return; | |
201 | va_start(args, fmt); | |
202 | printk(KERN_WARNING "b43legacy-%s warning: ", | |
203 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); | |
204 | vprintk(fmt, args); | |
205 | va_end(args); | |
206 | } | |
207 | ||
208 | #if B43legacy_DEBUG | |
209 | void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...) | |
210 | { | |
211 | va_list args; | |
212 | ||
213 | va_start(args, fmt); | |
214 | printk(KERN_DEBUG "b43legacy-%s debug: ", | |
215 | (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); | |
216 | vprintk(fmt, args); | |
217 | va_end(args); | |
218 | } | |
219 | #endif /* DEBUG */ | |
220 | ||
221 | static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset, | |
222 | u32 val) | |
223 | { | |
224 | u32 status; | |
225 | ||
226 | B43legacy_WARN_ON(offset % 4 != 0); | |
227 | ||
228 | status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); | |
229 | if (status & B43legacy_SBF_XFER_REG_BYTESWAP) | |
230 | val = swab32(val); | |
231 | ||
232 | b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset); | |
233 | mmiowb(); | |
234 | b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val); | |
235 | } | |
236 | ||
237 | static inline | |
238 | void b43legacy_shm_control_word(struct b43legacy_wldev *dev, | |
239 | u16 routing, u16 offset) | |
240 | { | |
241 | u32 control; | |
242 | ||
243 | /* "offset" is the WORD offset. */ | |
244 | ||
245 | control = routing; | |
246 | control <<= 16; | |
247 | control |= offset; | |
248 | b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control); | |
249 | } | |
250 | ||
251 | u32 b43legacy_shm_read32(struct b43legacy_wldev *dev, | |
252 | u16 routing, u16 offset) | |
253 | { | |
254 | u32 ret; | |
255 | ||
256 | if (routing == B43legacy_SHM_SHARED) { | |
257 | B43legacy_WARN_ON((offset & 0x0001) != 0); | |
258 | if (offset & 0x0003) { | |
259 | /* Unaligned access */ | |
260 | b43legacy_shm_control_word(dev, routing, offset >> 2); | |
261 | ret = b43legacy_read16(dev, | |
262 | B43legacy_MMIO_SHM_DATA_UNALIGNED); | |
263 | ret <<= 16; | |
264 | b43legacy_shm_control_word(dev, routing, | |
265 | (offset >> 2) + 1); | |
266 | ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA); | |
267 | ||
268 | return ret; | |
269 | } | |
270 | offset >>= 2; | |
271 | } | |
272 | b43legacy_shm_control_word(dev, routing, offset); | |
273 | ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA); | |
274 | ||
275 | return ret; | |
276 | } | |
277 | ||
278 | u16 b43legacy_shm_read16(struct b43legacy_wldev *dev, | |
279 | u16 routing, u16 offset) | |
280 | { | |
281 | u16 ret; | |
282 | ||
283 | if (routing == B43legacy_SHM_SHARED) { | |
284 | B43legacy_WARN_ON((offset & 0x0001) != 0); | |
285 | if (offset & 0x0003) { | |
286 | /* Unaligned access */ | |
287 | b43legacy_shm_control_word(dev, routing, offset >> 2); | |
288 | ret = b43legacy_read16(dev, | |
289 | B43legacy_MMIO_SHM_DATA_UNALIGNED); | |
290 | ||
291 | return ret; | |
292 | } | |
293 | offset >>= 2; | |
294 | } | |
295 | b43legacy_shm_control_word(dev, routing, offset); | |
296 | ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA); | |
297 | ||
298 | return ret; | |
299 | } | |
300 | ||
301 | void b43legacy_shm_write32(struct b43legacy_wldev *dev, | |
302 | u16 routing, u16 offset, | |
303 | u32 value) | |
304 | { | |
305 | if (routing == B43legacy_SHM_SHARED) { | |
306 | B43legacy_WARN_ON((offset & 0x0001) != 0); | |
307 | if (offset & 0x0003) { | |
308 | /* Unaligned access */ | |
309 | b43legacy_shm_control_word(dev, routing, offset >> 2); | |
310 | mmiowb(); | |
311 | b43legacy_write16(dev, | |
312 | B43legacy_MMIO_SHM_DATA_UNALIGNED, | |
313 | (value >> 16) & 0xffff); | |
314 | mmiowb(); | |
315 | b43legacy_shm_control_word(dev, routing, | |
316 | (offset >> 2) + 1); | |
317 | mmiowb(); | |
318 | b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, | |
319 | value & 0xffff); | |
320 | return; | |
321 | } | |
322 | offset >>= 2; | |
323 | } | |
324 | b43legacy_shm_control_word(dev, routing, offset); | |
325 | mmiowb(); | |
326 | b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value); | |
327 | } | |
328 | ||
329 | void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset, | |
330 | u16 value) | |
331 | { | |
332 | if (routing == B43legacy_SHM_SHARED) { | |
333 | B43legacy_WARN_ON((offset & 0x0001) != 0); | |
334 | if (offset & 0x0003) { | |
335 | /* Unaligned access */ | |
336 | b43legacy_shm_control_word(dev, routing, offset >> 2); | |
337 | mmiowb(); | |
338 | b43legacy_write16(dev, | |
339 | B43legacy_MMIO_SHM_DATA_UNALIGNED, | |
340 | value); | |
341 | return; | |
342 | } | |
343 | offset >>= 2; | |
344 | } | |
345 | b43legacy_shm_control_word(dev, routing, offset); | |
346 | mmiowb(); | |
347 | b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value); | |
348 | } | |
349 | ||
350 | /* Read HostFlags */ | |
351 | u32 b43legacy_hf_read(struct b43legacy_wldev *dev) | |
352 | { | |
353 | u32 ret; | |
354 | ||
355 | ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
356 | B43legacy_SHM_SH_HOSTFHI); | |
357 | ret <<= 16; | |
358 | ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
359 | B43legacy_SHM_SH_HOSTFLO); | |
360 | ||
361 | return ret; | |
362 | } | |
363 | ||
364 | /* Write HostFlags */ | |
365 | void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value) | |
366 | { | |
367 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
368 | B43legacy_SHM_SH_HOSTFLO, | |
369 | (value & 0x0000FFFF)); | |
370 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
371 | B43legacy_SHM_SH_HOSTFHI, | |
372 | ((value & 0xFFFF0000) >> 16)); | |
373 | } | |
374 | ||
375 | void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf) | |
376 | { | |
377 | /* We need to be careful. As we read the TSF from multiple | |
378 | * registers, we should take care of register overflows. | |
379 | * In theory, the whole tsf read process should be atomic. | |
380 | * We try to be atomic here, by restaring the read process, | |
381 | * if any of the high registers changed (overflew). | |
382 | */ | |
383 | if (dev->dev->id.revision >= 3) { | |
384 | u32 low; | |
385 | u32 high; | |
386 | u32 high2; | |
387 | ||
388 | do { | |
389 | high = b43legacy_read32(dev, | |
390 | B43legacy_MMIO_REV3PLUS_TSF_HIGH); | |
391 | low = b43legacy_read32(dev, | |
392 | B43legacy_MMIO_REV3PLUS_TSF_LOW); | |
393 | high2 = b43legacy_read32(dev, | |
394 | B43legacy_MMIO_REV3PLUS_TSF_HIGH); | |
395 | } while (unlikely(high != high2)); | |
396 | ||
397 | *tsf = high; | |
398 | *tsf <<= 32; | |
399 | *tsf |= low; | |
400 | } else { | |
401 | u64 tmp; | |
402 | u16 v0; | |
403 | u16 v1; | |
404 | u16 v2; | |
405 | u16 v3; | |
406 | u16 test1; | |
407 | u16 test2; | |
408 | u16 test3; | |
409 | ||
410 | do { | |
411 | v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3); | |
412 | v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2); | |
413 | v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1); | |
414 | v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0); | |
415 | ||
416 | test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3); | |
417 | test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2); | |
418 | test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1); | |
419 | } while (v3 != test3 || v2 != test2 || v1 != test1); | |
420 | ||
421 | *tsf = v3; | |
422 | *tsf <<= 48; | |
423 | tmp = v2; | |
424 | tmp <<= 32; | |
425 | *tsf |= tmp; | |
426 | tmp = v1; | |
427 | tmp <<= 16; | |
428 | *tsf |= tmp; | |
429 | *tsf |= v0; | |
430 | } | |
431 | } | |
432 | ||
433 | static void b43legacy_time_lock(struct b43legacy_wldev *dev) | |
434 | { | |
435 | u32 status; | |
436 | ||
437 | status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); | |
438 | status |= B43legacy_SBF_TIME_UPDATE; | |
439 | b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status); | |
440 | mmiowb(); | |
441 | } | |
442 | ||
443 | static void b43legacy_time_unlock(struct b43legacy_wldev *dev) | |
444 | { | |
445 | u32 status; | |
446 | ||
447 | status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); | |
448 | status &= ~B43legacy_SBF_TIME_UPDATE; | |
449 | b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status); | |
450 | } | |
451 | ||
452 | static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf) | |
453 | { | |
454 | /* Be careful with the in-progress timer. | |
455 | * First zero out the low register, so we have a full | |
456 | * register-overflow duration to complete the operation. | |
457 | */ | |
458 | if (dev->dev->id.revision >= 3) { | |
459 | u32 lo = (tsf & 0x00000000FFFFFFFFULL); | |
460 | u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32; | |
461 | ||
462 | b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0); | |
463 | mmiowb(); | |
464 | b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH, | |
465 | hi); | |
466 | mmiowb(); | |
467 | b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, | |
468 | lo); | |
469 | } else { | |
470 | u16 v0 = (tsf & 0x000000000000FFFFULL); | |
471 | u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16; | |
472 | u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32; | |
473 | u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48; | |
474 | ||
475 | b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0); | |
476 | mmiowb(); | |
477 | b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3); | |
478 | mmiowb(); | |
479 | b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2); | |
480 | mmiowb(); | |
481 | b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1); | |
482 | mmiowb(); | |
483 | b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0); | |
484 | } | |
485 | } | |
486 | ||
487 | void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf) | |
488 | { | |
489 | b43legacy_time_lock(dev); | |
490 | b43legacy_tsf_write_locked(dev, tsf); | |
491 | b43legacy_time_unlock(dev); | |
492 | } | |
493 | ||
494 | static | |
495 | void b43legacy_macfilter_set(struct b43legacy_wldev *dev, | |
496 | u16 offset, const u8 *mac) | |
497 | { | |
498 | static const u8 zero_addr[ETH_ALEN] = { 0 }; | |
499 | u16 data; | |
500 | ||
501 | if (!mac) | |
502 | mac = zero_addr; | |
503 | ||
504 | offset |= 0x0020; | |
505 | b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset); | |
506 | ||
507 | data = mac[0]; | |
508 | data |= mac[1] << 8; | |
509 | b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data); | |
510 | data = mac[2]; | |
511 | data |= mac[3] << 8; | |
512 | b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data); | |
513 | data = mac[4]; | |
514 | data |= mac[5] << 8; | |
515 | b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data); | |
516 | } | |
517 | ||
518 | static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev) | |
519 | { | |
520 | static const u8 zero_addr[ETH_ALEN] = { 0 }; | |
521 | const u8 *mac = dev->wl->mac_addr; | |
522 | const u8 *bssid = dev->wl->bssid; | |
523 | u8 mac_bssid[ETH_ALEN * 2]; | |
524 | int i; | |
525 | u32 tmp; | |
526 | ||
527 | if (!bssid) | |
528 | bssid = zero_addr; | |
529 | if (!mac) | |
530 | mac = zero_addr; | |
531 | ||
532 | b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid); | |
533 | ||
534 | memcpy(mac_bssid, mac, ETH_ALEN); | |
535 | memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN); | |
536 | ||
537 | /* Write our MAC address and BSSID to template ram */ | |
538 | for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) { | |
539 | tmp = (u32)(mac_bssid[i + 0]); | |
540 | tmp |= (u32)(mac_bssid[i + 1]) << 8; | |
541 | tmp |= (u32)(mac_bssid[i + 2]) << 16; | |
542 | tmp |= (u32)(mac_bssid[i + 3]) << 24; | |
543 | b43legacy_ram_write(dev, 0x20 + i, tmp); | |
544 | b43legacy_ram_write(dev, 0x78 + i, tmp); | |
545 | b43legacy_ram_write(dev, 0x478 + i, tmp); | |
546 | } | |
547 | } | |
548 | ||
4150c572 | 549 | static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev) |
75388acd | 550 | { |
75388acd | 551 | b43legacy_write_mac_bssid_templates(dev); |
4150c572 JB |
552 | b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF, |
553 | dev->wl->mac_addr); | |
75388acd LF |
554 | } |
555 | ||
556 | static void b43legacy_set_slot_time(struct b43legacy_wldev *dev, | |
557 | u16 slot_time) | |
558 | { | |
559 | /* slot_time is in usec. */ | |
560 | if (dev->phy.type != B43legacy_PHYTYPE_G) | |
561 | return; | |
562 | b43legacy_write16(dev, 0x684, 510 + slot_time); | |
563 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010, | |
564 | slot_time); | |
565 | } | |
566 | ||
567 | static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev) | |
568 | { | |
569 | b43legacy_set_slot_time(dev, 9); | |
570 | dev->short_slot = 1; | |
571 | } | |
572 | ||
573 | static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev) | |
574 | { | |
575 | b43legacy_set_slot_time(dev, 20); | |
576 | dev->short_slot = 0; | |
577 | } | |
578 | ||
579 | /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable. | |
580 | * Returns the _previously_ enabled IRQ mask. | |
581 | */ | |
582 | static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev, | |
583 | u32 mask) | |
584 | { | |
585 | u32 old_mask; | |
586 | ||
587 | old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); | |
588 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask | | |
589 | mask); | |
590 | ||
591 | return old_mask; | |
592 | } | |
593 | ||
594 | /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable. | |
595 | * Returns the _previously_ enabled IRQ mask. | |
596 | */ | |
597 | static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev, | |
598 | u32 mask) | |
599 | { | |
600 | u32 old_mask; | |
601 | ||
602 | old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); | |
603 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask); | |
604 | ||
605 | return old_mask; | |
606 | } | |
607 | ||
608 | /* Synchronize IRQ top- and bottom-half. | |
609 | * IRQs must be masked before calling this. | |
610 | * This must not be called with the irq_lock held. | |
611 | */ | |
612 | static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev) | |
613 | { | |
614 | synchronize_irq(dev->dev->irq); | |
615 | tasklet_kill(&dev->isr_tasklet); | |
616 | } | |
617 | ||
618 | /* DummyTransmission function, as documented on | |
619 | * http://bcm-specs.sipsolutions.net/DummyTransmission | |
620 | */ | |
621 | void b43legacy_dummy_transmission(struct b43legacy_wldev *dev) | |
622 | { | |
623 | struct b43legacy_phy *phy = &dev->phy; | |
624 | unsigned int i; | |
625 | unsigned int max_loop; | |
626 | u16 value; | |
627 | u32 buffer[5] = { | |
628 | 0x00000000, | |
629 | 0x00D40000, | |
630 | 0x00000000, | |
631 | 0x01000000, | |
632 | 0x00000000, | |
633 | }; | |
634 | ||
635 | switch (phy->type) { | |
636 | case B43legacy_PHYTYPE_B: | |
637 | case B43legacy_PHYTYPE_G: | |
638 | max_loop = 0xFA; | |
639 | buffer[0] = 0x000B846E; | |
640 | break; | |
641 | default: | |
642 | B43legacy_BUG_ON(1); | |
643 | return; | |
644 | } | |
645 | ||
646 | for (i = 0; i < 5; i++) | |
647 | b43legacy_ram_write(dev, i * 4, buffer[i]); | |
648 | ||
649 | /* dummy read follows */ | |
650 | b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); | |
651 | ||
652 | b43legacy_write16(dev, 0x0568, 0x0000); | |
653 | b43legacy_write16(dev, 0x07C0, 0x0000); | |
654 | b43legacy_write16(dev, 0x050C, 0x0000); | |
655 | b43legacy_write16(dev, 0x0508, 0x0000); | |
656 | b43legacy_write16(dev, 0x050A, 0x0000); | |
657 | b43legacy_write16(dev, 0x054C, 0x0000); | |
658 | b43legacy_write16(dev, 0x056A, 0x0014); | |
659 | b43legacy_write16(dev, 0x0568, 0x0826); | |
660 | b43legacy_write16(dev, 0x0500, 0x0000); | |
661 | b43legacy_write16(dev, 0x0502, 0x0030); | |
662 | ||
663 | if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5) | |
664 | b43legacy_radio_write16(dev, 0x0051, 0x0017); | |
665 | for (i = 0x00; i < max_loop; i++) { | |
666 | value = b43legacy_read16(dev, 0x050E); | |
667 | if (value & 0x0080) | |
668 | break; | |
669 | udelay(10); | |
670 | } | |
671 | for (i = 0x00; i < 0x0A; i++) { | |
672 | value = b43legacy_read16(dev, 0x050E); | |
673 | if (value & 0x0400) | |
674 | break; | |
675 | udelay(10); | |
676 | } | |
677 | for (i = 0x00; i < 0x0A; i++) { | |
678 | value = b43legacy_read16(dev, 0x0690); | |
679 | if (!(value & 0x0100)) | |
680 | break; | |
681 | udelay(10); | |
682 | } | |
683 | if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5) | |
684 | b43legacy_radio_write16(dev, 0x0051, 0x0037); | |
685 | } | |
686 | ||
687 | /* Turn the Analog ON/OFF */ | |
688 | static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on) | |
689 | { | |
690 | b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4); | |
691 | } | |
692 | ||
693 | void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags) | |
694 | { | |
695 | u32 tmslow; | |
696 | u32 macctl; | |
697 | ||
698 | flags |= B43legacy_TMSLOW_PHYCLKEN; | |
699 | flags |= B43legacy_TMSLOW_PHYRESET; | |
700 | ssb_device_enable(dev->dev, flags); | |
701 | msleep(2); /* Wait for the PLL to turn on. */ | |
702 | ||
703 | /* Now take the PHY out of Reset again */ | |
704 | tmslow = ssb_read32(dev->dev, SSB_TMSLOW); | |
705 | tmslow |= SSB_TMSLOW_FGC; | |
706 | tmslow &= ~B43legacy_TMSLOW_PHYRESET; | |
707 | ssb_write32(dev->dev, SSB_TMSLOW, tmslow); | |
708 | ssb_read32(dev->dev, SSB_TMSLOW); /* flush */ | |
709 | msleep(1); | |
710 | tmslow &= ~SSB_TMSLOW_FGC; | |
711 | ssb_write32(dev->dev, SSB_TMSLOW, tmslow); | |
712 | ssb_read32(dev->dev, SSB_TMSLOW); /* flush */ | |
713 | msleep(1); | |
714 | ||
715 | /* Turn Analog ON */ | |
716 | b43legacy_switch_analog(dev, 1); | |
717 | ||
718 | macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); | |
719 | macctl &= ~B43legacy_MACCTL_GMODE; | |
720 | if (flags & B43legacy_TMSLOW_GMODE) { | |
721 | macctl |= B43legacy_MACCTL_GMODE; | |
722 | dev->phy.gmode = 1; | |
723 | } else | |
724 | dev->phy.gmode = 0; | |
725 | macctl |= B43legacy_MACCTL_IHR_ENABLED; | |
726 | b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); | |
727 | } | |
728 | ||
729 | static void handle_irq_transmit_status(struct b43legacy_wldev *dev) | |
730 | { | |
731 | u32 v0; | |
732 | u32 v1; | |
733 | u16 tmp; | |
734 | struct b43legacy_txstatus stat; | |
735 | ||
736 | while (1) { | |
737 | v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0); | |
738 | if (!(v0 & 0x00000001)) | |
739 | break; | |
740 | v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1); | |
741 | ||
742 | stat.cookie = (v0 >> 16); | |
743 | stat.seq = (v1 & 0x0000FFFF); | |
744 | stat.phy_stat = ((v1 & 0x00FF0000) >> 16); | |
745 | tmp = (v0 & 0x0000FFFF); | |
746 | stat.frame_count = ((tmp & 0xF000) >> 12); | |
747 | stat.rts_count = ((tmp & 0x0F00) >> 8); | |
748 | stat.supp_reason = ((tmp & 0x001C) >> 2); | |
749 | stat.pm_indicated = !!(tmp & 0x0080); | |
750 | stat.intermediate = !!(tmp & 0x0040); | |
751 | stat.for_ampdu = !!(tmp & 0x0020); | |
752 | stat.acked = !!(tmp & 0x0002); | |
753 | ||
754 | b43legacy_handle_txstatus(dev, &stat); | |
755 | } | |
756 | } | |
757 | ||
758 | static void drain_txstatus_queue(struct b43legacy_wldev *dev) | |
759 | { | |
760 | u32 dummy; | |
761 | ||
762 | if (dev->dev->id.revision < 5) | |
763 | return; | |
764 | /* Read all entries from the microcode TXstatus FIFO | |
765 | * and throw them away. | |
766 | */ | |
767 | while (1) { | |
768 | dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0); | |
769 | if (!(dummy & 0x00000001)) | |
770 | break; | |
771 | dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1); | |
772 | } | |
773 | } | |
774 | ||
775 | static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev) | |
776 | { | |
777 | u32 val = 0; | |
778 | ||
779 | val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A); | |
780 | val <<= 16; | |
781 | val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408); | |
782 | ||
783 | return val; | |
784 | } | |
785 | ||
786 | static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi) | |
787 | { | |
788 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408, | |
789 | (jssi & 0x0000FFFF)); | |
790 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A, | |
791 | (jssi & 0xFFFF0000) >> 16); | |
792 | } | |
793 | ||
794 | static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev) | |
795 | { | |
796 | b43legacy_jssi_write(dev, 0x7F7F7F7F); | |
797 | b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD, | |
798 | b43legacy_read32(dev, | |
799 | B43legacy_MMIO_STATUS2_BITFIELD) | |
800 | | (1 << 4)); | |
801 | B43legacy_WARN_ON(dev->noisecalc.channel_at_start != | |
802 | dev->phy.channel); | |
803 | } | |
804 | ||
805 | static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev) | |
806 | { | |
807 | /* Top half of Link Quality calculation. */ | |
808 | ||
809 | if (dev->noisecalc.calculation_running) | |
810 | return; | |
811 | dev->noisecalc.channel_at_start = dev->phy.channel; | |
812 | dev->noisecalc.calculation_running = 1; | |
813 | dev->noisecalc.nr_samples = 0; | |
814 | ||
815 | b43legacy_generate_noise_sample(dev); | |
816 | } | |
817 | ||
818 | static void handle_irq_noise(struct b43legacy_wldev *dev) | |
819 | { | |
820 | struct b43legacy_phy *phy = &dev->phy; | |
821 | u16 tmp; | |
822 | u8 noise[4]; | |
823 | u8 i; | |
824 | u8 j; | |
825 | s32 average; | |
826 | ||
827 | /* Bottom half of Link Quality calculation. */ | |
828 | ||
829 | B43legacy_WARN_ON(!dev->noisecalc.calculation_running); | |
830 | if (dev->noisecalc.channel_at_start != phy->channel) | |
831 | goto drop_calculation; | |
832 | *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev)); | |
833 | if (noise[0] == 0x7F || noise[1] == 0x7F || | |
834 | noise[2] == 0x7F || noise[3] == 0x7F) | |
835 | goto generate_new; | |
836 | ||
837 | /* Get the noise samples. */ | |
838 | B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8); | |
839 | i = dev->noisecalc.nr_samples; | |
840 | noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1); | |
841 | noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1); | |
842 | noise[2] = limit_value(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1); | |
843 | noise[3] = limit_value(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1); | |
844 | dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]]; | |
845 | dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]]; | |
846 | dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]]; | |
847 | dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]]; | |
848 | dev->noisecalc.nr_samples++; | |
849 | if (dev->noisecalc.nr_samples == 8) { | |
850 | /* Calculate the Link Quality by the noise samples. */ | |
851 | average = 0; | |
852 | for (i = 0; i < 8; i++) { | |
853 | for (j = 0; j < 4; j++) | |
854 | average += dev->noisecalc.samples[i][j]; | |
855 | } | |
856 | average /= (8 * 4); | |
857 | average *= 125; | |
858 | average += 64; | |
859 | average /= 128; | |
860 | tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
861 | 0x40C); | |
862 | tmp = (tmp / 128) & 0x1F; | |
863 | if (tmp >= 8) | |
864 | average += 2; | |
865 | else | |
866 | average -= 25; | |
867 | if (tmp == 8) | |
868 | average -= 72; | |
869 | else | |
870 | average -= 48; | |
871 | ||
872 | dev->stats.link_noise = average; | |
873 | drop_calculation: | |
874 | dev->noisecalc.calculation_running = 0; | |
875 | return; | |
876 | } | |
877 | generate_new: | |
878 | b43legacy_generate_noise_sample(dev); | |
879 | } | |
880 | ||
881 | static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev) | |
882 | { | |
883 | if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) { | |
884 | /* TODO: PS TBTT */ | |
885 | } else { | |
886 | if (1/*FIXME: the last PSpoll frame was sent successfully */) | |
887 | b43legacy_power_saving_ctl_bits(dev, -1, -1); | |
888 | } | |
889 | dev->reg124_set_0x4 = 0; | |
890 | if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS)) | |
891 | dev->reg124_set_0x4 = 1; | |
892 | } | |
893 | ||
894 | static void handle_irq_atim_end(struct b43legacy_wldev *dev) | |
895 | { | |
896 | if (!dev->reg124_set_0x4) /*FIXME rename this variable*/ | |
897 | return; | |
898 | b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD, | |
899 | b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD) | |
900 | | 0x4); | |
901 | } | |
902 | ||
903 | static void handle_irq_pmq(struct b43legacy_wldev *dev) | |
904 | { | |
905 | u32 tmp; | |
906 | ||
907 | /* TODO: AP mode. */ | |
908 | ||
909 | while (1) { | |
910 | tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS); | |
911 | if (!(tmp & 0x00000008)) | |
912 | break; | |
913 | } | |
914 | /* 16bit write is odd, but correct. */ | |
915 | b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002); | |
916 | } | |
917 | ||
918 | static void b43legacy_write_template_common(struct b43legacy_wldev *dev, | |
919 | const u8 *data, u16 size, | |
920 | u16 ram_offset, | |
921 | u16 shm_size_offset, u8 rate) | |
922 | { | |
923 | u32 i; | |
924 | u32 tmp; | |
925 | struct b43legacy_plcp_hdr4 plcp; | |
926 | ||
927 | plcp.data = 0; | |
928 | b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate); | |
929 | b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data)); | |
930 | ram_offset += sizeof(u32); | |
931 | /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet. | |
932 | * So leave the first two bytes of the next write blank. | |
933 | */ | |
934 | tmp = (u32)(data[0]) << 16; | |
935 | tmp |= (u32)(data[1]) << 24; | |
936 | b43legacy_ram_write(dev, ram_offset, tmp); | |
937 | ram_offset += sizeof(u32); | |
938 | for (i = 2; i < size; i += sizeof(u32)) { | |
939 | tmp = (u32)(data[i + 0]); | |
940 | if (i + 1 < size) | |
941 | tmp |= (u32)(data[i + 1]) << 8; | |
942 | if (i + 2 < size) | |
943 | tmp |= (u32)(data[i + 2]) << 16; | |
944 | if (i + 3 < size) | |
945 | tmp |= (u32)(data[i + 3]) << 24; | |
946 | b43legacy_ram_write(dev, ram_offset + i - 2, tmp); | |
947 | } | |
948 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset, | |
949 | size + sizeof(struct b43legacy_plcp_hdr6)); | |
950 | } | |
951 | ||
952 | static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev, | |
953 | u16 ram_offset, | |
954 | u16 shm_size_offset, u8 rate) | |
955 | { | |
956 | int len; | |
957 | const u8 *data; | |
958 | ||
959 | B43legacy_WARN_ON(!dev->cached_beacon); | |
960 | len = min((size_t)dev->cached_beacon->len, | |
961 | 0x200 - sizeof(struct b43legacy_plcp_hdr6)); | |
962 | data = (const u8 *)(dev->cached_beacon->data); | |
963 | b43legacy_write_template_common(dev, data, | |
964 | len, ram_offset, | |
965 | shm_size_offset, rate); | |
966 | } | |
967 | ||
968 | static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev, | |
969 | u16 shm_offset, u16 size, | |
970 | u8 rate) | |
971 | { | |
972 | struct b43legacy_plcp_hdr4 plcp; | |
973 | u32 tmp; | |
974 | __le16 dur; | |
975 | ||
976 | plcp.data = 0; | |
977 | b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate); | |
978 | dur = ieee80211_generic_frame_duration(dev->wl->hw, | |
32bfd35d | 979 | dev->wl->vif, |
75388acd LF |
980 | size, |
981 | B43legacy_RATE_TO_100KBPS(rate)); | |
982 | /* Write PLCP in two parts and timing for packet transfer */ | |
983 | tmp = le32_to_cpu(plcp.data); | |
984 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset, | |
985 | tmp & 0xFFFF); | |
986 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2, | |
987 | tmp >> 16); | |
988 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6, | |
989 | le16_to_cpu(dur)); | |
990 | } | |
991 | ||
992 | /* Instead of using custom probe response template, this function | |
993 | * just patches custom beacon template by: | |
994 | * 1) Changing packet type | |
995 | * 2) Patching duration field | |
996 | * 3) Stripping TIM | |
997 | */ | |
998 | static u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev, | |
999 | u16 *dest_size, u8 rate) | |
1000 | { | |
1001 | const u8 *src_data; | |
1002 | u8 *dest_data; | |
1003 | u16 src_size; | |
1004 | u16 elem_size; | |
1005 | u16 src_pos; | |
1006 | u16 dest_pos; | |
1007 | __le16 dur; | |
1008 | struct ieee80211_hdr *hdr; | |
1009 | ||
1010 | B43legacy_WARN_ON(!dev->cached_beacon); | |
1011 | src_size = dev->cached_beacon->len; | |
1012 | src_data = (const u8 *)dev->cached_beacon->data; | |
1013 | ||
1014 | if (unlikely(src_size < 0x24)) { | |
1015 | b43legacydbg(dev->wl, "b43legacy_generate_probe_resp: " | |
1016 | "invalid beacon\n"); | |
1017 | return NULL; | |
1018 | } | |
1019 | ||
1020 | dest_data = kmalloc(src_size, GFP_ATOMIC); | |
1021 | if (unlikely(!dest_data)) | |
1022 | return NULL; | |
1023 | ||
1024 | /* 0x24 is offset of first variable-len Information-Element | |
1025 | * in beacon frame. | |
1026 | */ | |
1027 | memcpy(dest_data, src_data, 0x24); | |
1028 | src_pos = 0x24; | |
1029 | dest_pos = 0x24; | |
1030 | for (; src_pos < src_size - 2; src_pos += elem_size) { | |
1031 | elem_size = src_data[src_pos + 1] + 2; | |
1032 | if (src_data[src_pos] != 0x05) { /* TIM */ | |
1033 | memcpy(dest_data + dest_pos, src_data + src_pos, | |
1034 | elem_size); | |
1035 | dest_pos += elem_size; | |
1036 | } | |
1037 | } | |
1038 | *dest_size = dest_pos; | |
1039 | hdr = (struct ieee80211_hdr *)dest_data; | |
1040 | ||
1041 | /* Set the frame control. */ | |
1042 | hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | | |
1043 | IEEE80211_STYPE_PROBE_RESP); | |
1044 | dur = ieee80211_generic_frame_duration(dev->wl->hw, | |
32bfd35d | 1045 | dev->wl->vif, |
75388acd LF |
1046 | *dest_size, |
1047 | B43legacy_RATE_TO_100KBPS(rate)); | |
1048 | hdr->duration_id = dur; | |
1049 | ||
1050 | return dest_data; | |
1051 | } | |
1052 | ||
1053 | static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev, | |
1054 | u16 ram_offset, | |
1055 | u16 shm_size_offset, u8 rate) | |
1056 | { | |
1057 | u8 *probe_resp_data; | |
1058 | u16 size; | |
1059 | ||
1060 | B43legacy_WARN_ON(!dev->cached_beacon); | |
1061 | size = dev->cached_beacon->len; | |
1062 | probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate); | |
1063 | if (unlikely(!probe_resp_data)) | |
1064 | return; | |
1065 | ||
1066 | /* Looks like PLCP headers plus packet timings are stored for | |
1067 | * all possible basic rates | |
1068 | */ | |
1069 | b43legacy_write_probe_resp_plcp(dev, 0x31A, size, | |
1070 | B43legacy_CCK_RATE_1MB); | |
1071 | b43legacy_write_probe_resp_plcp(dev, 0x32C, size, | |
1072 | B43legacy_CCK_RATE_2MB); | |
1073 | b43legacy_write_probe_resp_plcp(dev, 0x33E, size, | |
1074 | B43legacy_CCK_RATE_5MB); | |
1075 | b43legacy_write_probe_resp_plcp(dev, 0x350, size, | |
1076 | B43legacy_CCK_RATE_11MB); | |
1077 | ||
1078 | size = min((size_t)size, | |
1079 | 0x200 - sizeof(struct b43legacy_plcp_hdr6)); | |
1080 | b43legacy_write_template_common(dev, probe_resp_data, | |
1081 | size, ram_offset, | |
1082 | shm_size_offset, rate); | |
1083 | kfree(probe_resp_data); | |
1084 | } | |
1085 | ||
1086 | static int b43legacy_refresh_cached_beacon(struct b43legacy_wldev *dev, | |
1087 | struct sk_buff *beacon) | |
1088 | { | |
1089 | if (dev->cached_beacon) | |
1090 | kfree_skb(dev->cached_beacon); | |
1091 | dev->cached_beacon = beacon; | |
1092 | ||
1093 | return 0; | |
1094 | } | |
1095 | ||
1096 | static void b43legacy_update_templates(struct b43legacy_wldev *dev) | |
1097 | { | |
1098 | u32 status; | |
1099 | ||
1100 | B43legacy_WARN_ON(!dev->cached_beacon); | |
1101 | ||
1102 | b43legacy_write_beacon_template(dev, 0x68, 0x18, | |
1103 | B43legacy_CCK_RATE_1MB); | |
1104 | b43legacy_write_beacon_template(dev, 0x468, 0x1A, | |
1105 | B43legacy_CCK_RATE_1MB); | |
1106 | b43legacy_write_probe_resp_template(dev, 0x268, 0x4A, | |
1107 | B43legacy_CCK_RATE_11MB); | |
1108 | ||
1109 | status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD); | |
1110 | status |= 0x03; | |
1111 | b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD, status); | |
1112 | } | |
1113 | ||
1114 | static void b43legacy_refresh_templates(struct b43legacy_wldev *dev, | |
1115 | struct sk_buff *beacon) | |
1116 | { | |
1117 | int err; | |
1118 | ||
1119 | err = b43legacy_refresh_cached_beacon(dev, beacon); | |
1120 | if (unlikely(err)) | |
1121 | return; | |
1122 | b43legacy_update_templates(dev); | |
1123 | } | |
1124 | ||
1125 | static void b43legacy_set_ssid(struct b43legacy_wldev *dev, | |
1126 | const u8 *ssid, u8 ssid_len) | |
1127 | { | |
1128 | u32 tmp; | |
1129 | u16 i; | |
1130 | u16 len; | |
1131 | ||
1132 | len = min((u16)ssid_len, (u16)0x100); | |
1133 | for (i = 0; i < len; i += sizeof(u32)) { | |
1134 | tmp = (u32)(ssid[i + 0]); | |
1135 | if (i + 1 < len) | |
1136 | tmp |= (u32)(ssid[i + 1]) << 8; | |
1137 | if (i + 2 < len) | |
1138 | tmp |= (u32)(ssid[i + 2]) << 16; | |
1139 | if (i + 3 < len) | |
1140 | tmp |= (u32)(ssid[i + 3]) << 24; | |
1141 | b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, | |
1142 | 0x380 + i, tmp); | |
1143 | } | |
1144 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
1145 | 0x48, len); | |
1146 | } | |
1147 | ||
1148 | static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev, | |
1149 | u16 beacon_int) | |
1150 | { | |
1151 | b43legacy_time_lock(dev); | |
1152 | if (dev->dev->id.revision >= 3) | |
1153 | b43legacy_write32(dev, 0x188, (beacon_int << 16)); | |
1154 | else { | |
1155 | b43legacy_write16(dev, 0x606, (beacon_int >> 6)); | |
1156 | b43legacy_write16(dev, 0x610, beacon_int); | |
1157 | } | |
1158 | b43legacy_time_unlock(dev); | |
1159 | } | |
1160 | ||
1161 | static void handle_irq_beacon(struct b43legacy_wldev *dev) | |
1162 | { | |
1163 | u32 status; | |
1164 | ||
1165 | if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) | |
1166 | return; | |
1167 | ||
1168 | dev->irq_savedstate &= ~B43legacy_IRQ_BEACON; | |
1169 | status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD); | |
1170 | ||
1171 | if (!dev->cached_beacon || ((status & 0x1) && (status & 0x2))) { | |
1172 | /* ACK beacon IRQ. */ | |
1173 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, | |
1174 | B43legacy_IRQ_BEACON); | |
1175 | dev->irq_savedstate |= B43legacy_IRQ_BEACON; | |
1176 | if (dev->cached_beacon) | |
1177 | kfree_skb(dev->cached_beacon); | |
1178 | dev->cached_beacon = NULL; | |
1179 | return; | |
1180 | } | |
1181 | if (!(status & 0x1)) { | |
1182 | b43legacy_write_beacon_template(dev, 0x68, 0x18, | |
1183 | B43legacy_CCK_RATE_1MB); | |
1184 | status |= 0x1; | |
1185 | b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD, | |
1186 | status); | |
1187 | } | |
1188 | if (!(status & 0x2)) { | |
1189 | b43legacy_write_beacon_template(dev, 0x468, 0x1A, | |
1190 | B43legacy_CCK_RATE_1MB); | |
1191 | status |= 0x2; | |
1192 | b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD, | |
1193 | status); | |
1194 | } | |
1195 | } | |
1196 | ||
1197 | static void handle_irq_ucode_debug(struct b43legacy_wldev *dev) | |
1198 | { | |
1199 | } | |
1200 | ||
1201 | /* Interrupt handler bottom-half */ | |
1202 | static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev) | |
1203 | { | |
1204 | u32 reason; | |
1205 | u32 dma_reason[ARRAY_SIZE(dev->dma_reason)]; | |
1206 | u32 merged_dma_reason = 0; | |
1207 | int i; | |
75388acd LF |
1208 | unsigned long flags; |
1209 | ||
1210 | spin_lock_irqsave(&dev->wl->irq_lock, flags); | |
1211 | ||
1212 | B43legacy_WARN_ON(b43legacy_status(dev) < | |
1213 | B43legacy_STAT_INITIALIZED); | |
1214 | ||
1215 | reason = dev->irq_reason; | |
1216 | for (i = 0; i < ARRAY_SIZE(dma_reason); i++) { | |
1217 | dma_reason[i] = dev->dma_reason[i]; | |
1218 | merged_dma_reason |= dma_reason[i]; | |
1219 | } | |
1220 | ||
1221 | if (unlikely(reason & B43legacy_IRQ_MAC_TXERR)) | |
1222 | b43legacyerr(dev->wl, "MAC transmission error\n"); | |
1223 | ||
a293ee99 | 1224 | if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) { |
75388acd | 1225 | b43legacyerr(dev->wl, "PHY transmission error\n"); |
a293ee99 SB |
1226 | rmb(); |
1227 | if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) { | |
1228 | b43legacyerr(dev->wl, "Too many PHY TX errors, " | |
1229 | "restarting the controller\n"); | |
1230 | b43legacy_controller_restart(dev, "PHY TX errors"); | |
1231 | } | |
1232 | } | |
75388acd LF |
1233 | |
1234 | if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK | | |
1235 | B43legacy_DMAIRQ_NONFATALMASK))) { | |
1236 | if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) { | |
1237 | b43legacyerr(dev->wl, "Fatal DMA error: " | |
1238 | "0x%08X, 0x%08X, 0x%08X, " | |
1239 | "0x%08X, 0x%08X, 0x%08X\n", | |
1240 | dma_reason[0], dma_reason[1], | |
1241 | dma_reason[2], dma_reason[3], | |
1242 | dma_reason[4], dma_reason[5]); | |
1243 | b43legacy_controller_restart(dev, "DMA error"); | |
1244 | mmiowb(); | |
1245 | spin_unlock_irqrestore(&dev->wl->irq_lock, flags); | |
1246 | return; | |
1247 | } | |
1248 | if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK) | |
1249 | b43legacyerr(dev->wl, "DMA error: " | |
1250 | "0x%08X, 0x%08X, 0x%08X, " | |
1251 | "0x%08X, 0x%08X, 0x%08X\n", | |
1252 | dma_reason[0], dma_reason[1], | |
1253 | dma_reason[2], dma_reason[3], | |
1254 | dma_reason[4], dma_reason[5]); | |
1255 | } | |
1256 | ||
1257 | if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG)) | |
1258 | handle_irq_ucode_debug(dev); | |
1259 | if (reason & B43legacy_IRQ_TBTT_INDI) | |
1260 | handle_irq_tbtt_indication(dev); | |
1261 | if (reason & B43legacy_IRQ_ATIM_END) | |
1262 | handle_irq_atim_end(dev); | |
1263 | if (reason & B43legacy_IRQ_BEACON) | |
1264 | handle_irq_beacon(dev); | |
1265 | if (reason & B43legacy_IRQ_PMQ) | |
1266 | handle_irq_pmq(dev); | |
1267 | if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK) | |
1268 | ;/*TODO*/ | |
1269 | if (reason & B43legacy_IRQ_NOISESAMPLE_OK) | |
1270 | handle_irq_noise(dev); | |
1271 | ||
1272 | /* Check the DMA reason registers for received data. */ | |
1273 | if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) { | |
1274 | if (b43legacy_using_pio(dev)) | |
1275 | b43legacy_pio_rx(dev->pio.queue0); | |
1276 | else | |
1277 | b43legacy_dma_rx(dev->dma.rx_ring0); | |
75388acd LF |
1278 | } |
1279 | B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE); | |
1280 | B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE); | |
1281 | if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) { | |
1282 | if (b43legacy_using_pio(dev)) | |
1283 | b43legacy_pio_rx(dev->pio.queue3); | |
1284 | else | |
1285 | b43legacy_dma_rx(dev->dma.rx_ring3); | |
75388acd LF |
1286 | } |
1287 | B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE); | |
1288 | B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE); | |
1289 | ||
ba48f7bb | 1290 | if (reason & B43legacy_IRQ_TX_OK) |
75388acd | 1291 | handle_irq_transmit_status(dev); |
75388acd | 1292 | |
75388acd LF |
1293 | b43legacy_interrupt_enable(dev, dev->irq_savedstate); |
1294 | mmiowb(); | |
1295 | spin_unlock_irqrestore(&dev->wl->irq_lock, flags); | |
1296 | } | |
1297 | ||
1298 | static void pio_irq_workaround(struct b43legacy_wldev *dev, | |
1299 | u16 base, int queueidx) | |
1300 | { | |
1301 | u16 rxctl; | |
1302 | ||
1303 | rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL); | |
1304 | if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE) | |
1305 | dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE; | |
1306 | else | |
1307 | dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE; | |
1308 | } | |
1309 | ||
1310 | static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason) | |
1311 | { | |
1312 | if (b43legacy_using_pio(dev) && | |
1313 | (dev->dev->id.revision < 3) && | |
1314 | (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) { | |
1315 | /* Apply a PIO specific workaround to the dma_reasons */ | |
1316 | pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0); | |
1317 | pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1); | |
1318 | pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2); | |
1319 | pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3); | |
1320 | } | |
1321 | ||
1322 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason); | |
1323 | ||
1324 | b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON, | |
1325 | dev->dma_reason[0]); | |
1326 | b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON, | |
1327 | dev->dma_reason[1]); | |
1328 | b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON, | |
1329 | dev->dma_reason[2]); | |
1330 | b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON, | |
1331 | dev->dma_reason[3]); | |
1332 | b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON, | |
1333 | dev->dma_reason[4]); | |
1334 | b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON, | |
1335 | dev->dma_reason[5]); | |
1336 | } | |
1337 | ||
1338 | /* Interrupt handler top-half */ | |
1339 | static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id) | |
1340 | { | |
1341 | irqreturn_t ret = IRQ_NONE; | |
1342 | struct b43legacy_wldev *dev = dev_id; | |
1343 | u32 reason; | |
1344 | ||
1345 | if (!dev) | |
1346 | return IRQ_NONE; | |
1347 | ||
1348 | spin_lock(&dev->wl->irq_lock); | |
1349 | ||
1350 | if (b43legacy_status(dev) < B43legacy_STAT_STARTED) | |
1351 | goto out; | |
1352 | reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); | |
1353 | if (reason == 0xffffffff) /* shared IRQ */ | |
1354 | goto out; | |
1355 | ret = IRQ_HANDLED; | |
1356 | reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); | |
1357 | if (!reason) | |
1358 | goto out; | |
1359 | ||
1360 | dev->dma_reason[0] = b43legacy_read32(dev, | |
1361 | B43legacy_MMIO_DMA0_REASON) | |
1362 | & 0x0001DC00; | |
1363 | dev->dma_reason[1] = b43legacy_read32(dev, | |
1364 | B43legacy_MMIO_DMA1_REASON) | |
1365 | & 0x0000DC00; | |
1366 | dev->dma_reason[2] = b43legacy_read32(dev, | |
1367 | B43legacy_MMIO_DMA2_REASON) | |
1368 | & 0x0000DC00; | |
1369 | dev->dma_reason[3] = b43legacy_read32(dev, | |
1370 | B43legacy_MMIO_DMA3_REASON) | |
1371 | & 0x0001DC00; | |
1372 | dev->dma_reason[4] = b43legacy_read32(dev, | |
1373 | B43legacy_MMIO_DMA4_REASON) | |
1374 | & 0x0000DC00; | |
1375 | dev->dma_reason[5] = b43legacy_read32(dev, | |
1376 | B43legacy_MMIO_DMA5_REASON) | |
1377 | & 0x0000DC00; | |
1378 | ||
1379 | b43legacy_interrupt_ack(dev, reason); | |
1380 | /* disable all IRQs. They are enabled again in the bottom half. */ | |
1381 | dev->irq_savedstate = b43legacy_interrupt_disable(dev, | |
1382 | B43legacy_IRQ_ALL); | |
1383 | /* save the reason code and call our bottom half. */ | |
1384 | dev->irq_reason = reason; | |
1385 | tasklet_schedule(&dev->isr_tasklet); | |
1386 | out: | |
1387 | mmiowb(); | |
1388 | spin_unlock(&dev->wl->irq_lock); | |
1389 | ||
1390 | return ret; | |
1391 | } | |
1392 | ||
1393 | static void b43legacy_release_firmware(struct b43legacy_wldev *dev) | |
1394 | { | |
1395 | release_firmware(dev->fw.ucode); | |
1396 | dev->fw.ucode = NULL; | |
1397 | release_firmware(dev->fw.pcm); | |
1398 | dev->fw.pcm = NULL; | |
1399 | release_firmware(dev->fw.initvals); | |
1400 | dev->fw.initvals = NULL; | |
1401 | release_firmware(dev->fw.initvals_band); | |
1402 | dev->fw.initvals_band = NULL; | |
1403 | } | |
1404 | ||
1405 | static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl) | |
1406 | { | |
1407 | b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/" | |
354807e0 | 1408 | "Drivers/b43#devicefirmware " |
75388acd LF |
1409 | "and download the correct firmware (version 3).\n"); |
1410 | } | |
1411 | ||
1412 | static int do_request_fw(struct b43legacy_wldev *dev, | |
1413 | const char *name, | |
1414 | const struct firmware **fw) | |
1415 | { | |
1416 | char path[sizeof(modparam_fwpostfix) + 32]; | |
1417 | struct b43legacy_fw_header *hdr; | |
1418 | u32 size; | |
1419 | int err; | |
1420 | ||
1421 | if (!name) | |
1422 | return 0; | |
1423 | ||
1424 | snprintf(path, ARRAY_SIZE(path), | |
1425 | "b43legacy%s/%s.fw", | |
1426 | modparam_fwpostfix, name); | |
1427 | err = request_firmware(fw, path, dev->dev->dev); | |
1428 | if (err) { | |
1429 | b43legacyerr(dev->wl, "Firmware file \"%s\" not found " | |
1430 | "or load failed.\n", path); | |
1431 | return err; | |
1432 | } | |
1433 | if ((*fw)->size < sizeof(struct b43legacy_fw_header)) | |
1434 | goto err_format; | |
1435 | hdr = (struct b43legacy_fw_header *)((*fw)->data); | |
1436 | switch (hdr->type) { | |
1437 | case B43legacy_FW_TYPE_UCODE: | |
1438 | case B43legacy_FW_TYPE_PCM: | |
1439 | size = be32_to_cpu(hdr->size); | |
1440 | if (size != (*fw)->size - sizeof(struct b43legacy_fw_header)) | |
1441 | goto err_format; | |
1442 | /* fallthrough */ | |
1443 | case B43legacy_FW_TYPE_IV: | |
1444 | if (hdr->ver != 1) | |
1445 | goto err_format; | |
1446 | break; | |
1447 | default: | |
1448 | goto err_format; | |
1449 | } | |
1450 | ||
1451 | return err; | |
1452 | ||
1453 | err_format: | |
1454 | b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path); | |
1455 | return -EPROTO; | |
1456 | } | |
1457 | ||
1458 | static int b43legacy_request_firmware(struct b43legacy_wldev *dev) | |
1459 | { | |
1460 | struct b43legacy_firmware *fw = &dev->fw; | |
1461 | const u8 rev = dev->dev->id.revision; | |
1462 | const char *filename; | |
1463 | u32 tmshigh; | |
1464 | int err; | |
1465 | ||
1466 | tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH); | |
1467 | if (!fw->ucode) { | |
1468 | if (rev == 2) | |
1469 | filename = "ucode2"; | |
1470 | else if (rev == 4) | |
1471 | filename = "ucode4"; | |
1472 | else | |
1473 | filename = "ucode5"; | |
1474 | err = do_request_fw(dev, filename, &fw->ucode); | |
1475 | if (err) | |
1476 | goto err_load; | |
1477 | } | |
1478 | if (!fw->pcm) { | |
1479 | if (rev < 5) | |
1480 | filename = "pcm4"; | |
1481 | else | |
1482 | filename = "pcm5"; | |
1483 | err = do_request_fw(dev, filename, &fw->pcm); | |
1484 | if (err) | |
1485 | goto err_load; | |
1486 | } | |
1487 | if (!fw->initvals) { | |
1488 | switch (dev->phy.type) { | |
1489 | case B43legacy_PHYTYPE_G: | |
1490 | if ((rev >= 5) && (rev <= 10)) | |
1491 | filename = "b0g0initvals5"; | |
1492 | else if (rev == 2 || rev == 4) | |
1493 | filename = "b0g0initvals2"; | |
1494 | else | |
1495 | goto err_no_initvals; | |
1496 | break; | |
1497 | default: | |
1498 | goto err_no_initvals; | |
1499 | } | |
1500 | err = do_request_fw(dev, filename, &fw->initvals); | |
1501 | if (err) | |
1502 | goto err_load; | |
1503 | } | |
1504 | if (!fw->initvals_band) { | |
1505 | switch (dev->phy.type) { | |
1506 | case B43legacy_PHYTYPE_G: | |
1507 | if ((rev >= 5) && (rev <= 10)) | |
1508 | filename = "b0g0bsinitvals5"; | |
1509 | else if (rev >= 11) | |
1510 | filename = NULL; | |
1511 | else if (rev == 2 || rev == 4) | |
1512 | filename = NULL; | |
1513 | else | |
1514 | goto err_no_initvals; | |
1515 | break; | |
1516 | default: | |
1517 | goto err_no_initvals; | |
1518 | } | |
1519 | err = do_request_fw(dev, filename, &fw->initvals_band); | |
1520 | if (err) | |
1521 | goto err_load; | |
1522 | } | |
1523 | ||
1524 | return 0; | |
1525 | ||
1526 | err_load: | |
1527 | b43legacy_print_fw_helptext(dev->wl); | |
1528 | goto error; | |
1529 | ||
1530 | err_no_initvals: | |
1531 | err = -ENODEV; | |
1532 | b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, " | |
1533 | "core rev %u\n", dev->phy.type, rev); | |
1534 | goto error; | |
1535 | ||
1536 | error: | |
1537 | b43legacy_release_firmware(dev); | |
1538 | return err; | |
1539 | } | |
1540 | ||
1541 | static int b43legacy_upload_microcode(struct b43legacy_wldev *dev) | |
1542 | { | |
1543 | const size_t hdr_len = sizeof(struct b43legacy_fw_header); | |
1544 | const __be32 *data; | |
1545 | unsigned int i; | |
1546 | unsigned int len; | |
1547 | u16 fwrev; | |
1548 | u16 fwpatch; | |
1549 | u16 fwdate; | |
1550 | u16 fwtime; | |
1551 | u32 tmp; | |
1552 | int err = 0; | |
1553 | ||
1554 | /* Upload Microcode. */ | |
1555 | data = (__be32 *) (dev->fw.ucode->data + hdr_len); | |
1556 | len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32); | |
1557 | b43legacy_shm_control_word(dev, | |
1558 | B43legacy_SHM_UCODE | | |
1559 | B43legacy_SHM_AUTOINC_W, | |
1560 | 0x0000); | |
1561 | for (i = 0; i < len; i++) { | |
1562 | b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, | |
1563 | be32_to_cpu(data[i])); | |
1564 | udelay(10); | |
1565 | } | |
1566 | ||
1567 | if (dev->fw.pcm) { | |
1568 | /* Upload PCM data. */ | |
1569 | data = (__be32 *) (dev->fw.pcm->data + hdr_len); | |
1570 | len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32); | |
1571 | b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA); | |
1572 | b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000); | |
1573 | /* No need for autoinc bit in SHM_HW */ | |
1574 | b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB); | |
1575 | for (i = 0; i < len; i++) { | |
1576 | b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, | |
1577 | be32_to_cpu(data[i])); | |
1578 | udelay(10); | |
1579 | } | |
1580 | } | |
1581 | ||
1582 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, | |
1583 | B43legacy_IRQ_ALL); | |
1584 | b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0x00020402); | |
1585 | ||
1586 | /* Wait for the microcode to load and respond */ | |
1587 | i = 0; | |
1588 | while (1) { | |
1589 | tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); | |
1590 | if (tmp == B43legacy_IRQ_MAC_SUSPENDED) | |
1591 | break; | |
1592 | i++; | |
1593 | if (i >= B43legacy_IRQWAIT_MAX_RETRIES) { | |
1594 | b43legacyerr(dev->wl, "Microcode not responding\n"); | |
1595 | b43legacy_print_fw_helptext(dev->wl); | |
1596 | err = -ENODEV; | |
1597 | goto out; | |
1598 | } | |
1599 | udelay(10); | |
1600 | } | |
1601 | /* dummy read follows */ | |
1602 | b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); | |
1603 | ||
1604 | /* Get and check the revisions. */ | |
1605 | fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
1606 | B43legacy_SHM_SH_UCODEREV); | |
1607 | fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
1608 | B43legacy_SHM_SH_UCODEPATCH); | |
1609 | fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
1610 | B43legacy_SHM_SH_UCODEDATE); | |
1611 | fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
1612 | B43legacy_SHM_SH_UCODETIME); | |
1613 | ||
1614 | if (fwrev > 0x128) { | |
1615 | b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE." | |
1616 | " Only firmware from binary drivers version 3.x" | |
1617 | " is supported. You must change your firmware" | |
1618 | " files.\n"); | |
1619 | b43legacy_print_fw_helptext(dev->wl); | |
1620 | b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0); | |
1621 | err = -EOPNOTSUPP; | |
1622 | goto out; | |
1623 | } | |
1624 | b43legacydbg(dev->wl, "Loading firmware version 0x%X, patch level %u " | |
1625 | "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch, | |
1626 | (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF, | |
1627 | (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F, fwtime & 0x1F); | |
1628 | ||
1629 | dev->fw.rev = fwrev; | |
1630 | dev->fw.patch = fwpatch; | |
1631 | ||
1632 | out: | |
1633 | return err; | |
1634 | } | |
1635 | ||
1636 | static int b43legacy_write_initvals(struct b43legacy_wldev *dev, | |
1637 | const struct b43legacy_iv *ivals, | |
1638 | size_t count, | |
1639 | size_t array_size) | |
1640 | { | |
1641 | const struct b43legacy_iv *iv; | |
1642 | u16 offset; | |
1643 | size_t i; | |
1644 | bool bit32; | |
1645 | ||
1646 | BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6); | |
1647 | iv = ivals; | |
1648 | for (i = 0; i < count; i++) { | |
1649 | if (array_size < sizeof(iv->offset_size)) | |
1650 | goto err_format; | |
1651 | array_size -= sizeof(iv->offset_size); | |
1652 | offset = be16_to_cpu(iv->offset_size); | |
1653 | bit32 = !!(offset & B43legacy_IV_32BIT); | |
1654 | offset &= B43legacy_IV_OFFSET_MASK; | |
1655 | if (offset >= 0x1000) | |
1656 | goto err_format; | |
1657 | if (bit32) { | |
1658 | u32 value; | |
1659 | ||
1660 | if (array_size < sizeof(iv->data.d32)) | |
1661 | goto err_format; | |
1662 | array_size -= sizeof(iv->data.d32); | |
1663 | ||
1664 | value = be32_to_cpu(get_unaligned(&iv->data.d32)); | |
1665 | b43legacy_write32(dev, offset, value); | |
1666 | ||
1667 | iv = (const struct b43legacy_iv *)((const uint8_t *)iv + | |
1668 | sizeof(__be16) + | |
1669 | sizeof(__be32)); | |
1670 | } else { | |
1671 | u16 value; | |
1672 | ||
1673 | if (array_size < sizeof(iv->data.d16)) | |
1674 | goto err_format; | |
1675 | array_size -= sizeof(iv->data.d16); | |
1676 | ||
1677 | value = be16_to_cpu(iv->data.d16); | |
1678 | b43legacy_write16(dev, offset, value); | |
1679 | ||
1680 | iv = (const struct b43legacy_iv *)((const uint8_t *)iv + | |
1681 | sizeof(__be16) + | |
1682 | sizeof(__be16)); | |
1683 | } | |
1684 | } | |
1685 | if (array_size) | |
1686 | goto err_format; | |
1687 | ||
1688 | return 0; | |
1689 | ||
1690 | err_format: | |
1691 | b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n"); | |
1692 | b43legacy_print_fw_helptext(dev->wl); | |
1693 | ||
1694 | return -EPROTO; | |
1695 | } | |
1696 | ||
1697 | static int b43legacy_upload_initvals(struct b43legacy_wldev *dev) | |
1698 | { | |
1699 | const size_t hdr_len = sizeof(struct b43legacy_fw_header); | |
1700 | const struct b43legacy_fw_header *hdr; | |
1701 | struct b43legacy_firmware *fw = &dev->fw; | |
1702 | const struct b43legacy_iv *ivals; | |
1703 | size_t count; | |
1704 | int err; | |
1705 | ||
1706 | hdr = (const struct b43legacy_fw_header *)(fw->initvals->data); | |
1707 | ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len); | |
1708 | count = be32_to_cpu(hdr->size); | |
1709 | err = b43legacy_write_initvals(dev, ivals, count, | |
1710 | fw->initvals->size - hdr_len); | |
1711 | if (err) | |
1712 | goto out; | |
1713 | if (fw->initvals_band) { | |
1714 | hdr = (const struct b43legacy_fw_header *) | |
1715 | (fw->initvals_band->data); | |
1716 | ivals = (const struct b43legacy_iv *)(fw->initvals_band->data | |
1717 | + hdr_len); | |
1718 | count = be32_to_cpu(hdr->size); | |
1719 | err = b43legacy_write_initvals(dev, ivals, count, | |
1720 | fw->initvals_band->size - hdr_len); | |
1721 | if (err) | |
1722 | goto out; | |
1723 | } | |
1724 | out: | |
1725 | ||
1726 | return err; | |
1727 | } | |
1728 | ||
1729 | /* Initialize the GPIOs | |
1730 | * http://bcm-specs.sipsolutions.net/GPIO | |
1731 | */ | |
1732 | static int b43legacy_gpio_init(struct b43legacy_wldev *dev) | |
1733 | { | |
1734 | struct ssb_bus *bus = dev->dev->bus; | |
1735 | struct ssb_device *gpiodev, *pcidev = NULL; | |
1736 | u32 mask; | |
1737 | u32 set; | |
1738 | ||
1739 | b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, | |
1740 | b43legacy_read32(dev, | |
1741 | B43legacy_MMIO_STATUS_BITFIELD) | |
1742 | & 0xFFFF3FFF); | |
1743 | ||
75388acd LF |
1744 | b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK, |
1745 | b43legacy_read16(dev, | |
1746 | B43legacy_MMIO_GPIO_MASK) | |
1747 | | 0x000F); | |
1748 | ||
1749 | mask = 0x0000001F; | |
1750 | set = 0x0000000F; | |
1751 | if (dev->dev->bus->chip_id == 0x4301) { | |
1752 | mask |= 0x0060; | |
1753 | set |= 0x0060; | |
1754 | } | |
7797aa38 | 1755 | if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) { |
75388acd LF |
1756 | b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK, |
1757 | b43legacy_read16(dev, | |
1758 | B43legacy_MMIO_GPIO_MASK) | |
1759 | | 0x0200); | |
1760 | mask |= 0x0200; | |
1761 | set |= 0x0200; | |
1762 | } | |
1763 | if (dev->dev->id.revision >= 2) | |
1764 | mask |= 0x0010; /* FIXME: This is redundant. */ | |
1765 | ||
1766 | #ifdef CONFIG_SSB_DRIVER_PCICORE | |
1767 | pcidev = bus->pcicore.dev; | |
1768 | #endif | |
1769 | gpiodev = bus->chipco.dev ? : pcidev; | |
1770 | if (!gpiodev) | |
1771 | return 0; | |
1772 | ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, | |
1773 | (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL) | |
1774 | & mask) | set); | |
1775 | ||
1776 | return 0; | |
1777 | } | |
1778 | ||
1779 | /* Turn off all GPIO stuff. Call this on module unload, for example. */ | |
1780 | static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev) | |
1781 | { | |
1782 | struct ssb_bus *bus = dev->dev->bus; | |
1783 | struct ssb_device *gpiodev, *pcidev = NULL; | |
1784 | ||
1785 | #ifdef CONFIG_SSB_DRIVER_PCICORE | |
1786 | pcidev = bus->pcicore.dev; | |
1787 | #endif | |
1788 | gpiodev = bus->chipco.dev ? : pcidev; | |
1789 | if (!gpiodev) | |
1790 | return; | |
1791 | ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0); | |
1792 | } | |
1793 | ||
1794 | /* http://bcm-specs.sipsolutions.net/EnableMac */ | |
1795 | void b43legacy_mac_enable(struct b43legacy_wldev *dev) | |
1796 | { | |
1797 | dev->mac_suspended--; | |
1798 | B43legacy_WARN_ON(dev->mac_suspended < 0); | |
f34eb692 | 1799 | B43legacy_WARN_ON(irqs_disabled()); |
75388acd LF |
1800 | if (dev->mac_suspended == 0) { |
1801 | b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, | |
1802 | b43legacy_read32(dev, | |
1803 | B43legacy_MMIO_STATUS_BITFIELD) | |
1804 | | B43legacy_SBF_MAC_ENABLED); | |
1805 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, | |
1806 | B43legacy_IRQ_MAC_SUSPENDED); | |
1807 | /* the next two are dummy reads */ | |
1808 | b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); | |
1809 | b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); | |
1810 | b43legacy_power_saving_ctl_bits(dev, -1, -1); | |
f34eb692 LF |
1811 | |
1812 | /* Re-enable IRQs. */ | |
1813 | spin_lock_irq(&dev->wl->irq_lock); | |
1814 | b43legacy_interrupt_enable(dev, dev->irq_savedstate); | |
1815 | spin_unlock_irq(&dev->wl->irq_lock); | |
75388acd LF |
1816 | } |
1817 | } | |
1818 | ||
1819 | /* http://bcm-specs.sipsolutions.net/SuspendMAC */ | |
1820 | void b43legacy_mac_suspend(struct b43legacy_wldev *dev) | |
1821 | { | |
1822 | int i; | |
1823 | u32 tmp; | |
1824 | ||
f34eb692 LF |
1825 | might_sleep(); |
1826 | B43legacy_WARN_ON(irqs_disabled()); | |
75388acd | 1827 | B43legacy_WARN_ON(dev->mac_suspended < 0); |
f34eb692 | 1828 | |
75388acd | 1829 | if (dev->mac_suspended == 0) { |
f34eb692 LF |
1830 | /* Mask IRQs before suspending MAC. Otherwise |
1831 | * the MAC stays busy and won't suspend. */ | |
1832 | spin_lock_irq(&dev->wl->irq_lock); | |
1833 | tmp = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL); | |
1834 | spin_unlock_irq(&dev->wl->irq_lock); | |
1835 | b43legacy_synchronize_irq(dev); | |
1836 | dev->irq_savedstate = tmp; | |
1837 | ||
75388acd LF |
1838 | b43legacy_power_saving_ctl_bits(dev, -1, 1); |
1839 | b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, | |
1840 | b43legacy_read32(dev, | |
1841 | B43legacy_MMIO_STATUS_BITFIELD) | |
1842 | & ~B43legacy_SBF_MAC_ENABLED); | |
1843 | b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); | |
f34eb692 | 1844 | for (i = 40; i; i--) { |
75388acd LF |
1845 | tmp = b43legacy_read32(dev, |
1846 | B43legacy_MMIO_GEN_IRQ_REASON); | |
1847 | if (tmp & B43legacy_IRQ_MAC_SUSPENDED) | |
1848 | goto out; | |
f34eb692 | 1849 | msleep(1); |
75388acd LF |
1850 | } |
1851 | b43legacyerr(dev->wl, "MAC suspend failed\n"); | |
1852 | } | |
1853 | out: | |
1854 | dev->mac_suspended++; | |
1855 | } | |
1856 | ||
1857 | static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev) | |
1858 | { | |
1859 | struct b43legacy_wl *wl = dev->wl; | |
1860 | u32 ctl; | |
1861 | u16 cfp_pretbtt; | |
1862 | ||
1863 | ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); | |
1864 | /* Reset status to STA infrastructure mode. */ | |
1865 | ctl &= ~B43legacy_MACCTL_AP; | |
1866 | ctl &= ~B43legacy_MACCTL_KEEP_CTL; | |
1867 | ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP; | |
1868 | ctl &= ~B43legacy_MACCTL_KEEP_BAD; | |
1869 | ctl &= ~B43legacy_MACCTL_PROMISC; | |
4150c572 | 1870 | ctl &= ~B43legacy_MACCTL_BEACPROMISC; |
75388acd LF |
1871 | ctl |= B43legacy_MACCTL_INFRA; |
1872 | ||
4150c572 JB |
1873 | if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) |
1874 | ctl |= B43legacy_MACCTL_AP; | |
1875 | else if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_IBSS)) | |
1876 | ctl &= ~B43legacy_MACCTL_INFRA; | |
1877 | ||
1878 | if (wl->filter_flags & FIF_CONTROL) | |
75388acd | 1879 | ctl |= B43legacy_MACCTL_KEEP_CTL; |
4150c572 JB |
1880 | if (wl->filter_flags & FIF_FCSFAIL) |
1881 | ctl |= B43legacy_MACCTL_KEEP_BAD; | |
1882 | if (wl->filter_flags & FIF_PLCPFAIL) | |
1883 | ctl |= B43legacy_MACCTL_KEEP_BADPLCP; | |
1884 | if (wl->filter_flags & FIF_PROMISC_IN_BSS) | |
75388acd | 1885 | ctl |= B43legacy_MACCTL_PROMISC; |
4150c572 JB |
1886 | if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC) |
1887 | ctl |= B43legacy_MACCTL_BEACPROMISC; | |
1888 | ||
75388acd LF |
1889 | /* Workaround: On old hardware the HW-MAC-address-filter |
1890 | * doesn't work properly, so always run promisc in filter | |
1891 | * it in software. */ | |
1892 | if (dev->dev->id.revision <= 4) | |
1893 | ctl |= B43legacy_MACCTL_PROMISC; | |
1894 | ||
1895 | b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl); | |
1896 | ||
1897 | cfp_pretbtt = 2; | |
1898 | if ((ctl & B43legacy_MACCTL_INFRA) && | |
1899 | !(ctl & B43legacy_MACCTL_AP)) { | |
1900 | if (dev->dev->bus->chip_id == 0x4306 && | |
1901 | dev->dev->bus->chip_rev == 3) | |
1902 | cfp_pretbtt = 100; | |
1903 | else | |
1904 | cfp_pretbtt = 50; | |
1905 | } | |
1906 | b43legacy_write16(dev, 0x612, cfp_pretbtt); | |
1907 | } | |
1908 | ||
1909 | static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev, | |
1910 | u16 rate, | |
1911 | int is_ofdm) | |
1912 | { | |
1913 | u16 offset; | |
1914 | ||
1915 | if (is_ofdm) { | |
1916 | offset = 0x480; | |
1917 | offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2; | |
1918 | } else { | |
1919 | offset = 0x4C0; | |
1920 | offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2; | |
1921 | } | |
1922 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20, | |
1923 | b43legacy_shm_read16(dev, | |
1924 | B43legacy_SHM_SHARED, offset)); | |
1925 | } | |
1926 | ||
1927 | static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev) | |
1928 | { | |
1929 | switch (dev->phy.type) { | |
1930 | case B43legacy_PHYTYPE_G: | |
1931 | b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1); | |
1932 | b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1); | |
1933 | b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1); | |
1934 | b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1); | |
1935 | b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1); | |
1936 | b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1); | |
1937 | b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1); | |
1938 | /* fallthrough */ | |
1939 | case B43legacy_PHYTYPE_B: | |
1940 | b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0); | |
1941 | b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0); | |
1942 | b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0); | |
1943 | b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0); | |
1944 | break; | |
1945 | default: | |
1946 | B43legacy_BUG_ON(1); | |
1947 | } | |
1948 | } | |
1949 | ||
1950 | /* Set the TX-Antenna for management frames sent by firmware. */ | |
1951 | static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev, | |
1952 | int antenna) | |
1953 | { | |
1954 | u16 ant = 0; | |
1955 | u16 tmp; | |
1956 | ||
1957 | switch (antenna) { | |
1958 | case B43legacy_ANTENNA0: | |
1959 | ant |= B43legacy_TX4_PHY_ANT0; | |
1960 | break; | |
1961 | case B43legacy_ANTENNA1: | |
1962 | ant |= B43legacy_TX4_PHY_ANT1; | |
1963 | break; | |
1964 | case B43legacy_ANTENNA_AUTO: | |
1965 | ant |= B43legacy_TX4_PHY_ANTLAST; | |
1966 | break; | |
1967 | default: | |
1968 | B43legacy_BUG_ON(1); | |
1969 | } | |
1970 | ||
1971 | /* FIXME We also need to set the other flags of the PHY control | |
1972 | * field somewhere. */ | |
1973 | ||
1974 | /* For Beacons */ | |
1975 | tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
1976 | B43legacy_SHM_SH_BEACPHYCTL); | |
1977 | tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant; | |
1978 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
1979 | B43legacy_SHM_SH_BEACPHYCTL, tmp); | |
1980 | /* For ACK/CTS */ | |
1981 | tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
1982 | B43legacy_SHM_SH_ACKCTSPHYCTL); | |
1983 | tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant; | |
1984 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
1985 | B43legacy_SHM_SH_ACKCTSPHYCTL, tmp); | |
1986 | /* For Probe Resposes */ | |
1987 | tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
1988 | B43legacy_SHM_SH_PRPHYCTL); | |
1989 | tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant; | |
1990 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
1991 | B43legacy_SHM_SH_PRPHYCTL, tmp); | |
1992 | } | |
1993 | ||
1994 | /* This is the opposite of b43legacy_chip_init() */ | |
1995 | static void b43legacy_chip_exit(struct b43legacy_wldev *dev) | |
1996 | { | |
93bb7f3a | 1997 | b43legacy_radio_turn_off(dev, 1); |
75388acd LF |
1998 | b43legacy_gpio_cleanup(dev); |
1999 | /* firmware is released later */ | |
2000 | } | |
2001 | ||
2002 | /* Initialize the chip | |
2003 | * http://bcm-specs.sipsolutions.net/ChipInit | |
2004 | */ | |
2005 | static int b43legacy_chip_init(struct b43legacy_wldev *dev) | |
2006 | { | |
2007 | struct b43legacy_phy *phy = &dev->phy; | |
2008 | int err; | |
2009 | int tmp; | |
2010 | u32 value32; | |
2011 | u16 value16; | |
2012 | ||
2013 | b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, | |
2014 | B43legacy_SBF_CORE_READY | |
2015 | | B43legacy_SBF_400); | |
2016 | ||
2017 | err = b43legacy_request_firmware(dev); | |
2018 | if (err) | |
2019 | goto out; | |
2020 | err = b43legacy_upload_microcode(dev); | |
2021 | if (err) | |
2022 | goto out; /* firmware is released later */ | |
2023 | ||
2024 | err = b43legacy_gpio_init(dev); | |
2025 | if (err) | |
2026 | goto out; /* firmware is released later */ | |
ba48f7bb | 2027 | |
75388acd LF |
2028 | err = b43legacy_upload_initvals(dev); |
2029 | if (err) | |
4ad36d78 | 2030 | goto err_gpio_clean; |
75388acd | 2031 | b43legacy_radio_turn_on(dev); |
75388acd LF |
2032 | |
2033 | b43legacy_write16(dev, 0x03E6, 0x0000); | |
2034 | err = b43legacy_phy_init(dev); | |
2035 | if (err) | |
2036 | goto err_radio_off; | |
2037 | ||
2038 | /* Select initial Interference Mitigation. */ | |
2039 | tmp = phy->interfmode; | |
2040 | phy->interfmode = B43legacy_INTERFMODE_NONE; | |
2041 | b43legacy_radio_set_interference_mitigation(dev, tmp); | |
2042 | ||
2043 | b43legacy_phy_set_antenna_diversity(dev); | |
2044 | b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT); | |
2045 | ||
2046 | if (phy->type == B43legacy_PHYTYPE_B) { | |
2047 | value16 = b43legacy_read16(dev, 0x005E); | |
2048 | value16 |= 0x0004; | |
2049 | b43legacy_write16(dev, 0x005E, value16); | |
2050 | } | |
2051 | b43legacy_write32(dev, 0x0100, 0x01000000); | |
2052 | if (dev->dev->id.revision < 5) | |
2053 | b43legacy_write32(dev, 0x010C, 0x01000000); | |
2054 | ||
2055 | value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); | |
2056 | value32 &= ~B43legacy_SBF_MODE_NOTADHOC; | |
2057 | b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32); | |
2058 | value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); | |
2059 | value32 |= B43legacy_SBF_MODE_NOTADHOC; | |
2060 | b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32); | |
2061 | ||
75388acd LF |
2062 | if (b43legacy_using_pio(dev)) { |
2063 | b43legacy_write32(dev, 0x0210, 0x00000100); | |
2064 | b43legacy_write32(dev, 0x0230, 0x00000100); | |
2065 | b43legacy_write32(dev, 0x0250, 0x00000100); | |
2066 | b43legacy_write32(dev, 0x0270, 0x00000100); | |
2067 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034, | |
2068 | 0x0000); | |
2069 | } | |
2070 | ||
2071 | /* Probe Response Timeout value */ | |
2072 | /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */ | |
2073 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000); | |
2074 | ||
2075 | /* Initially set the wireless operation mode. */ | |
2076 | b43legacy_adjust_opmode(dev); | |
2077 | ||
2078 | if (dev->dev->id.revision < 3) { | |
2079 | b43legacy_write16(dev, 0x060E, 0x0000); | |
2080 | b43legacy_write16(dev, 0x0610, 0x8000); | |
2081 | b43legacy_write16(dev, 0x0604, 0x0000); | |
2082 | b43legacy_write16(dev, 0x0606, 0x0200); | |
2083 | } else { | |
2084 | b43legacy_write32(dev, 0x0188, 0x80000000); | |
2085 | b43legacy_write32(dev, 0x018C, 0x02000000); | |
2086 | } | |
2087 | b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000); | |
2088 | b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00); | |
2089 | b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00); | |
2090 | b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00); | |
2091 | b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00); | |
2092 | b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00); | |
2093 | b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00); | |
2094 | ||
2095 | value32 = ssb_read32(dev->dev, SSB_TMSLOW); | |
2096 | value32 |= 0x00100000; | |
2097 | ssb_write32(dev->dev, SSB_TMSLOW, value32); | |
2098 | ||
2099 | b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY, | |
2100 | dev->dev->bus->chipco.fast_pwrup_delay); | |
2101 | ||
a293ee99 SB |
2102 | /* PHY TX errors counter. */ |
2103 | atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT); | |
2104 | ||
75388acd LF |
2105 | B43legacy_WARN_ON(err != 0); |
2106 | b43legacydbg(dev->wl, "Chip initialized\n"); | |
2107 | out: | |
2108 | return err; | |
2109 | ||
2110 | err_radio_off: | |
93bb7f3a | 2111 | b43legacy_radio_turn_off(dev, 1); |
4ad36d78 | 2112 | err_gpio_clean: |
75388acd LF |
2113 | b43legacy_gpio_cleanup(dev); |
2114 | goto out; | |
2115 | } | |
2116 | ||
2117 | static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev) | |
2118 | { | |
2119 | struct b43legacy_phy *phy = &dev->phy; | |
2120 | ||
2121 | if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2) | |
2122 | return; | |
2123 | ||
2124 | b43legacy_mac_suspend(dev); | |
2125 | b43legacy_phy_lo_g_measure(dev); | |
2126 | b43legacy_mac_enable(dev); | |
2127 | } | |
2128 | ||
2129 | static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev) | |
2130 | { | |
2131 | b43legacy_phy_lo_mark_all_unused(dev); | |
7797aa38 | 2132 | if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) { |
75388acd LF |
2133 | b43legacy_mac_suspend(dev); |
2134 | b43legacy_calc_nrssi_slope(dev); | |
2135 | b43legacy_mac_enable(dev); | |
2136 | } | |
2137 | } | |
2138 | ||
2139 | static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev) | |
2140 | { | |
2141 | /* Update device statistics. */ | |
2142 | b43legacy_calculate_link_quality(dev); | |
2143 | } | |
2144 | ||
2145 | static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev) | |
2146 | { | |
2147 | b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */ | |
a293ee99 SB |
2148 | |
2149 | atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT); | |
2150 | wmb(); | |
75388acd LF |
2151 | } |
2152 | ||
75388acd LF |
2153 | static void do_periodic_work(struct b43legacy_wldev *dev) |
2154 | { | |
2155 | unsigned int state; | |
2156 | ||
2157 | state = dev->periodic_state; | |
6be50837 | 2158 | if (state % 8 == 0) |
75388acd | 2159 | b43legacy_periodic_every120sec(dev); |
6be50837 | 2160 | if (state % 4 == 0) |
75388acd | 2161 | b43legacy_periodic_every60sec(dev); |
6be50837 | 2162 | if (state % 2 == 0) |
75388acd | 2163 | b43legacy_periodic_every30sec(dev); |
6be50837 | 2164 | b43legacy_periodic_every15sec(dev); |
75388acd LF |
2165 | } |
2166 | ||
f34eb692 LF |
2167 | /* Periodic work locking policy: |
2168 | * The whole periodic work handler is protected by | |
2169 | * wl->mutex. If another lock is needed somewhere in the | |
2170 | * pwork callchain, it's aquired in-place, where it's needed. | |
75388acd | 2171 | */ |
75388acd LF |
2172 | static void b43legacy_periodic_work_handler(struct work_struct *work) |
2173 | { | |
f34eb692 LF |
2174 | struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev, |
2175 | periodic_work.work); | |
2176 | struct b43legacy_wl *wl = dev->wl; | |
75388acd | 2177 | unsigned long delay; |
75388acd | 2178 | |
f34eb692 | 2179 | mutex_lock(&wl->mutex); |
75388acd LF |
2180 | |
2181 | if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED)) | |
2182 | goto out; | |
2183 | if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP)) | |
2184 | goto out_requeue; | |
2185 | ||
f34eb692 | 2186 | do_periodic_work(dev); |
75388acd | 2187 | |
75388acd LF |
2188 | dev->periodic_state++; |
2189 | out_requeue: | |
2190 | if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST)) | |
2191 | delay = msecs_to_jiffies(50); | |
2192 | else | |
6be50837 | 2193 | delay = round_jiffies_relative(HZ * 15); |
f34eb692 | 2194 | queue_delayed_work(wl->hw->workqueue, &dev->periodic_work, delay); |
75388acd | 2195 | out: |
f34eb692 | 2196 | mutex_unlock(&wl->mutex); |
75388acd LF |
2197 | } |
2198 | ||
2199 | static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev) | |
2200 | { | |
2201 | struct delayed_work *work = &dev->periodic_work; | |
2202 | ||
2203 | dev->periodic_state = 0; | |
2204 | INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler); | |
2205 | queue_delayed_work(dev->wl->hw->workqueue, work, 0); | |
2206 | } | |
2207 | ||
2208 | /* Validate access to the chip (SHM) */ | |
2209 | static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev) | |
2210 | { | |
2211 | u32 value; | |
2212 | u32 shm_backup; | |
2213 | ||
2214 | shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0); | |
2215 | b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA); | |
2216 | if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) != | |
2217 | 0xAA5555AA) | |
2218 | goto error; | |
2219 | b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55); | |
2220 | if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) != | |
2221 | 0x55AAAA55) | |
2222 | goto error; | |
2223 | b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup); | |
2224 | ||
2225 | value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); | |
2226 | if ((value | B43legacy_MACCTL_GMODE) != | |
2227 | (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED)) | |
2228 | goto error; | |
2229 | ||
2230 | value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); | |
2231 | if (value) | |
2232 | goto error; | |
2233 | ||
2234 | return 0; | |
2235 | error: | |
2236 | b43legacyerr(dev->wl, "Failed to validate the chipaccess\n"); | |
2237 | return -ENODEV; | |
2238 | } | |
2239 | ||
2240 | static void b43legacy_security_init(struct b43legacy_wldev *dev) | |
2241 | { | |
2242 | dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20; | |
2243 | B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key)); | |
2244 | dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, | |
2245 | 0x0056); | |
2246 | /* KTP is a word address, but we address SHM bytewise. | |
2247 | * So multiply by two. | |
2248 | */ | |
2249 | dev->ktp *= 2; | |
2250 | if (dev->dev->id.revision >= 5) | |
2251 | /* Number of RCMTA address slots */ | |
2252 | b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT, | |
2253 | dev->max_nr_keys - 8); | |
2254 | } | |
2255 | ||
2256 | static int b43legacy_rng_read(struct hwrng *rng, u32 *data) | |
2257 | { | |
2258 | struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv; | |
2259 | unsigned long flags; | |
2260 | ||
2261 | /* Don't take wl->mutex here, as it could deadlock with | |
2262 | * hwrng internal locking. It's not needed to take | |
2263 | * wl->mutex here, anyway. */ | |
2264 | ||
2265 | spin_lock_irqsave(&wl->irq_lock, flags); | |
2266 | *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG); | |
2267 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
2268 | ||
2269 | return (sizeof(u16)); | |
2270 | } | |
2271 | ||
2272 | static void b43legacy_rng_exit(struct b43legacy_wl *wl) | |
2273 | { | |
2274 | if (wl->rng_initialized) | |
2275 | hwrng_unregister(&wl->rng); | |
2276 | } | |
2277 | ||
2278 | static int b43legacy_rng_init(struct b43legacy_wl *wl) | |
2279 | { | |
2280 | int err; | |
2281 | ||
2282 | snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name), | |
2283 | "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy)); | |
2284 | wl->rng.name = wl->rng_name; | |
2285 | wl->rng.data_read = b43legacy_rng_read; | |
2286 | wl->rng.priv = (unsigned long)wl; | |
2287 | wl->rng_initialized = 1; | |
2288 | err = hwrng_register(&wl->rng); | |
2289 | if (err) { | |
2290 | wl->rng_initialized = 0; | |
2291 | b43legacyerr(wl, "Failed to register the random " | |
2292 | "number generator (%d)\n", err); | |
2293 | } | |
2294 | ||
2295 | return err; | |
2296 | } | |
2297 | ||
33a3dc93 SB |
2298 | static int b43legacy_op_tx(struct ieee80211_hw *hw, |
2299 | struct sk_buff *skb, | |
2300 | struct ieee80211_tx_control *ctl) | |
75388acd LF |
2301 | { |
2302 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
2303 | struct b43legacy_wldev *dev = wl->current_dev; | |
2304 | int err = -ENODEV; | |
2305 | unsigned long flags; | |
2306 | ||
2307 | if (unlikely(!dev)) | |
2308 | goto out; | |
2309 | if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED)) | |
2310 | goto out; | |
2311 | /* DMA-TX is done without a global lock. */ | |
2312 | if (b43legacy_using_pio(dev)) { | |
2313 | spin_lock_irqsave(&wl->irq_lock, flags); | |
2314 | err = b43legacy_pio_tx(dev, skb, ctl); | |
2315 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
2316 | } else | |
2317 | err = b43legacy_dma_tx(dev, skb, ctl); | |
2318 | out: | |
2319 | if (unlikely(err)) | |
2320 | return NETDEV_TX_BUSY; | |
2321 | return NETDEV_TX_OK; | |
2322 | } | |
2323 | ||
33a3dc93 SB |
2324 | static int b43legacy_op_conf_tx(struct ieee80211_hw *hw, |
2325 | int queue, | |
2326 | const struct ieee80211_tx_queue_params *params) | |
75388acd LF |
2327 | { |
2328 | return 0; | |
2329 | } | |
2330 | ||
33a3dc93 SB |
2331 | static int b43legacy_op_get_tx_stats(struct ieee80211_hw *hw, |
2332 | struct ieee80211_tx_queue_stats *stats) | |
75388acd LF |
2333 | { |
2334 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
2335 | struct b43legacy_wldev *dev = wl->current_dev; | |
2336 | unsigned long flags; | |
2337 | int err = -ENODEV; | |
2338 | ||
2339 | if (!dev) | |
2340 | goto out; | |
2341 | spin_lock_irqsave(&wl->irq_lock, flags); | |
2342 | if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) { | |
2343 | if (b43legacy_using_pio(dev)) | |
2344 | b43legacy_pio_get_tx_stats(dev, stats); | |
2345 | else | |
2346 | b43legacy_dma_get_tx_stats(dev, stats); | |
2347 | err = 0; | |
2348 | } | |
2349 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
2350 | out: | |
2351 | return err; | |
2352 | } | |
2353 | ||
33a3dc93 SB |
2354 | static int b43legacy_op_get_stats(struct ieee80211_hw *hw, |
2355 | struct ieee80211_low_level_stats *stats) | |
75388acd LF |
2356 | { |
2357 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
2358 | unsigned long flags; | |
2359 | ||
2360 | spin_lock_irqsave(&wl->irq_lock, flags); | |
2361 | memcpy(stats, &wl->ieee_stats, sizeof(*stats)); | |
2362 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
2363 | ||
2364 | return 0; | |
2365 | } | |
2366 | ||
2367 | static const char *phymode_to_string(unsigned int phymode) | |
2368 | { | |
2369 | switch (phymode) { | |
2370 | case B43legacy_PHYMODE_B: | |
2371 | return "B"; | |
2372 | case B43legacy_PHYMODE_G: | |
2373 | return "G"; | |
2374 | default: | |
2375 | B43legacy_BUG_ON(1); | |
2376 | } | |
2377 | return ""; | |
2378 | } | |
2379 | ||
2380 | static int find_wldev_for_phymode(struct b43legacy_wl *wl, | |
2381 | unsigned int phymode, | |
2382 | struct b43legacy_wldev **dev, | |
2383 | bool *gmode) | |
2384 | { | |
2385 | struct b43legacy_wldev *d; | |
2386 | ||
2387 | list_for_each_entry(d, &wl->devlist, list) { | |
2388 | if (d->phy.possible_phymodes & phymode) { | |
2389 | /* Ok, this device supports the PHY-mode. | |
2390 | * Set the gmode bit. */ | |
2391 | *gmode = 1; | |
2392 | *dev = d; | |
2393 | ||
2394 | return 0; | |
2395 | } | |
2396 | } | |
2397 | ||
2398 | return -ESRCH; | |
2399 | } | |
2400 | ||
2401 | static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev) | |
2402 | { | |
2403 | struct ssb_device *sdev = dev->dev; | |
2404 | u32 tmslow; | |
2405 | ||
2406 | tmslow = ssb_read32(sdev, SSB_TMSLOW); | |
2407 | tmslow &= ~B43legacy_TMSLOW_GMODE; | |
2408 | tmslow |= B43legacy_TMSLOW_PHYRESET; | |
2409 | tmslow |= SSB_TMSLOW_FGC; | |
2410 | ssb_write32(sdev, SSB_TMSLOW, tmslow); | |
2411 | msleep(1); | |
2412 | ||
2413 | tmslow = ssb_read32(sdev, SSB_TMSLOW); | |
2414 | tmslow &= ~SSB_TMSLOW_FGC; | |
2415 | tmslow |= B43legacy_TMSLOW_PHYRESET; | |
2416 | ssb_write32(sdev, SSB_TMSLOW, tmslow); | |
2417 | msleep(1); | |
2418 | } | |
2419 | ||
2420 | /* Expects wl->mutex locked */ | |
2421 | static int b43legacy_switch_phymode(struct b43legacy_wl *wl, | |
2422 | unsigned int new_mode) | |
2423 | { | |
2424 | struct b43legacy_wldev *up_dev; | |
2425 | struct b43legacy_wldev *down_dev; | |
2426 | int err; | |
2427 | bool gmode = 0; | |
2428 | int prev_status; | |
2429 | ||
2430 | err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode); | |
2431 | if (err) { | |
2432 | b43legacyerr(wl, "Could not find a device for %s-PHY mode\n", | |
2433 | phymode_to_string(new_mode)); | |
2434 | return err; | |
2435 | } | |
2436 | if ((up_dev == wl->current_dev) && | |
2437 | (!!wl->current_dev->phy.gmode == !!gmode)) | |
2438 | /* This device is already running. */ | |
2439 | return 0; | |
2440 | b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n", | |
2441 | phymode_to_string(new_mode)); | |
2442 | down_dev = wl->current_dev; | |
2443 | ||
2444 | prev_status = b43legacy_status(down_dev); | |
2445 | /* Shutdown the currently running core. */ | |
2446 | if (prev_status >= B43legacy_STAT_STARTED) | |
2447 | b43legacy_wireless_core_stop(down_dev); | |
2448 | if (prev_status >= B43legacy_STAT_INITIALIZED) | |
2449 | b43legacy_wireless_core_exit(down_dev); | |
2450 | ||
2451 | if (down_dev != up_dev) | |
2452 | /* We switch to a different core, so we put PHY into | |
2453 | * RESET on the old core. */ | |
2454 | b43legacy_put_phy_into_reset(down_dev); | |
2455 | ||
2456 | /* Now start the new core. */ | |
2457 | up_dev->phy.gmode = gmode; | |
2458 | if (prev_status >= B43legacy_STAT_INITIALIZED) { | |
2459 | err = b43legacy_wireless_core_init(up_dev); | |
2460 | if (err) { | |
2461 | b43legacyerr(wl, "Fatal: Could not initialize device" | |
2462 | " for newly selected %s-PHY mode\n", | |
2463 | phymode_to_string(new_mode)); | |
2464 | goto init_failure; | |
2465 | } | |
2466 | } | |
2467 | if (prev_status >= B43legacy_STAT_STARTED) { | |
2468 | err = b43legacy_wireless_core_start(up_dev); | |
2469 | if (err) { | |
2470 | b43legacyerr(wl, "Fatal: Coult not start device for " | |
2471 | "newly selected %s-PHY mode\n", | |
2472 | phymode_to_string(new_mode)); | |
2473 | b43legacy_wireless_core_exit(up_dev); | |
2474 | goto init_failure; | |
2475 | } | |
2476 | } | |
2477 | B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status); | |
2478 | ||
2479 | b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0); | |
2480 | ||
2481 | wl->current_dev = up_dev; | |
2482 | ||
2483 | return 0; | |
2484 | init_failure: | |
2485 | /* Whoops, failed to init the new core. No core is operating now. */ | |
2486 | wl->current_dev = NULL; | |
2487 | return err; | |
2488 | } | |
2489 | ||
2490 | static int b43legacy_antenna_from_ieee80211(u8 antenna) | |
2491 | { | |
2492 | switch (antenna) { | |
2493 | case 0: /* default/diversity */ | |
2494 | return B43legacy_ANTENNA_DEFAULT; | |
2495 | case 1: /* Antenna 0 */ | |
2496 | return B43legacy_ANTENNA0; | |
2497 | case 2: /* Antenna 1 */ | |
2498 | return B43legacy_ANTENNA1; | |
2499 | default: | |
2500 | return B43legacy_ANTENNA_DEFAULT; | |
2501 | } | |
2502 | } | |
2503 | ||
33a3dc93 SB |
2504 | static int b43legacy_op_dev_config(struct ieee80211_hw *hw, |
2505 | struct ieee80211_conf *conf) | |
75388acd LF |
2506 | { |
2507 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
2508 | struct b43legacy_wldev *dev; | |
2509 | struct b43legacy_phy *phy; | |
2510 | unsigned long flags; | |
2511 | unsigned int new_phymode = 0xFFFF; | |
2512 | int antenna_tx; | |
2513 | int antenna_rx; | |
2514 | int err = 0; | |
2515 | u32 savedirqs; | |
2516 | ||
2517 | antenna_tx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_tx); | |
2518 | antenna_rx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_rx); | |
2519 | ||
2520 | mutex_lock(&wl->mutex); | |
2521 | ||
2522 | /* Switch the PHY mode (if necessary). */ | |
2523 | switch (conf->phymode) { | |
2524 | case MODE_IEEE80211B: | |
2525 | new_phymode = B43legacy_PHYMODE_B; | |
2526 | break; | |
2527 | case MODE_IEEE80211G: | |
2528 | new_phymode = B43legacy_PHYMODE_G; | |
2529 | break; | |
2530 | default: | |
2531 | B43legacy_WARN_ON(1); | |
2532 | } | |
2533 | err = b43legacy_switch_phymode(wl, new_phymode); | |
2534 | if (err) | |
2535 | goto out_unlock_mutex; | |
2536 | dev = wl->current_dev; | |
2537 | phy = &dev->phy; | |
2538 | ||
2539 | /* Disable IRQs while reconfiguring the device. | |
2540 | * This makes it possible to drop the spinlock throughout | |
2541 | * the reconfiguration process. */ | |
2542 | spin_lock_irqsave(&wl->irq_lock, flags); | |
2543 | if (b43legacy_status(dev) < B43legacy_STAT_STARTED) { | |
2544 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
2545 | goto out_unlock_mutex; | |
2546 | } | |
2547 | savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL); | |
2548 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
2549 | b43legacy_synchronize_irq(dev); | |
2550 | ||
2551 | /* Switch to the requested channel. | |
2552 | * The firmware takes care of races with the TX handler. */ | |
2553 | if (conf->channel_val != phy->channel) | |
2554 | b43legacy_radio_selectchannel(dev, conf->channel_val, 0); | |
2555 | ||
2556 | /* Enable/Disable ShortSlot timing. */ | |
2557 | if ((!!(conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME)) | |
2558 | != dev->short_slot) { | |
2559 | B43legacy_WARN_ON(phy->type != B43legacy_PHYTYPE_G); | |
2560 | if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) | |
2561 | b43legacy_short_slot_timing_enable(dev); | |
2562 | else | |
2563 | b43legacy_short_slot_timing_disable(dev); | |
2564 | } | |
2565 | ||
5be3bda8 JB |
2566 | dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_RADIOTAP); |
2567 | ||
75388acd LF |
2568 | /* Adjust the desired TX power level. */ |
2569 | if (conf->power_level != 0) { | |
2570 | if (conf->power_level != phy->power_level) { | |
2571 | phy->power_level = conf->power_level; | |
2572 | b43legacy_phy_xmitpower(dev); | |
2573 | } | |
2574 | } | |
2575 | ||
2576 | /* Antennas for RX and management frame TX. */ | |
2577 | b43legacy_mgmtframe_txantenna(dev, antenna_tx); | |
2578 | ||
2579 | /* Update templates for AP mode. */ | |
2580 | if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) | |
2581 | b43legacy_set_beacon_int(dev, conf->beacon_int); | |
2582 | ||
2583 | ||
42a9174f LF |
2584 | if (!!conf->radio_enabled != phy->radio_on) { |
2585 | if (conf->radio_enabled) { | |
2586 | b43legacy_radio_turn_on(dev); | |
2587 | b43legacyinfo(dev->wl, "Radio turned on by software\n"); | |
2588 | if (!dev->radio_hw_enable) | |
2589 | b43legacyinfo(dev->wl, "The hardware RF-kill" | |
2590 | " button still turns the radio" | |
2591 | " physically off. Press the" | |
2592 | " button to turn it on.\n"); | |
2593 | } else { | |
93bb7f3a | 2594 | b43legacy_radio_turn_off(dev, 0); |
42a9174f LF |
2595 | b43legacyinfo(dev->wl, "Radio turned off by" |
2596 | " software\n"); | |
2597 | } | |
2598 | } | |
2599 | ||
75388acd LF |
2600 | spin_lock_irqsave(&wl->irq_lock, flags); |
2601 | b43legacy_interrupt_enable(dev, savedirqs); | |
2602 | mmiowb(); | |
2603 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
2604 | out_unlock_mutex: | |
2605 | mutex_unlock(&wl->mutex); | |
2606 | ||
2607 | return err; | |
2608 | } | |
2609 | ||
33a3dc93 SB |
2610 | static void b43legacy_op_configure_filter(struct ieee80211_hw *hw, |
2611 | unsigned int changed, | |
2612 | unsigned int *fflags, | |
2613 | int mc_count, | |
2614 | struct dev_addr_list *mc_list) | |
75388acd LF |
2615 | { |
2616 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
2617 | struct b43legacy_wldev *dev = wl->current_dev; | |
2618 | unsigned long flags; | |
2619 | ||
4150c572 JB |
2620 | if (!dev) { |
2621 | *fflags = 0; | |
75388acd | 2622 | return; |
75388acd | 2623 | } |
4150c572 JB |
2624 | |
2625 | spin_lock_irqsave(&wl->irq_lock, flags); | |
2626 | *fflags &= FIF_PROMISC_IN_BSS | | |
2627 | FIF_ALLMULTI | | |
2628 | FIF_FCSFAIL | | |
2629 | FIF_PLCPFAIL | | |
2630 | FIF_CONTROL | | |
2631 | FIF_OTHER_BSS | | |
2632 | FIF_BCN_PRBRESP_PROMISC; | |
2633 | ||
2634 | changed &= FIF_PROMISC_IN_BSS | | |
2635 | FIF_ALLMULTI | | |
2636 | FIF_FCSFAIL | | |
2637 | FIF_PLCPFAIL | | |
2638 | FIF_CONTROL | | |
2639 | FIF_OTHER_BSS | | |
2640 | FIF_BCN_PRBRESP_PROMISC; | |
2641 | ||
2642 | wl->filter_flags = *fflags; | |
2643 | ||
2644 | if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) | |
2645 | b43legacy_adjust_opmode(dev); | |
75388acd LF |
2646 | spin_unlock_irqrestore(&wl->irq_lock, flags); |
2647 | } | |
2648 | ||
33a3dc93 | 2649 | static int b43legacy_op_config_interface(struct ieee80211_hw *hw, |
32bfd35d | 2650 | struct ieee80211_vif *vif, |
33a3dc93 | 2651 | struct ieee80211_if_conf *conf) |
75388acd LF |
2652 | { |
2653 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
2654 | struct b43legacy_wldev *dev = wl->current_dev; | |
2655 | unsigned long flags; | |
2656 | ||
2657 | if (!dev) | |
2658 | return -ENODEV; | |
2659 | mutex_lock(&wl->mutex); | |
2660 | spin_lock_irqsave(&wl->irq_lock, flags); | |
32bfd35d | 2661 | B43legacy_WARN_ON(wl->vif != vif); |
4150c572 JB |
2662 | if (conf->bssid) |
2663 | memcpy(wl->bssid, conf->bssid, ETH_ALEN); | |
2664 | else | |
2665 | memset(wl->bssid, 0, ETH_ALEN); | |
2666 | if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) { | |
2667 | if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) { | |
2668 | B43legacy_WARN_ON(conf->type != IEEE80211_IF_TYPE_AP); | |
2669 | b43legacy_set_ssid(dev, conf->ssid, conf->ssid_len); | |
2670 | if (conf->beacon) | |
2671 | b43legacy_refresh_templates(dev, conf->beacon); | |
75388acd | 2672 | } |
4150c572 | 2673 | b43legacy_write_mac_bssid_templates(dev); |
75388acd LF |
2674 | } |
2675 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
2676 | mutex_unlock(&wl->mutex); | |
2677 | ||
2678 | return 0; | |
2679 | } | |
2680 | ||
2681 | /* Locking: wl->mutex */ | |
2682 | static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev) | |
2683 | { | |
2684 | struct b43legacy_wl *wl = dev->wl; | |
2685 | unsigned long flags; | |
2686 | ||
2687 | if (b43legacy_status(dev) < B43legacy_STAT_STARTED) | |
2688 | return; | |
440cb58a SB |
2689 | |
2690 | /* Disable and sync interrupts. We must do this before than | |
2691 | * setting the status to INITIALIZED, as the interrupt handler | |
2692 | * won't care about IRQs then. */ | |
2693 | spin_lock_irqsave(&wl->irq_lock, flags); | |
2694 | dev->irq_savedstate = b43legacy_interrupt_disable(dev, | |
2695 | B43legacy_IRQ_ALL); | |
2696 | b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */ | |
2697 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
2698 | b43legacy_synchronize_irq(dev); | |
2699 | ||
75388acd LF |
2700 | b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED); |
2701 | ||
2702 | mutex_unlock(&wl->mutex); | |
2703 | /* Must unlock as it would otherwise deadlock. No races here. | |
2704 | * Cancel the possibly running self-rearming periodic work. */ | |
2705 | cancel_delayed_work_sync(&dev->periodic_work); | |
2706 | mutex_lock(&wl->mutex); | |
2707 | ||
2708 | ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */ | |
2709 | ||
75388acd LF |
2710 | b43legacy_mac_suspend(dev); |
2711 | free_irq(dev->dev->irq, dev); | |
2712 | b43legacydbg(wl, "Wireless interface stopped\n"); | |
2713 | } | |
2714 | ||
2715 | /* Locking: wl->mutex */ | |
2716 | static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev) | |
2717 | { | |
2718 | int err; | |
2719 | ||
2720 | B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED); | |
2721 | ||
2722 | drain_txstatus_queue(dev); | |
2723 | err = request_irq(dev->dev->irq, b43legacy_interrupt_handler, | |
2724 | IRQF_SHARED, KBUILD_MODNAME, dev); | |
2725 | if (err) { | |
2726 | b43legacyerr(dev->wl, "Cannot request IRQ-%d\n", | |
2727 | dev->dev->irq); | |
2728 | goto out; | |
2729 | } | |
2730 | /* We are ready to run. */ | |
2731 | b43legacy_set_status(dev, B43legacy_STAT_STARTED); | |
2732 | ||
2733 | /* Start data flow (TX/RX) */ | |
2734 | b43legacy_mac_enable(dev); | |
2735 | b43legacy_interrupt_enable(dev, dev->irq_savedstate); | |
2736 | ieee80211_start_queues(dev->wl->hw); | |
2737 | ||
2738 | /* Start maintenance work */ | |
2739 | b43legacy_periodic_tasks_setup(dev); | |
2740 | ||
2741 | b43legacydbg(dev->wl, "Wireless interface started\n"); | |
2742 | out: | |
2743 | return err; | |
2744 | } | |
2745 | ||
2746 | /* Get PHY and RADIO versioning numbers */ | |
2747 | static int b43legacy_phy_versioning(struct b43legacy_wldev *dev) | |
2748 | { | |
2749 | struct b43legacy_phy *phy = &dev->phy; | |
2750 | u32 tmp; | |
2751 | u8 analog_type; | |
2752 | u8 phy_type; | |
2753 | u8 phy_rev; | |
2754 | u16 radio_manuf; | |
2755 | u16 radio_ver; | |
2756 | u16 radio_rev; | |
2757 | int unsupported = 0; | |
2758 | ||
2759 | /* Get PHY versioning */ | |
2760 | tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER); | |
2761 | analog_type = (tmp & B43legacy_PHYVER_ANALOG) | |
2762 | >> B43legacy_PHYVER_ANALOG_SHIFT; | |
2763 | phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT; | |
2764 | phy_rev = (tmp & B43legacy_PHYVER_VERSION); | |
2765 | switch (phy_type) { | |
2766 | case B43legacy_PHYTYPE_B: | |
2767 | if (phy_rev != 2 && phy_rev != 4 | |
2768 | && phy_rev != 6 && phy_rev != 7) | |
2769 | unsupported = 1; | |
2770 | break; | |
2771 | case B43legacy_PHYTYPE_G: | |
2772 | if (phy_rev > 8) | |
2773 | unsupported = 1; | |
2774 | break; | |
2775 | default: | |
2776 | unsupported = 1; | |
2777 | }; | |
2778 | if (unsupported) { | |
2779 | b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY " | |
2780 | "(Analog %u, Type %u, Revision %u)\n", | |
2781 | analog_type, phy_type, phy_rev); | |
2782 | return -EOPNOTSUPP; | |
2783 | } | |
2784 | b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n", | |
2785 | analog_type, phy_type, phy_rev); | |
2786 | ||
2787 | ||
2788 | /* Get RADIO versioning */ | |
2789 | if (dev->dev->bus->chip_id == 0x4317) { | |
2790 | if (dev->dev->bus->chip_rev == 0) | |
2791 | tmp = 0x3205017F; | |
2792 | else if (dev->dev->bus->chip_rev == 1) | |
2793 | tmp = 0x4205017F; | |
2794 | else | |
2795 | tmp = 0x5205017F; | |
2796 | } else { | |
2797 | b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL, | |
2798 | B43legacy_RADIOCTL_ID); | |
2799 | tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH); | |
2800 | tmp <<= 16; | |
2801 | b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL, | |
2802 | B43legacy_RADIOCTL_ID); | |
2803 | tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW); | |
2804 | } | |
2805 | radio_manuf = (tmp & 0x00000FFF); | |
2806 | radio_ver = (tmp & 0x0FFFF000) >> 12; | |
2807 | radio_rev = (tmp & 0xF0000000) >> 28; | |
2808 | switch (phy_type) { | |
2809 | case B43legacy_PHYTYPE_B: | |
2810 | if ((radio_ver & 0xFFF0) != 0x2050) | |
2811 | unsupported = 1; | |
2812 | break; | |
2813 | case B43legacy_PHYTYPE_G: | |
2814 | if (radio_ver != 0x2050) | |
2815 | unsupported = 1; | |
2816 | break; | |
2817 | default: | |
2818 | B43legacy_BUG_ON(1); | |
2819 | } | |
2820 | if (unsupported) { | |
2821 | b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO " | |
2822 | "(Manuf 0x%X, Version 0x%X, Revision %u)\n", | |
2823 | radio_manuf, radio_ver, radio_rev); | |
2824 | return -EOPNOTSUPP; | |
2825 | } | |
2826 | b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X," | |
2827 | " Revision %u\n", radio_manuf, radio_ver, radio_rev); | |
2828 | ||
2829 | ||
2830 | phy->radio_manuf = radio_manuf; | |
2831 | phy->radio_ver = radio_ver; | |
2832 | phy->radio_rev = radio_rev; | |
2833 | ||
2834 | phy->analog = analog_type; | |
2835 | phy->type = phy_type; | |
2836 | phy->rev = phy_rev; | |
2837 | ||
2838 | return 0; | |
2839 | } | |
2840 | ||
2841 | static void setup_struct_phy_for_init(struct b43legacy_wldev *dev, | |
2842 | struct b43legacy_phy *phy) | |
2843 | { | |
2844 | struct b43legacy_lopair *lo; | |
2845 | int i; | |
2846 | ||
2847 | memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig)); | |
2848 | memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos)); | |
2849 | ||
1065de15 LF |
2850 | /* Assume the radio is enabled. If it's not enabled, the state will |
2851 | * immediately get fixed on the first periodic work run. */ | |
2852 | dev->radio_hw_enable = 1; | |
75388acd LF |
2853 | |
2854 | phy->savedpctlreg = 0xFFFF; | |
2855 | phy->aci_enable = 0; | |
2856 | phy->aci_wlan_automatic = 0; | |
2857 | phy->aci_hw_rssi = 0; | |
2858 | ||
2859 | lo = phy->_lo_pairs; | |
2860 | if (lo) | |
2861 | memset(lo, 0, sizeof(struct b43legacy_lopair) * | |
2862 | B43legacy_LO_COUNT); | |
2863 | phy->max_lb_gain = 0; | |
2864 | phy->trsw_rx_gain = 0; | |
2865 | ||
2866 | /* Set default attenuation values. */ | |
2867 | phy->bbatt = b43legacy_default_baseband_attenuation(dev); | |
2868 | phy->rfatt = b43legacy_default_radio_attenuation(dev); | |
2869 | phy->txctl1 = b43legacy_default_txctl1(dev); | |
2870 | phy->txpwr_offset = 0; | |
2871 | ||
2872 | /* NRSSI */ | |
2873 | phy->nrssislope = 0; | |
2874 | for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++) | |
2875 | phy->nrssi[i] = -1000; | |
2876 | for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++) | |
2877 | phy->nrssi_lt[i] = i; | |
2878 | ||
2879 | phy->lofcal = 0xFFFF; | |
2880 | phy->initval = 0xFFFF; | |
2881 | ||
75388acd LF |
2882 | phy->interfmode = B43legacy_INTERFMODE_NONE; |
2883 | phy->channel = 0xFF; | |
2884 | } | |
2885 | ||
2886 | static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev) | |
2887 | { | |
2888 | /* Flags */ | |
2889 | dev->reg124_set_0x4 = 0; | |
2890 | ||
2891 | /* Stats */ | |
2892 | memset(&dev->stats, 0, sizeof(dev->stats)); | |
2893 | ||
2894 | setup_struct_phy_for_init(dev, &dev->phy); | |
2895 | ||
2896 | /* IRQ related flags */ | |
2897 | dev->irq_reason = 0; | |
2898 | memset(dev->dma_reason, 0, sizeof(dev->dma_reason)); | |
2899 | dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE; | |
2900 | ||
2901 | dev->mac_suspended = 1; | |
2902 | ||
2903 | /* Noise calculation context */ | |
2904 | memset(&dev->noisecalc, 0, sizeof(dev->noisecalc)); | |
2905 | } | |
2906 | ||
2907 | static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev) | |
2908 | { | |
2909 | #ifdef CONFIG_SSB_DRIVER_PCICORE | |
2910 | struct ssb_bus *bus = dev->dev->bus; | |
2911 | u32 tmp; | |
2912 | ||
2913 | if (bus->pcicore.dev && | |
2914 | bus->pcicore.dev->id.coreid == SSB_DEV_PCI && | |
2915 | bus->pcicore.dev->id.revision <= 5) { | |
2916 | /* IMCFGLO timeouts workaround. */ | |
2917 | tmp = ssb_read32(dev->dev, SSB_IMCFGLO); | |
2918 | tmp &= ~SSB_IMCFGLO_REQTO; | |
2919 | tmp &= ~SSB_IMCFGLO_SERTO; | |
2920 | switch (bus->bustype) { | |
2921 | case SSB_BUSTYPE_PCI: | |
2922 | case SSB_BUSTYPE_PCMCIA: | |
2923 | tmp |= 0x32; | |
2924 | break; | |
2925 | case SSB_BUSTYPE_SSB: | |
2926 | tmp |= 0x53; | |
2927 | break; | |
2928 | } | |
2929 | ssb_write32(dev->dev, SSB_IMCFGLO, tmp); | |
2930 | } | |
2931 | #endif /* CONFIG_SSB_DRIVER_PCICORE */ | |
2932 | } | |
2933 | ||
0a6e1bee SB |
2934 | /* Write the short and long frame retry limit values. */ |
2935 | static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev, | |
2936 | unsigned int short_retry, | |
2937 | unsigned int long_retry) | |
2938 | { | |
2939 | /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing | |
2940 | * the chip-internal counter. */ | |
2941 | short_retry = min(short_retry, (unsigned int)0xF); | |
2942 | long_retry = min(long_retry, (unsigned int)0xF); | |
2943 | ||
2944 | b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry); | |
2945 | b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry); | |
2946 | } | |
2947 | ||
75388acd LF |
2948 | /* Shutdown a wireless core */ |
2949 | /* Locking: wl->mutex */ | |
2950 | static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev) | |
2951 | { | |
2952 | struct b43legacy_wl *wl = dev->wl; | |
2953 | struct b43legacy_phy *phy = &dev->phy; | |
2954 | ||
2955 | B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED); | |
2956 | if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED) | |
2957 | return; | |
2958 | b43legacy_set_status(dev, B43legacy_STAT_UNINIT); | |
2959 | ||
2960 | mutex_unlock(&wl->mutex); | |
2961 | /* Must unlock as it would otherwise deadlock. No races here. | |
2962 | * Cancel possibly pending workqueues. */ | |
2963 | cancel_work_sync(&dev->restart_work); | |
2964 | mutex_lock(&wl->mutex); | |
2965 | ||
4ad36d78 | 2966 | b43legacy_leds_exit(dev); |
75388acd LF |
2967 | b43legacy_rng_exit(dev->wl); |
2968 | b43legacy_pio_free(dev); | |
2969 | b43legacy_dma_free(dev); | |
2970 | b43legacy_chip_exit(dev); | |
93bb7f3a | 2971 | b43legacy_radio_turn_off(dev, 1); |
75388acd LF |
2972 | b43legacy_switch_analog(dev, 0); |
2973 | if (phy->dyn_tssi_tbl) | |
2974 | kfree(phy->tssi2dbm); | |
2975 | kfree(phy->lo_control); | |
2976 | phy->lo_control = NULL; | |
2977 | ssb_device_disable(dev->dev, 0); | |
2978 | ssb_bus_may_powerdown(dev->dev->bus); | |
2979 | } | |
2980 | ||
2981 | static void prepare_phy_data_for_init(struct b43legacy_wldev *dev) | |
2982 | { | |
2983 | struct b43legacy_phy *phy = &dev->phy; | |
2984 | int i; | |
2985 | ||
2986 | /* Set default attenuation values. */ | |
2987 | phy->bbatt = b43legacy_default_baseband_attenuation(dev); | |
2988 | phy->rfatt = b43legacy_default_radio_attenuation(dev); | |
2989 | phy->txctl1 = b43legacy_default_txctl1(dev); | |
2990 | phy->txctl2 = 0xFFFF; | |
2991 | phy->txpwr_offset = 0; | |
2992 | ||
2993 | /* NRSSI */ | |
2994 | phy->nrssislope = 0; | |
2995 | for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++) | |
2996 | phy->nrssi[i] = -1000; | |
2997 | for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++) | |
2998 | phy->nrssi_lt[i] = i; | |
2999 | ||
3000 | phy->lofcal = 0xFFFF; | |
3001 | phy->initval = 0xFFFF; | |
3002 | ||
3003 | phy->aci_enable = 0; | |
3004 | phy->aci_wlan_automatic = 0; | |
3005 | phy->aci_hw_rssi = 0; | |
3006 | ||
3007 | phy->antenna_diversity = 0xFFFF; | |
3008 | memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig)); | |
3009 | memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos)); | |
3010 | ||
3011 | /* Flags */ | |
3012 | phy->calibrated = 0; | |
75388acd LF |
3013 | |
3014 | if (phy->_lo_pairs) | |
3015 | memset(phy->_lo_pairs, 0, | |
3016 | sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT); | |
3017 | memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain)); | |
3018 | } | |
3019 | ||
3020 | /* Initialize a wireless core */ | |
3021 | static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev) | |
3022 | { | |
3023 | struct b43legacy_wl *wl = dev->wl; | |
3024 | struct ssb_bus *bus = dev->dev->bus; | |
3025 | struct b43legacy_phy *phy = &dev->phy; | |
3026 | struct ssb_sprom *sprom = &dev->dev->bus->sprom; | |
3027 | int err; | |
3028 | u32 hf; | |
3029 | u32 tmp; | |
3030 | ||
3031 | B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT); | |
3032 | ||
3033 | err = ssb_bus_powerup(bus, 0); | |
3034 | if (err) | |
3035 | goto out; | |
3036 | if (!ssb_device_is_enabled(dev->dev)) { | |
3037 | tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0; | |
3038 | b43legacy_wireless_core_reset(dev, tmp); | |
3039 | } | |
3040 | ||
3041 | if ((phy->type == B43legacy_PHYTYPE_B) || | |
3042 | (phy->type == B43legacy_PHYTYPE_G)) { | |
3043 | phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair) | |
3044 | * B43legacy_LO_COUNT, | |
3045 | GFP_KERNEL); | |
3046 | if (!phy->_lo_pairs) | |
3047 | return -ENOMEM; | |
3048 | } | |
3049 | setup_struct_wldev_for_init(dev); | |
3050 | ||
3051 | err = b43legacy_phy_init_tssi2dbm_table(dev); | |
3052 | if (err) | |
3053 | goto err_kfree_lo_control; | |
3054 | ||
3055 | /* Enable IRQ routing to this device. */ | |
3056 | ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev); | |
3057 | ||
3058 | b43legacy_imcfglo_timeouts_workaround(dev); | |
3059 | prepare_phy_data_for_init(dev); | |
3060 | b43legacy_phy_calibrate(dev); | |
3061 | err = b43legacy_chip_init(dev); | |
3062 | if (err) | |
3063 | goto err_kfree_tssitbl; | |
3064 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
3065 | B43legacy_SHM_SH_WLCOREREV, | |
3066 | dev->dev->id.revision); | |
3067 | hf = b43legacy_hf_read(dev); | |
3068 | if (phy->type == B43legacy_PHYTYPE_G) { | |
3069 | hf |= B43legacy_HF_SYMW; | |
3070 | if (phy->rev == 1) | |
3071 | hf |= B43legacy_HF_GDCW; | |
7797aa38 | 3072 | if (sprom->boardflags_lo & B43legacy_BFL_PACTRL) |
75388acd LF |
3073 | hf |= B43legacy_HF_OFDMPABOOST; |
3074 | } else if (phy->type == B43legacy_PHYTYPE_B) { | |
3075 | hf |= B43legacy_HF_SYMW; | |
3076 | if (phy->rev >= 2 && phy->radio_ver == 0x2050) | |
3077 | hf &= ~B43legacy_HF_GDCW; | |
3078 | } | |
3079 | b43legacy_hf_write(dev, hf); | |
3080 | ||
0a6e1bee SB |
3081 | b43legacy_set_retry_limits(dev, |
3082 | B43legacy_DEFAULT_SHORT_RETRY_LIMIT, | |
3083 | B43legacy_DEFAULT_LONG_RETRY_LIMIT); | |
75388acd LF |
3084 | |
3085 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
3086 | 0x0044, 3); | |
3087 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
3088 | 0x0046, 2); | |
3089 | ||
3090 | /* Disable sending probe responses from firmware. | |
3091 | * Setting the MaxTime to one usec will always trigger | |
3092 | * a timeout, so we never send any probe resp. | |
3093 | * A timeout of zero is infinite. */ | |
3094 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, | |
3095 | B43legacy_SHM_SH_PRMAXTIME, 1); | |
3096 | ||
3097 | b43legacy_rate_memory_init(dev); | |
3098 | ||
3099 | /* Minimum Contention Window */ | |
3100 | if (phy->type == B43legacy_PHYTYPE_B) | |
3101 | b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, | |
3102 | 0x0003, 31); | |
3103 | else | |
3104 | b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, | |
3105 | 0x0003, 15); | |
3106 | /* Maximum Contention Window */ | |
3107 | b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, | |
3108 | 0x0004, 1023); | |
3109 | ||
3110 | do { | |
3111 | if (b43legacy_using_pio(dev)) | |
3112 | err = b43legacy_pio_init(dev); | |
3113 | else { | |
3114 | err = b43legacy_dma_init(dev); | |
3115 | if (!err) | |
3116 | b43legacy_qos_init(dev); | |
3117 | } | |
3118 | } while (err == -EAGAIN); | |
3119 | if (err) | |
3120 | goto err_chip_exit; | |
3121 | ||
3122 | b43legacy_write16(dev, 0x0612, 0x0050); | |
3123 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0416, 0x0050); | |
3124 | b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0414, 0x01F4); | |
3125 | ||
3126 | ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */ | |
4150c572 JB |
3127 | memset(wl->bssid, 0, ETH_ALEN); |
3128 | memset(wl->mac_addr, 0, ETH_ALEN); | |
3129 | b43legacy_upload_card_macaddress(dev); | |
75388acd LF |
3130 | b43legacy_security_init(dev); |
3131 | b43legacy_rng_init(wl); | |
3132 | ||
3133 | b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED); | |
3134 | ||
4ad36d78 | 3135 | b43legacy_leds_init(dev); |
75388acd LF |
3136 | out: |
3137 | return err; | |
3138 | ||
3139 | err_chip_exit: | |
3140 | b43legacy_chip_exit(dev); | |
3141 | err_kfree_tssitbl: | |
3142 | if (phy->dyn_tssi_tbl) | |
3143 | kfree(phy->tssi2dbm); | |
3144 | err_kfree_lo_control: | |
3145 | kfree(phy->lo_control); | |
3146 | phy->lo_control = NULL; | |
3147 | ssb_bus_may_powerdown(bus); | |
3148 | B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT); | |
3149 | return err; | |
3150 | } | |
3151 | ||
33a3dc93 SB |
3152 | static int b43legacy_op_add_interface(struct ieee80211_hw *hw, |
3153 | struct ieee80211_if_init_conf *conf) | |
75388acd LF |
3154 | { |
3155 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
3156 | struct b43legacy_wldev *dev; | |
3157 | unsigned long flags; | |
3158 | int err = -EOPNOTSUPP; | |
4150c572 JB |
3159 | |
3160 | /* TODO: allow WDS/AP devices to coexist */ | |
3161 | ||
3162 | if (conf->type != IEEE80211_IF_TYPE_AP && | |
3163 | conf->type != IEEE80211_IF_TYPE_STA && | |
3164 | conf->type != IEEE80211_IF_TYPE_WDS && | |
3165 | conf->type != IEEE80211_IF_TYPE_IBSS) | |
3166 | return -EOPNOTSUPP; | |
75388acd LF |
3167 | |
3168 | mutex_lock(&wl->mutex); | |
4150c572 | 3169 | if (wl->operating) |
75388acd LF |
3170 | goto out_mutex_unlock; |
3171 | ||
3172 | b43legacydbg(wl, "Adding Interface type %d\n", conf->type); | |
3173 | ||
3174 | dev = wl->current_dev; | |
4150c572 | 3175 | wl->operating = 1; |
32bfd35d | 3176 | wl->vif = conf->vif; |
4150c572 JB |
3177 | wl->if_type = conf->type; |
3178 | memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN); | |
3179 | ||
3180 | spin_lock_irqsave(&wl->irq_lock, flags); | |
3181 | b43legacy_adjust_opmode(dev); | |
3182 | b43legacy_upload_card_macaddress(dev); | |
3183 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
3184 | ||
3185 | err = 0; | |
3186 | out_mutex_unlock: | |
3187 | mutex_unlock(&wl->mutex); | |
3188 | ||
3189 | return err; | |
3190 | } | |
3191 | ||
33a3dc93 SB |
3192 | static void b43legacy_op_remove_interface(struct ieee80211_hw *hw, |
3193 | struct ieee80211_if_init_conf *conf) | |
4150c572 JB |
3194 | { |
3195 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
3196 | struct b43legacy_wldev *dev = wl->current_dev; | |
3197 | unsigned long flags; | |
3198 | ||
3199 | b43legacydbg(wl, "Removing Interface type %d\n", conf->type); | |
3200 | ||
3201 | mutex_lock(&wl->mutex); | |
3202 | ||
3203 | B43legacy_WARN_ON(!wl->operating); | |
32bfd35d JB |
3204 | B43legacy_WARN_ON(wl->vif != conf->vif); |
3205 | wl->vif = NULL; | |
4150c572 JB |
3206 | |
3207 | wl->operating = 0; | |
3208 | ||
3209 | spin_lock_irqsave(&wl->irq_lock, flags); | |
3210 | b43legacy_adjust_opmode(dev); | |
3211 | memset(wl->mac_addr, 0, ETH_ALEN); | |
3212 | b43legacy_upload_card_macaddress(dev); | |
3213 | spin_unlock_irqrestore(&wl->irq_lock, flags); | |
3214 | ||
3215 | mutex_unlock(&wl->mutex); | |
3216 | } | |
3217 | ||
33a3dc93 | 3218 | static int b43legacy_op_start(struct ieee80211_hw *hw) |
4150c572 JB |
3219 | { |
3220 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
3221 | struct b43legacy_wldev *dev = wl->current_dev; | |
3222 | int did_init = 0; | |
208eec88 | 3223 | int err = 0; |
4150c572 | 3224 | |
4ad36d78 LF |
3225 | /* First register RFkill. |
3226 | * LEDs that are registered later depend on it. */ | |
3227 | b43legacy_rfkill_init(dev); | |
3228 | ||
4150c572 JB |
3229 | mutex_lock(&wl->mutex); |
3230 | ||
75388acd LF |
3231 | if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) { |
3232 | err = b43legacy_wireless_core_init(dev); | |
3233 | if (err) | |
3234 | goto out_mutex_unlock; | |
3235 | did_init = 1; | |
3236 | } | |
4150c572 | 3237 | |
75388acd LF |
3238 | if (b43legacy_status(dev) < B43legacy_STAT_STARTED) { |
3239 | err = b43legacy_wireless_core_start(dev); | |
3240 | if (err) { | |
3241 | if (did_init) | |
3242 | b43legacy_wireless_core_exit(dev); | |
3243 | goto out_mutex_unlock; | |
3244 | } | |
3245 | } | |
3246 | ||
75388acd LF |
3247 | out_mutex_unlock: |
3248 | mutex_unlock(&wl->mutex); | |
3249 | ||
3250 | return err; | |
3251 | } | |
3252 | ||
33a3dc93 | 3253 | static void b43legacy_op_stop(struct ieee80211_hw *hw) |
75388acd LF |
3254 | { |
3255 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
4150c572 | 3256 | struct b43legacy_wldev *dev = wl->current_dev; |
75388acd | 3257 | |
4ad36d78 LF |
3258 | b43legacy_rfkill_exit(dev); |
3259 | ||
75388acd | 3260 | mutex_lock(&wl->mutex); |
4150c572 JB |
3261 | if (b43legacy_status(dev) >= B43legacy_STAT_STARTED) |
3262 | b43legacy_wireless_core_stop(dev); | |
3263 | b43legacy_wireless_core_exit(dev); | |
75388acd LF |
3264 | mutex_unlock(&wl->mutex); |
3265 | } | |
3266 | ||
0a6e1bee SB |
3267 | static int b43legacy_op_set_retry_limit(struct ieee80211_hw *hw, |
3268 | u32 short_retry_limit, | |
3269 | u32 long_retry_limit) | |
3270 | { | |
3271 | struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); | |
3272 | struct b43legacy_wldev *dev; | |
3273 | int err = 0; | |
3274 | ||
3275 | mutex_lock(&wl->mutex); | |
3276 | dev = wl->current_dev; | |
3277 | if (unlikely(!dev || | |
3278 | (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED))) { | |
3279 | err = -ENODEV; | |
3280 | goto out_unlock; | |
3281 | } | |
3282 | b43legacy_set_retry_limits(dev, short_retry_limit, long_retry_limit); | |
3283 | out_unlock: | |
3284 | mutex_unlock(&wl->mutex); | |
3285 | ||
3286 | return err; | |
3287 | } | |
75388acd LF |
3288 | |
3289 | static const struct ieee80211_ops b43legacy_hw_ops = { | |
33a3dc93 SB |
3290 | .tx = b43legacy_op_tx, |
3291 | .conf_tx = b43legacy_op_conf_tx, | |
3292 | .add_interface = b43legacy_op_add_interface, | |
3293 | .remove_interface = b43legacy_op_remove_interface, | |
3294 | .config = b43legacy_op_dev_config, | |
3295 | .config_interface = b43legacy_op_config_interface, | |
3296 | .configure_filter = b43legacy_op_configure_filter, | |
3297 | .get_stats = b43legacy_op_get_stats, | |
3298 | .get_tx_stats = b43legacy_op_get_tx_stats, | |
3299 | .start = b43legacy_op_start, | |
3300 | .stop = b43legacy_op_stop, | |
0a6e1bee | 3301 | .set_retry_limit = b43legacy_op_set_retry_limit, |
75388acd LF |
3302 | }; |
3303 | ||
3304 | /* Hard-reset the chip. Do not call this directly. | |
3305 | * Use b43legacy_controller_restart() | |
3306 | */ | |
3307 | static void b43legacy_chip_reset(struct work_struct *work) | |
3308 | { | |
3309 | struct b43legacy_wldev *dev = | |
3310 | container_of(work, struct b43legacy_wldev, restart_work); | |
3311 | struct b43legacy_wl *wl = dev->wl; | |
3312 | int err = 0; | |
3313 | int prev_status; | |
3314 | ||
3315 | mutex_lock(&wl->mutex); | |
3316 | ||
3317 | prev_status = b43legacy_status(dev); | |
3318 | /* Bring the device down... */ | |
3319 | if (prev_status >= B43legacy_STAT_STARTED) | |
3320 | b43legacy_wireless_core_stop(dev); | |
3321 | if (prev_status >= B43legacy_STAT_INITIALIZED) | |
3322 | b43legacy_wireless_core_exit(dev); | |
3323 | ||
3324 | /* ...and up again. */ | |
3325 | if (prev_status >= B43legacy_STAT_INITIALIZED) { | |
3326 | err = b43legacy_wireless_core_init(dev); | |
3327 | if (err) | |
3328 | goto out; | |
3329 | } | |
3330 | if (prev_status >= B43legacy_STAT_STARTED) { | |
3331 | err = b43legacy_wireless_core_start(dev); | |
3332 | if (err) { | |
3333 | b43legacy_wireless_core_exit(dev); | |
3334 | goto out; | |
3335 | } | |
3336 | } | |
3337 | out: | |
3338 | mutex_unlock(&wl->mutex); | |
3339 | if (err) | |
3340 | b43legacyerr(wl, "Controller restart FAILED\n"); | |
3341 | else | |
3342 | b43legacyinfo(wl, "Controller restarted\n"); | |
3343 | } | |
3344 | ||
3345 | static int b43legacy_setup_modes(struct b43legacy_wldev *dev, | |
3346 | int have_bphy, | |
3347 | int have_gphy) | |
3348 | { | |
3349 | struct ieee80211_hw *hw = dev->wl->hw; | |
3350 | struct ieee80211_hw_mode *mode; | |
3351 | struct b43legacy_phy *phy = &dev->phy; | |
3352 | int cnt = 0; | |
3353 | int err; | |
3354 | ||
3355 | phy->possible_phymodes = 0; | |
3356 | for (; 1; cnt++) { | |
3357 | if (have_bphy) { | |
3358 | B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES); | |
3359 | mode = &phy->hwmodes[cnt]; | |
3360 | ||
3361 | mode->mode = MODE_IEEE80211B; | |
3362 | mode->num_channels = b43legacy_bg_chantable_size; | |
3363 | mode->channels = b43legacy_bg_chantable; | |
3364 | mode->num_rates = b43legacy_b_ratetable_size; | |
3365 | mode->rates = b43legacy_b_ratetable; | |
3366 | err = ieee80211_register_hwmode(hw, mode); | |
3367 | if (err) | |
3368 | return err; | |
3369 | ||
3370 | phy->possible_phymodes |= B43legacy_PHYMODE_B; | |
3371 | have_bphy = 0; | |
3372 | continue; | |
3373 | } | |
3374 | if (have_gphy) { | |
3375 | B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES); | |
3376 | mode = &phy->hwmodes[cnt]; | |
3377 | ||
3378 | mode->mode = MODE_IEEE80211G; | |
3379 | mode->num_channels = b43legacy_bg_chantable_size; | |
3380 | mode->channels = b43legacy_bg_chantable; | |
3381 | mode->num_rates = b43legacy_g_ratetable_size; | |
3382 | mode->rates = b43legacy_g_ratetable; | |
3383 | err = ieee80211_register_hwmode(hw, mode); | |
3384 | if (err) | |
3385 | return err; | |
3386 | ||
3387 | phy->possible_phymodes |= B43legacy_PHYMODE_G; | |
3388 | have_gphy = 0; | |
3389 | continue; | |
3390 | } | |
3391 | break; | |
3392 | } | |
3393 | ||
3394 | return 0; | |
3395 | } | |
3396 | ||
3397 | static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev) | |
3398 | { | |
3399 | /* We release firmware that late to not be required to re-request | |
3400 | * is all the time when we reinit the core. */ | |
3401 | b43legacy_release_firmware(dev); | |
3402 | } | |
3403 | ||
3404 | static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev) | |
3405 | { | |
3406 | struct b43legacy_wl *wl = dev->wl; | |
3407 | struct ssb_bus *bus = dev->dev->bus; | |
3408 | struct pci_dev *pdev = bus->host_pci; | |
3409 | int err; | |
3410 | int have_bphy = 0; | |
3411 | int have_gphy = 0; | |
3412 | u32 tmp; | |
3413 | ||
3414 | /* Do NOT do any device initialization here. | |
3415 | * Do it in wireless_core_init() instead. | |
3416 | * This function is for gathering basic information about the HW, only. | |
3417 | * Also some structs may be set up here. But most likely you want to | |
3418 | * have that in core_init(), too. | |
3419 | */ | |
3420 | ||
3421 | err = ssb_bus_powerup(bus, 0); | |
3422 | if (err) { | |
3423 | b43legacyerr(wl, "Bus powerup failed\n"); | |
3424 | goto out; | |
3425 | } | |
3426 | /* Get the PHY type. */ | |
3427 | if (dev->dev->id.revision >= 5) { | |
3428 | u32 tmshigh; | |
3429 | ||
3430 | tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH); | |
3431 | have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY); | |
3432 | if (!have_gphy) | |
3433 | have_bphy = 1; | |
3434 | } else if (dev->dev->id.revision == 4) | |
3435 | have_gphy = 1; | |
3436 | else | |
3437 | have_bphy = 1; | |
3438 | ||
75388acd LF |
3439 | dev->phy.gmode = (have_gphy || have_bphy); |
3440 | tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0; | |
3441 | b43legacy_wireless_core_reset(dev, tmp); | |
3442 | ||
3443 | err = b43legacy_phy_versioning(dev); | |
3444 | if (err) | |
ba48f7bb | 3445 | goto err_powerdown; |
75388acd LF |
3446 | /* Check if this device supports multiband. */ |
3447 | if (!pdev || | |
3448 | (pdev->device != 0x4312 && | |
3449 | pdev->device != 0x4319 && | |
3450 | pdev->device != 0x4324)) { | |
3451 | /* No multiband support. */ | |
3452 | have_bphy = 0; | |
3453 | have_gphy = 0; | |
3454 | switch (dev->phy.type) { | |
3455 | case B43legacy_PHYTYPE_B: | |
3456 | have_bphy = 1; | |
3457 | break; | |
3458 | case B43legacy_PHYTYPE_G: | |
3459 | have_gphy = 1; | |
3460 | break; | |
3461 | default: | |
3462 | B43legacy_BUG_ON(1); | |
3463 | } | |
3464 | } | |
3465 | dev->phy.gmode = (have_gphy || have_bphy); | |
3466 | tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0; | |
3467 | b43legacy_wireless_core_reset(dev, tmp); | |
3468 | ||
3469 | err = b43legacy_validate_chipaccess(dev); | |
3470 | if (err) | |
ba48f7bb | 3471 | goto err_powerdown; |
75388acd LF |
3472 | err = b43legacy_setup_modes(dev, have_bphy, have_gphy); |
3473 | if (err) | |
ba48f7bb | 3474 | goto err_powerdown; |
75388acd LF |
3475 | |
3476 | /* Now set some default "current_dev" */ | |
3477 | if (!wl->current_dev) | |
3478 | wl->current_dev = dev; | |
3479 | INIT_WORK(&dev->restart_work, b43legacy_chip_reset); | |
3480 | ||
93bb7f3a | 3481 | b43legacy_radio_turn_off(dev, 1); |
75388acd LF |
3482 | b43legacy_switch_analog(dev, 0); |
3483 | ssb_device_disable(dev->dev, 0); | |
3484 | ssb_bus_may_powerdown(bus); | |
3485 | ||
3486 | out: | |
3487 | return err; | |
3488 | ||
75388acd LF |
3489 | err_powerdown: |
3490 | ssb_bus_may_powerdown(bus); | |
3491 | return err; | |
3492 | } | |
3493 | ||
3494 | static void b43legacy_one_core_detach(struct ssb_device *dev) | |
3495 | { | |
3496 | struct b43legacy_wldev *wldev; | |
3497 | struct b43legacy_wl *wl; | |
3498 | ||
3499 | wldev = ssb_get_drvdata(dev); | |
3500 | wl = wldev->wl; | |
3501 | cancel_work_sync(&wldev->restart_work); | |
3502 | b43legacy_debugfs_remove_device(wldev); | |
3503 | b43legacy_wireless_core_detach(wldev); | |
3504 | list_del(&wldev->list); | |
3505 | wl->nr_devs--; | |
3506 | ssb_set_drvdata(dev, NULL); | |
3507 | kfree(wldev); | |
3508 | } | |
3509 | ||
3510 | static int b43legacy_one_core_attach(struct ssb_device *dev, | |
3511 | struct b43legacy_wl *wl) | |
3512 | { | |
3513 | struct b43legacy_wldev *wldev; | |
3514 | struct pci_dev *pdev; | |
3515 | int err = -ENOMEM; | |
3516 | ||
3517 | if (!list_empty(&wl->devlist)) { | |
3518 | /* We are not the first core on this chip. */ | |
3519 | pdev = dev->bus->host_pci; | |
3520 | /* Only special chips support more than one wireless | |
3521 | * core, although some of the other chips have more than | |
3522 | * one wireless core as well. Check for this and | |
3523 | * bail out early. | |
3524 | */ | |
3525 | if (!pdev || | |
3526 | ((pdev->device != 0x4321) && | |
3527 | (pdev->device != 0x4313) && | |
3528 | (pdev->device != 0x431A))) { | |
3529 | b43legacydbg(wl, "Ignoring unconnected 802.11 core\n"); | |
3530 | return -ENODEV; | |
3531 | } | |
3532 | } | |
3533 | ||
3534 | wldev = kzalloc(sizeof(*wldev), GFP_KERNEL); | |
3535 | if (!wldev) | |
3536 | goto out; | |
3537 | ||
3538 | wldev->dev = dev; | |
3539 | wldev->wl = wl; | |
3540 | b43legacy_set_status(wldev, B43legacy_STAT_UNINIT); | |
3541 | wldev->bad_frames_preempt = modparam_bad_frames_preempt; | |
3542 | tasklet_init(&wldev->isr_tasklet, | |
3543 | (void (*)(unsigned long))b43legacy_interrupt_tasklet, | |
3544 | (unsigned long)wldev); | |
3545 | if (modparam_pio) | |
3546 | wldev->__using_pio = 1; | |
3547 | INIT_LIST_HEAD(&wldev->list); | |
3548 | ||
3549 | err = b43legacy_wireless_core_attach(wldev); | |
3550 | if (err) | |
3551 | goto err_kfree_wldev; | |
3552 | ||
3553 | list_add(&wldev->list, &wl->devlist); | |
3554 | wl->nr_devs++; | |
3555 | ssb_set_drvdata(dev, wldev); | |
3556 | b43legacy_debugfs_add_device(wldev); | |
3557 | out: | |
3558 | return err; | |
3559 | ||
3560 | err_kfree_wldev: | |
3561 | kfree(wldev); | |
3562 | return err; | |
3563 | } | |
3564 | ||
3565 | static void b43legacy_sprom_fixup(struct ssb_bus *bus) | |
3566 | { | |
3567 | /* boardflags workarounds */ | |
3568 | if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE && | |
3569 | bus->boardinfo.type == 0x4E && | |
3570 | bus->boardinfo.rev > 0x40) | |
7797aa38 | 3571 | bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL; |
75388acd LF |
3572 | } |
3573 | ||
3574 | static void b43legacy_wireless_exit(struct ssb_device *dev, | |
3575 | struct b43legacy_wl *wl) | |
3576 | { | |
3577 | struct ieee80211_hw *hw = wl->hw; | |
3578 | ||
3579 | ssb_set_devtypedata(dev, NULL); | |
3580 | ieee80211_free_hw(hw); | |
3581 | } | |
3582 | ||
3583 | static int b43legacy_wireless_init(struct ssb_device *dev) | |
3584 | { | |
3585 | struct ssb_sprom *sprom = &dev->bus->sprom; | |
3586 | struct ieee80211_hw *hw; | |
3587 | struct b43legacy_wl *wl; | |
3588 | int err = -ENOMEM; | |
3589 | ||
3590 | b43legacy_sprom_fixup(dev->bus); | |
3591 | ||
3592 | hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops); | |
3593 | if (!hw) { | |
3594 | b43legacyerr(NULL, "Could not allocate ieee80211 device\n"); | |
3595 | goto out; | |
3596 | } | |
3597 | ||
3598 | /* fill hw info */ | |
3599 | hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE | | |
3600 | IEEE80211_HW_RX_INCLUDES_FCS; | |
3601 | hw->max_signal = 100; | |
3602 | hw->max_rssi = -110; | |
3603 | hw->max_noise = -110; | |
3604 | hw->queues = 1; /* FIXME: hardware has more queues */ | |
3605 | SET_IEEE80211_DEV(hw, dev->dev); | |
7797aa38 LF |
3606 | if (is_valid_ether_addr(sprom->et1mac)) |
3607 | SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac); | |
75388acd | 3608 | else |
7797aa38 | 3609 | SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac); |
75388acd LF |
3610 | |
3611 | /* Get and initialize struct b43legacy_wl */ | |
3612 | wl = hw_to_b43legacy_wl(hw); | |
3613 | memset(wl, 0, sizeof(*wl)); | |
3614 | wl->hw = hw; | |
3615 | spin_lock_init(&wl->irq_lock); | |
3616 | spin_lock_init(&wl->leds_lock); | |
3617 | mutex_init(&wl->mutex); | |
3618 | INIT_LIST_HEAD(&wl->devlist); | |
3619 | ||
3620 | ssb_set_devtypedata(dev, wl); | |
3621 | b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id); | |
3622 | err = 0; | |
3623 | out: | |
3624 | return err; | |
3625 | } | |
3626 | ||
3627 | static int b43legacy_probe(struct ssb_device *dev, | |
3628 | const struct ssb_device_id *id) | |
3629 | { | |
3630 | struct b43legacy_wl *wl; | |
3631 | int err; | |
3632 | int first = 0; | |
3633 | ||
3634 | wl = ssb_get_devtypedata(dev); | |
3635 | if (!wl) { | |
3636 | /* Probing the first core - setup common struct b43legacy_wl */ | |
3637 | first = 1; | |
3638 | err = b43legacy_wireless_init(dev); | |
3639 | if (err) | |
3640 | goto out; | |
3641 | wl = ssb_get_devtypedata(dev); | |
3642 | B43legacy_WARN_ON(!wl); | |
3643 | } | |
3644 | err = b43legacy_one_core_attach(dev, wl); | |
3645 | if (err) | |
3646 | goto err_wireless_exit; | |
3647 | ||
3648 | if (first) { | |
3649 | err = ieee80211_register_hw(wl->hw); | |
3650 | if (err) | |
3651 | goto err_one_core_detach; | |
3652 | } | |
3653 | ||
3654 | out: | |
3655 | return err; | |
3656 | ||
3657 | err_one_core_detach: | |
3658 | b43legacy_one_core_detach(dev); | |
3659 | err_wireless_exit: | |
3660 | if (first) | |
3661 | b43legacy_wireless_exit(dev, wl); | |
3662 | return err; | |
3663 | } | |
3664 | ||
3665 | static void b43legacy_remove(struct ssb_device *dev) | |
3666 | { | |
3667 | struct b43legacy_wl *wl = ssb_get_devtypedata(dev); | |
3668 | struct b43legacy_wldev *wldev = ssb_get_drvdata(dev); | |
3669 | ||
3670 | B43legacy_WARN_ON(!wl); | |
3671 | if (wl->current_dev == wldev) | |
3672 | ieee80211_unregister_hw(wl->hw); | |
3673 | ||
3674 | b43legacy_one_core_detach(dev); | |
3675 | ||
3676 | if (list_empty(&wl->devlist)) | |
3677 | /* Last core on the chip unregistered. | |
3678 | * We can destroy common struct b43legacy_wl. | |
3679 | */ | |
3680 | b43legacy_wireless_exit(dev, wl); | |
3681 | } | |
3682 | ||
3683 | /* Perform a hardware reset. This can be called from any context. */ | |
3684 | void b43legacy_controller_restart(struct b43legacy_wldev *dev, | |
3685 | const char *reason) | |
3686 | { | |
3687 | /* Must avoid requeueing, if we are in shutdown. */ | |
3688 | if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) | |
3689 | return; | |
3690 | b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason); | |
3691 | queue_work(dev->wl->hw->workqueue, &dev->restart_work); | |
3692 | } | |
3693 | ||
3694 | #ifdef CONFIG_PM | |
3695 | ||
3696 | static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state) | |
3697 | { | |
3698 | struct b43legacy_wldev *wldev = ssb_get_drvdata(dev); | |
3699 | struct b43legacy_wl *wl = wldev->wl; | |
3700 | ||
3701 | b43legacydbg(wl, "Suspending...\n"); | |
3702 | ||
3703 | mutex_lock(&wl->mutex); | |
3704 | wldev->suspend_init_status = b43legacy_status(wldev); | |
3705 | if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) | |
3706 | b43legacy_wireless_core_stop(wldev); | |
3707 | if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) | |
3708 | b43legacy_wireless_core_exit(wldev); | |
3709 | mutex_unlock(&wl->mutex); | |
3710 | ||
3711 | b43legacydbg(wl, "Device suspended.\n"); | |
3712 | ||
3713 | return 0; | |
3714 | } | |
3715 | ||
3716 | static int b43legacy_resume(struct ssb_device *dev) | |
3717 | { | |
3718 | struct b43legacy_wldev *wldev = ssb_get_drvdata(dev); | |
3719 | struct b43legacy_wl *wl = wldev->wl; | |
3720 | int err = 0; | |
3721 | ||
3722 | b43legacydbg(wl, "Resuming...\n"); | |
3723 | ||
3724 | mutex_lock(&wl->mutex); | |
3725 | if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) { | |
3726 | err = b43legacy_wireless_core_init(wldev); | |
3727 | if (err) { | |
3728 | b43legacyerr(wl, "Resume failed at core init\n"); | |
3729 | goto out; | |
3730 | } | |
3731 | } | |
3732 | if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) { | |
3733 | err = b43legacy_wireless_core_start(wldev); | |
3734 | if (err) { | |
3735 | b43legacy_wireless_core_exit(wldev); | |
3736 | b43legacyerr(wl, "Resume failed at core start\n"); | |
3737 | goto out; | |
3738 | } | |
3739 | } | |
3740 | mutex_unlock(&wl->mutex); | |
3741 | ||
3742 | b43legacydbg(wl, "Device resumed.\n"); | |
3743 | out: | |
3744 | return err; | |
3745 | } | |
3746 | ||
3747 | #else /* CONFIG_PM */ | |
3748 | # define b43legacy_suspend NULL | |
3749 | # define b43legacy_resume NULL | |
3750 | #endif /* CONFIG_PM */ | |
3751 | ||
3752 | static struct ssb_driver b43legacy_ssb_driver = { | |
3753 | .name = KBUILD_MODNAME, | |
3754 | .id_table = b43legacy_ssb_tbl, | |
3755 | .probe = b43legacy_probe, | |
3756 | .remove = b43legacy_remove, | |
3757 | .suspend = b43legacy_suspend, | |
3758 | .resume = b43legacy_resume, | |
3759 | }; | |
3760 | ||
3761 | static int __init b43legacy_init(void) | |
3762 | { | |
3763 | int err; | |
3764 | ||
3765 | b43legacy_debugfs_init(); | |
3766 | ||
3767 | err = ssb_driver_register(&b43legacy_ssb_driver); | |
3768 | if (err) | |
3769 | goto err_dfs_exit; | |
3770 | ||
3771 | return err; | |
3772 | ||
3773 | err_dfs_exit: | |
3774 | b43legacy_debugfs_exit(); | |
3775 | return err; | |
3776 | } | |
3777 | ||
3778 | static void __exit b43legacy_exit(void) | |
3779 | { | |
3780 | ssb_driver_unregister(&b43legacy_ssb_driver); | |
3781 | b43legacy_debugfs_exit(); | |
3782 | } | |
3783 | ||
3784 | module_init(b43legacy_init) | |
3785 | module_exit(b43legacy_exit) |