Commit | Line | Data |
---|---|---|
fb9987d0 | 1 | /* |
5b68138e | 2 | * Copyright (c) 2010-2011 Atheros Communications Inc. |
fb9987d0 S |
3 | * |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
17 | #include "htc.h" | |
18 | ||
fb9987d0 S |
19 | /*************/ |
20 | /* Utilities */ | |
21 | /*************/ | |
22 | ||
fb9987d0 S |
23 | /* HACK Alert: Use 11NG for 2.4, use 11NA for 5 */ |
24 | static enum htc_phymode ath9k_htc_get_curmode(struct ath9k_htc_priv *priv, | |
25 | struct ath9k_channel *ichan) | |
26 | { | |
8896934c FF |
27 | if (IS_CHAN_5GHZ(ichan)) |
28 | return HTC_MODE_11NA; | |
fb9987d0 | 29 | |
8896934c | 30 | return HTC_MODE_11NG; |
fb9987d0 S |
31 | } |
32 | ||
f933ebed SM |
33 | bool ath9k_htc_setpower(struct ath9k_htc_priv *priv, |
34 | enum ath9k_power_mode mode) | |
bde748a4 VN |
35 | { |
36 | bool ret; | |
37 | ||
38 | mutex_lock(&priv->htc_pm_lock); | |
39 | ret = ath9k_hw_setpower(priv->ah, mode); | |
40 | mutex_unlock(&priv->htc_pm_lock); | |
41 | ||
42 | return ret; | |
43 | } | |
44 | ||
45 | void ath9k_htc_ps_wakeup(struct ath9k_htc_priv *priv) | |
46 | { | |
47 | mutex_lock(&priv->htc_pm_lock); | |
48 | if (++priv->ps_usecount != 1) | |
49 | goto unlock; | |
50 | ath9k_hw_setpower(priv->ah, ATH9K_PM_AWAKE); | |
51 | ||
52 | unlock: | |
53 | mutex_unlock(&priv->htc_pm_lock); | |
54 | } | |
55 | ||
56 | void ath9k_htc_ps_restore(struct ath9k_htc_priv *priv) | |
57 | { | |
6bcfe67f SM |
58 | bool reset; |
59 | ||
bde748a4 VN |
60 | mutex_lock(&priv->htc_pm_lock); |
61 | if (--priv->ps_usecount != 0) | |
62 | goto unlock; | |
63 | ||
6bcfe67f SM |
64 | if (priv->ps_idle) { |
65 | ath9k_hw_setrxabort(priv->ah, true); | |
66 | ath9k_hw_stopdmarecv(priv->ah, &reset); | |
8a8572a8 | 67 | ath9k_hw_setpower(priv->ah, ATH9K_PM_FULL_SLEEP); |
6bcfe67f | 68 | } else if (priv->ps_enabled) { |
bde748a4 | 69 | ath9k_hw_setpower(priv->ah, ATH9K_PM_NETWORK_SLEEP); |
6bcfe67f | 70 | } |
8a8572a8 | 71 | |
bde748a4 VN |
72 | unlock: |
73 | mutex_unlock(&priv->htc_pm_lock); | |
74 | } | |
75 | ||
76 | void ath9k_ps_work(struct work_struct *work) | |
77 | { | |
78 | struct ath9k_htc_priv *priv = | |
79 | container_of(work, struct ath9k_htc_priv, | |
80 | ps_work); | |
81 | ath9k_htc_setpower(priv, ATH9K_PM_AWAKE); | |
82 | ||
83 | /* The chip wakes up after receiving the first beacon | |
84 | while network sleep is enabled. For the driver to | |
85 | be in sync with the hw, set the chip to awake and | |
86 | only then set it to sleep. | |
87 | */ | |
88 | ath9k_htc_setpower(priv, ATH9K_PM_NETWORK_SLEEP); | |
89 | } | |
90 | ||
7c277349 SM |
91 | static void ath9k_htc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) |
92 | { | |
93 | struct ath9k_htc_priv *priv = data; | |
94 | struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; | |
95 | ||
594e65b6 JC |
96 | if ((vif->type == NL80211_IFTYPE_AP || |
97 | vif->type == NL80211_IFTYPE_MESH_POINT) && | |
98 | bss_conf->enable_beacon) | |
a5fae37d SM |
99 | priv->reconfig_beacon = true; |
100 | ||
7c277349 SM |
101 | if (bss_conf->assoc) { |
102 | priv->rearm_ani = true; | |
103 | priv->reconfig_beacon = true; | |
104 | } | |
105 | } | |
106 | ||
107 | static void ath9k_htc_vif_reconfig(struct ath9k_htc_priv *priv) | |
108 | { | |
109 | priv->rearm_ani = false; | |
110 | priv->reconfig_beacon = false; | |
111 | ||
8b2c9824 JB |
112 | ieee80211_iterate_active_interfaces_atomic( |
113 | priv->hw, IEEE80211_IFACE_ITER_RESUME_ALL, | |
114 | ath9k_htc_vif_iter, priv); | |
7c277349 | 115 | if (priv->rearm_ani) |
a236254c | 116 | ath9k_htc_start_ani(priv); |
7c277349 SM |
117 | |
118 | if (priv->reconfig_beacon) { | |
119 | ath9k_htc_ps_wakeup(priv); | |
120 | ath9k_htc_beacon_reconfig(priv); | |
121 | ath9k_htc_ps_restore(priv); | |
122 | } | |
123 | } | |
124 | ||
585895cd SM |
125 | static void ath9k_htc_bssid_iter(void *data, u8 *mac, struct ieee80211_vif *vif) |
126 | { | |
127 | struct ath9k_vif_iter_data *iter_data = data; | |
128 | int i; | |
129 | ||
657eb17d MV |
130 | if (iter_data->hw_macaddr != NULL) { |
131 | for (i = 0; i < ETH_ALEN; i++) | |
132 | iter_data->mask[i] &= ~(iter_data->hw_macaddr[i] ^ mac[i]); | |
133 | } else { | |
134 | iter_data->hw_macaddr = mac; | |
135 | } | |
585895cd SM |
136 | } |
137 | ||
657eb17d | 138 | static void ath9k_htc_set_mac_bssid_mask(struct ath9k_htc_priv *priv, |
585895cd SM |
139 | struct ieee80211_vif *vif) |
140 | { | |
141 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
142 | struct ath9k_vif_iter_data iter_data; | |
143 | ||
144 | /* | |
657eb17d MV |
145 | * Pick the MAC address of the first interface as the new hardware |
146 | * MAC address. The hardware will use it together with the BSSID mask | |
147 | * when matching addresses. | |
585895cd | 148 | */ |
657eb17d | 149 | iter_data.hw_macaddr = NULL; |
585895cd SM |
150 | memset(&iter_data.mask, 0xff, ETH_ALEN); |
151 | ||
152 | if (vif) | |
153 | ath9k_htc_bssid_iter(&iter_data, vif->addr, vif); | |
154 | ||
155 | /* Get list of all active MAC addresses */ | |
8b2c9824 JB |
156 | ieee80211_iterate_active_interfaces_atomic( |
157 | priv->hw, IEEE80211_IFACE_ITER_RESUME_ALL, | |
158 | ath9k_htc_bssid_iter, &iter_data); | |
585895cd SM |
159 | |
160 | memcpy(common->bssidmask, iter_data.mask, ETH_ALEN); | |
657eb17d MV |
161 | |
162 | if (iter_data.hw_macaddr) | |
163 | memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN); | |
164 | ||
585895cd SM |
165 | ath_hw_setbssidmask(common); |
166 | } | |
167 | ||
ffbe7c83 SM |
168 | static void ath9k_htc_set_opmode(struct ath9k_htc_priv *priv) |
169 | { | |
170 | if (priv->num_ibss_vif) | |
171 | priv->ah->opmode = NL80211_IFTYPE_ADHOC; | |
172 | else if (priv->num_ap_vif) | |
173 | priv->ah->opmode = NL80211_IFTYPE_AP; | |
594e65b6 JC |
174 | else if (priv->num_mbss_vif) |
175 | priv->ah->opmode = NL80211_IFTYPE_MESH_POINT; | |
ffbe7c83 SM |
176 | else |
177 | priv->ah->opmode = NL80211_IFTYPE_STATION; | |
178 | ||
179 | ath9k_hw_setopmode(priv->ah); | |
180 | } | |
181 | ||
73908674 SM |
182 | void ath9k_htc_reset(struct ath9k_htc_priv *priv) |
183 | { | |
184 | struct ath_hw *ah = priv->ah; | |
185 | struct ath_common *common = ath9k_hw_common(ah); | |
675a0b04 | 186 | struct ieee80211_channel *channel = priv->hw->conf.chandef.chan; |
4e3ae387 | 187 | struct ath9k_hw_cal_data *caldata = NULL; |
73908674 SM |
188 | enum htc_phymode mode; |
189 | __be16 htc_mode; | |
190 | u8 cmd_rsp; | |
191 | int ret; | |
192 | ||
193 | mutex_lock(&priv->mutex); | |
194 | ath9k_htc_ps_wakeup(priv); | |
195 | ||
a236254c | 196 | ath9k_htc_stop_ani(priv); |
73908674 | 197 | ieee80211_stop_queues(priv->hw); |
b587fc81 | 198 | |
859c3ca1 | 199 | del_timer_sync(&priv->tx.cleanup_timer); |
b587fc81 SM |
200 | ath9k_htc_tx_drain(priv); |
201 | ||
73908674 SM |
202 | WMI_CMD(WMI_DISABLE_INTR_CMDID); |
203 | WMI_CMD(WMI_DRAIN_TXQ_ALL_CMDID); | |
204 | WMI_CMD(WMI_STOP_RECV_CMDID); | |
205 | ||
f4c88991 SM |
206 | ath9k_wmi_event_drain(priv); |
207 | ||
4e3ae387 | 208 | caldata = &priv->caldata; |
73908674 SM |
209 | ret = ath9k_hw_reset(ah, ah->curchan, caldata, false); |
210 | if (ret) { | |
211 | ath_err(common, | |
212 | "Unable to reset device (%u Mhz) reset status %d\n", | |
213 | channel->center_freq, ret); | |
214 | } | |
215 | ||
b2a5c3df RM |
216 | ath9k_cmn_update_txpow(ah, priv->curtxpow, priv->txpowlimit, |
217 | &priv->curtxpow); | |
73908674 SM |
218 | |
219 | WMI_CMD(WMI_START_RECV_CMDID); | |
220 | ath9k_host_rx_init(priv); | |
221 | ||
222 | mode = ath9k_htc_get_curmode(priv, ah->curchan); | |
223 | htc_mode = cpu_to_be16(mode); | |
224 | WMI_CMD_BUF(WMI_SET_MODE_CMDID, &htc_mode); | |
225 | ||
226 | WMI_CMD(WMI_ENABLE_INTR_CMDID); | |
227 | htc_start(priv->htc); | |
7c277349 | 228 | ath9k_htc_vif_reconfig(priv); |
73908674 SM |
229 | ieee80211_wake_queues(priv->hw); |
230 | ||
859c3ca1 SM |
231 | mod_timer(&priv->tx.cleanup_timer, |
232 | jiffies + msecs_to_jiffies(ATH9K_HTC_TX_CLEANUP_INTERVAL)); | |
233 | ||
73908674 SM |
234 | ath9k_htc_ps_restore(priv); |
235 | mutex_unlock(&priv->mutex); | |
236 | } | |
237 | ||
fb9987d0 S |
238 | static int ath9k_htc_set_channel(struct ath9k_htc_priv *priv, |
239 | struct ieee80211_hw *hw, | |
240 | struct ath9k_channel *hchan) | |
241 | { | |
242 | struct ath_hw *ah = priv->ah; | |
243 | struct ath_common *common = ath9k_hw_common(ah); | |
244 | struct ieee80211_conf *conf = &common->hw->conf; | |
039a0721 | 245 | bool fastcc; |
675a0b04 | 246 | struct ieee80211_channel *channel = hw->conf.chandef.chan; |
8354dd3e | 247 | struct ath9k_hw_cal_data *caldata = NULL; |
fb9987d0 | 248 | enum htc_phymode mode; |
7f1f5a00 | 249 | __be16 htc_mode; |
fb9987d0 S |
250 | u8 cmd_rsp; |
251 | int ret; | |
252 | ||
d8a2c51c | 253 | if (test_bit(OP_INVALID, &priv->op_flags)) |
fb9987d0 S |
254 | return -EIO; |
255 | ||
039a0721 | 256 | fastcc = !!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL); |
fb9987d0 | 257 | |
bde748a4 | 258 | ath9k_htc_ps_wakeup(priv); |
b587fc81 | 259 | |
859c3ca1 | 260 | del_timer_sync(&priv->tx.cleanup_timer); |
b587fc81 SM |
261 | ath9k_htc_tx_drain(priv); |
262 | ||
fb9987d0 S |
263 | WMI_CMD(WMI_DISABLE_INTR_CMDID); |
264 | WMI_CMD(WMI_DRAIN_TXQ_ALL_CMDID); | |
265 | WMI_CMD(WMI_STOP_RECV_CMDID); | |
266 | ||
f4c88991 SM |
267 | ath9k_wmi_event_drain(priv); |
268 | ||
d2182b69 | 269 | ath_dbg(common, CONFIG, |
226afe68 JP |
270 | "(%u MHz) -> (%u MHz), HT: %d, HT40: %d fastcc: %d\n", |
271 | priv->ah->curchan->channel, | |
272 | channel->center_freq, conf_is_ht(conf), conf_is_ht40(conf), | |
273 | fastcc); | |
fb9987d0 | 274 | |
4e3ae387 RM |
275 | if (!fastcc) |
276 | caldata = &priv->caldata; | |
b587fc81 | 277 | |
20bd2a09 | 278 | ret = ath9k_hw_reset(ah, hchan, caldata, fastcc); |
fb9987d0 | 279 | if (ret) { |
3800276a JP |
280 | ath_err(common, |
281 | "Unable to reset channel (%u Mhz) reset status %d\n", | |
282 | channel->center_freq, ret); | |
fb9987d0 S |
283 | goto err; |
284 | } | |
285 | ||
b2a5c3df RM |
286 | ath9k_cmn_update_txpow(ah, priv->curtxpow, priv->txpowlimit, |
287 | &priv->curtxpow); | |
fb9987d0 S |
288 | |
289 | WMI_CMD(WMI_START_RECV_CMDID); | |
290 | if (ret) | |
291 | goto err; | |
292 | ||
293 | ath9k_host_rx_init(priv); | |
294 | ||
295 | mode = ath9k_htc_get_curmode(priv, hchan); | |
296 | htc_mode = cpu_to_be16(mode); | |
297 | WMI_CMD_BUF(WMI_SET_MODE_CMDID, &htc_mode); | |
298 | if (ret) | |
299 | goto err; | |
300 | ||
301 | WMI_CMD(WMI_ENABLE_INTR_CMDID); | |
302 | if (ret) | |
303 | goto err; | |
304 | ||
305 | htc_start(priv->htc); | |
a5fae37d | 306 | |
d8a2c51c | 307 | if (!test_bit(OP_SCANNING, &priv->op_flags) && |
a5fae37d SM |
308 | !(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) |
309 | ath9k_htc_vif_reconfig(priv); | |
310 | ||
859c3ca1 SM |
311 | mod_timer(&priv->tx.cleanup_timer, |
312 | jiffies + msecs_to_jiffies(ATH9K_HTC_TX_CLEANUP_INTERVAL)); | |
313 | ||
fb9987d0 | 314 | err: |
bde748a4 | 315 | ath9k_htc_ps_restore(priv); |
fb9987d0 S |
316 | return ret; |
317 | } | |
318 | ||
a97b478c SM |
319 | /* |
320 | * Monitor mode handling is a tad complicated because the firmware requires | |
321 | * an interface to be created exclusively, while mac80211 doesn't associate | |
322 | * an interface with the mode. | |
323 | * | |
324 | * So, for now, only one monitor interface can be configured. | |
325 | */ | |
cc721287 SM |
326 | static void __ath9k_htc_remove_monitor_interface(struct ath9k_htc_priv *priv) |
327 | { | |
328 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
329 | struct ath9k_htc_target_vif hvif; | |
330 | int ret = 0; | |
331 | u8 cmd_rsp; | |
332 | ||
333 | memset(&hvif, 0, sizeof(struct ath9k_htc_target_vif)); | |
334 | memcpy(&hvif.myaddr, common->macaddr, ETH_ALEN); | |
a97b478c | 335 | hvif.index = priv->mon_vif_idx; |
cc721287 | 336 | WMI_CMD_BUF(WMI_VAP_REMOVE_CMDID, &hvif); |
0ff2b5c0 SM |
337 | if (ret) { |
338 | ath_err(common, "Unable to remove monitor interface at idx: %d\n", | |
339 | priv->mon_vif_idx); | |
340 | } | |
341 | ||
cc721287 | 342 | priv->nvifs--; |
a97b478c | 343 | priv->vif_slot &= ~(1 << priv->mon_vif_idx); |
cc721287 SM |
344 | } |
345 | ||
81fc2a33 RM |
346 | static int ath9k_htc_add_monitor_interface(struct ath9k_htc_priv *priv) |
347 | { | |
348 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
349 | struct ath9k_htc_target_vif hvif; | |
cc721287 | 350 | struct ath9k_htc_target_sta tsta; |
a97b478c | 351 | int ret = 0, sta_idx; |
81fc2a33 RM |
352 | u8 cmd_rsp; |
353 | ||
a97b478c SM |
354 | if ((priv->nvifs >= ATH9K_HTC_MAX_VIF) || |
355 | (priv->nstations >= ATH9K_HTC_MAX_STA)) { | |
356 | ret = -ENOBUFS; | |
357 | goto err_vif; | |
358 | } | |
81fc2a33 | 359 | |
a97b478c SM |
360 | sta_idx = ffz(priv->sta_slot); |
361 | if ((sta_idx < 0) || (sta_idx > ATH9K_HTC_MAX_STA)) { | |
362 | ret = -ENOBUFS; | |
363 | goto err_vif; | |
364 | } | |
cc721287 SM |
365 | |
366 | /* | |
367 | * Add an interface. | |
368 | */ | |
81fc2a33 RM |
369 | memset(&hvif, 0, sizeof(struct ath9k_htc_target_vif)); |
370 | memcpy(&hvif.myaddr, common->macaddr, ETH_ALEN); | |
371 | ||
e4c62506 | 372 | hvif.opmode = HTC_M_MONITOR; |
a97b478c | 373 | hvif.index = ffz(priv->vif_slot); |
81fc2a33 RM |
374 | |
375 | WMI_CMD_BUF(WMI_VAP_CREATE_CMDID, &hvif); | |
376 | if (ret) | |
a97b478c SM |
377 | goto err_vif; |
378 | ||
379 | /* | |
380 | * Assign the monitor interface index as a special case here. | |
381 | * This is needed when the interface is brought down. | |
382 | */ | |
383 | priv->mon_vif_idx = hvif.index; | |
384 | priv->vif_slot |= (1 << hvif.index); | |
385 | ||
386 | /* | |
387 | * Set the hardware mode to monitor only if there are no | |
388 | * other interfaces. | |
389 | */ | |
390 | if (!priv->nvifs) | |
391 | priv->ah->opmode = NL80211_IFTYPE_MONITOR; | |
81fc2a33 RM |
392 | |
393 | priv->nvifs++; | |
cc721287 SM |
394 | |
395 | /* | |
396 | * Associate a station with the interface for packet injection. | |
397 | */ | |
cc721287 SM |
398 | memset(&tsta, 0, sizeof(struct ath9k_htc_target_sta)); |
399 | ||
400 | memcpy(&tsta.macaddr, common->macaddr, ETH_ALEN); | |
401 | ||
402 | tsta.is_vif_sta = 1; | |
a97b478c | 403 | tsta.sta_index = sta_idx; |
cc721287 | 404 | tsta.vif_index = hvif.index; |
b97c57ff | 405 | tsta.maxampdu = cpu_to_be16(0xffff); |
cc721287 SM |
406 | |
407 | WMI_CMD_BUF(WMI_NODE_CREATE_CMDID, &tsta); | |
408 | if (ret) { | |
409 | ath_err(common, "Unable to add station entry for monitor mode\n"); | |
a97b478c | 410 | goto err_sta; |
cc721287 SM |
411 | } |
412 | ||
a97b478c | 413 | priv->sta_slot |= (1 << sta_idx); |
cc721287 | 414 | priv->nstations++; |
a97b478c | 415 | priv->vif_sta_pos[priv->mon_vif_idx] = sta_idx; |
55de80d6 SM |
416 | priv->ah->is_monitoring = true; |
417 | ||
d2182b69 | 418 | ath_dbg(common, CONFIG, |
a97b478c SM |
419 | "Attached a monitor interface at idx: %d, sta idx: %d\n", |
420 | priv->mon_vif_idx, sta_idx); | |
421 | ||
81fc2a33 | 422 | return 0; |
cc721287 | 423 | |
a97b478c | 424 | err_sta: |
cc721287 SM |
425 | /* |
426 | * Remove the interface from the target. | |
427 | */ | |
428 | __ath9k_htc_remove_monitor_interface(priv); | |
a97b478c | 429 | err_vif: |
d2182b69 | 430 | ath_dbg(common, FATAL, "Unable to attach a monitor interface\n"); |
a97b478c | 431 | |
cc721287 | 432 | return ret; |
81fc2a33 RM |
433 | } |
434 | ||
435 | static int ath9k_htc_remove_monitor_interface(struct ath9k_htc_priv *priv) | |
436 | { | |
437 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
81fc2a33 | 438 | int ret = 0; |
cc721287 | 439 | u8 cmd_rsp, sta_idx; |
81fc2a33 | 440 | |
cc721287 | 441 | __ath9k_htc_remove_monitor_interface(priv); |
81fc2a33 | 442 | |
a97b478c | 443 | sta_idx = priv->vif_sta_pos[priv->mon_vif_idx]; |
cc721287 SM |
444 | |
445 | WMI_CMD_BUF(WMI_NODE_REMOVE_CMDID, &sta_idx); | |
446 | if (ret) { | |
447 | ath_err(common, "Unable to remove station entry for monitor mode\n"); | |
448 | return ret; | |
449 | } | |
450 | ||
a97b478c | 451 | priv->sta_slot &= ~(1 << sta_idx); |
cc721287 | 452 | priv->nstations--; |
55de80d6 | 453 | priv->ah->is_monitoring = false; |
cc721287 | 454 | |
d2182b69 | 455 | ath_dbg(common, CONFIG, |
a97b478c SM |
456 | "Removed a monitor interface at idx: %d, sta idx: %d\n", |
457 | priv->mon_vif_idx, sta_idx); | |
458 | ||
cc721287 | 459 | return 0; |
81fc2a33 RM |
460 | } |
461 | ||
fb9987d0 S |
462 | static int ath9k_htc_add_station(struct ath9k_htc_priv *priv, |
463 | struct ieee80211_vif *vif, | |
464 | struct ieee80211_sta *sta) | |
465 | { | |
466 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
467 | struct ath9k_htc_target_sta tsta; | |
468 | struct ath9k_htc_vif *avp = (struct ath9k_htc_vif *) vif->drv_priv; | |
469 | struct ath9k_htc_sta *ista; | |
a97b478c | 470 | int ret, sta_idx; |
fb9987d0 | 471 | u8 cmd_rsp; |
f0dd4980 | 472 | u16 maxampdu; |
fb9987d0 S |
473 | |
474 | if (priv->nstations >= ATH9K_HTC_MAX_STA) | |
475 | return -ENOBUFS; | |
476 | ||
a97b478c SM |
477 | sta_idx = ffz(priv->sta_slot); |
478 | if ((sta_idx < 0) || (sta_idx > ATH9K_HTC_MAX_STA)) | |
479 | return -ENOBUFS; | |
480 | ||
fb9987d0 S |
481 | memset(&tsta, 0, sizeof(struct ath9k_htc_target_sta)); |
482 | ||
483 | if (sta) { | |
484 | ista = (struct ath9k_htc_sta *) sta->drv_priv; | |
485 | memcpy(&tsta.macaddr, sta->addr, ETH_ALEN); | |
486 | memcpy(&tsta.bssid, common->curbssid, ETH_ALEN); | |
a97b478c | 487 | ista->index = sta_idx; |
fed27f6f MSS |
488 | tsta.is_vif_sta = 0; |
489 | maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR + | |
490 | sta->ht_cap.ampdu_factor); | |
491 | tsta.maxampdu = cpu_to_be16(maxampdu); | |
fb9987d0 S |
492 | } else { |
493 | memcpy(&tsta.macaddr, vif->addr, ETH_ALEN); | |
494 | tsta.is_vif_sta = 1; | |
fed27f6f | 495 | tsta.maxampdu = cpu_to_be16(0xffff); |
fb9987d0 S |
496 | } |
497 | ||
a97b478c | 498 | tsta.sta_index = sta_idx; |
fb9987d0 | 499 | tsta.vif_index = avp->index; |
f0dd4980 | 500 | |
fb9987d0 S |
501 | WMI_CMD_BUF(WMI_NODE_CREATE_CMDID, &tsta); |
502 | if (ret) { | |
503 | if (sta) | |
3800276a JP |
504 | ath_err(common, |
505 | "Unable to add station entry for: %pM\n", | |
506 | sta->addr); | |
fb9987d0 S |
507 | return ret; |
508 | } | |
509 | ||
a97b478c | 510 | if (sta) { |
d2182b69 | 511 | ath_dbg(common, CONFIG, |
226afe68 JP |
512 | "Added a station entry for: %pM (idx: %d)\n", |
513 | sta->addr, tsta.sta_index); | |
a97b478c | 514 | } else { |
d2182b69 | 515 | ath_dbg(common, CONFIG, |
a97b478c SM |
516 | "Added a station entry for VIF %d (idx: %d)\n", |
517 | avp->index, tsta.sta_index); | |
518 | } | |
fb9987d0 | 519 | |
a97b478c | 520 | priv->sta_slot |= (1 << sta_idx); |
fb9987d0 | 521 | priv->nstations++; |
a97b478c SM |
522 | if (!sta) |
523 | priv->vif_sta_pos[avp->index] = sta_idx; | |
524 | ||
fb9987d0 S |
525 | return 0; |
526 | } | |
527 | ||
528 | static int ath9k_htc_remove_station(struct ath9k_htc_priv *priv, | |
529 | struct ieee80211_vif *vif, | |
530 | struct ieee80211_sta *sta) | |
531 | { | |
532 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
a97b478c | 533 | struct ath9k_htc_vif *avp = (struct ath9k_htc_vif *) vif->drv_priv; |
fb9987d0 S |
534 | struct ath9k_htc_sta *ista; |
535 | int ret; | |
536 | u8 cmd_rsp, sta_idx; | |
537 | ||
538 | if (sta) { | |
539 | ista = (struct ath9k_htc_sta *) sta->drv_priv; | |
540 | sta_idx = ista->index; | |
541 | } else { | |
a97b478c | 542 | sta_idx = priv->vif_sta_pos[avp->index]; |
fb9987d0 S |
543 | } |
544 | ||
545 | WMI_CMD_BUF(WMI_NODE_REMOVE_CMDID, &sta_idx); | |
546 | if (ret) { | |
547 | if (sta) | |
3800276a JP |
548 | ath_err(common, |
549 | "Unable to remove station entry for: %pM\n", | |
550 | sta->addr); | |
fb9987d0 S |
551 | return ret; |
552 | } | |
553 | ||
a97b478c | 554 | if (sta) { |
d2182b69 | 555 | ath_dbg(common, CONFIG, |
226afe68 JP |
556 | "Removed a station entry for: %pM (idx: %d)\n", |
557 | sta->addr, sta_idx); | |
a97b478c | 558 | } else { |
d2182b69 | 559 | ath_dbg(common, CONFIG, |
a97b478c SM |
560 | "Removed a station entry for VIF %d (idx: %d)\n", |
561 | avp->index, sta_idx); | |
562 | } | |
fb9987d0 | 563 | |
a97b478c | 564 | priv->sta_slot &= ~(1 << sta_idx); |
fb9987d0 | 565 | priv->nstations--; |
a97b478c | 566 | |
fb9987d0 S |
567 | return 0; |
568 | } | |
569 | ||
3a0593ef SM |
570 | int ath9k_htc_update_cap_target(struct ath9k_htc_priv *priv, |
571 | u8 enable_coex) | |
fb9987d0 S |
572 | { |
573 | struct ath9k_htc_cap_target tcap; | |
574 | int ret; | |
575 | u8 cmd_rsp; | |
576 | ||
577 | memset(&tcap, 0, sizeof(struct ath9k_htc_cap_target)); | |
578 | ||
3a0593ef | 579 | tcap.ampdu_limit = cpu_to_be32(0xffff); |
bd548799 | 580 | tcap.ampdu_subframes = 0xff; |
3a0593ef | 581 | tcap.enable_coex = enable_coex; |
29d9075e | 582 | tcap.tx_chainmask = priv->ah->caps.tx_chainmask; |
fb9987d0 S |
583 | |
584 | WMI_CMD_BUF(WMI_TARGET_IC_UPDATE_CMDID, &tcap); | |
585 | ||
586 | return ret; | |
587 | } | |
588 | ||
0d425a7d S |
589 | static void ath9k_htc_setup_rate(struct ath9k_htc_priv *priv, |
590 | struct ieee80211_sta *sta, | |
591 | struct ath9k_htc_target_rate *trate) | |
fb9987d0 | 592 | { |
fb9987d0 S |
593 | struct ath9k_htc_sta *ista = (struct ath9k_htc_sta *) sta->drv_priv; |
594 | struct ieee80211_supported_band *sband; | |
fb9987d0 | 595 | u32 caps = 0; |
0d425a7d | 596 | int i, j; |
fb9987d0 | 597 | |
675a0b04 | 598 | sband = priv->hw->wiphy->bands[priv->hw->conf.chandef.chan->band]; |
fb9987d0 S |
599 | |
600 | for (i = 0, j = 0; i < sband->n_bitrates; i++) { | |
601 | if (sta->supp_rates[sband->band] & BIT(i)) { | |
0d425a7d | 602 | trate->rates.legacy_rates.rs_rates[j] |
fb9987d0 S |
603 | = (sband->bitrates[i].bitrate * 2) / 10; |
604 | j++; | |
605 | } | |
606 | } | |
0d425a7d | 607 | trate->rates.legacy_rates.rs_nrates = j; |
fb9987d0 S |
608 | |
609 | if (sta->ht_cap.ht_supported) { | |
610 | for (i = 0, j = 0; i < 77; i++) { | |
611 | if (sta->ht_cap.mcs.rx_mask[i/8] & (1<<(i%8))) | |
0d425a7d | 612 | trate->rates.ht_rates.rs_rates[j++] = i; |
fb9987d0 S |
613 | if (j == ATH_HTC_RATE_MAX) |
614 | break; | |
615 | } | |
0d425a7d | 616 | trate->rates.ht_rates.rs_nrates = j; |
fb9987d0 S |
617 | |
618 | caps = WLAN_RC_HT_FLAG; | |
a226c3d9 OR |
619 | if (sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) |
620 | caps |= ATH_RC_TX_STBC_FLAG; | |
3553727c FF |
621 | if (sta->ht_cap.mcs.rx_mask[1]) |
622 | caps |= WLAN_RC_DS_FLAG; | |
71ba186c VN |
623 | if ((sta->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40) && |
624 | (conf_is_ht40(&priv->hw->conf))) | |
fb9987d0 | 625 | caps |= WLAN_RC_40_FLAG; |
b4dec5e8 S |
626 | if (conf_is_ht40(&priv->hw->conf) && |
627 | (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40)) | |
628 | caps |= WLAN_RC_SGI_FLAG; | |
629 | else if (conf_is_ht20(&priv->hw->conf) && | |
630 | (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20)) | |
fb9987d0 | 631 | caps |= WLAN_RC_SGI_FLAG; |
fb9987d0 S |
632 | } |
633 | ||
0d425a7d S |
634 | trate->sta_index = ista->index; |
635 | trate->isnew = 1; | |
636 | trate->capflags = cpu_to_be32(caps); | |
637 | } | |
638 | ||
639 | static int ath9k_htc_send_rate_cmd(struct ath9k_htc_priv *priv, | |
640 | struct ath9k_htc_target_rate *trate) | |
641 | { | |
642 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
643 | int ret; | |
644 | u8 cmd_rsp; | |
fb9987d0 | 645 | |
0d425a7d | 646 | WMI_CMD_BUF(WMI_RC_RATE_UPDATE_CMDID, trate); |
fb9987d0 | 647 | if (ret) { |
3800276a JP |
648 | ath_err(common, |
649 | "Unable to initialize Rate information on target\n"); | |
fb9987d0 S |
650 | } |
651 | ||
0d425a7d | 652 | return ret; |
fb9987d0 S |
653 | } |
654 | ||
0d425a7d S |
655 | static void ath9k_htc_init_rate(struct ath9k_htc_priv *priv, |
656 | struct ieee80211_sta *sta) | |
fb9987d0 | 657 | { |
fb9987d0 | 658 | struct ath_common *common = ath9k_hw_common(priv->ah); |
0d425a7d | 659 | struct ath9k_htc_target_rate trate; |
fb9987d0 | 660 | int ret; |
fb9987d0 | 661 | |
0d425a7d S |
662 | memset(&trate, 0, sizeof(struct ath9k_htc_target_rate)); |
663 | ath9k_htc_setup_rate(priv, sta, &trate); | |
664 | ret = ath9k_htc_send_rate_cmd(priv, &trate); | |
665 | if (!ret) | |
d2182b69 | 666 | ath_dbg(common, CONFIG, |
226afe68 JP |
667 | "Updated target sta: %pM, rate caps: 0x%X\n", |
668 | sta->addr, be32_to_cpu(trate.capflags)); | |
fb9987d0 S |
669 | } |
670 | ||
2c76ef89 S |
671 | static void ath9k_htc_update_rate(struct ath9k_htc_priv *priv, |
672 | struct ieee80211_vif *vif, | |
673 | struct ieee80211_bss_conf *bss_conf) | |
674 | { | |
675 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
676 | struct ath9k_htc_target_rate trate; | |
677 | struct ieee80211_sta *sta; | |
678 | int ret; | |
679 | ||
680 | memset(&trate, 0, sizeof(struct ath9k_htc_target_rate)); | |
681 | ||
682 | rcu_read_lock(); | |
683 | sta = ieee80211_find_sta(vif, bss_conf->bssid); | |
684 | if (!sta) { | |
685 | rcu_read_unlock(); | |
686 | return; | |
687 | } | |
688 | ath9k_htc_setup_rate(priv, sta, &trate); | |
689 | rcu_read_unlock(); | |
690 | ||
691 | ret = ath9k_htc_send_rate_cmd(priv, &trate); | |
692 | if (!ret) | |
d2182b69 | 693 | ath_dbg(common, CONFIG, |
226afe68 JP |
694 | "Updated target sta: %pM, rate caps: 0x%X\n", |
695 | bss_conf->bssid, be32_to_cpu(trate.capflags)); | |
2c76ef89 S |
696 | } |
697 | ||
9edd9520 LR |
698 | static int ath9k_htc_tx_aggr_oper(struct ath9k_htc_priv *priv, |
699 | struct ieee80211_vif *vif, | |
700 | struct ieee80211_sta *sta, | |
701 | enum ieee80211_ampdu_mlme_action action, | |
702 | u16 tid) | |
fb9987d0 S |
703 | { |
704 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
705 | struct ath9k_htc_target_aggr aggr; | |
277a64d1 | 706 | struct ath9k_htc_sta *ista; |
fb9987d0 S |
707 | int ret = 0; |
708 | u8 cmd_rsp; | |
709 | ||
0730d114 | 710 | if (tid >= ATH9K_HTC_MAX_TID) |
fb9987d0 S |
711 | return -EINVAL; |
712 | ||
ef98c3cd | 713 | memset(&aggr, 0, sizeof(struct ath9k_htc_target_aggr)); |
ef98c3cd | 714 | ista = (struct ath9k_htc_sta *) sta->drv_priv; |
fb9987d0 | 715 | |
fb9987d0 | 716 | aggr.sta_index = ista->index; |
d7ca2139 S |
717 | aggr.tidno = tid & 0xf; |
718 | aggr.aggr_enable = (action == IEEE80211_AMPDU_TX_START) ? true : false; | |
fb9987d0 | 719 | |
fb9987d0 S |
720 | WMI_CMD_BUF(WMI_TX_AGGR_ENABLE_CMDID, &aggr); |
721 | if (ret) | |
d2182b69 | 722 | ath_dbg(common, CONFIG, |
226afe68 JP |
723 | "Unable to %s TX aggregation for (%pM, %d)\n", |
724 | (aggr.aggr_enable) ? "start" : "stop", sta->addr, tid); | |
fb9987d0 | 725 | else |
d2182b69 | 726 | ath_dbg(common, CONFIG, |
226afe68 JP |
727 | "%s TX aggregation for (%pM, %d)\n", |
728 | (aggr.aggr_enable) ? "Starting" : "Stopping", | |
729 | sta->addr, tid); | |
fb9987d0 | 730 | |
658ef04f | 731 | spin_lock_bh(&priv->tx.tx_lock); |
d7ca2139 | 732 | ista->tid_state[tid] = (aggr.aggr_enable && !ret) ? AGGR_START : AGGR_STOP; |
658ef04f | 733 | spin_unlock_bh(&priv->tx.tx_lock); |
fb9987d0 | 734 | |
d7ca2139 | 735 | return ret; |
fb9987d0 S |
736 | } |
737 | ||
fb9987d0 S |
738 | /*******/ |
739 | /* ANI */ | |
740 | /*******/ | |
741 | ||
a236254c | 742 | void ath9k_htc_start_ani(struct ath9k_htc_priv *priv) |
fb9987d0 S |
743 | { |
744 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
745 | unsigned long timestamp = jiffies_to_msecs(jiffies); | |
746 | ||
747 | common->ani.longcal_timer = timestamp; | |
748 | common->ani.shortcal_timer = timestamp; | |
749 | common->ani.checkani_timer = timestamp; | |
750 | ||
d8a2c51c | 751 | set_bit(OP_ANI_RUNNING, &priv->op_flags); |
a236254c SM |
752 | |
753 | ieee80211_queue_delayed_work(common->hw, &priv->ani_work, | |
fb9987d0 S |
754 | msecs_to_jiffies(ATH_ANI_POLLINTERVAL)); |
755 | } | |
756 | ||
a236254c SM |
757 | void ath9k_htc_stop_ani(struct ath9k_htc_priv *priv) |
758 | { | |
759 | cancel_delayed_work_sync(&priv->ani_work); | |
d8a2c51c | 760 | clear_bit(OP_ANI_RUNNING, &priv->op_flags); |
a236254c SM |
761 | } |
762 | ||
763 | void ath9k_htc_ani_work(struct work_struct *work) | |
fb9987d0 S |
764 | { |
765 | struct ath9k_htc_priv *priv = | |
a236254c | 766 | container_of(work, struct ath9k_htc_priv, ani_work.work); |
fb9987d0 S |
767 | struct ath_hw *ah = priv->ah; |
768 | struct ath_common *common = ath9k_hw_common(ah); | |
769 | bool longcal = false; | |
770 | bool shortcal = false; | |
771 | bool aniflag = false; | |
772 | unsigned int timestamp = jiffies_to_msecs(jiffies); | |
773 | u32 cal_interval, short_cal_interval; | |
774 | ||
a236254c SM |
775 | short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ? |
776 | ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL; | |
fb9987d0 | 777 | |
bde748a4 VN |
778 | /* Only calibrate if awake */ |
779 | if (ah->power_mode != ATH9K_PM_AWAKE) | |
780 | goto set_timer; | |
781 | ||
fb9987d0 S |
782 | /* Long calibration runs independently of short calibration. */ |
783 | if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) { | |
784 | longcal = true; | |
d2182b69 | 785 | ath_dbg(common, ANI, "longcal @%lu\n", jiffies); |
fb9987d0 S |
786 | common->ani.longcal_timer = timestamp; |
787 | } | |
788 | ||
789 | /* Short calibration applies only while caldone is false */ | |
790 | if (!common->ani.caldone) { | |
791 | if ((timestamp - common->ani.shortcal_timer) >= | |
792 | short_cal_interval) { | |
793 | shortcal = true; | |
d2182b69 | 794 | ath_dbg(common, ANI, "shortcal @%lu\n", jiffies); |
fb9987d0 S |
795 | common->ani.shortcal_timer = timestamp; |
796 | common->ani.resetcal_timer = timestamp; | |
797 | } | |
798 | } else { | |
799 | if ((timestamp - common->ani.resetcal_timer) >= | |
800 | ATH_RESTART_CALINTERVAL) { | |
801 | common->ani.caldone = ath9k_hw_reset_calvalid(ah); | |
802 | if (common->ani.caldone) | |
803 | common->ani.resetcal_timer = timestamp; | |
804 | } | |
805 | } | |
806 | ||
807 | /* Verify whether we must check ANI */ | |
e323300d | 808 | if ((timestamp - common->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) { |
fb9987d0 S |
809 | aniflag = true; |
810 | common->ani.checkani_timer = timestamp; | |
811 | } | |
812 | ||
813 | /* Skip all processing if there's nothing to do. */ | |
814 | if (longcal || shortcal || aniflag) { | |
bde748a4 VN |
815 | |
816 | ath9k_htc_ps_wakeup(priv); | |
817 | ||
fb9987d0 S |
818 | /* Call ANI routine if necessary */ |
819 | if (aniflag) | |
820 | ath9k_hw_ani_monitor(ah, ah->curchan); | |
821 | ||
822 | /* Perform calibration if necessary */ | |
35ecfe03 | 823 | if (longcal || shortcal) |
fb9987d0 S |
824 | common->ani.caldone = |
825 | ath9k_hw_calibrate(ah, ah->curchan, | |
82b2d334 | 826 | ah->rxchainmask, longcal); |
fb9987d0 | 827 | |
bde748a4 | 828 | ath9k_htc_ps_restore(priv); |
fb9987d0 S |
829 | } |
830 | ||
bde748a4 | 831 | set_timer: |
fb9987d0 S |
832 | /* |
833 | * Set timer interval based on previous results. | |
834 | * The interval must be the shortest necessary to satisfy ANI, | |
835 | * short calibration and long calibration. | |
836 | */ | |
837 | cal_interval = ATH_LONG_CALINTERVAL; | |
e323300d | 838 | cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL); |
fb9987d0 S |
839 | if (!common->ani.caldone) |
840 | cal_interval = min(cal_interval, (u32)short_cal_interval); | |
841 | ||
a236254c | 842 | ieee80211_queue_delayed_work(common->hw, &priv->ani_work, |
fb9987d0 S |
843 | msecs_to_jiffies(cal_interval)); |
844 | } | |
845 | ||
fb9987d0 S |
846 | /**********************/ |
847 | /* mac80211 Callbacks */ | |
848 | /**********************/ | |
849 | ||
36323f81 TH |
850 | static void ath9k_htc_tx(struct ieee80211_hw *hw, |
851 | struct ieee80211_tx_control *control, | |
852 | struct sk_buff *skb) | |
fb9987d0 S |
853 | { |
854 | struct ieee80211_hdr *hdr; | |
855 | struct ath9k_htc_priv *priv = hw->priv; | |
8e86a547 | 856 | struct ath_common *common = ath9k_hw_common(priv->ah); |
2c5d57f0 | 857 | int padpos, padsize, ret, slot; |
fb9987d0 S |
858 | |
859 | hdr = (struct ieee80211_hdr *) skb->data; | |
860 | ||
861 | /* Add the padding after the header if this is not already done */ | |
c60c9929 | 862 | padpos = ieee80211_hdrlen(hdr->frame_control); |
fb9987d0 S |
863 | padsize = padpos & 3; |
864 | if (padsize && skb->len > padpos) { | |
8e86a547 | 865 | if (skb_headroom(skb) < padsize) { |
d2182b69 | 866 | ath_dbg(common, XMIT, "No room for padding\n"); |
7bb45683 | 867 | goto fail_tx; |
8e86a547 | 868 | } |
fb9987d0 S |
869 | skb_push(skb, padsize); |
870 | memmove(skb->data, skb->data + padsize, padpos); | |
871 | } | |
872 | ||
2c5d57f0 SM |
873 | slot = ath9k_htc_tx_get_slot(priv); |
874 | if (slot < 0) { | |
d2182b69 | 875 | ath_dbg(common, XMIT, "No free TX slot\n"); |
2c5d57f0 SM |
876 | goto fail_tx; |
877 | } | |
878 | ||
36323f81 | 879 | ret = ath9k_htc_tx_start(priv, control->sta, skb, slot, false); |
7757dfed | 880 | if (ret != 0) { |
d2182b69 | 881 | ath_dbg(common, XMIT, "Tx failed\n"); |
2c5d57f0 | 882 | goto clear_slot; |
fb9987d0 S |
883 | } |
884 | ||
8e86a547 SM |
885 | ath9k_htc_check_stop_queues(priv); |
886 | ||
7bb45683 | 887 | return; |
fb9987d0 | 888 | |
2c5d57f0 SM |
889 | clear_slot: |
890 | ath9k_htc_tx_clear_slot(priv, slot); | |
fb9987d0 S |
891 | fail_tx: |
892 | dev_kfree_skb_any(skb); | |
fb9987d0 S |
893 | } |
894 | ||
881ac6a5 | 895 | static int ath9k_htc_start(struct ieee80211_hw *hw) |
fb9987d0 S |
896 | { |
897 | struct ath9k_htc_priv *priv = hw->priv; | |
898 | struct ath_hw *ah = priv->ah; | |
899 | struct ath_common *common = ath9k_hw_common(ah); | |
675a0b04 | 900 | struct ieee80211_channel *curchan = hw->conf.chandef.chan; |
fb9987d0 S |
901 | struct ath9k_channel *init_channel; |
902 | int ret = 0; | |
903 | enum htc_phymode mode; | |
7f1f5a00 | 904 | __be16 htc_mode; |
fb9987d0 S |
905 | u8 cmd_rsp; |
906 | ||
881ac6a5 S |
907 | mutex_lock(&priv->mutex); |
908 | ||
d2182b69 | 909 | ath_dbg(common, CONFIG, |
226afe68 JP |
910 | "Starting driver with initial channel: %d MHz\n", |
911 | curchan->center_freq); | |
fb9987d0 | 912 | |
21d5130b S |
913 | /* Ensure that HW is awake before flushing RX */ |
914 | ath9k_htc_setpower(priv, ATH9K_PM_AWAKE); | |
915 | WMI_CMD(WMI_FLUSH_RECV_CMDID); | |
916 | ||
fb9987d0 | 917 | /* setup initial channel */ |
2297f1c7 | 918 | init_channel = ath9k_cmn_get_channel(hw, ah, &hw->conf.chandef); |
fb9987d0 | 919 | |
20bd2a09 | 920 | ret = ath9k_hw_reset(ah, init_channel, ah->caldata, false); |
fb9987d0 | 921 | if (ret) { |
3800276a JP |
922 | ath_err(common, |
923 | "Unable to reset hardware; reset status %d (freq %u MHz)\n", | |
924 | ret, curchan->center_freq); | |
881ac6a5 | 925 | mutex_unlock(&priv->mutex); |
8a8572a8 | 926 | return ret; |
fb9987d0 S |
927 | } |
928 | ||
b2a5c3df RM |
929 | ath9k_cmn_update_txpow(ah, priv->curtxpow, priv->txpowlimit, |
930 | &priv->curtxpow); | |
fb9987d0 S |
931 | |
932 | mode = ath9k_htc_get_curmode(priv, init_channel); | |
933 | htc_mode = cpu_to_be16(mode); | |
934 | WMI_CMD_BUF(WMI_SET_MODE_CMDID, &htc_mode); | |
fb9987d0 | 935 | WMI_CMD(WMI_ATH_INIT_CMDID); |
fb9987d0 | 936 | WMI_CMD(WMI_START_RECV_CMDID); |
fb9987d0 S |
937 | |
938 | ath9k_host_rx_init(priv); | |
939 | ||
3a0593ef | 940 | ret = ath9k_htc_update_cap_target(priv, 0); |
1057b750 | 941 | if (ret) |
d2182b69 | 942 | ath_dbg(common, CONFIG, |
1057b750 SM |
943 | "Failed to update capability in target\n"); |
944 | ||
d8a2c51c | 945 | clear_bit(OP_INVALID, &priv->op_flags); |
fb9987d0 S |
946 | htc_start(priv->htc); |
947 | ||
658ef04f | 948 | spin_lock_bh(&priv->tx.tx_lock); |
8e86a547 | 949 | priv->tx.flags &= ~ATH9K_HTC_OP_TX_QUEUES_STOP; |
658ef04f | 950 | spin_unlock_bh(&priv->tx.tx_lock); |
7757dfed S |
951 | |
952 | ieee80211_wake_queues(hw); | |
953 | ||
859c3ca1 SM |
954 | mod_timer(&priv->tx.cleanup_timer, |
955 | jiffies + msecs_to_jiffies(ATH9K_HTC_TX_CLEANUP_INTERVAL)); | |
956 | ||
bf047fcd SM |
957 | ath9k_htc_start_btcoex(priv); |
958 | ||
fb9987d0 | 959 | mutex_unlock(&priv->mutex); |
8a8572a8 | 960 | |
fb9987d0 S |
961 | return ret; |
962 | } | |
963 | ||
881ac6a5 | 964 | static void ath9k_htc_stop(struct ieee80211_hw *hw) |
fb9987d0 S |
965 | { |
966 | struct ath9k_htc_priv *priv = hw->priv; | |
967 | struct ath_hw *ah = priv->ah; | |
968 | struct ath_common *common = ath9k_hw_common(ah); | |
0ff2b5c0 | 969 | int ret __attribute__ ((unused)); |
fb9987d0 S |
970 | u8 cmd_rsp; |
971 | ||
881ac6a5 S |
972 | mutex_lock(&priv->mutex); |
973 | ||
d8a2c51c | 974 | if (test_bit(OP_INVALID, &priv->op_flags)) { |
d2182b69 | 975 | ath_dbg(common, ANY, "Device not present\n"); |
881ac6a5 | 976 | mutex_unlock(&priv->mutex); |
fb9987d0 S |
977 | return; |
978 | } | |
979 | ||
bde748a4 | 980 | ath9k_htc_ps_wakeup(priv); |
b587fc81 | 981 | |
fb9987d0 S |
982 | WMI_CMD(WMI_DISABLE_INTR_CMDID); |
983 | WMI_CMD(WMI_DRAIN_TXQ_ALL_CMDID); | |
984 | WMI_CMD(WMI_STOP_RECV_CMDID); | |
ea888357 | 985 | |
ea888357 | 986 | tasklet_kill(&priv->rx_tasklet); |
fb9987d0 | 987 | |
859c3ca1 | 988 | del_timer_sync(&priv->tx.cleanup_timer); |
b587fc81 | 989 | ath9k_htc_tx_drain(priv); |
f4c88991 SM |
990 | ath9k_wmi_event_drain(priv); |
991 | ||
ea888357 SG |
992 | mutex_unlock(&priv->mutex); |
993 | ||
994 | /* Cancel all the running timers/work .. */ | |
995 | cancel_work_sync(&priv->fatal_work); | |
996 | cancel_work_sync(&priv->ps_work); | |
d244f21e SM |
997 | |
998 | #ifdef CONFIG_MAC80211_LEDS | |
999 | cancel_work_sync(&priv->led_work); | |
1000 | #endif | |
a236254c | 1001 | ath9k_htc_stop_ani(priv); |
ea888357 SG |
1002 | |
1003 | mutex_lock(&priv->mutex); | |
1004 | ||
bf047fcd | 1005 | ath9k_htc_stop_btcoex(priv); |
21cb9879 | 1006 | |
a97b478c SM |
1007 | /* Remove a monitor interface if it's present. */ |
1008 | if (priv->ah->is_monitoring) | |
1009 | ath9k_htc_remove_monitor_interface(priv); | |
1010 | ||
e9201f09 S |
1011 | ath9k_hw_phy_disable(ah); |
1012 | ath9k_hw_disable(ah); | |
e9201f09 S |
1013 | ath9k_htc_ps_restore(priv); |
1014 | ath9k_htc_setpower(priv, ATH9K_PM_FULL_SLEEP); | |
1015 | ||
d8a2c51c | 1016 | set_bit(OP_INVALID, &priv->op_flags); |
fb9987d0 | 1017 | |
d2182b69 | 1018 | ath_dbg(common, CONFIG, "Driver halt\n"); |
8a8572a8 VN |
1019 | mutex_unlock(&priv->mutex); |
1020 | } | |
1021 | ||
fb9987d0 S |
1022 | static int ath9k_htc_add_interface(struct ieee80211_hw *hw, |
1023 | struct ieee80211_vif *vif) | |
1024 | { | |
1025 | struct ath9k_htc_priv *priv = hw->priv; | |
1026 | struct ath9k_htc_vif *avp = (void *)vif->drv_priv; | |
1027 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
1028 | struct ath9k_htc_target_vif hvif; | |
1029 | int ret = 0; | |
1030 | u8 cmd_rsp; | |
1031 | ||
1032 | mutex_lock(&priv->mutex); | |
1033 | ||
bde748a4 | 1034 | ath9k_htc_ps_wakeup(priv); |
fb9987d0 S |
1035 | memset(&hvif, 0, sizeof(struct ath9k_htc_target_vif)); |
1036 | memcpy(&hvif.myaddr, vif->addr, ETH_ALEN); | |
1037 | ||
1038 | switch (vif->type) { | |
1039 | case NL80211_IFTYPE_STATION: | |
e4c62506 | 1040 | hvif.opmode = HTC_M_STA; |
fb9987d0 S |
1041 | break; |
1042 | case NL80211_IFTYPE_ADHOC: | |
e4c62506 | 1043 | hvif.opmode = HTC_M_IBSS; |
fb9987d0 | 1044 | break; |
da8d9d93 | 1045 | case NL80211_IFTYPE_AP: |
e4c62506 | 1046 | hvif.opmode = HTC_M_HOSTAP; |
da8d9d93 | 1047 | break; |
594e65b6 JC |
1048 | case NL80211_IFTYPE_MESH_POINT: |
1049 | hvif.opmode = HTC_M_WDS; /* close enough */ | |
1050 | break; | |
fb9987d0 | 1051 | default: |
3800276a | 1052 | ath_err(common, |
fb9987d0 S |
1053 | "Interface type %d not yet supported\n", vif->type); |
1054 | ret = -EOPNOTSUPP; | |
1055 | goto out; | |
1056 | } | |
1057 | ||
fb9987d0 | 1058 | /* Index starts from zero on the target */ |
a97b478c | 1059 | avp->index = hvif.index = ffz(priv->vif_slot); |
fb9987d0 S |
1060 | hvif.rtsthreshold = cpu_to_be16(2304); |
1061 | WMI_CMD_BUF(WMI_VAP_CREATE_CMDID, &hvif); | |
1062 | if (ret) | |
1063 | goto out; | |
1064 | ||
fb9987d0 S |
1065 | /* |
1066 | * We need a node in target to tx mgmt frames | |
1067 | * before association. | |
1068 | */ | |
1069 | ret = ath9k_htc_add_station(priv, vif, NULL); | |
ab77c70a SM |
1070 | if (ret) { |
1071 | WMI_CMD_BUF(WMI_VAP_REMOVE_CMDID, &hvif); | |
fb9987d0 | 1072 | goto out; |
ab77c70a | 1073 | } |
fb9987d0 | 1074 | |
657eb17d | 1075 | ath9k_htc_set_mac_bssid_mask(priv, vif); |
585895cd | 1076 | |
a97b478c | 1077 | priv->vif_slot |= (1 << avp->index); |
ab77c70a | 1078 | priv->nvifs++; |
a97b478c | 1079 | |
0df8359a | 1080 | INC_VIF(priv, vif->type); |
832f6a18 SM |
1081 | |
1082 | if ((vif->type == NL80211_IFTYPE_AP) || | |
594e65b6 | 1083 | (vif->type == NL80211_IFTYPE_MESH_POINT) || |
832f6a18 SM |
1084 | (vif->type == NL80211_IFTYPE_ADHOC)) |
1085 | ath9k_htc_assign_bslot(priv, vif); | |
1086 | ||
ffbe7c83 | 1087 | ath9k_htc_set_opmode(priv); |
0df8359a | 1088 | |
a236254c | 1089 | if ((priv->ah->opmode == NL80211_IFTYPE_AP) && |
d8a2c51c | 1090 | !test_bit(OP_ANI_RUNNING, &priv->op_flags)) { |
60ca9f87 | 1091 | ath9k_hw_set_tsfadjust(priv->ah, true); |
a236254c | 1092 | ath9k_htc_start_ani(priv); |
9b674a02 | 1093 | } |
a236254c | 1094 | |
d2182b69 JP |
1095 | ath_dbg(common, CONFIG, "Attach a VIF of type: %d at idx: %d\n", |
1096 | vif->type, avp->index); | |
a97b478c | 1097 | |
fb9987d0 | 1098 | out: |
bde748a4 | 1099 | ath9k_htc_ps_restore(priv); |
fb9987d0 | 1100 | mutex_unlock(&priv->mutex); |
cb551df2 | 1101 | |
fb9987d0 S |
1102 | return ret; |
1103 | } | |
1104 | ||
1105 | static void ath9k_htc_remove_interface(struct ieee80211_hw *hw, | |
1106 | struct ieee80211_vif *vif) | |
1107 | { | |
1108 | struct ath9k_htc_priv *priv = hw->priv; | |
1109 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
1110 | struct ath9k_htc_vif *avp = (void *)vif->drv_priv; | |
1111 | struct ath9k_htc_target_vif hvif; | |
1112 | int ret = 0; | |
1113 | u8 cmd_rsp; | |
1114 | ||
fb9987d0 | 1115 | mutex_lock(&priv->mutex); |
cb551df2 | 1116 | ath9k_htc_ps_wakeup(priv); |
fb9987d0 S |
1117 | |
1118 | memset(&hvif, 0, sizeof(struct ath9k_htc_target_vif)); | |
1119 | memcpy(&hvif.myaddr, vif->addr, ETH_ALEN); | |
1120 | hvif.index = avp->index; | |
1121 | WMI_CMD_BUF(WMI_VAP_REMOVE_CMDID, &hvif); | |
0ff2b5c0 SM |
1122 | if (ret) { |
1123 | ath_err(common, "Unable to remove interface at idx: %d\n", | |
1124 | avp->index); | |
1125 | } | |
fb9987d0 | 1126 | priv->nvifs--; |
a97b478c | 1127 | priv->vif_slot &= ~(1 << avp->index); |
fb9987d0 S |
1128 | |
1129 | ath9k_htc_remove_station(priv, vif, NULL); | |
fb9987d0 | 1130 | |
0df8359a | 1131 | DEC_VIF(priv, vif->type); |
832f6a18 SM |
1132 | |
1133 | if ((vif->type == NL80211_IFTYPE_AP) || | |
594e65b6 | 1134 | vif->type == NL80211_IFTYPE_MESH_POINT || |
832f6a18 SM |
1135 | (vif->type == NL80211_IFTYPE_ADHOC)) |
1136 | ath9k_htc_remove_bslot(priv, vif); | |
1137 | ||
ffbe7c83 | 1138 | ath9k_htc_set_opmode(priv); |
0df8359a | 1139 | |
657eb17d | 1140 | ath9k_htc_set_mac_bssid_mask(priv, vif); |
db32124a | 1141 | |
a236254c SM |
1142 | /* |
1143 | * Stop ANI only if there are no associated station interfaces. | |
1144 | */ | |
1145 | if ((vif->type == NL80211_IFTYPE_AP) && (priv->num_ap_vif == 0)) { | |
1146 | priv->rearm_ani = false; | |
8b2c9824 JB |
1147 | ieee80211_iterate_active_interfaces_atomic( |
1148 | priv->hw, IEEE80211_IFACE_ITER_RESUME_ALL, | |
1149 | ath9k_htc_vif_iter, priv); | |
a236254c SM |
1150 | if (!priv->rearm_ani) |
1151 | ath9k_htc_stop_ani(priv); | |
1152 | } | |
1153 | ||
d2182b69 | 1154 | ath_dbg(common, CONFIG, "Detach Interface at idx: %d\n", avp->index); |
a97b478c | 1155 | |
cb551df2 | 1156 | ath9k_htc_ps_restore(priv); |
fb9987d0 S |
1157 | mutex_unlock(&priv->mutex); |
1158 | } | |
1159 | ||
1160 | static int ath9k_htc_config(struct ieee80211_hw *hw, u32 changed) | |
1161 | { | |
1162 | struct ath9k_htc_priv *priv = hw->priv; | |
1163 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
1164 | struct ieee80211_conf *conf = &hw->conf; | |
6bcfe67f SM |
1165 | bool chip_reset = false; |
1166 | int ret = 0; | |
fb9987d0 S |
1167 | |
1168 | mutex_lock(&priv->mutex); | |
6bcfe67f | 1169 | ath9k_htc_ps_wakeup(priv); |
fb9987d0 | 1170 | |
8a8572a8 | 1171 | if (changed & IEEE80211_CONF_CHANGE_IDLE) { |
23367769 | 1172 | mutex_lock(&priv->htc_pm_lock); |
8a8572a8 | 1173 | |
6bcfe67f | 1174 | priv->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE); |
075163bb | 1175 | if (!priv->ps_idle) |
6bcfe67f SM |
1176 | chip_reset = true; |
1177 | ||
1178 | mutex_unlock(&priv->htc_pm_lock); | |
8a8572a8 VN |
1179 | } |
1180 | ||
55de80d6 SM |
1181 | /* |
1182 | * Monitor interface should be added before | |
1183 | * IEEE80211_CONF_CHANGE_CHANNEL is handled. | |
1184 | */ | |
1185 | if (changed & IEEE80211_CONF_CHANGE_MONITOR) { | |
a97b478c SM |
1186 | if ((conf->flags & IEEE80211_CONF_MONITOR) && |
1187 | !priv->ah->is_monitoring) | |
1188 | ath9k_htc_add_monitor_interface(priv); | |
1189 | else if (priv->ah->is_monitoring) | |
1190 | ath9k_htc_remove_monitor_interface(priv); | |
55de80d6 SM |
1191 | } |
1192 | ||
6bcfe67f | 1193 | if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || chip_reset) { |
675a0b04 | 1194 | struct ieee80211_channel *curchan = hw->conf.chandef.chan; |
fb9987d0 | 1195 | int pos = curchan->hw_value; |
fb9987d0 | 1196 | |
d2182b69 | 1197 | ath_dbg(common, CONFIG, "Set channel: %d MHz\n", |
226afe68 | 1198 | curchan->center_freq); |
fb9987d0 | 1199 | |
2297f1c7 | 1200 | ath9k_cmn_get_channel(hw, priv->ah, &hw->conf.chandef); |
fb9987d0 | 1201 | if (ath9k_htc_set_channel(priv, hw, &priv->ah->channels[pos]) < 0) { |
3800276a | 1202 | ath_err(common, "Unable to set channel\n"); |
6bcfe67f SM |
1203 | ret = -EINVAL; |
1204 | goto out; | |
fb9987d0 S |
1205 | } |
1206 | ||
1207 | } | |
692d6b17 | 1208 | |
bde748a4 VN |
1209 | if (changed & IEEE80211_CONF_CHANGE_PS) { |
1210 | if (conf->flags & IEEE80211_CONF_PS) { | |
1211 | ath9k_htc_setpower(priv, ATH9K_PM_NETWORK_SLEEP); | |
1212 | priv->ps_enabled = true; | |
1213 | } else { | |
1214 | priv->ps_enabled = false; | |
1215 | cancel_work_sync(&priv->ps_work); | |
1216 | ath9k_htc_setpower(priv, ATH9K_PM_AWAKE); | |
1217 | } | |
1218 | } | |
fb9987d0 | 1219 | |
692d6b17 SM |
1220 | if (changed & IEEE80211_CONF_CHANGE_POWER) { |
1221 | priv->txpowlimit = 2 * conf->power_level; | |
b2a5c3df RM |
1222 | ath9k_cmn_update_txpow(priv->ah, priv->curtxpow, |
1223 | priv->txpowlimit, &priv->curtxpow); | |
692d6b17 SM |
1224 | } |
1225 | ||
23367769 | 1226 | out: |
6bcfe67f | 1227 | ath9k_htc_ps_restore(priv); |
fb9987d0 | 1228 | mutex_unlock(&priv->mutex); |
6bcfe67f | 1229 | return ret; |
fb9987d0 S |
1230 | } |
1231 | ||
1232 | #define SUPPORTED_FILTERS \ | |
1233 | (FIF_PROMISC_IN_BSS | \ | |
1234 | FIF_ALLMULTI | \ | |
1235 | FIF_CONTROL | \ | |
1236 | FIF_PSPOLL | \ | |
1237 | FIF_OTHER_BSS | \ | |
1238 | FIF_BCN_PRBRESP_PROMISC | \ | |
94a40c0c | 1239 | FIF_PROBE_REQ | \ |
fb9987d0 S |
1240 | FIF_FCSFAIL) |
1241 | ||
1242 | static void ath9k_htc_configure_filter(struct ieee80211_hw *hw, | |
1243 | unsigned int changed_flags, | |
1244 | unsigned int *total_flags, | |
1245 | u64 multicast) | |
1246 | { | |
1247 | struct ath9k_htc_priv *priv = hw->priv; | |
1248 | u32 rfilt; | |
1249 | ||
1250 | mutex_lock(&priv->mutex); | |
fb9987d0 S |
1251 | changed_flags &= SUPPORTED_FILTERS; |
1252 | *total_flags &= SUPPORTED_FILTERS; | |
1253 | ||
d8a2c51c | 1254 | if (test_bit(OP_INVALID, &priv->op_flags)) { |
d2182b69 | 1255 | ath_dbg(ath9k_hw_common(priv->ah), ANY, |
565dfefb | 1256 | "Unable to configure filter on invalid state\n"); |
1ba45b9e | 1257 | mutex_unlock(&priv->mutex); |
565dfefb RM |
1258 | return; |
1259 | } | |
1260 | ath9k_htc_ps_wakeup(priv); | |
1261 | ||
fb9987d0 | 1262 | priv->rxfilter = *total_flags; |
0995d110 | 1263 | rfilt = ath9k_htc_calcrxfilter(priv); |
fb9987d0 S |
1264 | ath9k_hw_setrxfilter(priv->ah, rfilt); |
1265 | ||
d2182b69 JP |
1266 | ath_dbg(ath9k_hw_common(priv->ah), CONFIG, "Set HW RX filter: 0x%x\n", |
1267 | rfilt); | |
fb9987d0 | 1268 | |
bde748a4 | 1269 | ath9k_htc_ps_restore(priv); |
fb9987d0 S |
1270 | mutex_unlock(&priv->mutex); |
1271 | } | |
1272 | ||
a243de48 SG |
1273 | static void ath9k_htc_sta_rc_update_work(struct work_struct *work) |
1274 | { | |
1275 | struct ath9k_htc_sta *ista = | |
1276 | container_of(work, struct ath9k_htc_sta, rc_update_work); | |
1277 | struct ieee80211_sta *sta = | |
1278 | container_of((void *)ista, struct ieee80211_sta, drv_priv); | |
1279 | struct ath9k_htc_priv *priv = ista->htc_priv; | |
1280 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
1281 | struct ath9k_htc_target_rate trate; | |
1282 | ||
1283 | mutex_lock(&priv->mutex); | |
1284 | ath9k_htc_ps_wakeup(priv); | |
1285 | ||
1286 | memset(&trate, 0, sizeof(struct ath9k_htc_target_rate)); | |
1287 | ath9k_htc_setup_rate(priv, sta, &trate); | |
1288 | if (!ath9k_htc_send_rate_cmd(priv, &trate)) | |
1289 | ath_dbg(common, CONFIG, | |
1290 | "Supported rates for sta: %pM updated, rate caps: 0x%X\n", | |
1291 | sta->addr, be32_to_cpu(trate.capflags)); | |
1292 | else | |
1293 | ath_dbg(common, CONFIG, | |
1294 | "Unable to update supported rates for sta: %pM\n", | |
1295 | sta->addr); | |
1296 | ||
1297 | ath9k_htc_ps_restore(priv); | |
1298 | mutex_unlock(&priv->mutex); | |
1299 | } | |
1300 | ||
abd984e6 S |
1301 | static int ath9k_htc_sta_add(struct ieee80211_hw *hw, |
1302 | struct ieee80211_vif *vif, | |
1303 | struct ieee80211_sta *sta) | |
fb9987d0 S |
1304 | { |
1305 | struct ath9k_htc_priv *priv = hw->priv; | |
a243de48 | 1306 | struct ath9k_htc_sta *ista = (struct ath9k_htc_sta *) sta->drv_priv; |
fb9987d0 S |
1307 | int ret; |
1308 | ||
05a30f9c | 1309 | mutex_lock(&priv->mutex); |
cb551df2 | 1310 | ath9k_htc_ps_wakeup(priv); |
abd984e6 | 1311 | ret = ath9k_htc_add_station(priv, vif, sta); |
a243de48 SG |
1312 | if (!ret) { |
1313 | INIT_WORK(&ista->rc_update_work, ath9k_htc_sta_rc_update_work); | |
1314 | ista->htc_priv = priv; | |
abd984e6 | 1315 | ath9k_htc_init_rate(priv, sta); |
a243de48 | 1316 | } |
abd984e6 S |
1317 | ath9k_htc_ps_restore(priv); |
1318 | mutex_unlock(&priv->mutex); | |
05a30f9c | 1319 | |
abd984e6 S |
1320 | return ret; |
1321 | } | |
1322 | ||
1323 | static int ath9k_htc_sta_remove(struct ieee80211_hw *hw, | |
1324 | struct ieee80211_vif *vif, | |
1325 | struct ieee80211_sta *sta) | |
1326 | { | |
1327 | struct ath9k_htc_priv *priv = hw->priv; | |
a243de48 | 1328 | struct ath9k_htc_sta *ista = (struct ath9k_htc_sta *) sta->drv_priv; |
abd984e6 | 1329 | int ret; |
05a30f9c | 1330 | |
a243de48 SG |
1331 | cancel_work_sync(&ista->rc_update_work); |
1332 | ||
abd984e6 S |
1333 | mutex_lock(&priv->mutex); |
1334 | ath9k_htc_ps_wakeup(priv); | |
84c9e164 | 1335 | htc_sta_drain(priv->htc, ista->index); |
abd984e6 | 1336 | ret = ath9k_htc_remove_station(priv, vif, sta); |
cb551df2 | 1337 | ath9k_htc_ps_restore(priv); |
05a30f9c | 1338 | mutex_unlock(&priv->mutex); |
abd984e6 S |
1339 | |
1340 | return ret; | |
fb9987d0 S |
1341 | } |
1342 | ||
69578029 AQ |
1343 | static void ath9k_htc_sta_rc_update(struct ieee80211_hw *hw, |
1344 | struct ieee80211_vif *vif, | |
1345 | struct ieee80211_sta *sta, u32 changed) | |
1346 | { | |
a243de48 | 1347 | struct ath9k_htc_sta *ista = (struct ath9k_htc_sta *) sta->drv_priv; |
69578029 | 1348 | |
2fa4cb90 SG |
1349 | if (!(changed & IEEE80211_RC_SUPP_RATES_CHANGED)) |
1350 | return; | |
1351 | ||
a243de48 | 1352 | schedule_work(&ista->rc_update_work); |
69578029 AQ |
1353 | } |
1354 | ||
8a3a3c85 EP |
1355 | static int ath9k_htc_conf_tx(struct ieee80211_hw *hw, |
1356 | struct ieee80211_vif *vif, u16 queue, | |
fb9987d0 S |
1357 | const struct ieee80211_tx_queue_params *params) |
1358 | { | |
1359 | struct ath9k_htc_priv *priv = hw->priv; | |
1360 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
1361 | struct ath9k_tx_queue_info qi; | |
1362 | int ret = 0, qnum; | |
1363 | ||
bea843c7 | 1364 | if (queue >= IEEE80211_NUM_ACS) |
fb9987d0 S |
1365 | return 0; |
1366 | ||
1367 | mutex_lock(&priv->mutex); | |
cb551df2 | 1368 | ath9k_htc_ps_wakeup(priv); |
fb9987d0 S |
1369 | |
1370 | memset(&qi, 0, sizeof(struct ath9k_tx_queue_info)); | |
1371 | ||
1372 | qi.tqi_aifs = params->aifs; | |
1373 | qi.tqi_cwmin = params->cw_min; | |
1374 | qi.tqi_cwmax = params->cw_max; | |
531bd079 | 1375 | qi.tqi_burstTime = params->txop * 32; |
fb9987d0 S |
1376 | |
1377 | qnum = get_hw_qnum(queue, priv->hwq_map); | |
1378 | ||
d2182b69 | 1379 | ath_dbg(common, CONFIG, |
226afe68 JP |
1380 | "Configure tx [queue/hwq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n", |
1381 | queue, qnum, params->aifs, params->cw_min, | |
1382 | params->cw_max, params->txop); | |
fb9987d0 | 1383 | |
e1572c5e | 1384 | ret = ath_htc_txq_update(priv, qnum, &qi); |
764580f5 | 1385 | if (ret) { |
3800276a | 1386 | ath_err(common, "TXQ Update failed\n"); |
764580f5 S |
1387 | goto out; |
1388 | } | |
fb9987d0 | 1389 | |
764580f5 | 1390 | if ((priv->ah->opmode == NL80211_IFTYPE_ADHOC) && |
bea843c7 | 1391 | (qnum == priv->hwq_map[IEEE80211_AC_BE])) |
764580f5 S |
1392 | ath9k_htc_beaconq_config(priv); |
1393 | out: | |
cb551df2 | 1394 | ath9k_htc_ps_restore(priv); |
fb9987d0 S |
1395 | mutex_unlock(&priv->mutex); |
1396 | ||
1397 | return ret; | |
1398 | } | |
1399 | ||
1400 | static int ath9k_htc_set_key(struct ieee80211_hw *hw, | |
1401 | enum set_key_cmd cmd, | |
1402 | struct ieee80211_vif *vif, | |
1403 | struct ieee80211_sta *sta, | |
1404 | struct ieee80211_key_conf *key) | |
1405 | { | |
1406 | struct ath9k_htc_priv *priv = hw->priv; | |
1407 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
1408 | int ret = 0; | |
1409 | ||
e1572c5e | 1410 | if (htc_modparam_nohwcrypt) |
fb9987d0 S |
1411 | return -ENOSPC; |
1412 | ||
d7d312ca AQ |
1413 | if ((vif->type == NL80211_IFTYPE_ADHOC || |
1414 | vif->type == NL80211_IFTYPE_MESH_POINT) && | |
1415 | (key->cipher == WLAN_CIPHER_SUITE_TKIP || | |
1416 | key->cipher == WLAN_CIPHER_SUITE_CCMP) && | |
1417 | !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) { | |
1418 | /* | |
1419 | * For now, disable hw crypto for the RSN IBSS group keys. This | |
1420 | * could be optimized in the future to use a modified key cache | |
1421 | * design to support per-STA RX GTK, but until that gets | |
1422 | * implemented, use of software crypto for group addressed | |
1423 | * frames is a acceptable to allow RSN IBSS to be used. | |
1424 | */ | |
1425 | return -EOPNOTSUPP; | |
1426 | } | |
1427 | ||
fb9987d0 | 1428 | mutex_lock(&priv->mutex); |
d2182b69 | 1429 | ath_dbg(common, CONFIG, "Set HW Key\n"); |
bde748a4 | 1430 | ath9k_htc_ps_wakeup(priv); |
fb9987d0 S |
1431 | |
1432 | switch (cmd) { | |
1433 | case SET_KEY: | |
040e539e | 1434 | ret = ath_key_config(common, vif, sta, key); |
fb9987d0 S |
1435 | if (ret >= 0) { |
1436 | key->hw_key_idx = ret; | |
1437 | /* push IV and Michael MIC generation to stack */ | |
1438 | key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; | |
97359d12 | 1439 | if (key->cipher == WLAN_CIPHER_SUITE_TKIP) |
fb9987d0 | 1440 | key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC; |
97359d12 JB |
1441 | if (priv->ah->sw_mgmt_crypto && |
1442 | key->cipher == WLAN_CIPHER_SUITE_CCMP) | |
e548c49e | 1443 | key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX; |
fb9987d0 S |
1444 | ret = 0; |
1445 | } | |
1446 | break; | |
1447 | case DISABLE_KEY: | |
040e539e | 1448 | ath_key_delete(common, key); |
fb9987d0 S |
1449 | break; |
1450 | default: | |
1451 | ret = -EINVAL; | |
1452 | } | |
1453 | ||
bde748a4 | 1454 | ath9k_htc_ps_restore(priv); |
fb9987d0 S |
1455 | mutex_unlock(&priv->mutex); |
1456 | ||
1457 | return ret; | |
1458 | } | |
1459 | ||
0cd075d7 SM |
1460 | static void ath9k_htc_set_bssid(struct ath9k_htc_priv *priv) |
1461 | { | |
1462 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
1463 | ||
1464 | ath9k_hw_write_associd(priv->ah); | |
d2182b69 | 1465 | ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n", |
0cd075d7 SM |
1466 | common->curbssid, common->curaid); |
1467 | } | |
1468 | ||
1469 | static void ath9k_htc_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif) | |
1470 | { | |
1471 | struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)data; | |
1472 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
1473 | struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; | |
1474 | ||
1475 | if ((vif->type == NL80211_IFTYPE_STATION) && bss_conf->assoc) { | |
1476 | common->curaid = bss_conf->aid; | |
1477 | memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN); | |
1478 | } | |
1479 | } | |
1480 | ||
1481 | static void ath9k_htc_choose_set_bssid(struct ath9k_htc_priv *priv) | |
1482 | { | |
1483 | if (priv->num_sta_assoc_vif == 1) { | |
8b2c9824 JB |
1484 | ieee80211_iterate_active_interfaces_atomic( |
1485 | priv->hw, IEEE80211_IFACE_ITER_RESUME_ALL, | |
1486 | ath9k_htc_bss_iter, priv); | |
0cd075d7 SM |
1487 | ath9k_htc_set_bssid(priv); |
1488 | } | |
1489 | } | |
1490 | ||
fb9987d0 S |
1491 | static void ath9k_htc_bss_info_changed(struct ieee80211_hw *hw, |
1492 | struct ieee80211_vif *vif, | |
1493 | struct ieee80211_bss_conf *bss_conf, | |
1494 | u32 changed) | |
1495 | { | |
1496 | struct ath9k_htc_priv *priv = hw->priv; | |
1497 | struct ath_hw *ah = priv->ah; | |
1498 | struct ath_common *common = ath9k_hw_common(ah); | |
1499 | ||
1500 | mutex_lock(&priv->mutex); | |
bde748a4 | 1501 | ath9k_htc_ps_wakeup(priv); |
fb9987d0 S |
1502 | |
1503 | if (changed & BSS_CHANGED_ASSOC) { | |
d2182b69 | 1504 | ath_dbg(common, CONFIG, "BSS Changed ASSOC %d\n", |
0cd075d7 | 1505 | bss_conf->assoc); |
e7a2a4f5 | 1506 | |
0cd075d7 SM |
1507 | bss_conf->assoc ? |
1508 | priv->num_sta_assoc_vif++ : priv->num_sta_assoc_vif--; | |
e7a2a4f5 | 1509 | |
0cd075d7 | 1510 | if (priv->ah->opmode == NL80211_IFTYPE_STATION) { |
931cb03a | 1511 | ath9k_htc_choose_set_bssid(priv); |
0cd075d7 | 1512 | if (bss_conf->assoc && (priv->num_sta_assoc_vif == 1)) |
e7a2a4f5 | 1513 | ath9k_htc_start_ani(priv); |
0cd075d7 | 1514 | else if (priv->num_sta_assoc_vif == 0) |
e7a2a4f5 SM |
1515 | ath9k_htc_stop_ani(priv); |
1516 | } | |
fb9987d0 S |
1517 | } |
1518 | ||
931cb03a | 1519 | if (changed & BSS_CHANGED_IBSS) { |
0cd075d7 SM |
1520 | if (priv->ah->opmode == NL80211_IFTYPE_ADHOC) { |
1521 | common->curaid = bss_conf->aid; | |
e7a2a4f5 | 1522 | memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN); |
0cd075d7 | 1523 | ath9k_htc_set_bssid(priv); |
e7a2a4f5 | 1524 | } |
fb9987d0 S |
1525 | } |
1526 | ||
a5fae37d | 1527 | if ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon) { |
d2182b69 JP |
1528 | ath_dbg(common, CONFIG, "Beacon enabled for BSS: %pM\n", |
1529 | bss_conf->bssid); | |
9b674a02 | 1530 | ath9k_htc_set_tsfadjust(priv, vif); |
d8a2c51c | 1531 | set_bit(OP_ENABLE_BEACON, &priv->op_flags); |
1c3652a5 | 1532 | ath9k_htc_beacon_config(priv, vif); |
fb9987d0 S |
1533 | } |
1534 | ||
a5fae37d SM |
1535 | if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon) { |
1536 | /* | |
1537 | * Disable SWBA interrupt only if there are no | |
594e65b6 | 1538 | * concurrent AP/mesh or IBSS interfaces. |
a5fae37d | 1539 | */ |
594e65b6 JC |
1540 | if ((priv->num_ap_vif + priv->num_mbss_vif <= 1) || |
1541 | priv->num_ibss_vif) { | |
d2182b69 | 1542 | ath_dbg(common, CONFIG, |
a5fae37d SM |
1543 | "Beacon disabled for BSS: %pM\n", |
1544 | bss_conf->bssid); | |
d8a2c51c | 1545 | clear_bit(OP_ENABLE_BEACON, &priv->op_flags); |
a5fae37d SM |
1546 | ath9k_htc_beacon_config(priv, vif); |
1547 | } | |
1548 | } | |
1549 | ||
1550 | if (changed & BSS_CHANGED_BEACON_INT) { | |
1551 | /* | |
594e65b6 | 1552 | * Reset the HW TSF for the first AP or mesh interface. |
a5fae37d | 1553 | */ |
594e65b6 JC |
1554 | if (priv->nvifs == 1 && |
1555 | ((priv->ah->opmode == NL80211_IFTYPE_AP && | |
1556 | vif->type == NL80211_IFTYPE_AP && | |
1557 | priv->num_ap_vif == 1) || | |
1558 | (priv->ah->opmode == NL80211_IFTYPE_MESH_POINT && | |
1559 | vif->type == NL80211_IFTYPE_MESH_POINT && | |
1560 | priv->num_mbss_vif == 1))) { | |
d8a2c51c | 1561 | set_bit(OP_TSF_RESET, &priv->op_flags); |
a5fae37d | 1562 | } |
d2182b69 | 1563 | ath_dbg(common, CONFIG, |
a5fae37d SM |
1564 | "Beacon interval changed for BSS: %pM\n", |
1565 | bss_conf->bssid); | |
1c3652a5 | 1566 | ath9k_htc_beacon_config(priv, vif); |
fb9987d0 S |
1567 | } |
1568 | ||
fb9987d0 S |
1569 | if (changed & BSS_CHANGED_ERP_SLOT) { |
1570 | if (bss_conf->use_short_slot) | |
1571 | ah->slottime = 9; | |
1572 | else | |
1573 | ah->slottime = 20; | |
1574 | ||
1575 | ath9k_hw_init_global_settings(ah); | |
1576 | } | |
1577 | ||
2c76ef89 S |
1578 | if (changed & BSS_CHANGED_HT) |
1579 | ath9k_htc_update_rate(priv, vif, bss_conf); | |
1580 | ||
bde748a4 | 1581 | ath9k_htc_ps_restore(priv); |
fb9987d0 S |
1582 | mutex_unlock(&priv->mutex); |
1583 | } | |
1584 | ||
37a41b4a EP |
1585 | static u64 ath9k_htc_get_tsf(struct ieee80211_hw *hw, |
1586 | struct ieee80211_vif *vif) | |
fb9987d0 S |
1587 | { |
1588 | struct ath9k_htc_priv *priv = hw->priv; | |
1589 | u64 tsf; | |
1590 | ||
1591 | mutex_lock(&priv->mutex); | |
cb551df2 | 1592 | ath9k_htc_ps_wakeup(priv); |
fb9987d0 | 1593 | tsf = ath9k_hw_gettsf64(priv->ah); |
cb551df2 | 1594 | ath9k_htc_ps_restore(priv); |
fb9987d0 S |
1595 | mutex_unlock(&priv->mutex); |
1596 | ||
1597 | return tsf; | |
1598 | } | |
1599 | ||
37a41b4a EP |
1600 | static void ath9k_htc_set_tsf(struct ieee80211_hw *hw, |
1601 | struct ieee80211_vif *vif, u64 tsf) | |
fb9987d0 S |
1602 | { |
1603 | struct ath9k_htc_priv *priv = hw->priv; | |
1604 | ||
1605 | mutex_lock(&priv->mutex); | |
cb551df2 | 1606 | ath9k_htc_ps_wakeup(priv); |
fb9987d0 | 1607 | ath9k_hw_settsf64(priv->ah, tsf); |
cb551df2 | 1608 | ath9k_htc_ps_restore(priv); |
fb9987d0 S |
1609 | mutex_unlock(&priv->mutex); |
1610 | } | |
1611 | ||
37a41b4a EP |
1612 | static void ath9k_htc_reset_tsf(struct ieee80211_hw *hw, |
1613 | struct ieee80211_vif *vif) | |
fb9987d0 S |
1614 | { |
1615 | struct ath9k_htc_priv *priv = hw->priv; | |
1616 | ||
1617 | mutex_lock(&priv->mutex); | |
cb551df2 | 1618 | ath9k_htc_ps_wakeup(priv); |
fb9987d0 | 1619 | ath9k_hw_reset_tsf(priv->ah); |
bde748a4 | 1620 | ath9k_htc_ps_restore(priv); |
cb551df2 | 1621 | mutex_unlock(&priv->mutex); |
fb9987d0 S |
1622 | } |
1623 | ||
1624 | static int ath9k_htc_ampdu_action(struct ieee80211_hw *hw, | |
1625 | struct ieee80211_vif *vif, | |
1626 | enum ieee80211_ampdu_mlme_action action, | |
1627 | struct ieee80211_sta *sta, | |
0b01f030 | 1628 | u16 tid, u16 *ssn, u8 buf_size) |
fb9987d0 S |
1629 | { |
1630 | struct ath9k_htc_priv *priv = hw->priv; | |
fb9987d0 | 1631 | struct ath9k_htc_sta *ista; |
d7ca2139 | 1632 | int ret = 0; |
fb9987d0 | 1633 | |
87df8957 | 1634 | mutex_lock(&priv->mutex); |
c58ca5b5 | 1635 | ath9k_htc_ps_wakeup(priv); |
87df8957 | 1636 | |
fb9987d0 S |
1637 | switch (action) { |
1638 | case IEEE80211_AMPDU_RX_START: | |
1639 | break; | |
1640 | case IEEE80211_AMPDU_RX_STOP: | |
1641 | break; | |
1642 | case IEEE80211_AMPDU_TX_START: | |
d7ca2139 S |
1643 | ret = ath9k_htc_tx_aggr_oper(priv, vif, sta, action, tid); |
1644 | if (!ret) | |
1645 | ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); | |
1646 | break; | |
18b559d5 JB |
1647 | case IEEE80211_AMPDU_TX_STOP_CONT: |
1648 | case IEEE80211_AMPDU_TX_STOP_FLUSH: | |
1649 | case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: | |
d7ca2139 S |
1650 | ath9k_htc_tx_aggr_oper(priv, vif, sta, action, tid); |
1651 | ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); | |
fb9987d0 S |
1652 | break; |
1653 | case IEEE80211_AMPDU_TX_OPERATIONAL: | |
1654 | ista = (struct ath9k_htc_sta *) sta->drv_priv; | |
658ef04f | 1655 | spin_lock_bh(&priv->tx.tx_lock); |
fb9987d0 | 1656 | ista->tid_state[tid] = AGGR_OPERATIONAL; |
658ef04f | 1657 | spin_unlock_bh(&priv->tx.tx_lock); |
fb9987d0 S |
1658 | break; |
1659 | default: | |
3800276a | 1660 | ath_err(ath9k_hw_common(priv->ah), "Unknown AMPDU action\n"); |
fb9987d0 S |
1661 | } |
1662 | ||
c58ca5b5 | 1663 | ath9k_htc_ps_restore(priv); |
87df8957 SM |
1664 | mutex_unlock(&priv->mutex); |
1665 | ||
d7ca2139 | 1666 | return ret; |
fb9987d0 S |
1667 | } |
1668 | ||
1669 | static void ath9k_htc_sw_scan_start(struct ieee80211_hw *hw) | |
1670 | { | |
1671 | struct ath9k_htc_priv *priv = hw->priv; | |
1672 | ||
1673 | mutex_lock(&priv->mutex); | |
1674 | spin_lock_bh(&priv->beacon_lock); | |
d8a2c51c | 1675 | set_bit(OP_SCANNING, &priv->op_flags); |
fb9987d0 | 1676 | spin_unlock_bh(&priv->beacon_lock); |
bde748a4 | 1677 | cancel_work_sync(&priv->ps_work); |
a236254c | 1678 | ath9k_htc_stop_ani(priv); |
fb9987d0 S |
1679 | mutex_unlock(&priv->mutex); |
1680 | } | |
1681 | ||
1682 | static void ath9k_htc_sw_scan_complete(struct ieee80211_hw *hw) | |
1683 | { | |
1684 | struct ath9k_htc_priv *priv = hw->priv; | |
1685 | ||
1686 | mutex_lock(&priv->mutex); | |
1687 | spin_lock_bh(&priv->beacon_lock); | |
d8a2c51c | 1688 | clear_bit(OP_SCANNING, &priv->op_flags); |
fb9987d0 | 1689 | spin_unlock_bh(&priv->beacon_lock); |
7c277349 SM |
1690 | ath9k_htc_ps_wakeup(priv); |
1691 | ath9k_htc_vif_reconfig(priv); | |
bde748a4 | 1692 | ath9k_htc_ps_restore(priv); |
cb551df2 | 1693 | mutex_unlock(&priv->mutex); |
fb9987d0 S |
1694 | } |
1695 | ||
1696 | static int ath9k_htc_set_rts_threshold(struct ieee80211_hw *hw, u32 value) | |
1697 | { | |
1698 | return 0; | |
1699 | } | |
1700 | ||
1701 | static void ath9k_htc_set_coverage_class(struct ieee80211_hw *hw, | |
1702 | u8 coverage_class) | |
1703 | { | |
1704 | struct ath9k_htc_priv *priv = hw->priv; | |
1705 | ||
1706 | mutex_lock(&priv->mutex); | |
cb551df2 | 1707 | ath9k_htc_ps_wakeup(priv); |
fb9987d0 S |
1708 | priv->ah->coverage_class = coverage_class; |
1709 | ath9k_hw_init_global_settings(priv->ah); | |
cb551df2 | 1710 | ath9k_htc_ps_restore(priv); |
fb9987d0 S |
1711 | mutex_unlock(&priv->mutex); |
1712 | } | |
1713 | ||
e2186b7c SM |
1714 | /* |
1715 | * Currently, this is used only for selecting the minimum rate | |
1716 | * for management frames, rate selection for data frames remain | |
1717 | * unaffected. | |
1718 | */ | |
1719 | static int ath9k_htc_set_bitrate_mask(struct ieee80211_hw *hw, | |
1720 | struct ieee80211_vif *vif, | |
1721 | const struct cfg80211_bitrate_mask *mask) | |
1722 | { | |
1723 | struct ath9k_htc_priv *priv = hw->priv; | |
1724 | struct ath_common *common = ath9k_hw_common(priv->ah); | |
1725 | struct ath9k_htc_target_rate_mask tmask; | |
1726 | struct ath9k_htc_vif *avp = (void *)vif->drv_priv; | |
1727 | int ret = 0; | |
1728 | u8 cmd_rsp; | |
1729 | ||
1730 | memset(&tmask, 0, sizeof(struct ath9k_htc_target_rate_mask)); | |
1731 | ||
1732 | tmask.vif_index = avp->index; | |
1733 | tmask.band = IEEE80211_BAND_2GHZ; | |
1734 | tmask.mask = cpu_to_be32(mask->control[IEEE80211_BAND_2GHZ].legacy); | |
1735 | ||
1736 | WMI_CMD_BUF(WMI_BITRATE_MASK_CMDID, &tmask); | |
1737 | if (ret) { | |
1738 | ath_err(common, | |
1739 | "Unable to set 2G rate mask for " | |
1740 | "interface at idx: %d\n", avp->index); | |
1741 | goto out; | |
1742 | } | |
1743 | ||
1744 | tmask.band = IEEE80211_BAND_5GHZ; | |
1745 | tmask.mask = cpu_to_be32(mask->control[IEEE80211_BAND_5GHZ].legacy); | |
1746 | ||
1747 | WMI_CMD_BUF(WMI_BITRATE_MASK_CMDID, &tmask); | |
1748 | if (ret) { | |
1749 | ath_err(common, | |
1750 | "Unable to set 5G rate mask for " | |
1751 | "interface at idx: %d\n", avp->index); | |
1752 | goto out; | |
1753 | } | |
1754 | ||
d2182b69 | 1755 | ath_dbg(common, CONFIG, "Set bitrate masks: 0x%x, 0x%x\n", |
e2186b7c SM |
1756 | mask->control[IEEE80211_BAND_2GHZ].legacy, |
1757 | mask->control[IEEE80211_BAND_5GHZ].legacy); | |
1758 | out: | |
1759 | return ret; | |
1760 | } | |
1761 | ||
5fa71984 MSS |
1762 | |
1763 | static int ath9k_htc_get_stats(struct ieee80211_hw *hw, | |
1764 | struct ieee80211_low_level_stats *stats) | |
1765 | { | |
1766 | struct ath9k_htc_priv *priv = hw->priv; | |
1767 | struct ath_hw *ah = priv->ah; | |
1768 | struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats; | |
1769 | ||
1770 | stats->dot11ACKFailureCount = mib_stats->ackrcv_bad; | |
1771 | stats->dot11RTSFailureCount = mib_stats->rts_bad; | |
1772 | stats->dot11FCSErrorCount = mib_stats->fcs_bad; | |
1773 | stats->dot11RTSSuccessCount = mib_stats->rts_good; | |
1774 | ||
1775 | return 0; | |
1776 | } | |
1777 | ||
156652bb BG |
1778 | struct base_eep_header *ath9k_htc_get_eeprom_base(struct ath9k_htc_priv *priv) |
1779 | { | |
1780 | struct base_eep_header *pBase = NULL; | |
1781 | /* | |
1782 | * This can be done since all the 3 EEPROM families have the | |
1783 | * same base header upto a certain point, and we are interested in | |
1784 | * the data only upto that point. | |
1785 | */ | |
1786 | ||
1787 | if (AR_SREV_9271(priv->ah)) | |
1788 | pBase = (struct base_eep_header *) | |
1789 | &priv->ah->eeprom.map4k.baseEepHeader; | |
1790 | else if (priv->ah->hw_version.usbdev == AR9280_USB) | |
1791 | pBase = (struct base_eep_header *) | |
1792 | &priv->ah->eeprom.def.baseEepHeader; | |
1793 | else if (priv->ah->hw_version.usbdev == AR9287_USB) | |
1794 | pBase = (struct base_eep_header *) | |
1795 | &priv->ah->eeprom.map9287.baseEepHeader; | |
1796 | return pBase; | |
1797 | } | |
1798 | ||
1799 | ||
1800 | static int ath9k_htc_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, | |
1801 | u32 *rx_ant) | |
1802 | { | |
1803 | struct ath9k_htc_priv *priv = hw->priv; | |
1804 | struct base_eep_header *pBase = ath9k_htc_get_eeprom_base(priv); | |
1805 | if (pBase) { | |
1806 | *tx_ant = pBase->txMask; | |
1807 | *rx_ant = pBase->rxMask; | |
1808 | } else { | |
1809 | *tx_ant = 0; | |
1810 | *rx_ant = 0; | |
1811 | } | |
1812 | return 0; | |
1813 | } | |
1814 | ||
fb9987d0 S |
1815 | struct ieee80211_ops ath9k_htc_ops = { |
1816 | .tx = ath9k_htc_tx, | |
1817 | .start = ath9k_htc_start, | |
1818 | .stop = ath9k_htc_stop, | |
1819 | .add_interface = ath9k_htc_add_interface, | |
1820 | .remove_interface = ath9k_htc_remove_interface, | |
1821 | .config = ath9k_htc_config, | |
1822 | .configure_filter = ath9k_htc_configure_filter, | |
abd984e6 S |
1823 | .sta_add = ath9k_htc_sta_add, |
1824 | .sta_remove = ath9k_htc_sta_remove, | |
fb9987d0 | 1825 | .conf_tx = ath9k_htc_conf_tx, |
69578029 | 1826 | .sta_rc_update = ath9k_htc_sta_rc_update, |
fb9987d0 S |
1827 | .bss_info_changed = ath9k_htc_bss_info_changed, |
1828 | .set_key = ath9k_htc_set_key, | |
1829 | .get_tsf = ath9k_htc_get_tsf, | |
1830 | .set_tsf = ath9k_htc_set_tsf, | |
1831 | .reset_tsf = ath9k_htc_reset_tsf, | |
1832 | .ampdu_action = ath9k_htc_ampdu_action, | |
1833 | .sw_scan_start = ath9k_htc_sw_scan_start, | |
1834 | .sw_scan_complete = ath9k_htc_sw_scan_complete, | |
1835 | .set_rts_threshold = ath9k_htc_set_rts_threshold, | |
1836 | .rfkill_poll = ath9k_htc_rfkill_poll_state, | |
1837 | .set_coverage_class = ath9k_htc_set_coverage_class, | |
e2186b7c | 1838 | .set_bitrate_mask = ath9k_htc_set_bitrate_mask, |
5fa71984 | 1839 | .get_stats = ath9k_htc_get_stats, |
156652bb | 1840 | .get_antenna = ath9k_htc_get_antenna, |
68185a4b BG |
1841 | |
1842 | #ifdef CONFIG_ATH9K_HTC_DEBUGFS | |
1843 | .get_et_sset_count = ath9k_htc_get_et_sset_count, | |
1844 | .get_et_stats = ath9k_htc_get_et_stats, | |
1845 | .get_et_strings = ath9k_htc_get_et_strings, | |
1846 | #endif | |
fb9987d0 | 1847 | }; |