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Merge tag 'pci-v6.16-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci
[linux-2.6-block.git] / drivers / net / wireless / ath / ath9k / btcoex.c
CommitLineData
17d50d1d 1/*
5b68138e 2 * Copyright (c) 2009-2011 Atheros Communications Inc.
17d50d1d
VT		 3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
ee40fa06 17#include <linux/export.h>
c8770bcf 18#include <linux/types.h>
cfe8cba9 19#include "hw.h"
17d50d1d 20
8b4fc5ba
LR		 21enum ath_bt_mode {
22 ATH_BT_COEX_MODE_LEGACY, /* legacy rx_clear mode */
23 ATH_BT_COEX_MODE_UNSLOTTED, /* untimed/unslotted mode */
24 ATH_BT_COEX_MODE_SLOTTED, /* slotted mode */
32b1076d 25 ATH_BT_COEX_MODE_DISABLED, /* coexistence disabled */
8b4fc5ba
LR		 26};
27
28struct ath_btcoex_config {
29 u8 bt_time_extend;
30 bool bt_txstate_extend;
31 bool bt_txframe_extend;
32 enum ath_bt_mode bt_mode; /* coexistence mode */
33 bool bt_quiet_collision;
34 bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
35 u8 bt_priority_time;
36 u8 bt_first_slot_time;
37 bool bt_hold_rx_clear;
c7212b71
MP		 38 u8 wl_active_time;
39 u8 wl_qc_time;
8b4fc5ba 40};
1773912b 41
54f10b05
RM		 42static const u32 ar9003_wlan_weights[ATH_BTCOEX_STOMP_MAX]
43 [AR9300_NUM_WLAN_WEIGHTS] = {
44 { 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */
45 { 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */
46 { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */
47};
1773912b 48
5160b46f
SM		 49static const u32 mci_wlan_weights[ATH_BTCOEX_STOMP_MAX]
50 [AR9300_NUM_WLAN_WEIGHTS] = {
8227bf45
RM		 51 { 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */
52 { 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
53 { 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
54 { 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
2884561a 55 { 0xffffff01, 0xffffffff, 0xffffff01, 0xffffffff }, /* STOMP_AUDIO */
8227bf45
RM		 56};
57
766ec4a9 58void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
af03abec 59{
766ec4a9 60 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
8b4fc5ba
LR		 61 const struct ath_btcoex_config ath_bt_config = {
62 .bt_time_extend = 0,
63 .bt_txstate_extend = true,
64 .bt_txframe_extend = true,
65 .bt_mode = ATH_BT_COEX_MODE_SLOTTED,
66 .bt_quiet_collision = true,
67 .bt_rxclear_polarity = true,
68 .bt_priority_time = 2,
69 .bt_first_slot_time = 5,
70 .bt_hold_rx_clear = true,
c7212b71
MP		 71 .wl_active_time = 0x20,
72 .wl_qc_time = 0x20,
8b4fc5ba 73 };
a6ef530f 74 bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
c7212b71
MP		 75 u8 time_extend = ath_bt_config.bt_time_extend;
76 u8 first_slot_time = ath_bt_config.bt_first_slot_time;
a6ef530f
VN		 77
78 if (AR_SREV_9300_20_OR_LATER(ah))
79 rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;
1773912b 80
c7212b71
MP		 81 if (AR_SREV_SOC(ah)) {
82 first_slot_time = 0x1d;
83 time_extend = 0xa;
84
85 btcoex_hw->bt_coex_mode3 =
86 SM(ath_bt_config.wl_active_time, AR_BT_WL_ACTIVE_TIME) |
87 SM(ath_bt_config.wl_qc_time, AR_BT_WL_QC_TIME);
88
89 btcoex_hw->bt_coex_mode2 =
90 AR_BT_PROTECT_BT_AFTER_WAKEUP |
91 AR_BT_PHY_ERR_BT_COLL_ENABLE;
92 }
93
766ec4a9
LR		 94 btcoex_hw->bt_coex_mode =
95 (btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) |
c7212b71 96 SM(time_extend, AR_BT_TIME_EXTEND) |
1773912b
VT		 97 SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) |
98 SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) |
99 SM(ath_bt_config.bt_mode, AR_BT_MODE) |
100 SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) |
a6ef530f 101 SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) |
1773912b 102 SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) |
c7212b71 103 SM(first_slot_time, AR_BT_FIRST_SLOT_TIME) |
1773912b
VT		 104 SM(qnum, AR_BT_QCU_THRESH);
105
c7212b71 106 btcoex_hw->bt_coex_mode2 |=
1773912b
VT		 107 SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) |
108 SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
109 AR_BT_DISABLE_BT_ANT;
1773912b 110}
7322fd19 111EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);
1773912b 112
c8770bcf
MP		 113static void ath9k_hw_btcoex_pin_init(struct ath_hw *ah, u8 wlanactive_gpio,
114 u8 btactive_gpio, u8 btpriority_gpio)
115{
116 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
c8770bcf
MP		 117
118 if (btcoex_hw->scheme != ATH_BTCOEX_CFG_2WIRE &&
119 btcoex_hw->scheme != ATH_BTCOEX_CFG_3WIRE)
120 return;
121
e46333b4
RP		 122 btcoex_hw->btactive_gpio = btactive_gpio;
123 btcoex_hw->wlanactive_gpio = wlanactive_gpio;
124 btcoex_hw->btpriority_gpio = btpriority_gpio;
c8770bcf
MP		 125}
126
d68475de
SM		 127void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah)
128{
129 struct ath_common *common = ath9k_hw_common(ah);
130 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
131
132 /*
133 * Check if BTCOEX is globally disabled.
134 */
135 if (!common->btcoex_enabled) {
136 btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE;
137 return;
138 }
139
e1ff147d
SM		 140 if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI) {
141 btcoex_hw->scheme = ATH_BTCOEX_CFG_MCI;
142 } else if (AR_SREV_9300_20_OR_LATER(ah)) {
d68475de 143 btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
d68475de 144
c8770bcf
MP		 145 ath9k_hw_btcoex_pin_init(ah, ATH_WLANACTIVE_GPIO_9300,
146 ATH_BTACTIVE_GPIO_9300,
147 ATH_BTPRIORITY_GPIO_9300);
148 } else if (AR_SREV_9280_20_OR_LATER(ah)) {
149 if (AR_SREV_9285(ah))
d68475de 150 btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
c8770bcf 151 else
d68475de 152 btcoex_hw->scheme = ATH_BTCOEX_CFG_2WIRE;
c8770bcf
MP		 153
154 ath9k_hw_btcoex_pin_init(ah, ATH_WLANACTIVE_GPIO_9280,
155 ATH_BTACTIVE_GPIO_9280,
156 ATH_BTPRIORITY_GPIO_9285);
d68475de
SM		 157 }
158}
159EXPORT_SYMBOL(ath9k_hw_btcoex_init_scheme);
160
75d7839f 161void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
17d50d1d 162{
766ec4a9 163 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
1773912b 164
7a2f0f58 165 /* connect bt_active to baseband */
b3a663f0 166 REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL(ah),
7a2f0f58
LR		 167 (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF |
168 AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));
1773912b 169
b3a663f0 170 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL(ah),
7a2f0f58 171 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);
1773912b 172
7a2f0f58 173 /* Set input mux for bt_active to gpio pin */
dfcf02cd 174 if (!AR_SREV_SOC(ah))
b3a663f0 175 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1(ah),
dfcf02cd
MP		 176 AR_GPIO_INPUT_MUX1_BT_ACTIVE,
177 btcoex_hw->btactive_gpio);
f14462c6 178
7a2f0f58 179 /* Configure the desired gpio port for input */
b2d70d49
MP		 180 ath9k_hw_gpio_request_in(ah, btcoex_hw->btactive_gpio,
181 "ath9k-btactive");
7a2f0f58 182}
7322fd19 183EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);
7a2f0f58 184
75d7839f 185void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
7a2f0f58 186{
766ec4a9 187 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
17d50d1d 188
7a2f0f58 189 /* btcoex 3-wire */
b3a663f0 190 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL(ah),
7a2f0f58
LR		 191 (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
192 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));
17d50d1d 193
7a2f0f58
LR		 194 /* Set input mux for bt_prority_async and
195 * bt_active_async to GPIO pins */
dfcf02cd 196 if (!AR_SREV_SOC(ah)) {
b3a663f0 197 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1(ah),
dfcf02cd
MP		 198 AR_GPIO_INPUT_MUX1_BT_ACTIVE,
199 btcoex_hw->btactive_gpio);
b3a663f0 200 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1(ah),
dfcf02cd
MP		 201 AR_GPIO_INPUT_MUX1_BT_PRIORITY,
202 btcoex_hw->btpriority_gpio);
203 }
1773912b 204
7a2f0f58 205 /* Configure the desired GPIO ports for input */
b2d70d49
MP		 206 ath9k_hw_gpio_request_in(ah, btcoex_hw->btactive_gpio,
207 "ath9k-btactive");
208 ath9k_hw_gpio_request_in(ah, btcoex_hw->btpriority_gpio,
209 "ath9k-btpriority");
7a2f0f58 210}
7322fd19 211EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);
7a2f0f58 212
db222190
MP		 213void ath9k_hw_btcoex_deinit(struct ath_hw *ah)
214{
215 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
216
217 ath9k_hw_gpio_free(ah, btcoex_hw->btactive_gpio);
218 ath9k_hw_gpio_free(ah, btcoex_hw->btpriority_gpio);
219 ath9k_hw_gpio_free(ah, btcoex_hw->wlanactive_gpio);
220}
221EXPORT_SYMBOL(ath9k_hw_btcoex_deinit);
222
d3c83ac1
SM		 223void ath9k_hw_btcoex_init_mci(struct ath_hw *ah)
224{
225 ah->btcoex_hw.mci.ready = false;
226 ah->btcoex_hw.mci.bt_state = 0;
227 ah->btcoex_hw.mci.bt_ver_major = 3;
228 ah->btcoex_hw.mci.bt_ver_minor = 0;
229 ah->btcoex_hw.mci.bt_version_known = false;
230 ah->btcoex_hw.mci.update_2g5g = true;
231 ah->btcoex_hw.mci.is_2g = true;
232 ah->btcoex_hw.mci.wlan_channels_update = false;
233 ah->btcoex_hw.mci.wlan_channels[0] = 0x00000000;
234 ah->btcoex_hw.mci.wlan_channels[1] = 0xffffffff;
235 ah->btcoex_hw.mci.wlan_channels[2] = 0xffffffff;
236 ah->btcoex_hw.mci.wlan_channels[3] = 0x7fffffff;
237 ah->btcoex_hw.mci.query_bt = true;
238 ah->btcoex_hw.mci.unhalt_bt_gpm = true;
239 ah->btcoex_hw.mci.halted_bt_gpm = false;
240 ah->btcoex_hw.mci.need_flush_btinfo = false;
241 ah->btcoex_hw.mci.wlan_cal_seq = 0;
242 ah->btcoex_hw.mci.wlan_cal_done = 0;
3c5c9d04 243 ah->btcoex_hw.mci.config = (AR_SREV_9462(ah)) ? 0x2201 : 0xa4c1;
d3c83ac1
SM		 244}
245EXPORT_SYMBOL(ath9k_hw_btcoex_init_mci);
246
bc74bf8f
LR		 247static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
248{
766ec4a9 249 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
bc74bf8f
LR		 250
251 /* Configure the desired GPIO port for TX_FRAME output */
b2d70d49
MP		 252 ath9k_hw_gpio_request_out(ah, btcoex_hw->wlanactive_gpio,
253 "ath9k-wlanactive",
254 AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
bc74bf8f
LR		 255}
256
5160b46f
SM		 257/*
258 * For AR9002, bt_weight/wlan_weight are used.
259 * For AR9003 and above, stomp_type is used.
260 */
5e197292
LR		 261void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
262 u32 bt_weight,
5160b46f
SM		 263 u32 wlan_weight,
264 enum ath_stomp_type stomp_type)
5e197292
LR		 265{
266 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
db60428b
RM		 267 struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci;
268 u8 txprio_shift[] = { 24, 16, 16, 0 }; /* tx priority weight */
269 bool concur_tx = (mci_hw->concur_tx && btcoex_hw->tx_prio[stomp_type]);
270 const u32 *weight = ar9003_wlan_weights[stomp_type];
271 int i;
5e197292 272
db60428b 273 if (!AR_SREV_9300_20_OR_LATER(ah)) {
5160b46f
SM		 274 btcoex_hw->bt_coex_weights =
275 SM(bt_weight, AR_BTCOEX_BT_WGHT) |
276 SM(wlan_weight, AR_BTCOEX_WL_WGHT);
db60428b
RM		 277 return;
278 }
279
280 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
281 enum ath_stomp_type stype =
282 ((stomp_type == ATH_BTCOEX_STOMP_LOW) &&
283 btcoex_hw->mci.stomp_ftp) ?
284 ATH_BTCOEX_STOMP_LOW_FTP : stomp_type;
285 weight = mci_wlan_weights[stype];
5160b46f 286 }
db60428b
RM		 287
288 for (i = 0; i < AR9300_NUM_WLAN_WEIGHTS; i++) {
289 btcoex_hw->bt_weight[i] = AR9300_BT_WGHT;
290 btcoex_hw->wlan_weight[i] = weight[i];
291 if (concur_tx && i) {
292 btcoex_hw->wlan_weight[i] &=
293 ~(0xff << txprio_shift[i-1]);
294 btcoex_hw->wlan_weight[i] |=
295 (btcoex_hw->tx_prio[stomp_type] <<
296 txprio_shift[i-1]);
297 }
298 }
dfcf02cd 299
db60428b
RM		 300 /* Last WLAN weight has to be adjusted wrt tx priority */
301 if (concur_tx) {
302 btcoex_hw->wlan_weight[i-1] &= ~(0xff << txprio_shift[i-1]);
303 btcoex_hw->wlan_weight[i-1] |= (btcoex_hw->tx_prio[stomp_type]
304 << txprio_shift[i-1]);
305 }
5e197292 306}
7322fd19 307EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);
5e197292 308
a6ef530f 309
bc74bf8f
LR		 310static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
311{
54f10b05 312 struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
21cb9879 313 u32 val;
54f10b05 314 int i;
bc74bf8f
LR		 315
316 /*
317 * Program coex mode and weight registers to
318 * enable coex 3-wire
319 */
c7212b71
MP		 320 if (AR_SREV_SOC(ah))
321 REG_CLR_BIT(ah, AR_BT_COEX_MODE2, AR_BT_PHY_ERR_BT_COLL_ENABLE);
322
54f10b05
RM		 323 REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode);
324 REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2);
bc74bf8f 325
c7212b71
MP		 326 if (AR_SREV_SOC(ah))
327 REG_WRITE(ah, AR_BT_COEX_MODE3, btcoex->bt_coex_mode3);
328
a6ef530f 329 if (AR_SREV_9300_20_OR_LATER(ah)) {
54f10b05
RM		 330 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]);
331 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]);
332 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
333 REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i),
334 btcoex->bt_weight[i]);
a6ef530f 335 } else
54f10b05 336 REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights);
a6ef530f 337
21cb9879
VN		 338 if (AR_SREV_9271(ah)) {
339 val = REG_READ(ah, 0x50040);
340 val &= 0xFFFFFEFF;
341 REG_WRITE(ah, 0x50040, val);
342 }
343
bc74bf8f
LR		 344 REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
345 REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);
346
b2d70d49
MP		 347 ath9k_hw_gpio_request_out(ah, btcoex->wlanactive_gpio,
348 "ath9k-wlanactive",
349 AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
bc74bf8f
LR		 350}
351
8227bf45
RM		 352static void ath9k_hw_btcoex_enable_mci(struct ath_hw *ah)
353{
354 struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
355 int i;
356
357 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
358 REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
359 btcoex->wlan_weight[i]);
360
361 REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
362 btcoex->enabled = true;
363}
364
e1ff147d
SM		 365static void ath9k_hw_btcoex_disable_mci(struct ath_hw *ah)
366{
367 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
368 int i;
369
370 ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
371
372 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
373 REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
374 btcoex_hw->wlan_weight[i]);
375}
376
17d50d1d
VT		 377void ath9k_hw_btcoex_enable(struct ath_hw *ah)
378{
766ec4a9 379 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
f14462c6 380
8a309305 381 switch (ath9k_hw_get_btcoex_scheme(ah)) {
bc74bf8f 382 case ATH_BTCOEX_CFG_NONE:
8a309305 383 return;
bc74bf8f
LR		 384 case ATH_BTCOEX_CFG_2WIRE:
385 ath9k_hw_btcoex_enable_2wire(ah);
386 break;
387 case ATH_BTCOEX_CFG_3WIRE:
388 ath9k_hw_btcoex_enable_3wire(ah);
389 break;
e1ff147d
SM		 390 case ATH_BTCOEX_CFG_MCI:
391 ath9k_hw_btcoex_enable_mci(ah);
392 break;
1773912b
VT		 393 }
394
dfcf02cd
MP		 395 if (ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_MCI &&
396 !AR_SREV_SOC(ah)) {
b3a663f0 397 REG_RMW(ah, AR_GPIO_PDPU(ah),
e1ff147d
SM		 398 (0x2 << (btcoex_hw->btactive_gpio * 2)),
399 (0x3 << (btcoex_hw->btactive_gpio * 2)));
400 }
17d50d1d 401
766ec4a9 402 ah->btcoex_hw.enabled = true;
17d50d1d 403}
7322fd19 404EXPORT_SYMBOL(ath9k_hw_btcoex_enable);
17d50d1d
VT		 405
406void ath9k_hw_btcoex_disable(struct ath_hw *ah)
407{
766ec4a9 408 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
54f10b05 409 int i;
f14462c6 410
8227bf45 411 btcoex_hw->enabled = false;
e1ff147d
SM		 412
413 if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_MCI) {
414 ath9k_hw_btcoex_disable_mci(ah);
0466e254 415 return;
8227bf45 416 }
e1ff147d 417
30b81898
SM		 418 if (!AR_SREV_9300_20_OR_LATER(ah))
419 ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);
17d50d1d 420
b2d70d49
MP		 421 ath9k_hw_gpio_request_out(ah, btcoex_hw->wlanactive_gpio,
422 NULL, AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
17d50d1d 423
766ec4a9 424 if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
1773912b 425 REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE);
1773912b 426 REG_WRITE(ah, AR_BT_COEX_MODE2, 0);
a6ef530f
VN		 427
428 if (AR_SREV_9300_20_OR_LATER(ah)) {
429 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0);
430 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0);
54f10b05
RM		 431 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
432 REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0);
a6ef530f
VN		 433 } else
434 REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);
435
1773912b 436 }
17d50d1d 437}
7322fd19 438EXPORT_SYMBOL(ath9k_hw_btcoex_disable);
978f78bf 439
978f78bf
VN		 440/*
441 * Configures appropriate weight based on stomp type.
442 */
443void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
444 enum ath_stomp_type stomp_type)
445{
446 if (AR_SREV_9300_20_OR_LATER(ah)) {
5160b46f 447 ath9k_hw_btcoex_set_weight(ah, 0, 0, stomp_type);
978f78bf
VN		 448 return;
449 }
450
451 switch (stomp_type) {
452 case ATH_BTCOEX_STOMP_ALL:
453 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
5160b46f 454 AR_STOMP_ALL_WLAN_WGHT, 0);
978f78bf
VN		 455 break;
456 case ATH_BTCOEX_STOMP_LOW:
457 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
5160b46f 458 AR_STOMP_LOW_WLAN_WGHT, 0);
978f78bf
VN		 459 break;
460 case ATH_BTCOEX_STOMP_NONE:
461 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
5160b46f 462 AR_STOMP_NONE_WLAN_WGHT, 0);
978f78bf
VN		 463 break;
464 default:
d2182b69 465 ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n");
978f78bf
VN		 466 break;
467 }
978f78bf
VN		 468}
469EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp);
db60428b
RM		 470
471void ath9k_hw_btcoex_set_concur_txprio(struct ath_hw *ah, u8 *stomp_txprio)
472{
473 struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
474 int i;
475
476 for (i = 0; i < ATH_BTCOEX_STOMP_MAX; i++)
477 btcoex->tx_prio[i] = stomp_txprio[i];
478}
479EXPORT_SYMBOL(ath9k_hw_btcoex_set_concur_txprio);
Linux 6.x block layer and io_uring tree(s)