Commit | Line | Data |
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394cf0a1 | 1 | /* |
5b68138e | 2 | * Copyright (c) 2008-2011 Atheros Communications Inc. |
394cf0a1 S |
3 | * |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
17 | #ifndef ANI_H | |
18 | #define ANI_H | |
19 | ||
22e66a4c | 20 | #define BEACON_RSSI(ahp) (ahp->stats.avgbrssi) |
394cf0a1 | 21 | |
e36b27af | 22 | /* units are errors per second */ |
55fee98a SM |
23 | #define ATH9K_ANI_OFDM_TRIG_HIGH 3500 |
24 | #define ATH9K_ANI_OFDM_TRIG_HIGH_BELOW_INI 1000 | |
f5547245 | 25 | #define ATH9K_ANI_OFDM_TRIG_HIGH_OLD 500 |
55fee98a | 26 | |
465dce62 | 27 | #define ATH9K_ANI_OFDM_TRIG_LOW 400 |
55fee98a | 28 | #define ATH9K_ANI_OFDM_TRIG_LOW_ABOVE_INI 900 |
f5547245 | 29 | #define ATH9K_ANI_OFDM_TRIG_LOW_OLD 200 |
55fee98a | 30 | |
465dce62 | 31 | #define ATH9K_ANI_CCK_TRIG_HIGH 600 |
f5547245 | 32 | #define ATH9K_ANI_CCK_TRIG_HIGH_OLD 200 |
465dce62 | 33 | #define ATH9K_ANI_CCK_TRIG_LOW 300 |
f5547245 | 34 | #define ATH9K_ANI_CCK_TRIG_LOW_OLD 100 |
e36b27af | 35 | |
465dce62 | 36 | #define ATH9K_ANI_SPUR_IMMUNE_LVL 3 |
465dce62 | 37 | #define ATH9K_ANI_FIRSTEP_LVL 2 |
e36b27af | 38 | |
394cf0a1 S |
39 | #define ATH9K_ANI_RSSI_THR_HIGH 40 |
40 | #define ATH9K_ANI_RSSI_THR_LOW 7 | |
e36b27af | 41 | |
465dce62 | 42 | #define ATH9K_ANI_PERIOD 300 |
e36b27af LR |
43 | |
44 | /* in ms */ | |
465dce62 | 45 | #define ATH9K_ANI_POLLINTERVAL 1000 |
394cf0a1 | 46 | |
e36b27af LR |
47 | #define ATH9K_SIG_FIRSTEP_SETTING_MIN 0 |
48 | #define ATH9K_SIG_FIRSTEP_SETTING_MAX 20 | |
49 | #define ATH9K_SIG_SPUR_IMM_SETTING_MIN 0 | |
50 | #define ATH9K_SIG_SPUR_IMM_SETTING_MAX 22 | |
51 | ||
e36b27af LR |
52 | /* values here are relative to the INI */ |
53 | ||
394cf0a1 | 54 | enum ath9k_ani_cmd { |
65c1a4de SM |
55 | ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION = 0x1, |
56 | ATH9K_ANI_FIRSTEP_LEVEL = 0x2, | |
57 | ATH9K_ANI_SPUR_IMMUNITY_LEVEL = 0x4, | |
58 | ATH9K_ANI_MRC_CCK = 0x8, | |
e36b27af | 59 | ATH9K_ANI_ALL = 0xfff |
394cf0a1 S |
60 | }; |
61 | ||
62 | struct ath9k_mib_stats { | |
63 | u32 ackrcv_bad; | |
64 | u32 rts_bad; | |
65 | u32 rts_good; | |
66 | u32 fcs_bad; | |
67 | u32 beacons; | |
68 | }; | |
69 | ||
e36b27af LR |
70 | /* INI default values for ANI registers */ |
71 | struct ath9k_ani_default { | |
72 | u16 m1ThreshLow; | |
73 | u16 m2ThreshLow; | |
74 | u16 m1Thresh; | |
75 | u16 m2Thresh; | |
76 | u16 m2CountThr; | |
77 | u16 m2CountThrLow; | |
78 | u16 m1ThreshLowExt; | |
79 | u16 m2ThreshLowExt; | |
80 | u16 m1ThreshExt; | |
81 | u16 m2ThreshExt; | |
82 | u16 firstep; | |
83 | u16 firstepLow; | |
84 | u16 cycpwrThr1; | |
85 | u16 cycpwrThr1Ext; | |
86 | }; | |
87 | ||
ee6e8d1c | 88 | struct ar5416AniState { |
ee6e8d1c | 89 | u8 noiseImmunityLevel; |
e36b27af LR |
90 | u8 ofdmNoiseImmunityLevel; |
91 | u8 cckNoiseImmunityLevel; | |
92 | bool ofdmsTurn; | |
81b67fd6 | 93 | u8 mrcCCK; |
ee6e8d1c S |
94 | u8 spurImmunityLevel; |
95 | u8 firstepLevel; | |
4f4395c6 | 96 | bool ofdmWeakSigDetect; |
ee6e8d1c | 97 | u32 listenTime; |
ee6e8d1c S |
98 | u32 ofdmPhyErrCount; |
99 | u32 cckPhyErrCount; | |
e36b27af | 100 | struct ath9k_ani_default iniDef; |
ee6e8d1c S |
101 | }; |
102 | ||
394cf0a1 | 103 | struct ar5416Stats { |
394cf0a1 S |
104 | u32 ast_ani_spurup; |
105 | u32 ast_ani_spurdown; | |
106 | u32 ast_ani_ofdmon; | |
107 | u32 ast_ani_ofdmoff; | |
108 | u32 ast_ani_cckhigh; | |
109 | u32 ast_ani_ccklow; | |
110 | u32 ast_ani_stepup; | |
111 | u32 ast_ani_stepdown; | |
112 | u32 ast_ani_ofdmerrs; | |
113 | u32 ast_ani_cckerrs; | |
114 | u32 ast_ani_reset; | |
107021c4 | 115 | u32 ast_ani_lneg_or_lzero; |
22e66a4c | 116 | u32 avgbrssi; |
394cf0a1 | 117 | struct ath9k_mib_stats ast_mibstats; |
394cf0a1 | 118 | }; |
2660b81a | 119 | #define ah_mibStats stats.ast_mibstats |
394cf0a1 | 120 | |
cbe61d8a S |
121 | void ath9k_enable_mib_counters(struct ath_hw *ah); |
122 | void ath9k_hw_disable_mib_counters(struct ath_hw *ah); | |
f637cfd6 | 123 | void ath9k_hw_ani_init(struct ath_hw *ah); |
394cf0a1 S |
124 | |
125 | #endif /* ANI_H */ |