[linux-2.6-block.git] / drivers / net / wireless / ath / ath10k / swap.h

/*
 * Copyright (c) 2015 Qualcomm Atheros, Inc.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#ifndef _SWAP_H_
#define _SWAP_H_

#define ATH10K_SWAP_CODE_SEG_BIN_LEN_MAX	(512 * 1024)
#define ATH10K_SWAP_CODE_SEG_MAGIC_BYTES_SZ	12
#define ATH10K_SWAP_CODE_SEG_NUM_MAX		16
/* Currently only one swap segment is supported */
#define ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED	1

struct ath10k_fw_file;

struct ath10k_swap_code_seg_tlv {
	__le32 address;
	__le32 length;
	u8 data[0];
} __packed;

struct ath10k_swap_code_seg_tail {
	u8 magic_signature[ATH10K_SWAP_CODE_SEG_MAGIC_BYTES_SZ];
	__le32 bmi_write_addr;
} __packed;

union ath10k_swap_code_seg_item {
	struct ath10k_swap_code_seg_tlv tlv;
	struct ath10k_swap_code_seg_tail tail;
} __packed;

struct ath10k_swap_code_seg_hw_info {
	/* Swap binary image size */
	__le32 swap_size;
	__le32 num_segs;

	/* Swap data size */
	__le32 size;
	__le32 size_log2;
	__le32 bus_addr[ATH10K_SWAP_CODE_SEG_NUM_MAX];
	__le64 reserved[ATH10K_SWAP_CODE_SEG_NUM_MAX];
} __packed;

struct ath10k_swap_code_seg_info {
	struct ath10k_swap_code_seg_hw_info seg_hw_info;
	void *virt_address[ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED];
	u32 target_addr;
	dma_addr_t paddr[ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED];
};

int ath10k_swap_code_seg_configure(struct ath10k *ar,
				   const struct ath10k_fw_file *fw_file);
void ath10k_swap_code_seg_release(struct ath10k *ar,
				  struct ath10k_fw_file *fw_file);
int ath10k_swap_code_seg_init(struct ath10k *ar,
			      struct ath10k_fw_file *fw_file);

#endif
Commit	Line	Data
dcb02db1 VT	1	/*
	2	* Copyright (c) 2015 Qualcomm Atheros, Inc.
	3	*
	4	* Permission to use, copy, modify, and/or distribute this software for any
	5	* purpose with or without fee is hereby granted, provided that the above
	6	* copyright notice and this permission notice appear in all copies.
	7	*
	8	* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
	9	* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
	10	* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
	11	* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
	12	* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
	13	* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
	14	* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
	15	*/
	16
	17	#ifndef _SWAP_H_
	18	#define _SWAP_H_
	19
	20	#define ATH10K_SWAP_CODE_SEG_BIN_LEN_MAX (512 * 1024)
	21	#define ATH10K_SWAP_CODE_SEG_MAGIC_BYTES_SZ 12
	22	#define ATH10K_SWAP_CODE_SEG_NUM_MAX 16
	23	/* Currently only one swap segment is supported */
	24	#define ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED 1
	25
5459c5d4 T	26	struct ath10k_fw_file;
5459c5d4 T	27
dcb02db1 VT	28	struct ath10k_swap_code_seg_tlv {
	29	__le32 address;
	30	__le32 length;
	31	u8 data[0];
	32	} __packed;
	33
	34	struct ath10k_swap_code_seg_tail {
	35	u8 magic_signature[ATH10K_SWAP_CODE_SEG_MAGIC_BYTES_SZ];
	36	__le32 bmi_write_addr;
	37	} __packed;
	38
	39	union ath10k_swap_code_seg_item {
	40	struct ath10k_swap_code_seg_tlv tlv;
	41	struct ath10k_swap_code_seg_tail tail;
	42	} __packed;
	43
dcb02db1 VT	44	struct ath10k_swap_code_seg_hw_info {
	45	/* Swap binary image size */
	46	__le32 swap_size;
	47	__le32 num_segs;
	48
	49	/* Swap data size */
	50	__le32 size;
	51	__le32 size_log2;
	52	__le32 bus_addr[ATH10K_SWAP_CODE_SEG_NUM_MAX];
	53	__le64 reserved[ATH10K_SWAP_CODE_SEG_NUM_MAX];
	54	} __packed;
	55
	56	struct ath10k_swap_code_seg_info {
	57	struct ath10k_swap_code_seg_hw_info seg_hw_info;
	58	void *virt_address[ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED];
	59	u32 target_addr;
	60	dma_addr_t paddr[ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED];
	61	};
	62
5459c5d4 T	63	int ath10k_swap_code_seg_configure(struct ath10k *ar,
	64	const struct ath10k_fw_file *fw_file);
	65	void ath10k_swap_code_seg_release(struct ath10k *ar,
	66	struct ath10k_fw_file *fw_file);
	67	int ath10k_swap_code_seg_init(struct ath10k *ar,
	68	struct ath10k_fw_file *fw_file);
dcb02db1 VT	69
dcb02db1 VT	70	#endif