[linux-2.6-block.git] / drivers / net / wan / sealevel.c

/*
 *	Sealevel Systems 4021 driver.
 *
 *	This program is free software; you can redistribute it and/or
 *	modify it under the terms of the GNU General Public License
 *	as published by the Free Software Foundation; either version
 *	2 of the License, or (at your option) any later version.
 *
 *	(c) Copyright 1999, 2001 Alan Cox
 *	(c) Copyright 2001 Red Hat Inc.
 *	Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl>
 *
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/net.h>
#include <linux/skbuff.h>
#include <linux/netdevice.h>
#include <linux/if_arp.h>
#include <linux/delay.h>
#include <linux/hdlc.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <net/arp.h>

#include <asm/irq.h>
#include <asm/io.h>
#include <asm/dma.h>
#include <asm/byteorder.h>
#include "z85230.h"


struct slvl_device
{
	struct z8530_channel *chan;
	int channel;
};


struct slvl_board
{
	struct slvl_device dev[2];
	struct z8530_dev board;
	int iobase;
};

/*
 *	Network driver support routines
 */

static inline struct slvl_device* dev_to_chan(struct net_device *dev)
{
	return (struct slvl_device *)dev_to_hdlc(dev)->priv;
}

/*
 *	Frame receive. Simple for our card as we do HDLC and there
 *	is no funny garbage involved
 */

static void sealevel_input(struct z8530_channel *c, struct sk_buff *skb)
{
	/* Drop the CRC - it's not a good idea to try and negotiate it ;) */
	skb_trim(skb, skb->len - 2);
	skb->protocol = hdlc_type_trans(skb, c->netdevice);
	skb_reset_mac_header(skb);
	skb->dev = c->netdevice;
	netif_rx(skb);
}

/*
 *	We've been placed in the UP state
 */

static int sealevel_open(struct net_device *d)
{
	struct slvl_device *slvl = dev_to_chan(d);
	int err = -1;
	int unit = slvl->channel;

	/*
	 *	Link layer up.
	 */

	switch (unit) {
		case 0:
			err = z8530_sync_dma_open(d, slvl->chan);
			break;
		case 1:
			err = z8530_sync_open(d, slvl->chan);
			break;
	}

	if (err)
		return err;

	err = hdlc_open(d);
	if (err) {
		switch (unit) {
			case 0:
				z8530_sync_dma_close(d, slvl->chan);
				break;
			case 1:
				z8530_sync_close(d, slvl->chan);
				break;
		}
		return err;
	}

	slvl->chan->rx_function = sealevel_input;

	/*
	 *	Go go go
	 */
	netif_start_queue(d);
	return 0;
}

static int sealevel_close(struct net_device *d)
{
	struct slvl_device *slvl = dev_to_chan(d);
	int unit = slvl->channel;

	/*
	 *	Discard new frames
	 */

	slvl->chan->rx_function = z8530_null_rx;

	hdlc_close(d);
	netif_stop_queue(d);

	switch (unit) {
		case 0:
			z8530_sync_dma_close(d, slvl->chan);
			break;
		case 1:
			z8530_sync_close(d, slvl->chan);
			break;
	}
	return 0;
}

static int sealevel_ioctl(struct net_device *d, struct ifreq *ifr, int cmd)
{
	/* struct slvl_device *slvl=dev_to_chan(d);
	   z8530_ioctl(d,&slvl->sync.chanA,ifr,cmd) */
	return hdlc_ioctl(d, ifr, cmd);
}

/*
 *	Passed network frames, fire them downwind.
 */

static netdev_tx_t sealevel_queue_xmit(struct sk_buff *skb,
					     struct net_device *d)
{
	return z8530_queue_xmit(dev_to_chan(d)->chan, skb);
}

static int sealevel_attach(struct net_device *dev, unsigned short encoding,
			   unsigned short parity)
{
	if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT)
		return 0;
	return -EINVAL;
}

static const struct net_device_ops sealevel_ops = {
	.ndo_open       = sealevel_open,
	.ndo_stop       = sealevel_close,
	.ndo_change_mtu = hdlc_change_mtu,
	.ndo_start_xmit = hdlc_start_xmit,
	.ndo_do_ioctl   = sealevel_ioctl,
};

static int slvl_setup(struct slvl_device *sv, int iobase, int irq)
{
	struct net_device *dev = alloc_hdlcdev(sv);
	if (!dev)
		return -1;

	dev_to_hdlc(dev)->attach = sealevel_attach;
	dev_to_hdlc(dev)->xmit = sealevel_queue_xmit;
	dev->netdev_ops = &sealevel_ops;
	dev->base_addr = iobase;
	dev->irq = irq;

	if (register_hdlc_device(dev)) {
		pr_err("unable to register HDLC device\n");
		free_netdev(dev);
		return -1;
	}

	sv->chan->netdevice = dev;
	return 0;
}


/*
 *	Allocate and setup Sealevel board.
 */

static __init struct slvl_board *slvl_init(int iobase, int irq,
					   int txdma, int rxdma, int slow)
{
	struct z8530_dev *dev;
	struct slvl_board *b;

	/*
	 *	Get the needed I/O space
	 */

	if (!request_region(iobase, 8, "Sealevel 4021")) {
		pr_warn("I/O 0x%X already in use\n", iobase);
		return NULL;
	}

	b = kzalloc(sizeof(struct slvl_board), GFP_KERNEL);
	if (!b)
		goto err_kzalloc;

	b->dev[0].chan = &b->board.chanA;
	b->dev[0].channel = 0;

	b->dev[1].chan = &b->board.chanB;
	b->dev[1].channel = 1;

	dev = &b->board;

	/*
	 *	Stuff in the I/O addressing
	 */

	dev->active = 0;

	b->iobase = iobase;

	/*
	 *	Select 8530 delays for the old board
	 */

	if (slow)
		iobase |= Z8530_PORT_SLEEP;

	dev->chanA.ctrlio = iobase + 1;
	dev->chanA.dataio = iobase;
	dev->chanB.ctrlio = iobase + 3;
	dev->chanB.dataio = iobase + 2;

	dev->chanA.irqs = &z8530_nop;
	dev->chanB.irqs = &z8530_nop;

	/*
	 *	Assert DTR enable DMA
	 */

	outb(3 | (1 << 7), b->iobase + 4);


	/* We want a fast IRQ for this device. Actually we'd like an even faster
	   IRQ ;) - This is one driver RtLinux is made for */

	if (request_irq(irq, z8530_interrupt, IRQF_DISABLED,
			"SeaLevel", dev) < 0) {
		pr_warn("IRQ %d already in use\n", irq);
		goto err_request_irq;
	}

	dev->irq = irq;
	dev->chanA.private = &b->dev[0];
	dev->chanB.private = &b->dev[1];
	dev->chanA.dev = dev;
	dev->chanB.dev = dev;

	dev->chanA.txdma = 3;
	dev->chanA.rxdma = 1;
	if (request_dma(dev->chanA.txdma, "SeaLevel (TX)"))
		goto err_dma_tx;

	if (request_dma(dev->chanA.rxdma, "SeaLevel (RX)"))
		goto err_dma_rx;

	disable_irq(irq);

	/*
	 *	Begin normal initialise
	 */

	if (z8530_init(dev) != 0) {
		pr_err("Z8530 series device not found\n");
		enable_irq(irq);
		goto free_hw;
	}
	if (dev->type == Z85C30) {
		z8530_channel_load(&dev->chanA, z8530_hdlc_kilostream);
		z8530_channel_load(&dev->chanB, z8530_hdlc_kilostream);
	} else {
		z8530_channel_load(&dev->chanA, z8530_hdlc_kilostream_85230);
		z8530_channel_load(&dev->chanB, z8530_hdlc_kilostream_85230);
	}

	/*
	 *	Now we can take the IRQ
	 */

	enable_irq(irq);

	if (slvl_setup(&b->dev[0], iobase, irq))
		goto free_hw;
	if (slvl_setup(&b->dev[1], iobase, irq))
		goto free_netdev0;

	z8530_describe(dev, "I/O", iobase);
	dev->active = 1;
	return b;

free_netdev0:
	unregister_hdlc_device(b->dev[0].chan->netdevice);
	free_netdev(b->dev[0].chan->netdevice);
free_hw:
	free_dma(dev->chanA.rxdma);
err_dma_rx:
	free_dma(dev->chanA.txdma);
err_dma_tx:
	free_irq(irq, dev);
err_request_irq:
	kfree(b);
err_kzalloc:
	release_region(iobase, 8);
	return NULL;
}

static void __exit slvl_shutdown(struct slvl_board *b)
{
	int u;

	z8530_shutdown(&b->board);

	for (u = 0; u < 2; u++) {
		struct net_device *d = b->dev[u].chan->netdevice;
		unregister_hdlc_device(d);
		free_netdev(d);
	}

	free_irq(b->board.irq, &b->board);
	free_dma(b->board.chanA.rxdma);
	free_dma(b->board.chanA.txdma);
	/* DMA off on the card, drop DTR */
	outb(0, b->iobase);
	release_region(b->iobase, 8);
	kfree(b);
}


static int io=0x238;
static int txdma=1;
static int rxdma=3;
static int irq=5;
static bool slow=false;

module_param(io, int, 0);
MODULE_PARM_DESC(io, "The I/O base of the Sealevel card");
module_param(txdma, int, 0);
MODULE_PARM_DESC(txdma, "Transmit DMA channel");
module_param(rxdma, int, 0);
MODULE_PARM_DESC(rxdma, "Receive DMA channel");
module_param(irq, int, 0);
MODULE_PARM_DESC(irq, "The interrupt line setting for the SeaLevel card");
module_param(slow, bool, 0);
MODULE_PARM_DESC(slow, "Set this for an older Sealevel card such as the 4012");

MODULE_AUTHOR("Alan Cox");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Modular driver for the SeaLevel 4021");

static struct slvl_board *slvl_unit;

static int __init slvl_init_module(void)
{
	slvl_unit = slvl_init(io, irq, txdma, rxdma, slow);

	return slvl_unit ? 0 : -ENODEV;
}

static void __exit slvl_cleanup_module(void)
{
	if (slvl_unit)
		slvl_shutdown(slvl_unit);
}

module_init(slvl_init_module);
module_exit(slvl_cleanup_module);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Sealevel Systems 4021 driver.
	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License
	6	* as published by the Free Software Foundation; either version
	7	* 2 of the License, or (at your option) any later version.
	8	*
	9	* (c) Copyright 1999, 2001 Alan Cox
	10	* (c) Copyright 2001 Red Hat Inc.
52e8a6a2	11	* Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl>
1da177e4 LT	12	*
	13	*/
	14
23efcb73 JP	15	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23efcb73 JP	16
1da177e4 LT	17	#include <linux/module.h>
	18	#include <linux/kernel.h>
	19	#include <linux/mm.h>
	20	#include <linux/net.h>
	21	#include <linux/skbuff.h>
	22	#include <linux/netdevice.h>
	23	#include <linux/if_arp.h>
	24	#include <linux/delay.h>
52e8a6a2	25	#include <linux/hdlc.h>
1da177e4 LT	26	#include <linux/ioport.h>
1da177e4 LT	27	#include <linux/init.h>
5a0e3ad6	28	#include <linux/slab.h>
1da177e4 LT	29	#include <net/arp.h>
1da177e4 LT	30
82729971	31	#include <asm/irq.h>
1da177e4 LT	32	#include <asm/io.h>
	33	#include <asm/dma.h>
	34	#include <asm/byteorder.h>
1da177e4 LT	35	#include "z85230.h"
	36
	37
	38	struct slvl_device
	39	{
1da177e4	40	struct z8530_channel *chan;
1da177e4 LT	41	int channel;
	42	};
	43
	44
	45	struct slvl_board
	46	{
52e8a6a2	47	struct slvl_device dev[2];
1da177e4 LT	48	struct z8530_dev board;
	49	int iobase;
	50	};
	51
	52	/*
	53	* Network driver support routines
	54	*/
	55
52e8a6a2 KH	56	static inline struct slvl_device* dev_to_chan(struct net_device *dev)
	57	{
	58	return (struct slvl_device *)dev_to_hdlc(dev)->priv;
	59	}
	60
1da177e4	61	/*
52e8a6a2	62	* Frame receive. Simple for our card as we do HDLC and there
1da177e4 LT	63	* is no funny garbage involved
1da177e4 LT	64	*/
52e8a6a2	65
1da177e4 LT	66	static void sealevel_input(struct z8530_channel c, struct sk_buff skb)
	67	{
	68	/* Drop the CRC - it's not a good idea to try and negotiate it ;) */
52e8a6a2 KH	69	skb_trim(skb, skb->len - 2);
52e8a6a2 KH	70	skb->protocol = hdlc_type_trans(skb, c->netdevice);
98e399f8	71	skb_reset_mac_header(skb);
52e8a6a2	72	skb->dev = c->netdevice;
1da177e4	73	netif_rx(skb);
1da177e4	74	}
52e8a6a2	75
1da177e4 LT	76	/*
1da177e4 LT	77	* We've been placed in the UP state
52e8a6a2 KH	78	*/
52e8a6a2 KH	79
1da177e4 LT	80	static int sealevel_open(struct net_device *d)
1da177e4 LT	81	{
52e8a6a2	82	struct slvl_device *slvl = dev_to_chan(d);
1da177e4 LT	83	int err = -1;
1da177e4 LT	84	int unit = slvl->channel;
52e8a6a2	85
1da177e4	86	/*
52e8a6a2	87	* Link layer up.
1da177e4 LT	88	*/
1da177e4 LT	89
614c12a1	90	switch (unit) {
1da177e4	91	case 0:
52e8a6a2	92	err = z8530_sync_dma_open(d, slvl->chan);
1da177e4 LT	93	break;
1da177e4 LT	94	case 1:
52e8a6a2	95	err = z8530_sync_open(d, slvl->chan);
1da177e4 LT	96	break;
1da177e4 LT	97	}
52e8a6a2 KH	98
52e8a6a2 KH	99	if (err)
1da177e4	100	return err;
52e8a6a2 KH	101
	102	err = hdlc_open(d);
	103	if (err) {
	104	switch (unit) {
1da177e4 LT	105	case 0:
	106	z8530_sync_dma_close(d, slvl->chan);
	107	break;
	108	case 1:
	109	z8530_sync_close(d, slvl->chan);
	110	break;
52e8a6a2	111	}
1da177e4 LT	112	return err;
1da177e4 LT	113	}
52e8a6a2 KH	114
	115	slvl->chan->rx_function = sealevel_input;
	116
1da177e4 LT	117	/*
	118	* Go go go
	119	*/
	120	netif_start_queue(d);
	121	return 0;
	122	}
	123
	124	static int sealevel_close(struct net_device *d)
	125	{
52e8a6a2	126	struct slvl_device *slvl = dev_to_chan(d);
1da177e4	127	int unit = slvl->channel;
52e8a6a2	128
1da177e4 LT	129	/*
	130	* Discard new frames
	131	*/
1da177e4	132
52e8a6a2 KH	133	slvl->chan->rx_function = z8530_null_rx;
	134
	135	hdlc_close(d);
1da177e4	136	netif_stop_queue(d);
52e8a6a2	137
614c12a1	138	switch (unit) {
1da177e4 LT	139	case 0:
	140	z8530_sync_dma_close(d, slvl->chan);
	141	break;
	142	case 1:
	143	z8530_sync_close(d, slvl->chan);
	144	break;
	145	}
	146	return 0;
	147	}
	148
	149	static int sealevel_ioctl(struct net_device d, struct ifreq ifr, int cmd)
	150	{
52e8a6a2	151	/* struct slvl_device *slvl=dev_to_chan(d);
1da177e4	152	z8530_ioctl(d,&slvl->sync.chanA,ifr,cmd) */
52e8a6a2	153	return hdlc_ioctl(d, ifr, cmd);
1da177e4 LT	154	}
	155
	156	/*
52e8a6a2	157	* Passed network frames, fire them downwind.
1da177e4	158	*/
52e8a6a2	159
d71a6749 SH	160	static netdev_tx_t sealevel_queue_xmit(struct sk_buff *skb,
d71a6749 SH	161	struct net_device *d)
1da177e4	162	{
52e8a6a2	163	return z8530_queue_xmit(dev_to_chan(d)->chan, skb);
1da177e4 LT	164	}
1da177e4 LT	165
52e8a6a2 KH	166	static int sealevel_attach(struct net_device *dev, unsigned short encoding,
52e8a6a2 KH	167	unsigned short parity)
1da177e4	168	{
52e8a6a2 KH	169	if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT)
	170	return 0;
	171	return -EINVAL;
1da177e4 LT	172	}
1da177e4 LT	173
991990a1 KH	174	static const struct net_device_ops sealevel_ops = {
	175	.ndo_open = sealevel_open,
	176	.ndo_stop = sealevel_close,
	177	.ndo_change_mtu = hdlc_change_mtu,
	178	.ndo_start_xmit = hdlc_start_xmit,
	179	.ndo_do_ioctl = sealevel_ioctl,
	180	};
	181
52e8a6a2	182	static int slvl_setup(struct slvl_device *sv, int iobase, int irq)
1da177e4	183	{
52e8a6a2 KH	184	struct net_device *dev = alloc_hdlcdev(sv);
	185	if (!dev)
	186	return -1;
	187
	188	dev_to_hdlc(dev)->attach = sealevel_attach;
	189	dev_to_hdlc(dev)->xmit = sealevel_queue_xmit;
991990a1	190	dev->netdev_ops = &sealevel_ops;
52e8a6a2 KH	191	dev->base_addr = iobase;
	192	dev->irq = irq;
	193
	194	if (register_hdlc_device(dev)) {
23efcb73	195	pr_err("unable to register HDLC device\n");
52e8a6a2 KH	196	free_netdev(dev);
52e8a6a2 KH	197	return -1;
1da177e4	198	}
1da177e4	199
52e8a6a2	200	sv->chan->netdevice = dev;
1da177e4 LT	201	return 0;
	202	}
	203
1da177e4 LT	204
	205	/*
	206	* Allocate and setup Sealevel board.
	207	*/
52e8a6a2 KH	208
52e8a6a2 KH	209	static __init struct slvl_board *slvl_init(int iobase, int irq,
1da177e4 LT	210	int txdma, int rxdma, int slow)
	211	{
	212	struct z8530_dev *dev;
	213	struct slvl_board *b;
52e8a6a2	214
1da177e4 LT	215	/*
	216	* Get the needed I/O space
	217	*/
	218
52e8a6a2	219	if (!request_region(iobase, 8, "Sealevel 4021")) {
23efcb73	220	pr_warn("I/O 0x%X already in use\n", iobase);
1da177e4 LT	221	return NULL;
1da177e4 LT	222	}
1da177e4	223
52e8a6a2 KH	224	b = kzalloc(sizeof(struct slvl_board), GFP_KERNEL);
	225	if (!b)
	226	goto err_kzalloc;
1da177e4	227
52e8a6a2 KH	228	b->dev[0].chan = &b->board.chanA;
52e8a6a2 KH	229	b->dev[0].channel = 0;
1da177e4	230
52e8a6a2 KH	231	b->dev[1].chan = &b->board.chanB;
52e8a6a2 KH	232	b->dev[1].channel = 1;
1da177e4 LT	233
1da177e4 LT	234	dev = &b->board;
52e8a6a2	235
1da177e4 LT	236	/*
	237	* Stuff in the I/O addressing
	238	*/
52e8a6a2	239
1da177e4 LT	240	dev->active = 0;
	241
	242	b->iobase = iobase;
52e8a6a2	243
1da177e4 LT	244	/*
	245	* Select 8530 delays for the old board
	246	*/
52e8a6a2 KH	247
52e8a6a2 KH	248	if (slow)
1da177e4	249	iobase \|= Z8530_PORT_SLEEP;
52e8a6a2 KH	250
	251	dev->chanA.ctrlio = iobase + 1;
	252	dev->chanA.dataio = iobase;
	253	dev->chanB.ctrlio = iobase + 3;
	254	dev->chanB.dataio = iobase + 2;
	255
	256	dev->chanA.irqs = &z8530_nop;
	257	dev->chanB.irqs = &z8530_nop;
	258
1da177e4 LT	259	/*
	260	* Assert DTR enable DMA
	261	*/
52e8a6a2 KH	262
	263	outb(3 \| (1 << 7), b->iobase + 4);
	264
1da177e4 LT	265
	266	/* We want a fast IRQ for this device. Actually we'd like an even faster
	267	IRQ ;) - This is one driver RtLinux is made for */
52e8a6a2	268
a0607fd3	269	if (request_irq(irq, z8530_interrupt, IRQF_DISABLED,
52e8a6a2	270	"SeaLevel", dev) < 0) {
23efcb73	271	pr_warn("IRQ %d already in use\n", irq);
52e8a6a2	272	goto err_request_irq;
1da177e4	273	}
52e8a6a2 KH	274
	275	dev->irq = irq;
	276	dev->chanA.private = &b->dev[0];
	277	dev->chanB.private = &b->dev[1];
	278	dev->chanA.dev = dev;
	279	dev->chanB.dev = dev;
	280
	281	dev->chanA.txdma = 3;
	282	dev->chanA.rxdma = 1;
	283	if (request_dma(dev->chanA.txdma, "SeaLevel (TX)"))
	284	goto err_dma_tx;
	285
	286	if (request_dma(dev->chanA.rxdma, "SeaLevel (RX)"))
	287	goto err_dma_rx;
	288
1da177e4	289	disable_irq(irq);
52e8a6a2	290
1da177e4 LT	291	/*
	292	* Begin normal initialise
	293	*/
52e8a6a2 KH	294
52e8a6a2 KH	295	if (z8530_init(dev) != 0) {
23efcb73	296	pr_err("Z8530 series device not found\n");
1da177e4	297	enable_irq(irq);
52e8a6a2	298	goto free_hw;
1da177e4	299	}
52e8a6a2	300	if (dev->type == Z85C30) {
1da177e4 LT	301	z8530_channel_load(&dev->chanA, z8530_hdlc_kilostream);
1da177e4 LT	302	z8530_channel_load(&dev->chanB, z8530_hdlc_kilostream);
52e8a6a2	303	} else {
1da177e4 LT	304	z8530_channel_load(&dev->chanA, z8530_hdlc_kilostream_85230);
	305	z8530_channel_load(&dev->chanB, z8530_hdlc_kilostream_85230);
	306	}
	307
	308	/*
	309	* Now we can take the IRQ
	310	*/
52e8a6a2	311
1da177e4 LT	312	enable_irq(irq);
1da177e4 LT	313
52e8a6a2 KH	314	if (slvl_setup(&b->dev[0], iobase, irq))
	315	goto free_hw;
	316	if (slvl_setup(&b->dev[1], iobase, irq))
	317	goto free_netdev0;
1da177e4 LT	318
1da177e4 LT	319	z8530_describe(dev, "I/O", iobase);
52e8a6a2	320	dev->active = 1;
1da177e4 LT	321	return b;
1da177e4 LT	322
52e8a6a2 KH	323	free_netdev0:
	324	unregister_hdlc_device(b->dev[0].chan->netdevice);
	325	free_netdev(b->dev[0].chan->netdevice);
	326	free_hw:
1da177e4	327	free_dma(dev->chanA.rxdma);
52e8a6a2	328	err_dma_rx:
1da177e4	329	free_dma(dev->chanA.txdma);
52e8a6a2	330	err_dma_tx:
1da177e4	331	free_irq(irq, dev);
52e8a6a2	332	err_request_irq:
1da177e4	333	kfree(b);
52e8a6a2 KH	334	err_kzalloc:
52e8a6a2 KH	335	release_region(iobase, 8);
1da177e4 LT	336	return NULL;
	337	}
	338
	339	static void __exit slvl_shutdown(struct slvl_board *b)
	340	{
	341	int u;
	342
	343	z8530_shutdown(&b->board);
52e8a6a2	344
614c12a1	345	for (u = 0; u < 2; u++) {
52e8a6a2 KH	346	struct net_device *d = b->dev[u].chan->netdevice;
52e8a6a2 KH	347	unregister_hdlc_device(d);
1da177e4 LT	348	free_netdev(d);
1da177e4 LT	349	}
52e8a6a2	350
1da177e4 LT	351	free_irq(b->board.irq, &b->board);
	352	free_dma(b->board.chanA.rxdma);
	353	free_dma(b->board.chanA.txdma);
	354	/* DMA off on the card, drop DTR */
	355	outb(0, b->iobase);
	356	release_region(b->iobase, 8);
	357	kfree(b);
	358	}
	359
	360
	361	static int io=0x238;
	362	static int txdma=1;
	363	static int rxdma=3;
	364	static int irq=5;
eb939922	365	static bool slow=false;
1da177e4 LT	366
	367	module_param(io, int, 0);
	368	MODULE_PARM_DESC(io, "The I/O base of the Sealevel card");
	369	module_param(txdma, int, 0);
	370	MODULE_PARM_DESC(txdma, "Transmit DMA channel");
	371	module_param(rxdma, int, 0);
	372	MODULE_PARM_DESC(rxdma, "Receive DMA channel");
	373	module_param(irq, int, 0);
	374	MODULE_PARM_DESC(irq, "The interrupt line setting for the SeaLevel card");
	375	module_param(slow, bool, 0);
	376	MODULE_PARM_DESC(slow, "Set this for an older Sealevel card such as the 4012");
	377
	378	MODULE_AUTHOR("Alan Cox");
	379	MODULE_LICENSE("GPL");
	380	MODULE_DESCRIPTION("Modular driver for the SeaLevel 4021");
	381
	382	static struct slvl_board *slvl_unit;
	383
	384	static int __init slvl_init_module(void)
	385	{
1da177e4 LT	386	slvl_unit = slvl_init(io, irq, txdma, rxdma, slow);
	387
	388	return slvl_unit ? 0 : -ENODEV;
	389	}
	390
	391	static void __exit slvl_cleanup_module(void)
	392	{
614c12a1	393	if (slvl_unit)
1da177e4 LT	394	slvl_shutdown(slvl_unit);
	395	}
	396
	397	module_init(slvl_init_module);
	398	module_exit(slvl_cleanup_module);