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2f7ca802 SG |
1 | /*************************************************************************** |
2 | * | |
3 | * Copyright (C) 2007-2008 SMSC | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License | |
7 | * as published by the Free Software Foundation; either version 2 | |
8 | * of the License, or (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
9cb00073 | 16 | * along with this program; if not, see <http://www.gnu.org/licenses/>. |
2f7ca802 SG |
17 | * |
18 | *****************************************************************************/ | |
19 | ||
20 | #include <linux/module.h> | |
21 | #include <linux/kmod.h> | |
2f7ca802 SG |
22 | #include <linux/netdevice.h> |
23 | #include <linux/etherdevice.h> | |
24 | #include <linux/ethtool.h> | |
25 | #include <linux/mii.h> | |
26 | #include <linux/usb.h> | |
bbd9f9ee SG |
27 | #include <linux/bitrev.h> |
28 | #include <linux/crc16.h> | |
2f7ca802 SG |
29 | #include <linux/crc32.h> |
30 | #include <linux/usb/usbnet.h> | |
5a0e3ad6 | 31 | #include <linux/slab.h> |
c489565b | 32 | #include <linux/of_net.h> |
2f7ca802 SG |
33 | #include "smsc95xx.h" |
34 | ||
35 | #define SMSC_CHIPNAME "smsc95xx" | |
f7b29271 | 36 | #define SMSC_DRIVER_VERSION "1.0.4" |
2f7ca802 SG |
37 | #define HS_USB_PKT_SIZE (512) |
38 | #define FS_USB_PKT_SIZE (64) | |
39 | #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) | |
40 | #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) | |
41 | #define DEFAULT_BULK_IN_DELAY (0x00002000) | |
42 | #define MAX_SINGLE_PACKET_SIZE (2048) | |
43 | #define LAN95XX_EEPROM_MAGIC (0x9500) | |
44 | #define EEPROM_MAC_OFFSET (0x01) | |
f7b29271 | 45 | #define DEFAULT_TX_CSUM_ENABLE (true) |
2f7ca802 SG |
46 | #define DEFAULT_RX_CSUM_ENABLE (true) |
47 | #define SMSC95XX_INTERNAL_PHY_ID (1) | |
48 | #define SMSC95XX_TX_OVERHEAD (8) | |
f7b29271 | 49 | #define SMSC95XX_TX_OVERHEAD_CSUM (12) |
e5e3af83 | 50 | #define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \ |
bbd9f9ee | 51 | WAKE_MCAST | WAKE_ARP | WAKE_MAGIC) |
2f7ca802 | 52 | |
9ebca507 SG |
53 | #define FEATURE_8_WAKEUP_FILTERS (0x01) |
54 | #define FEATURE_PHY_NLP_CROSSOVER (0x02) | |
eb970ff0 | 55 | #define FEATURE_REMOTE_WAKEUP (0x04) |
9ebca507 | 56 | |
b2d4b150 SG |
57 | #define SUSPEND_SUSPEND0 (0x01) |
58 | #define SUSPEND_SUSPEND1 (0x02) | |
59 | #define SUSPEND_SUSPEND2 (0x04) | |
60 | #define SUSPEND_SUSPEND3 (0x08) | |
61 | #define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \ | |
62 | SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3) | |
63 | ||
2f7ca802 SG |
64 | struct smsc95xx_priv { |
65 | u32 mac_cr; | |
3c0f3c60 MZ |
66 | u32 hash_hi; |
67 | u32 hash_lo; | |
e0e474a8 | 68 | u32 wolopts; |
2f7ca802 | 69 | spinlock_t mac_cr_lock; |
9ebca507 | 70 | u8 features; |
b2d4b150 | 71 | u8 suspend_flags; |
2f7ca802 SG |
72 | }; |
73 | ||
eb939922 | 74 | static bool turbo_mode = true; |
2f7ca802 SG |
75 | module_param(turbo_mode, bool, 0644); |
76 | MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); | |
77 | ||
ec32115d ML |
78 | static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index, |
79 | u32 *data, int in_pm) | |
2f7ca802 | 80 | { |
72108fd2 | 81 | u32 buf; |
2f7ca802 | 82 | int ret; |
ec32115d | 83 | int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16); |
2f7ca802 SG |
84 | |
85 | BUG_ON(!dev); | |
86 | ||
ec32115d ML |
87 | if (!in_pm) |
88 | fn = usbnet_read_cmd; | |
89 | else | |
90 | fn = usbnet_read_cmd_nopm; | |
91 | ||
92 | ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN | |
93 | | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
94 | 0, index, &buf, 4); | |
5a36b68b | 95 | if (unlikely(ret < 0)) { |
1e1d7412 JP |
96 | netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n", |
97 | index, ret); | |
5a36b68b DC |
98 | return ret; |
99 | } | |
2f7ca802 | 100 | |
72108fd2 ML |
101 | le32_to_cpus(&buf); |
102 | *data = buf; | |
2f7ca802 SG |
103 | |
104 | return ret; | |
105 | } | |
106 | ||
ec32115d ML |
107 | static int __must_check __smsc95xx_write_reg(struct usbnet *dev, u32 index, |
108 | u32 data, int in_pm) | |
2f7ca802 | 109 | { |
72108fd2 | 110 | u32 buf; |
2f7ca802 | 111 | int ret; |
ec32115d | 112 | int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16); |
2f7ca802 SG |
113 | |
114 | BUG_ON(!dev); | |
115 | ||
ec32115d ML |
116 | if (!in_pm) |
117 | fn = usbnet_write_cmd; | |
118 | else | |
119 | fn = usbnet_write_cmd_nopm; | |
120 | ||
72108fd2 ML |
121 | buf = data; |
122 | cpu_to_le32s(&buf); | |
2f7ca802 | 123 | |
ec32115d ML |
124 | ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT |
125 | | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
126 | 0, index, &buf, 4); | |
2f7ca802 | 127 | if (unlikely(ret < 0)) |
1e1d7412 JP |
128 | netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n", |
129 | index, ret); | |
2f7ca802 | 130 | |
2f7ca802 SG |
131 | return ret; |
132 | } | |
133 | ||
ec32115d ML |
134 | static int __must_check smsc95xx_read_reg_nopm(struct usbnet *dev, u32 index, |
135 | u32 *data) | |
136 | { | |
137 | return __smsc95xx_read_reg(dev, index, data, 1); | |
138 | } | |
139 | ||
140 | static int __must_check smsc95xx_write_reg_nopm(struct usbnet *dev, u32 index, | |
141 | u32 data) | |
142 | { | |
143 | return __smsc95xx_write_reg(dev, index, data, 1); | |
144 | } | |
145 | ||
146 | static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index, | |
147 | u32 *data) | |
148 | { | |
149 | return __smsc95xx_read_reg(dev, index, data, 0); | |
150 | } | |
151 | ||
152 | static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index, | |
153 | u32 data) | |
154 | { | |
155 | return __smsc95xx_write_reg(dev, index, data, 0); | |
156 | } | |
e0e474a8 | 157 | |
2f7ca802 SG |
158 | /* Loop until the read is completed with timeout |
159 | * called with phy_mutex held */ | |
e5e3af83 SG |
160 | static int __must_check __smsc95xx_phy_wait_not_busy(struct usbnet *dev, |
161 | int in_pm) | |
2f7ca802 SG |
162 | { |
163 | unsigned long start_time = jiffies; | |
164 | u32 val; | |
769ea6d8 | 165 | int ret; |
2f7ca802 SG |
166 | |
167 | do { | |
e5e3af83 | 168 | ret = __smsc95xx_read_reg(dev, MII_ADDR, &val, in_pm); |
b052e073 SG |
169 | if (ret < 0) { |
170 | netdev_warn(dev->net, "Error reading MII_ACCESS\n"); | |
171 | return ret; | |
172 | } | |
173 | ||
2f7ca802 SG |
174 | if (!(val & MII_BUSY_)) |
175 | return 0; | |
176 | } while (!time_after(jiffies, start_time + HZ)); | |
177 | ||
178 | return -EIO; | |
179 | } | |
180 | ||
e5e3af83 SG |
181 | static int __smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx, |
182 | int in_pm) | |
2f7ca802 SG |
183 | { |
184 | struct usbnet *dev = netdev_priv(netdev); | |
185 | u32 val, addr; | |
769ea6d8 | 186 | int ret; |
2f7ca802 SG |
187 | |
188 | mutex_lock(&dev->phy_mutex); | |
189 | ||
190 | /* confirm MII not busy */ | |
e5e3af83 | 191 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
192 | if (ret < 0) { |
193 | netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n"); | |
194 | goto done; | |
195 | } | |
2f7ca802 SG |
196 | |
197 | /* set the address, index & direction (read from PHY) */ | |
198 | phy_id &= dev->mii.phy_id_mask; | |
199 | idx &= dev->mii.reg_num_mask; | |
80928805 | 200 | addr = (phy_id << 11) | (idx << 6) | MII_READ_ | MII_BUSY_; |
e5e3af83 | 201 | ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm); |
b052e073 SG |
202 | if (ret < 0) { |
203 | netdev_warn(dev->net, "Error writing MII_ADDR\n"); | |
204 | goto done; | |
205 | } | |
2f7ca802 | 206 | |
e5e3af83 | 207 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
208 | if (ret < 0) { |
209 | netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); | |
210 | goto done; | |
211 | } | |
2f7ca802 | 212 | |
e5e3af83 | 213 | ret = __smsc95xx_read_reg(dev, MII_DATA, &val, in_pm); |
b052e073 SG |
214 | if (ret < 0) { |
215 | netdev_warn(dev->net, "Error reading MII_DATA\n"); | |
216 | goto done; | |
217 | } | |
2f7ca802 | 218 | |
769ea6d8 | 219 | ret = (u16)(val & 0xFFFF); |
2f7ca802 | 220 | |
769ea6d8 SG |
221 | done: |
222 | mutex_unlock(&dev->phy_mutex); | |
223 | return ret; | |
2f7ca802 SG |
224 | } |
225 | ||
e5e3af83 SG |
226 | static void __smsc95xx_mdio_write(struct net_device *netdev, int phy_id, |
227 | int idx, int regval, int in_pm) | |
2f7ca802 SG |
228 | { |
229 | struct usbnet *dev = netdev_priv(netdev); | |
230 | u32 val, addr; | |
769ea6d8 | 231 | int ret; |
2f7ca802 SG |
232 | |
233 | mutex_lock(&dev->phy_mutex); | |
234 | ||
235 | /* confirm MII not busy */ | |
e5e3af83 | 236 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
237 | if (ret < 0) { |
238 | netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n"); | |
239 | goto done; | |
240 | } | |
2f7ca802 SG |
241 | |
242 | val = regval; | |
e5e3af83 | 243 | ret = __smsc95xx_write_reg(dev, MII_DATA, val, in_pm); |
b052e073 SG |
244 | if (ret < 0) { |
245 | netdev_warn(dev->net, "Error writing MII_DATA\n"); | |
246 | goto done; | |
247 | } | |
2f7ca802 SG |
248 | |
249 | /* set the address, index & direction (write to PHY) */ | |
250 | phy_id &= dev->mii.phy_id_mask; | |
251 | idx &= dev->mii.reg_num_mask; | |
80928805 | 252 | addr = (phy_id << 11) | (idx << 6) | MII_WRITE_ | MII_BUSY_; |
e5e3af83 | 253 | ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm); |
b052e073 SG |
254 | if (ret < 0) { |
255 | netdev_warn(dev->net, "Error writing MII_ADDR\n"); | |
256 | goto done; | |
257 | } | |
2f7ca802 | 258 | |
e5e3af83 | 259 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
260 | if (ret < 0) { |
261 | netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx); | |
262 | goto done; | |
263 | } | |
2f7ca802 | 264 | |
769ea6d8 | 265 | done: |
2f7ca802 SG |
266 | mutex_unlock(&dev->phy_mutex); |
267 | } | |
268 | ||
e5e3af83 SG |
269 | static int smsc95xx_mdio_read_nopm(struct net_device *netdev, int phy_id, |
270 | int idx) | |
271 | { | |
272 | return __smsc95xx_mdio_read(netdev, phy_id, idx, 1); | |
273 | } | |
274 | ||
275 | static void smsc95xx_mdio_write_nopm(struct net_device *netdev, int phy_id, | |
276 | int idx, int regval) | |
277 | { | |
278 | __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 1); | |
279 | } | |
280 | ||
281 | static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx) | |
282 | { | |
283 | return __smsc95xx_mdio_read(netdev, phy_id, idx, 0); | |
284 | } | |
285 | ||
286 | static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx, | |
287 | int regval) | |
288 | { | |
289 | __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 0); | |
290 | } | |
291 | ||
769ea6d8 | 292 | static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev) |
2f7ca802 SG |
293 | { |
294 | unsigned long start_time = jiffies; | |
295 | u32 val; | |
769ea6d8 | 296 | int ret; |
2f7ca802 SG |
297 | |
298 | do { | |
769ea6d8 | 299 | ret = smsc95xx_read_reg(dev, E2P_CMD, &val); |
b052e073 SG |
300 | if (ret < 0) { |
301 | netdev_warn(dev->net, "Error reading E2P_CMD\n"); | |
302 | return ret; | |
303 | } | |
304 | ||
2f7ca802 SG |
305 | if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_)) |
306 | break; | |
307 | udelay(40); | |
308 | } while (!time_after(jiffies, start_time + HZ)); | |
309 | ||
310 | if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) { | |
60b86755 | 311 | netdev_warn(dev->net, "EEPROM read operation timeout\n"); |
2f7ca802 SG |
312 | return -EIO; |
313 | } | |
314 | ||
315 | return 0; | |
316 | } | |
317 | ||
769ea6d8 | 318 | static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev) |
2f7ca802 SG |
319 | { |
320 | unsigned long start_time = jiffies; | |
321 | u32 val; | |
769ea6d8 | 322 | int ret; |
2f7ca802 SG |
323 | |
324 | do { | |
769ea6d8 | 325 | ret = smsc95xx_read_reg(dev, E2P_CMD, &val); |
b052e073 SG |
326 | if (ret < 0) { |
327 | netdev_warn(dev->net, "Error reading E2P_CMD\n"); | |
328 | return ret; | |
329 | } | |
2f7ca802 | 330 | |
2f7ca802 SG |
331 | if (!(val & E2P_CMD_BUSY_)) |
332 | return 0; | |
333 | ||
334 | udelay(40); | |
335 | } while (!time_after(jiffies, start_time + HZ)); | |
336 | ||
60b86755 | 337 | netdev_warn(dev->net, "EEPROM is busy\n"); |
2f7ca802 SG |
338 | return -EIO; |
339 | } | |
340 | ||
341 | static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, | |
342 | u8 *data) | |
343 | { | |
344 | u32 val; | |
345 | int i, ret; | |
346 | ||
347 | BUG_ON(!dev); | |
348 | BUG_ON(!data); | |
349 | ||
350 | ret = smsc95xx_eeprom_confirm_not_busy(dev); | |
351 | if (ret) | |
352 | return ret; | |
353 | ||
354 | for (i = 0; i < length; i++) { | |
355 | val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_); | |
769ea6d8 | 356 | ret = smsc95xx_write_reg(dev, E2P_CMD, val); |
b052e073 SG |
357 | if (ret < 0) { |
358 | netdev_warn(dev->net, "Error writing E2P_CMD\n"); | |
359 | return ret; | |
360 | } | |
2f7ca802 SG |
361 | |
362 | ret = smsc95xx_wait_eeprom(dev); | |
363 | if (ret < 0) | |
364 | return ret; | |
365 | ||
769ea6d8 | 366 | ret = smsc95xx_read_reg(dev, E2P_DATA, &val); |
b052e073 SG |
367 | if (ret < 0) { |
368 | netdev_warn(dev->net, "Error reading E2P_DATA\n"); | |
369 | return ret; | |
370 | } | |
2f7ca802 SG |
371 | |
372 | data[i] = val & 0xFF; | |
373 | offset++; | |
374 | } | |
375 | ||
376 | return 0; | |
377 | } | |
378 | ||
379 | static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, | |
380 | u8 *data) | |
381 | { | |
382 | u32 val; | |
383 | int i, ret; | |
384 | ||
385 | BUG_ON(!dev); | |
386 | BUG_ON(!data); | |
387 | ||
388 | ret = smsc95xx_eeprom_confirm_not_busy(dev); | |
389 | if (ret) | |
390 | return ret; | |
391 | ||
392 | /* Issue write/erase enable command */ | |
393 | val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_; | |
769ea6d8 | 394 | ret = smsc95xx_write_reg(dev, E2P_CMD, val); |
b052e073 SG |
395 | if (ret < 0) { |
396 | netdev_warn(dev->net, "Error writing E2P_DATA\n"); | |
397 | return ret; | |
398 | } | |
2f7ca802 SG |
399 | |
400 | ret = smsc95xx_wait_eeprom(dev); | |
401 | if (ret < 0) | |
402 | return ret; | |
403 | ||
404 | for (i = 0; i < length; i++) { | |
405 | ||
406 | /* Fill data register */ | |
407 | val = data[i]; | |
769ea6d8 | 408 | ret = smsc95xx_write_reg(dev, E2P_DATA, val); |
b052e073 SG |
409 | if (ret < 0) { |
410 | netdev_warn(dev->net, "Error writing E2P_DATA\n"); | |
411 | return ret; | |
412 | } | |
2f7ca802 SG |
413 | |
414 | /* Send "write" command */ | |
415 | val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_); | |
769ea6d8 | 416 | ret = smsc95xx_write_reg(dev, E2P_CMD, val); |
b052e073 SG |
417 | if (ret < 0) { |
418 | netdev_warn(dev->net, "Error writing E2P_CMD\n"); | |
419 | return ret; | |
420 | } | |
2f7ca802 SG |
421 | |
422 | ret = smsc95xx_wait_eeprom(dev); | |
423 | if (ret < 0) | |
424 | return ret; | |
425 | ||
426 | offset++; | |
427 | } | |
428 | ||
429 | return 0; | |
430 | } | |
431 | ||
769ea6d8 | 432 | static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index, |
7b9e7580 | 433 | u32 data) |
2f7ca802 | 434 | { |
1d74a6bd | 435 | const u16 size = 4; |
7b9e7580 | 436 | u32 buf; |
72108fd2 | 437 | int ret; |
2f7ca802 | 438 | |
7b9e7580 SG |
439 | buf = data; |
440 | cpu_to_le32s(&buf); | |
441 | ||
72108fd2 ML |
442 | ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, |
443 | USB_DIR_OUT | USB_TYPE_VENDOR | | |
444 | USB_RECIP_DEVICE, | |
7b9e7580 | 445 | 0, index, &buf, size); |
72108fd2 ML |
446 | if (ret < 0) |
447 | netdev_warn(dev->net, "Error write async cmd, sts=%d\n", | |
448 | ret); | |
449 | return ret; | |
2f7ca802 SG |
450 | } |
451 | ||
452 | /* returns hash bit number for given MAC address | |
453 | * example: | |
454 | * 01 00 5E 00 00 01 -> returns bit number 31 */ | |
455 | static unsigned int smsc95xx_hash(char addr[ETH_ALEN]) | |
456 | { | |
457 | return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; | |
458 | } | |
459 | ||
460 | static void smsc95xx_set_multicast(struct net_device *netdev) | |
461 | { | |
462 | struct usbnet *dev = netdev_priv(netdev); | |
463 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
2f7ca802 | 464 | unsigned long flags; |
769ea6d8 | 465 | int ret; |
2f7ca802 | 466 | |
3c0f3c60 MZ |
467 | pdata->hash_hi = 0; |
468 | pdata->hash_lo = 0; | |
469 | ||
2f7ca802 SG |
470 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); |
471 | ||
472 | if (dev->net->flags & IFF_PROMISC) { | |
a475f603 | 473 | netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n"); |
2f7ca802 SG |
474 | pdata->mac_cr |= MAC_CR_PRMS_; |
475 | pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_); | |
476 | } else if (dev->net->flags & IFF_ALLMULTI) { | |
a475f603 | 477 | netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n"); |
2f7ca802 SG |
478 | pdata->mac_cr |= MAC_CR_MCPAS_; |
479 | pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_); | |
4cd24eaf | 480 | } else if (!netdev_mc_empty(dev->net)) { |
22bedad3 | 481 | struct netdev_hw_addr *ha; |
2f7ca802 SG |
482 | |
483 | pdata->mac_cr |= MAC_CR_HPFILT_; | |
484 | pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); | |
485 | ||
22bedad3 JP |
486 | netdev_for_each_mc_addr(ha, netdev) { |
487 | u32 bitnum = smsc95xx_hash(ha->addr); | |
a92635dc JP |
488 | u32 mask = 0x01 << (bitnum & 0x1F); |
489 | if (bitnum & 0x20) | |
3c0f3c60 | 490 | pdata->hash_hi |= mask; |
a92635dc | 491 | else |
3c0f3c60 | 492 | pdata->hash_lo |= mask; |
2f7ca802 SG |
493 | } |
494 | ||
a475f603 | 495 | netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n", |
3c0f3c60 | 496 | pdata->hash_hi, pdata->hash_lo); |
2f7ca802 | 497 | } else { |
a475f603 | 498 | netif_dbg(dev, drv, dev->net, "receive own packets only\n"); |
2f7ca802 SG |
499 | pdata->mac_cr &= |
500 | ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); | |
501 | } | |
502 | ||
503 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
504 | ||
505 | /* Initiate async writes, as we can't wait for completion here */ | |
7b9e7580 | 506 | ret = smsc95xx_write_reg_async(dev, HASHH, pdata->hash_hi); |
b052e073 SG |
507 | if (ret < 0) |
508 | netdev_warn(dev->net, "failed to initiate async write to HASHH\n"); | |
769ea6d8 | 509 | |
7b9e7580 | 510 | ret = smsc95xx_write_reg_async(dev, HASHL, pdata->hash_lo); |
b052e073 SG |
511 | if (ret < 0) |
512 | netdev_warn(dev->net, "failed to initiate async write to HASHL\n"); | |
769ea6d8 | 513 | |
7b9e7580 | 514 | ret = smsc95xx_write_reg_async(dev, MAC_CR, pdata->mac_cr); |
b052e073 SG |
515 | if (ret < 0) |
516 | netdev_warn(dev->net, "failed to initiate async write to MAC_CR\n"); | |
2f7ca802 SG |
517 | } |
518 | ||
769ea6d8 SG |
519 | static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex, |
520 | u16 lcladv, u16 rmtadv) | |
2f7ca802 SG |
521 | { |
522 | u32 flow, afc_cfg = 0; | |
523 | ||
524 | int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg); | |
e360a8b4 | 525 | if (ret < 0) |
b052e073 | 526 | return ret; |
2f7ca802 SG |
527 | |
528 | if (duplex == DUPLEX_FULL) { | |
bc02ff95 | 529 | u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); |
2f7ca802 SG |
530 | |
531 | if (cap & FLOW_CTRL_RX) | |
532 | flow = 0xFFFF0002; | |
533 | else | |
534 | flow = 0; | |
535 | ||
536 | if (cap & FLOW_CTRL_TX) | |
537 | afc_cfg |= 0xF; | |
538 | else | |
539 | afc_cfg &= ~0xF; | |
540 | ||
a475f603 | 541 | netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n", |
60b86755 JP |
542 | cap & FLOW_CTRL_RX ? "enabled" : "disabled", |
543 | cap & FLOW_CTRL_TX ? "enabled" : "disabled"); | |
2f7ca802 | 544 | } else { |
a475f603 | 545 | netif_dbg(dev, link, dev->net, "half duplex\n"); |
2f7ca802 SG |
546 | flow = 0; |
547 | afc_cfg |= 0xF; | |
548 | } | |
549 | ||
769ea6d8 | 550 | ret = smsc95xx_write_reg(dev, FLOW, flow); |
b052e073 | 551 | if (ret < 0) |
e360a8b4 | 552 | return ret; |
769ea6d8 | 553 | |
e360a8b4 | 554 | return smsc95xx_write_reg(dev, AFC_CFG, afc_cfg); |
2f7ca802 SG |
555 | } |
556 | ||
557 | static int smsc95xx_link_reset(struct usbnet *dev) | |
558 | { | |
559 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
560 | struct mii_if_info *mii = &dev->mii; | |
8ae6daca | 561 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
2f7ca802 SG |
562 | unsigned long flags; |
563 | u16 lcladv, rmtadv; | |
769ea6d8 | 564 | int ret; |
2f7ca802 SG |
565 | |
566 | /* clear interrupt status */ | |
769ea6d8 | 567 | ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC); |
e360a8b4 | 568 | if (ret < 0) |
b052e073 | 569 | return ret; |
769ea6d8 SG |
570 | |
571 | ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); | |
e360a8b4 | 572 | if (ret < 0) |
b052e073 | 573 | return ret; |
2f7ca802 SG |
574 | |
575 | mii_check_media(mii, 1, 1); | |
576 | mii_ethtool_gset(&dev->mii, &ecmd); | |
577 | lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); | |
578 | rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA); | |
579 | ||
8ae6daca DD |
580 | netif_dbg(dev, link, dev->net, |
581 | "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n", | |
582 | ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv); | |
2f7ca802 SG |
583 | |
584 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); | |
585 | if (ecmd.duplex != DUPLEX_FULL) { | |
586 | pdata->mac_cr &= ~MAC_CR_FDPX_; | |
587 | pdata->mac_cr |= MAC_CR_RCVOWN_; | |
588 | } else { | |
589 | pdata->mac_cr &= ~MAC_CR_RCVOWN_; | |
590 | pdata->mac_cr |= MAC_CR_FDPX_; | |
591 | } | |
592 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
593 | ||
769ea6d8 | 594 | ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); |
e360a8b4 | 595 | if (ret < 0) |
b052e073 | 596 | return ret; |
2f7ca802 | 597 | |
769ea6d8 | 598 | ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); |
b052e073 SG |
599 | if (ret < 0) |
600 | netdev_warn(dev->net, "Error updating PHY flow control\n"); | |
2f7ca802 | 601 | |
b052e073 | 602 | return ret; |
2f7ca802 SG |
603 | } |
604 | ||
605 | static void smsc95xx_status(struct usbnet *dev, struct urb *urb) | |
606 | { | |
607 | u32 intdata; | |
608 | ||
609 | if (urb->actual_length != 4) { | |
60b86755 JP |
610 | netdev_warn(dev->net, "unexpected urb length %d\n", |
611 | urb->actual_length); | |
2f7ca802 SG |
612 | return; |
613 | } | |
614 | ||
615 | memcpy(&intdata, urb->transfer_buffer, 4); | |
1d74a6bd | 616 | le32_to_cpus(&intdata); |
2f7ca802 | 617 | |
a475f603 | 618 | netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata); |
2f7ca802 SG |
619 | |
620 | if (intdata & INT_ENP_PHY_INT_) | |
621 | usbnet_defer_kevent(dev, EVENT_LINK_RESET); | |
622 | else | |
60b86755 JP |
623 | netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n", |
624 | intdata); | |
2f7ca802 SG |
625 | } |
626 | ||
f7b29271 | 627 | /* Enable or disable Tx & Rx checksum offload engines */ |
c8f44aff MM |
628 | static int smsc95xx_set_features(struct net_device *netdev, |
629 | netdev_features_t features) | |
2f7ca802 | 630 | { |
78e47fe4 | 631 | struct usbnet *dev = netdev_priv(netdev); |
2f7ca802 | 632 | u32 read_buf; |
78e47fe4 MM |
633 | int ret; |
634 | ||
635 | ret = smsc95xx_read_reg(dev, COE_CR, &read_buf); | |
e360a8b4 | 636 | if (ret < 0) |
b052e073 | 637 | return ret; |
2f7ca802 | 638 | |
78e47fe4 | 639 | if (features & NETIF_F_HW_CSUM) |
f7b29271 SG |
640 | read_buf |= Tx_COE_EN_; |
641 | else | |
642 | read_buf &= ~Tx_COE_EN_; | |
643 | ||
78e47fe4 | 644 | if (features & NETIF_F_RXCSUM) |
2f7ca802 SG |
645 | read_buf |= Rx_COE_EN_; |
646 | else | |
647 | read_buf &= ~Rx_COE_EN_; | |
648 | ||
649 | ret = smsc95xx_write_reg(dev, COE_CR, read_buf); | |
e360a8b4 | 650 | if (ret < 0) |
b052e073 | 651 | return ret; |
2f7ca802 | 652 | |
a475f603 | 653 | netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf); |
2f7ca802 SG |
654 | return 0; |
655 | } | |
656 | ||
657 | static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net) | |
658 | { | |
659 | return MAX_EEPROM_SIZE; | |
660 | } | |
661 | ||
662 | static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev, | |
663 | struct ethtool_eeprom *ee, u8 *data) | |
664 | { | |
665 | struct usbnet *dev = netdev_priv(netdev); | |
666 | ||
667 | ee->magic = LAN95XX_EEPROM_MAGIC; | |
668 | ||
669 | return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data); | |
670 | } | |
671 | ||
672 | static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev, | |
673 | struct ethtool_eeprom *ee, u8 *data) | |
674 | { | |
675 | struct usbnet *dev = netdev_priv(netdev); | |
676 | ||
677 | if (ee->magic != LAN95XX_EEPROM_MAGIC) { | |
60b86755 JP |
678 | netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n", |
679 | ee->magic); | |
2f7ca802 SG |
680 | return -EINVAL; |
681 | } | |
682 | ||
683 | return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data); | |
684 | } | |
685 | ||
9fa32e94 EV |
686 | static int smsc95xx_ethtool_getregslen(struct net_device *netdev) |
687 | { | |
688 | /* all smsc95xx registers */ | |
96245317 | 689 | return COE_CR - ID_REV + sizeof(u32); |
9fa32e94 EV |
690 | } |
691 | ||
692 | static void | |
693 | smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs, | |
694 | void *buf) | |
695 | { | |
696 | struct usbnet *dev = netdev_priv(netdev); | |
d348446b DC |
697 | unsigned int i, j; |
698 | int retval; | |
9fa32e94 EV |
699 | u32 *data = buf; |
700 | ||
701 | retval = smsc95xx_read_reg(dev, ID_REV, ®s->version); | |
702 | if (retval < 0) { | |
703 | netdev_warn(netdev, "REGS: cannot read ID_REV\n"); | |
704 | return; | |
705 | } | |
706 | ||
707 | for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) { | |
708 | retval = smsc95xx_read_reg(dev, i, &data[j]); | |
709 | if (retval < 0) { | |
710 | netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i); | |
711 | return; | |
712 | } | |
713 | } | |
714 | } | |
715 | ||
e0e474a8 SG |
716 | static void smsc95xx_ethtool_get_wol(struct net_device *net, |
717 | struct ethtool_wolinfo *wolinfo) | |
718 | { | |
719 | struct usbnet *dev = netdev_priv(net); | |
720 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
721 | ||
722 | wolinfo->supported = SUPPORTED_WAKE; | |
723 | wolinfo->wolopts = pdata->wolopts; | |
724 | } | |
725 | ||
726 | static int smsc95xx_ethtool_set_wol(struct net_device *net, | |
727 | struct ethtool_wolinfo *wolinfo) | |
728 | { | |
729 | struct usbnet *dev = netdev_priv(net); | |
730 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
3b14692c | 731 | int ret; |
e0e474a8 SG |
732 | |
733 | pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE; | |
3b14692c SG |
734 | |
735 | ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts); | |
b052e073 SG |
736 | if (ret < 0) |
737 | netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret); | |
3b14692c | 738 | |
b052e073 | 739 | return ret; |
e0e474a8 SG |
740 | } |
741 | ||
0fc0b732 | 742 | static const struct ethtool_ops smsc95xx_ethtool_ops = { |
2f7ca802 SG |
743 | .get_link = usbnet_get_link, |
744 | .nway_reset = usbnet_nway_reset, | |
745 | .get_drvinfo = usbnet_get_drvinfo, | |
746 | .get_msglevel = usbnet_get_msglevel, | |
747 | .set_msglevel = usbnet_set_msglevel, | |
748 | .get_settings = usbnet_get_settings, | |
749 | .set_settings = usbnet_set_settings, | |
750 | .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len, | |
751 | .get_eeprom = smsc95xx_ethtool_get_eeprom, | |
752 | .set_eeprom = smsc95xx_ethtool_set_eeprom, | |
9fa32e94 EV |
753 | .get_regs_len = smsc95xx_ethtool_getregslen, |
754 | .get_regs = smsc95xx_ethtool_getregs, | |
e0e474a8 SG |
755 | .get_wol = smsc95xx_ethtool_get_wol, |
756 | .set_wol = smsc95xx_ethtool_set_wol, | |
2f7ca802 SG |
757 | }; |
758 | ||
759 | static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) | |
760 | { | |
761 | struct usbnet *dev = netdev_priv(netdev); | |
762 | ||
763 | if (!netif_running(netdev)) | |
764 | return -EINVAL; | |
765 | ||
766 | return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); | |
767 | } | |
768 | ||
769 | static void smsc95xx_init_mac_address(struct usbnet *dev) | |
770 | { | |
c489565b AB |
771 | const u8 *mac_addr; |
772 | ||
773 | /* maybe the boot loader passed the MAC address in devicetree */ | |
774 | mac_addr = of_get_mac_address(dev->udev->dev.of_node); | |
775 | if (mac_addr) { | |
776 | memcpy(dev->net->dev_addr, mac_addr, ETH_ALEN); | |
777 | return; | |
778 | } | |
779 | ||
2f7ca802 SG |
780 | /* try reading mac address from EEPROM */ |
781 | if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, | |
782 | dev->net->dev_addr) == 0) { | |
783 | if (is_valid_ether_addr(dev->net->dev_addr)) { | |
784 | /* eeprom values are valid so use them */ | |
a475f603 | 785 | netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n"); |
2f7ca802 SG |
786 | return; |
787 | } | |
788 | } | |
789 | ||
c489565b | 790 | /* no useful static MAC address found. generate a random one */ |
f2cedb63 | 791 | eth_hw_addr_random(dev->net); |
c7e12ead | 792 | netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n"); |
2f7ca802 SG |
793 | } |
794 | ||
795 | static int smsc95xx_set_mac_address(struct usbnet *dev) | |
796 | { | |
797 | u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | | |
798 | dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; | |
799 | u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; | |
800 | int ret; | |
801 | ||
802 | ret = smsc95xx_write_reg(dev, ADDRL, addr_lo); | |
b052e073 | 803 | if (ret < 0) |
e360a8b4 | 804 | return ret; |
2f7ca802 | 805 | |
e360a8b4 | 806 | return smsc95xx_write_reg(dev, ADDRH, addr_hi); |
2f7ca802 SG |
807 | } |
808 | ||
809 | /* starts the TX path */ | |
769ea6d8 | 810 | static int smsc95xx_start_tx_path(struct usbnet *dev) |
2f7ca802 SG |
811 | { |
812 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
813 | unsigned long flags; | |
769ea6d8 | 814 | int ret; |
2f7ca802 SG |
815 | |
816 | /* Enable Tx at MAC */ | |
817 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); | |
818 | pdata->mac_cr |= MAC_CR_TXEN_; | |
819 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
820 | ||
769ea6d8 | 821 | ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); |
e360a8b4 | 822 | if (ret < 0) |
b052e073 | 823 | return ret; |
2f7ca802 SG |
824 | |
825 | /* Enable Tx at SCSRs */ | |
e360a8b4 | 826 | return smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_); |
2f7ca802 SG |
827 | } |
828 | ||
829 | /* Starts the Receive path */ | |
ec32115d | 830 | static int smsc95xx_start_rx_path(struct usbnet *dev, int in_pm) |
2f7ca802 SG |
831 | { |
832 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
833 | unsigned long flags; | |
834 | ||
835 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); | |
836 | pdata->mac_cr |= MAC_CR_RXEN_; | |
837 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
838 | ||
e360a8b4 | 839 | return __smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr, in_pm); |
2f7ca802 SG |
840 | } |
841 | ||
842 | static int smsc95xx_phy_initialize(struct usbnet *dev) | |
843 | { | |
769ea6d8 | 844 | int bmcr, ret, timeout = 0; |
db443c44 | 845 | |
2f7ca802 SG |
846 | /* Initialize MII structure */ |
847 | dev->mii.dev = dev->net; | |
848 | dev->mii.mdio_read = smsc95xx_mdio_read; | |
849 | dev->mii.mdio_write = smsc95xx_mdio_write; | |
850 | dev->mii.phy_id_mask = 0x1f; | |
851 | dev->mii.reg_num_mask = 0x1f; | |
852 | dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID; | |
853 | ||
db443c44 | 854 | /* reset phy and wait for reset to complete */ |
2f7ca802 | 855 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); |
db443c44 SG |
856 | |
857 | do { | |
858 | msleep(10); | |
859 | bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); | |
860 | timeout++; | |
d9460920 | 861 | } while ((bmcr & BMCR_RESET) && (timeout < 100)); |
db443c44 SG |
862 | |
863 | if (timeout >= 100) { | |
864 | netdev_warn(dev->net, "timeout on PHY Reset"); | |
865 | return -EIO; | |
866 | } | |
867 | ||
2f7ca802 SG |
868 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, |
869 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | | |
870 | ADVERTISE_PAUSE_ASYM); | |
871 | ||
872 | /* read to clear */ | |
769ea6d8 | 873 | ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); |
b052e073 SG |
874 | if (ret < 0) { |
875 | netdev_warn(dev->net, "Failed to read PHY_INT_SRC during init\n"); | |
876 | return ret; | |
877 | } | |
2f7ca802 SG |
878 | |
879 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, | |
880 | PHY_INT_MASK_DEFAULT_); | |
881 | mii_nway_restart(&dev->mii); | |
882 | ||
a475f603 | 883 | netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n"); |
2f7ca802 SG |
884 | return 0; |
885 | } | |
886 | ||
887 | static int smsc95xx_reset(struct usbnet *dev) | |
888 | { | |
889 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
890 | u32 read_buf, write_buf, burst_cap; | |
891 | int ret = 0, timeout; | |
2f7ca802 | 892 | |
a475f603 | 893 | netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n"); |
2f7ca802 | 894 | |
4436761b | 895 | ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_); |
e360a8b4 | 896 | if (ret < 0) |
b052e073 | 897 | return ret; |
2f7ca802 SG |
898 | |
899 | timeout = 0; | |
900 | do { | |
cf2acec2 | 901 | msleep(10); |
2f7ca802 | 902 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); |
e360a8b4 | 903 | if (ret < 0) |
b052e073 | 904 | return ret; |
2f7ca802 SG |
905 | timeout++; |
906 | } while ((read_buf & HW_CFG_LRST_) && (timeout < 100)); | |
907 | ||
908 | if (timeout >= 100) { | |
60b86755 | 909 | netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n"); |
2f7ca802 SG |
910 | return ret; |
911 | } | |
912 | ||
4436761b | 913 | ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_); |
e360a8b4 | 914 | if (ret < 0) |
b052e073 | 915 | return ret; |
2f7ca802 SG |
916 | |
917 | timeout = 0; | |
918 | do { | |
cf2acec2 | 919 | msleep(10); |
2f7ca802 | 920 | ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf); |
e360a8b4 | 921 | if (ret < 0) |
b052e073 | 922 | return ret; |
2f7ca802 SG |
923 | timeout++; |
924 | } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100)); | |
925 | ||
926 | if (timeout >= 100) { | |
60b86755 | 927 | netdev_warn(dev->net, "timeout waiting for PHY Reset\n"); |
2f7ca802 SG |
928 | return ret; |
929 | } | |
930 | ||
2f7ca802 SG |
931 | ret = smsc95xx_set_mac_address(dev); |
932 | if (ret < 0) | |
933 | return ret; | |
934 | ||
1e1d7412 JP |
935 | netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n", |
936 | dev->net->dev_addr); | |
2f7ca802 SG |
937 | |
938 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 939 | if (ret < 0) |
b052e073 | 940 | return ret; |
2f7ca802 | 941 | |
1e1d7412 JP |
942 | netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n", |
943 | read_buf); | |
2f7ca802 SG |
944 | |
945 | read_buf |= HW_CFG_BIR_; | |
946 | ||
947 | ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); | |
e360a8b4 | 948 | if (ret < 0) |
b052e073 | 949 | return ret; |
2f7ca802 SG |
950 | |
951 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 952 | if (ret < 0) |
b052e073 | 953 | return ret; |
b052e073 | 954 | |
a475f603 JP |
955 | netif_dbg(dev, ifup, dev->net, |
956 | "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n", | |
957 | read_buf); | |
2f7ca802 SG |
958 | |
959 | if (!turbo_mode) { | |
960 | burst_cap = 0; | |
961 | dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; | |
962 | } else if (dev->udev->speed == USB_SPEED_HIGH) { | |
963 | burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; | |
964 | dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; | |
965 | } else { | |
966 | burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; | |
967 | dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; | |
968 | } | |
969 | ||
1e1d7412 JP |
970 | netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n", |
971 | (ulong)dev->rx_urb_size); | |
2f7ca802 SG |
972 | |
973 | ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap); | |
e360a8b4 | 974 | if (ret < 0) |
b052e073 | 975 | return ret; |
2f7ca802 SG |
976 | |
977 | ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf); | |
e360a8b4 | 978 | if (ret < 0) |
b052e073 | 979 | return ret; |
769ea6d8 | 980 | |
a475f603 JP |
981 | netif_dbg(dev, ifup, dev->net, |
982 | "Read Value from BURST_CAP after writing: 0x%08x\n", | |
983 | read_buf); | |
2f7ca802 | 984 | |
4436761b | 985 | ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); |
e360a8b4 | 986 | if (ret < 0) |
b052e073 | 987 | return ret; |
2f7ca802 SG |
988 | |
989 | ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf); | |
e360a8b4 | 990 | if (ret < 0) |
b052e073 | 991 | return ret; |
769ea6d8 | 992 | |
a475f603 JP |
993 | netif_dbg(dev, ifup, dev->net, |
994 | "Read Value from BULK_IN_DLY after writing: 0x%08x\n", | |
995 | read_buf); | |
2f7ca802 SG |
996 | |
997 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 998 | if (ret < 0) |
b052e073 | 999 | return ret; |
769ea6d8 | 1000 | |
1e1d7412 JP |
1001 | netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG: 0x%08x\n", |
1002 | read_buf); | |
2f7ca802 SG |
1003 | |
1004 | if (turbo_mode) | |
1005 | read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_); | |
1006 | ||
1007 | read_buf &= ~HW_CFG_RXDOFF_; | |
1008 | ||
1009 | /* set Rx data offset=2, Make IP header aligns on word boundary. */ | |
1010 | read_buf |= NET_IP_ALIGN << 9; | |
1011 | ||
1012 | ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); | |
e360a8b4 | 1013 | if (ret < 0) |
b052e073 | 1014 | return ret; |
2f7ca802 SG |
1015 | |
1016 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 1017 | if (ret < 0) |
b052e073 | 1018 | return ret; |
769ea6d8 | 1019 | |
a475f603 JP |
1020 | netif_dbg(dev, ifup, dev->net, |
1021 | "Read Value from HW_CFG after writing: 0x%08x\n", read_buf); | |
2f7ca802 | 1022 | |
4436761b | 1023 | ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); |
e360a8b4 | 1024 | if (ret < 0) |
b052e073 | 1025 | return ret; |
2f7ca802 SG |
1026 | |
1027 | ret = smsc95xx_read_reg(dev, ID_REV, &read_buf); | |
e360a8b4 | 1028 | if (ret < 0) |
b052e073 | 1029 | return ret; |
a475f603 | 1030 | netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf); |
2f7ca802 | 1031 | |
f293501c SG |
1032 | /* Configure GPIO pins as LED outputs */ |
1033 | write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED | | |
1034 | LED_GPIO_CFG_FDX_LED; | |
1035 | ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf); | |
e360a8b4 | 1036 | if (ret < 0) |
b052e073 | 1037 | return ret; |
f293501c | 1038 | |
2f7ca802 | 1039 | /* Init Tx */ |
4436761b | 1040 | ret = smsc95xx_write_reg(dev, FLOW, 0); |
e360a8b4 | 1041 | if (ret < 0) |
b052e073 | 1042 | return ret; |
2f7ca802 | 1043 | |
4436761b | 1044 | ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT); |
e360a8b4 | 1045 | if (ret < 0) |
b052e073 | 1046 | return ret; |
2f7ca802 SG |
1047 | |
1048 | /* Don't need mac_cr_lock during initialisation */ | |
1049 | ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr); | |
e360a8b4 | 1050 | if (ret < 0) |
b052e073 | 1051 | return ret; |
2f7ca802 SG |
1052 | |
1053 | /* Init Rx */ | |
1054 | /* Set Vlan */ | |
4436761b | 1055 | ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q); |
e360a8b4 | 1056 | if (ret < 0) |
b052e073 | 1057 | return ret; |
2f7ca802 | 1058 | |
f7b29271 | 1059 | /* Enable or disable checksum offload engines */ |
769ea6d8 | 1060 | ret = smsc95xx_set_features(dev->net, dev->net->features); |
b052e073 SG |
1061 | if (ret < 0) { |
1062 | netdev_warn(dev->net, "Failed to set checksum offload features\n"); | |
1063 | return ret; | |
1064 | } | |
2f7ca802 SG |
1065 | |
1066 | smsc95xx_set_multicast(dev->net); | |
1067 | ||
769ea6d8 | 1068 | ret = smsc95xx_phy_initialize(dev); |
b052e073 SG |
1069 | if (ret < 0) { |
1070 | netdev_warn(dev->net, "Failed to init PHY\n"); | |
1071 | return ret; | |
1072 | } | |
2f7ca802 SG |
1073 | |
1074 | ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf); | |
e360a8b4 | 1075 | if (ret < 0) |
b052e073 | 1076 | return ret; |
2f7ca802 SG |
1077 | |
1078 | /* enable PHY interrupts */ | |
1079 | read_buf |= INT_EP_CTL_PHY_INT_; | |
1080 | ||
1081 | ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf); | |
e360a8b4 | 1082 | if (ret < 0) |
b052e073 | 1083 | return ret; |
2f7ca802 | 1084 | |
769ea6d8 | 1085 | ret = smsc95xx_start_tx_path(dev); |
b052e073 SG |
1086 | if (ret < 0) { |
1087 | netdev_warn(dev->net, "Failed to start TX path\n"); | |
1088 | return ret; | |
1089 | } | |
769ea6d8 | 1090 | |
ec32115d | 1091 | ret = smsc95xx_start_rx_path(dev, 0); |
b052e073 SG |
1092 | if (ret < 0) { |
1093 | netdev_warn(dev->net, "Failed to start RX path\n"); | |
1094 | return ret; | |
1095 | } | |
2f7ca802 | 1096 | |
a475f603 | 1097 | netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n"); |
2f7ca802 SG |
1098 | return 0; |
1099 | } | |
1100 | ||
63e77b39 SH |
1101 | static const struct net_device_ops smsc95xx_netdev_ops = { |
1102 | .ndo_open = usbnet_open, | |
1103 | .ndo_stop = usbnet_stop, | |
1104 | .ndo_start_xmit = usbnet_start_xmit, | |
1105 | .ndo_tx_timeout = usbnet_tx_timeout, | |
1106 | .ndo_change_mtu = usbnet_change_mtu, | |
1107 | .ndo_set_mac_address = eth_mac_addr, | |
1108 | .ndo_validate_addr = eth_validate_addr, | |
1109 | .ndo_do_ioctl = smsc95xx_ioctl, | |
afc4b13d | 1110 | .ndo_set_rx_mode = smsc95xx_set_multicast, |
78e47fe4 | 1111 | .ndo_set_features = smsc95xx_set_features, |
63e77b39 SH |
1112 | }; |
1113 | ||
2f7ca802 SG |
1114 | static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf) |
1115 | { | |
1116 | struct smsc95xx_priv *pdata = NULL; | |
bbd9f9ee | 1117 | u32 val; |
2f7ca802 SG |
1118 | int ret; |
1119 | ||
1120 | printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); | |
1121 | ||
1122 | ret = usbnet_get_endpoints(dev, intf); | |
b052e073 SG |
1123 | if (ret < 0) { |
1124 | netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret); | |
1125 | return ret; | |
1126 | } | |
2f7ca802 SG |
1127 | |
1128 | dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv), | |
38673c82 | 1129 | GFP_KERNEL); |
2f7ca802 SG |
1130 | |
1131 | pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
38673c82 | 1132 | if (!pdata) |
2f7ca802 | 1133 | return -ENOMEM; |
2f7ca802 SG |
1134 | |
1135 | spin_lock_init(&pdata->mac_cr_lock); | |
1136 | ||
78e47fe4 MM |
1137 | if (DEFAULT_TX_CSUM_ENABLE) |
1138 | dev->net->features |= NETIF_F_HW_CSUM; | |
1139 | if (DEFAULT_RX_CSUM_ENABLE) | |
1140 | dev->net->features |= NETIF_F_RXCSUM; | |
1141 | ||
1142 | dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM; | |
2f7ca802 | 1143 | |
f4e8ab7c BB |
1144 | smsc95xx_init_mac_address(dev); |
1145 | ||
2f7ca802 SG |
1146 | /* Init all registers */ |
1147 | ret = smsc95xx_reset(dev); | |
1148 | ||
bbd9f9ee SG |
1149 | /* detect device revision as different features may be available */ |
1150 | ret = smsc95xx_read_reg(dev, ID_REV, &val); | |
e360a8b4 | 1151 | if (ret < 0) |
b052e073 | 1152 | return ret; |
bbd9f9ee | 1153 | val >>= 16; |
9ebca507 SG |
1154 | |
1155 | if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9530_) || | |
1156 | (val == ID_REV_CHIP_ID_89530_) || (val == ID_REV_CHIP_ID_9730_)) | |
1157 | pdata->features = (FEATURE_8_WAKEUP_FILTERS | | |
1158 | FEATURE_PHY_NLP_CROSSOVER | | |
eb970ff0 | 1159 | FEATURE_REMOTE_WAKEUP); |
9ebca507 SG |
1160 | else if (val == ID_REV_CHIP_ID_9512_) |
1161 | pdata->features = FEATURE_8_WAKEUP_FILTERS; | |
bbd9f9ee | 1162 | |
63e77b39 | 1163 | dev->net->netdev_ops = &smsc95xx_netdev_ops; |
2f7ca802 | 1164 | dev->net->ethtool_ops = &smsc95xx_ethtool_ops; |
2f7ca802 | 1165 | dev->net->flags |= IFF_MULTICAST; |
78e47fe4 | 1166 | dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM; |
9bbf5660 | 1167 | dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; |
2f7ca802 SG |
1168 | return 0; |
1169 | } | |
1170 | ||
1171 | static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf) | |
1172 | { | |
1173 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1174 | if (pdata) { | |
a475f603 | 1175 | netif_dbg(dev, ifdown, dev->net, "free pdata\n"); |
2f7ca802 SG |
1176 | kfree(pdata); |
1177 | pdata = NULL; | |
1178 | dev->data[0] = 0; | |
1179 | } | |
1180 | } | |
1181 | ||
068bb1a7 | 1182 | static u32 smsc_crc(const u8 *buffer, size_t len, int filter) |
bbd9f9ee | 1183 | { |
068bb1a7 SG |
1184 | u32 crc = bitrev16(crc16(0xFFFF, buffer, len)); |
1185 | return crc << ((filter % 2) * 16); | |
bbd9f9ee SG |
1186 | } |
1187 | ||
e5e3af83 SG |
1188 | static int smsc95xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask) |
1189 | { | |
1190 | struct mii_if_info *mii = &dev->mii; | |
1191 | int ret; | |
1192 | ||
1e1d7412 | 1193 | netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n"); |
e5e3af83 SG |
1194 | |
1195 | /* read to clear */ | |
1196 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC); | |
e360a8b4 | 1197 | if (ret < 0) |
b052e073 | 1198 | return ret; |
e5e3af83 SG |
1199 | |
1200 | /* enable interrupt source */ | |
1201 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK); | |
e360a8b4 | 1202 | if (ret < 0) |
b052e073 | 1203 | return ret; |
e5e3af83 SG |
1204 | |
1205 | ret |= mask; | |
1206 | ||
1207 | smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret); | |
1208 | ||
1209 | return 0; | |
1210 | } | |
1211 | ||
1212 | static int smsc95xx_link_ok_nopm(struct usbnet *dev) | |
1213 | { | |
1214 | struct mii_if_info *mii = &dev->mii; | |
1215 | int ret; | |
1216 | ||
1217 | /* first, a dummy read, needed to latch some MII phys */ | |
1218 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); | |
e360a8b4 | 1219 | if (ret < 0) |
b052e073 | 1220 | return ret; |
e5e3af83 SG |
1221 | |
1222 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); | |
e360a8b4 | 1223 | if (ret < 0) |
b052e073 | 1224 | return ret; |
e5e3af83 SG |
1225 | |
1226 | return !!(ret & BMSR_LSTATUS); | |
1227 | } | |
1228 | ||
319b95b5 SG |
1229 | static int smsc95xx_enter_suspend0(struct usbnet *dev) |
1230 | { | |
1231 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1232 | u32 val; | |
1233 | int ret; | |
1234 | ||
1235 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
e360a8b4 | 1236 | if (ret < 0) |
b052e073 | 1237 | return ret; |
319b95b5 SG |
1238 | |
1239 | val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_)); | |
1240 | val |= PM_CTL_SUS_MODE_0; | |
1241 | ||
1242 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
e360a8b4 | 1243 | if (ret < 0) |
b052e073 | 1244 | return ret; |
319b95b5 SG |
1245 | |
1246 | /* clear wol status */ | |
1247 | val &= ~PM_CTL_WUPS_; | |
1248 | val |= PM_CTL_WUPS_WOL_; | |
1249 | ||
1250 | /* enable energy detection */ | |
1251 | if (pdata->wolopts & WAKE_PHY) | |
1252 | val |= PM_CTL_WUPS_ED_; | |
1253 | ||
1254 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
e360a8b4 | 1255 | if (ret < 0) |
b052e073 | 1256 | return ret; |
319b95b5 SG |
1257 | |
1258 | /* read back PM_CTRL */ | |
1259 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
76437214 ML |
1260 | if (ret < 0) |
1261 | return ret; | |
319b95b5 | 1262 | |
b2d4b150 SG |
1263 | pdata->suspend_flags |= SUSPEND_SUSPEND0; |
1264 | ||
76437214 | 1265 | return 0; |
319b95b5 SG |
1266 | } |
1267 | ||
1268 | static int smsc95xx_enter_suspend1(struct usbnet *dev) | |
1269 | { | |
1270 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1271 | struct mii_if_info *mii = &dev->mii; | |
1272 | u32 val; | |
1273 | int ret; | |
1274 | ||
1275 | /* reconfigure link pulse detection timing for | |
1276 | * compatibility with non-standard link partners | |
1277 | */ | |
1278 | if (pdata->features & FEATURE_PHY_NLP_CROSSOVER) | |
1279 | smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_EDPD_CONFIG, | |
1280 | PHY_EDPD_CONFIG_DEFAULT); | |
1281 | ||
1282 | /* enable energy detect power-down mode */ | |
1283 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS); | |
e360a8b4 | 1284 | if (ret < 0) |
b052e073 | 1285 | return ret; |
319b95b5 SG |
1286 | |
1287 | ret |= MODE_CTRL_STS_EDPWRDOWN_; | |
1288 | ||
1289 | smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS, ret); | |
1290 | ||
1291 | /* enter SUSPEND1 mode */ | |
1292 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
e360a8b4 | 1293 | if (ret < 0) |
b052e073 | 1294 | return ret; |
319b95b5 SG |
1295 | |
1296 | val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); | |
1297 | val |= PM_CTL_SUS_MODE_1; | |
1298 | ||
1299 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
e360a8b4 | 1300 | if (ret < 0) |
b052e073 | 1301 | return ret; |
319b95b5 SG |
1302 | |
1303 | /* clear wol status, enable energy detection */ | |
1304 | val &= ~PM_CTL_WUPS_; | |
1305 | val |= (PM_CTL_WUPS_ED_ | PM_CTL_ED_EN_); | |
1306 | ||
1307 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
76437214 ML |
1308 | if (ret < 0) |
1309 | return ret; | |
319b95b5 | 1310 | |
b2d4b150 SG |
1311 | pdata->suspend_flags |= SUSPEND_SUSPEND1; |
1312 | ||
76437214 | 1313 | return 0; |
319b95b5 SG |
1314 | } |
1315 | ||
1316 | static int smsc95xx_enter_suspend2(struct usbnet *dev) | |
1317 | { | |
b2d4b150 | 1318 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); |
319b95b5 SG |
1319 | u32 val; |
1320 | int ret; | |
1321 | ||
1322 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
e360a8b4 | 1323 | if (ret < 0) |
b052e073 | 1324 | return ret; |
319b95b5 SG |
1325 | |
1326 | val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); | |
1327 | val |= PM_CTL_SUS_MODE_2; | |
1328 | ||
1329 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
76437214 ML |
1330 | if (ret < 0) |
1331 | return ret; | |
319b95b5 | 1332 | |
b2d4b150 SG |
1333 | pdata->suspend_flags |= SUSPEND_SUSPEND2; |
1334 | ||
76437214 | 1335 | return 0; |
319b95b5 SG |
1336 | } |
1337 | ||
b2d4b150 SG |
1338 | static int smsc95xx_enter_suspend3(struct usbnet *dev) |
1339 | { | |
1340 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1341 | u32 val; | |
1342 | int ret; | |
1343 | ||
1344 | ret = smsc95xx_read_reg_nopm(dev, RX_FIFO_INF, &val); | |
1345 | if (ret < 0) | |
1346 | return ret; | |
1347 | ||
1348 | if (val & 0xFFFF) { | |
1349 | netdev_info(dev->net, "rx fifo not empty in autosuspend\n"); | |
1350 | return -EBUSY; | |
1351 | } | |
1352 | ||
1353 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
1354 | if (ret < 0) | |
1355 | return ret; | |
1356 | ||
1357 | val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); | |
1358 | val |= PM_CTL_SUS_MODE_3 | PM_CTL_RES_CLR_WKP_STS; | |
1359 | ||
1360 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
1361 | if (ret < 0) | |
1362 | return ret; | |
1363 | ||
1364 | /* clear wol status */ | |
1365 | val &= ~PM_CTL_WUPS_; | |
1366 | val |= PM_CTL_WUPS_WOL_; | |
1367 | ||
1368 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
1369 | if (ret < 0) | |
1370 | return ret; | |
1371 | ||
1372 | pdata->suspend_flags |= SUSPEND_SUSPEND3; | |
1373 | ||
1374 | return 0; | |
1375 | } | |
1376 | ||
1377 | static int smsc95xx_autosuspend(struct usbnet *dev, u32 link_up) | |
1378 | { | |
1379 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1380 | int ret; | |
1381 | ||
1382 | if (!netif_running(dev->net)) { | |
1383 | /* interface is ifconfig down so fully power down hw */ | |
1384 | netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n"); | |
1385 | return smsc95xx_enter_suspend2(dev); | |
1386 | } | |
1387 | ||
1388 | if (!link_up) { | |
1389 | /* link is down so enter EDPD mode, but only if device can | |
1390 | * reliably resume from it. This check should be redundant | |
eb970ff0 | 1391 | * as current FEATURE_REMOTE_WAKEUP parts also support |
b2d4b150 SG |
1392 | * FEATURE_PHY_NLP_CROSSOVER but it's included for clarity */ |
1393 | if (!(pdata->features & FEATURE_PHY_NLP_CROSSOVER)) { | |
1394 | netdev_warn(dev->net, "EDPD not supported\n"); | |
1395 | return -EBUSY; | |
1396 | } | |
1397 | ||
1398 | netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n"); | |
1399 | ||
1400 | /* enable PHY wakeup events for if cable is attached */ | |
1401 | ret = smsc95xx_enable_phy_wakeup_interrupts(dev, | |
1402 | PHY_INT_MASK_ANEG_COMP_); | |
1403 | if (ret < 0) { | |
1404 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1405 | return ret; | |
1406 | } | |
1407 | ||
1408 | netdev_info(dev->net, "entering SUSPEND1 mode\n"); | |
1409 | return smsc95xx_enter_suspend1(dev); | |
1410 | } | |
1411 | ||
1412 | /* enable PHY wakeup events so we remote wakeup if cable is pulled */ | |
1413 | ret = smsc95xx_enable_phy_wakeup_interrupts(dev, | |
1414 | PHY_INT_MASK_LINK_DOWN_); | |
1415 | if (ret < 0) { | |
1416 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1417 | return ret; | |
1418 | } | |
1419 | ||
1420 | netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n"); | |
1421 | return smsc95xx_enter_suspend3(dev); | |
1422 | } | |
1423 | ||
b5a04475 SG |
1424 | static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message) |
1425 | { | |
1426 | struct usbnet *dev = usb_get_intfdata(intf); | |
e0e474a8 | 1427 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); |
e5e3af83 | 1428 | u32 val, link_up; |
b5a04475 | 1429 | int ret; |
b5a04475 | 1430 | |
b5a04475 | 1431 | ret = usbnet_suspend(intf, message); |
b052e073 SG |
1432 | if (ret < 0) { |
1433 | netdev_warn(dev->net, "usbnet_suspend error\n"); | |
1434 | return ret; | |
1435 | } | |
b5a04475 | 1436 | |
b2d4b150 SG |
1437 | if (pdata->suspend_flags) { |
1438 | netdev_warn(dev->net, "error during last resume\n"); | |
1439 | pdata->suspend_flags = 0; | |
1440 | } | |
1441 | ||
e5e3af83 SG |
1442 | /* determine if link is up using only _nopm functions */ |
1443 | link_up = smsc95xx_link_ok_nopm(dev); | |
1444 | ||
42e21c01 | 1445 | if (message.event == PM_EVENT_AUTO_SUSPEND && |
eb970ff0 | 1446 | (pdata->features & FEATURE_REMOTE_WAKEUP)) { |
b2d4b150 SG |
1447 | ret = smsc95xx_autosuspend(dev, link_up); |
1448 | goto done; | |
1449 | } | |
1450 | ||
1451 | /* if we get this far we're not autosuspending */ | |
e5e3af83 SG |
1452 | /* if no wol options set, or if link is down and we're not waking on |
1453 | * PHY activity, enter lowest power SUSPEND2 mode | |
1454 | */ | |
1455 | if (!(pdata->wolopts & SUPPORTED_WAKE) || | |
1456 | !(link_up || (pdata->wolopts & WAKE_PHY))) { | |
1e1d7412 | 1457 | netdev_info(dev->net, "entering SUSPEND2 mode\n"); |
e0e474a8 SG |
1458 | |
1459 | /* disable energy detect (link up) & wake up events */ | |
ec32115d | 1460 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1461 | if (ret < 0) |
b052e073 | 1462 | goto done; |
e0e474a8 SG |
1463 | |
1464 | val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_); | |
1465 | ||
ec32115d | 1466 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1467 | if (ret < 0) |
b052e073 | 1468 | goto done; |
e0e474a8 | 1469 | |
ec32115d | 1470 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); |
e360a8b4 | 1471 | if (ret < 0) |
b052e073 | 1472 | goto done; |
e0e474a8 SG |
1473 | |
1474 | val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_); | |
1475 | ||
ec32115d | 1476 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); |
e360a8b4 | 1477 | if (ret < 0) |
b052e073 | 1478 | goto done; |
e0e474a8 | 1479 | |
3b9f7d8c SG |
1480 | ret = smsc95xx_enter_suspend2(dev); |
1481 | goto done; | |
e0e474a8 SG |
1482 | } |
1483 | ||
e5e3af83 SG |
1484 | if (pdata->wolopts & WAKE_PHY) { |
1485 | ret = smsc95xx_enable_phy_wakeup_interrupts(dev, | |
1486 | (PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_LINK_DOWN_)); | |
b052e073 SG |
1487 | if (ret < 0) { |
1488 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1489 | goto done; | |
1490 | } | |
e5e3af83 SG |
1491 | |
1492 | /* if link is down then configure EDPD and enter SUSPEND1, | |
1493 | * otherwise enter SUSPEND0 below | |
1494 | */ | |
1495 | if (!link_up) { | |
1e1d7412 | 1496 | netdev_info(dev->net, "entering SUSPEND1 mode\n"); |
3b9f7d8c SG |
1497 | ret = smsc95xx_enter_suspend1(dev); |
1498 | goto done; | |
e5e3af83 SG |
1499 | } |
1500 | } | |
1501 | ||
bbd9f9ee | 1502 | if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) { |
eed9a729 | 1503 | u32 *filter_mask = kzalloc(sizeof(u32) * 32, GFP_KERNEL); |
06a221be ML |
1504 | u32 command[2]; |
1505 | u32 offset[2]; | |
1506 | u32 crc[4]; | |
9ebca507 SG |
1507 | int wuff_filter_count = |
1508 | (pdata->features & FEATURE_8_WAKEUP_FILTERS) ? | |
1509 | LAN9500A_WUFF_NUM : LAN9500_WUFF_NUM; | |
bbd9f9ee SG |
1510 | int i, filter = 0; |
1511 | ||
eed9a729 SG |
1512 | if (!filter_mask) { |
1513 | netdev_warn(dev->net, "Unable to allocate filter_mask\n"); | |
3b9f7d8c SG |
1514 | ret = -ENOMEM; |
1515 | goto done; | |
eed9a729 SG |
1516 | } |
1517 | ||
06a221be ML |
1518 | memset(command, 0, sizeof(command)); |
1519 | memset(offset, 0, sizeof(offset)); | |
1520 | memset(crc, 0, sizeof(crc)); | |
1521 | ||
bbd9f9ee SG |
1522 | if (pdata->wolopts & WAKE_BCAST) { |
1523 | const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}; | |
1e1d7412 | 1524 | netdev_info(dev->net, "enabling broadcast detection\n"); |
bbd9f9ee SG |
1525 | filter_mask[filter * 4] = 0x003F; |
1526 | filter_mask[filter * 4 + 1] = 0x00; | |
1527 | filter_mask[filter * 4 + 2] = 0x00; | |
1528 | filter_mask[filter * 4 + 3] = 0x00; | |
1529 | command[filter/4] |= 0x05UL << ((filter % 4) * 8); | |
1530 | offset[filter/4] |= 0x00 << ((filter % 4) * 8); | |
1531 | crc[filter/2] |= smsc_crc(bcast, 6, filter); | |
1532 | filter++; | |
1533 | } | |
1534 | ||
1535 | if (pdata->wolopts & WAKE_MCAST) { | |
1536 | const u8 mcast[] = {0x01, 0x00, 0x5E}; | |
1e1d7412 | 1537 | netdev_info(dev->net, "enabling multicast detection\n"); |
bbd9f9ee SG |
1538 | filter_mask[filter * 4] = 0x0007; |
1539 | filter_mask[filter * 4 + 1] = 0x00; | |
1540 | filter_mask[filter * 4 + 2] = 0x00; | |
1541 | filter_mask[filter * 4 + 3] = 0x00; | |
1542 | command[filter/4] |= 0x09UL << ((filter % 4) * 8); | |
1543 | offset[filter/4] |= 0x00 << ((filter % 4) * 8); | |
1544 | crc[filter/2] |= smsc_crc(mcast, 3, filter); | |
1545 | filter++; | |
1546 | } | |
1547 | ||
1548 | if (pdata->wolopts & WAKE_ARP) { | |
1549 | const u8 arp[] = {0x08, 0x06}; | |
1e1d7412 | 1550 | netdev_info(dev->net, "enabling ARP detection\n"); |
bbd9f9ee SG |
1551 | filter_mask[filter * 4] = 0x0003; |
1552 | filter_mask[filter * 4 + 1] = 0x00; | |
1553 | filter_mask[filter * 4 + 2] = 0x00; | |
1554 | filter_mask[filter * 4 + 3] = 0x00; | |
1555 | command[filter/4] |= 0x05UL << ((filter % 4) * 8); | |
1556 | offset[filter/4] |= 0x0C << ((filter % 4) * 8); | |
1557 | crc[filter/2] |= smsc_crc(arp, 2, filter); | |
1558 | filter++; | |
1559 | } | |
1560 | ||
1561 | if (pdata->wolopts & WAKE_UCAST) { | |
1e1d7412 | 1562 | netdev_info(dev->net, "enabling unicast detection\n"); |
bbd9f9ee SG |
1563 | filter_mask[filter * 4] = 0x003F; |
1564 | filter_mask[filter * 4 + 1] = 0x00; | |
1565 | filter_mask[filter * 4 + 2] = 0x00; | |
1566 | filter_mask[filter * 4 + 3] = 0x00; | |
1567 | command[filter/4] |= 0x01UL << ((filter % 4) * 8); | |
1568 | offset[filter/4] |= 0x00 << ((filter % 4) * 8); | |
1569 | crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter); | |
1570 | filter++; | |
1571 | } | |
1572 | ||
9ebca507 | 1573 | for (i = 0; i < (wuff_filter_count * 4); i++) { |
ec32115d | 1574 | ret = smsc95xx_write_reg_nopm(dev, WUFF, filter_mask[i]); |
b052e073 | 1575 | if (ret < 0) { |
06a221be | 1576 | kfree(filter_mask); |
b052e073 SG |
1577 | goto done; |
1578 | } | |
bbd9f9ee | 1579 | } |
06a221be | 1580 | kfree(filter_mask); |
bbd9f9ee | 1581 | |
9ebca507 | 1582 | for (i = 0; i < (wuff_filter_count / 4); i++) { |
ec32115d | 1583 | ret = smsc95xx_write_reg_nopm(dev, WUFF, command[i]); |
e360a8b4 | 1584 | if (ret < 0) |
b052e073 | 1585 | goto done; |
bbd9f9ee SG |
1586 | } |
1587 | ||
9ebca507 | 1588 | for (i = 0; i < (wuff_filter_count / 4); i++) { |
ec32115d | 1589 | ret = smsc95xx_write_reg_nopm(dev, WUFF, offset[i]); |
e360a8b4 | 1590 | if (ret < 0) |
b052e073 | 1591 | goto done; |
bbd9f9ee SG |
1592 | } |
1593 | ||
9ebca507 | 1594 | for (i = 0; i < (wuff_filter_count / 2); i++) { |
ec32115d | 1595 | ret = smsc95xx_write_reg_nopm(dev, WUFF, crc[i]); |
e360a8b4 | 1596 | if (ret < 0) |
b052e073 | 1597 | goto done; |
bbd9f9ee SG |
1598 | } |
1599 | ||
1600 | /* clear any pending pattern match packet status */ | |
ec32115d | 1601 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1602 | if (ret < 0) |
b052e073 | 1603 | goto done; |
bbd9f9ee SG |
1604 | |
1605 | val |= WUCSR_WUFR_; | |
1606 | ||
ec32115d | 1607 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1608 | if (ret < 0) |
b052e073 | 1609 | goto done; |
bbd9f9ee SG |
1610 | } |
1611 | ||
e0e474a8 SG |
1612 | if (pdata->wolopts & WAKE_MAGIC) { |
1613 | /* clear any pending magic packet status */ | |
ec32115d | 1614 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1615 | if (ret < 0) |
b052e073 | 1616 | goto done; |
e0e474a8 SG |
1617 | |
1618 | val |= WUCSR_MPR_; | |
1619 | ||
ec32115d | 1620 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1621 | if (ret < 0) |
b052e073 | 1622 | goto done; |
e0e474a8 SG |
1623 | } |
1624 | ||
bbd9f9ee | 1625 | /* enable/disable wakeup sources */ |
ec32115d | 1626 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1627 | if (ret < 0) |
b052e073 | 1628 | goto done; |
e0e474a8 | 1629 | |
bbd9f9ee | 1630 | if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) { |
1e1d7412 | 1631 | netdev_info(dev->net, "enabling pattern match wakeup\n"); |
bbd9f9ee SG |
1632 | val |= WUCSR_WAKE_EN_; |
1633 | } else { | |
1e1d7412 | 1634 | netdev_info(dev->net, "disabling pattern match wakeup\n"); |
bbd9f9ee SG |
1635 | val &= ~WUCSR_WAKE_EN_; |
1636 | } | |
1637 | ||
e0e474a8 | 1638 | if (pdata->wolopts & WAKE_MAGIC) { |
1e1d7412 | 1639 | netdev_info(dev->net, "enabling magic packet wakeup\n"); |
e0e474a8 SG |
1640 | val |= WUCSR_MPEN_; |
1641 | } else { | |
1e1d7412 | 1642 | netdev_info(dev->net, "disabling magic packet wakeup\n"); |
e0e474a8 SG |
1643 | val &= ~WUCSR_MPEN_; |
1644 | } | |
1645 | ||
ec32115d | 1646 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1647 | if (ret < 0) |
b052e073 | 1648 | goto done; |
e0e474a8 SG |
1649 | |
1650 | /* enable wol wakeup source */ | |
ec32115d | 1651 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); |
e360a8b4 | 1652 | if (ret < 0) |
b052e073 | 1653 | goto done; |
e0e474a8 SG |
1654 | |
1655 | val |= PM_CTL_WOL_EN_; | |
1656 | ||
e5e3af83 SG |
1657 | /* phy energy detect wakeup source */ |
1658 | if (pdata->wolopts & WAKE_PHY) | |
1659 | val |= PM_CTL_ED_EN_; | |
1660 | ||
ec32115d | 1661 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); |
e360a8b4 | 1662 | if (ret < 0) |
b052e073 | 1663 | goto done; |
e0e474a8 | 1664 | |
bbd9f9ee | 1665 | /* enable receiver to enable frame reception */ |
ec32115d | 1666 | smsc95xx_start_rx_path(dev, 1); |
e0e474a8 SG |
1667 | |
1668 | /* some wol options are enabled, so enter SUSPEND0 */ | |
1e1d7412 | 1669 | netdev_info(dev->net, "entering SUSPEND0 mode\n"); |
3b9f7d8c SG |
1670 | ret = smsc95xx_enter_suspend0(dev); |
1671 | ||
1672 | done: | |
0d41be53 ML |
1673 | /* |
1674 | * TODO: resume() might need to handle the suspend failure | |
1675 | * in system sleep | |
1676 | */ | |
1677 | if (ret && PMSG_IS_AUTO(message)) | |
3b9f7d8c SG |
1678 | usbnet_resume(intf); |
1679 | return ret; | |
e0e474a8 SG |
1680 | } |
1681 | ||
1682 | static int smsc95xx_resume(struct usb_interface *intf) | |
1683 | { | |
1684 | struct usbnet *dev = usb_get_intfdata(intf); | |
8bca81d9 SM |
1685 | struct smsc95xx_priv *pdata; |
1686 | u8 suspend_flags; | |
e0e474a8 SG |
1687 | int ret; |
1688 | u32 val; | |
1689 | ||
1690 | BUG_ON(!dev); | |
8bca81d9 SM |
1691 | pdata = (struct smsc95xx_priv *)(dev->data[0]); |
1692 | suspend_flags = pdata->suspend_flags; | |
e0e474a8 | 1693 | |
b2d4b150 SG |
1694 | netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags); |
1695 | ||
1696 | /* do this first to ensure it's cleared even in error case */ | |
1697 | pdata->suspend_flags = 0; | |
1698 | ||
1699 | if (suspend_flags & SUSPEND_ALLMODES) { | |
bbd9f9ee | 1700 | /* clear wake-up sources */ |
ec32115d | 1701 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1702 | if (ret < 0) |
b052e073 | 1703 | return ret; |
e0e474a8 | 1704 | |
bbd9f9ee | 1705 | val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_); |
e0e474a8 | 1706 | |
ec32115d | 1707 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1708 | if (ret < 0) |
b052e073 | 1709 | return ret; |
e0e474a8 SG |
1710 | |
1711 | /* clear wake-up status */ | |
ec32115d | 1712 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); |
e360a8b4 | 1713 | if (ret < 0) |
b052e073 | 1714 | return ret; |
e0e474a8 SG |
1715 | |
1716 | val &= ~PM_CTL_WOL_EN_; | |
1717 | val |= PM_CTL_WUPS_; | |
1718 | ||
ec32115d | 1719 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); |
e360a8b4 | 1720 | if (ret < 0) |
b052e073 | 1721 | return ret; |
e0e474a8 SG |
1722 | } |
1723 | ||
af3d7c1e | 1724 | ret = usbnet_resume(intf); |
b052e073 SG |
1725 | if (ret < 0) |
1726 | netdev_warn(dev->net, "usbnet_resume error\n"); | |
e0e474a8 | 1727 | |
b052e073 | 1728 | return ret; |
b5a04475 SG |
1729 | } |
1730 | ||
b4df480f JS |
1731 | static int smsc95xx_reset_resume(struct usb_interface *intf) |
1732 | { | |
1733 | struct usbnet *dev = usb_get_intfdata(intf); | |
1734 | int ret; | |
1735 | ||
1736 | ret = smsc95xx_reset(dev); | |
1737 | if (ret < 0) | |
1738 | return ret; | |
1739 | ||
1740 | return smsc95xx_resume(intf); | |
1741 | } | |
1742 | ||
2f7ca802 SG |
1743 | static void smsc95xx_rx_csum_offload(struct sk_buff *skb) |
1744 | { | |
1745 | skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2); | |
1746 | skb->ip_summed = CHECKSUM_COMPLETE; | |
1747 | skb_trim(skb, skb->len - 2); | |
1748 | } | |
1749 | ||
1750 | static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) | |
1751 | { | |
eb85569f EG |
1752 | /* This check is no longer done by usbnet */ |
1753 | if (skb->len < dev->net->hard_header_len) | |
1754 | return 0; | |
1755 | ||
2f7ca802 SG |
1756 | while (skb->len > 0) { |
1757 | u32 header, align_count; | |
1758 | struct sk_buff *ax_skb; | |
1759 | unsigned char *packet; | |
1760 | u16 size; | |
1761 | ||
1762 | memcpy(&header, skb->data, sizeof(header)); | |
1763 | le32_to_cpus(&header); | |
1764 | skb_pull(skb, 4 + NET_IP_ALIGN); | |
1765 | packet = skb->data; | |
1766 | ||
1767 | /* get the packet length */ | |
1768 | size = (u16)((header & RX_STS_FL_) >> 16); | |
1769 | align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4; | |
1770 | ||
1771 | if (unlikely(header & RX_STS_ES_)) { | |
a475f603 JP |
1772 | netif_dbg(dev, rx_err, dev->net, |
1773 | "Error header=0x%08x\n", header); | |
80667ac1 HX |
1774 | dev->net->stats.rx_errors++; |
1775 | dev->net->stats.rx_dropped++; | |
2f7ca802 SG |
1776 | |
1777 | if (header & RX_STS_CRC_) { | |
80667ac1 | 1778 | dev->net->stats.rx_crc_errors++; |
2f7ca802 SG |
1779 | } else { |
1780 | if (header & (RX_STS_TL_ | RX_STS_RF_)) | |
80667ac1 | 1781 | dev->net->stats.rx_frame_errors++; |
2f7ca802 SG |
1782 | |
1783 | if ((header & RX_STS_LE_) && | |
1784 | (!(header & RX_STS_FT_))) | |
80667ac1 | 1785 | dev->net->stats.rx_length_errors++; |
2f7ca802 SG |
1786 | } |
1787 | } else { | |
1788 | /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */ | |
1789 | if (unlikely(size > (ETH_FRAME_LEN + 12))) { | |
a475f603 JP |
1790 | netif_dbg(dev, rx_err, dev->net, |
1791 | "size err header=0x%08x\n", header); | |
2f7ca802 SG |
1792 | return 0; |
1793 | } | |
1794 | ||
1795 | /* last frame in this batch */ | |
1796 | if (skb->len == size) { | |
78e47fe4 | 1797 | if (dev->net->features & NETIF_F_RXCSUM) |
2f7ca802 | 1798 | smsc95xx_rx_csum_offload(skb); |
df18acca | 1799 | skb_trim(skb, skb->len - 4); /* remove fcs */ |
2f7ca802 SG |
1800 | skb->truesize = size + sizeof(struct sk_buff); |
1801 | ||
1802 | return 1; | |
1803 | } | |
1804 | ||
1805 | ax_skb = skb_clone(skb, GFP_ATOMIC); | |
1806 | if (unlikely(!ax_skb)) { | |
60b86755 | 1807 | netdev_warn(dev->net, "Error allocating skb\n"); |
2f7ca802 SG |
1808 | return 0; |
1809 | } | |
1810 | ||
1811 | ax_skb->len = size; | |
1812 | ax_skb->data = packet; | |
1813 | skb_set_tail_pointer(ax_skb, size); | |
1814 | ||
78e47fe4 | 1815 | if (dev->net->features & NETIF_F_RXCSUM) |
2f7ca802 | 1816 | smsc95xx_rx_csum_offload(ax_skb); |
df18acca | 1817 | skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ |
2f7ca802 SG |
1818 | ax_skb->truesize = size + sizeof(struct sk_buff); |
1819 | ||
1820 | usbnet_skb_return(dev, ax_skb); | |
1821 | } | |
1822 | ||
1823 | skb_pull(skb, size); | |
1824 | ||
1825 | /* padding bytes before the next frame starts */ | |
1826 | if (skb->len) | |
1827 | skb_pull(skb, align_count); | |
1828 | } | |
1829 | ||
2f7ca802 SG |
1830 | return 1; |
1831 | } | |
1832 | ||
f7b29271 SG |
1833 | static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb) |
1834 | { | |
55508d60 MM |
1835 | u16 low_16 = (u16)skb_checksum_start_offset(skb); |
1836 | u16 high_16 = low_16 + skb->csum_offset; | |
f7b29271 SG |
1837 | return (high_16 << 16) | low_16; |
1838 | } | |
1839 | ||
2f7ca802 SG |
1840 | static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev, |
1841 | struct sk_buff *skb, gfp_t flags) | |
1842 | { | |
78e47fe4 | 1843 | bool csum = skb->ip_summed == CHECKSUM_PARTIAL; |
f7b29271 | 1844 | int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD; |
2f7ca802 SG |
1845 | u32 tx_cmd_a, tx_cmd_b; |
1846 | ||
f7b29271 SG |
1847 | /* We do not advertise SG, so skbs should be already linearized */ |
1848 | BUG_ON(skb_shinfo(skb)->nr_frags); | |
1849 | ||
1850 | if (skb_headroom(skb) < overhead) { | |
2f7ca802 | 1851 | struct sk_buff *skb2 = skb_copy_expand(skb, |
f7b29271 | 1852 | overhead, 0, flags); |
2f7ca802 SG |
1853 | dev_kfree_skb_any(skb); |
1854 | skb = skb2; | |
1855 | if (!skb) | |
1856 | return NULL; | |
1857 | } | |
1858 | ||
f7b29271 | 1859 | if (csum) { |
11bc3088 SG |
1860 | if (skb->len <= 45) { |
1861 | /* workaround - hardware tx checksum does not work | |
1862 | * properly with extremely small packets */ | |
55508d60 | 1863 | long csstart = skb_checksum_start_offset(skb); |
11bc3088 SG |
1864 | __wsum calc = csum_partial(skb->data + csstart, |
1865 | skb->len - csstart, 0); | |
1866 | *((__sum16 *)(skb->data + csstart | |
1867 | + skb->csum_offset)) = csum_fold(calc); | |
1868 | ||
1869 | csum = false; | |
1870 | } else { | |
1871 | u32 csum_preamble = smsc95xx_calc_csum_preamble(skb); | |
1872 | skb_push(skb, 4); | |
00acda68 | 1873 | cpu_to_le32s(&csum_preamble); |
11bc3088 SG |
1874 | memcpy(skb->data, &csum_preamble, 4); |
1875 | } | |
f7b29271 SG |
1876 | } |
1877 | ||
2f7ca802 SG |
1878 | skb_push(skb, 4); |
1879 | tx_cmd_b = (u32)(skb->len - 4); | |
f7b29271 SG |
1880 | if (csum) |
1881 | tx_cmd_b |= TX_CMD_B_CSUM_ENABLE; | |
2f7ca802 SG |
1882 | cpu_to_le32s(&tx_cmd_b); |
1883 | memcpy(skb->data, &tx_cmd_b, 4); | |
1884 | ||
1885 | skb_push(skb, 4); | |
1886 | tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ | | |
1887 | TX_CMD_A_LAST_SEG_; | |
1888 | cpu_to_le32s(&tx_cmd_a); | |
1889 | memcpy(skb->data, &tx_cmd_a, 4); | |
1890 | ||
1891 | return skb; | |
1892 | } | |
1893 | ||
b2d4b150 SG |
1894 | static int smsc95xx_manage_power(struct usbnet *dev, int on) |
1895 | { | |
1896 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1897 | ||
1898 | dev->intf->needs_remote_wakeup = on; | |
1899 | ||
eb970ff0 | 1900 | if (pdata->features & FEATURE_REMOTE_WAKEUP) |
b2d4b150 SG |
1901 | return 0; |
1902 | ||
eb970ff0 ML |
1903 | /* this chip revision isn't capable of remote wakeup */ |
1904 | netdev_info(dev->net, "hardware isn't capable of remote wakeup\n"); | |
b2d4b150 SG |
1905 | |
1906 | if (on) | |
1907 | usb_autopm_get_interface_no_resume(dev->intf); | |
1908 | else | |
1909 | usb_autopm_put_interface(dev->intf); | |
1910 | ||
1911 | return 0; | |
1912 | } | |
1913 | ||
2f7ca802 SG |
1914 | static const struct driver_info smsc95xx_info = { |
1915 | .description = "smsc95xx USB 2.0 Ethernet", | |
1916 | .bind = smsc95xx_bind, | |
1917 | .unbind = smsc95xx_unbind, | |
1918 | .link_reset = smsc95xx_link_reset, | |
1919 | .reset = smsc95xx_reset, | |
1920 | .rx_fixup = smsc95xx_rx_fixup, | |
1921 | .tx_fixup = smsc95xx_tx_fixup, | |
1922 | .status = smsc95xx_status, | |
b2d4b150 | 1923 | .manage_power = smsc95xx_manage_power, |
07d69d42 | 1924 | .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR, |
2f7ca802 SG |
1925 | }; |
1926 | ||
1927 | static const struct usb_device_id products[] = { | |
1928 | { | |
1929 | /* SMSC9500 USB Ethernet Device */ | |
1930 | USB_DEVICE(0x0424, 0x9500), | |
1931 | .driver_info = (unsigned long) &smsc95xx_info, | |
1932 | }, | |
6f41d12b SG |
1933 | { |
1934 | /* SMSC9505 USB Ethernet Device */ | |
1935 | USB_DEVICE(0x0424, 0x9505), | |
1936 | .driver_info = (unsigned long) &smsc95xx_info, | |
1937 | }, | |
1938 | { | |
1939 | /* SMSC9500A USB Ethernet Device */ | |
1940 | USB_DEVICE(0x0424, 0x9E00), | |
1941 | .driver_info = (unsigned long) &smsc95xx_info, | |
1942 | }, | |
1943 | { | |
1944 | /* SMSC9505A USB Ethernet Device */ | |
1945 | USB_DEVICE(0x0424, 0x9E01), | |
1946 | .driver_info = (unsigned long) &smsc95xx_info, | |
1947 | }, | |
726474b8 SG |
1948 | { |
1949 | /* SMSC9512/9514 USB Hub & Ethernet Device */ | |
1950 | USB_DEVICE(0x0424, 0xec00), | |
1951 | .driver_info = (unsigned long) &smsc95xx_info, | |
1952 | }, | |
6f41d12b SG |
1953 | { |
1954 | /* SMSC9500 USB Ethernet Device (SAL10) */ | |
1955 | USB_DEVICE(0x0424, 0x9900), | |
1956 | .driver_info = (unsigned long) &smsc95xx_info, | |
1957 | }, | |
1958 | { | |
1959 | /* SMSC9505 USB Ethernet Device (SAL10) */ | |
1960 | USB_DEVICE(0x0424, 0x9901), | |
1961 | .driver_info = (unsigned long) &smsc95xx_info, | |
1962 | }, | |
1963 | { | |
1964 | /* SMSC9500A USB Ethernet Device (SAL10) */ | |
1965 | USB_DEVICE(0x0424, 0x9902), | |
1966 | .driver_info = (unsigned long) &smsc95xx_info, | |
1967 | }, | |
1968 | { | |
1969 | /* SMSC9505A USB Ethernet Device (SAL10) */ | |
1970 | USB_DEVICE(0x0424, 0x9903), | |
1971 | .driver_info = (unsigned long) &smsc95xx_info, | |
1972 | }, | |
1973 | { | |
1974 | /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */ | |
1975 | USB_DEVICE(0x0424, 0x9904), | |
1976 | .driver_info = (unsigned long) &smsc95xx_info, | |
1977 | }, | |
1978 | { | |
1979 | /* SMSC9500A USB Ethernet Device (HAL) */ | |
1980 | USB_DEVICE(0x0424, 0x9905), | |
1981 | .driver_info = (unsigned long) &smsc95xx_info, | |
1982 | }, | |
1983 | { | |
1984 | /* SMSC9505A USB Ethernet Device (HAL) */ | |
1985 | USB_DEVICE(0x0424, 0x9906), | |
1986 | .driver_info = (unsigned long) &smsc95xx_info, | |
1987 | }, | |
1988 | { | |
1989 | /* SMSC9500 USB Ethernet Device (Alternate ID) */ | |
1990 | USB_DEVICE(0x0424, 0x9907), | |
1991 | .driver_info = (unsigned long) &smsc95xx_info, | |
1992 | }, | |
1993 | { | |
1994 | /* SMSC9500A USB Ethernet Device (Alternate ID) */ | |
1995 | USB_DEVICE(0x0424, 0x9908), | |
1996 | .driver_info = (unsigned long) &smsc95xx_info, | |
1997 | }, | |
1998 | { | |
1999 | /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */ | |
2000 | USB_DEVICE(0x0424, 0x9909), | |
2001 | .driver_info = (unsigned long) &smsc95xx_info, | |
2002 | }, | |
88edaa41 SG |
2003 | { |
2004 | /* SMSC LAN9530 USB Ethernet Device */ | |
2005 | USB_DEVICE(0x0424, 0x9530), | |
2006 | .driver_info = (unsigned long) &smsc95xx_info, | |
2007 | }, | |
2008 | { | |
2009 | /* SMSC LAN9730 USB Ethernet Device */ | |
2010 | USB_DEVICE(0x0424, 0x9730), | |
2011 | .driver_info = (unsigned long) &smsc95xx_info, | |
2012 | }, | |
2013 | { | |
2014 | /* SMSC LAN89530 USB Ethernet Device */ | |
2015 | USB_DEVICE(0x0424, 0x9E08), | |
2016 | .driver_info = (unsigned long) &smsc95xx_info, | |
2017 | }, | |
2f7ca802 SG |
2018 | { }, /* END */ |
2019 | }; | |
2020 | MODULE_DEVICE_TABLE(usb, products); | |
2021 | ||
2022 | static struct usb_driver smsc95xx_driver = { | |
2023 | .name = "smsc95xx", | |
2024 | .id_table = products, | |
2025 | .probe = usbnet_probe, | |
b5a04475 | 2026 | .suspend = smsc95xx_suspend, |
e0e474a8 | 2027 | .resume = smsc95xx_resume, |
b4df480f | 2028 | .reset_resume = smsc95xx_reset_resume, |
2f7ca802 | 2029 | .disconnect = usbnet_disconnect, |
e1f12eb6 | 2030 | .disable_hub_initiated_lpm = 1, |
b2d4b150 | 2031 | .supports_autosuspend = 1, |
2f7ca802 SG |
2032 | }; |
2033 | ||
d632eb1b | 2034 | module_usb_driver(smsc95xx_driver); |
2f7ca802 SG |
2035 | |
2036 | MODULE_AUTHOR("Nancy Lin"); | |
90b24cfb | 2037 | MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>"); |
2f7ca802 SG |
2038 | MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices"); |
2039 | MODULE_LICENSE("GPL"); |