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2f7ca802 SG |
1 | /*************************************************************************** |
2 | * | |
3 | * Copyright (C) 2007-2008 SMSC | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License | |
7 | * as published by the Free Software Foundation; either version 2 | |
8 | * of the License, or (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
9cb00073 | 16 | * along with this program; if not, see <http://www.gnu.org/licenses/>. |
2f7ca802 SG |
17 | * |
18 | *****************************************************************************/ | |
19 | ||
20 | #include <linux/module.h> | |
21 | #include <linux/kmod.h> | |
2f7ca802 SG |
22 | #include <linux/netdevice.h> |
23 | #include <linux/etherdevice.h> | |
24 | #include <linux/ethtool.h> | |
25 | #include <linux/mii.h> | |
26 | #include <linux/usb.h> | |
bbd9f9ee SG |
27 | #include <linux/bitrev.h> |
28 | #include <linux/crc16.h> | |
2f7ca802 SG |
29 | #include <linux/crc32.h> |
30 | #include <linux/usb/usbnet.h> | |
5a0e3ad6 | 31 | #include <linux/slab.h> |
c489565b | 32 | #include <linux/of_net.h> |
2f7ca802 SG |
33 | #include "smsc95xx.h" |
34 | ||
35 | #define SMSC_CHIPNAME "smsc95xx" | |
f7b29271 | 36 | #define SMSC_DRIVER_VERSION "1.0.4" |
2f7ca802 SG |
37 | #define HS_USB_PKT_SIZE (512) |
38 | #define FS_USB_PKT_SIZE (64) | |
39 | #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) | |
40 | #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) | |
41 | #define DEFAULT_BULK_IN_DELAY (0x00002000) | |
42 | #define MAX_SINGLE_PACKET_SIZE (2048) | |
43 | #define LAN95XX_EEPROM_MAGIC (0x9500) | |
44 | #define EEPROM_MAC_OFFSET (0x01) | |
f7b29271 | 45 | #define DEFAULT_TX_CSUM_ENABLE (true) |
2f7ca802 SG |
46 | #define DEFAULT_RX_CSUM_ENABLE (true) |
47 | #define SMSC95XX_INTERNAL_PHY_ID (1) | |
48 | #define SMSC95XX_TX_OVERHEAD (8) | |
f7b29271 | 49 | #define SMSC95XX_TX_OVERHEAD_CSUM (12) |
e5e3af83 | 50 | #define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \ |
bbd9f9ee | 51 | WAKE_MCAST | WAKE_ARP | WAKE_MAGIC) |
2f7ca802 | 52 | |
9ebca507 SG |
53 | #define FEATURE_8_WAKEUP_FILTERS (0x01) |
54 | #define FEATURE_PHY_NLP_CROSSOVER (0x02) | |
eb970ff0 | 55 | #define FEATURE_REMOTE_WAKEUP (0x04) |
9ebca507 | 56 | |
b2d4b150 SG |
57 | #define SUSPEND_SUSPEND0 (0x01) |
58 | #define SUSPEND_SUSPEND1 (0x02) | |
59 | #define SUSPEND_SUSPEND2 (0x04) | |
60 | #define SUSPEND_SUSPEND3 (0x08) | |
61 | #define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \ | |
62 | SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3) | |
63 | ||
2f7ca802 SG |
64 | struct smsc95xx_priv { |
65 | u32 mac_cr; | |
3c0f3c60 MZ |
66 | u32 hash_hi; |
67 | u32 hash_lo; | |
e0e474a8 | 68 | u32 wolopts; |
2f7ca802 | 69 | spinlock_t mac_cr_lock; |
9ebca507 | 70 | u8 features; |
b2d4b150 | 71 | u8 suspend_flags; |
2f7ca802 SG |
72 | }; |
73 | ||
eb939922 | 74 | static bool turbo_mode = true; |
2f7ca802 SG |
75 | module_param(turbo_mode, bool, 0644); |
76 | MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); | |
77 | ||
ec32115d ML |
78 | static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index, |
79 | u32 *data, int in_pm) | |
2f7ca802 | 80 | { |
72108fd2 | 81 | u32 buf; |
2f7ca802 | 82 | int ret; |
ec32115d | 83 | int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16); |
2f7ca802 SG |
84 | |
85 | BUG_ON(!dev); | |
86 | ||
ec32115d ML |
87 | if (!in_pm) |
88 | fn = usbnet_read_cmd; | |
89 | else | |
90 | fn = usbnet_read_cmd_nopm; | |
91 | ||
92 | ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN | |
93 | | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
94 | 0, index, &buf, 4); | |
2f7ca802 | 95 | if (unlikely(ret < 0)) |
1e1d7412 JP |
96 | netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n", |
97 | index, ret); | |
2f7ca802 | 98 | |
72108fd2 ML |
99 | le32_to_cpus(&buf); |
100 | *data = buf; | |
2f7ca802 SG |
101 | |
102 | return ret; | |
103 | } | |
104 | ||
ec32115d ML |
105 | static int __must_check __smsc95xx_write_reg(struct usbnet *dev, u32 index, |
106 | u32 data, int in_pm) | |
2f7ca802 | 107 | { |
72108fd2 | 108 | u32 buf; |
2f7ca802 | 109 | int ret; |
ec32115d | 110 | int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16); |
2f7ca802 SG |
111 | |
112 | BUG_ON(!dev); | |
113 | ||
ec32115d ML |
114 | if (!in_pm) |
115 | fn = usbnet_write_cmd; | |
116 | else | |
117 | fn = usbnet_write_cmd_nopm; | |
118 | ||
72108fd2 ML |
119 | buf = data; |
120 | cpu_to_le32s(&buf); | |
2f7ca802 | 121 | |
ec32115d ML |
122 | ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT |
123 | | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
124 | 0, index, &buf, 4); | |
2f7ca802 | 125 | if (unlikely(ret < 0)) |
1e1d7412 JP |
126 | netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n", |
127 | index, ret); | |
2f7ca802 | 128 | |
2f7ca802 SG |
129 | return ret; |
130 | } | |
131 | ||
ec32115d ML |
132 | static int __must_check smsc95xx_read_reg_nopm(struct usbnet *dev, u32 index, |
133 | u32 *data) | |
134 | { | |
135 | return __smsc95xx_read_reg(dev, index, data, 1); | |
136 | } | |
137 | ||
138 | static int __must_check smsc95xx_write_reg_nopm(struct usbnet *dev, u32 index, | |
139 | u32 data) | |
140 | { | |
141 | return __smsc95xx_write_reg(dev, index, data, 1); | |
142 | } | |
143 | ||
144 | static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index, | |
145 | u32 *data) | |
146 | { | |
147 | return __smsc95xx_read_reg(dev, index, data, 0); | |
148 | } | |
149 | ||
150 | static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index, | |
151 | u32 data) | |
152 | { | |
153 | return __smsc95xx_write_reg(dev, index, data, 0); | |
154 | } | |
e0e474a8 | 155 | |
2f7ca802 SG |
156 | /* Loop until the read is completed with timeout |
157 | * called with phy_mutex held */ | |
e5e3af83 SG |
158 | static int __must_check __smsc95xx_phy_wait_not_busy(struct usbnet *dev, |
159 | int in_pm) | |
2f7ca802 SG |
160 | { |
161 | unsigned long start_time = jiffies; | |
162 | u32 val; | |
769ea6d8 | 163 | int ret; |
2f7ca802 SG |
164 | |
165 | do { | |
e5e3af83 | 166 | ret = __smsc95xx_read_reg(dev, MII_ADDR, &val, in_pm); |
b052e073 SG |
167 | if (ret < 0) { |
168 | netdev_warn(dev->net, "Error reading MII_ACCESS\n"); | |
169 | return ret; | |
170 | } | |
171 | ||
2f7ca802 SG |
172 | if (!(val & MII_BUSY_)) |
173 | return 0; | |
174 | } while (!time_after(jiffies, start_time + HZ)); | |
175 | ||
176 | return -EIO; | |
177 | } | |
178 | ||
e5e3af83 SG |
179 | static int __smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx, |
180 | int in_pm) | |
2f7ca802 SG |
181 | { |
182 | struct usbnet *dev = netdev_priv(netdev); | |
183 | u32 val, addr; | |
769ea6d8 | 184 | int ret; |
2f7ca802 SG |
185 | |
186 | mutex_lock(&dev->phy_mutex); | |
187 | ||
188 | /* confirm MII not busy */ | |
e5e3af83 | 189 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
190 | if (ret < 0) { |
191 | netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n"); | |
192 | goto done; | |
193 | } | |
2f7ca802 SG |
194 | |
195 | /* set the address, index & direction (read from PHY) */ | |
196 | phy_id &= dev->mii.phy_id_mask; | |
197 | idx &= dev->mii.reg_num_mask; | |
80928805 | 198 | addr = (phy_id << 11) | (idx << 6) | MII_READ_ | MII_BUSY_; |
e5e3af83 | 199 | ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm); |
b052e073 SG |
200 | if (ret < 0) { |
201 | netdev_warn(dev->net, "Error writing MII_ADDR\n"); | |
202 | goto done; | |
203 | } | |
2f7ca802 | 204 | |
e5e3af83 | 205 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
206 | if (ret < 0) { |
207 | netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); | |
208 | goto done; | |
209 | } | |
2f7ca802 | 210 | |
e5e3af83 | 211 | ret = __smsc95xx_read_reg(dev, MII_DATA, &val, in_pm); |
b052e073 SG |
212 | if (ret < 0) { |
213 | netdev_warn(dev->net, "Error reading MII_DATA\n"); | |
214 | goto done; | |
215 | } | |
2f7ca802 | 216 | |
769ea6d8 | 217 | ret = (u16)(val & 0xFFFF); |
2f7ca802 | 218 | |
769ea6d8 SG |
219 | done: |
220 | mutex_unlock(&dev->phy_mutex); | |
221 | return ret; | |
2f7ca802 SG |
222 | } |
223 | ||
e5e3af83 SG |
224 | static void __smsc95xx_mdio_write(struct net_device *netdev, int phy_id, |
225 | int idx, int regval, int in_pm) | |
2f7ca802 SG |
226 | { |
227 | struct usbnet *dev = netdev_priv(netdev); | |
228 | u32 val, addr; | |
769ea6d8 | 229 | int ret; |
2f7ca802 SG |
230 | |
231 | mutex_lock(&dev->phy_mutex); | |
232 | ||
233 | /* confirm MII not busy */ | |
e5e3af83 | 234 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
235 | if (ret < 0) { |
236 | netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n"); | |
237 | goto done; | |
238 | } | |
2f7ca802 SG |
239 | |
240 | val = regval; | |
e5e3af83 | 241 | ret = __smsc95xx_write_reg(dev, MII_DATA, val, in_pm); |
b052e073 SG |
242 | if (ret < 0) { |
243 | netdev_warn(dev->net, "Error writing MII_DATA\n"); | |
244 | goto done; | |
245 | } | |
2f7ca802 SG |
246 | |
247 | /* set the address, index & direction (write to PHY) */ | |
248 | phy_id &= dev->mii.phy_id_mask; | |
249 | idx &= dev->mii.reg_num_mask; | |
80928805 | 250 | addr = (phy_id << 11) | (idx << 6) | MII_WRITE_ | MII_BUSY_; |
e5e3af83 | 251 | ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm); |
b052e073 SG |
252 | if (ret < 0) { |
253 | netdev_warn(dev->net, "Error writing MII_ADDR\n"); | |
254 | goto done; | |
255 | } | |
2f7ca802 | 256 | |
e5e3af83 | 257 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
258 | if (ret < 0) { |
259 | netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx); | |
260 | goto done; | |
261 | } | |
2f7ca802 | 262 | |
769ea6d8 | 263 | done: |
2f7ca802 SG |
264 | mutex_unlock(&dev->phy_mutex); |
265 | } | |
266 | ||
e5e3af83 SG |
267 | static int smsc95xx_mdio_read_nopm(struct net_device *netdev, int phy_id, |
268 | int idx) | |
269 | { | |
270 | return __smsc95xx_mdio_read(netdev, phy_id, idx, 1); | |
271 | } | |
272 | ||
273 | static void smsc95xx_mdio_write_nopm(struct net_device *netdev, int phy_id, | |
274 | int idx, int regval) | |
275 | { | |
276 | __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 1); | |
277 | } | |
278 | ||
279 | static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx) | |
280 | { | |
281 | return __smsc95xx_mdio_read(netdev, phy_id, idx, 0); | |
282 | } | |
283 | ||
284 | static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx, | |
285 | int regval) | |
286 | { | |
287 | __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 0); | |
288 | } | |
289 | ||
769ea6d8 | 290 | static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev) |
2f7ca802 SG |
291 | { |
292 | unsigned long start_time = jiffies; | |
293 | u32 val; | |
769ea6d8 | 294 | int ret; |
2f7ca802 SG |
295 | |
296 | do { | |
769ea6d8 | 297 | ret = smsc95xx_read_reg(dev, E2P_CMD, &val); |
b052e073 SG |
298 | if (ret < 0) { |
299 | netdev_warn(dev->net, "Error reading E2P_CMD\n"); | |
300 | return ret; | |
301 | } | |
302 | ||
2f7ca802 SG |
303 | if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_)) |
304 | break; | |
305 | udelay(40); | |
306 | } while (!time_after(jiffies, start_time + HZ)); | |
307 | ||
308 | if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) { | |
60b86755 | 309 | netdev_warn(dev->net, "EEPROM read operation timeout\n"); |
2f7ca802 SG |
310 | return -EIO; |
311 | } | |
312 | ||
313 | return 0; | |
314 | } | |
315 | ||
769ea6d8 | 316 | static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev) |
2f7ca802 SG |
317 | { |
318 | unsigned long start_time = jiffies; | |
319 | u32 val; | |
769ea6d8 | 320 | int ret; |
2f7ca802 SG |
321 | |
322 | do { | |
769ea6d8 | 323 | ret = smsc95xx_read_reg(dev, E2P_CMD, &val); |
b052e073 SG |
324 | if (ret < 0) { |
325 | netdev_warn(dev->net, "Error reading E2P_CMD\n"); | |
326 | return ret; | |
327 | } | |
2f7ca802 | 328 | |
2f7ca802 SG |
329 | if (!(val & E2P_CMD_BUSY_)) |
330 | return 0; | |
331 | ||
332 | udelay(40); | |
333 | } while (!time_after(jiffies, start_time + HZ)); | |
334 | ||
60b86755 | 335 | netdev_warn(dev->net, "EEPROM is busy\n"); |
2f7ca802 SG |
336 | return -EIO; |
337 | } | |
338 | ||
339 | static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, | |
340 | u8 *data) | |
341 | { | |
342 | u32 val; | |
343 | int i, ret; | |
344 | ||
345 | BUG_ON(!dev); | |
346 | BUG_ON(!data); | |
347 | ||
348 | ret = smsc95xx_eeprom_confirm_not_busy(dev); | |
349 | if (ret) | |
350 | return ret; | |
351 | ||
352 | for (i = 0; i < length; i++) { | |
353 | val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_); | |
769ea6d8 | 354 | ret = smsc95xx_write_reg(dev, E2P_CMD, val); |
b052e073 SG |
355 | if (ret < 0) { |
356 | netdev_warn(dev->net, "Error writing E2P_CMD\n"); | |
357 | return ret; | |
358 | } | |
2f7ca802 SG |
359 | |
360 | ret = smsc95xx_wait_eeprom(dev); | |
361 | if (ret < 0) | |
362 | return ret; | |
363 | ||
769ea6d8 | 364 | ret = smsc95xx_read_reg(dev, E2P_DATA, &val); |
b052e073 SG |
365 | if (ret < 0) { |
366 | netdev_warn(dev->net, "Error reading E2P_DATA\n"); | |
367 | return ret; | |
368 | } | |
2f7ca802 SG |
369 | |
370 | data[i] = val & 0xFF; | |
371 | offset++; | |
372 | } | |
373 | ||
374 | return 0; | |
375 | } | |
376 | ||
377 | static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, | |
378 | u8 *data) | |
379 | { | |
380 | u32 val; | |
381 | int i, ret; | |
382 | ||
383 | BUG_ON(!dev); | |
384 | BUG_ON(!data); | |
385 | ||
386 | ret = smsc95xx_eeprom_confirm_not_busy(dev); | |
387 | if (ret) | |
388 | return ret; | |
389 | ||
390 | /* Issue write/erase enable command */ | |
391 | val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_; | |
769ea6d8 | 392 | ret = smsc95xx_write_reg(dev, E2P_CMD, val); |
b052e073 SG |
393 | if (ret < 0) { |
394 | netdev_warn(dev->net, "Error writing E2P_DATA\n"); | |
395 | return ret; | |
396 | } | |
2f7ca802 SG |
397 | |
398 | ret = smsc95xx_wait_eeprom(dev); | |
399 | if (ret < 0) | |
400 | return ret; | |
401 | ||
402 | for (i = 0; i < length; i++) { | |
403 | ||
404 | /* Fill data register */ | |
405 | val = data[i]; | |
769ea6d8 | 406 | ret = smsc95xx_write_reg(dev, E2P_DATA, val); |
b052e073 SG |
407 | if (ret < 0) { |
408 | netdev_warn(dev->net, "Error writing E2P_DATA\n"); | |
409 | return ret; | |
410 | } | |
2f7ca802 SG |
411 | |
412 | /* Send "write" command */ | |
413 | val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_); | |
769ea6d8 | 414 | ret = smsc95xx_write_reg(dev, E2P_CMD, val); |
b052e073 SG |
415 | if (ret < 0) { |
416 | netdev_warn(dev->net, "Error writing E2P_CMD\n"); | |
417 | return ret; | |
418 | } | |
2f7ca802 SG |
419 | |
420 | ret = smsc95xx_wait_eeprom(dev); | |
421 | if (ret < 0) | |
422 | return ret; | |
423 | ||
424 | offset++; | |
425 | } | |
426 | ||
427 | return 0; | |
428 | } | |
429 | ||
769ea6d8 | 430 | static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index, |
7b9e7580 | 431 | u32 data) |
2f7ca802 | 432 | { |
1d74a6bd | 433 | const u16 size = 4; |
7b9e7580 | 434 | u32 buf; |
72108fd2 | 435 | int ret; |
2f7ca802 | 436 | |
7b9e7580 SG |
437 | buf = data; |
438 | cpu_to_le32s(&buf); | |
439 | ||
72108fd2 ML |
440 | ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, |
441 | USB_DIR_OUT | USB_TYPE_VENDOR | | |
442 | USB_RECIP_DEVICE, | |
7b9e7580 | 443 | 0, index, &buf, size); |
72108fd2 ML |
444 | if (ret < 0) |
445 | netdev_warn(dev->net, "Error write async cmd, sts=%d\n", | |
446 | ret); | |
447 | return ret; | |
2f7ca802 SG |
448 | } |
449 | ||
450 | /* returns hash bit number for given MAC address | |
451 | * example: | |
452 | * 01 00 5E 00 00 01 -> returns bit number 31 */ | |
453 | static unsigned int smsc95xx_hash(char addr[ETH_ALEN]) | |
454 | { | |
455 | return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; | |
456 | } | |
457 | ||
458 | static void smsc95xx_set_multicast(struct net_device *netdev) | |
459 | { | |
460 | struct usbnet *dev = netdev_priv(netdev); | |
461 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
2f7ca802 | 462 | unsigned long flags; |
769ea6d8 | 463 | int ret; |
2f7ca802 | 464 | |
3c0f3c60 MZ |
465 | pdata->hash_hi = 0; |
466 | pdata->hash_lo = 0; | |
467 | ||
2f7ca802 SG |
468 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); |
469 | ||
470 | if (dev->net->flags & IFF_PROMISC) { | |
a475f603 | 471 | netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n"); |
2f7ca802 SG |
472 | pdata->mac_cr |= MAC_CR_PRMS_; |
473 | pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_); | |
474 | } else if (dev->net->flags & IFF_ALLMULTI) { | |
a475f603 | 475 | netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n"); |
2f7ca802 SG |
476 | pdata->mac_cr |= MAC_CR_MCPAS_; |
477 | pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_); | |
4cd24eaf | 478 | } else if (!netdev_mc_empty(dev->net)) { |
22bedad3 | 479 | struct netdev_hw_addr *ha; |
2f7ca802 SG |
480 | |
481 | pdata->mac_cr |= MAC_CR_HPFILT_; | |
482 | pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); | |
483 | ||
22bedad3 JP |
484 | netdev_for_each_mc_addr(ha, netdev) { |
485 | u32 bitnum = smsc95xx_hash(ha->addr); | |
a92635dc JP |
486 | u32 mask = 0x01 << (bitnum & 0x1F); |
487 | if (bitnum & 0x20) | |
3c0f3c60 | 488 | pdata->hash_hi |= mask; |
a92635dc | 489 | else |
3c0f3c60 | 490 | pdata->hash_lo |= mask; |
2f7ca802 SG |
491 | } |
492 | ||
a475f603 | 493 | netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n", |
3c0f3c60 | 494 | pdata->hash_hi, pdata->hash_lo); |
2f7ca802 | 495 | } else { |
a475f603 | 496 | netif_dbg(dev, drv, dev->net, "receive own packets only\n"); |
2f7ca802 SG |
497 | pdata->mac_cr &= |
498 | ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); | |
499 | } | |
500 | ||
501 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
502 | ||
503 | /* Initiate async writes, as we can't wait for completion here */ | |
7b9e7580 | 504 | ret = smsc95xx_write_reg_async(dev, HASHH, pdata->hash_hi); |
b052e073 SG |
505 | if (ret < 0) |
506 | netdev_warn(dev->net, "failed to initiate async write to HASHH\n"); | |
769ea6d8 | 507 | |
7b9e7580 | 508 | ret = smsc95xx_write_reg_async(dev, HASHL, pdata->hash_lo); |
b052e073 SG |
509 | if (ret < 0) |
510 | netdev_warn(dev->net, "failed to initiate async write to HASHL\n"); | |
769ea6d8 | 511 | |
7b9e7580 | 512 | ret = smsc95xx_write_reg_async(dev, MAC_CR, pdata->mac_cr); |
b052e073 SG |
513 | if (ret < 0) |
514 | netdev_warn(dev->net, "failed to initiate async write to MAC_CR\n"); | |
2f7ca802 SG |
515 | } |
516 | ||
769ea6d8 SG |
517 | static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex, |
518 | u16 lcladv, u16 rmtadv) | |
2f7ca802 SG |
519 | { |
520 | u32 flow, afc_cfg = 0; | |
521 | ||
522 | int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg); | |
e360a8b4 | 523 | if (ret < 0) |
b052e073 | 524 | return ret; |
2f7ca802 SG |
525 | |
526 | if (duplex == DUPLEX_FULL) { | |
bc02ff95 | 527 | u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); |
2f7ca802 SG |
528 | |
529 | if (cap & FLOW_CTRL_RX) | |
530 | flow = 0xFFFF0002; | |
531 | else | |
532 | flow = 0; | |
533 | ||
534 | if (cap & FLOW_CTRL_TX) | |
535 | afc_cfg |= 0xF; | |
536 | else | |
537 | afc_cfg &= ~0xF; | |
538 | ||
a475f603 | 539 | netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n", |
60b86755 JP |
540 | cap & FLOW_CTRL_RX ? "enabled" : "disabled", |
541 | cap & FLOW_CTRL_TX ? "enabled" : "disabled"); | |
2f7ca802 | 542 | } else { |
a475f603 | 543 | netif_dbg(dev, link, dev->net, "half duplex\n"); |
2f7ca802 SG |
544 | flow = 0; |
545 | afc_cfg |= 0xF; | |
546 | } | |
547 | ||
769ea6d8 | 548 | ret = smsc95xx_write_reg(dev, FLOW, flow); |
b052e073 | 549 | if (ret < 0) |
e360a8b4 | 550 | return ret; |
769ea6d8 | 551 | |
e360a8b4 | 552 | return smsc95xx_write_reg(dev, AFC_CFG, afc_cfg); |
2f7ca802 SG |
553 | } |
554 | ||
555 | static int smsc95xx_link_reset(struct usbnet *dev) | |
556 | { | |
557 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
558 | struct mii_if_info *mii = &dev->mii; | |
8ae6daca | 559 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
2f7ca802 SG |
560 | unsigned long flags; |
561 | u16 lcladv, rmtadv; | |
769ea6d8 | 562 | int ret; |
2f7ca802 SG |
563 | |
564 | /* clear interrupt status */ | |
769ea6d8 | 565 | ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC); |
e360a8b4 | 566 | if (ret < 0) |
b052e073 | 567 | return ret; |
769ea6d8 SG |
568 | |
569 | ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); | |
e360a8b4 | 570 | if (ret < 0) |
b052e073 | 571 | return ret; |
2f7ca802 SG |
572 | |
573 | mii_check_media(mii, 1, 1); | |
574 | mii_ethtool_gset(&dev->mii, &ecmd); | |
575 | lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); | |
576 | rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA); | |
577 | ||
8ae6daca DD |
578 | netif_dbg(dev, link, dev->net, |
579 | "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n", | |
580 | ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv); | |
2f7ca802 SG |
581 | |
582 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); | |
583 | if (ecmd.duplex != DUPLEX_FULL) { | |
584 | pdata->mac_cr &= ~MAC_CR_FDPX_; | |
585 | pdata->mac_cr |= MAC_CR_RCVOWN_; | |
586 | } else { | |
587 | pdata->mac_cr &= ~MAC_CR_RCVOWN_; | |
588 | pdata->mac_cr |= MAC_CR_FDPX_; | |
589 | } | |
590 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
591 | ||
769ea6d8 | 592 | ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); |
e360a8b4 | 593 | if (ret < 0) |
b052e073 | 594 | return ret; |
2f7ca802 | 595 | |
769ea6d8 | 596 | ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); |
b052e073 SG |
597 | if (ret < 0) |
598 | netdev_warn(dev->net, "Error updating PHY flow control\n"); | |
2f7ca802 | 599 | |
b052e073 | 600 | return ret; |
2f7ca802 SG |
601 | } |
602 | ||
603 | static void smsc95xx_status(struct usbnet *dev, struct urb *urb) | |
604 | { | |
605 | u32 intdata; | |
606 | ||
607 | if (urb->actual_length != 4) { | |
60b86755 JP |
608 | netdev_warn(dev->net, "unexpected urb length %d\n", |
609 | urb->actual_length); | |
2f7ca802 SG |
610 | return; |
611 | } | |
612 | ||
613 | memcpy(&intdata, urb->transfer_buffer, 4); | |
1d74a6bd | 614 | le32_to_cpus(&intdata); |
2f7ca802 | 615 | |
a475f603 | 616 | netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata); |
2f7ca802 SG |
617 | |
618 | if (intdata & INT_ENP_PHY_INT_) | |
619 | usbnet_defer_kevent(dev, EVENT_LINK_RESET); | |
620 | else | |
60b86755 JP |
621 | netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n", |
622 | intdata); | |
2f7ca802 SG |
623 | } |
624 | ||
f7b29271 | 625 | /* Enable or disable Tx & Rx checksum offload engines */ |
c8f44aff MM |
626 | static int smsc95xx_set_features(struct net_device *netdev, |
627 | netdev_features_t features) | |
2f7ca802 | 628 | { |
78e47fe4 | 629 | struct usbnet *dev = netdev_priv(netdev); |
2f7ca802 | 630 | u32 read_buf; |
78e47fe4 MM |
631 | int ret; |
632 | ||
633 | ret = smsc95xx_read_reg(dev, COE_CR, &read_buf); | |
e360a8b4 | 634 | if (ret < 0) |
b052e073 | 635 | return ret; |
2f7ca802 | 636 | |
78e47fe4 | 637 | if (features & NETIF_F_HW_CSUM) |
f7b29271 SG |
638 | read_buf |= Tx_COE_EN_; |
639 | else | |
640 | read_buf &= ~Tx_COE_EN_; | |
641 | ||
78e47fe4 | 642 | if (features & NETIF_F_RXCSUM) |
2f7ca802 SG |
643 | read_buf |= Rx_COE_EN_; |
644 | else | |
645 | read_buf &= ~Rx_COE_EN_; | |
646 | ||
647 | ret = smsc95xx_write_reg(dev, COE_CR, read_buf); | |
e360a8b4 | 648 | if (ret < 0) |
b052e073 | 649 | return ret; |
2f7ca802 | 650 | |
a475f603 | 651 | netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf); |
2f7ca802 SG |
652 | return 0; |
653 | } | |
654 | ||
655 | static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net) | |
656 | { | |
657 | return MAX_EEPROM_SIZE; | |
658 | } | |
659 | ||
660 | static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev, | |
661 | struct ethtool_eeprom *ee, u8 *data) | |
662 | { | |
663 | struct usbnet *dev = netdev_priv(netdev); | |
664 | ||
665 | ee->magic = LAN95XX_EEPROM_MAGIC; | |
666 | ||
667 | return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data); | |
668 | } | |
669 | ||
670 | static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev, | |
671 | struct ethtool_eeprom *ee, u8 *data) | |
672 | { | |
673 | struct usbnet *dev = netdev_priv(netdev); | |
674 | ||
675 | if (ee->magic != LAN95XX_EEPROM_MAGIC) { | |
60b86755 JP |
676 | netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n", |
677 | ee->magic); | |
2f7ca802 SG |
678 | return -EINVAL; |
679 | } | |
680 | ||
681 | return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data); | |
682 | } | |
683 | ||
9fa32e94 EV |
684 | static int smsc95xx_ethtool_getregslen(struct net_device *netdev) |
685 | { | |
686 | /* all smsc95xx registers */ | |
96245317 | 687 | return COE_CR - ID_REV + sizeof(u32); |
9fa32e94 EV |
688 | } |
689 | ||
690 | static void | |
691 | smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs, | |
692 | void *buf) | |
693 | { | |
694 | struct usbnet *dev = netdev_priv(netdev); | |
d348446b DC |
695 | unsigned int i, j; |
696 | int retval; | |
9fa32e94 EV |
697 | u32 *data = buf; |
698 | ||
699 | retval = smsc95xx_read_reg(dev, ID_REV, ®s->version); | |
700 | if (retval < 0) { | |
701 | netdev_warn(netdev, "REGS: cannot read ID_REV\n"); | |
702 | return; | |
703 | } | |
704 | ||
705 | for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) { | |
706 | retval = smsc95xx_read_reg(dev, i, &data[j]); | |
707 | if (retval < 0) { | |
708 | netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i); | |
709 | return; | |
710 | } | |
711 | } | |
712 | } | |
713 | ||
e0e474a8 SG |
714 | static void smsc95xx_ethtool_get_wol(struct net_device *net, |
715 | struct ethtool_wolinfo *wolinfo) | |
716 | { | |
717 | struct usbnet *dev = netdev_priv(net); | |
718 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
719 | ||
720 | wolinfo->supported = SUPPORTED_WAKE; | |
721 | wolinfo->wolopts = pdata->wolopts; | |
722 | } | |
723 | ||
724 | static int smsc95xx_ethtool_set_wol(struct net_device *net, | |
725 | struct ethtool_wolinfo *wolinfo) | |
726 | { | |
727 | struct usbnet *dev = netdev_priv(net); | |
728 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
3b14692c | 729 | int ret; |
e0e474a8 SG |
730 | |
731 | pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE; | |
3b14692c SG |
732 | |
733 | ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts); | |
b052e073 SG |
734 | if (ret < 0) |
735 | netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret); | |
3b14692c | 736 | |
b052e073 | 737 | return ret; |
e0e474a8 SG |
738 | } |
739 | ||
0fc0b732 | 740 | static const struct ethtool_ops smsc95xx_ethtool_ops = { |
2f7ca802 SG |
741 | .get_link = usbnet_get_link, |
742 | .nway_reset = usbnet_nway_reset, | |
743 | .get_drvinfo = usbnet_get_drvinfo, | |
744 | .get_msglevel = usbnet_get_msglevel, | |
745 | .set_msglevel = usbnet_set_msglevel, | |
746 | .get_settings = usbnet_get_settings, | |
747 | .set_settings = usbnet_set_settings, | |
748 | .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len, | |
749 | .get_eeprom = smsc95xx_ethtool_get_eeprom, | |
750 | .set_eeprom = smsc95xx_ethtool_set_eeprom, | |
9fa32e94 EV |
751 | .get_regs_len = smsc95xx_ethtool_getregslen, |
752 | .get_regs = smsc95xx_ethtool_getregs, | |
e0e474a8 SG |
753 | .get_wol = smsc95xx_ethtool_get_wol, |
754 | .set_wol = smsc95xx_ethtool_set_wol, | |
2f7ca802 SG |
755 | }; |
756 | ||
757 | static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) | |
758 | { | |
759 | struct usbnet *dev = netdev_priv(netdev); | |
760 | ||
761 | if (!netif_running(netdev)) | |
762 | return -EINVAL; | |
763 | ||
764 | return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); | |
765 | } | |
766 | ||
767 | static void smsc95xx_init_mac_address(struct usbnet *dev) | |
768 | { | |
c489565b AB |
769 | const u8 *mac_addr; |
770 | ||
771 | /* maybe the boot loader passed the MAC address in devicetree */ | |
772 | mac_addr = of_get_mac_address(dev->udev->dev.of_node); | |
773 | if (mac_addr) { | |
774 | memcpy(dev->net->dev_addr, mac_addr, ETH_ALEN); | |
775 | return; | |
776 | } | |
777 | ||
2f7ca802 SG |
778 | /* try reading mac address from EEPROM */ |
779 | if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, | |
780 | dev->net->dev_addr) == 0) { | |
781 | if (is_valid_ether_addr(dev->net->dev_addr)) { | |
782 | /* eeprom values are valid so use them */ | |
a475f603 | 783 | netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n"); |
2f7ca802 SG |
784 | return; |
785 | } | |
786 | } | |
787 | ||
c489565b | 788 | /* no useful static MAC address found. generate a random one */ |
f2cedb63 | 789 | eth_hw_addr_random(dev->net); |
c7e12ead | 790 | netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n"); |
2f7ca802 SG |
791 | } |
792 | ||
793 | static int smsc95xx_set_mac_address(struct usbnet *dev) | |
794 | { | |
795 | u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | | |
796 | dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; | |
797 | u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; | |
798 | int ret; | |
799 | ||
800 | ret = smsc95xx_write_reg(dev, ADDRL, addr_lo); | |
b052e073 | 801 | if (ret < 0) |
e360a8b4 | 802 | return ret; |
2f7ca802 | 803 | |
e360a8b4 | 804 | return smsc95xx_write_reg(dev, ADDRH, addr_hi); |
2f7ca802 SG |
805 | } |
806 | ||
807 | /* starts the TX path */ | |
769ea6d8 | 808 | static int smsc95xx_start_tx_path(struct usbnet *dev) |
2f7ca802 SG |
809 | { |
810 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
811 | unsigned long flags; | |
769ea6d8 | 812 | int ret; |
2f7ca802 SG |
813 | |
814 | /* Enable Tx at MAC */ | |
815 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); | |
816 | pdata->mac_cr |= MAC_CR_TXEN_; | |
817 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
818 | ||
769ea6d8 | 819 | ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); |
e360a8b4 | 820 | if (ret < 0) |
b052e073 | 821 | return ret; |
2f7ca802 SG |
822 | |
823 | /* Enable Tx at SCSRs */ | |
e360a8b4 | 824 | return smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_); |
2f7ca802 SG |
825 | } |
826 | ||
827 | /* Starts the Receive path */ | |
ec32115d | 828 | static int smsc95xx_start_rx_path(struct usbnet *dev, int in_pm) |
2f7ca802 SG |
829 | { |
830 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
831 | unsigned long flags; | |
832 | ||
833 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); | |
834 | pdata->mac_cr |= MAC_CR_RXEN_; | |
835 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
836 | ||
e360a8b4 | 837 | return __smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr, in_pm); |
2f7ca802 SG |
838 | } |
839 | ||
840 | static int smsc95xx_phy_initialize(struct usbnet *dev) | |
841 | { | |
769ea6d8 | 842 | int bmcr, ret, timeout = 0; |
db443c44 | 843 | |
2f7ca802 SG |
844 | /* Initialize MII structure */ |
845 | dev->mii.dev = dev->net; | |
846 | dev->mii.mdio_read = smsc95xx_mdio_read; | |
847 | dev->mii.mdio_write = smsc95xx_mdio_write; | |
848 | dev->mii.phy_id_mask = 0x1f; | |
849 | dev->mii.reg_num_mask = 0x1f; | |
850 | dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID; | |
851 | ||
db443c44 | 852 | /* reset phy and wait for reset to complete */ |
2f7ca802 | 853 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); |
db443c44 SG |
854 | |
855 | do { | |
856 | msleep(10); | |
857 | bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); | |
858 | timeout++; | |
d9460920 | 859 | } while ((bmcr & BMCR_RESET) && (timeout < 100)); |
db443c44 SG |
860 | |
861 | if (timeout >= 100) { | |
862 | netdev_warn(dev->net, "timeout on PHY Reset"); | |
863 | return -EIO; | |
864 | } | |
865 | ||
2f7ca802 SG |
866 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, |
867 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | | |
868 | ADVERTISE_PAUSE_ASYM); | |
869 | ||
870 | /* read to clear */ | |
769ea6d8 | 871 | ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); |
b052e073 SG |
872 | if (ret < 0) { |
873 | netdev_warn(dev->net, "Failed to read PHY_INT_SRC during init\n"); | |
874 | return ret; | |
875 | } | |
2f7ca802 SG |
876 | |
877 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, | |
878 | PHY_INT_MASK_DEFAULT_); | |
879 | mii_nway_restart(&dev->mii); | |
880 | ||
a475f603 | 881 | netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n"); |
2f7ca802 SG |
882 | return 0; |
883 | } | |
884 | ||
885 | static int smsc95xx_reset(struct usbnet *dev) | |
886 | { | |
887 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
888 | u32 read_buf, write_buf, burst_cap; | |
889 | int ret = 0, timeout; | |
2f7ca802 | 890 | |
a475f603 | 891 | netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n"); |
2f7ca802 | 892 | |
4436761b | 893 | ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_); |
e360a8b4 | 894 | if (ret < 0) |
b052e073 | 895 | return ret; |
2f7ca802 SG |
896 | |
897 | timeout = 0; | |
898 | do { | |
cf2acec2 | 899 | msleep(10); |
2f7ca802 | 900 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); |
e360a8b4 | 901 | if (ret < 0) |
b052e073 | 902 | return ret; |
2f7ca802 SG |
903 | timeout++; |
904 | } while ((read_buf & HW_CFG_LRST_) && (timeout < 100)); | |
905 | ||
906 | if (timeout >= 100) { | |
60b86755 | 907 | netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n"); |
2f7ca802 SG |
908 | return ret; |
909 | } | |
910 | ||
4436761b | 911 | ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_); |
e360a8b4 | 912 | if (ret < 0) |
b052e073 | 913 | return ret; |
2f7ca802 SG |
914 | |
915 | timeout = 0; | |
916 | do { | |
cf2acec2 | 917 | msleep(10); |
2f7ca802 | 918 | ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf); |
e360a8b4 | 919 | if (ret < 0) |
b052e073 | 920 | return ret; |
2f7ca802 SG |
921 | timeout++; |
922 | } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100)); | |
923 | ||
924 | if (timeout >= 100) { | |
60b86755 | 925 | netdev_warn(dev->net, "timeout waiting for PHY Reset\n"); |
2f7ca802 SG |
926 | return ret; |
927 | } | |
928 | ||
2f7ca802 SG |
929 | ret = smsc95xx_set_mac_address(dev); |
930 | if (ret < 0) | |
931 | return ret; | |
932 | ||
1e1d7412 JP |
933 | netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n", |
934 | dev->net->dev_addr); | |
2f7ca802 SG |
935 | |
936 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 937 | if (ret < 0) |
b052e073 | 938 | return ret; |
2f7ca802 | 939 | |
1e1d7412 JP |
940 | netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n", |
941 | read_buf); | |
2f7ca802 SG |
942 | |
943 | read_buf |= HW_CFG_BIR_; | |
944 | ||
945 | ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); | |
e360a8b4 | 946 | if (ret < 0) |
b052e073 | 947 | return ret; |
2f7ca802 SG |
948 | |
949 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 950 | if (ret < 0) |
b052e073 | 951 | return ret; |
b052e073 | 952 | |
a475f603 JP |
953 | netif_dbg(dev, ifup, dev->net, |
954 | "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n", | |
955 | read_buf); | |
2f7ca802 SG |
956 | |
957 | if (!turbo_mode) { | |
958 | burst_cap = 0; | |
959 | dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; | |
960 | } else if (dev->udev->speed == USB_SPEED_HIGH) { | |
961 | burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; | |
962 | dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; | |
963 | } else { | |
964 | burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; | |
965 | dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; | |
966 | } | |
967 | ||
1e1d7412 JP |
968 | netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n", |
969 | (ulong)dev->rx_urb_size); | |
2f7ca802 SG |
970 | |
971 | ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap); | |
e360a8b4 | 972 | if (ret < 0) |
b052e073 | 973 | return ret; |
2f7ca802 SG |
974 | |
975 | ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf); | |
e360a8b4 | 976 | if (ret < 0) |
b052e073 | 977 | return ret; |
769ea6d8 | 978 | |
a475f603 JP |
979 | netif_dbg(dev, ifup, dev->net, |
980 | "Read Value from BURST_CAP after writing: 0x%08x\n", | |
981 | read_buf); | |
2f7ca802 | 982 | |
4436761b | 983 | ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); |
e360a8b4 | 984 | if (ret < 0) |
b052e073 | 985 | return ret; |
2f7ca802 SG |
986 | |
987 | ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf); | |
e360a8b4 | 988 | if (ret < 0) |
b052e073 | 989 | return ret; |
769ea6d8 | 990 | |
a475f603 JP |
991 | netif_dbg(dev, ifup, dev->net, |
992 | "Read Value from BULK_IN_DLY after writing: 0x%08x\n", | |
993 | read_buf); | |
2f7ca802 SG |
994 | |
995 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 996 | if (ret < 0) |
b052e073 | 997 | return ret; |
769ea6d8 | 998 | |
1e1d7412 JP |
999 | netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG: 0x%08x\n", |
1000 | read_buf); | |
2f7ca802 SG |
1001 | |
1002 | if (turbo_mode) | |
1003 | read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_); | |
1004 | ||
1005 | read_buf &= ~HW_CFG_RXDOFF_; | |
1006 | ||
1007 | /* set Rx data offset=2, Make IP header aligns on word boundary. */ | |
1008 | read_buf |= NET_IP_ALIGN << 9; | |
1009 | ||
1010 | ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); | |
e360a8b4 | 1011 | if (ret < 0) |
b052e073 | 1012 | return ret; |
2f7ca802 SG |
1013 | |
1014 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 1015 | if (ret < 0) |
b052e073 | 1016 | return ret; |
769ea6d8 | 1017 | |
a475f603 JP |
1018 | netif_dbg(dev, ifup, dev->net, |
1019 | "Read Value from HW_CFG after writing: 0x%08x\n", read_buf); | |
2f7ca802 | 1020 | |
4436761b | 1021 | ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); |
e360a8b4 | 1022 | if (ret < 0) |
b052e073 | 1023 | return ret; |
2f7ca802 SG |
1024 | |
1025 | ret = smsc95xx_read_reg(dev, ID_REV, &read_buf); | |
e360a8b4 | 1026 | if (ret < 0) |
b052e073 | 1027 | return ret; |
a475f603 | 1028 | netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf); |
2f7ca802 | 1029 | |
f293501c SG |
1030 | /* Configure GPIO pins as LED outputs */ |
1031 | write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED | | |
1032 | LED_GPIO_CFG_FDX_LED; | |
1033 | ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf); | |
e360a8b4 | 1034 | if (ret < 0) |
b052e073 | 1035 | return ret; |
f293501c | 1036 | |
2f7ca802 | 1037 | /* Init Tx */ |
4436761b | 1038 | ret = smsc95xx_write_reg(dev, FLOW, 0); |
e360a8b4 | 1039 | if (ret < 0) |
b052e073 | 1040 | return ret; |
2f7ca802 | 1041 | |
4436761b | 1042 | ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT); |
e360a8b4 | 1043 | if (ret < 0) |
b052e073 | 1044 | return ret; |
2f7ca802 SG |
1045 | |
1046 | /* Don't need mac_cr_lock during initialisation */ | |
1047 | ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr); | |
e360a8b4 | 1048 | if (ret < 0) |
b052e073 | 1049 | return ret; |
2f7ca802 SG |
1050 | |
1051 | /* Init Rx */ | |
1052 | /* Set Vlan */ | |
4436761b | 1053 | ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q); |
e360a8b4 | 1054 | if (ret < 0) |
b052e073 | 1055 | return ret; |
2f7ca802 | 1056 | |
f7b29271 | 1057 | /* Enable or disable checksum offload engines */ |
769ea6d8 | 1058 | ret = smsc95xx_set_features(dev->net, dev->net->features); |
b052e073 SG |
1059 | if (ret < 0) { |
1060 | netdev_warn(dev->net, "Failed to set checksum offload features\n"); | |
1061 | return ret; | |
1062 | } | |
2f7ca802 SG |
1063 | |
1064 | smsc95xx_set_multicast(dev->net); | |
1065 | ||
769ea6d8 | 1066 | ret = smsc95xx_phy_initialize(dev); |
b052e073 SG |
1067 | if (ret < 0) { |
1068 | netdev_warn(dev->net, "Failed to init PHY\n"); | |
1069 | return ret; | |
1070 | } | |
2f7ca802 SG |
1071 | |
1072 | ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf); | |
e360a8b4 | 1073 | if (ret < 0) |
b052e073 | 1074 | return ret; |
2f7ca802 SG |
1075 | |
1076 | /* enable PHY interrupts */ | |
1077 | read_buf |= INT_EP_CTL_PHY_INT_; | |
1078 | ||
1079 | ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf); | |
e360a8b4 | 1080 | if (ret < 0) |
b052e073 | 1081 | return ret; |
2f7ca802 | 1082 | |
769ea6d8 | 1083 | ret = smsc95xx_start_tx_path(dev); |
b052e073 SG |
1084 | if (ret < 0) { |
1085 | netdev_warn(dev->net, "Failed to start TX path\n"); | |
1086 | return ret; | |
1087 | } | |
769ea6d8 | 1088 | |
ec32115d | 1089 | ret = smsc95xx_start_rx_path(dev, 0); |
b052e073 SG |
1090 | if (ret < 0) { |
1091 | netdev_warn(dev->net, "Failed to start RX path\n"); | |
1092 | return ret; | |
1093 | } | |
2f7ca802 | 1094 | |
a475f603 | 1095 | netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n"); |
2f7ca802 SG |
1096 | return 0; |
1097 | } | |
1098 | ||
63e77b39 SH |
1099 | static const struct net_device_ops smsc95xx_netdev_ops = { |
1100 | .ndo_open = usbnet_open, | |
1101 | .ndo_stop = usbnet_stop, | |
1102 | .ndo_start_xmit = usbnet_start_xmit, | |
1103 | .ndo_tx_timeout = usbnet_tx_timeout, | |
1104 | .ndo_change_mtu = usbnet_change_mtu, | |
1105 | .ndo_set_mac_address = eth_mac_addr, | |
1106 | .ndo_validate_addr = eth_validate_addr, | |
1107 | .ndo_do_ioctl = smsc95xx_ioctl, | |
afc4b13d | 1108 | .ndo_set_rx_mode = smsc95xx_set_multicast, |
78e47fe4 | 1109 | .ndo_set_features = smsc95xx_set_features, |
63e77b39 SH |
1110 | }; |
1111 | ||
2f7ca802 SG |
1112 | static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf) |
1113 | { | |
1114 | struct smsc95xx_priv *pdata = NULL; | |
bbd9f9ee | 1115 | u32 val; |
2f7ca802 SG |
1116 | int ret; |
1117 | ||
1118 | printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); | |
1119 | ||
1120 | ret = usbnet_get_endpoints(dev, intf); | |
b052e073 SG |
1121 | if (ret < 0) { |
1122 | netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret); | |
1123 | return ret; | |
1124 | } | |
2f7ca802 SG |
1125 | |
1126 | dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv), | |
38673c82 | 1127 | GFP_KERNEL); |
2f7ca802 SG |
1128 | |
1129 | pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
38673c82 | 1130 | if (!pdata) |
2f7ca802 | 1131 | return -ENOMEM; |
2f7ca802 SG |
1132 | |
1133 | spin_lock_init(&pdata->mac_cr_lock); | |
1134 | ||
78e47fe4 MM |
1135 | if (DEFAULT_TX_CSUM_ENABLE) |
1136 | dev->net->features |= NETIF_F_HW_CSUM; | |
1137 | if (DEFAULT_RX_CSUM_ENABLE) | |
1138 | dev->net->features |= NETIF_F_RXCSUM; | |
1139 | ||
1140 | dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM; | |
2f7ca802 | 1141 | |
f4e8ab7c BB |
1142 | smsc95xx_init_mac_address(dev); |
1143 | ||
2f7ca802 SG |
1144 | /* Init all registers */ |
1145 | ret = smsc95xx_reset(dev); | |
1146 | ||
bbd9f9ee SG |
1147 | /* detect device revision as different features may be available */ |
1148 | ret = smsc95xx_read_reg(dev, ID_REV, &val); | |
e360a8b4 | 1149 | if (ret < 0) |
b052e073 | 1150 | return ret; |
bbd9f9ee | 1151 | val >>= 16; |
9ebca507 SG |
1152 | |
1153 | if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9530_) || | |
1154 | (val == ID_REV_CHIP_ID_89530_) || (val == ID_REV_CHIP_ID_9730_)) | |
1155 | pdata->features = (FEATURE_8_WAKEUP_FILTERS | | |
1156 | FEATURE_PHY_NLP_CROSSOVER | | |
eb970ff0 | 1157 | FEATURE_REMOTE_WAKEUP); |
9ebca507 SG |
1158 | else if (val == ID_REV_CHIP_ID_9512_) |
1159 | pdata->features = FEATURE_8_WAKEUP_FILTERS; | |
bbd9f9ee | 1160 | |
63e77b39 | 1161 | dev->net->netdev_ops = &smsc95xx_netdev_ops; |
2f7ca802 | 1162 | dev->net->ethtool_ops = &smsc95xx_ethtool_ops; |
2f7ca802 | 1163 | dev->net->flags |= IFF_MULTICAST; |
78e47fe4 | 1164 | dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM; |
9bbf5660 | 1165 | dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; |
2f7ca802 SG |
1166 | return 0; |
1167 | } | |
1168 | ||
1169 | static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf) | |
1170 | { | |
1171 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1172 | if (pdata) { | |
a475f603 | 1173 | netif_dbg(dev, ifdown, dev->net, "free pdata\n"); |
2f7ca802 SG |
1174 | kfree(pdata); |
1175 | pdata = NULL; | |
1176 | dev->data[0] = 0; | |
1177 | } | |
1178 | } | |
1179 | ||
068bb1a7 | 1180 | static u32 smsc_crc(const u8 *buffer, size_t len, int filter) |
bbd9f9ee | 1181 | { |
068bb1a7 SG |
1182 | u32 crc = bitrev16(crc16(0xFFFF, buffer, len)); |
1183 | return crc << ((filter % 2) * 16); | |
bbd9f9ee SG |
1184 | } |
1185 | ||
e5e3af83 SG |
1186 | static int smsc95xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask) |
1187 | { | |
1188 | struct mii_if_info *mii = &dev->mii; | |
1189 | int ret; | |
1190 | ||
1e1d7412 | 1191 | netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n"); |
e5e3af83 SG |
1192 | |
1193 | /* read to clear */ | |
1194 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC); | |
e360a8b4 | 1195 | if (ret < 0) |
b052e073 | 1196 | return ret; |
e5e3af83 SG |
1197 | |
1198 | /* enable interrupt source */ | |
1199 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK); | |
e360a8b4 | 1200 | if (ret < 0) |
b052e073 | 1201 | return ret; |
e5e3af83 SG |
1202 | |
1203 | ret |= mask; | |
1204 | ||
1205 | smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret); | |
1206 | ||
1207 | return 0; | |
1208 | } | |
1209 | ||
1210 | static int smsc95xx_link_ok_nopm(struct usbnet *dev) | |
1211 | { | |
1212 | struct mii_if_info *mii = &dev->mii; | |
1213 | int ret; | |
1214 | ||
1215 | /* first, a dummy read, needed to latch some MII phys */ | |
1216 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); | |
e360a8b4 | 1217 | if (ret < 0) |
b052e073 | 1218 | return ret; |
e5e3af83 SG |
1219 | |
1220 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); | |
e360a8b4 | 1221 | if (ret < 0) |
b052e073 | 1222 | return ret; |
e5e3af83 SG |
1223 | |
1224 | return !!(ret & BMSR_LSTATUS); | |
1225 | } | |
1226 | ||
319b95b5 SG |
1227 | static int smsc95xx_enter_suspend0(struct usbnet *dev) |
1228 | { | |
1229 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1230 | u32 val; | |
1231 | int ret; | |
1232 | ||
1233 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
e360a8b4 | 1234 | if (ret < 0) |
b052e073 | 1235 | return ret; |
319b95b5 SG |
1236 | |
1237 | val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_)); | |
1238 | val |= PM_CTL_SUS_MODE_0; | |
1239 | ||
1240 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
e360a8b4 | 1241 | if (ret < 0) |
b052e073 | 1242 | return ret; |
319b95b5 SG |
1243 | |
1244 | /* clear wol status */ | |
1245 | val &= ~PM_CTL_WUPS_; | |
1246 | val |= PM_CTL_WUPS_WOL_; | |
1247 | ||
1248 | /* enable energy detection */ | |
1249 | if (pdata->wolopts & WAKE_PHY) | |
1250 | val |= PM_CTL_WUPS_ED_; | |
1251 | ||
1252 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
e360a8b4 | 1253 | if (ret < 0) |
b052e073 | 1254 | return ret; |
319b95b5 SG |
1255 | |
1256 | /* read back PM_CTRL */ | |
1257 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
76437214 ML |
1258 | if (ret < 0) |
1259 | return ret; | |
319b95b5 | 1260 | |
b2d4b150 SG |
1261 | pdata->suspend_flags |= SUSPEND_SUSPEND0; |
1262 | ||
76437214 | 1263 | return 0; |
319b95b5 SG |
1264 | } |
1265 | ||
1266 | static int smsc95xx_enter_suspend1(struct usbnet *dev) | |
1267 | { | |
1268 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1269 | struct mii_if_info *mii = &dev->mii; | |
1270 | u32 val; | |
1271 | int ret; | |
1272 | ||
1273 | /* reconfigure link pulse detection timing for | |
1274 | * compatibility with non-standard link partners | |
1275 | */ | |
1276 | if (pdata->features & FEATURE_PHY_NLP_CROSSOVER) | |
1277 | smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_EDPD_CONFIG, | |
1278 | PHY_EDPD_CONFIG_DEFAULT); | |
1279 | ||
1280 | /* enable energy detect power-down mode */ | |
1281 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS); | |
e360a8b4 | 1282 | if (ret < 0) |
b052e073 | 1283 | return ret; |
319b95b5 SG |
1284 | |
1285 | ret |= MODE_CTRL_STS_EDPWRDOWN_; | |
1286 | ||
1287 | smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS, ret); | |
1288 | ||
1289 | /* enter SUSPEND1 mode */ | |
1290 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
e360a8b4 | 1291 | if (ret < 0) |
b052e073 | 1292 | return ret; |
319b95b5 SG |
1293 | |
1294 | val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); | |
1295 | val |= PM_CTL_SUS_MODE_1; | |
1296 | ||
1297 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
e360a8b4 | 1298 | if (ret < 0) |
b052e073 | 1299 | return ret; |
319b95b5 SG |
1300 | |
1301 | /* clear wol status, enable energy detection */ | |
1302 | val &= ~PM_CTL_WUPS_; | |
1303 | val |= (PM_CTL_WUPS_ED_ | PM_CTL_ED_EN_); | |
1304 | ||
1305 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
76437214 ML |
1306 | if (ret < 0) |
1307 | return ret; | |
319b95b5 | 1308 | |
b2d4b150 SG |
1309 | pdata->suspend_flags |= SUSPEND_SUSPEND1; |
1310 | ||
76437214 | 1311 | return 0; |
319b95b5 SG |
1312 | } |
1313 | ||
1314 | static int smsc95xx_enter_suspend2(struct usbnet *dev) | |
1315 | { | |
b2d4b150 | 1316 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); |
319b95b5 SG |
1317 | u32 val; |
1318 | int ret; | |
1319 | ||
1320 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
e360a8b4 | 1321 | if (ret < 0) |
b052e073 | 1322 | return ret; |
319b95b5 SG |
1323 | |
1324 | val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); | |
1325 | val |= PM_CTL_SUS_MODE_2; | |
1326 | ||
1327 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
76437214 ML |
1328 | if (ret < 0) |
1329 | return ret; | |
319b95b5 | 1330 | |
b2d4b150 SG |
1331 | pdata->suspend_flags |= SUSPEND_SUSPEND2; |
1332 | ||
76437214 | 1333 | return 0; |
319b95b5 SG |
1334 | } |
1335 | ||
b2d4b150 SG |
1336 | static int smsc95xx_enter_suspend3(struct usbnet *dev) |
1337 | { | |
1338 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1339 | u32 val; | |
1340 | int ret; | |
1341 | ||
1342 | ret = smsc95xx_read_reg_nopm(dev, RX_FIFO_INF, &val); | |
1343 | if (ret < 0) | |
1344 | return ret; | |
1345 | ||
1346 | if (val & 0xFFFF) { | |
1347 | netdev_info(dev->net, "rx fifo not empty in autosuspend\n"); | |
1348 | return -EBUSY; | |
1349 | } | |
1350 | ||
1351 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
1352 | if (ret < 0) | |
1353 | return ret; | |
1354 | ||
1355 | val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); | |
1356 | val |= PM_CTL_SUS_MODE_3 | PM_CTL_RES_CLR_WKP_STS; | |
1357 | ||
1358 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
1359 | if (ret < 0) | |
1360 | return ret; | |
1361 | ||
1362 | /* clear wol status */ | |
1363 | val &= ~PM_CTL_WUPS_; | |
1364 | val |= PM_CTL_WUPS_WOL_; | |
1365 | ||
1366 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
1367 | if (ret < 0) | |
1368 | return ret; | |
1369 | ||
1370 | pdata->suspend_flags |= SUSPEND_SUSPEND3; | |
1371 | ||
1372 | return 0; | |
1373 | } | |
1374 | ||
1375 | static int smsc95xx_autosuspend(struct usbnet *dev, u32 link_up) | |
1376 | { | |
1377 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1378 | int ret; | |
1379 | ||
1380 | if (!netif_running(dev->net)) { | |
1381 | /* interface is ifconfig down so fully power down hw */ | |
1382 | netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n"); | |
1383 | return smsc95xx_enter_suspend2(dev); | |
1384 | } | |
1385 | ||
1386 | if (!link_up) { | |
1387 | /* link is down so enter EDPD mode, but only if device can | |
1388 | * reliably resume from it. This check should be redundant | |
eb970ff0 | 1389 | * as current FEATURE_REMOTE_WAKEUP parts also support |
b2d4b150 SG |
1390 | * FEATURE_PHY_NLP_CROSSOVER but it's included for clarity */ |
1391 | if (!(pdata->features & FEATURE_PHY_NLP_CROSSOVER)) { | |
1392 | netdev_warn(dev->net, "EDPD not supported\n"); | |
1393 | return -EBUSY; | |
1394 | } | |
1395 | ||
1396 | netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n"); | |
1397 | ||
1398 | /* enable PHY wakeup events for if cable is attached */ | |
1399 | ret = smsc95xx_enable_phy_wakeup_interrupts(dev, | |
1400 | PHY_INT_MASK_ANEG_COMP_); | |
1401 | if (ret < 0) { | |
1402 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1403 | return ret; | |
1404 | } | |
1405 | ||
1406 | netdev_info(dev->net, "entering SUSPEND1 mode\n"); | |
1407 | return smsc95xx_enter_suspend1(dev); | |
1408 | } | |
1409 | ||
1410 | /* enable PHY wakeup events so we remote wakeup if cable is pulled */ | |
1411 | ret = smsc95xx_enable_phy_wakeup_interrupts(dev, | |
1412 | PHY_INT_MASK_LINK_DOWN_); | |
1413 | if (ret < 0) { | |
1414 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1415 | return ret; | |
1416 | } | |
1417 | ||
1418 | netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n"); | |
1419 | return smsc95xx_enter_suspend3(dev); | |
1420 | } | |
1421 | ||
b5a04475 SG |
1422 | static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message) |
1423 | { | |
1424 | struct usbnet *dev = usb_get_intfdata(intf); | |
e0e474a8 | 1425 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); |
e5e3af83 | 1426 | u32 val, link_up; |
b5a04475 | 1427 | int ret; |
b5a04475 | 1428 | |
b5a04475 | 1429 | ret = usbnet_suspend(intf, message); |
b052e073 SG |
1430 | if (ret < 0) { |
1431 | netdev_warn(dev->net, "usbnet_suspend error\n"); | |
1432 | return ret; | |
1433 | } | |
b5a04475 | 1434 | |
b2d4b150 SG |
1435 | if (pdata->suspend_flags) { |
1436 | netdev_warn(dev->net, "error during last resume\n"); | |
1437 | pdata->suspend_flags = 0; | |
1438 | } | |
1439 | ||
e5e3af83 SG |
1440 | /* determine if link is up using only _nopm functions */ |
1441 | link_up = smsc95xx_link_ok_nopm(dev); | |
1442 | ||
42e21c01 | 1443 | if (message.event == PM_EVENT_AUTO_SUSPEND && |
eb970ff0 | 1444 | (pdata->features & FEATURE_REMOTE_WAKEUP)) { |
b2d4b150 SG |
1445 | ret = smsc95xx_autosuspend(dev, link_up); |
1446 | goto done; | |
1447 | } | |
1448 | ||
1449 | /* if we get this far we're not autosuspending */ | |
e5e3af83 SG |
1450 | /* if no wol options set, or if link is down and we're not waking on |
1451 | * PHY activity, enter lowest power SUSPEND2 mode | |
1452 | */ | |
1453 | if (!(pdata->wolopts & SUPPORTED_WAKE) || | |
1454 | !(link_up || (pdata->wolopts & WAKE_PHY))) { | |
1e1d7412 | 1455 | netdev_info(dev->net, "entering SUSPEND2 mode\n"); |
e0e474a8 SG |
1456 | |
1457 | /* disable energy detect (link up) & wake up events */ | |
ec32115d | 1458 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1459 | if (ret < 0) |
b052e073 | 1460 | goto done; |
e0e474a8 SG |
1461 | |
1462 | val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_); | |
1463 | ||
ec32115d | 1464 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1465 | if (ret < 0) |
b052e073 | 1466 | goto done; |
e0e474a8 | 1467 | |
ec32115d | 1468 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); |
e360a8b4 | 1469 | if (ret < 0) |
b052e073 | 1470 | goto done; |
e0e474a8 SG |
1471 | |
1472 | val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_); | |
1473 | ||
ec32115d | 1474 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); |
e360a8b4 | 1475 | if (ret < 0) |
b052e073 | 1476 | goto done; |
e0e474a8 | 1477 | |
3b9f7d8c SG |
1478 | ret = smsc95xx_enter_suspend2(dev); |
1479 | goto done; | |
e0e474a8 SG |
1480 | } |
1481 | ||
e5e3af83 SG |
1482 | if (pdata->wolopts & WAKE_PHY) { |
1483 | ret = smsc95xx_enable_phy_wakeup_interrupts(dev, | |
1484 | (PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_LINK_DOWN_)); | |
b052e073 SG |
1485 | if (ret < 0) { |
1486 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1487 | goto done; | |
1488 | } | |
e5e3af83 SG |
1489 | |
1490 | /* if link is down then configure EDPD and enter SUSPEND1, | |
1491 | * otherwise enter SUSPEND0 below | |
1492 | */ | |
1493 | if (!link_up) { | |
1e1d7412 | 1494 | netdev_info(dev->net, "entering SUSPEND1 mode\n"); |
3b9f7d8c SG |
1495 | ret = smsc95xx_enter_suspend1(dev); |
1496 | goto done; | |
e5e3af83 SG |
1497 | } |
1498 | } | |
1499 | ||
bbd9f9ee | 1500 | if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) { |
eed9a729 | 1501 | u32 *filter_mask = kzalloc(sizeof(u32) * 32, GFP_KERNEL); |
06a221be ML |
1502 | u32 command[2]; |
1503 | u32 offset[2]; | |
1504 | u32 crc[4]; | |
9ebca507 SG |
1505 | int wuff_filter_count = |
1506 | (pdata->features & FEATURE_8_WAKEUP_FILTERS) ? | |
1507 | LAN9500A_WUFF_NUM : LAN9500_WUFF_NUM; | |
bbd9f9ee SG |
1508 | int i, filter = 0; |
1509 | ||
eed9a729 SG |
1510 | if (!filter_mask) { |
1511 | netdev_warn(dev->net, "Unable to allocate filter_mask\n"); | |
3b9f7d8c SG |
1512 | ret = -ENOMEM; |
1513 | goto done; | |
eed9a729 SG |
1514 | } |
1515 | ||
06a221be ML |
1516 | memset(command, 0, sizeof(command)); |
1517 | memset(offset, 0, sizeof(offset)); | |
1518 | memset(crc, 0, sizeof(crc)); | |
1519 | ||
bbd9f9ee SG |
1520 | if (pdata->wolopts & WAKE_BCAST) { |
1521 | const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}; | |
1e1d7412 | 1522 | netdev_info(dev->net, "enabling broadcast detection\n"); |
bbd9f9ee SG |
1523 | filter_mask[filter * 4] = 0x003F; |
1524 | filter_mask[filter * 4 + 1] = 0x00; | |
1525 | filter_mask[filter * 4 + 2] = 0x00; | |
1526 | filter_mask[filter * 4 + 3] = 0x00; | |
1527 | command[filter/4] |= 0x05UL << ((filter % 4) * 8); | |
1528 | offset[filter/4] |= 0x00 << ((filter % 4) * 8); | |
1529 | crc[filter/2] |= smsc_crc(bcast, 6, filter); | |
1530 | filter++; | |
1531 | } | |
1532 | ||
1533 | if (pdata->wolopts & WAKE_MCAST) { | |
1534 | const u8 mcast[] = {0x01, 0x00, 0x5E}; | |
1e1d7412 | 1535 | netdev_info(dev->net, "enabling multicast detection\n"); |
bbd9f9ee SG |
1536 | filter_mask[filter * 4] = 0x0007; |
1537 | filter_mask[filter * 4 + 1] = 0x00; | |
1538 | filter_mask[filter * 4 + 2] = 0x00; | |
1539 | filter_mask[filter * 4 + 3] = 0x00; | |
1540 | command[filter/4] |= 0x09UL << ((filter % 4) * 8); | |
1541 | offset[filter/4] |= 0x00 << ((filter % 4) * 8); | |
1542 | crc[filter/2] |= smsc_crc(mcast, 3, filter); | |
1543 | filter++; | |
1544 | } | |
1545 | ||
1546 | if (pdata->wolopts & WAKE_ARP) { | |
1547 | const u8 arp[] = {0x08, 0x06}; | |
1e1d7412 | 1548 | netdev_info(dev->net, "enabling ARP detection\n"); |
bbd9f9ee SG |
1549 | filter_mask[filter * 4] = 0x0003; |
1550 | filter_mask[filter * 4 + 1] = 0x00; | |
1551 | filter_mask[filter * 4 + 2] = 0x00; | |
1552 | filter_mask[filter * 4 + 3] = 0x00; | |
1553 | command[filter/4] |= 0x05UL << ((filter % 4) * 8); | |
1554 | offset[filter/4] |= 0x0C << ((filter % 4) * 8); | |
1555 | crc[filter/2] |= smsc_crc(arp, 2, filter); | |
1556 | filter++; | |
1557 | } | |
1558 | ||
1559 | if (pdata->wolopts & WAKE_UCAST) { | |
1e1d7412 | 1560 | netdev_info(dev->net, "enabling unicast detection\n"); |
bbd9f9ee SG |
1561 | filter_mask[filter * 4] = 0x003F; |
1562 | filter_mask[filter * 4 + 1] = 0x00; | |
1563 | filter_mask[filter * 4 + 2] = 0x00; | |
1564 | filter_mask[filter * 4 + 3] = 0x00; | |
1565 | command[filter/4] |= 0x01UL << ((filter % 4) * 8); | |
1566 | offset[filter/4] |= 0x00 << ((filter % 4) * 8); | |
1567 | crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter); | |
1568 | filter++; | |
1569 | } | |
1570 | ||
9ebca507 | 1571 | for (i = 0; i < (wuff_filter_count * 4); i++) { |
ec32115d | 1572 | ret = smsc95xx_write_reg_nopm(dev, WUFF, filter_mask[i]); |
b052e073 | 1573 | if (ret < 0) { |
06a221be | 1574 | kfree(filter_mask); |
b052e073 SG |
1575 | goto done; |
1576 | } | |
bbd9f9ee | 1577 | } |
06a221be | 1578 | kfree(filter_mask); |
bbd9f9ee | 1579 | |
9ebca507 | 1580 | for (i = 0; i < (wuff_filter_count / 4); i++) { |
ec32115d | 1581 | ret = smsc95xx_write_reg_nopm(dev, WUFF, command[i]); |
e360a8b4 | 1582 | if (ret < 0) |
b052e073 | 1583 | goto done; |
bbd9f9ee SG |
1584 | } |
1585 | ||
9ebca507 | 1586 | for (i = 0; i < (wuff_filter_count / 4); i++) { |
ec32115d | 1587 | ret = smsc95xx_write_reg_nopm(dev, WUFF, offset[i]); |
e360a8b4 | 1588 | if (ret < 0) |
b052e073 | 1589 | goto done; |
bbd9f9ee SG |
1590 | } |
1591 | ||
9ebca507 | 1592 | for (i = 0; i < (wuff_filter_count / 2); i++) { |
ec32115d | 1593 | ret = smsc95xx_write_reg_nopm(dev, WUFF, crc[i]); |
e360a8b4 | 1594 | if (ret < 0) |
b052e073 | 1595 | goto done; |
bbd9f9ee SG |
1596 | } |
1597 | ||
1598 | /* clear any pending pattern match packet status */ | |
ec32115d | 1599 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1600 | if (ret < 0) |
b052e073 | 1601 | goto done; |
bbd9f9ee SG |
1602 | |
1603 | val |= WUCSR_WUFR_; | |
1604 | ||
ec32115d | 1605 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1606 | if (ret < 0) |
b052e073 | 1607 | goto done; |
bbd9f9ee SG |
1608 | } |
1609 | ||
e0e474a8 SG |
1610 | if (pdata->wolopts & WAKE_MAGIC) { |
1611 | /* clear any pending magic packet status */ | |
ec32115d | 1612 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1613 | if (ret < 0) |
b052e073 | 1614 | goto done; |
e0e474a8 SG |
1615 | |
1616 | val |= WUCSR_MPR_; | |
1617 | ||
ec32115d | 1618 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1619 | if (ret < 0) |
b052e073 | 1620 | goto done; |
e0e474a8 SG |
1621 | } |
1622 | ||
bbd9f9ee | 1623 | /* enable/disable wakeup sources */ |
ec32115d | 1624 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1625 | if (ret < 0) |
b052e073 | 1626 | goto done; |
e0e474a8 | 1627 | |
bbd9f9ee | 1628 | if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) { |
1e1d7412 | 1629 | netdev_info(dev->net, "enabling pattern match wakeup\n"); |
bbd9f9ee SG |
1630 | val |= WUCSR_WAKE_EN_; |
1631 | } else { | |
1e1d7412 | 1632 | netdev_info(dev->net, "disabling pattern match wakeup\n"); |
bbd9f9ee SG |
1633 | val &= ~WUCSR_WAKE_EN_; |
1634 | } | |
1635 | ||
e0e474a8 | 1636 | if (pdata->wolopts & WAKE_MAGIC) { |
1e1d7412 | 1637 | netdev_info(dev->net, "enabling magic packet wakeup\n"); |
e0e474a8 SG |
1638 | val |= WUCSR_MPEN_; |
1639 | } else { | |
1e1d7412 | 1640 | netdev_info(dev->net, "disabling magic packet wakeup\n"); |
e0e474a8 SG |
1641 | val &= ~WUCSR_MPEN_; |
1642 | } | |
1643 | ||
ec32115d | 1644 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1645 | if (ret < 0) |
b052e073 | 1646 | goto done; |
e0e474a8 SG |
1647 | |
1648 | /* enable wol wakeup source */ | |
ec32115d | 1649 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); |
e360a8b4 | 1650 | if (ret < 0) |
b052e073 | 1651 | goto done; |
e0e474a8 SG |
1652 | |
1653 | val |= PM_CTL_WOL_EN_; | |
1654 | ||
e5e3af83 SG |
1655 | /* phy energy detect wakeup source */ |
1656 | if (pdata->wolopts & WAKE_PHY) | |
1657 | val |= PM_CTL_ED_EN_; | |
1658 | ||
ec32115d | 1659 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); |
e360a8b4 | 1660 | if (ret < 0) |
b052e073 | 1661 | goto done; |
e0e474a8 | 1662 | |
bbd9f9ee | 1663 | /* enable receiver to enable frame reception */ |
ec32115d | 1664 | smsc95xx_start_rx_path(dev, 1); |
e0e474a8 SG |
1665 | |
1666 | /* some wol options are enabled, so enter SUSPEND0 */ | |
1e1d7412 | 1667 | netdev_info(dev->net, "entering SUSPEND0 mode\n"); |
3b9f7d8c SG |
1668 | ret = smsc95xx_enter_suspend0(dev); |
1669 | ||
1670 | done: | |
0d41be53 ML |
1671 | /* |
1672 | * TODO: resume() might need to handle the suspend failure | |
1673 | * in system sleep | |
1674 | */ | |
1675 | if (ret && PMSG_IS_AUTO(message)) | |
3b9f7d8c SG |
1676 | usbnet_resume(intf); |
1677 | return ret; | |
e0e474a8 SG |
1678 | } |
1679 | ||
1680 | static int smsc95xx_resume(struct usb_interface *intf) | |
1681 | { | |
1682 | struct usbnet *dev = usb_get_intfdata(intf); | |
8bca81d9 SM |
1683 | struct smsc95xx_priv *pdata; |
1684 | u8 suspend_flags; | |
e0e474a8 SG |
1685 | int ret; |
1686 | u32 val; | |
1687 | ||
1688 | BUG_ON(!dev); | |
8bca81d9 SM |
1689 | pdata = (struct smsc95xx_priv *)(dev->data[0]); |
1690 | suspend_flags = pdata->suspend_flags; | |
e0e474a8 | 1691 | |
b2d4b150 SG |
1692 | netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags); |
1693 | ||
1694 | /* do this first to ensure it's cleared even in error case */ | |
1695 | pdata->suspend_flags = 0; | |
1696 | ||
1697 | if (suspend_flags & SUSPEND_ALLMODES) { | |
bbd9f9ee | 1698 | /* clear wake-up sources */ |
ec32115d | 1699 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1700 | if (ret < 0) |
b052e073 | 1701 | return ret; |
e0e474a8 | 1702 | |
bbd9f9ee | 1703 | val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_); |
e0e474a8 | 1704 | |
ec32115d | 1705 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1706 | if (ret < 0) |
b052e073 | 1707 | return ret; |
e0e474a8 SG |
1708 | |
1709 | /* clear wake-up status */ | |
ec32115d | 1710 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); |
e360a8b4 | 1711 | if (ret < 0) |
b052e073 | 1712 | return ret; |
e0e474a8 SG |
1713 | |
1714 | val &= ~PM_CTL_WOL_EN_; | |
1715 | val |= PM_CTL_WUPS_; | |
1716 | ||
ec32115d | 1717 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); |
e360a8b4 | 1718 | if (ret < 0) |
b052e073 | 1719 | return ret; |
e0e474a8 SG |
1720 | } |
1721 | ||
af3d7c1e | 1722 | ret = usbnet_resume(intf); |
b052e073 SG |
1723 | if (ret < 0) |
1724 | netdev_warn(dev->net, "usbnet_resume error\n"); | |
e0e474a8 | 1725 | |
b052e073 | 1726 | return ret; |
b5a04475 SG |
1727 | } |
1728 | ||
b4df480f JS |
1729 | static int smsc95xx_reset_resume(struct usb_interface *intf) |
1730 | { | |
1731 | struct usbnet *dev = usb_get_intfdata(intf); | |
1732 | int ret; | |
1733 | ||
1734 | ret = smsc95xx_reset(dev); | |
1735 | if (ret < 0) | |
1736 | return ret; | |
1737 | ||
1738 | return smsc95xx_resume(intf); | |
1739 | } | |
1740 | ||
2f7ca802 SG |
1741 | static void smsc95xx_rx_csum_offload(struct sk_buff *skb) |
1742 | { | |
1743 | skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2); | |
1744 | skb->ip_summed = CHECKSUM_COMPLETE; | |
1745 | skb_trim(skb, skb->len - 2); | |
1746 | } | |
1747 | ||
1748 | static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) | |
1749 | { | |
eb85569f EG |
1750 | /* This check is no longer done by usbnet */ |
1751 | if (skb->len < dev->net->hard_header_len) | |
1752 | return 0; | |
1753 | ||
2f7ca802 SG |
1754 | while (skb->len > 0) { |
1755 | u32 header, align_count; | |
1756 | struct sk_buff *ax_skb; | |
1757 | unsigned char *packet; | |
1758 | u16 size; | |
1759 | ||
1760 | memcpy(&header, skb->data, sizeof(header)); | |
1761 | le32_to_cpus(&header); | |
1762 | skb_pull(skb, 4 + NET_IP_ALIGN); | |
1763 | packet = skb->data; | |
1764 | ||
1765 | /* get the packet length */ | |
1766 | size = (u16)((header & RX_STS_FL_) >> 16); | |
1767 | align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4; | |
1768 | ||
1769 | if (unlikely(header & RX_STS_ES_)) { | |
a475f603 JP |
1770 | netif_dbg(dev, rx_err, dev->net, |
1771 | "Error header=0x%08x\n", header); | |
80667ac1 HX |
1772 | dev->net->stats.rx_errors++; |
1773 | dev->net->stats.rx_dropped++; | |
2f7ca802 SG |
1774 | |
1775 | if (header & RX_STS_CRC_) { | |
80667ac1 | 1776 | dev->net->stats.rx_crc_errors++; |
2f7ca802 SG |
1777 | } else { |
1778 | if (header & (RX_STS_TL_ | RX_STS_RF_)) | |
80667ac1 | 1779 | dev->net->stats.rx_frame_errors++; |
2f7ca802 SG |
1780 | |
1781 | if ((header & RX_STS_LE_) && | |
1782 | (!(header & RX_STS_FT_))) | |
80667ac1 | 1783 | dev->net->stats.rx_length_errors++; |
2f7ca802 SG |
1784 | } |
1785 | } else { | |
1786 | /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */ | |
1787 | if (unlikely(size > (ETH_FRAME_LEN + 12))) { | |
a475f603 JP |
1788 | netif_dbg(dev, rx_err, dev->net, |
1789 | "size err header=0x%08x\n", header); | |
2f7ca802 SG |
1790 | return 0; |
1791 | } | |
1792 | ||
1793 | /* last frame in this batch */ | |
1794 | if (skb->len == size) { | |
78e47fe4 | 1795 | if (dev->net->features & NETIF_F_RXCSUM) |
2f7ca802 | 1796 | smsc95xx_rx_csum_offload(skb); |
df18acca | 1797 | skb_trim(skb, skb->len - 4); /* remove fcs */ |
2f7ca802 SG |
1798 | skb->truesize = size + sizeof(struct sk_buff); |
1799 | ||
1800 | return 1; | |
1801 | } | |
1802 | ||
1803 | ax_skb = skb_clone(skb, GFP_ATOMIC); | |
1804 | if (unlikely(!ax_skb)) { | |
60b86755 | 1805 | netdev_warn(dev->net, "Error allocating skb\n"); |
2f7ca802 SG |
1806 | return 0; |
1807 | } | |
1808 | ||
1809 | ax_skb->len = size; | |
1810 | ax_skb->data = packet; | |
1811 | skb_set_tail_pointer(ax_skb, size); | |
1812 | ||
78e47fe4 | 1813 | if (dev->net->features & NETIF_F_RXCSUM) |
2f7ca802 | 1814 | smsc95xx_rx_csum_offload(ax_skb); |
df18acca | 1815 | skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ |
2f7ca802 SG |
1816 | ax_skb->truesize = size + sizeof(struct sk_buff); |
1817 | ||
1818 | usbnet_skb_return(dev, ax_skb); | |
1819 | } | |
1820 | ||
1821 | skb_pull(skb, size); | |
1822 | ||
1823 | /* padding bytes before the next frame starts */ | |
1824 | if (skb->len) | |
1825 | skb_pull(skb, align_count); | |
1826 | } | |
1827 | ||
2f7ca802 SG |
1828 | return 1; |
1829 | } | |
1830 | ||
f7b29271 SG |
1831 | static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb) |
1832 | { | |
55508d60 MM |
1833 | u16 low_16 = (u16)skb_checksum_start_offset(skb); |
1834 | u16 high_16 = low_16 + skb->csum_offset; | |
f7b29271 SG |
1835 | return (high_16 << 16) | low_16; |
1836 | } | |
1837 | ||
2f7ca802 SG |
1838 | static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev, |
1839 | struct sk_buff *skb, gfp_t flags) | |
1840 | { | |
78e47fe4 | 1841 | bool csum = skb->ip_summed == CHECKSUM_PARTIAL; |
f7b29271 | 1842 | int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD; |
2f7ca802 SG |
1843 | u32 tx_cmd_a, tx_cmd_b; |
1844 | ||
f7b29271 SG |
1845 | /* We do not advertise SG, so skbs should be already linearized */ |
1846 | BUG_ON(skb_shinfo(skb)->nr_frags); | |
1847 | ||
1848 | if (skb_headroom(skb) < overhead) { | |
2f7ca802 | 1849 | struct sk_buff *skb2 = skb_copy_expand(skb, |
f7b29271 | 1850 | overhead, 0, flags); |
2f7ca802 SG |
1851 | dev_kfree_skb_any(skb); |
1852 | skb = skb2; | |
1853 | if (!skb) | |
1854 | return NULL; | |
1855 | } | |
1856 | ||
f7b29271 | 1857 | if (csum) { |
11bc3088 SG |
1858 | if (skb->len <= 45) { |
1859 | /* workaround - hardware tx checksum does not work | |
1860 | * properly with extremely small packets */ | |
55508d60 | 1861 | long csstart = skb_checksum_start_offset(skb); |
11bc3088 SG |
1862 | __wsum calc = csum_partial(skb->data + csstart, |
1863 | skb->len - csstart, 0); | |
1864 | *((__sum16 *)(skb->data + csstart | |
1865 | + skb->csum_offset)) = csum_fold(calc); | |
1866 | ||
1867 | csum = false; | |
1868 | } else { | |
1869 | u32 csum_preamble = smsc95xx_calc_csum_preamble(skb); | |
1870 | skb_push(skb, 4); | |
00acda68 | 1871 | cpu_to_le32s(&csum_preamble); |
11bc3088 SG |
1872 | memcpy(skb->data, &csum_preamble, 4); |
1873 | } | |
f7b29271 SG |
1874 | } |
1875 | ||
2f7ca802 SG |
1876 | skb_push(skb, 4); |
1877 | tx_cmd_b = (u32)(skb->len - 4); | |
f7b29271 SG |
1878 | if (csum) |
1879 | tx_cmd_b |= TX_CMD_B_CSUM_ENABLE; | |
2f7ca802 SG |
1880 | cpu_to_le32s(&tx_cmd_b); |
1881 | memcpy(skb->data, &tx_cmd_b, 4); | |
1882 | ||
1883 | skb_push(skb, 4); | |
1884 | tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ | | |
1885 | TX_CMD_A_LAST_SEG_; | |
1886 | cpu_to_le32s(&tx_cmd_a); | |
1887 | memcpy(skb->data, &tx_cmd_a, 4); | |
1888 | ||
1889 | return skb; | |
1890 | } | |
1891 | ||
b2d4b150 SG |
1892 | static int smsc95xx_manage_power(struct usbnet *dev, int on) |
1893 | { | |
1894 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1895 | ||
1896 | dev->intf->needs_remote_wakeup = on; | |
1897 | ||
eb970ff0 | 1898 | if (pdata->features & FEATURE_REMOTE_WAKEUP) |
b2d4b150 SG |
1899 | return 0; |
1900 | ||
eb970ff0 ML |
1901 | /* this chip revision isn't capable of remote wakeup */ |
1902 | netdev_info(dev->net, "hardware isn't capable of remote wakeup\n"); | |
b2d4b150 SG |
1903 | |
1904 | if (on) | |
1905 | usb_autopm_get_interface_no_resume(dev->intf); | |
1906 | else | |
1907 | usb_autopm_put_interface(dev->intf); | |
1908 | ||
1909 | return 0; | |
1910 | } | |
1911 | ||
2f7ca802 SG |
1912 | static const struct driver_info smsc95xx_info = { |
1913 | .description = "smsc95xx USB 2.0 Ethernet", | |
1914 | .bind = smsc95xx_bind, | |
1915 | .unbind = smsc95xx_unbind, | |
1916 | .link_reset = smsc95xx_link_reset, | |
1917 | .reset = smsc95xx_reset, | |
1918 | .rx_fixup = smsc95xx_rx_fixup, | |
1919 | .tx_fixup = smsc95xx_tx_fixup, | |
1920 | .status = smsc95xx_status, | |
b2d4b150 | 1921 | .manage_power = smsc95xx_manage_power, |
07d69d42 | 1922 | .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR, |
2f7ca802 SG |
1923 | }; |
1924 | ||
1925 | static const struct usb_device_id products[] = { | |
1926 | { | |
1927 | /* SMSC9500 USB Ethernet Device */ | |
1928 | USB_DEVICE(0x0424, 0x9500), | |
1929 | .driver_info = (unsigned long) &smsc95xx_info, | |
1930 | }, | |
6f41d12b SG |
1931 | { |
1932 | /* SMSC9505 USB Ethernet Device */ | |
1933 | USB_DEVICE(0x0424, 0x9505), | |
1934 | .driver_info = (unsigned long) &smsc95xx_info, | |
1935 | }, | |
1936 | { | |
1937 | /* SMSC9500A USB Ethernet Device */ | |
1938 | USB_DEVICE(0x0424, 0x9E00), | |
1939 | .driver_info = (unsigned long) &smsc95xx_info, | |
1940 | }, | |
1941 | { | |
1942 | /* SMSC9505A USB Ethernet Device */ | |
1943 | USB_DEVICE(0x0424, 0x9E01), | |
1944 | .driver_info = (unsigned long) &smsc95xx_info, | |
1945 | }, | |
726474b8 SG |
1946 | { |
1947 | /* SMSC9512/9514 USB Hub & Ethernet Device */ | |
1948 | USB_DEVICE(0x0424, 0xec00), | |
1949 | .driver_info = (unsigned long) &smsc95xx_info, | |
1950 | }, | |
6f41d12b SG |
1951 | { |
1952 | /* SMSC9500 USB Ethernet Device (SAL10) */ | |
1953 | USB_DEVICE(0x0424, 0x9900), | |
1954 | .driver_info = (unsigned long) &smsc95xx_info, | |
1955 | }, | |
1956 | { | |
1957 | /* SMSC9505 USB Ethernet Device (SAL10) */ | |
1958 | USB_DEVICE(0x0424, 0x9901), | |
1959 | .driver_info = (unsigned long) &smsc95xx_info, | |
1960 | }, | |
1961 | { | |
1962 | /* SMSC9500A USB Ethernet Device (SAL10) */ | |
1963 | USB_DEVICE(0x0424, 0x9902), | |
1964 | .driver_info = (unsigned long) &smsc95xx_info, | |
1965 | }, | |
1966 | { | |
1967 | /* SMSC9505A USB Ethernet Device (SAL10) */ | |
1968 | USB_DEVICE(0x0424, 0x9903), | |
1969 | .driver_info = (unsigned long) &smsc95xx_info, | |
1970 | }, | |
1971 | { | |
1972 | /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */ | |
1973 | USB_DEVICE(0x0424, 0x9904), | |
1974 | .driver_info = (unsigned long) &smsc95xx_info, | |
1975 | }, | |
1976 | { | |
1977 | /* SMSC9500A USB Ethernet Device (HAL) */ | |
1978 | USB_DEVICE(0x0424, 0x9905), | |
1979 | .driver_info = (unsigned long) &smsc95xx_info, | |
1980 | }, | |
1981 | { | |
1982 | /* SMSC9505A USB Ethernet Device (HAL) */ | |
1983 | USB_DEVICE(0x0424, 0x9906), | |
1984 | .driver_info = (unsigned long) &smsc95xx_info, | |
1985 | }, | |
1986 | { | |
1987 | /* SMSC9500 USB Ethernet Device (Alternate ID) */ | |
1988 | USB_DEVICE(0x0424, 0x9907), | |
1989 | .driver_info = (unsigned long) &smsc95xx_info, | |
1990 | }, | |
1991 | { | |
1992 | /* SMSC9500A USB Ethernet Device (Alternate ID) */ | |
1993 | USB_DEVICE(0x0424, 0x9908), | |
1994 | .driver_info = (unsigned long) &smsc95xx_info, | |
1995 | }, | |
1996 | { | |
1997 | /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */ | |
1998 | USB_DEVICE(0x0424, 0x9909), | |
1999 | .driver_info = (unsigned long) &smsc95xx_info, | |
2000 | }, | |
88edaa41 SG |
2001 | { |
2002 | /* SMSC LAN9530 USB Ethernet Device */ | |
2003 | USB_DEVICE(0x0424, 0x9530), | |
2004 | .driver_info = (unsigned long) &smsc95xx_info, | |
2005 | }, | |
2006 | { | |
2007 | /* SMSC LAN9730 USB Ethernet Device */ | |
2008 | USB_DEVICE(0x0424, 0x9730), | |
2009 | .driver_info = (unsigned long) &smsc95xx_info, | |
2010 | }, | |
2011 | { | |
2012 | /* SMSC LAN89530 USB Ethernet Device */ | |
2013 | USB_DEVICE(0x0424, 0x9E08), | |
2014 | .driver_info = (unsigned long) &smsc95xx_info, | |
2015 | }, | |
2f7ca802 SG |
2016 | { }, /* END */ |
2017 | }; | |
2018 | MODULE_DEVICE_TABLE(usb, products); | |
2019 | ||
2020 | static struct usb_driver smsc95xx_driver = { | |
2021 | .name = "smsc95xx", | |
2022 | .id_table = products, | |
2023 | .probe = usbnet_probe, | |
b5a04475 | 2024 | .suspend = smsc95xx_suspend, |
e0e474a8 | 2025 | .resume = smsc95xx_resume, |
b4df480f | 2026 | .reset_resume = smsc95xx_reset_resume, |
2f7ca802 | 2027 | .disconnect = usbnet_disconnect, |
e1f12eb6 | 2028 | .disable_hub_initiated_lpm = 1, |
b2d4b150 | 2029 | .supports_autosuspend = 1, |
2f7ca802 SG |
2030 | }; |
2031 | ||
d632eb1b | 2032 | module_usb_driver(smsc95xx_driver); |
2f7ca802 SG |
2033 | |
2034 | MODULE_AUTHOR("Nancy Lin"); | |
90b24cfb | 2035 | MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>"); |
2f7ca802 SG |
2036 | MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices"); |
2037 | MODULE_LICENSE("GPL"); |