usb: Fix FSF address in file headers
[linux-block.git] / drivers / net / usb / smsc95xx.c
CommitLineData
2f7ca802
SG
1 /***************************************************************************
2 *
3 * Copyright (C) 2007-2008 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
9cb00073 16 * along with this program; if not, see <http://www.gnu.org/licenses/>.
2f7ca802
SG
17 *
18 *****************************************************************************/
19
20#include <linux/module.h>
21#include <linux/kmod.h>
22#include <linux/init.h>
23#include <linux/netdevice.h>
24#include <linux/etherdevice.h>
25#include <linux/ethtool.h>
26#include <linux/mii.h>
27#include <linux/usb.h>
bbd9f9ee
SG
28#include <linux/bitrev.h>
29#include <linux/crc16.h>
2f7ca802
SG
30#include <linux/crc32.h>
31#include <linux/usb/usbnet.h>
5a0e3ad6 32#include <linux/slab.h>
2f7ca802
SG
33#include "smsc95xx.h"
34
35#define SMSC_CHIPNAME "smsc95xx"
f7b29271 36#define SMSC_DRIVER_VERSION "1.0.4"
2f7ca802
SG
37#define HS_USB_PKT_SIZE (512)
38#define FS_USB_PKT_SIZE (64)
39#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
40#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
41#define DEFAULT_BULK_IN_DELAY (0x00002000)
42#define MAX_SINGLE_PACKET_SIZE (2048)
43#define LAN95XX_EEPROM_MAGIC (0x9500)
44#define EEPROM_MAC_OFFSET (0x01)
f7b29271 45#define DEFAULT_TX_CSUM_ENABLE (true)
2f7ca802
SG
46#define DEFAULT_RX_CSUM_ENABLE (true)
47#define SMSC95XX_INTERNAL_PHY_ID (1)
48#define SMSC95XX_TX_OVERHEAD (8)
f7b29271 49#define SMSC95XX_TX_OVERHEAD_CSUM (12)
e5e3af83 50#define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \
bbd9f9ee 51 WAKE_MCAST | WAKE_ARP | WAKE_MAGIC)
2f7ca802 52
9ebca507
SG
53#define FEATURE_8_WAKEUP_FILTERS (0x01)
54#define FEATURE_PHY_NLP_CROSSOVER (0x02)
eb970ff0 55#define FEATURE_REMOTE_WAKEUP (0x04)
9ebca507 56
b2d4b150
SG
57#define SUSPEND_SUSPEND0 (0x01)
58#define SUSPEND_SUSPEND1 (0x02)
59#define SUSPEND_SUSPEND2 (0x04)
60#define SUSPEND_SUSPEND3 (0x08)
61#define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \
62 SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3)
63
2f7ca802
SG
64struct smsc95xx_priv {
65 u32 mac_cr;
3c0f3c60
MZ
66 u32 hash_hi;
67 u32 hash_lo;
e0e474a8 68 u32 wolopts;
2f7ca802 69 spinlock_t mac_cr_lock;
9ebca507 70 u8 features;
b2d4b150 71 u8 suspend_flags;
2f7ca802
SG
72};
73
eb939922 74static bool turbo_mode = true;
2f7ca802
SG
75module_param(turbo_mode, bool, 0644);
76MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
77
ec32115d
ML
78static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index,
79 u32 *data, int in_pm)
2f7ca802 80{
72108fd2 81 u32 buf;
2f7ca802 82 int ret;
ec32115d 83 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
2f7ca802
SG
84
85 BUG_ON(!dev);
86
ec32115d
ML
87 if (!in_pm)
88 fn = usbnet_read_cmd;
89 else
90 fn = usbnet_read_cmd_nopm;
91
92 ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN
93 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
94 0, index, &buf, 4);
2f7ca802 95 if (unlikely(ret < 0))
1e1d7412
JP
96 netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n",
97 index, ret);
2f7ca802 98
72108fd2
ML
99 le32_to_cpus(&buf);
100 *data = buf;
2f7ca802
SG
101
102 return ret;
103}
104
ec32115d
ML
105static int __must_check __smsc95xx_write_reg(struct usbnet *dev, u32 index,
106 u32 data, int in_pm)
2f7ca802 107{
72108fd2 108 u32 buf;
2f7ca802 109 int ret;
ec32115d 110 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
2f7ca802
SG
111
112 BUG_ON(!dev);
113
ec32115d
ML
114 if (!in_pm)
115 fn = usbnet_write_cmd;
116 else
117 fn = usbnet_write_cmd_nopm;
118
72108fd2
ML
119 buf = data;
120 cpu_to_le32s(&buf);
2f7ca802 121
ec32115d
ML
122 ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT
123 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
124 0, index, &buf, 4);
2f7ca802 125 if (unlikely(ret < 0))
1e1d7412
JP
126 netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n",
127 index, ret);
2f7ca802 128
2f7ca802
SG
129 return ret;
130}
131
ec32115d
ML
132static int __must_check smsc95xx_read_reg_nopm(struct usbnet *dev, u32 index,
133 u32 *data)
134{
135 return __smsc95xx_read_reg(dev, index, data, 1);
136}
137
138static int __must_check smsc95xx_write_reg_nopm(struct usbnet *dev, u32 index,
139 u32 data)
140{
141 return __smsc95xx_write_reg(dev, index, data, 1);
142}
143
144static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index,
145 u32 *data)
146{
147 return __smsc95xx_read_reg(dev, index, data, 0);
148}
149
150static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index,
151 u32 data)
152{
153 return __smsc95xx_write_reg(dev, index, data, 0);
154}
e0e474a8 155
2f7ca802
SG
156/* Loop until the read is completed with timeout
157 * called with phy_mutex held */
e5e3af83
SG
158static int __must_check __smsc95xx_phy_wait_not_busy(struct usbnet *dev,
159 int in_pm)
2f7ca802
SG
160{
161 unsigned long start_time = jiffies;
162 u32 val;
769ea6d8 163 int ret;
2f7ca802
SG
164
165 do {
e5e3af83 166 ret = __smsc95xx_read_reg(dev, MII_ADDR, &val, in_pm);
b052e073
SG
167 if (ret < 0) {
168 netdev_warn(dev->net, "Error reading MII_ACCESS\n");
169 return ret;
170 }
171
2f7ca802
SG
172 if (!(val & MII_BUSY_))
173 return 0;
174 } while (!time_after(jiffies, start_time + HZ));
175
176 return -EIO;
177}
178
e5e3af83
SG
179static int __smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx,
180 int in_pm)
2f7ca802
SG
181{
182 struct usbnet *dev = netdev_priv(netdev);
183 u32 val, addr;
769ea6d8 184 int ret;
2f7ca802
SG
185
186 mutex_lock(&dev->phy_mutex);
187
188 /* confirm MII not busy */
e5e3af83 189 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
b052e073
SG
190 if (ret < 0) {
191 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n");
192 goto done;
193 }
2f7ca802
SG
194
195 /* set the address, index & direction (read from PHY) */
196 phy_id &= dev->mii.phy_id_mask;
197 idx &= dev->mii.reg_num_mask;
80928805 198 addr = (phy_id << 11) | (idx << 6) | MII_READ_ | MII_BUSY_;
e5e3af83 199 ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm);
b052e073
SG
200 if (ret < 0) {
201 netdev_warn(dev->net, "Error writing MII_ADDR\n");
202 goto done;
203 }
2f7ca802 204
e5e3af83 205 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
b052e073
SG
206 if (ret < 0) {
207 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
208 goto done;
209 }
2f7ca802 210
e5e3af83 211 ret = __smsc95xx_read_reg(dev, MII_DATA, &val, in_pm);
b052e073
SG
212 if (ret < 0) {
213 netdev_warn(dev->net, "Error reading MII_DATA\n");
214 goto done;
215 }
2f7ca802 216
769ea6d8 217 ret = (u16)(val & 0xFFFF);
2f7ca802 218
769ea6d8
SG
219done:
220 mutex_unlock(&dev->phy_mutex);
221 return ret;
2f7ca802
SG
222}
223
e5e3af83
SG
224static void __smsc95xx_mdio_write(struct net_device *netdev, int phy_id,
225 int idx, int regval, int in_pm)
2f7ca802
SG
226{
227 struct usbnet *dev = netdev_priv(netdev);
228 u32 val, addr;
769ea6d8 229 int ret;
2f7ca802
SG
230
231 mutex_lock(&dev->phy_mutex);
232
233 /* confirm MII not busy */
e5e3af83 234 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
b052e073
SG
235 if (ret < 0) {
236 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n");
237 goto done;
238 }
2f7ca802
SG
239
240 val = regval;
e5e3af83 241 ret = __smsc95xx_write_reg(dev, MII_DATA, val, in_pm);
b052e073
SG
242 if (ret < 0) {
243 netdev_warn(dev->net, "Error writing MII_DATA\n");
244 goto done;
245 }
2f7ca802
SG
246
247 /* set the address, index & direction (write to PHY) */
248 phy_id &= dev->mii.phy_id_mask;
249 idx &= dev->mii.reg_num_mask;
80928805 250 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_ | MII_BUSY_;
e5e3af83 251 ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm);
b052e073
SG
252 if (ret < 0) {
253 netdev_warn(dev->net, "Error writing MII_ADDR\n");
254 goto done;
255 }
2f7ca802 256
e5e3af83 257 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
b052e073
SG
258 if (ret < 0) {
259 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
260 goto done;
261 }
2f7ca802 262
769ea6d8 263done:
2f7ca802
SG
264 mutex_unlock(&dev->phy_mutex);
265}
266
e5e3af83
SG
267static int smsc95xx_mdio_read_nopm(struct net_device *netdev, int phy_id,
268 int idx)
269{
270 return __smsc95xx_mdio_read(netdev, phy_id, idx, 1);
271}
272
273static void smsc95xx_mdio_write_nopm(struct net_device *netdev, int phy_id,
274 int idx, int regval)
275{
276 __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 1);
277}
278
279static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
280{
281 return __smsc95xx_mdio_read(netdev, phy_id, idx, 0);
282}
283
284static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
285 int regval)
286{
287 __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 0);
288}
289
769ea6d8 290static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev)
2f7ca802
SG
291{
292 unsigned long start_time = jiffies;
293 u32 val;
769ea6d8 294 int ret;
2f7ca802
SG
295
296 do {
769ea6d8 297 ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
b052e073
SG
298 if (ret < 0) {
299 netdev_warn(dev->net, "Error reading E2P_CMD\n");
300 return ret;
301 }
302
2f7ca802
SG
303 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
304 break;
305 udelay(40);
306 } while (!time_after(jiffies, start_time + HZ));
307
308 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
60b86755 309 netdev_warn(dev->net, "EEPROM read operation timeout\n");
2f7ca802
SG
310 return -EIO;
311 }
312
313 return 0;
314}
315
769ea6d8 316static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
2f7ca802
SG
317{
318 unsigned long start_time = jiffies;
319 u32 val;
769ea6d8 320 int ret;
2f7ca802
SG
321
322 do {
769ea6d8 323 ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
b052e073
SG
324 if (ret < 0) {
325 netdev_warn(dev->net, "Error reading E2P_CMD\n");
326 return ret;
327 }
2f7ca802 328
2f7ca802
SG
329 if (!(val & E2P_CMD_BUSY_))
330 return 0;
331
332 udelay(40);
333 } while (!time_after(jiffies, start_time + HZ));
334
60b86755 335 netdev_warn(dev->net, "EEPROM is busy\n");
2f7ca802
SG
336 return -EIO;
337}
338
339static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
340 u8 *data)
341{
342 u32 val;
343 int i, ret;
344
345 BUG_ON(!dev);
346 BUG_ON(!data);
347
348 ret = smsc95xx_eeprom_confirm_not_busy(dev);
349 if (ret)
350 return ret;
351
352 for (i = 0; i < length; i++) {
353 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
769ea6d8 354 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
b052e073
SG
355 if (ret < 0) {
356 netdev_warn(dev->net, "Error writing E2P_CMD\n");
357 return ret;
358 }
2f7ca802
SG
359
360 ret = smsc95xx_wait_eeprom(dev);
361 if (ret < 0)
362 return ret;
363
769ea6d8 364 ret = smsc95xx_read_reg(dev, E2P_DATA, &val);
b052e073
SG
365 if (ret < 0) {
366 netdev_warn(dev->net, "Error reading E2P_DATA\n");
367 return ret;
368 }
2f7ca802
SG
369
370 data[i] = val & 0xFF;
371 offset++;
372 }
373
374 return 0;
375}
376
377static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
378 u8 *data)
379{
380 u32 val;
381 int i, ret;
382
383 BUG_ON(!dev);
384 BUG_ON(!data);
385
386 ret = smsc95xx_eeprom_confirm_not_busy(dev);
387 if (ret)
388 return ret;
389
390 /* Issue write/erase enable command */
391 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
769ea6d8 392 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
b052e073
SG
393 if (ret < 0) {
394 netdev_warn(dev->net, "Error writing E2P_DATA\n");
395 return ret;
396 }
2f7ca802
SG
397
398 ret = smsc95xx_wait_eeprom(dev);
399 if (ret < 0)
400 return ret;
401
402 for (i = 0; i < length; i++) {
403
404 /* Fill data register */
405 val = data[i];
769ea6d8 406 ret = smsc95xx_write_reg(dev, E2P_DATA, val);
b052e073
SG
407 if (ret < 0) {
408 netdev_warn(dev->net, "Error writing E2P_DATA\n");
409 return ret;
410 }
2f7ca802
SG
411
412 /* Send "write" command */
413 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
769ea6d8 414 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
b052e073
SG
415 if (ret < 0) {
416 netdev_warn(dev->net, "Error writing E2P_CMD\n");
417 return ret;
418 }
2f7ca802
SG
419
420 ret = smsc95xx_wait_eeprom(dev);
421 if (ret < 0)
422 return ret;
423
424 offset++;
425 }
426
427 return 0;
428}
429
769ea6d8 430static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index,
7b9e7580 431 u32 data)
2f7ca802 432{
1d74a6bd 433 const u16 size = 4;
7b9e7580 434 u32 buf;
72108fd2 435 int ret;
2f7ca802 436
7b9e7580
SG
437 buf = data;
438 cpu_to_le32s(&buf);
439
72108fd2
ML
440 ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER,
441 USB_DIR_OUT | USB_TYPE_VENDOR |
442 USB_RECIP_DEVICE,
7b9e7580 443 0, index, &buf, size);
72108fd2
ML
444 if (ret < 0)
445 netdev_warn(dev->net, "Error write async cmd, sts=%d\n",
446 ret);
447 return ret;
2f7ca802
SG
448}
449
450/* returns hash bit number for given MAC address
451 * example:
452 * 01 00 5E 00 00 01 -> returns bit number 31 */
453static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
454{
455 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
456}
457
458static void smsc95xx_set_multicast(struct net_device *netdev)
459{
460 struct usbnet *dev = netdev_priv(netdev);
461 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
2f7ca802 462 unsigned long flags;
769ea6d8 463 int ret;
2f7ca802 464
3c0f3c60
MZ
465 pdata->hash_hi = 0;
466 pdata->hash_lo = 0;
467
2f7ca802
SG
468 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
469
470 if (dev->net->flags & IFF_PROMISC) {
a475f603 471 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
2f7ca802
SG
472 pdata->mac_cr |= MAC_CR_PRMS_;
473 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
474 } else if (dev->net->flags & IFF_ALLMULTI) {
a475f603 475 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
2f7ca802
SG
476 pdata->mac_cr |= MAC_CR_MCPAS_;
477 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
4cd24eaf 478 } else if (!netdev_mc_empty(dev->net)) {
22bedad3 479 struct netdev_hw_addr *ha;
2f7ca802
SG
480
481 pdata->mac_cr |= MAC_CR_HPFILT_;
482 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
483
22bedad3
JP
484 netdev_for_each_mc_addr(ha, netdev) {
485 u32 bitnum = smsc95xx_hash(ha->addr);
a92635dc
JP
486 u32 mask = 0x01 << (bitnum & 0x1F);
487 if (bitnum & 0x20)
3c0f3c60 488 pdata->hash_hi |= mask;
a92635dc 489 else
3c0f3c60 490 pdata->hash_lo |= mask;
2f7ca802
SG
491 }
492
a475f603 493 netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n",
3c0f3c60 494 pdata->hash_hi, pdata->hash_lo);
2f7ca802 495 } else {
a475f603 496 netif_dbg(dev, drv, dev->net, "receive own packets only\n");
2f7ca802
SG
497 pdata->mac_cr &=
498 ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
499 }
500
501 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
502
503 /* Initiate async writes, as we can't wait for completion here */
7b9e7580 504 ret = smsc95xx_write_reg_async(dev, HASHH, pdata->hash_hi);
b052e073
SG
505 if (ret < 0)
506 netdev_warn(dev->net, "failed to initiate async write to HASHH\n");
769ea6d8 507
7b9e7580 508 ret = smsc95xx_write_reg_async(dev, HASHL, pdata->hash_lo);
b052e073
SG
509 if (ret < 0)
510 netdev_warn(dev->net, "failed to initiate async write to HASHL\n");
769ea6d8 511
7b9e7580 512 ret = smsc95xx_write_reg_async(dev, MAC_CR, pdata->mac_cr);
b052e073
SG
513 if (ret < 0)
514 netdev_warn(dev->net, "failed to initiate async write to MAC_CR\n");
2f7ca802
SG
515}
516
769ea6d8
SG
517static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
518 u16 lcladv, u16 rmtadv)
2f7ca802
SG
519{
520 u32 flow, afc_cfg = 0;
521
522 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
e360a8b4 523 if (ret < 0)
b052e073 524 return ret;
2f7ca802
SG
525
526 if (duplex == DUPLEX_FULL) {
bc02ff95 527 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
2f7ca802
SG
528
529 if (cap & FLOW_CTRL_RX)
530 flow = 0xFFFF0002;
531 else
532 flow = 0;
533
534 if (cap & FLOW_CTRL_TX)
535 afc_cfg |= 0xF;
536 else
537 afc_cfg &= ~0xF;
538
a475f603 539 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
60b86755
JP
540 cap & FLOW_CTRL_RX ? "enabled" : "disabled",
541 cap & FLOW_CTRL_TX ? "enabled" : "disabled");
2f7ca802 542 } else {
a475f603 543 netif_dbg(dev, link, dev->net, "half duplex\n");
2f7ca802
SG
544 flow = 0;
545 afc_cfg |= 0xF;
546 }
547
769ea6d8 548 ret = smsc95xx_write_reg(dev, FLOW, flow);
b052e073 549 if (ret < 0)
e360a8b4 550 return ret;
769ea6d8 551
e360a8b4 552 return smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
2f7ca802
SG
553}
554
555static int smsc95xx_link_reset(struct usbnet *dev)
556{
557 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
558 struct mii_if_info *mii = &dev->mii;
8ae6daca 559 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
2f7ca802
SG
560 unsigned long flags;
561 u16 lcladv, rmtadv;
769ea6d8 562 int ret;
2f7ca802
SG
563
564 /* clear interrupt status */
769ea6d8 565 ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
e360a8b4 566 if (ret < 0)
b052e073 567 return ret;
769ea6d8
SG
568
569 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
e360a8b4 570 if (ret < 0)
b052e073 571 return ret;
2f7ca802
SG
572
573 mii_check_media(mii, 1, 1);
574 mii_ethtool_gset(&dev->mii, &ecmd);
575 lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
576 rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
577
8ae6daca
DD
578 netif_dbg(dev, link, dev->net,
579 "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",
580 ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv);
2f7ca802
SG
581
582 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
583 if (ecmd.duplex != DUPLEX_FULL) {
584 pdata->mac_cr &= ~MAC_CR_FDPX_;
585 pdata->mac_cr |= MAC_CR_RCVOWN_;
586 } else {
587 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
588 pdata->mac_cr |= MAC_CR_FDPX_;
589 }
590 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
591
769ea6d8 592 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
e360a8b4 593 if (ret < 0)
b052e073 594 return ret;
2f7ca802 595
769ea6d8 596 ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
b052e073
SG
597 if (ret < 0)
598 netdev_warn(dev->net, "Error updating PHY flow control\n");
2f7ca802 599
b052e073 600 return ret;
2f7ca802
SG
601}
602
603static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
604{
605 u32 intdata;
606
607 if (urb->actual_length != 4) {
60b86755
JP
608 netdev_warn(dev->net, "unexpected urb length %d\n",
609 urb->actual_length);
2f7ca802
SG
610 return;
611 }
612
613 memcpy(&intdata, urb->transfer_buffer, 4);
1d74a6bd 614 le32_to_cpus(&intdata);
2f7ca802 615
a475f603 616 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
2f7ca802
SG
617
618 if (intdata & INT_ENP_PHY_INT_)
619 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
620 else
60b86755
JP
621 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
622 intdata);
2f7ca802
SG
623}
624
f7b29271 625/* Enable or disable Tx & Rx checksum offload engines */
c8f44aff
MM
626static int smsc95xx_set_features(struct net_device *netdev,
627 netdev_features_t features)
2f7ca802 628{
78e47fe4 629 struct usbnet *dev = netdev_priv(netdev);
2f7ca802 630 u32 read_buf;
78e47fe4
MM
631 int ret;
632
633 ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
e360a8b4 634 if (ret < 0)
b052e073 635 return ret;
2f7ca802 636
78e47fe4 637 if (features & NETIF_F_HW_CSUM)
f7b29271
SG
638 read_buf |= Tx_COE_EN_;
639 else
640 read_buf &= ~Tx_COE_EN_;
641
78e47fe4 642 if (features & NETIF_F_RXCSUM)
2f7ca802
SG
643 read_buf |= Rx_COE_EN_;
644 else
645 read_buf &= ~Rx_COE_EN_;
646
647 ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
e360a8b4 648 if (ret < 0)
b052e073 649 return ret;
2f7ca802 650
a475f603 651 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
2f7ca802
SG
652 return 0;
653}
654
655static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
656{
657 return MAX_EEPROM_SIZE;
658}
659
660static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
661 struct ethtool_eeprom *ee, u8 *data)
662{
663 struct usbnet *dev = netdev_priv(netdev);
664
665 ee->magic = LAN95XX_EEPROM_MAGIC;
666
667 return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
668}
669
670static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
671 struct ethtool_eeprom *ee, u8 *data)
672{
673 struct usbnet *dev = netdev_priv(netdev);
674
675 if (ee->magic != LAN95XX_EEPROM_MAGIC) {
60b86755
JP
676 netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n",
677 ee->magic);
2f7ca802
SG
678 return -EINVAL;
679 }
680
681 return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
682}
683
9fa32e94
EV
684static int smsc95xx_ethtool_getregslen(struct net_device *netdev)
685{
686 /* all smsc95xx registers */
96245317 687 return COE_CR - ID_REV + sizeof(u32);
9fa32e94
EV
688}
689
690static void
691smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs,
692 void *buf)
693{
694 struct usbnet *dev = netdev_priv(netdev);
d348446b
DC
695 unsigned int i, j;
696 int retval;
9fa32e94
EV
697 u32 *data = buf;
698
699 retval = smsc95xx_read_reg(dev, ID_REV, &regs->version);
700 if (retval < 0) {
701 netdev_warn(netdev, "REGS: cannot read ID_REV\n");
702 return;
703 }
704
705 for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) {
706 retval = smsc95xx_read_reg(dev, i, &data[j]);
707 if (retval < 0) {
708 netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i);
709 return;
710 }
711 }
712}
713
e0e474a8
SG
714static void smsc95xx_ethtool_get_wol(struct net_device *net,
715 struct ethtool_wolinfo *wolinfo)
716{
717 struct usbnet *dev = netdev_priv(net);
718 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
719
720 wolinfo->supported = SUPPORTED_WAKE;
721 wolinfo->wolopts = pdata->wolopts;
722}
723
724static int smsc95xx_ethtool_set_wol(struct net_device *net,
725 struct ethtool_wolinfo *wolinfo)
726{
727 struct usbnet *dev = netdev_priv(net);
728 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
3b14692c 729 int ret;
e0e474a8
SG
730
731 pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
3b14692c
SG
732
733 ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts);
b052e073
SG
734 if (ret < 0)
735 netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret);
3b14692c 736
b052e073 737 return ret;
e0e474a8
SG
738}
739
0fc0b732 740static const struct ethtool_ops smsc95xx_ethtool_ops = {
2f7ca802
SG
741 .get_link = usbnet_get_link,
742 .nway_reset = usbnet_nway_reset,
743 .get_drvinfo = usbnet_get_drvinfo,
744 .get_msglevel = usbnet_get_msglevel,
745 .set_msglevel = usbnet_set_msglevel,
746 .get_settings = usbnet_get_settings,
747 .set_settings = usbnet_set_settings,
748 .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
749 .get_eeprom = smsc95xx_ethtool_get_eeprom,
750 .set_eeprom = smsc95xx_ethtool_set_eeprom,
9fa32e94
EV
751 .get_regs_len = smsc95xx_ethtool_getregslen,
752 .get_regs = smsc95xx_ethtool_getregs,
e0e474a8
SG
753 .get_wol = smsc95xx_ethtool_get_wol,
754 .set_wol = smsc95xx_ethtool_set_wol,
2f7ca802
SG
755};
756
757static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
758{
759 struct usbnet *dev = netdev_priv(netdev);
760
761 if (!netif_running(netdev))
762 return -EINVAL;
763
764 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
765}
766
767static void smsc95xx_init_mac_address(struct usbnet *dev)
768{
769 /* try reading mac address from EEPROM */
770 if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
771 dev->net->dev_addr) == 0) {
772 if (is_valid_ether_addr(dev->net->dev_addr)) {
773 /* eeprom values are valid so use them */
a475f603 774 netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n");
2f7ca802
SG
775 return;
776 }
777 }
778
779 /* no eeprom, or eeprom values are invalid. generate random MAC */
f2cedb63 780 eth_hw_addr_random(dev->net);
c7e12ead 781 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
2f7ca802
SG
782}
783
784static int smsc95xx_set_mac_address(struct usbnet *dev)
785{
786 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
787 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
788 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
789 int ret;
790
791 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
b052e073 792 if (ret < 0)
e360a8b4 793 return ret;
2f7ca802 794
e360a8b4 795 return smsc95xx_write_reg(dev, ADDRH, addr_hi);
2f7ca802
SG
796}
797
798/* starts the TX path */
769ea6d8 799static int smsc95xx_start_tx_path(struct usbnet *dev)
2f7ca802
SG
800{
801 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
802 unsigned long flags;
769ea6d8 803 int ret;
2f7ca802
SG
804
805 /* Enable Tx at MAC */
806 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
807 pdata->mac_cr |= MAC_CR_TXEN_;
808 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
809
769ea6d8 810 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
e360a8b4 811 if (ret < 0)
b052e073 812 return ret;
2f7ca802
SG
813
814 /* Enable Tx at SCSRs */
e360a8b4 815 return smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_);
2f7ca802
SG
816}
817
818/* Starts the Receive path */
ec32115d 819static int smsc95xx_start_rx_path(struct usbnet *dev, int in_pm)
2f7ca802
SG
820{
821 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
822 unsigned long flags;
823
824 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
825 pdata->mac_cr |= MAC_CR_RXEN_;
826 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
827
e360a8b4 828 return __smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr, in_pm);
2f7ca802
SG
829}
830
831static int smsc95xx_phy_initialize(struct usbnet *dev)
832{
769ea6d8 833 int bmcr, ret, timeout = 0;
db443c44 834
2f7ca802
SG
835 /* Initialize MII structure */
836 dev->mii.dev = dev->net;
837 dev->mii.mdio_read = smsc95xx_mdio_read;
838 dev->mii.mdio_write = smsc95xx_mdio_write;
839 dev->mii.phy_id_mask = 0x1f;
840 dev->mii.reg_num_mask = 0x1f;
841 dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
842
db443c44 843 /* reset phy and wait for reset to complete */
2f7ca802 844 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
db443c44
SG
845
846 do {
847 msleep(10);
848 bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
849 timeout++;
d9460920 850 } while ((bmcr & BMCR_RESET) && (timeout < 100));
db443c44
SG
851
852 if (timeout >= 100) {
853 netdev_warn(dev->net, "timeout on PHY Reset");
854 return -EIO;
855 }
856
2f7ca802
SG
857 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
858 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
859 ADVERTISE_PAUSE_ASYM);
860
861 /* read to clear */
769ea6d8 862 ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
b052e073
SG
863 if (ret < 0) {
864 netdev_warn(dev->net, "Failed to read PHY_INT_SRC during init\n");
865 return ret;
866 }
2f7ca802
SG
867
868 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
869 PHY_INT_MASK_DEFAULT_);
870 mii_nway_restart(&dev->mii);
871
a475f603 872 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
2f7ca802
SG
873 return 0;
874}
875
876static int smsc95xx_reset(struct usbnet *dev)
877{
878 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
879 u32 read_buf, write_buf, burst_cap;
880 int ret = 0, timeout;
2f7ca802 881
a475f603 882 netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n");
2f7ca802 883
4436761b 884 ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_);
e360a8b4 885 if (ret < 0)
b052e073 886 return ret;
2f7ca802
SG
887
888 timeout = 0;
889 do {
cf2acec2 890 msleep(10);
2f7ca802 891 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 892 if (ret < 0)
b052e073 893 return ret;
2f7ca802
SG
894 timeout++;
895 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
896
897 if (timeout >= 100) {
60b86755 898 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n");
2f7ca802
SG
899 return ret;
900 }
901
4436761b 902 ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_);
e360a8b4 903 if (ret < 0)
b052e073 904 return ret;
2f7ca802
SG
905
906 timeout = 0;
907 do {
cf2acec2 908 msleep(10);
2f7ca802 909 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
e360a8b4 910 if (ret < 0)
b052e073 911 return ret;
2f7ca802
SG
912 timeout++;
913 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
914
915 if (timeout >= 100) {
60b86755 916 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
2f7ca802
SG
917 return ret;
918 }
919
2f7ca802
SG
920 ret = smsc95xx_set_mac_address(dev);
921 if (ret < 0)
922 return ret;
923
1e1d7412
JP
924 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n",
925 dev->net->dev_addr);
2f7ca802
SG
926
927 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 928 if (ret < 0)
b052e073 929 return ret;
2f7ca802 930
1e1d7412
JP
931 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n",
932 read_buf);
2f7ca802
SG
933
934 read_buf |= HW_CFG_BIR_;
935
936 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
e360a8b4 937 if (ret < 0)
b052e073 938 return ret;
2f7ca802
SG
939
940 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 941 if (ret < 0)
b052e073 942 return ret;
b052e073 943
a475f603
JP
944 netif_dbg(dev, ifup, dev->net,
945 "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
946 read_buf);
2f7ca802
SG
947
948 if (!turbo_mode) {
949 burst_cap = 0;
950 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
951 } else if (dev->udev->speed == USB_SPEED_HIGH) {
952 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
953 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
954 } else {
955 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
956 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
957 }
958
1e1d7412
JP
959 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n",
960 (ulong)dev->rx_urb_size);
2f7ca802
SG
961
962 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
e360a8b4 963 if (ret < 0)
b052e073 964 return ret;
2f7ca802
SG
965
966 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
e360a8b4 967 if (ret < 0)
b052e073 968 return ret;
769ea6d8 969
a475f603
JP
970 netif_dbg(dev, ifup, dev->net,
971 "Read Value from BURST_CAP after writing: 0x%08x\n",
972 read_buf);
2f7ca802 973
4436761b 974 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
e360a8b4 975 if (ret < 0)
b052e073 976 return ret;
2f7ca802
SG
977
978 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
e360a8b4 979 if (ret < 0)
b052e073 980 return ret;
769ea6d8 981
a475f603
JP
982 netif_dbg(dev, ifup, dev->net,
983 "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
984 read_buf);
2f7ca802
SG
985
986 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 987 if (ret < 0)
b052e073 988 return ret;
769ea6d8 989
1e1d7412
JP
990 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG: 0x%08x\n",
991 read_buf);
2f7ca802
SG
992
993 if (turbo_mode)
994 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
995
996 read_buf &= ~HW_CFG_RXDOFF_;
997
998 /* set Rx data offset=2, Make IP header aligns on word boundary. */
999 read_buf |= NET_IP_ALIGN << 9;
1000
1001 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
e360a8b4 1002 if (ret < 0)
b052e073 1003 return ret;
2f7ca802
SG
1004
1005 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 1006 if (ret < 0)
b052e073 1007 return ret;
769ea6d8 1008
a475f603
JP
1009 netif_dbg(dev, ifup, dev->net,
1010 "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
2f7ca802 1011
4436761b 1012 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
e360a8b4 1013 if (ret < 0)
b052e073 1014 return ret;
2f7ca802
SG
1015
1016 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
e360a8b4 1017 if (ret < 0)
b052e073 1018 return ret;
a475f603 1019 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
2f7ca802 1020
f293501c
SG
1021 /* Configure GPIO pins as LED outputs */
1022 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
1023 LED_GPIO_CFG_FDX_LED;
1024 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
e360a8b4 1025 if (ret < 0)
b052e073 1026 return ret;
f293501c 1027
2f7ca802 1028 /* Init Tx */
4436761b 1029 ret = smsc95xx_write_reg(dev, FLOW, 0);
e360a8b4 1030 if (ret < 0)
b052e073 1031 return ret;
2f7ca802 1032
4436761b 1033 ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT);
e360a8b4 1034 if (ret < 0)
b052e073 1035 return ret;
2f7ca802
SG
1036
1037 /* Don't need mac_cr_lock during initialisation */
1038 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
e360a8b4 1039 if (ret < 0)
b052e073 1040 return ret;
2f7ca802
SG
1041
1042 /* Init Rx */
1043 /* Set Vlan */
4436761b 1044 ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q);
e360a8b4 1045 if (ret < 0)
b052e073 1046 return ret;
2f7ca802 1047
f7b29271 1048 /* Enable or disable checksum offload engines */
769ea6d8 1049 ret = smsc95xx_set_features(dev->net, dev->net->features);
b052e073
SG
1050 if (ret < 0) {
1051 netdev_warn(dev->net, "Failed to set checksum offload features\n");
1052 return ret;
1053 }
2f7ca802
SG
1054
1055 smsc95xx_set_multicast(dev->net);
1056
769ea6d8 1057 ret = smsc95xx_phy_initialize(dev);
b052e073
SG
1058 if (ret < 0) {
1059 netdev_warn(dev->net, "Failed to init PHY\n");
1060 return ret;
1061 }
2f7ca802
SG
1062
1063 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
e360a8b4 1064 if (ret < 0)
b052e073 1065 return ret;
2f7ca802
SG
1066
1067 /* enable PHY interrupts */
1068 read_buf |= INT_EP_CTL_PHY_INT_;
1069
1070 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
e360a8b4 1071 if (ret < 0)
b052e073 1072 return ret;
2f7ca802 1073
769ea6d8 1074 ret = smsc95xx_start_tx_path(dev);
b052e073
SG
1075 if (ret < 0) {
1076 netdev_warn(dev->net, "Failed to start TX path\n");
1077 return ret;
1078 }
769ea6d8 1079
ec32115d 1080 ret = smsc95xx_start_rx_path(dev, 0);
b052e073
SG
1081 if (ret < 0) {
1082 netdev_warn(dev->net, "Failed to start RX path\n");
1083 return ret;
1084 }
2f7ca802 1085
a475f603 1086 netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n");
2f7ca802
SG
1087 return 0;
1088}
1089
63e77b39
SH
1090static const struct net_device_ops smsc95xx_netdev_ops = {
1091 .ndo_open = usbnet_open,
1092 .ndo_stop = usbnet_stop,
1093 .ndo_start_xmit = usbnet_start_xmit,
1094 .ndo_tx_timeout = usbnet_tx_timeout,
1095 .ndo_change_mtu = usbnet_change_mtu,
1096 .ndo_set_mac_address = eth_mac_addr,
1097 .ndo_validate_addr = eth_validate_addr,
1098 .ndo_do_ioctl = smsc95xx_ioctl,
afc4b13d 1099 .ndo_set_rx_mode = smsc95xx_set_multicast,
78e47fe4 1100 .ndo_set_features = smsc95xx_set_features,
63e77b39
SH
1101};
1102
2f7ca802
SG
1103static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
1104{
1105 struct smsc95xx_priv *pdata = NULL;
bbd9f9ee 1106 u32 val;
2f7ca802
SG
1107 int ret;
1108
1109 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1110
1111 ret = usbnet_get_endpoints(dev, intf);
b052e073
SG
1112 if (ret < 0) {
1113 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
1114 return ret;
1115 }
2f7ca802
SG
1116
1117 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
38673c82 1118 GFP_KERNEL);
2f7ca802
SG
1119
1120 pdata = (struct smsc95xx_priv *)(dev->data[0]);
38673c82 1121 if (!pdata)
2f7ca802 1122 return -ENOMEM;
2f7ca802
SG
1123
1124 spin_lock_init(&pdata->mac_cr_lock);
1125
78e47fe4
MM
1126 if (DEFAULT_TX_CSUM_ENABLE)
1127 dev->net->features |= NETIF_F_HW_CSUM;
1128 if (DEFAULT_RX_CSUM_ENABLE)
1129 dev->net->features |= NETIF_F_RXCSUM;
1130
1131 dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM;
2f7ca802 1132
f4e8ab7c
BB
1133 smsc95xx_init_mac_address(dev);
1134
2f7ca802
SG
1135 /* Init all registers */
1136 ret = smsc95xx_reset(dev);
1137
bbd9f9ee
SG
1138 /* detect device revision as different features may be available */
1139 ret = smsc95xx_read_reg(dev, ID_REV, &val);
e360a8b4 1140 if (ret < 0)
b052e073 1141 return ret;
bbd9f9ee 1142 val >>= 16;
9ebca507
SG
1143
1144 if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9530_) ||
1145 (val == ID_REV_CHIP_ID_89530_) || (val == ID_REV_CHIP_ID_9730_))
1146 pdata->features = (FEATURE_8_WAKEUP_FILTERS |
1147 FEATURE_PHY_NLP_CROSSOVER |
eb970ff0 1148 FEATURE_REMOTE_WAKEUP);
9ebca507
SG
1149 else if (val == ID_REV_CHIP_ID_9512_)
1150 pdata->features = FEATURE_8_WAKEUP_FILTERS;
bbd9f9ee 1151
63e77b39 1152 dev->net->netdev_ops = &smsc95xx_netdev_ops;
2f7ca802 1153 dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
2f7ca802 1154 dev->net->flags |= IFF_MULTICAST;
78e47fe4 1155 dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM;
9bbf5660 1156 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
2f7ca802
SG
1157 return 0;
1158}
1159
1160static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1161{
1162 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1163 if (pdata) {
a475f603 1164 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
2f7ca802
SG
1165 kfree(pdata);
1166 pdata = NULL;
1167 dev->data[0] = 0;
1168 }
1169}
1170
068bb1a7 1171static u32 smsc_crc(const u8 *buffer, size_t len, int filter)
bbd9f9ee 1172{
068bb1a7
SG
1173 u32 crc = bitrev16(crc16(0xFFFF, buffer, len));
1174 return crc << ((filter % 2) * 16);
bbd9f9ee
SG
1175}
1176
e5e3af83
SG
1177static int smsc95xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask)
1178{
1179 struct mii_if_info *mii = &dev->mii;
1180 int ret;
1181
1e1d7412 1182 netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n");
e5e3af83
SG
1183
1184 /* read to clear */
1185 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC);
e360a8b4 1186 if (ret < 0)
b052e073 1187 return ret;
e5e3af83
SG
1188
1189 /* enable interrupt source */
1190 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK);
e360a8b4 1191 if (ret < 0)
b052e073 1192 return ret;
e5e3af83
SG
1193
1194 ret |= mask;
1195
1196 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret);
1197
1198 return 0;
1199}
1200
1201static int smsc95xx_link_ok_nopm(struct usbnet *dev)
1202{
1203 struct mii_if_info *mii = &dev->mii;
1204 int ret;
1205
1206 /* first, a dummy read, needed to latch some MII phys */
1207 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
e360a8b4 1208 if (ret < 0)
b052e073 1209 return ret;
e5e3af83
SG
1210
1211 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
e360a8b4 1212 if (ret < 0)
b052e073 1213 return ret;
e5e3af83
SG
1214
1215 return !!(ret & BMSR_LSTATUS);
1216}
1217
319b95b5
SG
1218static int smsc95xx_enter_suspend0(struct usbnet *dev)
1219{
1220 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1221 u32 val;
1222 int ret;
1223
1224 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1225 if (ret < 0)
b052e073 1226 return ret;
319b95b5
SG
1227
1228 val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_));
1229 val |= PM_CTL_SUS_MODE_0;
1230
1231 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1232 if (ret < 0)
b052e073 1233 return ret;
319b95b5
SG
1234
1235 /* clear wol status */
1236 val &= ~PM_CTL_WUPS_;
1237 val |= PM_CTL_WUPS_WOL_;
1238
1239 /* enable energy detection */
1240 if (pdata->wolopts & WAKE_PHY)
1241 val |= PM_CTL_WUPS_ED_;
1242
1243 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1244 if (ret < 0)
b052e073 1245 return ret;
319b95b5
SG
1246
1247 /* read back PM_CTRL */
1248 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
76437214
ML
1249 if (ret < 0)
1250 return ret;
319b95b5 1251
b2d4b150
SG
1252 pdata->suspend_flags |= SUSPEND_SUSPEND0;
1253
76437214 1254 return 0;
319b95b5
SG
1255}
1256
1257static int smsc95xx_enter_suspend1(struct usbnet *dev)
1258{
1259 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1260 struct mii_if_info *mii = &dev->mii;
1261 u32 val;
1262 int ret;
1263
1264 /* reconfigure link pulse detection timing for
1265 * compatibility with non-standard link partners
1266 */
1267 if (pdata->features & FEATURE_PHY_NLP_CROSSOVER)
1268 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_EDPD_CONFIG,
1269 PHY_EDPD_CONFIG_DEFAULT);
1270
1271 /* enable energy detect power-down mode */
1272 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS);
e360a8b4 1273 if (ret < 0)
b052e073 1274 return ret;
319b95b5
SG
1275
1276 ret |= MODE_CTRL_STS_EDPWRDOWN_;
1277
1278 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS, ret);
1279
1280 /* enter SUSPEND1 mode */
1281 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1282 if (ret < 0)
b052e073 1283 return ret;
319b95b5
SG
1284
1285 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
1286 val |= PM_CTL_SUS_MODE_1;
1287
1288 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1289 if (ret < 0)
b052e073 1290 return ret;
319b95b5
SG
1291
1292 /* clear wol status, enable energy detection */
1293 val &= ~PM_CTL_WUPS_;
1294 val |= (PM_CTL_WUPS_ED_ | PM_CTL_ED_EN_);
1295
1296 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
76437214
ML
1297 if (ret < 0)
1298 return ret;
319b95b5 1299
b2d4b150
SG
1300 pdata->suspend_flags |= SUSPEND_SUSPEND1;
1301
76437214 1302 return 0;
319b95b5
SG
1303}
1304
1305static int smsc95xx_enter_suspend2(struct usbnet *dev)
1306{
b2d4b150 1307 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
319b95b5
SG
1308 u32 val;
1309 int ret;
1310
1311 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1312 if (ret < 0)
b052e073 1313 return ret;
319b95b5
SG
1314
1315 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
1316 val |= PM_CTL_SUS_MODE_2;
1317
1318 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
76437214
ML
1319 if (ret < 0)
1320 return ret;
319b95b5 1321
b2d4b150
SG
1322 pdata->suspend_flags |= SUSPEND_SUSPEND2;
1323
76437214 1324 return 0;
319b95b5
SG
1325}
1326
b2d4b150
SG
1327static int smsc95xx_enter_suspend3(struct usbnet *dev)
1328{
1329 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1330 u32 val;
1331 int ret;
1332
1333 ret = smsc95xx_read_reg_nopm(dev, RX_FIFO_INF, &val);
1334 if (ret < 0)
1335 return ret;
1336
1337 if (val & 0xFFFF) {
1338 netdev_info(dev->net, "rx fifo not empty in autosuspend\n");
1339 return -EBUSY;
1340 }
1341
1342 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
1343 if (ret < 0)
1344 return ret;
1345
1346 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
1347 val |= PM_CTL_SUS_MODE_3 | PM_CTL_RES_CLR_WKP_STS;
1348
1349 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1350 if (ret < 0)
1351 return ret;
1352
1353 /* clear wol status */
1354 val &= ~PM_CTL_WUPS_;
1355 val |= PM_CTL_WUPS_WOL_;
1356
1357 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1358 if (ret < 0)
1359 return ret;
1360
1361 pdata->suspend_flags |= SUSPEND_SUSPEND3;
1362
1363 return 0;
1364}
1365
1366static int smsc95xx_autosuspend(struct usbnet *dev, u32 link_up)
1367{
1368 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1369 int ret;
1370
1371 if (!netif_running(dev->net)) {
1372 /* interface is ifconfig down so fully power down hw */
1373 netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n");
1374 return smsc95xx_enter_suspend2(dev);
1375 }
1376
1377 if (!link_up) {
1378 /* link is down so enter EDPD mode, but only if device can
1379 * reliably resume from it. This check should be redundant
eb970ff0 1380 * as current FEATURE_REMOTE_WAKEUP parts also support
b2d4b150
SG
1381 * FEATURE_PHY_NLP_CROSSOVER but it's included for clarity */
1382 if (!(pdata->features & FEATURE_PHY_NLP_CROSSOVER)) {
1383 netdev_warn(dev->net, "EDPD not supported\n");
1384 return -EBUSY;
1385 }
1386
1387 netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n");
1388
1389 /* enable PHY wakeup events for if cable is attached */
1390 ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
1391 PHY_INT_MASK_ANEG_COMP_);
1392 if (ret < 0) {
1393 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1394 return ret;
1395 }
1396
1397 netdev_info(dev->net, "entering SUSPEND1 mode\n");
1398 return smsc95xx_enter_suspend1(dev);
1399 }
1400
1401 /* enable PHY wakeup events so we remote wakeup if cable is pulled */
1402 ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
1403 PHY_INT_MASK_LINK_DOWN_);
1404 if (ret < 0) {
1405 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1406 return ret;
1407 }
1408
1409 netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n");
1410 return smsc95xx_enter_suspend3(dev);
1411}
1412
b5a04475
SG
1413static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message)
1414{
1415 struct usbnet *dev = usb_get_intfdata(intf);
e0e474a8 1416 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
e5e3af83 1417 u32 val, link_up;
b5a04475 1418 int ret;
b5a04475 1419
b5a04475 1420 ret = usbnet_suspend(intf, message);
b052e073
SG
1421 if (ret < 0) {
1422 netdev_warn(dev->net, "usbnet_suspend error\n");
1423 return ret;
1424 }
b5a04475 1425
b2d4b150
SG
1426 if (pdata->suspend_flags) {
1427 netdev_warn(dev->net, "error during last resume\n");
1428 pdata->suspend_flags = 0;
1429 }
1430
e5e3af83
SG
1431 /* determine if link is up using only _nopm functions */
1432 link_up = smsc95xx_link_ok_nopm(dev);
1433
42e21c01 1434 if (message.event == PM_EVENT_AUTO_SUSPEND &&
eb970ff0 1435 (pdata->features & FEATURE_REMOTE_WAKEUP)) {
b2d4b150
SG
1436 ret = smsc95xx_autosuspend(dev, link_up);
1437 goto done;
1438 }
1439
1440 /* if we get this far we're not autosuspending */
e5e3af83
SG
1441 /* if no wol options set, or if link is down and we're not waking on
1442 * PHY activity, enter lowest power SUSPEND2 mode
1443 */
1444 if (!(pdata->wolopts & SUPPORTED_WAKE) ||
1445 !(link_up || (pdata->wolopts & WAKE_PHY))) {
1e1d7412 1446 netdev_info(dev->net, "entering SUSPEND2 mode\n");
e0e474a8
SG
1447
1448 /* disable energy detect (link up) & wake up events */
ec32115d 1449 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1450 if (ret < 0)
b052e073 1451 goto done;
e0e474a8
SG
1452
1453 val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_);
1454
ec32115d 1455 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1456 if (ret < 0)
b052e073 1457 goto done;
e0e474a8 1458
ec32115d 1459 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1460 if (ret < 0)
b052e073 1461 goto done;
e0e474a8
SG
1462
1463 val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_);
1464
ec32115d 1465 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1466 if (ret < 0)
b052e073 1467 goto done;
e0e474a8 1468
3b9f7d8c
SG
1469 ret = smsc95xx_enter_suspend2(dev);
1470 goto done;
e0e474a8
SG
1471 }
1472
e5e3af83
SG
1473 if (pdata->wolopts & WAKE_PHY) {
1474 ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
1475 (PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_LINK_DOWN_));
b052e073
SG
1476 if (ret < 0) {
1477 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1478 goto done;
1479 }
e5e3af83
SG
1480
1481 /* if link is down then configure EDPD and enter SUSPEND1,
1482 * otherwise enter SUSPEND0 below
1483 */
1484 if (!link_up) {
1e1d7412 1485 netdev_info(dev->net, "entering SUSPEND1 mode\n");
3b9f7d8c
SG
1486 ret = smsc95xx_enter_suspend1(dev);
1487 goto done;
e5e3af83
SG
1488 }
1489 }
1490
bbd9f9ee 1491 if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
eed9a729 1492 u32 *filter_mask = kzalloc(sizeof(u32) * 32, GFP_KERNEL);
06a221be
ML
1493 u32 command[2];
1494 u32 offset[2];
1495 u32 crc[4];
9ebca507
SG
1496 int wuff_filter_count =
1497 (pdata->features & FEATURE_8_WAKEUP_FILTERS) ?
1498 LAN9500A_WUFF_NUM : LAN9500_WUFF_NUM;
bbd9f9ee
SG
1499 int i, filter = 0;
1500
eed9a729
SG
1501 if (!filter_mask) {
1502 netdev_warn(dev->net, "Unable to allocate filter_mask\n");
3b9f7d8c
SG
1503 ret = -ENOMEM;
1504 goto done;
eed9a729
SG
1505 }
1506
06a221be
ML
1507 memset(command, 0, sizeof(command));
1508 memset(offset, 0, sizeof(offset));
1509 memset(crc, 0, sizeof(crc));
1510
bbd9f9ee
SG
1511 if (pdata->wolopts & WAKE_BCAST) {
1512 const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
1e1d7412 1513 netdev_info(dev->net, "enabling broadcast detection\n");
bbd9f9ee
SG
1514 filter_mask[filter * 4] = 0x003F;
1515 filter_mask[filter * 4 + 1] = 0x00;
1516 filter_mask[filter * 4 + 2] = 0x00;
1517 filter_mask[filter * 4 + 3] = 0x00;
1518 command[filter/4] |= 0x05UL << ((filter % 4) * 8);
1519 offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1520 crc[filter/2] |= smsc_crc(bcast, 6, filter);
1521 filter++;
1522 }
1523
1524 if (pdata->wolopts & WAKE_MCAST) {
1525 const u8 mcast[] = {0x01, 0x00, 0x5E};
1e1d7412 1526 netdev_info(dev->net, "enabling multicast detection\n");
bbd9f9ee
SG
1527 filter_mask[filter * 4] = 0x0007;
1528 filter_mask[filter * 4 + 1] = 0x00;
1529 filter_mask[filter * 4 + 2] = 0x00;
1530 filter_mask[filter * 4 + 3] = 0x00;
1531 command[filter/4] |= 0x09UL << ((filter % 4) * 8);
1532 offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1533 crc[filter/2] |= smsc_crc(mcast, 3, filter);
1534 filter++;
1535 }
1536
1537 if (pdata->wolopts & WAKE_ARP) {
1538 const u8 arp[] = {0x08, 0x06};
1e1d7412 1539 netdev_info(dev->net, "enabling ARP detection\n");
bbd9f9ee
SG
1540 filter_mask[filter * 4] = 0x0003;
1541 filter_mask[filter * 4 + 1] = 0x00;
1542 filter_mask[filter * 4 + 2] = 0x00;
1543 filter_mask[filter * 4 + 3] = 0x00;
1544 command[filter/4] |= 0x05UL << ((filter % 4) * 8);
1545 offset[filter/4] |= 0x0C << ((filter % 4) * 8);
1546 crc[filter/2] |= smsc_crc(arp, 2, filter);
1547 filter++;
1548 }
1549
1550 if (pdata->wolopts & WAKE_UCAST) {
1e1d7412 1551 netdev_info(dev->net, "enabling unicast detection\n");
bbd9f9ee
SG
1552 filter_mask[filter * 4] = 0x003F;
1553 filter_mask[filter * 4 + 1] = 0x00;
1554 filter_mask[filter * 4 + 2] = 0x00;
1555 filter_mask[filter * 4 + 3] = 0x00;
1556 command[filter/4] |= 0x01UL << ((filter % 4) * 8);
1557 offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1558 crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter);
1559 filter++;
1560 }
1561
9ebca507 1562 for (i = 0; i < (wuff_filter_count * 4); i++) {
ec32115d 1563 ret = smsc95xx_write_reg_nopm(dev, WUFF, filter_mask[i]);
b052e073 1564 if (ret < 0) {
06a221be 1565 kfree(filter_mask);
b052e073
SG
1566 goto done;
1567 }
bbd9f9ee 1568 }
06a221be 1569 kfree(filter_mask);
bbd9f9ee 1570
9ebca507 1571 for (i = 0; i < (wuff_filter_count / 4); i++) {
ec32115d 1572 ret = smsc95xx_write_reg_nopm(dev, WUFF, command[i]);
e360a8b4 1573 if (ret < 0)
b052e073 1574 goto done;
bbd9f9ee
SG
1575 }
1576
9ebca507 1577 for (i = 0; i < (wuff_filter_count / 4); i++) {
ec32115d 1578 ret = smsc95xx_write_reg_nopm(dev, WUFF, offset[i]);
e360a8b4 1579 if (ret < 0)
b052e073 1580 goto done;
bbd9f9ee
SG
1581 }
1582
9ebca507 1583 for (i = 0; i < (wuff_filter_count / 2); i++) {
ec32115d 1584 ret = smsc95xx_write_reg_nopm(dev, WUFF, crc[i]);
e360a8b4 1585 if (ret < 0)
b052e073 1586 goto done;
bbd9f9ee
SG
1587 }
1588
1589 /* clear any pending pattern match packet status */
ec32115d 1590 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1591 if (ret < 0)
b052e073 1592 goto done;
bbd9f9ee
SG
1593
1594 val |= WUCSR_WUFR_;
1595
ec32115d 1596 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1597 if (ret < 0)
b052e073 1598 goto done;
bbd9f9ee
SG
1599 }
1600
e0e474a8
SG
1601 if (pdata->wolopts & WAKE_MAGIC) {
1602 /* clear any pending magic packet status */
ec32115d 1603 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1604 if (ret < 0)
b052e073 1605 goto done;
e0e474a8
SG
1606
1607 val |= WUCSR_MPR_;
1608
ec32115d 1609 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1610 if (ret < 0)
b052e073 1611 goto done;
e0e474a8
SG
1612 }
1613
bbd9f9ee 1614 /* enable/disable wakeup sources */
ec32115d 1615 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1616 if (ret < 0)
b052e073 1617 goto done;
e0e474a8 1618
bbd9f9ee 1619 if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
1e1d7412 1620 netdev_info(dev->net, "enabling pattern match wakeup\n");
bbd9f9ee
SG
1621 val |= WUCSR_WAKE_EN_;
1622 } else {
1e1d7412 1623 netdev_info(dev->net, "disabling pattern match wakeup\n");
bbd9f9ee
SG
1624 val &= ~WUCSR_WAKE_EN_;
1625 }
1626
e0e474a8 1627 if (pdata->wolopts & WAKE_MAGIC) {
1e1d7412 1628 netdev_info(dev->net, "enabling magic packet wakeup\n");
e0e474a8
SG
1629 val |= WUCSR_MPEN_;
1630 } else {
1e1d7412 1631 netdev_info(dev->net, "disabling magic packet wakeup\n");
e0e474a8
SG
1632 val &= ~WUCSR_MPEN_;
1633 }
1634
ec32115d 1635 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1636 if (ret < 0)
b052e073 1637 goto done;
e0e474a8
SG
1638
1639 /* enable wol wakeup source */
ec32115d 1640 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1641 if (ret < 0)
b052e073 1642 goto done;
e0e474a8
SG
1643
1644 val |= PM_CTL_WOL_EN_;
1645
e5e3af83
SG
1646 /* phy energy detect wakeup source */
1647 if (pdata->wolopts & WAKE_PHY)
1648 val |= PM_CTL_ED_EN_;
1649
ec32115d 1650 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1651 if (ret < 0)
b052e073 1652 goto done;
e0e474a8 1653
bbd9f9ee 1654 /* enable receiver to enable frame reception */
ec32115d 1655 smsc95xx_start_rx_path(dev, 1);
e0e474a8
SG
1656
1657 /* some wol options are enabled, so enter SUSPEND0 */
1e1d7412 1658 netdev_info(dev->net, "entering SUSPEND0 mode\n");
3b9f7d8c
SG
1659 ret = smsc95xx_enter_suspend0(dev);
1660
1661done:
0d41be53
ML
1662 /*
1663 * TODO: resume() might need to handle the suspend failure
1664 * in system sleep
1665 */
1666 if (ret && PMSG_IS_AUTO(message))
3b9f7d8c
SG
1667 usbnet_resume(intf);
1668 return ret;
e0e474a8
SG
1669}
1670
1671static int smsc95xx_resume(struct usb_interface *intf)
1672{
1673 struct usbnet *dev = usb_get_intfdata(intf);
1674 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
b2d4b150 1675 u8 suspend_flags = pdata->suspend_flags;
e0e474a8
SG
1676 int ret;
1677 u32 val;
1678
1679 BUG_ON(!dev);
1680
b2d4b150
SG
1681 netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags);
1682
1683 /* do this first to ensure it's cleared even in error case */
1684 pdata->suspend_flags = 0;
1685
1686 if (suspend_flags & SUSPEND_ALLMODES) {
bbd9f9ee 1687 /* clear wake-up sources */
ec32115d 1688 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1689 if (ret < 0)
b052e073 1690 return ret;
e0e474a8 1691
bbd9f9ee 1692 val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_);
e0e474a8 1693
ec32115d 1694 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1695 if (ret < 0)
b052e073 1696 return ret;
e0e474a8
SG
1697
1698 /* clear wake-up status */
ec32115d 1699 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1700 if (ret < 0)
b052e073 1701 return ret;
e0e474a8
SG
1702
1703 val &= ~PM_CTL_WOL_EN_;
1704 val |= PM_CTL_WUPS_;
1705
ec32115d 1706 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1707 if (ret < 0)
b052e073 1708 return ret;
e0e474a8
SG
1709 }
1710
af3d7c1e 1711 ret = usbnet_resume(intf);
b052e073
SG
1712 if (ret < 0)
1713 netdev_warn(dev->net, "usbnet_resume error\n");
e0e474a8 1714
b052e073 1715 return ret;
b5a04475
SG
1716}
1717
2f7ca802
SG
1718static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1719{
1720 skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1721 skb->ip_summed = CHECKSUM_COMPLETE;
1722 skb_trim(skb, skb->len - 2);
1723}
1724
1725static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1726{
2f7ca802
SG
1727 while (skb->len > 0) {
1728 u32 header, align_count;
1729 struct sk_buff *ax_skb;
1730 unsigned char *packet;
1731 u16 size;
1732
1733 memcpy(&header, skb->data, sizeof(header));
1734 le32_to_cpus(&header);
1735 skb_pull(skb, 4 + NET_IP_ALIGN);
1736 packet = skb->data;
1737
1738 /* get the packet length */
1739 size = (u16)((header & RX_STS_FL_) >> 16);
1740 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1741
1742 if (unlikely(header & RX_STS_ES_)) {
a475f603
JP
1743 netif_dbg(dev, rx_err, dev->net,
1744 "Error header=0x%08x\n", header);
80667ac1
HX
1745 dev->net->stats.rx_errors++;
1746 dev->net->stats.rx_dropped++;
2f7ca802
SG
1747
1748 if (header & RX_STS_CRC_) {
80667ac1 1749 dev->net->stats.rx_crc_errors++;
2f7ca802
SG
1750 } else {
1751 if (header & (RX_STS_TL_ | RX_STS_RF_))
80667ac1 1752 dev->net->stats.rx_frame_errors++;
2f7ca802
SG
1753
1754 if ((header & RX_STS_LE_) &&
1755 (!(header & RX_STS_FT_)))
80667ac1 1756 dev->net->stats.rx_length_errors++;
2f7ca802
SG
1757 }
1758 } else {
1759 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1760 if (unlikely(size > (ETH_FRAME_LEN + 12))) {
a475f603
JP
1761 netif_dbg(dev, rx_err, dev->net,
1762 "size err header=0x%08x\n", header);
2f7ca802
SG
1763 return 0;
1764 }
1765
1766 /* last frame in this batch */
1767 if (skb->len == size) {
78e47fe4 1768 if (dev->net->features & NETIF_F_RXCSUM)
2f7ca802 1769 smsc95xx_rx_csum_offload(skb);
df18acca 1770 skb_trim(skb, skb->len - 4); /* remove fcs */
2f7ca802
SG
1771 skb->truesize = size + sizeof(struct sk_buff);
1772
1773 return 1;
1774 }
1775
1776 ax_skb = skb_clone(skb, GFP_ATOMIC);
1777 if (unlikely(!ax_skb)) {
60b86755 1778 netdev_warn(dev->net, "Error allocating skb\n");
2f7ca802
SG
1779 return 0;
1780 }
1781
1782 ax_skb->len = size;
1783 ax_skb->data = packet;
1784 skb_set_tail_pointer(ax_skb, size);
1785
78e47fe4 1786 if (dev->net->features & NETIF_F_RXCSUM)
2f7ca802 1787 smsc95xx_rx_csum_offload(ax_skb);
df18acca 1788 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
2f7ca802
SG
1789 ax_skb->truesize = size + sizeof(struct sk_buff);
1790
1791 usbnet_skb_return(dev, ax_skb);
1792 }
1793
1794 skb_pull(skb, size);
1795
1796 /* padding bytes before the next frame starts */
1797 if (skb->len)
1798 skb_pull(skb, align_count);
1799 }
1800
1801 if (unlikely(skb->len < 0)) {
60b86755 1802 netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len);
2f7ca802
SG
1803 return 0;
1804 }
1805
1806 return 1;
1807}
1808
f7b29271
SG
1809static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
1810{
55508d60
MM
1811 u16 low_16 = (u16)skb_checksum_start_offset(skb);
1812 u16 high_16 = low_16 + skb->csum_offset;
f7b29271
SG
1813 return (high_16 << 16) | low_16;
1814}
1815
2f7ca802
SG
1816static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
1817 struct sk_buff *skb, gfp_t flags)
1818{
78e47fe4 1819 bool csum = skb->ip_summed == CHECKSUM_PARTIAL;
f7b29271 1820 int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
2f7ca802
SG
1821 u32 tx_cmd_a, tx_cmd_b;
1822
f7b29271
SG
1823 /* We do not advertise SG, so skbs should be already linearized */
1824 BUG_ON(skb_shinfo(skb)->nr_frags);
1825
1826 if (skb_headroom(skb) < overhead) {
2f7ca802 1827 struct sk_buff *skb2 = skb_copy_expand(skb,
f7b29271 1828 overhead, 0, flags);
2f7ca802
SG
1829 dev_kfree_skb_any(skb);
1830 skb = skb2;
1831 if (!skb)
1832 return NULL;
1833 }
1834
f7b29271 1835 if (csum) {
11bc3088
SG
1836 if (skb->len <= 45) {
1837 /* workaround - hardware tx checksum does not work
1838 * properly with extremely small packets */
55508d60 1839 long csstart = skb_checksum_start_offset(skb);
11bc3088
SG
1840 __wsum calc = csum_partial(skb->data + csstart,
1841 skb->len - csstart, 0);
1842 *((__sum16 *)(skb->data + csstart
1843 + skb->csum_offset)) = csum_fold(calc);
1844
1845 csum = false;
1846 } else {
1847 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
1848 skb_push(skb, 4);
00acda68 1849 cpu_to_le32s(&csum_preamble);
11bc3088
SG
1850 memcpy(skb->data, &csum_preamble, 4);
1851 }
f7b29271
SG
1852 }
1853
2f7ca802
SG
1854 skb_push(skb, 4);
1855 tx_cmd_b = (u32)(skb->len - 4);
f7b29271
SG
1856 if (csum)
1857 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
2f7ca802
SG
1858 cpu_to_le32s(&tx_cmd_b);
1859 memcpy(skb->data, &tx_cmd_b, 4);
1860
1861 skb_push(skb, 4);
1862 tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
1863 TX_CMD_A_LAST_SEG_;
1864 cpu_to_le32s(&tx_cmd_a);
1865 memcpy(skb->data, &tx_cmd_a, 4);
1866
1867 return skb;
1868}
1869
b2d4b150
SG
1870static int smsc95xx_manage_power(struct usbnet *dev, int on)
1871{
1872 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1873
1874 dev->intf->needs_remote_wakeup = on;
1875
eb970ff0 1876 if (pdata->features & FEATURE_REMOTE_WAKEUP)
b2d4b150
SG
1877 return 0;
1878
eb970ff0
ML
1879 /* this chip revision isn't capable of remote wakeup */
1880 netdev_info(dev->net, "hardware isn't capable of remote wakeup\n");
b2d4b150
SG
1881
1882 if (on)
1883 usb_autopm_get_interface_no_resume(dev->intf);
1884 else
1885 usb_autopm_put_interface(dev->intf);
1886
1887 return 0;
1888}
1889
2f7ca802
SG
1890static const struct driver_info smsc95xx_info = {
1891 .description = "smsc95xx USB 2.0 Ethernet",
1892 .bind = smsc95xx_bind,
1893 .unbind = smsc95xx_unbind,
1894 .link_reset = smsc95xx_link_reset,
1895 .reset = smsc95xx_reset,
1896 .rx_fixup = smsc95xx_rx_fixup,
1897 .tx_fixup = smsc95xx_tx_fixup,
1898 .status = smsc95xx_status,
b2d4b150 1899 .manage_power = smsc95xx_manage_power,
07d69d42 1900 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
2f7ca802
SG
1901};
1902
1903static const struct usb_device_id products[] = {
1904 {
1905 /* SMSC9500 USB Ethernet Device */
1906 USB_DEVICE(0x0424, 0x9500),
1907 .driver_info = (unsigned long) &smsc95xx_info,
1908 },
6f41d12b
SG
1909 {
1910 /* SMSC9505 USB Ethernet Device */
1911 USB_DEVICE(0x0424, 0x9505),
1912 .driver_info = (unsigned long) &smsc95xx_info,
1913 },
1914 {
1915 /* SMSC9500A USB Ethernet Device */
1916 USB_DEVICE(0x0424, 0x9E00),
1917 .driver_info = (unsigned long) &smsc95xx_info,
1918 },
1919 {
1920 /* SMSC9505A USB Ethernet Device */
1921 USB_DEVICE(0x0424, 0x9E01),
1922 .driver_info = (unsigned long) &smsc95xx_info,
1923 },
726474b8
SG
1924 {
1925 /* SMSC9512/9514 USB Hub & Ethernet Device */
1926 USB_DEVICE(0x0424, 0xec00),
1927 .driver_info = (unsigned long) &smsc95xx_info,
1928 },
6f41d12b
SG
1929 {
1930 /* SMSC9500 USB Ethernet Device (SAL10) */
1931 USB_DEVICE(0x0424, 0x9900),
1932 .driver_info = (unsigned long) &smsc95xx_info,
1933 },
1934 {
1935 /* SMSC9505 USB Ethernet Device (SAL10) */
1936 USB_DEVICE(0x0424, 0x9901),
1937 .driver_info = (unsigned long) &smsc95xx_info,
1938 },
1939 {
1940 /* SMSC9500A USB Ethernet Device (SAL10) */
1941 USB_DEVICE(0x0424, 0x9902),
1942 .driver_info = (unsigned long) &smsc95xx_info,
1943 },
1944 {
1945 /* SMSC9505A USB Ethernet Device (SAL10) */
1946 USB_DEVICE(0x0424, 0x9903),
1947 .driver_info = (unsigned long) &smsc95xx_info,
1948 },
1949 {
1950 /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */
1951 USB_DEVICE(0x0424, 0x9904),
1952 .driver_info = (unsigned long) &smsc95xx_info,
1953 },
1954 {
1955 /* SMSC9500A USB Ethernet Device (HAL) */
1956 USB_DEVICE(0x0424, 0x9905),
1957 .driver_info = (unsigned long) &smsc95xx_info,
1958 },
1959 {
1960 /* SMSC9505A USB Ethernet Device (HAL) */
1961 USB_DEVICE(0x0424, 0x9906),
1962 .driver_info = (unsigned long) &smsc95xx_info,
1963 },
1964 {
1965 /* SMSC9500 USB Ethernet Device (Alternate ID) */
1966 USB_DEVICE(0x0424, 0x9907),
1967 .driver_info = (unsigned long) &smsc95xx_info,
1968 },
1969 {
1970 /* SMSC9500A USB Ethernet Device (Alternate ID) */
1971 USB_DEVICE(0x0424, 0x9908),
1972 .driver_info = (unsigned long) &smsc95xx_info,
1973 },
1974 {
1975 /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */
1976 USB_DEVICE(0x0424, 0x9909),
1977 .driver_info = (unsigned long) &smsc95xx_info,
1978 },
88edaa41
SG
1979 {
1980 /* SMSC LAN9530 USB Ethernet Device */
1981 USB_DEVICE(0x0424, 0x9530),
1982 .driver_info = (unsigned long) &smsc95xx_info,
1983 },
1984 {
1985 /* SMSC LAN9730 USB Ethernet Device */
1986 USB_DEVICE(0x0424, 0x9730),
1987 .driver_info = (unsigned long) &smsc95xx_info,
1988 },
1989 {
1990 /* SMSC LAN89530 USB Ethernet Device */
1991 USB_DEVICE(0x0424, 0x9E08),
1992 .driver_info = (unsigned long) &smsc95xx_info,
1993 },
2f7ca802
SG
1994 { }, /* END */
1995};
1996MODULE_DEVICE_TABLE(usb, products);
1997
1998static struct usb_driver smsc95xx_driver = {
1999 .name = "smsc95xx",
2000 .id_table = products,
2001 .probe = usbnet_probe,
b5a04475 2002 .suspend = smsc95xx_suspend,
e0e474a8
SG
2003 .resume = smsc95xx_resume,
2004 .reset_resume = smsc95xx_resume,
2f7ca802 2005 .disconnect = usbnet_disconnect,
e1f12eb6 2006 .disable_hub_initiated_lpm = 1,
b2d4b150 2007 .supports_autosuspend = 1,
2f7ca802
SG
2008};
2009
d632eb1b 2010module_usb_driver(smsc95xx_driver);
2f7ca802
SG
2011
2012MODULE_AUTHOR("Nancy Lin");
90b24cfb 2013MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>");
2f7ca802
SG
2014MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
2015MODULE_LICENSE("GPL");