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usbnet: Convert dev(dbg|err|warn|info) macros to netdev_<level>
[linux-2.6-block.git] / drivers / net / usb / smsc95xx.c
CommitLineData
2f7ca802
SG		 1 /***************************************************************************
2 *
3 * Copyright (C) 2007-2008 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 *
19 *****************************************************************************/
20
21#include <linux/module.h>
22#include <linux/kmod.h>
23#include <linux/init.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/ethtool.h>
27#include <linux/mii.h>
28#include <linux/usb.h>
29#include <linux/crc32.h>
30#include <linux/usb/usbnet.h>
31#include "smsc95xx.h"
32
33#define SMSC_CHIPNAME "smsc95xx"
f7b29271 34#define SMSC_DRIVER_VERSION "1.0.4"
2f7ca802
SG		 35#define HS_USB_PKT_SIZE (512)
36#define FS_USB_PKT_SIZE (64)
37#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
38#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
39#define DEFAULT_BULK_IN_DELAY (0x00002000)
40#define MAX_SINGLE_PACKET_SIZE (2048)
41#define LAN95XX_EEPROM_MAGIC (0x9500)
42#define EEPROM_MAC_OFFSET (0x01)
f7b29271 43#define DEFAULT_TX_CSUM_ENABLE (true)
2f7ca802
SG		 44#define DEFAULT_RX_CSUM_ENABLE (true)
45#define SMSC95XX_INTERNAL_PHY_ID (1)
46#define SMSC95XX_TX_OVERHEAD (8)
f7b29271 47#define SMSC95XX_TX_OVERHEAD_CSUM (12)
2f7ca802
SG		 48
49struct smsc95xx_priv {
50 u32 mac_cr;
51 spinlock_t mac_cr_lock;
f7b29271 52 bool use_tx_csum;
2f7ca802
SG		 53 bool use_rx_csum;
54};
55
56struct usb_context {
57 struct usb_ctrlrequest req;
2f7ca802
SG		 58 struct usbnet *dev;
59};
60
0227abc9 61static int turbo_mode = true;
2f7ca802
SG		 62module_param(turbo_mode, bool, 0644);
63MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
64
65static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data)
66{
67 u32 *buf = kmalloc(4, GFP_KERNEL);
68 int ret;
69
70 BUG_ON(!dev);
71
72 if (!buf)
73 return -ENOMEM;
74
75 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
76 USB_VENDOR_REQUEST_READ_REGISTER,
77 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
78 00, index, buf, 4, USB_CTRL_GET_TIMEOUT);
79
80 if (unlikely(ret < 0))
60b86755 81 netdev_warn(dev->net, "Failed to read register index 0x%08x\n", index);
2f7ca802
SG		 82
83 le32_to_cpus(buf);
84 *data = *buf;
85 kfree(buf);
86
87 return ret;
88}
89
90static int smsc95xx_write_reg(struct usbnet *dev, u32 index, u32 data)
91{
92 u32 *buf = kmalloc(4, GFP_KERNEL);
93 int ret;
94
95 BUG_ON(!dev);
96
97 if (!buf)
98 return -ENOMEM;
99
100 *buf = data;
101 cpu_to_le32s(buf);
102
103 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
104 USB_VENDOR_REQUEST_WRITE_REGISTER,
105 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
106 00, index, buf, 4, USB_CTRL_SET_TIMEOUT);
107
108 if (unlikely(ret < 0))
60b86755 109 netdev_warn(dev->net, "Failed to write register index 0x%08x\n", index);
2f7ca802
SG		 110
111 kfree(buf);
112
113 return ret;
114}
115
116/* Loop until the read is completed with timeout
117 * called with phy_mutex held */
118static int smsc95xx_phy_wait_not_busy(struct usbnet *dev)
119{
120 unsigned long start_time = jiffies;
121 u32 val;
122
123 do {
124 smsc95xx_read_reg(dev, MII_ADDR, &val);
125 if (!(val & MII_BUSY_))
126 return 0;
127 } while (!time_after(jiffies, start_time + HZ));
128
129 return -EIO;
130}
131
132static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
133{
134 struct usbnet *dev = netdev_priv(netdev);
135 u32 val, addr;
136
137 mutex_lock(&dev->phy_mutex);
138
139 /* confirm MII not busy */
140 if (smsc95xx_phy_wait_not_busy(dev)) {
60b86755 141 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n");
2f7ca802
SG		 142 mutex_unlock(&dev->phy_mutex);
143 return -EIO;
144 }
145
146 /* set the address, index & direction (read from PHY) */
147 phy_id &= dev->mii.phy_id_mask;
148 idx &= dev->mii.reg_num_mask;
149 addr = (phy_id << 11) | (idx << 6) | MII_READ_;
150 smsc95xx_write_reg(dev, MII_ADDR, addr);
151
152 if (smsc95xx_phy_wait_not_busy(dev)) {
60b86755 153 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
2f7ca802
SG		 154 mutex_unlock(&dev->phy_mutex);
155 return -EIO;
156 }
157
158 smsc95xx_read_reg(dev, MII_DATA, &val);
159
160 mutex_unlock(&dev->phy_mutex);
161
162 return (u16)(val & 0xFFFF);
163}
164
165static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
166 int regval)
167{
168 struct usbnet *dev = netdev_priv(netdev);
169 u32 val, addr;
170
171 mutex_lock(&dev->phy_mutex);
172
173 /* confirm MII not busy */
174 if (smsc95xx_phy_wait_not_busy(dev)) {
60b86755 175 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n");
2f7ca802
SG		 176 mutex_unlock(&dev->phy_mutex);
177 return;
178 }
179
180 val = regval;
181 smsc95xx_write_reg(dev, MII_DATA, val);
182
183 /* set the address, index & direction (write to PHY) */
184 phy_id &= dev->mii.phy_id_mask;
185 idx &= dev->mii.reg_num_mask;
186 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
187 smsc95xx_write_reg(dev, MII_ADDR, addr);
188
189 if (smsc95xx_phy_wait_not_busy(dev))
60b86755 190 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
2f7ca802
SG		 191
192 mutex_unlock(&dev->phy_mutex);
193}
194
195static int smsc95xx_wait_eeprom(struct usbnet *dev)
196{
197 unsigned long start_time = jiffies;
198 u32 val;
199
200 do {
201 smsc95xx_read_reg(dev, E2P_CMD, &val);
202 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
203 break;
204 udelay(40);
205 } while (!time_after(jiffies, start_time + HZ));
206
207 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
60b86755 208 netdev_warn(dev->net, "EEPROM read operation timeout\n");
2f7ca802
SG		 209 return -EIO;
210 }
211
212 return 0;
213}
214
215static int smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
216{
217 unsigned long start_time = jiffies;
218 u32 val;
219
220 do {
221 smsc95xx_read_reg(dev, E2P_CMD, &val);
222
2f7ca802
SG		 223 if (!(val & E2P_CMD_BUSY_))
224 return 0;
225
226 udelay(40);
227 } while (!time_after(jiffies, start_time + HZ));
228
60b86755 229 netdev_warn(dev->net, "EEPROM is busy\n");
2f7ca802
SG		 230 return -EIO;
231}
232
233static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
234 u8 *data)
235{
236 u32 val;
237 int i, ret;
238
239 BUG_ON(!dev);
240 BUG_ON(!data);
241
242 ret = smsc95xx_eeprom_confirm_not_busy(dev);
243 if (ret)
244 return ret;
245
246 for (i = 0; i < length; i++) {
247 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
248 smsc95xx_write_reg(dev, E2P_CMD, val);
249
250 ret = smsc95xx_wait_eeprom(dev);
251 if (ret < 0)
252 return ret;
253
254 smsc95xx_read_reg(dev, E2P_DATA, &val);
255
256 data[i] = val & 0xFF;
257 offset++;
258 }
259
260 return 0;
261}
262
263static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
264 u8 *data)
265{
266 u32 val;
267 int i, ret;
268
269 BUG_ON(!dev);
270 BUG_ON(!data);
271
272 ret = smsc95xx_eeprom_confirm_not_busy(dev);
273 if (ret)
274 return ret;
275
276 /* Issue write/erase enable command */
277 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
278 smsc95xx_write_reg(dev, E2P_CMD, val);
279
280 ret = smsc95xx_wait_eeprom(dev);
281 if (ret < 0)
282 return ret;
283
284 for (i = 0; i < length; i++) {
285
286 /* Fill data register */
287 val = data[i];
288 smsc95xx_write_reg(dev, E2P_DATA, val);
289
290 /* Send "write" command */
291 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
292 smsc95xx_write_reg(dev, E2P_CMD, val);
293
294 ret = smsc95xx_wait_eeprom(dev);
295 if (ret < 0)
296 return ret;
297
298 offset++;
299 }
300
301 return 0;
302}
303
150a7fcc 304static void smsc95xx_async_cmd_callback(struct urb *urb)
2f7ca802
SG		 305{
306 struct usb_context *usb_context = urb->context;
307 struct usbnet *dev = usb_context->dev;
c94cb314 308 int status = urb->status;
2f7ca802 309
c94cb314 310 if (status < 0)
60b86755 311 netdev_warn(dev->net, "async callback failed with %d\n", status);
2f7ca802 312
2f7ca802
SG		 313 kfree(usb_context);
314 usb_free_urb(urb);
315}
316
1d74a6bd 317static int smsc95xx_write_reg_async(struct usbnet *dev, u16 index, u32 *data)
2f7ca802
SG		 318{
319 struct usb_context *usb_context;
320 int status;
321 struct urb *urb;
1d74a6bd 322 const u16 size = 4;
2f7ca802
SG		 323
324 urb = usb_alloc_urb(0, GFP_ATOMIC);
325 if (!urb) {
60b86755 326 netdev_warn(dev->net, "Error allocating URB\n");
2f7ca802
SG		 327 return -ENOMEM;
328 }
329
330 usb_context = kmalloc(sizeof(struct usb_context), GFP_ATOMIC);
331 if (usb_context == NULL) {
60b86755 332 netdev_warn(dev->net, "Error allocating control msg\n");
2f7ca802
SG		 333 usb_free_urb(urb);
334 return -ENOMEM;
335 }
336
337 usb_context->req.bRequestType =
338 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
339 usb_context->req.bRequest = USB_VENDOR_REQUEST_WRITE_REGISTER;
340 usb_context->req.wValue = 00;
1d74a6bd
SG		 341 usb_context->req.wIndex = cpu_to_le16(index);
342 usb_context->req.wLength = cpu_to_le16(size);
2f7ca802
SG		 343
344 usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0),
345 (void *)&usb_context->req, data, size,
150a7fcc 346 smsc95xx_async_cmd_callback,
2f7ca802
SG		 347 (void *)usb_context);
348
349 status = usb_submit_urb(urb, GFP_ATOMIC);
350 if (status < 0) {
60b86755
JP		 351 netdev_warn(dev->net, "Error submitting control msg, sts=%d\n",
352 status);
2f7ca802
SG		 353 kfree(usb_context);
354 usb_free_urb(urb);
355 }
356
357 return status;
358}
359
360/* returns hash bit number for given MAC address
361 * example:
362 * 01 00 5E 00 00 01 -> returns bit number 31 */
363static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
364{
365 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
366}
367
368static void smsc95xx_set_multicast(struct net_device *netdev)
369{
370 struct usbnet *dev = netdev_priv(netdev);
371 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
372 u32 hash_hi = 0;
373 u32 hash_lo = 0;
374 unsigned long flags;
375
376 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
377
378 if (dev->net->flags & IFF_PROMISC) {
379 if (netif_msg_drv(dev))
60b86755 380 netdev_dbg(dev->net, "promiscuous mode enabled\n");
2f7ca802
SG		 381 pdata->mac_cr |= MAC_CR_PRMS_;
382 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
383 } else if (dev->net->flags & IFF_ALLMULTI) {
384 if (netif_msg_drv(dev))
60b86755 385 netdev_dbg(dev->net, "receive all multicast enabled\n");
2f7ca802
SG		 386 pdata->mac_cr |= MAC_CR_MCPAS_;
387 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
4cd24eaf 388 } else if (!netdev_mc_empty(dev->net)) {
2f7ca802
SG		 389 struct dev_mc_list *mc_list = dev->net->mc_list;
390 int count = 0;
391
392 pdata->mac_cr |= MAC_CR_HPFILT_;
393 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
394
395 while (mc_list) {
396 count++;
397 if (mc_list->dmi_addrlen == ETH_ALEN) {
398 u32 bitnum = smsc95xx_hash(mc_list->dmi_addr);
399 u32 mask = 0x01 << (bitnum & 0x1F);
400 if (bitnum & 0x20)
401 hash_hi |= mask;
402 else
403 hash_lo |= mask;
404 } else {
60b86755 405 netdev_warn(dev->net, "dmi_addrlen != 6\n");
2f7ca802
SG		 406 }
407 mc_list = mc_list->next;
408 }
409
4cd24eaf 410 if (count != ((u32) netdev_mc_count(dev->net)))
60b86755 411 netdev_warn(dev->net, "mc_count != dev->mc_count\n");
2f7ca802
SG		 412
413 if (netif_msg_drv(dev))
60b86755
JP		 414 netdev_dbg(dev->net, "HASHH=0x%08X, HASHL=0x%08X\n",
415 hash_hi, hash_lo);
2f7ca802
SG		 416 } else {
417 if (netif_msg_drv(dev))
60b86755 418 netdev_dbg(dev->net, "receive own packets only\n");
2f7ca802
SG		 419 pdata->mac_cr &=
420 ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
421 }
422
423 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
424
425 /* Initiate async writes, as we can't wait for completion here */
426 smsc95xx_write_reg_async(dev, HASHH, &hash_hi);
427 smsc95xx_write_reg_async(dev, HASHL, &hash_lo);
428 smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr);
429}
430
2f7ca802
SG		 431static void smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
432 u16 lcladv, u16 rmtadv)
433{
434 u32 flow, afc_cfg = 0;
435
436 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
437 if (ret < 0) {
60b86755 438 netdev_warn(dev->net, "error reading AFC_CFG\n");
2f7ca802
SG		 439 return;
440 }
441
442 if (duplex == DUPLEX_FULL) {
bc02ff95 443 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
2f7ca802
SG		 444
445 if (cap & FLOW_CTRL_RX)
446 flow = 0xFFFF0002;
447 else
448 flow = 0;
449
450 if (cap & FLOW_CTRL_TX)
451 afc_cfg |= 0xF;
452 else
453 afc_cfg &= ~0xF;
454
455 if (netif_msg_link(dev))
60b86755
JP		 456 netdev_dbg(dev->net, "rx pause %s, tx pause %s\n",
457 cap & FLOW_CTRL_RX ? "enabled" : "disabled",
458 cap & FLOW_CTRL_TX ? "enabled" : "disabled");
2f7ca802
SG		 459 } else {
460 if (netif_msg_link(dev))
60b86755 461 netdev_dbg(dev->net, "half duplex\n");
2f7ca802
SG		 462 flow = 0;
463 afc_cfg |= 0xF;
464 }
465
466 smsc95xx_write_reg(dev, FLOW, flow);
467 smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
468}
469
470static int smsc95xx_link_reset(struct usbnet *dev)
471{
472 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
473 struct mii_if_info *mii = &dev->mii;
474 struct ethtool_cmd ecmd;
475 unsigned long flags;
476 u16 lcladv, rmtadv;
477 u32 intdata;
478
479 /* clear interrupt status */
480 smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
481 intdata = 0xFFFFFFFF;
482 smsc95xx_write_reg(dev, INT_STS, intdata);
483
484 mii_check_media(mii, 1, 1);
485 mii_ethtool_gset(&dev->mii, &ecmd);
486 lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
487 rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
488
489 if (netif_msg_link(dev))
60b86755
JP		 490 netdev_dbg(dev->net, "speed: %d duplex: %d lcladv: %04x rmtadv: %04x\n",
491 ecmd.speed, ecmd.duplex, lcladv, rmtadv);
2f7ca802
SG		 492
493 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
494 if (ecmd.duplex != DUPLEX_FULL) {
495 pdata->mac_cr &= ~MAC_CR_FDPX_;
496 pdata->mac_cr |= MAC_CR_RCVOWN_;
497 } else {
498 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
499 pdata->mac_cr |= MAC_CR_FDPX_;
500 }
501 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
502
503 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
504
505 smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
506
507 return 0;
508}
509
510static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
511{
512 u32 intdata;
513
514 if (urb->actual_length != 4) {
60b86755
JP		 515 netdev_warn(dev->net, "unexpected urb length %d\n",
516 urb->actual_length);
2f7ca802
SG		 517 return;
518 }
519
520 memcpy(&intdata, urb->transfer_buffer, 4);
1d74a6bd 521 le32_to_cpus(&intdata);
2f7ca802
SG		 522
523 if (netif_msg_link(dev))
60b86755 524 netdev_dbg(dev->net, "intdata: 0x%08X\n", intdata);
2f7ca802
SG		 525
526 if (intdata & INT_ENP_PHY_INT_)
527 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
528 else
60b86755
JP		 529 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
530 intdata);
2f7ca802
SG		 531}
532
f7b29271
SG		 533/* Enable or disable Tx & Rx checksum offload engines */
534static int smsc95xx_set_csums(struct usbnet *dev)
2f7ca802 535{
f7b29271 536 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
2f7ca802
SG		 537 u32 read_buf;
538 int ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
539 if (ret < 0) {
60b86755 540 netdev_warn(dev->net, "Failed to read COE_CR: %d\n", ret);
2f7ca802
SG		 541 return ret;
542 }
543
f7b29271
SG		 544 if (pdata->use_tx_csum)
545 read_buf |= Tx_COE_EN_;
546 else
547 read_buf &= ~Tx_COE_EN_;
548
549 if (pdata->use_rx_csum)
2f7ca802
SG		 550 read_buf |= Rx_COE_EN_;
551 else
552 read_buf &= ~Rx_COE_EN_;
553
554 ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
555 if (ret < 0) {
60b86755 556 netdev_warn(dev->net, "Failed to write COE_CR: %d\n", ret);
2f7ca802
SG		 557 return ret;
558 }
559
560 if (netif_msg_hw(dev))
60b86755 561 netdev_dbg(dev->net, "COE_CR = 0x%08x\n", read_buf);
2f7ca802
SG		 562 return 0;
563}
564
565static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
566{
567 return MAX_EEPROM_SIZE;
568}
569
570static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
571 struct ethtool_eeprom *ee, u8 *data)
572{
573 struct usbnet *dev = netdev_priv(netdev);
574
575 ee->magic = LAN95XX_EEPROM_MAGIC;
576
577 return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
578}
579
580static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
581 struct ethtool_eeprom *ee, u8 *data)
582{
583 struct usbnet *dev = netdev_priv(netdev);
584
585 if (ee->magic != LAN95XX_EEPROM_MAGIC) {
60b86755
JP		 586 netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n",
587 ee->magic);
2f7ca802
SG		 588 return -EINVAL;
589 }
590
591 return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
592}
593
594static u32 smsc95xx_ethtool_get_rx_csum(struct net_device *netdev)
595{
596 struct usbnet *dev = netdev_priv(netdev);
597 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
598
599 return pdata->use_rx_csum;
600}
601
602static int smsc95xx_ethtool_set_rx_csum(struct net_device *netdev, u32 val)
603{
604 struct usbnet *dev = netdev_priv(netdev);
605 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
606
607 pdata->use_rx_csum = !!val;
608
f7b29271
SG		 609 return smsc95xx_set_csums(dev);
610}
611
612static u32 smsc95xx_ethtool_get_tx_csum(struct net_device *netdev)
613{
614 struct usbnet *dev = netdev_priv(netdev);
615 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
616
617 return pdata->use_tx_csum;
618}
619
620static int smsc95xx_ethtool_set_tx_csum(struct net_device *netdev, u32 val)
621{
622 struct usbnet *dev = netdev_priv(netdev);
623 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
624
625 pdata->use_tx_csum = !!val;
626
627 ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum);
628 return smsc95xx_set_csums(dev);
2f7ca802
SG		 629}
630
0fc0b732 631static const struct ethtool_ops smsc95xx_ethtool_ops = {
2f7ca802
SG		 632 .get_link = usbnet_get_link,
633 .nway_reset = usbnet_nway_reset,
634 .get_drvinfo = usbnet_get_drvinfo,
635 .get_msglevel = usbnet_get_msglevel,
636 .set_msglevel = usbnet_set_msglevel,
637 .get_settings = usbnet_get_settings,
638 .set_settings = usbnet_set_settings,
639 .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
640 .get_eeprom = smsc95xx_ethtool_get_eeprom,
641 .set_eeprom = smsc95xx_ethtool_set_eeprom,
f7b29271
SG		 642 .get_tx_csum = smsc95xx_ethtool_get_tx_csum,
643 .set_tx_csum = smsc95xx_ethtool_set_tx_csum,
2f7ca802
SG		 644 .get_rx_csum = smsc95xx_ethtool_get_rx_csum,
645 .set_rx_csum = smsc95xx_ethtool_set_rx_csum,
646};
647
648static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
649{
650 struct usbnet *dev = netdev_priv(netdev);
651
652 if (!netif_running(netdev))
653 return -EINVAL;
654
655 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
656}
657
658static void smsc95xx_init_mac_address(struct usbnet *dev)
659{
660 /* try reading mac address from EEPROM */
661 if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
662 dev->net->dev_addr) == 0) {
663 if (is_valid_ether_addr(dev->net->dev_addr)) {
664 /* eeprom values are valid so use them */
665 if (netif_msg_ifup(dev))
60b86755 666 netdev_dbg(dev->net, "MAC address read from EEPROM\n");
2f7ca802
SG		 667 return;
668 }
669 }
670
671 /* no eeprom, or eeprom values are invalid. generate random MAC */
672 random_ether_addr(dev->net->dev_addr);
673 if (netif_msg_ifup(dev))
60b86755 674 netdev_dbg(dev->net, "MAC address set to random_ether_addr\n");
2f7ca802
SG		 675}
676
677static int smsc95xx_set_mac_address(struct usbnet *dev)
678{
679 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
680 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
681 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
682 int ret;
683
684 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
685 if (ret < 0) {
60b86755 686 netdev_warn(dev->net, "Failed to write ADDRL: %d\n", ret);
2f7ca802
SG		 687 return ret;
688 }
689
690 ret = smsc95xx_write_reg(dev, ADDRH, addr_hi);
691 if (ret < 0) {
60b86755 692 netdev_warn(dev->net, "Failed to write ADDRH: %d\n", ret);
2f7ca802
SG		 693 return ret;
694 }
695
696 return 0;
697}
698
699/* starts the TX path */
700static void smsc95xx_start_tx_path(struct usbnet *dev)
701{
702 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
703 unsigned long flags;
704 u32 reg_val;
705
706 /* Enable Tx at MAC */
707 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
708 pdata->mac_cr |= MAC_CR_TXEN_;
709 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
710
711 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
712
713 /* Enable Tx at SCSRs */
714 reg_val = TX_CFG_ON_;
715 smsc95xx_write_reg(dev, TX_CFG, reg_val);
716}
717
718/* Starts the Receive path */
719static void smsc95xx_start_rx_path(struct usbnet *dev)
720{
721 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
722 unsigned long flags;
723
724 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
725 pdata->mac_cr |= MAC_CR_RXEN_;
726 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
727
728 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
729}
730
731static int smsc95xx_phy_initialize(struct usbnet *dev)
732{
733 /* Initialize MII structure */
734 dev->mii.dev = dev->net;
735 dev->mii.mdio_read = smsc95xx_mdio_read;
736 dev->mii.mdio_write = smsc95xx_mdio_write;
737 dev->mii.phy_id_mask = 0x1f;
738 dev->mii.reg_num_mask = 0x1f;
739 dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
740
741 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
742 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
743 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
744 ADVERTISE_PAUSE_ASYM);
745
746 /* read to clear */
747 smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
748
749 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
750 PHY_INT_MASK_DEFAULT_);
751 mii_nway_restart(&dev->mii);
752
753 if (netif_msg_ifup(dev))
60b86755 754 netdev_dbg(dev->net, "phy initialised successfully\n");
2f7ca802
SG		 755 return 0;
756}
757
758static int smsc95xx_reset(struct usbnet *dev)
759{
760 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
f7b29271 761 struct net_device *netdev = dev->net;
2f7ca802
SG		 762 u32 read_buf, write_buf, burst_cap;
763 int ret = 0, timeout;
2f7ca802
SG		 764
765 if (netif_msg_ifup(dev))
60b86755 766 netdev_dbg(dev->net, "entering smsc95xx_reset\n");
2f7ca802
SG		 767
768 write_buf = HW_CFG_LRST_;
769 ret = smsc95xx_write_reg(dev, HW_CFG, write_buf);
770 if (ret < 0) {
60b86755
JP		 771 netdev_warn(dev->net, "Failed to write HW_CFG_LRST_ bit in HW_CFG register, ret = %d\n",
772 ret);
2f7ca802
SG		 773 return ret;
774 }
775
776 timeout = 0;
777 do {
778 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
779 if (ret < 0) {
60b86755 780 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
2f7ca802
SG		 781 return ret;
782 }
783 msleep(10);
784 timeout++;
785 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
786
787 if (timeout >= 100) {
60b86755 788 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n");
2f7ca802
SG		 789 return ret;
790 }
791
792 write_buf = PM_CTL_PHY_RST_;
793 ret = smsc95xx_write_reg(dev, PM_CTRL, write_buf);
794 if (ret < 0) {
60b86755 795 netdev_warn(dev->net, "Failed to write PM_CTRL: %d\n", ret);
2f7ca802
SG		 796 return ret;
797 }
798
799 timeout = 0;
800 do {
801 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
802 if (ret < 0) {
60b86755 803 netdev_warn(dev->net, "Failed to read PM_CTRL: %d\n", ret);
2f7ca802
SG		 804 return ret;
805 }
806 msleep(10);
807 timeout++;
808 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
809
810 if (timeout >= 100) {
60b86755 811 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
2f7ca802
SG		 812 return ret;
813 }
814
815 smsc95xx_init_mac_address(dev);
816
817 ret = smsc95xx_set_mac_address(dev);
818 if (ret < 0)
819 return ret;
820
821 if (netif_msg_ifup(dev))
60b86755 822 netdev_dbg(dev->net, "MAC Address: %pM\n", dev->net->dev_addr);
2f7ca802
SG		 823
824 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
825 if (ret < 0) {
60b86755 826 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
2f7ca802
SG		 827 return ret;
828 }
829
830 if (netif_msg_ifup(dev))
60b86755 831 netdev_dbg(dev->net, "Read Value from HW_CFG : 0x%08x\n", read_buf);
2f7ca802
SG		 832
833 read_buf |= HW_CFG_BIR_;
834
835 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
836 if (ret < 0) {
60b86755
JP		 837 netdev_warn(dev->net, "Failed to write HW_CFG_BIR_ bit in HW_CFG register, ret = %d\n",
838 ret);
2f7ca802
SG		 839 return ret;
840 }
841
842 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
843 if (ret < 0) {
60b86755 844 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
2f7ca802
SG		 845 return ret;
846 }
847 if (netif_msg_ifup(dev))
60b86755
JP		 848 netdev_dbg(dev->net, "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
849 read_buf);
2f7ca802
SG		 850
851 if (!turbo_mode) {
852 burst_cap = 0;
853 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
854 } else if (dev->udev->speed == USB_SPEED_HIGH) {
855 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
856 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
857 } else {
858 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
859 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
860 }
861
862 if (netif_msg_ifup(dev))
60b86755 863 netdev_dbg(dev->net, "rx_urb_size=%ld\n", (ulong)dev->rx_urb_size);
2f7ca802
SG		 864
865 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
866 if (ret < 0) {
60b86755 867 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret);
2f7ca802
SG		 868 return ret;
869 }
870
871 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
872 if (ret < 0) {
60b86755 873 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret);
2f7ca802
SG		 874 return ret;
875 }
876 if (netif_msg_ifup(dev))
60b86755
JP		 877 netdev_dbg(dev->net, "Read Value from BURST_CAP after writing: 0x%08x\n",
878 read_buf);
2f7ca802
SG		 879
880 read_buf = DEFAULT_BULK_IN_DELAY;
881 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, read_buf);
882 if (ret < 0) {
60b86755 883 netdev_warn(dev->net, "ret = %d\n", ret);
2f7ca802
SG		 884 return ret;
885 }
886
887 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
888 if (ret < 0) {
60b86755 889 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret);
2f7ca802
SG		 890 return ret;
891 }
892 if (netif_msg_ifup(dev))
60b86755
JP		 893 netdev_dbg(dev->net, "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
894 read_buf);
2f7ca802
SG		 895
896 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
897 if (ret < 0) {
60b86755 898 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
2f7ca802
SG		 899 return ret;
900 }
901 if (netif_msg_ifup(dev))
60b86755 902 netdev_dbg(dev->net, "Read Value from HW_CFG: 0x%08x\n", read_buf);
2f7ca802
SG		 903
904 if (turbo_mode)
905 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
906
907 read_buf &= ~HW_CFG_RXDOFF_;
908
909 /* set Rx data offset=2, Make IP header aligns on word boundary. */
910 read_buf |= NET_IP_ALIGN << 9;
911
912 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
913 if (ret < 0) {
60b86755
JP		 914 netdev_warn(dev->net, "Failed to write HW_CFG register, ret=%d\n",
915 ret);
2f7ca802
SG		 916 return ret;
917 }
918
919 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
920 if (ret < 0) {
60b86755 921 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
2f7ca802
SG		 922 return ret;
923 }
924 if (netif_msg_ifup(dev))
60b86755
JP		 925 netdev_dbg(dev->net, "Read Value from HW_CFG after writing: 0x%08x\n",
926 read_buf);
2f7ca802
SG		 927
928 write_buf = 0xFFFFFFFF;
929 ret = smsc95xx_write_reg(dev, INT_STS, write_buf);
930 if (ret < 0) {
60b86755
JP		 931 netdev_warn(dev->net, "Failed to write INT_STS register, ret=%d\n",
932 ret);
2f7ca802
SG		 933 return ret;
934 }
935
936 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
937 if (ret < 0) {
60b86755 938 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret);
2f7ca802
SG		 939 return ret;
940 }
941 if (netif_msg_ifup(dev))
60b86755 942 netdev_dbg(dev->net, "ID_REV = 0x%08x\n", read_buf);
2f7ca802 943
f293501c
SG		 944 /* Configure GPIO pins as LED outputs */
945 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
946 LED_GPIO_CFG_FDX_LED;
947 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
948 if (ret < 0) {
60b86755
JP		 949 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG register, ret=%d\n",
950 ret);
f293501c
SG		 951 return ret;
952 }
953
2f7ca802
SG		 954 /* Init Tx */
955 write_buf = 0;
956 ret = smsc95xx_write_reg(dev, FLOW, write_buf);
957 if (ret < 0) {
60b86755 958 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret);
2f7ca802
SG		 959 return ret;
960 }
961
962 read_buf = AFC_CFG_DEFAULT;
963 ret = smsc95xx_write_reg(dev, AFC_CFG, read_buf);
964 if (ret < 0) {
60b86755 965 netdev_warn(dev->net, "Failed to write AFC_CFG: %d\n", ret);
2f7ca802
SG		 966 return ret;
967 }
968
969 /* Don't need mac_cr_lock during initialisation */
970 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
971 if (ret < 0) {
60b86755 972 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret);
2f7ca802
SG		 973 return ret;
974 }
975
976 /* Init Rx */
977 /* Set Vlan */
978 write_buf = (u32)ETH_P_8021Q;
979 ret = smsc95xx_write_reg(dev, VLAN1, write_buf);
980 if (ret < 0) {
60b86755 981 netdev_warn(dev->net, "Failed to write VAN1: %d\n", ret);
2f7ca802
SG		 982 return ret;
983 }
984
f7b29271
SG		 985 /* Enable or disable checksum offload engines */
986 ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum);
987 ret = smsc95xx_set_csums(dev);
2f7ca802 988 if (ret < 0) {
60b86755 989 netdev_warn(dev->net, "Failed to set csum offload: %d\n", ret);
2f7ca802
SG		 990 return ret;
991 }
992
993 smsc95xx_set_multicast(dev->net);
994
995 if (smsc95xx_phy_initialize(dev) < 0)
996 return -EIO;
997
998 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
999 if (ret < 0) {
60b86755 1000 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret);
2f7ca802
SG		 1001 return ret;
1002 }
1003
1004 /* enable PHY interrupts */
1005 read_buf |= INT_EP_CTL_PHY_INT_;
1006
1007 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
1008 if (ret < 0) {
60b86755 1009 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret);
2f7ca802
SG		 1010 return ret;
1011 }
1012
1013 smsc95xx_start_tx_path(dev);
1014 smsc95xx_start_rx_path(dev);
1015
1016 if (netif_msg_ifup(dev))
60b86755 1017 netdev_dbg(dev->net, "smsc95xx_reset, return 0\n");
2f7ca802
SG		 1018 return 0;
1019}
1020
63e77b39
SH		 1021static const struct net_device_ops smsc95xx_netdev_ops = {
1022 .ndo_open = usbnet_open,
1023 .ndo_stop = usbnet_stop,
1024 .ndo_start_xmit = usbnet_start_xmit,
1025 .ndo_tx_timeout = usbnet_tx_timeout,
1026 .ndo_change_mtu = usbnet_change_mtu,
1027 .ndo_set_mac_address = eth_mac_addr,
1028 .ndo_validate_addr = eth_validate_addr,
1029 .ndo_do_ioctl = smsc95xx_ioctl,
1030 .ndo_set_multicast_list = smsc95xx_set_multicast,
1031};
1032
2f7ca802
SG		 1033static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
1034{
1035 struct smsc95xx_priv *pdata = NULL;
1036 int ret;
1037
1038 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1039
1040 ret = usbnet_get_endpoints(dev, intf);
1041 if (ret < 0) {
60b86755 1042 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
2f7ca802
SG		 1043 return ret;
1044 }
1045
1046 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
1047 GFP_KERNEL);
1048
1049 pdata = (struct smsc95xx_priv *)(dev->data[0]);
1050 if (!pdata) {
60b86755 1051 netdev_warn(dev->net, "Unable to allocate struct smsc95xx_priv\n");
2f7ca802
SG		 1052 return -ENOMEM;
1053 }
1054
1055 spin_lock_init(&pdata->mac_cr_lock);
1056
f7b29271 1057 pdata->use_tx_csum = DEFAULT_TX_CSUM_ENABLE;
2f7ca802
SG		 1058 pdata->use_rx_csum = DEFAULT_RX_CSUM_ENABLE;
1059
1060 /* Init all registers */
1061 ret = smsc95xx_reset(dev);
1062
63e77b39 1063 dev->net->netdev_ops = &smsc95xx_netdev_ops;
2f7ca802 1064 dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
2f7ca802
SG		 1065 dev->net->flags |= IFF_MULTICAST;
1066 dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD;
1067 return 0;
1068}
1069
1070static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1071{
1072 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1073 if (pdata) {
1074 if (netif_msg_ifdown(dev))
60b86755 1075 netdev_dbg(dev->net, "free pdata\n");
2f7ca802
SG		 1076 kfree(pdata);
1077 pdata = NULL;
1078 dev->data[0] = 0;
1079 }
1080}
1081
1082static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1083{
1084 skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1085 skb->ip_summed = CHECKSUM_COMPLETE;
1086 skb_trim(skb, skb->len - 2);
1087}
1088
1089static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1090{
1091 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1092
1093 while (skb->len > 0) {
1094 u32 header, align_count;
1095 struct sk_buff *ax_skb;
1096 unsigned char *packet;
1097 u16 size;
1098
1099 memcpy(&header, skb->data, sizeof(header));
1100 le32_to_cpus(&header);
1101 skb_pull(skb, 4 + NET_IP_ALIGN);
1102 packet = skb->data;
1103
1104 /* get the packet length */
1105 size = (u16)((header & RX_STS_FL_) >> 16);
1106 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1107
1108 if (unlikely(header & RX_STS_ES_)) {
1109 if (netif_msg_rx_err(dev))
60b86755
JP		 1110 netdev_dbg(dev->net, "Error header=0x%08x\n",
1111 header);
80667ac1
HX		 1112 dev->net->stats.rx_errors++;
1113 dev->net->stats.rx_dropped++;
2f7ca802
SG		 1114
1115 if (header & RX_STS_CRC_) {
80667ac1 1116 dev->net->stats.rx_crc_errors++;
2f7ca802
SG		 1117 } else {
1118 if (header & (RX_STS_TL_ | RX_STS_RF_))
80667ac1 1119 dev->net->stats.rx_frame_errors++;
2f7ca802
SG		 1120
1121 if ((header & RX_STS_LE_) &&
1122 (!(header & RX_STS_FT_)))
80667ac1 1123 dev->net->stats.rx_length_errors++;
2f7ca802
SG		 1124 }
1125 } else {
1126 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1127 if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1128 if (netif_msg_rx_err(dev))
60b86755
JP		 1129 netdev_dbg(dev->net, "size err header=0x%08x\n",
1130 header);
2f7ca802
SG		 1131 return 0;
1132 }
1133
1134 /* last frame in this batch */
1135 if (skb->len == size) {
1136 if (pdata->use_rx_csum)
1137 smsc95xx_rx_csum_offload(skb);
df18acca 1138 skb_trim(skb, skb->len - 4); /* remove fcs */
2f7ca802
SG		 1139 skb->truesize = size + sizeof(struct sk_buff);
1140
1141 return 1;
1142 }
1143
1144 ax_skb = skb_clone(skb, GFP_ATOMIC);
1145 if (unlikely(!ax_skb)) {
60b86755 1146 netdev_warn(dev->net, "Error allocating skb\n");
2f7ca802
SG		 1147 return 0;
1148 }
1149
1150 ax_skb->len = size;
1151 ax_skb->data = packet;
1152 skb_set_tail_pointer(ax_skb, size);
1153
1154 if (pdata->use_rx_csum)
1155 smsc95xx_rx_csum_offload(ax_skb);
df18acca 1156 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
2f7ca802
SG		 1157 ax_skb->truesize = size + sizeof(struct sk_buff);
1158
1159 usbnet_skb_return(dev, ax_skb);
1160 }
1161
1162 skb_pull(skb, size);
1163
1164 /* padding bytes before the next frame starts */
1165 if (skb->len)
1166 skb_pull(skb, align_count);
1167 }
1168
1169 if (unlikely(skb->len < 0)) {
60b86755 1170 netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len);
2f7ca802
SG		 1171 return 0;
1172 }
1173
1174 return 1;
1175}
1176
f7b29271
SG		 1177static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
1178{
1179 int len = skb->data - skb->head;
1180 u16 high_16 = (u16)(skb->csum_offset + skb->csum_start - len);
1181 u16 low_16 = (u16)(skb->csum_start - len);
1182 return (high_16 << 16) | low_16;
1183}
1184
2f7ca802
SG		 1185static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
1186 struct sk_buff *skb, gfp_t flags)
1187{
f7b29271
SG		 1188 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1189 bool csum = pdata->use_tx_csum && (skb->ip_summed == CHECKSUM_PARTIAL);
1190 int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
2f7ca802
SG		 1191 u32 tx_cmd_a, tx_cmd_b;
1192
f7b29271
SG		 1193 /* We do not advertise SG, so skbs should be already linearized */
1194 BUG_ON(skb_shinfo(skb)->nr_frags);
1195
1196 if (skb_headroom(skb) < overhead) {
2f7ca802 1197 struct sk_buff *skb2 = skb_copy_expand(skb,
f7b29271 1198 overhead, 0, flags);
2f7ca802
SG		 1199 dev_kfree_skb_any(skb);
1200 skb = skb2;
1201 if (!skb)
1202 return NULL;
1203 }
1204
f7b29271
SG		 1205 if (csum) {
1206 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
1207 skb_push(skb, 4);
1208 memcpy(skb->data, &csum_preamble, 4);
1209 }
1210
2f7ca802
SG		 1211 skb_push(skb, 4);
1212 tx_cmd_b = (u32)(skb->len - 4);
f7b29271
SG		 1213 if (csum)
1214 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
2f7ca802
SG		 1215 cpu_to_le32s(&tx_cmd_b);
1216 memcpy(skb->data, &tx_cmd_b, 4);
1217
1218 skb_push(skb, 4);
1219 tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
1220 TX_CMD_A_LAST_SEG_;
1221 cpu_to_le32s(&tx_cmd_a);
1222 memcpy(skb->data, &tx_cmd_a, 4);
1223
1224 return skb;
1225}
1226
1227static const struct driver_info smsc95xx_info = {
1228 .description = "smsc95xx USB 2.0 Ethernet",
1229 .bind = smsc95xx_bind,
1230 .unbind = smsc95xx_unbind,
1231 .link_reset = smsc95xx_link_reset,
1232 .reset = smsc95xx_reset,
1233 .rx_fixup = smsc95xx_rx_fixup,
1234 .tx_fixup = smsc95xx_tx_fixup,
1235 .status = smsc95xx_status,
ec475623 1236 .flags = FLAG_ETHER | FLAG_SEND_ZLP,
2f7ca802
SG		 1237};
1238
1239static const struct usb_device_id products[] = {
1240 {
1241 /* SMSC9500 USB Ethernet Device */
1242 USB_DEVICE(0x0424, 0x9500),
1243 .driver_info = (unsigned long) &smsc95xx_info,
1244 },
6f41d12b
SG		 1245 {
1246 /* SMSC9505 USB Ethernet Device */
1247 USB_DEVICE(0x0424, 0x9505),
1248 .driver_info = (unsigned long) &smsc95xx_info,
1249 },
1250 {
1251 /* SMSC9500A USB Ethernet Device */
1252 USB_DEVICE(0x0424, 0x9E00),
1253 .driver_info = (unsigned long) &smsc95xx_info,
1254 },
1255 {
1256 /* SMSC9505A USB Ethernet Device */
1257 USB_DEVICE(0x0424, 0x9E01),
1258 .driver_info = (unsigned long) &smsc95xx_info,
1259 },
726474b8
SG		 1260 {
1261 /* SMSC9512/9514 USB Hub & Ethernet Device */
1262 USB_DEVICE(0x0424, 0xec00),
1263 .driver_info = (unsigned long) &smsc95xx_info,
1264 },
6f41d12b
SG		 1265 {
1266 /* SMSC9500 USB Ethernet Device (SAL10) */
1267 USB_DEVICE(0x0424, 0x9900),
1268 .driver_info = (unsigned long) &smsc95xx_info,
1269 },
1270 {
1271 /* SMSC9505 USB Ethernet Device (SAL10) */
1272 USB_DEVICE(0x0424, 0x9901),
1273 .driver_info = (unsigned long) &smsc95xx_info,
1274 },
1275 {
1276 /* SMSC9500A USB Ethernet Device (SAL10) */
1277 USB_DEVICE(0x0424, 0x9902),
1278 .driver_info = (unsigned long) &smsc95xx_info,
1279 },
1280 {
1281 /* SMSC9505A USB Ethernet Device (SAL10) */
1282 USB_DEVICE(0x0424, 0x9903),
1283 .driver_info = (unsigned long) &smsc95xx_info,
1284 },
1285 {
1286 /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */
1287 USB_DEVICE(0x0424, 0x9904),
1288 .driver_info = (unsigned long) &smsc95xx_info,
1289 },
1290 {
1291 /* SMSC9500A USB Ethernet Device (HAL) */
1292 USB_DEVICE(0x0424, 0x9905),
1293 .driver_info = (unsigned long) &smsc95xx_info,
1294 },
1295 {
1296 /* SMSC9505A USB Ethernet Device (HAL) */
1297 USB_DEVICE(0x0424, 0x9906),
1298 .driver_info = (unsigned long) &smsc95xx_info,
1299 },
1300 {
1301 /* SMSC9500 USB Ethernet Device (Alternate ID) */
1302 USB_DEVICE(0x0424, 0x9907),
1303 .driver_info = (unsigned long) &smsc95xx_info,
1304 },
1305 {
1306 /* SMSC9500A USB Ethernet Device (Alternate ID) */
1307 USB_DEVICE(0x0424, 0x9908),
1308 .driver_info = (unsigned long) &smsc95xx_info,
1309 },
1310 {
1311 /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */
1312 USB_DEVICE(0x0424, 0x9909),
1313 .driver_info = (unsigned long) &smsc95xx_info,
1314 },
2f7ca802
SG		 1315 { }, /* END */
1316};
1317MODULE_DEVICE_TABLE(usb, products);
1318
1319static struct usb_driver smsc95xx_driver = {
1320 .name = "smsc95xx",
1321 .id_table = products,
1322 .probe = usbnet_probe,
1323 .suspend = usbnet_suspend,
1324 .resume = usbnet_resume,
1325 .disconnect = usbnet_disconnect,
1326};
1327
1328static int __init smsc95xx_init(void)
1329{
1330 return usb_register(&smsc95xx_driver);
1331}
1332module_init(smsc95xx_init);
1333
1334static void __exit smsc95xx_exit(void)
1335{
1336 usb_deregister(&smsc95xx_driver);
1337}
1338module_exit(smsc95xx_exit);
1339
1340MODULE_AUTHOR("Nancy Lin");
1341MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>");
1342MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
1343MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)