Commit | Line | Data |
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1ccea77e | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2f7ca802 SG |
2 | /*************************************************************************** |
3 | * | |
4 | * Copyright (C) 2007-2008 SMSC | |
5 | * | |
2f7ca802 SG |
6 | *****************************************************************************/ |
7 | ||
8 | #include <linux/module.h> | |
9 | #include <linux/kmod.h> | |
2f7ca802 SG |
10 | #include <linux/netdevice.h> |
11 | #include <linux/etherdevice.h> | |
12 | #include <linux/ethtool.h> | |
13 | #include <linux/mii.h> | |
14 | #include <linux/usb.h> | |
bbd9f9ee SG |
15 | #include <linux/bitrev.h> |
16 | #include <linux/crc16.h> | |
2f7ca802 SG |
17 | #include <linux/crc32.h> |
18 | #include <linux/usb/usbnet.h> | |
5a0e3ad6 | 19 | #include <linux/slab.h> |
c489565b | 20 | #include <linux/of_net.h> |
1ce8b372 LW |
21 | #include <linux/irq.h> |
22 | #include <linux/irqdomain.h> | |
05b35e7e AE |
23 | #include <linux/mdio.h> |
24 | #include <linux/phy.h> | |
1710b52d OR |
25 | #include <net/selftests.h> |
26 | ||
2f7ca802 SG |
27 | #include "smsc95xx.h" |
28 | ||
29 | #define SMSC_CHIPNAME "smsc95xx" | |
05b35e7e | 30 | #define SMSC_DRIVER_VERSION "2.0.0" |
2f7ca802 SG |
31 | #define HS_USB_PKT_SIZE (512) |
32 | #define FS_USB_PKT_SIZE (64) | |
33 | #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) | |
34 | #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) | |
35 | #define DEFAULT_BULK_IN_DELAY (0x00002000) | |
36 | #define MAX_SINGLE_PACKET_SIZE (2048) | |
37 | #define LAN95XX_EEPROM_MAGIC (0x9500) | |
38 | #define EEPROM_MAC_OFFSET (0x01) | |
f7b29271 | 39 | #define DEFAULT_TX_CSUM_ENABLE (true) |
2f7ca802 SG |
40 | #define DEFAULT_RX_CSUM_ENABLE (true) |
41 | #define SMSC95XX_INTERNAL_PHY_ID (1) | |
42 | #define SMSC95XX_TX_OVERHEAD (8) | |
f7b29271 | 43 | #define SMSC95XX_TX_OVERHEAD_CSUM (12) |
e5e3af83 | 44 | #define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \ |
bbd9f9ee | 45 | WAKE_MCAST | WAKE_ARP | WAKE_MAGIC) |
2f7ca802 | 46 | |
9ebca507 SG |
47 | #define FEATURE_8_WAKEUP_FILTERS (0x01) |
48 | #define FEATURE_PHY_NLP_CROSSOVER (0x02) | |
eb970ff0 | 49 | #define FEATURE_REMOTE_WAKEUP (0x04) |
9ebca507 | 50 | |
b2d4b150 SG |
51 | #define SUSPEND_SUSPEND0 (0x01) |
52 | #define SUSPEND_SUSPEND1 (0x02) | |
53 | #define SUSPEND_SUSPEND2 (0x04) | |
54 | #define SUSPEND_SUSPEND3 (0x08) | |
55 | #define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \ | |
56 | SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3) | |
57 | ||
1ce8b372 LW |
58 | #define SMSC95XX_NR_IRQS (1) /* raise to 12 for GPIOs */ |
59 | #define PHY_HWIRQ (SMSC95XX_NR_IRQS - 1) | |
60 | ||
2f7ca802 SG |
61 | struct smsc95xx_priv { |
62 | u32 mac_cr; | |
3c0f3c60 MZ |
63 | u32 hash_hi; |
64 | u32 hash_lo; | |
e0e474a8 | 65 | u32 wolopts; |
2f7ca802 | 66 | spinlock_t mac_cr_lock; |
9ebca507 | 67 | u8 features; |
b2d4b150 | 68 | u8 suspend_flags; |
809ff97a | 69 | bool is_internal_phy; |
1ce8b372 LW |
70 | struct irq_chip irqchip; |
71 | struct irq_domain *irqdomain; | |
72 | struct fwnode_handle *irqfwnode; | |
05b35e7e AE |
73 | struct mii_bus *mdiobus; |
74 | struct phy_device *phydev; | |
7b960c96 | 75 | struct task_struct *pm_task; |
2f7ca802 SG |
76 | }; |
77 | ||
eb939922 | 78 | static bool turbo_mode = true; |
2f7ca802 SG |
79 | module_param(turbo_mode, bool, 0644); |
80 | MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); | |
81 | ||
31472429 LW |
82 | static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index, |
83 | u32 *data) | |
2f7ca802 | 84 | { |
7b960c96 | 85 | struct smsc95xx_priv *pdata = dev->driver_priv; |
72108fd2 | 86 | u32 buf; |
2f7ca802 | 87 | int ret; |
ec32115d | 88 | int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16); |
2f7ca802 | 89 | |
7b960c96 | 90 | if (current != pdata->pm_task) |
ec32115d ML |
91 | fn = usbnet_read_cmd; |
92 | else | |
93 | fn = usbnet_read_cmd_nopm; | |
94 | ||
95 | ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN | |
96 | | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
97 | 0, index, &buf, 4); | |
51a32e82 SY |
98 | if (ret < 4) { |
99 | ret = ret < 0 ? ret : -ENODATA; | |
100 | ||
c70c453a FE |
101 | if (ret != -ENODEV) |
102 | netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n", | |
103 | index, ret); | |
5a36b68b DC |
104 | return ret; |
105 | } | |
2f7ca802 | 106 | |
72108fd2 ML |
107 | le32_to_cpus(&buf); |
108 | *data = buf; | |
2f7ca802 SG |
109 | |
110 | return ret; | |
111 | } | |
112 | ||
31472429 LW |
113 | static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index, |
114 | u32 data) | |
2f7ca802 | 115 | { |
7b960c96 | 116 | struct smsc95xx_priv *pdata = dev->driver_priv; |
72108fd2 | 117 | u32 buf; |
2f7ca802 | 118 | int ret; |
ec32115d | 119 | int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16); |
2f7ca802 | 120 | |
7b960c96 | 121 | if (current != pdata->pm_task) |
ec32115d ML |
122 | fn = usbnet_write_cmd; |
123 | else | |
124 | fn = usbnet_write_cmd_nopm; | |
125 | ||
72108fd2 ML |
126 | buf = data; |
127 | cpu_to_le32s(&buf); | |
2f7ca802 | 128 | |
ec32115d ML |
129 | ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT |
130 | | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
131 | 0, index, &buf, 4); | |
c70c453a | 132 | if (ret < 0 && ret != -ENODEV) |
1e1d7412 JP |
133 | netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n", |
134 | index, ret); | |
2f7ca802 | 135 | |
2f7ca802 SG |
136 | return ret; |
137 | } | |
138 | ||
139 | /* Loop until the read is completed with timeout | |
140 | * called with phy_mutex held */ | |
31472429 | 141 | static int __must_check smsc95xx_phy_wait_not_busy(struct usbnet *dev) |
2f7ca802 SG |
142 | { |
143 | unsigned long start_time = jiffies; | |
144 | u32 val; | |
769ea6d8 | 145 | int ret; |
2f7ca802 SG |
146 | |
147 | do { | |
31472429 | 148 | ret = smsc95xx_read_reg(dev, MII_ADDR, &val); |
b052e073 | 149 | if (ret < 0) { |
c70c453a FE |
150 | /* Ignore -ENODEV error during disconnect() */ |
151 | if (ret == -ENODEV) | |
152 | return 0; | |
b052e073 SG |
153 | netdev_warn(dev->net, "Error reading MII_ACCESS\n"); |
154 | return ret; | |
155 | } | |
156 | ||
2f7ca802 SG |
157 | if (!(val & MII_BUSY_)) |
158 | return 0; | |
159 | } while (!time_after(jiffies, start_time + HZ)); | |
160 | ||
161 | return -EIO; | |
162 | } | |
163 | ||
05b35e7e AE |
164 | static u32 mii_address_cmd(int phy_id, int idx, u16 op) |
165 | { | |
166 | return (phy_id & 0x1f) << 11 | (idx & 0x1f) << 6 | op; | |
167 | } | |
168 | ||
31472429 | 169 | static int smsc95xx_mdio_read(struct usbnet *dev, int phy_id, int idx) |
2f7ca802 | 170 | { |
2f7ca802 | 171 | u32 val, addr; |
769ea6d8 | 172 | int ret; |
2f7ca802 SG |
173 | |
174 | mutex_lock(&dev->phy_mutex); | |
175 | ||
176 | /* confirm MII not busy */ | |
31472429 | 177 | ret = smsc95xx_phy_wait_not_busy(dev); |
b052e073 | 178 | if (ret < 0) { |
05b35e7e | 179 | netdev_warn(dev->net, "%s: MII is busy\n", __func__); |
b052e073 SG |
180 | goto done; |
181 | } | |
2f7ca802 SG |
182 | |
183 | /* set the address, index & direction (read from PHY) */ | |
05b35e7e | 184 | addr = mii_address_cmd(phy_id, idx, MII_READ_ | MII_BUSY_); |
31472429 | 185 | ret = smsc95xx_write_reg(dev, MII_ADDR, addr); |
b052e073 | 186 | if (ret < 0) { |
c70c453a FE |
187 | if (ret != -ENODEV) |
188 | netdev_warn(dev->net, "Error writing MII_ADDR\n"); | |
b052e073 SG |
189 | goto done; |
190 | } | |
2f7ca802 | 191 | |
31472429 | 192 | ret = smsc95xx_phy_wait_not_busy(dev); |
b052e073 SG |
193 | if (ret < 0) { |
194 | netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); | |
195 | goto done; | |
196 | } | |
2f7ca802 | 197 | |
31472429 | 198 | ret = smsc95xx_read_reg(dev, MII_DATA, &val); |
b052e073 | 199 | if (ret < 0) { |
c70c453a FE |
200 | if (ret != -ENODEV) |
201 | netdev_warn(dev->net, "Error reading MII_DATA\n"); | |
b052e073 SG |
202 | goto done; |
203 | } | |
2f7ca802 | 204 | |
769ea6d8 | 205 | ret = (u16)(val & 0xFFFF); |
2f7ca802 | 206 | |
769ea6d8 SG |
207 | done: |
208 | mutex_unlock(&dev->phy_mutex); | |
c70c453a FE |
209 | |
210 | /* Ignore -ENODEV error during disconnect() */ | |
211 | if (ret == -ENODEV) | |
212 | return 0; | |
769ea6d8 | 213 | return ret; |
2f7ca802 SG |
214 | } |
215 | ||
31472429 LW |
216 | static void smsc95xx_mdio_write(struct usbnet *dev, int phy_id, int idx, |
217 | int regval) | |
2f7ca802 | 218 | { |
2f7ca802 | 219 | u32 val, addr; |
769ea6d8 | 220 | int ret; |
2f7ca802 SG |
221 | |
222 | mutex_lock(&dev->phy_mutex); | |
223 | ||
224 | /* confirm MII not busy */ | |
31472429 | 225 | ret = smsc95xx_phy_wait_not_busy(dev); |
b052e073 | 226 | if (ret < 0) { |
05b35e7e | 227 | netdev_warn(dev->net, "%s: MII is busy\n", __func__); |
b052e073 SG |
228 | goto done; |
229 | } | |
2f7ca802 SG |
230 | |
231 | val = regval; | |
31472429 | 232 | ret = smsc95xx_write_reg(dev, MII_DATA, val); |
b052e073 | 233 | if (ret < 0) { |
c70c453a FE |
234 | if (ret != -ENODEV) |
235 | netdev_warn(dev->net, "Error writing MII_DATA\n"); | |
b052e073 SG |
236 | goto done; |
237 | } | |
2f7ca802 SG |
238 | |
239 | /* set the address, index & direction (write to PHY) */ | |
05b35e7e | 240 | addr = mii_address_cmd(phy_id, idx, MII_WRITE_ | MII_BUSY_); |
31472429 | 241 | ret = smsc95xx_write_reg(dev, MII_ADDR, addr); |
b052e073 | 242 | if (ret < 0) { |
c70c453a FE |
243 | if (ret != -ENODEV) |
244 | netdev_warn(dev->net, "Error writing MII_ADDR\n"); | |
b052e073 SG |
245 | goto done; |
246 | } | |
2f7ca802 | 247 | |
31472429 | 248 | ret = smsc95xx_phy_wait_not_busy(dev); |
b052e073 SG |
249 | if (ret < 0) { |
250 | netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx); | |
251 | goto done; | |
252 | } | |
2f7ca802 | 253 | |
769ea6d8 | 254 | done: |
2f7ca802 SG |
255 | mutex_unlock(&dev->phy_mutex); |
256 | } | |
257 | ||
809ff97a AT |
258 | static int smsc95xx_mdiobus_reset(struct mii_bus *bus) |
259 | { | |
260 | struct smsc95xx_priv *pdata; | |
261 | struct usbnet *dev; | |
262 | u32 val; | |
263 | int ret; | |
264 | ||
265 | dev = bus->priv; | |
266 | pdata = dev->driver_priv; | |
267 | ||
268 | if (pdata->is_internal_phy) | |
269 | return 0; | |
270 | ||
271 | mutex_lock(&dev->phy_mutex); | |
272 | ||
273 | ret = smsc95xx_read_reg(dev, PM_CTRL, &val); | |
274 | if (ret < 0) | |
275 | goto reset_out; | |
276 | ||
277 | val |= PM_CTL_PHY_RST_; | |
278 | ||
279 | ret = smsc95xx_write_reg(dev, PM_CTRL, val); | |
280 | if (ret < 0) | |
281 | goto reset_out; | |
282 | ||
283 | /* Driver has no knowledge at this point about the external PHY. | |
284 | * The 802.3 specifies that the reset process shall | |
285 | * be completed within 0.5 s. | |
286 | */ | |
287 | fsleep(500000); | |
288 | ||
289 | reset_out: | |
290 | mutex_unlock(&dev->phy_mutex); | |
291 | ||
292 | return 0; | |
293 | } | |
294 | ||
05b35e7e | 295 | static int smsc95xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx) |
e5e3af83 | 296 | { |
05b35e7e AE |
297 | struct usbnet *dev = bus->priv; |
298 | ||
31472429 | 299 | return smsc95xx_mdio_read(dev, phy_id, idx); |
e5e3af83 SG |
300 | } |
301 | ||
05b35e7e AE |
302 | static int smsc95xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx, |
303 | u16 regval) | |
e5e3af83 | 304 | { |
05b35e7e AE |
305 | struct usbnet *dev = bus->priv; |
306 | ||
31472429 | 307 | smsc95xx_mdio_write(dev, phy_id, idx, regval); |
05b35e7e | 308 | return 0; |
e5e3af83 SG |
309 | } |
310 | ||
769ea6d8 | 311 | static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev) |
2f7ca802 SG |
312 | { |
313 | unsigned long start_time = jiffies; | |
314 | u32 val; | |
769ea6d8 | 315 | int ret; |
2f7ca802 SG |
316 | |
317 | do { | |
769ea6d8 | 318 | ret = smsc95xx_read_reg(dev, E2P_CMD, &val); |
b052e073 SG |
319 | if (ret < 0) { |
320 | netdev_warn(dev->net, "Error reading E2P_CMD\n"); | |
321 | return ret; | |
322 | } | |
323 | ||
2f7ca802 SG |
324 | if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_)) |
325 | break; | |
326 | udelay(40); | |
327 | } while (!time_after(jiffies, start_time + HZ)); | |
328 | ||
329 | if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) { | |
60b86755 | 330 | netdev_warn(dev->net, "EEPROM read operation timeout\n"); |
2f7ca802 SG |
331 | return -EIO; |
332 | } | |
333 | ||
334 | return 0; | |
335 | } | |
336 | ||
769ea6d8 | 337 | static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev) |
2f7ca802 SG |
338 | { |
339 | unsigned long start_time = jiffies; | |
340 | u32 val; | |
769ea6d8 | 341 | int ret; |
2f7ca802 SG |
342 | |
343 | do { | |
769ea6d8 | 344 | ret = smsc95xx_read_reg(dev, E2P_CMD, &val); |
b052e073 SG |
345 | if (ret < 0) { |
346 | netdev_warn(dev->net, "Error reading E2P_CMD\n"); | |
347 | return ret; | |
348 | } | |
2f7ca802 | 349 | |
2f7ca802 SG |
350 | if (!(val & E2P_CMD_BUSY_)) |
351 | return 0; | |
352 | ||
353 | udelay(40); | |
354 | } while (!time_after(jiffies, start_time + HZ)); | |
355 | ||
60b86755 | 356 | netdev_warn(dev->net, "EEPROM is busy\n"); |
2f7ca802 SG |
357 | return -EIO; |
358 | } | |
359 | ||
360 | static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, | |
361 | u8 *data) | |
362 | { | |
363 | u32 val; | |
364 | int i, ret; | |
365 | ||
366 | BUG_ON(!dev); | |
367 | BUG_ON(!data); | |
368 | ||
369 | ret = smsc95xx_eeprom_confirm_not_busy(dev); | |
370 | if (ret) | |
371 | return ret; | |
372 | ||
373 | for (i = 0; i < length; i++) { | |
374 | val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_); | |
769ea6d8 | 375 | ret = smsc95xx_write_reg(dev, E2P_CMD, val); |
b052e073 SG |
376 | if (ret < 0) { |
377 | netdev_warn(dev->net, "Error writing E2P_CMD\n"); | |
378 | return ret; | |
379 | } | |
2f7ca802 SG |
380 | |
381 | ret = smsc95xx_wait_eeprom(dev); | |
382 | if (ret < 0) | |
383 | return ret; | |
384 | ||
769ea6d8 | 385 | ret = smsc95xx_read_reg(dev, E2P_DATA, &val); |
b052e073 SG |
386 | if (ret < 0) { |
387 | netdev_warn(dev->net, "Error reading E2P_DATA\n"); | |
388 | return ret; | |
389 | } | |
2f7ca802 SG |
390 | |
391 | data[i] = val & 0xFF; | |
392 | offset++; | |
393 | } | |
394 | ||
395 | return 0; | |
396 | } | |
397 | ||
398 | static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, | |
399 | u8 *data) | |
400 | { | |
401 | u32 val; | |
402 | int i, ret; | |
403 | ||
404 | BUG_ON(!dev); | |
405 | BUG_ON(!data); | |
406 | ||
407 | ret = smsc95xx_eeprom_confirm_not_busy(dev); | |
408 | if (ret) | |
409 | return ret; | |
410 | ||
411 | /* Issue write/erase enable command */ | |
412 | val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_; | |
769ea6d8 | 413 | ret = smsc95xx_write_reg(dev, E2P_CMD, val); |
b052e073 SG |
414 | if (ret < 0) { |
415 | netdev_warn(dev->net, "Error writing E2P_DATA\n"); | |
416 | return ret; | |
417 | } | |
2f7ca802 SG |
418 | |
419 | ret = smsc95xx_wait_eeprom(dev); | |
420 | if (ret < 0) | |
421 | return ret; | |
422 | ||
423 | for (i = 0; i < length; i++) { | |
424 | ||
425 | /* Fill data register */ | |
426 | val = data[i]; | |
769ea6d8 | 427 | ret = smsc95xx_write_reg(dev, E2P_DATA, val); |
b052e073 SG |
428 | if (ret < 0) { |
429 | netdev_warn(dev->net, "Error writing E2P_DATA\n"); | |
430 | return ret; | |
431 | } | |
2f7ca802 SG |
432 | |
433 | /* Send "write" command */ | |
434 | val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_); | |
769ea6d8 | 435 | ret = smsc95xx_write_reg(dev, E2P_CMD, val); |
b052e073 SG |
436 | if (ret < 0) { |
437 | netdev_warn(dev->net, "Error writing E2P_CMD\n"); | |
438 | return ret; | |
439 | } | |
2f7ca802 SG |
440 | |
441 | ret = smsc95xx_wait_eeprom(dev); | |
442 | if (ret < 0) | |
443 | return ret; | |
444 | ||
445 | offset++; | |
446 | } | |
447 | ||
448 | return 0; | |
449 | } | |
450 | ||
769ea6d8 | 451 | static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index, |
7b9e7580 | 452 | u32 data) |
2f7ca802 | 453 | { |
1d74a6bd | 454 | const u16 size = 4; |
7b9e7580 | 455 | u32 buf; |
72108fd2 | 456 | int ret; |
2f7ca802 | 457 | |
7b9e7580 SG |
458 | buf = data; |
459 | cpu_to_le32s(&buf); | |
460 | ||
72108fd2 ML |
461 | ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, |
462 | USB_DIR_OUT | USB_TYPE_VENDOR | | |
463 | USB_RECIP_DEVICE, | |
7b9e7580 | 464 | 0, index, &buf, size); |
72108fd2 ML |
465 | if (ret < 0) |
466 | netdev_warn(dev->net, "Error write async cmd, sts=%d\n", | |
467 | ret); | |
468 | return ret; | |
2f7ca802 SG |
469 | } |
470 | ||
471 | /* returns hash bit number for given MAC address | |
472 | * example: | |
473 | * 01 00 5E 00 00 01 -> returns bit number 31 */ | |
474 | static unsigned int smsc95xx_hash(char addr[ETH_ALEN]) | |
475 | { | |
476 | return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; | |
477 | } | |
478 | ||
479 | static void smsc95xx_set_multicast(struct net_device *netdev) | |
480 | { | |
481 | struct usbnet *dev = netdev_priv(netdev); | |
ad90a73f | 482 | struct smsc95xx_priv *pdata = dev->driver_priv; |
2f7ca802 | 483 | unsigned long flags; |
769ea6d8 | 484 | int ret; |
2f7ca802 | 485 | |
3c0f3c60 MZ |
486 | pdata->hash_hi = 0; |
487 | pdata->hash_lo = 0; | |
488 | ||
2f7ca802 SG |
489 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); |
490 | ||
491 | if (dev->net->flags & IFF_PROMISC) { | |
a475f603 | 492 | netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n"); |
2f7ca802 SG |
493 | pdata->mac_cr |= MAC_CR_PRMS_; |
494 | pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_); | |
495 | } else if (dev->net->flags & IFF_ALLMULTI) { | |
a475f603 | 496 | netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n"); |
2f7ca802 SG |
497 | pdata->mac_cr |= MAC_CR_MCPAS_; |
498 | pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_); | |
4cd24eaf | 499 | } else if (!netdev_mc_empty(dev->net)) { |
22bedad3 | 500 | struct netdev_hw_addr *ha; |
2f7ca802 SG |
501 | |
502 | pdata->mac_cr |= MAC_CR_HPFILT_; | |
503 | pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); | |
504 | ||
22bedad3 JP |
505 | netdev_for_each_mc_addr(ha, netdev) { |
506 | u32 bitnum = smsc95xx_hash(ha->addr); | |
a92635dc JP |
507 | u32 mask = 0x01 << (bitnum & 0x1F); |
508 | if (bitnum & 0x20) | |
3c0f3c60 | 509 | pdata->hash_hi |= mask; |
a92635dc | 510 | else |
3c0f3c60 | 511 | pdata->hash_lo |= mask; |
2f7ca802 SG |
512 | } |
513 | ||
a475f603 | 514 | netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n", |
3c0f3c60 | 515 | pdata->hash_hi, pdata->hash_lo); |
2f7ca802 | 516 | } else { |
a475f603 | 517 | netif_dbg(dev, drv, dev->net, "receive own packets only\n"); |
2f7ca802 SG |
518 | pdata->mac_cr &= |
519 | ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); | |
520 | } | |
521 | ||
522 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
523 | ||
524 | /* Initiate async writes, as we can't wait for completion here */ | |
7b9e7580 | 525 | ret = smsc95xx_write_reg_async(dev, HASHH, pdata->hash_hi); |
b052e073 SG |
526 | if (ret < 0) |
527 | netdev_warn(dev->net, "failed to initiate async write to HASHH\n"); | |
769ea6d8 | 528 | |
7b9e7580 | 529 | ret = smsc95xx_write_reg_async(dev, HASHL, pdata->hash_lo); |
b052e073 SG |
530 | if (ret < 0) |
531 | netdev_warn(dev->net, "failed to initiate async write to HASHL\n"); | |
769ea6d8 | 532 | |
7b9e7580 | 533 | ret = smsc95xx_write_reg_async(dev, MAC_CR, pdata->mac_cr); |
b052e073 SG |
534 | if (ret < 0) |
535 | netdev_warn(dev->net, "failed to initiate async write to MAC_CR\n"); | |
2f7ca802 SG |
536 | } |
537 | ||
05b35e7e | 538 | static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev) |
2f7ca802 | 539 | { |
9c082731 | 540 | u32 flow = 0, afc_cfg; |
05b35e7e AE |
541 | struct smsc95xx_priv *pdata = dev->driver_priv; |
542 | bool tx_pause, rx_pause; | |
2f7ca802 SG |
543 | |
544 | int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg); | |
e360a8b4 | 545 | if (ret < 0) |
b052e073 | 546 | return ret; |
2f7ca802 | 547 | |
05b35e7e AE |
548 | if (pdata->phydev->duplex == DUPLEX_FULL) { |
549 | phy_get_pause(pdata->phydev, &tx_pause, &rx_pause); | |
2f7ca802 | 550 | |
05b35e7e | 551 | if (rx_pause) |
2f7ca802 | 552 | flow = 0xFFFF0002; |
2f7ca802 | 553 | |
05b35e7e | 554 | if (tx_pause) { |
2f7ca802 | 555 | afc_cfg |= 0xF; |
9c082731 NS |
556 | flow |= 0xFFFF0000; |
557 | } else { | |
2f7ca802 | 558 | afc_cfg &= ~0xF; |
9c082731 | 559 | } |
2f7ca802 | 560 | |
a475f603 | 561 | netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n", |
05b35e7e AE |
562 | rx_pause ? "enabled" : "disabled", |
563 | tx_pause ? "enabled" : "disabled"); | |
2f7ca802 | 564 | } else { |
a475f603 | 565 | netif_dbg(dev, link, dev->net, "half duplex\n"); |
2f7ca802 SG |
566 | afc_cfg |= 0xF; |
567 | } | |
568 | ||
769ea6d8 | 569 | ret = smsc95xx_write_reg(dev, FLOW, flow); |
b052e073 | 570 | if (ret < 0) |
e360a8b4 | 571 | return ret; |
769ea6d8 | 572 | |
e360a8b4 | 573 | return smsc95xx_write_reg(dev, AFC_CFG, afc_cfg); |
2f7ca802 SG |
574 | } |
575 | ||
8960f878 | 576 | static void smsc95xx_mac_update_fullduplex(struct usbnet *dev) |
2f7ca802 | 577 | { |
ad90a73f | 578 | struct smsc95xx_priv *pdata = dev->driver_priv; |
2f7ca802 | 579 | unsigned long flags; |
769ea6d8 | 580 | int ret; |
2f7ca802 | 581 | |
2f7ca802 | 582 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); |
05b35e7e | 583 | if (pdata->phydev->duplex != DUPLEX_FULL) { |
2f7ca802 SG |
584 | pdata->mac_cr &= ~MAC_CR_FDPX_; |
585 | pdata->mac_cr |= MAC_CR_RCVOWN_; | |
586 | } else { | |
587 | pdata->mac_cr &= ~MAC_CR_RCVOWN_; | |
588 | pdata->mac_cr |= MAC_CR_FDPX_; | |
589 | } | |
590 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
591 | ||
769ea6d8 | 592 | ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); |
8960f878 LW |
593 | if (ret < 0) { |
594 | if (ret != -ENODEV) | |
595 | netdev_warn(dev->net, | |
596 | "Error updating MAC full duplex mode\n"); | |
597 | return; | |
598 | } | |
2f7ca802 | 599 | |
05b35e7e | 600 | ret = smsc95xx_phy_update_flowcontrol(dev); |
b052e073 SG |
601 | if (ret < 0) |
602 | netdev_warn(dev->net, "Error updating PHY flow control\n"); | |
2f7ca802 SG |
603 | } |
604 | ||
605 | static void smsc95xx_status(struct usbnet *dev, struct urb *urb) | |
606 | { | |
1ce8b372 LW |
607 | struct smsc95xx_priv *pdata = dev->driver_priv; |
608 | unsigned long flags; | |
2f7ca802 SG |
609 | u32 intdata; |
610 | ||
611 | if (urb->actual_length != 4) { | |
60b86755 JP |
612 | netdev_warn(dev->net, "unexpected urb length %d\n", |
613 | urb->actual_length); | |
2f7ca802 SG |
614 | return; |
615 | } | |
616 | ||
6809d216 | 617 | intdata = get_unaligned_le32(urb->transfer_buffer); |
a475f603 | 618 | netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata); |
2f7ca802 | 619 | |
1ce8b372 LW |
620 | local_irq_save(flags); |
621 | ||
2f7ca802 | 622 | if (intdata & INT_ENP_PHY_INT_) |
1ce8b372 | 623 | generic_handle_domain_irq(pdata->irqdomain, PHY_HWIRQ); |
2f7ca802 | 624 | else |
60b86755 JP |
625 | netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n", |
626 | intdata); | |
1ce8b372 LW |
627 | |
628 | local_irq_restore(flags); | |
2f7ca802 SG |
629 | } |
630 | ||
f7b29271 | 631 | /* Enable or disable Tx & Rx checksum offload engines */ |
c8f44aff MM |
632 | static int smsc95xx_set_features(struct net_device *netdev, |
633 | netdev_features_t features) | |
2f7ca802 | 634 | { |
78e47fe4 | 635 | struct usbnet *dev = netdev_priv(netdev); |
2f7ca802 | 636 | u32 read_buf; |
78e47fe4 MM |
637 | int ret; |
638 | ||
639 | ret = smsc95xx_read_reg(dev, COE_CR, &read_buf); | |
e360a8b4 | 640 | if (ret < 0) |
b052e073 | 641 | return ret; |
2f7ca802 | 642 | |
fe0cd8ca | 643 | if (features & NETIF_F_IP_CSUM) |
f7b29271 SG |
644 | read_buf |= Tx_COE_EN_; |
645 | else | |
646 | read_buf &= ~Tx_COE_EN_; | |
647 | ||
78e47fe4 | 648 | if (features & NETIF_F_RXCSUM) |
2f7ca802 SG |
649 | read_buf |= Rx_COE_EN_; |
650 | else | |
651 | read_buf &= ~Rx_COE_EN_; | |
652 | ||
653 | ret = smsc95xx_write_reg(dev, COE_CR, read_buf); | |
e360a8b4 | 654 | if (ret < 0) |
b052e073 | 655 | return ret; |
2f7ca802 | 656 | |
a475f603 | 657 | netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf); |
2f7ca802 SG |
658 | return 0; |
659 | } | |
660 | ||
661 | static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net) | |
662 | { | |
663 | return MAX_EEPROM_SIZE; | |
664 | } | |
665 | ||
666 | static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev, | |
667 | struct ethtool_eeprom *ee, u8 *data) | |
668 | { | |
669 | struct usbnet *dev = netdev_priv(netdev); | |
670 | ||
671 | ee->magic = LAN95XX_EEPROM_MAGIC; | |
672 | ||
673 | return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data); | |
674 | } | |
675 | ||
676 | static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev, | |
677 | struct ethtool_eeprom *ee, u8 *data) | |
678 | { | |
679 | struct usbnet *dev = netdev_priv(netdev); | |
680 | ||
681 | if (ee->magic != LAN95XX_EEPROM_MAGIC) { | |
60b86755 JP |
682 | netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n", |
683 | ee->magic); | |
2f7ca802 SG |
684 | return -EINVAL; |
685 | } | |
686 | ||
687 | return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data); | |
688 | } | |
689 | ||
9fa32e94 EV |
690 | static int smsc95xx_ethtool_getregslen(struct net_device *netdev) |
691 | { | |
692 | /* all smsc95xx registers */ | |
96245317 | 693 | return COE_CR - ID_REV + sizeof(u32); |
9fa32e94 EV |
694 | } |
695 | ||
696 | static void | |
697 | smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs, | |
698 | void *buf) | |
699 | { | |
700 | struct usbnet *dev = netdev_priv(netdev); | |
d348446b DC |
701 | unsigned int i, j; |
702 | int retval; | |
9fa32e94 EV |
703 | u32 *data = buf; |
704 | ||
705 | retval = smsc95xx_read_reg(dev, ID_REV, ®s->version); | |
706 | if (retval < 0) { | |
707 | netdev_warn(netdev, "REGS: cannot read ID_REV\n"); | |
708 | return; | |
709 | } | |
710 | ||
711 | for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) { | |
712 | retval = smsc95xx_read_reg(dev, i, &data[j]); | |
713 | if (retval < 0) { | |
714 | netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i); | |
715 | return; | |
716 | } | |
717 | } | |
718 | } | |
719 | ||
e0e474a8 SG |
720 | static void smsc95xx_ethtool_get_wol(struct net_device *net, |
721 | struct ethtool_wolinfo *wolinfo) | |
722 | { | |
723 | struct usbnet *dev = netdev_priv(net); | |
ad90a73f | 724 | struct smsc95xx_priv *pdata = dev->driver_priv; |
e0e474a8 SG |
725 | |
726 | wolinfo->supported = SUPPORTED_WAKE; | |
727 | wolinfo->wolopts = pdata->wolopts; | |
728 | } | |
729 | ||
730 | static int smsc95xx_ethtool_set_wol(struct net_device *net, | |
731 | struct ethtool_wolinfo *wolinfo) | |
732 | { | |
733 | struct usbnet *dev = netdev_priv(net); | |
ad90a73f | 734 | struct smsc95xx_priv *pdata = dev->driver_priv; |
3b14692c | 735 | int ret; |
e0e474a8 | 736 | |
c530c471 FF |
737 | if (wolinfo->wolopts & ~SUPPORTED_WAKE) |
738 | return -EINVAL; | |
739 | ||
e0e474a8 | 740 | pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE; |
3b14692c SG |
741 | |
742 | ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts); | |
b052e073 SG |
743 | if (ret < 0) |
744 | netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret); | |
3b14692c | 745 | |
b052e073 | 746 | return ret; |
e0e474a8 SG |
747 | } |
748 | ||
05b35e7e | 749 | static u32 smsc95xx_get_link(struct net_device *net) |
13722bbe | 750 | { |
05b35e7e AE |
751 | phy_read_status(net->phydev); |
752 | return net->phydev->link; | |
13722bbe WH |
753 | } |
754 | ||
1710b52d OR |
755 | static void smsc95xx_ethtool_get_strings(struct net_device *netdev, u32 sset, |
756 | u8 *data) | |
757 | { | |
758 | switch (sset) { | |
759 | case ETH_SS_TEST: | |
760 | net_selftest_get_strings(data); | |
761 | break; | |
762 | } | |
763 | } | |
764 | ||
765 | static int smsc95xx_ethtool_get_sset_count(struct net_device *ndev, int sset) | |
766 | { | |
767 | switch (sset) { | |
768 | case ETH_SS_TEST: | |
769 | return net_selftest_get_count(); | |
770 | default: | |
771 | return -EOPNOTSUPP; | |
772 | } | |
773 | } | |
774 | ||
0fc0b732 | 775 | static const struct ethtool_ops smsc95xx_ethtool_ops = { |
05b35e7e AE |
776 | .get_link = smsc95xx_get_link, |
777 | .nway_reset = phy_ethtool_nway_reset, | |
2f7ca802 SG |
778 | .get_drvinfo = usbnet_get_drvinfo, |
779 | .get_msglevel = usbnet_get_msglevel, | |
780 | .set_msglevel = usbnet_set_msglevel, | |
2f7ca802 SG |
781 | .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len, |
782 | .get_eeprom = smsc95xx_ethtool_get_eeprom, | |
783 | .set_eeprom = smsc95xx_ethtool_set_eeprom, | |
9fa32e94 EV |
784 | .get_regs_len = smsc95xx_ethtool_getregslen, |
785 | .get_regs = smsc95xx_ethtool_getregs, | |
e0e474a8 SG |
786 | .get_wol = smsc95xx_ethtool_get_wol, |
787 | .set_wol = smsc95xx_ethtool_set_wol, | |
05b35e7e AE |
788 | .get_link_ksettings = phy_ethtool_get_link_ksettings, |
789 | .set_link_ksettings = phy_ethtool_set_link_ksettings, | |
a8f5cb9e | 790 | .get_ts_info = ethtool_op_get_ts_info, |
1710b52d OR |
791 | .self_test = net_selftest, |
792 | .get_strings = smsc95xx_ethtool_get_strings, | |
793 | .get_sset_count = smsc95xx_ethtool_get_sset_count, | |
2f7ca802 SG |
794 | }; |
795 | ||
796 | static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) | |
797 | { | |
2f7ca802 SG |
798 | if (!netif_running(netdev)) |
799 | return -EINVAL; | |
800 | ||
05b35e7e | 801 | return phy_mii_ioctl(netdev->phydev, rq, cmd); |
2f7ca802 SG |
802 | } |
803 | ||
804 | static void smsc95xx_init_mac_address(struct usbnet *dev) | |
805 | { | |
a7021af7 JK |
806 | u8 addr[ETH_ALEN]; |
807 | ||
c489565b | 808 | /* maybe the boot loader passed the MAC address in devicetree */ |
4d04cdc5 | 809 | if (!platform_get_ethdev_address(&dev->udev->dev, dev->net)) { |
4f359b65 ŁS |
810 | if (is_valid_ether_addr(dev->net->dev_addr)) { |
811 | /* device tree values are valid so use them */ | |
812 | netif_dbg(dev, ifup, dev->net, "MAC address read from the device tree\n"); | |
813 | return; | |
814 | } | |
c489565b AB |
815 | } |
816 | ||
2f7ca802 | 817 | /* try reading mac address from EEPROM */ |
a7021af7 JK |
818 | if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, addr) == 0) { |
819 | eth_hw_addr_set(dev->net, addr); | |
2f7ca802 SG |
820 | if (is_valid_ether_addr(dev->net->dev_addr)) { |
821 | /* eeprom values are valid so use them */ | |
a475f603 | 822 | netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n"); |
2f7ca802 SG |
823 | return; |
824 | } | |
825 | } | |
826 | ||
c489565b | 827 | /* no useful static MAC address found. generate a random one */ |
f2cedb63 | 828 | eth_hw_addr_random(dev->net); |
c7e12ead | 829 | netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n"); |
2f7ca802 SG |
830 | } |
831 | ||
832 | static int smsc95xx_set_mac_address(struct usbnet *dev) | |
833 | { | |
834 | u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | | |
835 | dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; | |
836 | u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; | |
837 | int ret; | |
838 | ||
839 | ret = smsc95xx_write_reg(dev, ADDRL, addr_lo); | |
b052e073 | 840 | if (ret < 0) |
e360a8b4 | 841 | return ret; |
2f7ca802 | 842 | |
e360a8b4 | 843 | return smsc95xx_write_reg(dev, ADDRH, addr_hi); |
2f7ca802 SG |
844 | } |
845 | ||
846 | /* starts the TX path */ | |
769ea6d8 | 847 | static int smsc95xx_start_tx_path(struct usbnet *dev) |
2f7ca802 | 848 | { |
ad90a73f | 849 | struct smsc95xx_priv *pdata = dev->driver_priv; |
2f7ca802 | 850 | unsigned long flags; |
769ea6d8 | 851 | int ret; |
2f7ca802 SG |
852 | |
853 | /* Enable Tx at MAC */ | |
854 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); | |
855 | pdata->mac_cr |= MAC_CR_TXEN_; | |
856 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
857 | ||
769ea6d8 | 858 | ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); |
e360a8b4 | 859 | if (ret < 0) |
b052e073 | 860 | return ret; |
2f7ca802 SG |
861 | |
862 | /* Enable Tx at SCSRs */ | |
e360a8b4 | 863 | return smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_); |
2f7ca802 SG |
864 | } |
865 | ||
866 | /* Starts the Receive path */ | |
31472429 | 867 | static int smsc95xx_start_rx_path(struct usbnet *dev) |
2f7ca802 | 868 | { |
ad90a73f | 869 | struct smsc95xx_priv *pdata = dev->driver_priv; |
2f7ca802 SG |
870 | unsigned long flags; |
871 | ||
872 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); | |
873 | pdata->mac_cr |= MAC_CR_RXEN_; | |
874 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
875 | ||
31472429 | 876 | return smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); |
2f7ca802 SG |
877 | } |
878 | ||
2f7ca802 SG |
879 | static int smsc95xx_reset(struct usbnet *dev) |
880 | { | |
ad90a73f | 881 | struct smsc95xx_priv *pdata = dev->driver_priv; |
2f7ca802 SG |
882 | u32 read_buf, write_buf, burst_cap; |
883 | int ret = 0, timeout; | |
2f7ca802 | 884 | |
a475f603 | 885 | netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n"); |
2f7ca802 | 886 | |
4436761b | 887 | ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_); |
e360a8b4 | 888 | if (ret < 0) |
b052e073 | 889 | return ret; |
2f7ca802 SG |
890 | |
891 | timeout = 0; | |
892 | do { | |
cf2acec2 | 893 | msleep(10); |
2f7ca802 | 894 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); |
e360a8b4 | 895 | if (ret < 0) |
b052e073 | 896 | return ret; |
2f7ca802 SG |
897 | timeout++; |
898 | } while ((read_buf & HW_CFG_LRST_) && (timeout < 100)); | |
899 | ||
900 | if (timeout >= 100) { | |
60b86755 | 901 | netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n"); |
c53647a5 | 902 | return -ETIMEDOUT; |
2f7ca802 SG |
903 | } |
904 | ||
2f7ca802 SG |
905 | ret = smsc95xx_set_mac_address(dev); |
906 | if (ret < 0) | |
907 | return ret; | |
908 | ||
1e1d7412 JP |
909 | netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n", |
910 | dev->net->dev_addr); | |
2f7ca802 SG |
911 | |
912 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 913 | if (ret < 0) |
b052e073 | 914 | return ret; |
2f7ca802 | 915 | |
1e1d7412 JP |
916 | netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n", |
917 | read_buf); | |
2f7ca802 SG |
918 | |
919 | read_buf |= HW_CFG_BIR_; | |
920 | ||
921 | ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); | |
e360a8b4 | 922 | if (ret < 0) |
b052e073 | 923 | return ret; |
2f7ca802 SG |
924 | |
925 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 926 | if (ret < 0) |
b052e073 | 927 | return ret; |
b052e073 | 928 | |
a475f603 JP |
929 | netif_dbg(dev, ifup, dev->net, |
930 | "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n", | |
931 | read_buf); | |
2f7ca802 SG |
932 | |
933 | if (!turbo_mode) { | |
934 | burst_cap = 0; | |
935 | dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; | |
936 | } else if (dev->udev->speed == USB_SPEED_HIGH) { | |
937 | burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; | |
938 | dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; | |
939 | } else { | |
940 | burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; | |
941 | dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; | |
942 | } | |
943 | ||
1e1d7412 JP |
944 | netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n", |
945 | (ulong)dev->rx_urb_size); | |
2f7ca802 SG |
946 | |
947 | ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap); | |
e360a8b4 | 948 | if (ret < 0) |
b052e073 | 949 | return ret; |
2f7ca802 SG |
950 | |
951 | ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf); | |
e360a8b4 | 952 | if (ret < 0) |
b052e073 | 953 | return ret; |
769ea6d8 | 954 | |
a475f603 JP |
955 | netif_dbg(dev, ifup, dev->net, |
956 | "Read Value from BURST_CAP after writing: 0x%08x\n", | |
957 | read_buf); | |
2f7ca802 | 958 | |
4436761b | 959 | ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); |
e360a8b4 | 960 | if (ret < 0) |
b052e073 | 961 | return ret; |
2f7ca802 SG |
962 | |
963 | ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf); | |
e360a8b4 | 964 | if (ret < 0) |
b052e073 | 965 | return ret; |
769ea6d8 | 966 | |
a475f603 JP |
967 | netif_dbg(dev, ifup, dev->net, |
968 | "Read Value from BULK_IN_DLY after writing: 0x%08x\n", | |
969 | read_buf); | |
2f7ca802 SG |
970 | |
971 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 972 | if (ret < 0) |
b052e073 | 973 | return ret; |
769ea6d8 | 974 | |
1e1d7412 JP |
975 | netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG: 0x%08x\n", |
976 | read_buf); | |
2f7ca802 SG |
977 | |
978 | if (turbo_mode) | |
979 | read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_); | |
980 | ||
981 | read_buf &= ~HW_CFG_RXDOFF_; | |
982 | ||
983 | /* set Rx data offset=2, Make IP header aligns on word boundary. */ | |
984 | read_buf |= NET_IP_ALIGN << 9; | |
985 | ||
986 | ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); | |
e360a8b4 | 987 | if (ret < 0) |
b052e073 | 988 | return ret; |
2f7ca802 SG |
989 | |
990 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 991 | if (ret < 0) |
b052e073 | 992 | return ret; |
769ea6d8 | 993 | |
a475f603 JP |
994 | netif_dbg(dev, ifup, dev->net, |
995 | "Read Value from HW_CFG after writing: 0x%08x\n", read_buf); | |
2f7ca802 | 996 | |
4436761b | 997 | ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); |
e360a8b4 | 998 | if (ret < 0) |
b052e073 | 999 | return ret; |
2f7ca802 SG |
1000 | |
1001 | ret = smsc95xx_read_reg(dev, ID_REV, &read_buf); | |
e360a8b4 | 1002 | if (ret < 0) |
b052e073 | 1003 | return ret; |
a475f603 | 1004 | netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf); |
2f7ca802 | 1005 | |
f293501c SG |
1006 | /* Configure GPIO pins as LED outputs */ |
1007 | write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED | | |
1008 | LED_GPIO_CFG_FDX_LED; | |
1009 | ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf); | |
e360a8b4 | 1010 | if (ret < 0) |
b052e073 | 1011 | return ret; |
f293501c | 1012 | |
2f7ca802 | 1013 | /* Init Tx */ |
4436761b | 1014 | ret = smsc95xx_write_reg(dev, FLOW, 0); |
e360a8b4 | 1015 | if (ret < 0) |
b052e073 | 1016 | return ret; |
2f7ca802 | 1017 | |
4436761b | 1018 | ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT); |
e360a8b4 | 1019 | if (ret < 0) |
b052e073 | 1020 | return ret; |
2f7ca802 SG |
1021 | |
1022 | /* Don't need mac_cr_lock during initialisation */ | |
1023 | ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr); | |
e360a8b4 | 1024 | if (ret < 0) |
b052e073 | 1025 | return ret; |
2f7ca802 SG |
1026 | |
1027 | /* Init Rx */ | |
1028 | /* Set Vlan */ | |
4436761b | 1029 | ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q); |
e360a8b4 | 1030 | if (ret < 0) |
b052e073 | 1031 | return ret; |
2f7ca802 | 1032 | |
f7b29271 | 1033 | /* Enable or disable checksum offload engines */ |
769ea6d8 | 1034 | ret = smsc95xx_set_features(dev->net, dev->net->features); |
b052e073 SG |
1035 | if (ret < 0) { |
1036 | netdev_warn(dev->net, "Failed to set checksum offload features\n"); | |
1037 | return ret; | |
1038 | } | |
2f7ca802 SG |
1039 | |
1040 | smsc95xx_set_multicast(dev->net); | |
1041 | ||
2f7ca802 | 1042 | ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf); |
e360a8b4 | 1043 | if (ret < 0) |
b052e073 | 1044 | return ret; |
2f7ca802 SG |
1045 | |
1046 | /* enable PHY interrupts */ | |
1047 | read_buf |= INT_EP_CTL_PHY_INT_; | |
1048 | ||
1049 | ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf); | |
e360a8b4 | 1050 | if (ret < 0) |
b052e073 | 1051 | return ret; |
2f7ca802 | 1052 | |
769ea6d8 | 1053 | ret = smsc95xx_start_tx_path(dev); |
b052e073 SG |
1054 | if (ret < 0) { |
1055 | netdev_warn(dev->net, "Failed to start TX path\n"); | |
1056 | return ret; | |
1057 | } | |
769ea6d8 | 1058 | |
31472429 | 1059 | ret = smsc95xx_start_rx_path(dev); |
b052e073 SG |
1060 | if (ret < 0) { |
1061 | netdev_warn(dev->net, "Failed to start RX path\n"); | |
1062 | return ret; | |
1063 | } | |
2f7ca802 | 1064 | |
a475f603 | 1065 | netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n"); |
2f7ca802 SG |
1066 | return 0; |
1067 | } | |
1068 | ||
63e77b39 SH |
1069 | static const struct net_device_ops smsc95xx_netdev_ops = { |
1070 | .ndo_open = usbnet_open, | |
1071 | .ndo_stop = usbnet_stop, | |
1072 | .ndo_start_xmit = usbnet_start_xmit, | |
1073 | .ndo_tx_timeout = usbnet_tx_timeout, | |
1074 | .ndo_change_mtu = usbnet_change_mtu, | |
323955a0 | 1075 | .ndo_get_stats64 = dev_get_tstats64, |
63e77b39 SH |
1076 | .ndo_set_mac_address = eth_mac_addr, |
1077 | .ndo_validate_addr = eth_validate_addr, | |
a7605370 | 1078 | .ndo_eth_ioctl = smsc95xx_ioctl, |
afc4b13d | 1079 | .ndo_set_rx_mode = smsc95xx_set_multicast, |
78e47fe4 | 1080 | .ndo_set_features = smsc95xx_set_features, |
63e77b39 SH |
1081 | }; |
1082 | ||
a049a30f MW |
1083 | static void smsc95xx_handle_link_change(struct net_device *net) |
1084 | { | |
1085 | struct usbnet *dev = netdev_priv(net); | |
1086 | ||
1087 | phy_print_status(net->phydev); | |
8960f878 | 1088 | smsc95xx_mac_update_fullduplex(dev); |
a049a30f MW |
1089 | usbnet_defer_kevent(dev, EVENT_LINK_CHANGE); |
1090 | } | |
1091 | ||
2f7ca802 SG |
1092 | static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf) |
1093 | { | |
ad90a73f | 1094 | struct smsc95xx_priv *pdata; |
1ce8b372 LW |
1095 | char usb_path[64]; |
1096 | int ret, phy_irq; | |
bbd9f9ee | 1097 | u32 val; |
2f7ca802 SG |
1098 | |
1099 | printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); | |
1100 | ||
1101 | ret = usbnet_get_endpoints(dev, intf); | |
b052e073 SG |
1102 | if (ret < 0) { |
1103 | netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret); | |
1104 | return ret; | |
1105 | } | |
2f7ca802 | 1106 | |
ad90a73f | 1107 | pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); |
38673c82 | 1108 | if (!pdata) |
2f7ca802 | 1109 | return -ENOMEM; |
2f7ca802 | 1110 | |
ad90a73f AE |
1111 | dev->driver_priv = pdata; |
1112 | ||
2f7ca802 SG |
1113 | spin_lock_init(&pdata->mac_cr_lock); |
1114 | ||
fe0cd8ca NS |
1115 | /* LAN95xx devices do not alter the computed checksum of 0 to 0xffff. |
1116 | * RFC 2460, ipv6 UDP calculated checksum yields a result of zero must | |
1117 | * be changed to 0xffff. RFC 768, ipv4 UDP computed checksum is zero, | |
1118 | * it is transmitted as all ones. The zero transmitted checksum means | |
1119 | * transmitter generated no checksum. Hence, enable csum offload only | |
1120 | * for ipv4 packets. | |
1121 | */ | |
78e47fe4 | 1122 | if (DEFAULT_TX_CSUM_ENABLE) |
fe0cd8ca | 1123 | dev->net->features |= NETIF_F_IP_CSUM; |
78e47fe4 MM |
1124 | if (DEFAULT_RX_CSUM_ENABLE) |
1125 | dev->net->features |= NETIF_F_RXCSUM; | |
1126 | ||
fe0cd8ca | 1127 | dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM; |
810eeb1f | 1128 | set_bit(EVENT_NO_IP_ALIGN, &dev->flags); |
2f7ca802 | 1129 | |
f4e8ab7c BB |
1130 | smsc95xx_init_mac_address(dev); |
1131 | ||
2f7ca802 SG |
1132 | /* Init all registers */ |
1133 | ret = smsc95xx_reset(dev); | |
7c8b1e85 AE |
1134 | if (ret) |
1135 | goto free_pdata; | |
2f7ca802 | 1136 | |
1ce8b372 LW |
1137 | /* create irq domain for use by PHY driver and GPIO consumers */ |
1138 | usb_make_path(dev->udev, usb_path, sizeof(usb_path)); | |
1139 | pdata->irqfwnode = irq_domain_alloc_named_fwnode(usb_path); | |
1140 | if (!pdata->irqfwnode) { | |
1141 | ret = -ENOMEM; | |
1142 | goto free_pdata; | |
1143 | } | |
1144 | ||
1145 | pdata->irqdomain = irq_domain_create_linear(pdata->irqfwnode, | |
1146 | SMSC95XX_NR_IRQS, | |
1147 | &irq_domain_simple_ops, | |
1148 | pdata); | |
1149 | if (!pdata->irqdomain) { | |
1150 | ret = -ENOMEM; | |
1151 | goto free_irqfwnode; | |
1152 | } | |
1153 | ||
1154 | phy_irq = irq_create_mapping(pdata->irqdomain, PHY_HWIRQ); | |
1155 | if (!phy_irq) { | |
1156 | ret = -ENOENT; | |
1157 | goto remove_irqdomain; | |
1158 | } | |
1159 | ||
1160 | pdata->irqchip = dummy_irq_chip; | |
1161 | pdata->irqchip.name = SMSC_CHIPNAME; | |
1162 | irq_set_chip_and_handler_name(phy_irq, &pdata->irqchip, | |
1163 | handle_simple_irq, "phy"); | |
1164 | ||
05b35e7e AE |
1165 | pdata->mdiobus = mdiobus_alloc(); |
1166 | if (!pdata->mdiobus) { | |
1167 | ret = -ENOMEM; | |
1ce8b372 | 1168 | goto dispose_irq; |
05b35e7e AE |
1169 | } |
1170 | ||
1171 | ret = smsc95xx_read_reg(dev, HW_CFG, &val); | |
1172 | if (ret < 0) | |
1173 | goto free_mdio; | |
1174 | ||
809ff97a AT |
1175 | pdata->is_internal_phy = !(val & HW_CFG_PSEL_); |
1176 | if (pdata->is_internal_phy) | |
05b35e7e AE |
1177 | pdata->mdiobus->phy_mask = ~(1u << SMSC95XX_INTERNAL_PHY_ID); |
1178 | ||
1179 | pdata->mdiobus->priv = dev; | |
1180 | pdata->mdiobus->read = smsc95xx_mdiobus_read; | |
1181 | pdata->mdiobus->write = smsc95xx_mdiobus_write; | |
809ff97a | 1182 | pdata->mdiobus->reset = smsc95xx_mdiobus_reset; |
05b35e7e AE |
1183 | pdata->mdiobus->name = "smsc95xx-mdiobus"; |
1184 | pdata->mdiobus->parent = &dev->udev->dev; | |
1185 | ||
1186 | snprintf(pdata->mdiobus->id, ARRAY_SIZE(pdata->mdiobus->id), | |
1187 | "usb-%03d:%03d", dev->udev->bus->busnum, dev->udev->devnum); | |
1188 | ||
1189 | ret = mdiobus_register(pdata->mdiobus); | |
1190 | if (ret) { | |
1191 | netdev_err(dev->net, "Could not register MDIO bus\n"); | |
1192 | goto free_mdio; | |
1193 | } | |
1194 | ||
1195 | pdata->phydev = phy_find_first(pdata->mdiobus); | |
1196 | if (!pdata->phydev) { | |
1197 | netdev_err(dev->net, "no PHY found\n"); | |
1198 | ret = -ENODEV; | |
1199 | goto unregister_mdio; | |
1200 | } | |
1201 | ||
1ce8b372 | 1202 | pdata->phydev->irq = phy_irq; |
809ff97a | 1203 | pdata->phydev->is_internal = pdata->is_internal_phy; |
05b35e7e | 1204 | |
bbd9f9ee SG |
1205 | /* detect device revision as different features may be available */ |
1206 | ret = smsc95xx_read_reg(dev, ID_REV, &val); | |
e360a8b4 | 1207 | if (ret < 0) |
05b35e7e | 1208 | goto unregister_mdio; |
3ed58f96 | 1209 | |
bbd9f9ee | 1210 | val >>= 16; |
9ebca507 SG |
1211 | if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9530_) || |
1212 | (val == ID_REV_CHIP_ID_89530_) || (val == ID_REV_CHIP_ID_9730_)) | |
1213 | pdata->features = (FEATURE_8_WAKEUP_FILTERS | | |
1214 | FEATURE_PHY_NLP_CROSSOVER | | |
eb970ff0 | 1215 | FEATURE_REMOTE_WAKEUP); |
9ebca507 SG |
1216 | else if (val == ID_REV_CHIP_ID_9512_) |
1217 | pdata->features = FEATURE_8_WAKEUP_FILTERS; | |
bbd9f9ee | 1218 | |
63e77b39 | 1219 | dev->net->netdev_ops = &smsc95xx_netdev_ops; |
2f7ca802 | 1220 | dev->net->ethtool_ops = &smsc95xx_ethtool_ops; |
2f7ca802 | 1221 | dev->net->flags |= IFF_MULTICAST; |
78e47fe4 | 1222 | dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM; |
85b18b02 SW |
1223 | dev->net->min_mtu = ETH_MIN_MTU; |
1224 | dev->net->max_mtu = ETH_DATA_LEN; | |
9bbf5660 | 1225 | dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; |
a049a30f MW |
1226 | |
1227 | ret = phy_connect_direct(dev->net, pdata->phydev, | |
1228 | &smsc95xx_handle_link_change, | |
1229 | PHY_INTERFACE_MODE_MII); | |
1230 | if (ret) { | |
1231 | netdev_err(dev->net, "can't attach PHY to %s\n", pdata->mdiobus->id); | |
1232 | goto unregister_mdio; | |
1233 | } | |
1234 | ||
1235 | phy_attached_info(dev->net->phydev); | |
1236 | ||
05b35e7e | 1237 | return 0; |
d69d1694 | 1238 | |
05b35e7e AE |
1239 | unregister_mdio: |
1240 | mdiobus_unregister(pdata->mdiobus); | |
d69d1694 | 1241 | |
05b35e7e AE |
1242 | free_mdio: |
1243 | mdiobus_free(pdata->mdiobus); | |
7c8b1e85 | 1244 | |
1ce8b372 LW |
1245 | dispose_irq: |
1246 | irq_dispose_mapping(phy_irq); | |
1247 | ||
1248 | remove_irqdomain: | |
1249 | irq_domain_remove(pdata->irqdomain); | |
1250 | ||
1251 | free_irqfwnode: | |
1252 | irq_domain_free_fwnode(pdata->irqfwnode); | |
1253 | ||
7c8b1e85 AE |
1254 | free_pdata: |
1255 | kfree(pdata); | |
1256 | return ret; | |
2f7ca802 SG |
1257 | } |
1258 | ||
1259 | static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf) | |
1260 | { | |
ad90a73f AE |
1261 | struct smsc95xx_priv *pdata = dev->driver_priv; |
1262 | ||
a049a30f | 1263 | phy_disconnect(dev->net->phydev); |
05b35e7e AE |
1264 | mdiobus_unregister(pdata->mdiobus); |
1265 | mdiobus_free(pdata->mdiobus); | |
1ce8b372 LW |
1266 | irq_dispose_mapping(irq_find_mapping(pdata->irqdomain, PHY_HWIRQ)); |
1267 | irq_domain_remove(pdata->irqdomain); | |
1268 | irq_domain_free_fwnode(pdata->irqfwnode); | |
ad90a73f AE |
1269 | netif_dbg(dev, ifdown, dev->net, "free pdata\n"); |
1270 | kfree(pdata); | |
2f7ca802 SG |
1271 | } |
1272 | ||
05b35e7e AE |
1273 | static int smsc95xx_start_phy(struct usbnet *dev) |
1274 | { | |
a049a30f | 1275 | phy_start(dev->net->phydev); |
05b35e7e | 1276 | |
05b35e7e AE |
1277 | return 0; |
1278 | } | |
1279 | ||
a049a30f | 1280 | static int smsc95xx_stop(struct usbnet *dev) |
05b35e7e | 1281 | { |
d1408f6b | 1282 | phy_stop(dev->net->phydev); |
a049a30f | 1283 | |
05b35e7e AE |
1284 | return 0; |
1285 | } | |
1286 | ||
068bb1a7 | 1287 | static u32 smsc_crc(const u8 *buffer, size_t len, int filter) |
bbd9f9ee | 1288 | { |
068bb1a7 SG |
1289 | u32 crc = bitrev16(crc16(0xFFFF, buffer, len)); |
1290 | return crc << ((filter % 2) * 16); | |
bbd9f9ee SG |
1291 | } |
1292 | ||
31472429 | 1293 | static int smsc95xx_link_ok(struct usbnet *dev) |
e5e3af83 | 1294 | { |
31472429 | 1295 | struct smsc95xx_priv *pdata = dev->driver_priv; |
e5e3af83 SG |
1296 | int ret; |
1297 | ||
1298 | /* first, a dummy read, needed to latch some MII phys */ | |
31472429 | 1299 | ret = smsc95xx_mdio_read(dev, pdata->phydev->mdio.addr, MII_BMSR); |
e360a8b4 | 1300 | if (ret < 0) |
b052e073 | 1301 | return ret; |
e5e3af83 | 1302 | |
31472429 | 1303 | ret = smsc95xx_mdio_read(dev, pdata->phydev->mdio.addr, MII_BMSR); |
e360a8b4 | 1304 | if (ret < 0) |
b052e073 | 1305 | return ret; |
e5e3af83 SG |
1306 | |
1307 | return !!(ret & BMSR_LSTATUS); | |
1308 | } | |
1309 | ||
319b95b5 SG |
1310 | static int smsc95xx_enter_suspend0(struct usbnet *dev) |
1311 | { | |
ad90a73f | 1312 | struct smsc95xx_priv *pdata = dev->driver_priv; |
319b95b5 SG |
1313 | u32 val; |
1314 | int ret; | |
1315 | ||
31472429 | 1316 | ret = smsc95xx_read_reg(dev, PM_CTRL, &val); |
e360a8b4 | 1317 | if (ret < 0) |
b052e073 | 1318 | return ret; |
319b95b5 SG |
1319 | |
1320 | val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_)); | |
1321 | val |= PM_CTL_SUS_MODE_0; | |
1322 | ||
31472429 | 1323 | ret = smsc95xx_write_reg(dev, PM_CTRL, val); |
e360a8b4 | 1324 | if (ret < 0) |
b052e073 | 1325 | return ret; |
319b95b5 SG |
1326 | |
1327 | /* clear wol status */ | |
1328 | val &= ~PM_CTL_WUPS_; | |
1329 | val |= PM_CTL_WUPS_WOL_; | |
1330 | ||
1331 | /* enable energy detection */ | |
1332 | if (pdata->wolopts & WAKE_PHY) | |
1333 | val |= PM_CTL_WUPS_ED_; | |
1334 | ||
31472429 | 1335 | ret = smsc95xx_write_reg(dev, PM_CTRL, val); |
e360a8b4 | 1336 | if (ret < 0) |
b052e073 | 1337 | return ret; |
319b95b5 SG |
1338 | |
1339 | /* read back PM_CTRL */ | |
31472429 | 1340 | ret = smsc95xx_read_reg(dev, PM_CTRL, &val); |
76437214 ML |
1341 | if (ret < 0) |
1342 | return ret; | |
319b95b5 | 1343 | |
b2d4b150 SG |
1344 | pdata->suspend_flags |= SUSPEND_SUSPEND0; |
1345 | ||
76437214 | 1346 | return 0; |
319b95b5 SG |
1347 | } |
1348 | ||
1349 | static int smsc95xx_enter_suspend1(struct usbnet *dev) | |
1350 | { | |
ad90a73f | 1351 | struct smsc95xx_priv *pdata = dev->driver_priv; |
31472429 | 1352 | int ret, phy_id = pdata->phydev->mdio.addr; |
319b95b5 | 1353 | u32 val; |
319b95b5 SG |
1354 | |
1355 | /* reconfigure link pulse detection timing for | |
1356 | * compatibility with non-standard link partners | |
1357 | */ | |
1358 | if (pdata->features & FEATURE_PHY_NLP_CROSSOVER) | |
31472429 LW |
1359 | smsc95xx_mdio_write(dev, phy_id, PHY_EDPD_CONFIG, |
1360 | PHY_EDPD_CONFIG_DEFAULT); | |
319b95b5 SG |
1361 | |
1362 | /* enable energy detect power-down mode */ | |
31472429 | 1363 | ret = smsc95xx_mdio_read(dev, phy_id, PHY_MODE_CTRL_STS); |
e360a8b4 | 1364 | if (ret < 0) |
b052e073 | 1365 | return ret; |
319b95b5 SG |
1366 | |
1367 | ret |= MODE_CTRL_STS_EDPWRDOWN_; | |
1368 | ||
31472429 | 1369 | smsc95xx_mdio_write(dev, phy_id, PHY_MODE_CTRL_STS, ret); |
319b95b5 SG |
1370 | |
1371 | /* enter SUSPEND1 mode */ | |
31472429 | 1372 | ret = smsc95xx_read_reg(dev, PM_CTRL, &val); |
e360a8b4 | 1373 | if (ret < 0) |
b052e073 | 1374 | return ret; |
319b95b5 SG |
1375 | |
1376 | val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); | |
1377 | val |= PM_CTL_SUS_MODE_1; | |
1378 | ||
31472429 | 1379 | ret = smsc95xx_write_reg(dev, PM_CTRL, val); |
e360a8b4 | 1380 | if (ret < 0) |
b052e073 | 1381 | return ret; |
319b95b5 SG |
1382 | |
1383 | /* clear wol status, enable energy detection */ | |
1384 | val &= ~PM_CTL_WUPS_; | |
1385 | val |= (PM_CTL_WUPS_ED_ | PM_CTL_ED_EN_); | |
1386 | ||
31472429 | 1387 | ret = smsc95xx_write_reg(dev, PM_CTRL, val); |
76437214 ML |
1388 | if (ret < 0) |
1389 | return ret; | |
319b95b5 | 1390 | |
b2d4b150 SG |
1391 | pdata->suspend_flags |= SUSPEND_SUSPEND1; |
1392 | ||
76437214 | 1393 | return 0; |
319b95b5 SG |
1394 | } |
1395 | ||
1396 | static int smsc95xx_enter_suspend2(struct usbnet *dev) | |
1397 | { | |
ad90a73f | 1398 | struct smsc95xx_priv *pdata = dev->driver_priv; |
319b95b5 SG |
1399 | u32 val; |
1400 | int ret; | |
1401 | ||
31472429 | 1402 | ret = smsc95xx_read_reg(dev, PM_CTRL, &val); |
e360a8b4 | 1403 | if (ret < 0) |
b052e073 | 1404 | return ret; |
319b95b5 SG |
1405 | |
1406 | val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); | |
1407 | val |= PM_CTL_SUS_MODE_2; | |
1408 | ||
31472429 | 1409 | ret = smsc95xx_write_reg(dev, PM_CTRL, val); |
76437214 ML |
1410 | if (ret < 0) |
1411 | return ret; | |
319b95b5 | 1412 | |
b2d4b150 SG |
1413 | pdata->suspend_flags |= SUSPEND_SUSPEND2; |
1414 | ||
76437214 | 1415 | return 0; |
319b95b5 SG |
1416 | } |
1417 | ||
b2d4b150 SG |
1418 | static int smsc95xx_enter_suspend3(struct usbnet *dev) |
1419 | { | |
ad90a73f | 1420 | struct smsc95xx_priv *pdata = dev->driver_priv; |
b2d4b150 SG |
1421 | u32 val; |
1422 | int ret; | |
1423 | ||
31472429 | 1424 | ret = smsc95xx_read_reg(dev, RX_FIFO_INF, &val); |
b2d4b150 SG |
1425 | if (ret < 0) |
1426 | return ret; | |
1427 | ||
53a759c8 | 1428 | if (val & RX_FIFO_INF_USED_) { |
b2d4b150 SG |
1429 | netdev_info(dev->net, "rx fifo not empty in autosuspend\n"); |
1430 | return -EBUSY; | |
1431 | } | |
1432 | ||
31472429 | 1433 | ret = smsc95xx_read_reg(dev, PM_CTRL, &val); |
b2d4b150 SG |
1434 | if (ret < 0) |
1435 | return ret; | |
1436 | ||
1437 | val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); | |
1438 | val |= PM_CTL_SUS_MODE_3 | PM_CTL_RES_CLR_WKP_STS; | |
1439 | ||
31472429 | 1440 | ret = smsc95xx_write_reg(dev, PM_CTRL, val); |
b2d4b150 SG |
1441 | if (ret < 0) |
1442 | return ret; | |
1443 | ||
1444 | /* clear wol status */ | |
1445 | val &= ~PM_CTL_WUPS_; | |
1446 | val |= PM_CTL_WUPS_WOL_; | |
1447 | ||
31472429 | 1448 | ret = smsc95xx_write_reg(dev, PM_CTRL, val); |
b2d4b150 SG |
1449 | if (ret < 0) |
1450 | return ret; | |
1451 | ||
1452 | pdata->suspend_flags |= SUSPEND_SUSPEND3; | |
1453 | ||
1454 | return 0; | |
1455 | } | |
1456 | ||
1457 | static int smsc95xx_autosuspend(struct usbnet *dev, u32 link_up) | |
1458 | { | |
ad90a73f | 1459 | struct smsc95xx_priv *pdata = dev->driver_priv; |
b2d4b150 SG |
1460 | |
1461 | if (!netif_running(dev->net)) { | |
1462 | /* interface is ifconfig down so fully power down hw */ | |
1463 | netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n"); | |
1464 | return smsc95xx_enter_suspend2(dev); | |
1465 | } | |
1466 | ||
1467 | if (!link_up) { | |
1468 | /* link is down so enter EDPD mode, but only if device can | |
1469 | * reliably resume from it. This check should be redundant | |
eb970ff0 | 1470 | * as current FEATURE_REMOTE_WAKEUP parts also support |
b2d4b150 SG |
1471 | * FEATURE_PHY_NLP_CROSSOVER but it's included for clarity */ |
1472 | if (!(pdata->features & FEATURE_PHY_NLP_CROSSOVER)) { | |
1473 | netdev_warn(dev->net, "EDPD not supported\n"); | |
1474 | return -EBUSY; | |
1475 | } | |
1476 | ||
1477 | netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n"); | |
b2d4b150 SG |
1478 | netdev_info(dev->net, "entering SUSPEND1 mode\n"); |
1479 | return smsc95xx_enter_suspend1(dev); | |
1480 | } | |
1481 | ||
b2d4b150 SG |
1482 | netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n"); |
1483 | return smsc95xx_enter_suspend3(dev); | |
1484 | } | |
1485 | ||
b5a04475 SG |
1486 | static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message) |
1487 | { | |
1488 | struct usbnet *dev = usb_get_intfdata(intf); | |
ad90a73f | 1489 | struct smsc95xx_priv *pdata = dev->driver_priv; |
e5e3af83 | 1490 | u32 val, link_up; |
b5a04475 | 1491 | int ret; |
b5a04475 | 1492 | |
7b960c96 LW |
1493 | pdata->pm_task = current; |
1494 | ||
b5a04475 | 1495 | ret = usbnet_suspend(intf, message); |
b052e073 SG |
1496 | if (ret < 0) { |
1497 | netdev_warn(dev->net, "usbnet_suspend error\n"); | |
7b960c96 | 1498 | pdata->pm_task = NULL; |
b052e073 SG |
1499 | return ret; |
1500 | } | |
b5a04475 | 1501 | |
b2d4b150 SG |
1502 | if (pdata->suspend_flags) { |
1503 | netdev_warn(dev->net, "error during last resume\n"); | |
1504 | pdata->suspend_flags = 0; | |
1505 | } | |
1506 | ||
31472429 | 1507 | link_up = smsc95xx_link_ok(dev); |
e5e3af83 | 1508 | |
42e21c01 | 1509 | if (message.event == PM_EVENT_AUTO_SUSPEND && |
eb970ff0 | 1510 | (pdata->features & FEATURE_REMOTE_WAKEUP)) { |
b2d4b150 SG |
1511 | ret = smsc95xx_autosuspend(dev, link_up); |
1512 | goto done; | |
1513 | } | |
1514 | ||
1515 | /* if we get this far we're not autosuspending */ | |
e5e3af83 SG |
1516 | /* if no wol options set, or if link is down and we're not waking on |
1517 | * PHY activity, enter lowest power SUSPEND2 mode | |
1518 | */ | |
1519 | if (!(pdata->wolopts & SUPPORTED_WAKE) || | |
1520 | !(link_up || (pdata->wolopts & WAKE_PHY))) { | |
1e1d7412 | 1521 | netdev_info(dev->net, "entering SUSPEND2 mode\n"); |
e0e474a8 SG |
1522 | |
1523 | /* disable energy detect (link up) & wake up events */ | |
31472429 | 1524 | ret = smsc95xx_read_reg(dev, WUCSR, &val); |
e360a8b4 | 1525 | if (ret < 0) |
b052e073 | 1526 | goto done; |
e0e474a8 SG |
1527 | |
1528 | val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_); | |
1529 | ||
31472429 | 1530 | ret = smsc95xx_write_reg(dev, WUCSR, val); |
e360a8b4 | 1531 | if (ret < 0) |
b052e073 | 1532 | goto done; |
e0e474a8 | 1533 | |
31472429 | 1534 | ret = smsc95xx_read_reg(dev, PM_CTRL, &val); |
e360a8b4 | 1535 | if (ret < 0) |
b052e073 | 1536 | goto done; |
e0e474a8 SG |
1537 | |
1538 | val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_); | |
1539 | ||
31472429 | 1540 | ret = smsc95xx_write_reg(dev, PM_CTRL, val); |
e360a8b4 | 1541 | if (ret < 0) |
b052e073 | 1542 | goto done; |
e0e474a8 | 1543 | |
3b9f7d8c SG |
1544 | ret = smsc95xx_enter_suspend2(dev); |
1545 | goto done; | |
e0e474a8 SG |
1546 | } |
1547 | ||
e5e3af83 | 1548 | if (pdata->wolopts & WAKE_PHY) { |
e5e3af83 SG |
1549 | /* if link is down then configure EDPD and enter SUSPEND1, |
1550 | * otherwise enter SUSPEND0 below | |
1551 | */ | |
1552 | if (!link_up) { | |
1e1d7412 | 1553 | netdev_info(dev->net, "entering SUSPEND1 mode\n"); |
3b9f7d8c SG |
1554 | ret = smsc95xx_enter_suspend1(dev); |
1555 | goto done; | |
e5e3af83 SG |
1556 | } |
1557 | } | |
1558 | ||
bbd9f9ee | 1559 | if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) { |
6396bb22 | 1560 | u32 *filter_mask = kcalloc(32, sizeof(u32), GFP_KERNEL); |
06a221be ML |
1561 | u32 command[2]; |
1562 | u32 offset[2]; | |
1563 | u32 crc[4]; | |
9ebca507 SG |
1564 | int wuff_filter_count = |
1565 | (pdata->features & FEATURE_8_WAKEUP_FILTERS) ? | |
1566 | LAN9500A_WUFF_NUM : LAN9500_WUFF_NUM; | |
bbd9f9ee SG |
1567 | int i, filter = 0; |
1568 | ||
eed9a729 SG |
1569 | if (!filter_mask) { |
1570 | netdev_warn(dev->net, "Unable to allocate filter_mask\n"); | |
3b9f7d8c SG |
1571 | ret = -ENOMEM; |
1572 | goto done; | |
eed9a729 SG |
1573 | } |
1574 | ||
06a221be ML |
1575 | memset(command, 0, sizeof(command)); |
1576 | memset(offset, 0, sizeof(offset)); | |
1577 | memset(crc, 0, sizeof(crc)); | |
1578 | ||
bbd9f9ee SG |
1579 | if (pdata->wolopts & WAKE_BCAST) { |
1580 | const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}; | |
1e1d7412 | 1581 | netdev_info(dev->net, "enabling broadcast detection\n"); |
bbd9f9ee SG |
1582 | filter_mask[filter * 4] = 0x003F; |
1583 | filter_mask[filter * 4 + 1] = 0x00; | |
1584 | filter_mask[filter * 4 + 2] = 0x00; | |
1585 | filter_mask[filter * 4 + 3] = 0x00; | |
1586 | command[filter/4] |= 0x05UL << ((filter % 4) * 8); | |
1587 | offset[filter/4] |= 0x00 << ((filter % 4) * 8); | |
1588 | crc[filter/2] |= smsc_crc(bcast, 6, filter); | |
1589 | filter++; | |
1590 | } | |
1591 | ||
1592 | if (pdata->wolopts & WAKE_MCAST) { | |
1593 | const u8 mcast[] = {0x01, 0x00, 0x5E}; | |
1e1d7412 | 1594 | netdev_info(dev->net, "enabling multicast detection\n"); |
bbd9f9ee SG |
1595 | filter_mask[filter * 4] = 0x0007; |
1596 | filter_mask[filter * 4 + 1] = 0x00; | |
1597 | filter_mask[filter * 4 + 2] = 0x00; | |
1598 | filter_mask[filter * 4 + 3] = 0x00; | |
1599 | command[filter/4] |= 0x09UL << ((filter % 4) * 8); | |
1600 | offset[filter/4] |= 0x00 << ((filter % 4) * 8); | |
1601 | crc[filter/2] |= smsc_crc(mcast, 3, filter); | |
1602 | filter++; | |
1603 | } | |
1604 | ||
1605 | if (pdata->wolopts & WAKE_ARP) { | |
1606 | const u8 arp[] = {0x08, 0x06}; | |
1e1d7412 | 1607 | netdev_info(dev->net, "enabling ARP detection\n"); |
bbd9f9ee SG |
1608 | filter_mask[filter * 4] = 0x0003; |
1609 | filter_mask[filter * 4 + 1] = 0x00; | |
1610 | filter_mask[filter * 4 + 2] = 0x00; | |
1611 | filter_mask[filter * 4 + 3] = 0x00; | |
1612 | command[filter/4] |= 0x05UL << ((filter % 4) * 8); | |
1613 | offset[filter/4] |= 0x0C << ((filter % 4) * 8); | |
1614 | crc[filter/2] |= smsc_crc(arp, 2, filter); | |
1615 | filter++; | |
1616 | } | |
1617 | ||
1618 | if (pdata->wolopts & WAKE_UCAST) { | |
1e1d7412 | 1619 | netdev_info(dev->net, "enabling unicast detection\n"); |
bbd9f9ee SG |
1620 | filter_mask[filter * 4] = 0x003F; |
1621 | filter_mask[filter * 4 + 1] = 0x00; | |
1622 | filter_mask[filter * 4 + 2] = 0x00; | |
1623 | filter_mask[filter * 4 + 3] = 0x00; | |
1624 | command[filter/4] |= 0x01UL << ((filter % 4) * 8); | |
1625 | offset[filter/4] |= 0x00 << ((filter % 4) * 8); | |
1626 | crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter); | |
1627 | filter++; | |
1628 | } | |
1629 | ||
9ebca507 | 1630 | for (i = 0; i < (wuff_filter_count * 4); i++) { |
31472429 | 1631 | ret = smsc95xx_write_reg(dev, WUFF, filter_mask[i]); |
b052e073 | 1632 | if (ret < 0) { |
06a221be | 1633 | kfree(filter_mask); |
b052e073 SG |
1634 | goto done; |
1635 | } | |
bbd9f9ee | 1636 | } |
06a221be | 1637 | kfree(filter_mask); |
bbd9f9ee | 1638 | |
9ebca507 | 1639 | for (i = 0; i < (wuff_filter_count / 4); i++) { |
31472429 | 1640 | ret = smsc95xx_write_reg(dev, WUFF, command[i]); |
e360a8b4 | 1641 | if (ret < 0) |
b052e073 | 1642 | goto done; |
bbd9f9ee SG |
1643 | } |
1644 | ||
9ebca507 | 1645 | for (i = 0; i < (wuff_filter_count / 4); i++) { |
31472429 | 1646 | ret = smsc95xx_write_reg(dev, WUFF, offset[i]); |
e360a8b4 | 1647 | if (ret < 0) |
b052e073 | 1648 | goto done; |
bbd9f9ee SG |
1649 | } |
1650 | ||
9ebca507 | 1651 | for (i = 0; i < (wuff_filter_count / 2); i++) { |
31472429 | 1652 | ret = smsc95xx_write_reg(dev, WUFF, crc[i]); |
e360a8b4 | 1653 | if (ret < 0) |
b052e073 | 1654 | goto done; |
bbd9f9ee SG |
1655 | } |
1656 | ||
1657 | /* clear any pending pattern match packet status */ | |
31472429 | 1658 | ret = smsc95xx_read_reg(dev, WUCSR, &val); |
e360a8b4 | 1659 | if (ret < 0) |
b052e073 | 1660 | goto done; |
bbd9f9ee SG |
1661 | |
1662 | val |= WUCSR_WUFR_; | |
1663 | ||
31472429 | 1664 | ret = smsc95xx_write_reg(dev, WUCSR, val); |
e360a8b4 | 1665 | if (ret < 0) |
b052e073 | 1666 | goto done; |
bbd9f9ee SG |
1667 | } |
1668 | ||
e0e474a8 SG |
1669 | if (pdata->wolopts & WAKE_MAGIC) { |
1670 | /* clear any pending magic packet status */ | |
31472429 | 1671 | ret = smsc95xx_read_reg(dev, WUCSR, &val); |
e360a8b4 | 1672 | if (ret < 0) |
b052e073 | 1673 | goto done; |
e0e474a8 SG |
1674 | |
1675 | val |= WUCSR_MPR_; | |
1676 | ||
31472429 | 1677 | ret = smsc95xx_write_reg(dev, WUCSR, val); |
e360a8b4 | 1678 | if (ret < 0) |
b052e073 | 1679 | goto done; |
e0e474a8 SG |
1680 | } |
1681 | ||
bbd9f9ee | 1682 | /* enable/disable wakeup sources */ |
31472429 | 1683 | ret = smsc95xx_read_reg(dev, WUCSR, &val); |
e360a8b4 | 1684 | if (ret < 0) |
b052e073 | 1685 | goto done; |
e0e474a8 | 1686 | |
bbd9f9ee | 1687 | if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) { |
1e1d7412 | 1688 | netdev_info(dev->net, "enabling pattern match wakeup\n"); |
bbd9f9ee SG |
1689 | val |= WUCSR_WAKE_EN_; |
1690 | } else { | |
1e1d7412 | 1691 | netdev_info(dev->net, "disabling pattern match wakeup\n"); |
bbd9f9ee SG |
1692 | val &= ~WUCSR_WAKE_EN_; |
1693 | } | |
1694 | ||
e0e474a8 | 1695 | if (pdata->wolopts & WAKE_MAGIC) { |
1e1d7412 | 1696 | netdev_info(dev->net, "enabling magic packet wakeup\n"); |
e0e474a8 SG |
1697 | val |= WUCSR_MPEN_; |
1698 | } else { | |
1e1d7412 | 1699 | netdev_info(dev->net, "disabling magic packet wakeup\n"); |
e0e474a8 SG |
1700 | val &= ~WUCSR_MPEN_; |
1701 | } | |
1702 | ||
31472429 | 1703 | ret = smsc95xx_write_reg(dev, WUCSR, val); |
e360a8b4 | 1704 | if (ret < 0) |
b052e073 | 1705 | goto done; |
e0e474a8 SG |
1706 | |
1707 | /* enable wol wakeup source */ | |
31472429 | 1708 | ret = smsc95xx_read_reg(dev, PM_CTRL, &val); |
e360a8b4 | 1709 | if (ret < 0) |
b052e073 | 1710 | goto done; |
e0e474a8 SG |
1711 | |
1712 | val |= PM_CTL_WOL_EN_; | |
1713 | ||
e5e3af83 SG |
1714 | /* phy energy detect wakeup source */ |
1715 | if (pdata->wolopts & WAKE_PHY) | |
1716 | val |= PM_CTL_ED_EN_; | |
1717 | ||
31472429 | 1718 | ret = smsc95xx_write_reg(dev, PM_CTRL, val); |
e360a8b4 | 1719 | if (ret < 0) |
b052e073 | 1720 | goto done; |
e0e474a8 | 1721 | |
bbd9f9ee | 1722 | /* enable receiver to enable frame reception */ |
31472429 | 1723 | smsc95xx_start_rx_path(dev); |
e0e474a8 SG |
1724 | |
1725 | /* some wol options are enabled, so enter SUSPEND0 */ | |
1e1d7412 | 1726 | netdev_info(dev->net, "entering SUSPEND0 mode\n"); |
3b9f7d8c SG |
1727 | ret = smsc95xx_enter_suspend0(dev); |
1728 | ||
1729 | done: | |
0d41be53 ML |
1730 | /* |
1731 | * TODO: resume() might need to handle the suspend failure | |
1732 | * in system sleep | |
1733 | */ | |
1734 | if (ret && PMSG_IS_AUTO(message)) | |
3b9f7d8c | 1735 | usbnet_resume(intf); |
7b900ead | 1736 | |
7b960c96 | 1737 | pdata->pm_task = NULL; |
3b9f7d8c | 1738 | return ret; |
e0e474a8 SG |
1739 | } |
1740 | ||
1741 | static int smsc95xx_resume(struct usb_interface *intf) | |
1742 | { | |
1743 | struct usbnet *dev = usb_get_intfdata(intf); | |
8bca81d9 SM |
1744 | struct smsc95xx_priv *pdata; |
1745 | u8 suspend_flags; | |
e0e474a8 SG |
1746 | int ret; |
1747 | u32 val; | |
1748 | ||
1749 | BUG_ON(!dev); | |
ad90a73f | 1750 | pdata = dev->driver_priv; |
8bca81d9 | 1751 | suspend_flags = pdata->suspend_flags; |
e0e474a8 | 1752 | |
b2d4b150 SG |
1753 | netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags); |
1754 | ||
1755 | /* do this first to ensure it's cleared even in error case */ | |
1756 | pdata->suspend_flags = 0; | |
1757 | ||
7b960c96 LW |
1758 | pdata->pm_task = current; |
1759 | ||
b2d4b150 | 1760 | if (suspend_flags & SUSPEND_ALLMODES) { |
bbd9f9ee | 1761 | /* clear wake-up sources */ |
31472429 | 1762 | ret = smsc95xx_read_reg(dev, WUCSR, &val); |
e360a8b4 | 1763 | if (ret < 0) |
7b960c96 | 1764 | goto done; |
e0e474a8 | 1765 | |
bbd9f9ee | 1766 | val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_); |
e0e474a8 | 1767 | |
31472429 | 1768 | ret = smsc95xx_write_reg(dev, WUCSR, val); |
e360a8b4 | 1769 | if (ret < 0) |
7b960c96 | 1770 | goto done; |
e0e474a8 SG |
1771 | |
1772 | /* clear wake-up status */ | |
31472429 | 1773 | ret = smsc95xx_read_reg(dev, PM_CTRL, &val); |
e360a8b4 | 1774 | if (ret < 0) |
7b960c96 | 1775 | goto done; |
e0e474a8 SG |
1776 | |
1777 | val &= ~PM_CTL_WOL_EN_; | |
1778 | val |= PM_CTL_WUPS_; | |
1779 | ||
31472429 | 1780 | ret = smsc95xx_write_reg(dev, PM_CTRL, val); |
e360a8b4 | 1781 | if (ret < 0) |
7b960c96 | 1782 | goto done; |
e0e474a8 SG |
1783 | } |
1784 | ||
1ce8b372 LW |
1785 | phy_init_hw(pdata->phydev); |
1786 | ||
af3d7c1e | 1787 | ret = usbnet_resume(intf); |
b052e073 SG |
1788 | if (ret < 0) |
1789 | netdev_warn(dev->net, "usbnet_resume error\n"); | |
e0e474a8 | 1790 | |
7b960c96 LW |
1791 | done: |
1792 | pdata->pm_task = NULL; | |
b052e073 | 1793 | return ret; |
b5a04475 SG |
1794 | } |
1795 | ||
b4df480f JS |
1796 | static int smsc95xx_reset_resume(struct usb_interface *intf) |
1797 | { | |
1798 | struct usbnet *dev = usb_get_intfdata(intf); | |
7b960c96 | 1799 | struct smsc95xx_priv *pdata = dev->driver_priv; |
b4df480f JS |
1800 | int ret; |
1801 | ||
7b960c96 | 1802 | pdata->pm_task = current; |
b4df480f | 1803 | ret = smsc95xx_reset(dev); |
7b960c96 | 1804 | pdata->pm_task = NULL; |
b4df480f JS |
1805 | if (ret < 0) |
1806 | return ret; | |
1807 | ||
1808 | return smsc95xx_resume(intf); | |
1809 | } | |
1810 | ||
2f7ca802 SG |
1811 | static void smsc95xx_rx_csum_offload(struct sk_buff *skb) |
1812 | { | |
1813 | skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2); | |
1814 | skb->ip_summed = CHECKSUM_COMPLETE; | |
1815 | skb_trim(skb, skb->len - 2); | |
1816 | } | |
1817 | ||
1818 | static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) | |
1819 | { | |
eb85569f EG |
1820 | /* This check is no longer done by usbnet */ |
1821 | if (skb->len < dev->net->hard_header_len) | |
1822 | return 0; | |
1823 | ||
2f7ca802 SG |
1824 | while (skb->len > 0) { |
1825 | u32 header, align_count; | |
1826 | struct sk_buff *ax_skb; | |
1827 | unsigned char *packet; | |
1828 | u16 size; | |
1829 | ||
6809d216 | 1830 | header = get_unaligned_le32(skb->data); |
2f7ca802 SG |
1831 | skb_pull(skb, 4 + NET_IP_ALIGN); |
1832 | packet = skb->data; | |
1833 | ||
1834 | /* get the packet length */ | |
1835 | size = (u16)((header & RX_STS_FL_) >> 16); | |
1836 | align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4; | |
1837 | ||
ff821092 SH |
1838 | if (unlikely(size > skb->len)) { |
1839 | netif_dbg(dev, rx_err, dev->net, | |
1840 | "size err header=0x%08x\n", header); | |
1841 | return 0; | |
1842 | } | |
1843 | ||
2f7ca802 | 1844 | if (unlikely(header & RX_STS_ES_)) { |
a475f603 JP |
1845 | netif_dbg(dev, rx_err, dev->net, |
1846 | "Error header=0x%08x\n", header); | |
80667ac1 HX |
1847 | dev->net->stats.rx_errors++; |
1848 | dev->net->stats.rx_dropped++; | |
2f7ca802 SG |
1849 | |
1850 | if (header & RX_STS_CRC_) { | |
80667ac1 | 1851 | dev->net->stats.rx_crc_errors++; |
2f7ca802 SG |
1852 | } else { |
1853 | if (header & (RX_STS_TL_ | RX_STS_RF_)) | |
80667ac1 | 1854 | dev->net->stats.rx_frame_errors++; |
2f7ca802 SG |
1855 | |
1856 | if ((header & RX_STS_LE_) && | |
1857 | (!(header & RX_STS_FT_))) | |
80667ac1 | 1858 | dev->net->stats.rx_length_errors++; |
2f7ca802 SG |
1859 | } |
1860 | } else { | |
1861 | /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */ | |
1862 | if (unlikely(size > (ETH_FRAME_LEN + 12))) { | |
a475f603 JP |
1863 | netif_dbg(dev, rx_err, dev->net, |
1864 | "size err header=0x%08x\n", header); | |
2f7ca802 SG |
1865 | return 0; |
1866 | } | |
1867 | ||
1868 | /* last frame in this batch */ | |
1869 | if (skb->len == size) { | |
78e47fe4 | 1870 | if (dev->net->features & NETIF_F_RXCSUM) |
2f7ca802 | 1871 | smsc95xx_rx_csum_offload(skb); |
df18acca | 1872 | skb_trim(skb, skb->len - 4); /* remove fcs */ |
2f7ca802 SG |
1873 | skb->truesize = size + sizeof(struct sk_buff); |
1874 | ||
1875 | return 1; | |
1876 | } | |
1877 | ||
1878 | ax_skb = skb_clone(skb, GFP_ATOMIC); | |
1879 | if (unlikely(!ax_skb)) { | |
60b86755 | 1880 | netdev_warn(dev->net, "Error allocating skb\n"); |
2f7ca802 SG |
1881 | return 0; |
1882 | } | |
1883 | ||
1884 | ax_skb->len = size; | |
1885 | ax_skb->data = packet; | |
1886 | skb_set_tail_pointer(ax_skb, size); | |
1887 | ||
78e47fe4 | 1888 | if (dev->net->features & NETIF_F_RXCSUM) |
2f7ca802 | 1889 | smsc95xx_rx_csum_offload(ax_skb); |
df18acca | 1890 | skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ |
2f7ca802 SG |
1891 | ax_skb->truesize = size + sizeof(struct sk_buff); |
1892 | ||
1893 | usbnet_skb_return(dev, ax_skb); | |
1894 | } | |
1895 | ||
1896 | skb_pull(skb, size); | |
1897 | ||
1898 | /* padding bytes before the next frame starts */ | |
1899 | if (skb->len) | |
1900 | skb_pull(skb, align_count); | |
1901 | } | |
1902 | ||
2f7ca802 SG |
1903 | return 1; |
1904 | } | |
1905 | ||
f7b29271 SG |
1906 | static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb) |
1907 | { | |
55508d60 MM |
1908 | u16 low_16 = (u16)skb_checksum_start_offset(skb); |
1909 | u16 high_16 = low_16 + skb->csum_offset; | |
f7b29271 SG |
1910 | return (high_16 << 16) | low_16; |
1911 | } | |
1912 | ||
75938f77 BD |
1913 | /* The TX CSUM won't work if the checksum lies in the last 4 bytes of the |
1914 | * transmission. This is fairly unlikely, only seems to trigger with some | |
1915 | * short TCP ACK packets sent. | |
1916 | * | |
1917 | * Note, this calculation should probably check for the alignment of the | |
1918 | * data as well, but a straight check for csum being in the last four bytes | |
1919 | * of the packet should be ok for now. | |
1920 | */ | |
1921 | static bool smsc95xx_can_tx_checksum(struct sk_buff *skb) | |
1922 | { | |
1923 | unsigned int len = skb->len - skb_checksum_start_offset(skb); | |
1924 | ||
1925 | if (skb->len <= 45) | |
1926 | return false; | |
1927 | return skb->csum_offset < (len - (4 + 1)); | |
1928 | } | |
1929 | ||
2f7ca802 SG |
1930 | static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev, |
1931 | struct sk_buff *skb, gfp_t flags) | |
1932 | { | |
78e47fe4 | 1933 | bool csum = skb->ip_summed == CHECKSUM_PARTIAL; |
f7b29271 | 1934 | int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD; |
2f7ca802 | 1935 | u32 tx_cmd_a, tx_cmd_b; |
0c8b2655 | 1936 | void *ptr; |
2f7ca802 | 1937 | |
f7b29271 SG |
1938 | /* We do not advertise SG, so skbs should be already linearized */ |
1939 | BUG_ON(skb_shinfo(skb)->nr_frags); | |
1940 | ||
e9156cd2 JH |
1941 | /* Make writable and expand header space by overhead if required */ |
1942 | if (skb_cow_head(skb, overhead)) { | |
1943 | /* Must deallocate here as returning NULL to indicate error | |
1944 | * means the skb won't be deallocated in the caller. | |
1945 | */ | |
2f7ca802 | 1946 | dev_kfree_skb_any(skb); |
e9156cd2 | 1947 | return NULL; |
2f7ca802 SG |
1948 | } |
1949 | ||
0c8b2655 BD |
1950 | tx_cmd_b = (u32)skb->len; |
1951 | tx_cmd_a = tx_cmd_b | TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_; | |
1952 | ||
f7b29271 | 1953 | if (csum) { |
75938f77 | 1954 | if (!smsc95xx_can_tx_checksum(skb)) { |
11bc3088 SG |
1955 | /* workaround - hardware tx checksum does not work |
1956 | * properly with extremely small packets */ | |
55508d60 | 1957 | long csstart = skb_checksum_start_offset(skb); |
11bc3088 SG |
1958 | __wsum calc = csum_partial(skb->data + csstart, |
1959 | skb->len - csstart, 0); | |
1960 | *((__sum16 *)(skb->data + csstart | |
1961 | + skb->csum_offset)) = csum_fold(calc); | |
1962 | ||
1963 | csum = false; | |
1964 | } else { | |
1965 | u32 csum_preamble = smsc95xx_calc_csum_preamble(skb); | |
0c8b2655 BD |
1966 | ptr = skb_push(skb, 4); |
1967 | put_unaligned_le32(csum_preamble, ptr); | |
1968 | ||
1969 | tx_cmd_a += 4; | |
1970 | tx_cmd_b += 4; | |
1971 | tx_cmd_b |= TX_CMD_B_CSUM_ENABLE; | |
11bc3088 | 1972 | } |
f7b29271 SG |
1973 | } |
1974 | ||
0c8b2655 BD |
1975 | ptr = skb_push(skb, 8); |
1976 | put_unaligned_le32(tx_cmd_a, ptr); | |
1977 | put_unaligned_le32(tx_cmd_b, ptr+4); | |
2f7ca802 SG |
1978 | |
1979 | return skb; | |
1980 | } | |
1981 | ||
b2d4b150 SG |
1982 | static int smsc95xx_manage_power(struct usbnet *dev, int on) |
1983 | { | |
ad90a73f | 1984 | struct smsc95xx_priv *pdata = dev->driver_priv; |
b2d4b150 SG |
1985 | |
1986 | dev->intf->needs_remote_wakeup = on; | |
1987 | ||
eb970ff0 | 1988 | if (pdata->features & FEATURE_REMOTE_WAKEUP) |
b2d4b150 SG |
1989 | return 0; |
1990 | ||
eb970ff0 ML |
1991 | /* this chip revision isn't capable of remote wakeup */ |
1992 | netdev_info(dev->net, "hardware isn't capable of remote wakeup\n"); | |
b2d4b150 SG |
1993 | |
1994 | if (on) | |
1995 | usb_autopm_get_interface_no_resume(dev->intf); | |
1996 | else | |
1997 | usb_autopm_put_interface(dev->intf); | |
1998 | ||
1999 | return 0; | |
2000 | } | |
2001 | ||
2f7ca802 SG |
2002 | static const struct driver_info smsc95xx_info = { |
2003 | .description = "smsc95xx USB 2.0 Ethernet", | |
2004 | .bind = smsc95xx_bind, | |
2005 | .unbind = smsc95xx_unbind, | |
0bf38853 MR |
2006 | .reset = smsc95xx_reset, |
2007 | .check_connect = smsc95xx_start_phy, | |
a049a30f | 2008 | .stop = smsc95xx_stop, |
2f7ca802 SG |
2009 | .rx_fixup = smsc95xx_rx_fixup, |
2010 | .tx_fixup = smsc95xx_tx_fixup, | |
2011 | .status = smsc95xx_status, | |
b2d4b150 | 2012 | .manage_power = smsc95xx_manage_power, |
07d69d42 | 2013 | .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR, |
2f7ca802 SG |
2014 | }; |
2015 | ||
2016 | static const struct usb_device_id products[] = { | |
2017 | { | |
2018 | /* SMSC9500 USB Ethernet Device */ | |
2019 | USB_DEVICE(0x0424, 0x9500), | |
2020 | .driver_info = (unsigned long) &smsc95xx_info, | |
2021 | }, | |
6f41d12b SG |
2022 | { |
2023 | /* SMSC9505 USB Ethernet Device */ | |
2024 | USB_DEVICE(0x0424, 0x9505), | |
2025 | .driver_info = (unsigned long) &smsc95xx_info, | |
2026 | }, | |
2027 | { | |
2028 | /* SMSC9500A USB Ethernet Device */ | |
2029 | USB_DEVICE(0x0424, 0x9E00), | |
2030 | .driver_info = (unsigned long) &smsc95xx_info, | |
2031 | }, | |
2032 | { | |
2033 | /* SMSC9505A USB Ethernet Device */ | |
2034 | USB_DEVICE(0x0424, 0x9E01), | |
2035 | .driver_info = (unsigned long) &smsc95xx_info, | |
2036 | }, | |
726474b8 SG |
2037 | { |
2038 | /* SMSC9512/9514 USB Hub & Ethernet Device */ | |
2039 | USB_DEVICE(0x0424, 0xec00), | |
2040 | .driver_info = (unsigned long) &smsc95xx_info, | |
2041 | }, | |
6f41d12b SG |
2042 | { |
2043 | /* SMSC9500 USB Ethernet Device (SAL10) */ | |
2044 | USB_DEVICE(0x0424, 0x9900), | |
2045 | .driver_info = (unsigned long) &smsc95xx_info, | |
2046 | }, | |
2047 | { | |
2048 | /* SMSC9505 USB Ethernet Device (SAL10) */ | |
2049 | USB_DEVICE(0x0424, 0x9901), | |
2050 | .driver_info = (unsigned long) &smsc95xx_info, | |
2051 | }, | |
2052 | { | |
2053 | /* SMSC9500A USB Ethernet Device (SAL10) */ | |
2054 | USB_DEVICE(0x0424, 0x9902), | |
2055 | .driver_info = (unsigned long) &smsc95xx_info, | |
2056 | }, | |
2057 | { | |
2058 | /* SMSC9505A USB Ethernet Device (SAL10) */ | |
2059 | USB_DEVICE(0x0424, 0x9903), | |
2060 | .driver_info = (unsigned long) &smsc95xx_info, | |
2061 | }, | |
2062 | { | |
2063 | /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */ | |
2064 | USB_DEVICE(0x0424, 0x9904), | |
2065 | .driver_info = (unsigned long) &smsc95xx_info, | |
2066 | }, | |
2067 | { | |
2068 | /* SMSC9500A USB Ethernet Device (HAL) */ | |
2069 | USB_DEVICE(0x0424, 0x9905), | |
2070 | .driver_info = (unsigned long) &smsc95xx_info, | |
2071 | }, | |
2072 | { | |
2073 | /* SMSC9505A USB Ethernet Device (HAL) */ | |
2074 | USB_DEVICE(0x0424, 0x9906), | |
2075 | .driver_info = (unsigned long) &smsc95xx_info, | |
2076 | }, | |
2077 | { | |
2078 | /* SMSC9500 USB Ethernet Device (Alternate ID) */ | |
2079 | USB_DEVICE(0x0424, 0x9907), | |
2080 | .driver_info = (unsigned long) &smsc95xx_info, | |
2081 | }, | |
2082 | { | |
2083 | /* SMSC9500A USB Ethernet Device (Alternate ID) */ | |
2084 | USB_DEVICE(0x0424, 0x9908), | |
2085 | .driver_info = (unsigned long) &smsc95xx_info, | |
2086 | }, | |
2087 | { | |
2088 | /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */ | |
2089 | USB_DEVICE(0x0424, 0x9909), | |
2090 | .driver_info = (unsigned long) &smsc95xx_info, | |
2091 | }, | |
88edaa41 SG |
2092 | { |
2093 | /* SMSC LAN9530 USB Ethernet Device */ | |
2094 | USB_DEVICE(0x0424, 0x9530), | |
2095 | .driver_info = (unsigned long) &smsc95xx_info, | |
2096 | }, | |
2097 | { | |
2098 | /* SMSC LAN9730 USB Ethernet Device */ | |
2099 | USB_DEVICE(0x0424, 0x9730), | |
2100 | .driver_info = (unsigned long) &smsc95xx_info, | |
2101 | }, | |
2102 | { | |
2103 | /* SMSC LAN89530 USB Ethernet Device */ | |
2104 | USB_DEVICE(0x0424, 0x9E08), | |
2105 | .driver_info = (unsigned long) &smsc95xx_info, | |
2106 | }, | |
4066bf4c PV |
2107 | { |
2108 | /* Microchip's EVB-LAN8670-USB 10BASE-T1S Ethernet Device */ | |
2109 | USB_DEVICE(0x184F, 0x0051), | |
2110 | .driver_info = (unsigned long)&smsc95xx_info, | |
2111 | }, | |
2f7ca802 SG |
2112 | { }, /* END */ |
2113 | }; | |
2114 | MODULE_DEVICE_TABLE(usb, products); | |
2115 | ||
2116 | static struct usb_driver smsc95xx_driver = { | |
2117 | .name = "smsc95xx", | |
2118 | .id_table = products, | |
2119 | .probe = usbnet_probe, | |
b5a04475 | 2120 | .suspend = smsc95xx_suspend, |
e0e474a8 | 2121 | .resume = smsc95xx_resume, |
b4df480f | 2122 | .reset_resume = smsc95xx_reset_resume, |
2f7ca802 | 2123 | .disconnect = usbnet_disconnect, |
e1f12eb6 | 2124 | .disable_hub_initiated_lpm = 1, |
b2d4b150 | 2125 | .supports_autosuspend = 1, |
2f7ca802 SG |
2126 | }; |
2127 | ||
d632eb1b | 2128 | module_usb_driver(smsc95xx_driver); |
2f7ca802 SG |
2129 | |
2130 | MODULE_AUTHOR("Nancy Lin"); | |
90b24cfb | 2131 | MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>"); |
2f7ca802 SG |
2132 | MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices"); |
2133 | MODULE_LICENSE("GPL"); |