lan78xx: Check for supported Wake-on-LAN modes
[linux-2.6-block.git] / drivers / net / usb / lan78xx.c
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1/*
2 * Copyright (C) 2015 Microchip Technology
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
16 */
17#include <linux/version.h>
18#include <linux/module.h>
19#include <linux/netdevice.h>
20#include <linux/etherdevice.h>
21#include <linux/ethtool.h>
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22#include <linux/usb.h>
23#include <linux/crc32.h>
24#include <linux/signal.h>
25#include <linux/slab.h>
26#include <linux/if_vlan.h>
27#include <linux/uaccess.h>
28#include <linux/list.h>
29#include <linux/ip.h>
30#include <linux/ipv6.h>
31#include <linux/mdio.h>
c6e970a0 32#include <linux/phy.h>
55d7de9d 33#include <net/ip6_checksum.h>
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34#include <linux/interrupt.h>
35#include <linux/irqdomain.h>
36#include <linux/irq.h>
37#include <linux/irqchip/chained_irq.h>
bdfba55e 38#include <linux/microchipphy.h>
89b36fb5 39#include <linux/phy_fixed.h>
1827b067 40#include <linux/of_mdio.h>
760db29b 41#include <linux/of_net.h>
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42#include "lan78xx.h"
43
44#define DRIVER_AUTHOR "WOOJUNG HUH <woojung.huh@microchip.com>"
45#define DRIVER_DESC "LAN78XX USB 3.0 Gigabit Ethernet Devices"
46#define DRIVER_NAME "lan78xx"
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47
48#define TX_TIMEOUT_JIFFIES (5 * HZ)
49#define THROTTLE_JIFFIES (HZ / 8)
50#define UNLINK_TIMEOUT_MS 3
51
52#define RX_MAX_QUEUE_MEMORY (60 * 1518)
53
54#define SS_USB_PKT_SIZE (1024)
55#define HS_USB_PKT_SIZE (512)
56#define FS_USB_PKT_SIZE (64)
57
58#define MAX_RX_FIFO_SIZE (12 * 1024)
59#define MAX_TX_FIFO_SIZE (12 * 1024)
60#define DEFAULT_BURST_CAP_SIZE (MAX_TX_FIFO_SIZE)
61#define DEFAULT_BULK_IN_DELAY (0x0800)
62#define MAX_SINGLE_PACKET_SIZE (9000)
63#define DEFAULT_TX_CSUM_ENABLE (true)
64#define DEFAULT_RX_CSUM_ENABLE (true)
65#define DEFAULT_TSO_CSUM_ENABLE (true)
66#define DEFAULT_VLAN_FILTER_ENABLE (true)
ec21ecf0 67#define DEFAULT_VLAN_RX_OFFLOAD (true)
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68#define TX_OVERHEAD (8)
69#define RXW_PADDING 2
70
71#define LAN78XX_USB_VENDOR_ID (0x0424)
72#define LAN7800_USB_PRODUCT_ID (0x7800)
73#define LAN7850_USB_PRODUCT_ID (0x7850)
02dc1f3d 74#define LAN7801_USB_PRODUCT_ID (0x7801)
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75#define LAN78XX_EEPROM_MAGIC (0x78A5)
76#define LAN78XX_OTP_MAGIC (0x78F3)
77
78#define MII_READ 1
79#define MII_WRITE 0
80
81#define EEPROM_INDICATOR (0xA5)
82#define EEPROM_MAC_OFFSET (0x01)
83#define MAX_EEPROM_SIZE 512
84#define OTP_INDICATOR_1 (0xF3)
85#define OTP_INDICATOR_2 (0xF7)
86
87#define WAKE_ALL (WAKE_PHY | WAKE_UCAST | \
88 WAKE_MCAST | WAKE_BCAST | \
89 WAKE_ARP | WAKE_MAGIC)
90
91/* USB related defines */
92#define BULK_IN_PIPE 1
93#define BULK_OUT_PIPE 2
94
95/* default autosuspend delay (mSec)*/
96#define DEFAULT_AUTOSUSPEND_DELAY (10 * 1000)
97
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98/* statistic update interval (mSec) */
99#define STAT_UPDATE_TIMER (1 * 1000)
100
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101/* defines interrupts from interrupt EP */
102#define MAX_INT_EP (32)
103#define INT_EP_INTEP (31)
104#define INT_EP_OTP_WR_DONE (28)
105#define INT_EP_EEE_TX_LPI_START (26)
106#define INT_EP_EEE_TX_LPI_STOP (25)
107#define INT_EP_EEE_RX_LPI (24)
108#define INT_EP_MAC_RESET_TIMEOUT (23)
109#define INT_EP_RDFO (22)
110#define INT_EP_TXE (21)
111#define INT_EP_USB_STATUS (20)
112#define INT_EP_TX_DIS (19)
113#define INT_EP_RX_DIS (18)
114#define INT_EP_PHY (17)
115#define INT_EP_DP (16)
116#define INT_EP_MAC_ERR (15)
117#define INT_EP_TDFU (14)
118#define INT_EP_TDFO (13)
119#define INT_EP_UTX (12)
120#define INT_EP_GPIO_11 (11)
121#define INT_EP_GPIO_10 (10)
122#define INT_EP_GPIO_9 (9)
123#define INT_EP_GPIO_8 (8)
124#define INT_EP_GPIO_7 (7)
125#define INT_EP_GPIO_6 (6)
126#define INT_EP_GPIO_5 (5)
127#define INT_EP_GPIO_4 (4)
128#define INT_EP_GPIO_3 (3)
129#define INT_EP_GPIO_2 (2)
130#define INT_EP_GPIO_1 (1)
131#define INT_EP_GPIO_0 (0)
132
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133static const char lan78xx_gstrings[][ETH_GSTRING_LEN] = {
134 "RX FCS Errors",
135 "RX Alignment Errors",
136 "Rx Fragment Errors",
137 "RX Jabber Errors",
138 "RX Undersize Frame Errors",
139 "RX Oversize Frame Errors",
140 "RX Dropped Frames",
141 "RX Unicast Byte Count",
142 "RX Broadcast Byte Count",
143 "RX Multicast Byte Count",
144 "RX Unicast Frames",
145 "RX Broadcast Frames",
146 "RX Multicast Frames",
147 "RX Pause Frames",
148 "RX 64 Byte Frames",
149 "RX 65 - 127 Byte Frames",
150 "RX 128 - 255 Byte Frames",
151 "RX 256 - 511 Bytes Frames",
152 "RX 512 - 1023 Byte Frames",
153 "RX 1024 - 1518 Byte Frames",
154 "RX Greater 1518 Byte Frames",
155 "EEE RX LPI Transitions",
156 "EEE RX LPI Time",
157 "TX FCS Errors",
158 "TX Excess Deferral Errors",
159 "TX Carrier Errors",
160 "TX Bad Byte Count",
161 "TX Single Collisions",
162 "TX Multiple Collisions",
163 "TX Excessive Collision",
164 "TX Late Collisions",
165 "TX Unicast Byte Count",
166 "TX Broadcast Byte Count",
167 "TX Multicast Byte Count",
168 "TX Unicast Frames",
169 "TX Broadcast Frames",
170 "TX Multicast Frames",
171 "TX Pause Frames",
172 "TX 64 Byte Frames",
173 "TX 65 - 127 Byte Frames",
174 "TX 128 - 255 Byte Frames",
175 "TX 256 - 511 Bytes Frames",
176 "TX 512 - 1023 Byte Frames",
177 "TX 1024 - 1518 Byte Frames",
178 "TX Greater 1518 Byte Frames",
179 "EEE TX LPI Transitions",
180 "EEE TX LPI Time",
181};
182
183struct lan78xx_statstage {
184 u32 rx_fcs_errors;
185 u32 rx_alignment_errors;
186 u32 rx_fragment_errors;
187 u32 rx_jabber_errors;
188 u32 rx_undersize_frame_errors;
189 u32 rx_oversize_frame_errors;
190 u32 rx_dropped_frames;
191 u32 rx_unicast_byte_count;
192 u32 rx_broadcast_byte_count;
193 u32 rx_multicast_byte_count;
194 u32 rx_unicast_frames;
195 u32 rx_broadcast_frames;
196 u32 rx_multicast_frames;
197 u32 rx_pause_frames;
198 u32 rx_64_byte_frames;
199 u32 rx_65_127_byte_frames;
200 u32 rx_128_255_byte_frames;
201 u32 rx_256_511_bytes_frames;
202 u32 rx_512_1023_byte_frames;
203 u32 rx_1024_1518_byte_frames;
204 u32 rx_greater_1518_byte_frames;
205 u32 eee_rx_lpi_transitions;
206 u32 eee_rx_lpi_time;
207 u32 tx_fcs_errors;
208 u32 tx_excess_deferral_errors;
209 u32 tx_carrier_errors;
210 u32 tx_bad_byte_count;
211 u32 tx_single_collisions;
212 u32 tx_multiple_collisions;
213 u32 tx_excessive_collision;
214 u32 tx_late_collisions;
215 u32 tx_unicast_byte_count;
216 u32 tx_broadcast_byte_count;
217 u32 tx_multicast_byte_count;
218 u32 tx_unicast_frames;
219 u32 tx_broadcast_frames;
220 u32 tx_multicast_frames;
221 u32 tx_pause_frames;
222 u32 tx_64_byte_frames;
223 u32 tx_65_127_byte_frames;
224 u32 tx_128_255_byte_frames;
225 u32 tx_256_511_bytes_frames;
226 u32 tx_512_1023_byte_frames;
227 u32 tx_1024_1518_byte_frames;
228 u32 tx_greater_1518_byte_frames;
229 u32 eee_tx_lpi_transitions;
230 u32 eee_tx_lpi_time;
231};
232
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233struct lan78xx_statstage64 {
234 u64 rx_fcs_errors;
235 u64 rx_alignment_errors;
236 u64 rx_fragment_errors;
237 u64 rx_jabber_errors;
238 u64 rx_undersize_frame_errors;
239 u64 rx_oversize_frame_errors;
240 u64 rx_dropped_frames;
241 u64 rx_unicast_byte_count;
242 u64 rx_broadcast_byte_count;
243 u64 rx_multicast_byte_count;
244 u64 rx_unicast_frames;
245 u64 rx_broadcast_frames;
246 u64 rx_multicast_frames;
247 u64 rx_pause_frames;
248 u64 rx_64_byte_frames;
249 u64 rx_65_127_byte_frames;
250 u64 rx_128_255_byte_frames;
251 u64 rx_256_511_bytes_frames;
252 u64 rx_512_1023_byte_frames;
253 u64 rx_1024_1518_byte_frames;
254 u64 rx_greater_1518_byte_frames;
255 u64 eee_rx_lpi_transitions;
256 u64 eee_rx_lpi_time;
257 u64 tx_fcs_errors;
258 u64 tx_excess_deferral_errors;
259 u64 tx_carrier_errors;
260 u64 tx_bad_byte_count;
261 u64 tx_single_collisions;
262 u64 tx_multiple_collisions;
263 u64 tx_excessive_collision;
264 u64 tx_late_collisions;
265 u64 tx_unicast_byte_count;
266 u64 tx_broadcast_byte_count;
267 u64 tx_multicast_byte_count;
268 u64 tx_unicast_frames;
269 u64 tx_broadcast_frames;
270 u64 tx_multicast_frames;
271 u64 tx_pause_frames;
272 u64 tx_64_byte_frames;
273 u64 tx_65_127_byte_frames;
274 u64 tx_128_255_byte_frames;
275 u64 tx_256_511_bytes_frames;
276 u64 tx_512_1023_byte_frames;
277 u64 tx_1024_1518_byte_frames;
278 u64 tx_greater_1518_byte_frames;
279 u64 eee_tx_lpi_transitions;
280 u64 eee_tx_lpi_time;
281};
282
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283static u32 lan78xx_regs[] = {
284 ID_REV,
285 INT_STS,
286 HW_CFG,
287 PMT_CTL,
288 E2P_CMD,
289 E2P_DATA,
290 USB_STATUS,
291 VLAN_TYPE,
292 MAC_CR,
293 MAC_RX,
294 MAC_TX,
295 FLOW,
296 ERR_STS,
297 MII_ACC,
298 MII_DATA,
299 EEE_TX_LPI_REQ_DLY,
300 EEE_TW_TX_SYS,
301 EEE_TX_LPI_REM_DLY,
302 WUCSR
303};
304
305#define PHY_REG_SIZE (32 * sizeof(u32))
306
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307struct lan78xx_net;
308
309struct lan78xx_priv {
310 struct lan78xx_net *dev;
311 u32 rfe_ctl;
312 u32 mchash_table[DP_SEL_VHF_HASH_LEN]; /* multicat hash table */
313 u32 pfilter_table[NUM_OF_MAF][2]; /* perfect filter table */
314 u32 vlan_table[DP_SEL_VHF_VLAN_LEN];
315 struct mutex dataport_mutex; /* for dataport access */
316 spinlock_t rfe_ctl_lock; /* for rfe register access */
317 struct work_struct set_multicast;
318 struct work_struct set_vlan;
319 u32 wol;
320};
321
322enum skb_state {
323 illegal = 0,
324 tx_start,
325 tx_done,
326 rx_start,
327 rx_done,
328 rx_cleanup,
329 unlink_start
330};
331
332struct skb_data { /* skb->cb is one of these */
333 struct urb *urb;
334 struct lan78xx_net *dev;
335 enum skb_state state;
336 size_t length;
74d79a2e 337 int num_of_packet;
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338};
339
340struct usb_context {
341 struct usb_ctrlrequest req;
342 struct lan78xx_net *dev;
343};
344
345#define EVENT_TX_HALT 0
346#define EVENT_RX_HALT 1
347#define EVENT_RX_MEMORY 2
348#define EVENT_STS_SPLIT 3
349#define EVENT_LINK_RESET 4
350#define EVENT_RX_PAUSED 5
351#define EVENT_DEV_WAKING 6
352#define EVENT_DEV_ASLEEP 7
353#define EVENT_DEV_OPEN 8
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354#define EVENT_STAT_UPDATE 9
355
356struct statstage {
357 struct mutex access_lock; /* for stats access */
358 struct lan78xx_statstage saved;
359 struct lan78xx_statstage rollover_count;
360 struct lan78xx_statstage rollover_max;
361 struct lan78xx_statstage64 curr_stat;
362};
55d7de9d 363
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364struct irq_domain_data {
365 struct irq_domain *irqdomain;
366 unsigned int phyirq;
367 struct irq_chip *irqchip;
368 irq_flow_handler_t irq_handler;
369 u32 irqenable;
370 struct mutex irq_lock; /* for irq bus access */
371};
372
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373struct lan78xx_net {
374 struct net_device *net;
375 struct usb_device *udev;
376 struct usb_interface *intf;
377 void *driver_priv;
378
379 int rx_qlen;
380 int tx_qlen;
381 struct sk_buff_head rxq;
382 struct sk_buff_head txq;
383 struct sk_buff_head done;
384 struct sk_buff_head rxq_pause;
385 struct sk_buff_head txq_pend;
386
387 struct tasklet_struct bh;
388 struct delayed_work wq;
389
390 struct usb_host_endpoint *ep_blkin;
391 struct usb_host_endpoint *ep_blkout;
392 struct usb_host_endpoint *ep_intr;
393
394 int msg_enable;
395
396 struct urb *urb_intr;
397 struct usb_anchor deferred;
398
399 struct mutex phy_mutex; /* for phy access */
400 unsigned pipe_in, pipe_out, pipe_intr;
401
402 u32 hard_mtu; /* count any extra framing */
403 size_t rx_urb_size; /* size for rx urbs */
404
405 unsigned long flags;
406
407 wait_queue_head_t *wait;
408 unsigned char suspend_count;
409
410 unsigned maxpacket;
411 struct timer_list delay;
20ff5565 412 struct timer_list stat_monitor;
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413
414 unsigned long data[5];
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415
416 int link_on;
417 u8 mdix_ctrl;
ce85e13a 418
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419 u32 chipid;
420 u32 chiprev;
ce85e13a 421 struct mii_bus *mdiobus;
02dc1f3d 422 phy_interface_t interface;
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423
424 int fc_autoneg;
425 u8 fc_request_control;
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426
427 int delta;
428 struct statstage stats;
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429
430 struct irq_domain_data domain_data;
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431};
432
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433/* define external phy id */
434#define PHY_LAN8835 (0x0007C130)
435#define PHY_KSZ9031RNX (0x00221620)
436
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437/* use ethtool to change the level for any given device */
438static int msg_level = -1;
439module_param(msg_level, int, 0);
440MODULE_PARM_DESC(msg_level, "Override default message level");
441
442static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data)
443{
444 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
445 int ret;
446
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447 if (!buf)
448 return -ENOMEM;
449
450 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
451 USB_VENDOR_REQUEST_READ_REGISTER,
452 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
453 0, index, buf, 4, USB_CTRL_GET_TIMEOUT);
454 if (likely(ret >= 0)) {
455 le32_to_cpus(buf);
456 *data = *buf;
457 } else {
458 netdev_warn(dev->net,
459 "Failed to read register index 0x%08x. ret = %d",
460 index, ret);
461 }
462
463 kfree(buf);
464
465 return ret;
466}
467
468static int lan78xx_write_reg(struct lan78xx_net *dev, u32 index, u32 data)
469{
470 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
471 int ret;
472
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473 if (!buf)
474 return -ENOMEM;
475
476 *buf = data;
477 cpu_to_le32s(buf);
478
479 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
480 USB_VENDOR_REQUEST_WRITE_REGISTER,
481 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
482 0, index, buf, 4, USB_CTRL_SET_TIMEOUT);
483 if (unlikely(ret < 0)) {
484 netdev_warn(dev->net,
485 "Failed to write register index 0x%08x. ret = %d",
486 index, ret);
487 }
488
489 kfree(buf);
490
491 return ret;
492}
493
494static int lan78xx_read_stats(struct lan78xx_net *dev,
495 struct lan78xx_statstage *data)
496{
497 int ret = 0;
498 int i;
499 struct lan78xx_statstage *stats;
500 u32 *src;
501 u32 *dst;
502
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503 stats = kmalloc(sizeof(*stats), GFP_KERNEL);
504 if (!stats)
505 return -ENOMEM;
506
507 ret = usb_control_msg(dev->udev,
508 usb_rcvctrlpipe(dev->udev, 0),
509 USB_VENDOR_REQUEST_GET_STATS,
510 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
511 0,
512 0,
513 (void *)stats,
514 sizeof(*stats),
515 USB_CTRL_SET_TIMEOUT);
516 if (likely(ret >= 0)) {
517 src = (u32 *)stats;
518 dst = (u32 *)data;
519 for (i = 0; i < sizeof(*stats)/sizeof(u32); i++) {
520 le32_to_cpus(&src[i]);
521 dst[i] = src[i];
522 }
523 } else {
524 netdev_warn(dev->net,
525 "Failed to read stat ret = 0x%x", ret);
526 }
527
528 kfree(stats);
529
530 return ret;
531}
532
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533#define check_counter_rollover(struct1, dev_stats, member) { \
534 if (struct1->member < dev_stats.saved.member) \
535 dev_stats.rollover_count.member++; \
536 }
537
538static void lan78xx_check_stat_rollover(struct lan78xx_net *dev,
539 struct lan78xx_statstage *stats)
540{
541 check_counter_rollover(stats, dev->stats, rx_fcs_errors);
542 check_counter_rollover(stats, dev->stats, rx_alignment_errors);
543 check_counter_rollover(stats, dev->stats, rx_fragment_errors);
544 check_counter_rollover(stats, dev->stats, rx_jabber_errors);
545 check_counter_rollover(stats, dev->stats, rx_undersize_frame_errors);
546 check_counter_rollover(stats, dev->stats, rx_oversize_frame_errors);
547 check_counter_rollover(stats, dev->stats, rx_dropped_frames);
548 check_counter_rollover(stats, dev->stats, rx_unicast_byte_count);
549 check_counter_rollover(stats, dev->stats, rx_broadcast_byte_count);
550 check_counter_rollover(stats, dev->stats, rx_multicast_byte_count);
551 check_counter_rollover(stats, dev->stats, rx_unicast_frames);
552 check_counter_rollover(stats, dev->stats, rx_broadcast_frames);
553 check_counter_rollover(stats, dev->stats, rx_multicast_frames);
554 check_counter_rollover(stats, dev->stats, rx_pause_frames);
555 check_counter_rollover(stats, dev->stats, rx_64_byte_frames);
556 check_counter_rollover(stats, dev->stats, rx_65_127_byte_frames);
557 check_counter_rollover(stats, dev->stats, rx_128_255_byte_frames);
558 check_counter_rollover(stats, dev->stats, rx_256_511_bytes_frames);
559 check_counter_rollover(stats, dev->stats, rx_512_1023_byte_frames);
560 check_counter_rollover(stats, dev->stats, rx_1024_1518_byte_frames);
561 check_counter_rollover(stats, dev->stats, rx_greater_1518_byte_frames);
562 check_counter_rollover(stats, dev->stats, eee_rx_lpi_transitions);
563 check_counter_rollover(stats, dev->stats, eee_rx_lpi_time);
564 check_counter_rollover(stats, dev->stats, tx_fcs_errors);
565 check_counter_rollover(stats, dev->stats, tx_excess_deferral_errors);
566 check_counter_rollover(stats, dev->stats, tx_carrier_errors);
567 check_counter_rollover(stats, dev->stats, tx_bad_byte_count);
568 check_counter_rollover(stats, dev->stats, tx_single_collisions);
569 check_counter_rollover(stats, dev->stats, tx_multiple_collisions);
570 check_counter_rollover(stats, dev->stats, tx_excessive_collision);
571 check_counter_rollover(stats, dev->stats, tx_late_collisions);
572 check_counter_rollover(stats, dev->stats, tx_unicast_byte_count);
573 check_counter_rollover(stats, dev->stats, tx_broadcast_byte_count);
574 check_counter_rollover(stats, dev->stats, tx_multicast_byte_count);
575 check_counter_rollover(stats, dev->stats, tx_unicast_frames);
576 check_counter_rollover(stats, dev->stats, tx_broadcast_frames);
577 check_counter_rollover(stats, dev->stats, tx_multicast_frames);
578 check_counter_rollover(stats, dev->stats, tx_pause_frames);
579 check_counter_rollover(stats, dev->stats, tx_64_byte_frames);
580 check_counter_rollover(stats, dev->stats, tx_65_127_byte_frames);
581 check_counter_rollover(stats, dev->stats, tx_128_255_byte_frames);
582 check_counter_rollover(stats, dev->stats, tx_256_511_bytes_frames);
583 check_counter_rollover(stats, dev->stats, tx_512_1023_byte_frames);
584 check_counter_rollover(stats, dev->stats, tx_1024_1518_byte_frames);
585 check_counter_rollover(stats, dev->stats, tx_greater_1518_byte_frames);
586 check_counter_rollover(stats, dev->stats, eee_tx_lpi_transitions);
587 check_counter_rollover(stats, dev->stats, eee_tx_lpi_time);
588
589 memcpy(&dev->stats.saved, stats, sizeof(struct lan78xx_statstage));
590}
591
592static void lan78xx_update_stats(struct lan78xx_net *dev)
593{
594 u32 *p, *count, *max;
595 u64 *data;
596 int i;
597 struct lan78xx_statstage lan78xx_stats;
598
599 if (usb_autopm_get_interface(dev->intf) < 0)
600 return;
601
602 p = (u32 *)&lan78xx_stats;
603 count = (u32 *)&dev->stats.rollover_count;
604 max = (u32 *)&dev->stats.rollover_max;
605 data = (u64 *)&dev->stats.curr_stat;
606
607 mutex_lock(&dev->stats.access_lock);
608
609 if (lan78xx_read_stats(dev, &lan78xx_stats) > 0)
610 lan78xx_check_stat_rollover(dev, &lan78xx_stats);
611
612 for (i = 0; i < (sizeof(lan78xx_stats) / (sizeof(u32))); i++)
613 data[i] = (u64)p[i] + ((u64)count[i] * ((u64)max[i] + 1));
614
615 mutex_unlock(&dev->stats.access_lock);
616
617 usb_autopm_put_interface(dev->intf);
618}
619
55d7de9d
WH
620/* Loop until the read is completed with timeout called with phy_mutex held */
621static int lan78xx_phy_wait_not_busy(struct lan78xx_net *dev)
622{
623 unsigned long start_time = jiffies;
624 u32 val;
625 int ret;
626
627 do {
628 ret = lan78xx_read_reg(dev, MII_ACC, &val);
629 if (unlikely(ret < 0))
630 return -EIO;
631
632 if (!(val & MII_ACC_MII_BUSY_))
633 return 0;
634 } while (!time_after(jiffies, start_time + HZ));
635
636 return -EIO;
637}
638
639static inline u32 mii_access(int id, int index, int read)
640{
641 u32 ret;
642
643 ret = ((u32)id << MII_ACC_PHY_ADDR_SHIFT_) & MII_ACC_PHY_ADDR_MASK_;
644 ret |= ((u32)index << MII_ACC_MIIRINDA_SHIFT_) & MII_ACC_MIIRINDA_MASK_;
645 if (read)
646 ret |= MII_ACC_MII_READ_;
647 else
648 ret |= MII_ACC_MII_WRITE_;
649 ret |= MII_ACC_MII_BUSY_;
650
651 return ret;
652}
653
55d7de9d
WH
654static int lan78xx_wait_eeprom(struct lan78xx_net *dev)
655{
656 unsigned long start_time = jiffies;
657 u32 val;
658 int ret;
659
660 do {
661 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
662 if (unlikely(ret < 0))
663 return -EIO;
664
665 if (!(val & E2P_CMD_EPC_BUSY_) ||
666 (val & E2P_CMD_EPC_TIMEOUT_))
667 break;
668 usleep_range(40, 100);
669 } while (!time_after(jiffies, start_time + HZ));
670
671 if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) {
672 netdev_warn(dev->net, "EEPROM read operation timeout");
673 return -EIO;
674 }
675
676 return 0;
677}
678
679static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev)
680{
681 unsigned long start_time = jiffies;
682 u32 val;
683 int ret;
684
685 do {
686 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
687 if (unlikely(ret < 0))
688 return -EIO;
689
690 if (!(val & E2P_CMD_EPC_BUSY_))
691 return 0;
692
693 usleep_range(40, 100);
694 } while (!time_after(jiffies, start_time + HZ));
695
696 netdev_warn(dev->net, "EEPROM is busy");
697 return -EIO;
698}
699
700static int lan78xx_read_raw_eeprom(struct lan78xx_net *dev, u32 offset,
701 u32 length, u8 *data)
702{
703 u32 val;
a0db7d10 704 u32 saved;
55d7de9d 705 int i, ret;
a0db7d10
WH
706 int retval;
707
708 /* depends on chip, some EEPROM pins are muxed with LED function.
709 * disable & restore LED function to access EEPROM.
710 */
711 ret = lan78xx_read_reg(dev, HW_CFG, &val);
712 saved = val;
87177ba6 713 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
a0db7d10
WH
714 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
715 ret = lan78xx_write_reg(dev, HW_CFG, val);
716 }
55d7de9d 717
a0db7d10
WH
718 retval = lan78xx_eeprom_confirm_not_busy(dev);
719 if (retval)
720 return retval;
55d7de9d
WH
721
722 for (i = 0; i < length; i++) {
723 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_;
724 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
725 ret = lan78xx_write_reg(dev, E2P_CMD, val);
a0db7d10
WH
726 if (unlikely(ret < 0)) {
727 retval = -EIO;
728 goto exit;
729 }
55d7de9d 730
a0db7d10
WH
731 retval = lan78xx_wait_eeprom(dev);
732 if (retval < 0)
733 goto exit;
55d7de9d
WH
734
735 ret = lan78xx_read_reg(dev, E2P_DATA, &val);
a0db7d10
WH
736 if (unlikely(ret < 0)) {
737 retval = -EIO;
738 goto exit;
739 }
55d7de9d
WH
740
741 data[i] = val & 0xFF;
742 offset++;
743 }
744
a0db7d10
WH
745 retval = 0;
746exit:
87177ba6 747 if (dev->chipid == ID_REV_CHIP_ID_7800_)
a0db7d10
WH
748 ret = lan78xx_write_reg(dev, HW_CFG, saved);
749
750 return retval;
55d7de9d
WH
751}
752
753static int lan78xx_read_eeprom(struct lan78xx_net *dev, u32 offset,
754 u32 length, u8 *data)
755{
756 u8 sig;
757 int ret;
758
759 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
760 if ((ret == 0) && (sig == EEPROM_INDICATOR))
761 ret = lan78xx_read_raw_eeprom(dev, offset, length, data);
762 else
763 ret = -EINVAL;
764
765 return ret;
766}
767
768static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset,
769 u32 length, u8 *data)
770{
771 u32 val;
a0db7d10 772 u32 saved;
55d7de9d 773 int i, ret;
a0db7d10
WH
774 int retval;
775
776 /* depends on chip, some EEPROM pins are muxed with LED function.
777 * disable & restore LED function to access EEPROM.
778 */
779 ret = lan78xx_read_reg(dev, HW_CFG, &val);
780 saved = val;
87177ba6 781 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
a0db7d10
WH
782 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
783 ret = lan78xx_write_reg(dev, HW_CFG, val);
784 }
55d7de9d 785
a0db7d10
WH
786 retval = lan78xx_eeprom_confirm_not_busy(dev);
787 if (retval)
788 goto exit;
55d7de9d
WH
789
790 /* Issue write/erase enable command */
791 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_;
792 ret = lan78xx_write_reg(dev, E2P_CMD, val);
a0db7d10
WH
793 if (unlikely(ret < 0)) {
794 retval = -EIO;
795 goto exit;
796 }
55d7de9d 797
a0db7d10
WH
798 retval = lan78xx_wait_eeprom(dev);
799 if (retval < 0)
800 goto exit;
55d7de9d
WH
801
802 for (i = 0; i < length; i++) {
803 /* Fill data register */
804 val = data[i];
805 ret = lan78xx_write_reg(dev, E2P_DATA, val);
a0db7d10
WH
806 if (ret < 0) {
807 retval = -EIO;
808 goto exit;
809 }
55d7de9d
WH
810
811 /* Send "write" command */
812 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_;
813 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
814 ret = lan78xx_write_reg(dev, E2P_CMD, val);
a0db7d10
WH
815 if (ret < 0) {
816 retval = -EIO;
817 goto exit;
818 }
55d7de9d 819
a0db7d10
WH
820 retval = lan78xx_wait_eeprom(dev);
821 if (retval < 0)
822 goto exit;
55d7de9d
WH
823
824 offset++;
825 }
826
a0db7d10
WH
827 retval = 0;
828exit:
87177ba6 829 if (dev->chipid == ID_REV_CHIP_ID_7800_)
a0db7d10
WH
830 ret = lan78xx_write_reg(dev, HW_CFG, saved);
831
832 return retval;
55d7de9d
WH
833}
834
835static int lan78xx_read_raw_otp(struct lan78xx_net *dev, u32 offset,
836 u32 length, u8 *data)
837{
838 int i;
839 int ret;
840 u32 buf;
841 unsigned long timeout;
842
843 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
844
845 if (buf & OTP_PWR_DN_PWRDN_N_) {
846 /* clear it and wait to be cleared */
847 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
848
849 timeout = jiffies + HZ;
850 do {
851 usleep_range(1, 10);
852 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
853 if (time_after(jiffies, timeout)) {
854 netdev_warn(dev->net,
855 "timeout on OTP_PWR_DN");
856 return -EIO;
857 }
858 } while (buf & OTP_PWR_DN_PWRDN_N_);
859 }
860
861 for (i = 0; i < length; i++) {
862 ret = lan78xx_write_reg(dev, OTP_ADDR1,
863 ((offset + i) >> 8) & OTP_ADDR1_15_11);
864 ret = lan78xx_write_reg(dev, OTP_ADDR2,
865 ((offset + i) & OTP_ADDR2_10_3));
866
867 ret = lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
868 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
869
870 timeout = jiffies + HZ;
871 do {
872 udelay(1);
873 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
874 if (time_after(jiffies, timeout)) {
875 netdev_warn(dev->net,
876 "timeout on OTP_STATUS");
877 return -EIO;
878 }
879 } while (buf & OTP_STATUS_BUSY_);
880
881 ret = lan78xx_read_reg(dev, OTP_RD_DATA, &buf);
882
883 data[i] = (u8)(buf & 0xFF);
884 }
885
886 return 0;
887}
888
9fb6066d
WH
889static int lan78xx_write_raw_otp(struct lan78xx_net *dev, u32 offset,
890 u32 length, u8 *data)
891{
892 int i;
893 int ret;
894 u32 buf;
895 unsigned long timeout;
896
897 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
898
899 if (buf & OTP_PWR_DN_PWRDN_N_) {
900 /* clear it and wait to be cleared */
901 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
902
903 timeout = jiffies + HZ;
904 do {
905 udelay(1);
906 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
907 if (time_after(jiffies, timeout)) {
908 netdev_warn(dev->net,
909 "timeout on OTP_PWR_DN completion");
910 return -EIO;
911 }
912 } while (buf & OTP_PWR_DN_PWRDN_N_);
913 }
914
915 /* set to BYTE program mode */
916 ret = lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_);
917
918 for (i = 0; i < length; i++) {
919 ret = lan78xx_write_reg(dev, OTP_ADDR1,
920 ((offset + i) >> 8) & OTP_ADDR1_15_11);
921 ret = lan78xx_write_reg(dev, OTP_ADDR2,
922 ((offset + i) & OTP_ADDR2_10_3));
923 ret = lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]);
924 ret = lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_);
925 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
926
927 timeout = jiffies + HZ;
928 do {
929 udelay(1);
930 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
931 if (time_after(jiffies, timeout)) {
932 netdev_warn(dev->net,
933 "Timeout on OTP_STATUS completion");
934 return -EIO;
935 }
936 } while (buf & OTP_STATUS_BUSY_);
937 }
938
939 return 0;
940}
941
55d7de9d
WH
942static int lan78xx_read_otp(struct lan78xx_net *dev, u32 offset,
943 u32 length, u8 *data)
944{
945 u8 sig;
946 int ret;
947
948 ret = lan78xx_read_raw_otp(dev, 0, 1, &sig);
949
950 if (ret == 0) {
951 if (sig == OTP_INDICATOR_1)
952 offset = offset;
953 else if (sig == OTP_INDICATOR_2)
954 offset += 0x100;
955 else
956 ret = -EINVAL;
4bfc3380
PE
957 if (!ret)
958 ret = lan78xx_read_raw_otp(dev, offset, length, data);
55d7de9d
WH
959 }
960
961 return ret;
962}
963
964static int lan78xx_dataport_wait_not_busy(struct lan78xx_net *dev)
965{
966 int i, ret;
967
968 for (i = 0; i < 100; i++) {
969 u32 dp_sel;
970
971 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
972 if (unlikely(ret < 0))
973 return -EIO;
974
975 if (dp_sel & DP_SEL_DPRDY_)
976 return 0;
977
978 usleep_range(40, 100);
979 }
980
981 netdev_warn(dev->net, "lan78xx_dataport_wait_not_busy timed out");
982
983 return -EIO;
984}
985
986static int lan78xx_dataport_write(struct lan78xx_net *dev, u32 ram_select,
987 u32 addr, u32 length, u32 *buf)
988{
989 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
990 u32 dp_sel;
991 int i, ret;
992
993 if (usb_autopm_get_interface(dev->intf) < 0)
994 return 0;
995
996 mutex_lock(&pdata->dataport_mutex);
997
998 ret = lan78xx_dataport_wait_not_busy(dev);
999 if (ret < 0)
1000 goto done;
1001
1002 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
1003
1004 dp_sel &= ~DP_SEL_RSEL_MASK_;
1005 dp_sel |= ram_select;
1006 ret = lan78xx_write_reg(dev, DP_SEL, dp_sel);
1007
1008 for (i = 0; i < length; i++) {
1009 ret = lan78xx_write_reg(dev, DP_ADDR, addr + i);
1010
1011 ret = lan78xx_write_reg(dev, DP_DATA, buf[i]);
1012
1013 ret = lan78xx_write_reg(dev, DP_CMD, DP_CMD_WRITE_);
1014
1015 ret = lan78xx_dataport_wait_not_busy(dev);
1016 if (ret < 0)
1017 goto done;
1018 }
1019
1020done:
1021 mutex_unlock(&pdata->dataport_mutex);
1022 usb_autopm_put_interface(dev->intf);
1023
1024 return ret;
1025}
1026
1027static void lan78xx_set_addr_filter(struct lan78xx_priv *pdata,
1028 int index, u8 addr[ETH_ALEN])
1029{
1030 u32 temp;
1031
1032 if ((pdata) && (index > 0) && (index < NUM_OF_MAF)) {
1033 temp = addr[3];
1034 temp = addr[2] | (temp << 8);
1035 temp = addr[1] | (temp << 8);
1036 temp = addr[0] | (temp << 8);
1037 pdata->pfilter_table[index][1] = temp;
1038 temp = addr[5];
1039 temp = addr[4] | (temp << 8);
1040 temp |= MAF_HI_VALID_ | MAF_HI_TYPE_DST_;
1041 pdata->pfilter_table[index][0] = temp;
1042 }
1043}
1044
1045/* returns hash bit number for given MAC address */
1046static inline u32 lan78xx_hash(char addr[ETH_ALEN])
1047{
1048 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
1049}
1050
1051static void lan78xx_deferred_multicast_write(struct work_struct *param)
1052{
1053 struct lan78xx_priv *pdata =
1054 container_of(param, struct lan78xx_priv, set_multicast);
1055 struct lan78xx_net *dev = pdata->dev;
1056 int i;
1057 int ret;
1058
1059 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n",
1060 pdata->rfe_ctl);
1061
1062 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, DP_SEL_VHF_VLAN_LEN,
1063 DP_SEL_VHF_HASH_LEN, pdata->mchash_table);
1064
1065 for (i = 1; i < NUM_OF_MAF; i++) {
1066 ret = lan78xx_write_reg(dev, MAF_HI(i), 0);
1067 ret = lan78xx_write_reg(dev, MAF_LO(i),
1068 pdata->pfilter_table[i][1]);
1069 ret = lan78xx_write_reg(dev, MAF_HI(i),
1070 pdata->pfilter_table[i][0]);
1071 }
1072
1073 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
1074}
1075
1076static void lan78xx_set_multicast(struct net_device *netdev)
1077{
1078 struct lan78xx_net *dev = netdev_priv(netdev);
1079 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1080 unsigned long flags;
1081 int i;
1082
1083 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
1084
1085 pdata->rfe_ctl &= ~(RFE_CTL_UCAST_EN_ | RFE_CTL_MCAST_EN_ |
1086 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
1087
1088 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
1089 pdata->mchash_table[i] = 0;
1090 /* pfilter_table[0] has own HW address */
1091 for (i = 1; i < NUM_OF_MAF; i++) {
1092 pdata->pfilter_table[i][0] =
1093 pdata->pfilter_table[i][1] = 0;
1094 }
1095
1096 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_;
1097
1098 if (dev->net->flags & IFF_PROMISC) {
1099 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled");
1100 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_ | RFE_CTL_UCAST_EN_;
1101 } else {
1102 if (dev->net->flags & IFF_ALLMULTI) {
1103 netif_dbg(dev, drv, dev->net,
1104 "receive all multicast enabled");
1105 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_;
1106 }
1107 }
1108
1109 if (netdev_mc_count(dev->net)) {
1110 struct netdev_hw_addr *ha;
1111 int i;
1112
1113 netif_dbg(dev, drv, dev->net, "receive multicast hash filter");
1114
1115 pdata->rfe_ctl |= RFE_CTL_DA_PERFECT_;
1116
1117 i = 1;
1118 netdev_for_each_mc_addr(ha, netdev) {
1119 /* set first 32 into Perfect Filter */
1120 if (i < 33) {
1121 lan78xx_set_addr_filter(pdata, i, ha->addr);
1122 } else {
1123 u32 bitnum = lan78xx_hash(ha->addr);
1124
1125 pdata->mchash_table[bitnum / 32] |=
1126 (1 << (bitnum % 32));
1127 pdata->rfe_ctl |= RFE_CTL_MCAST_HASH_;
1128 }
1129 i++;
1130 }
1131 }
1132
1133 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
1134
1135 /* defer register writes to a sleepable context */
1136 schedule_work(&pdata->set_multicast);
1137}
1138
1139static int lan78xx_update_flowcontrol(struct lan78xx_net *dev, u8 duplex,
1140 u16 lcladv, u16 rmtadv)
1141{
1142 u32 flow = 0, fct_flow = 0;
1143 int ret;
349e0c5e 1144 u8 cap;
55d7de9d 1145
349e0c5e
WH
1146 if (dev->fc_autoneg)
1147 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
1148 else
1149 cap = dev->fc_request_control;
55d7de9d
WH
1150
1151 if (cap & FLOW_CTRL_TX)
349e0c5e 1152 flow |= (FLOW_CR_TX_FCEN_ | 0xFFFF);
55d7de9d
WH
1153
1154 if (cap & FLOW_CTRL_RX)
1155 flow |= FLOW_CR_RX_FCEN_;
1156
1157 if (dev->udev->speed == USB_SPEED_SUPER)
1158 fct_flow = 0x817;
1159 else if (dev->udev->speed == USB_SPEED_HIGH)
1160 fct_flow = 0x211;
1161
1162 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s",
1163 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
1164 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
1165
1166 ret = lan78xx_write_reg(dev, FCT_FLOW, fct_flow);
1167
1168 /* threshold value should be set before enabling flow */
1169 ret = lan78xx_write_reg(dev, FLOW, flow);
1170
1171 return 0;
1172}
1173
1174static int lan78xx_link_reset(struct lan78xx_net *dev)
1175{
ce85e13a 1176 struct phy_device *phydev = dev->net->phydev;
6e76510e 1177 struct ethtool_link_ksettings ecmd;
99c79ece 1178 int ladv, radv, ret;
55d7de9d
WH
1179 u32 buf;
1180
55d7de9d
WH
1181 /* clear LAN78xx interrupt status */
1182 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_);
1183 if (unlikely(ret < 0))
1184 return -EIO;
1185
ce85e13a
WH
1186 phy_read_status(phydev);
1187
1188 if (!phydev->link && dev->link_on) {
55d7de9d 1189 dev->link_on = false;
55d7de9d
WH
1190
1191 /* reset MAC */
1192 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1193 if (unlikely(ret < 0))
1194 return -EIO;
1195 buf |= MAC_CR_RST_;
1196 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1197 if (unlikely(ret < 0))
1198 return -EIO;
e4953910 1199
20ff5565 1200 del_timer(&dev->stat_monitor);
ce85e13a 1201 } else if (phydev->link && !dev->link_on) {
55d7de9d
WH
1202 dev->link_on = true;
1203
6e76510e 1204 phy_ethtool_ksettings_get(phydev, &ecmd);
55d7de9d 1205
55d7de9d 1206 if (dev->udev->speed == USB_SPEED_SUPER) {
6e76510e 1207 if (ecmd.base.speed == 1000) {
55d7de9d
WH
1208 /* disable U2 */
1209 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1210 buf &= ~USB_CFG1_DEV_U2_INIT_EN_;
1211 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1212 /* enable U1 */
1213 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1214 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1215 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1216 } else {
1217 /* enable U1 & U2 */
1218 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1219 buf |= USB_CFG1_DEV_U2_INIT_EN_;
1220 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1221 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1222 }
1223 }
1224
ce85e13a 1225 ladv = phy_read(phydev, MII_ADVERTISE);
99c79ece
GU
1226 if (ladv < 0)
1227 return ladv;
55d7de9d 1228
ce85e13a 1229 radv = phy_read(phydev, MII_LPA);
99c79ece
GU
1230 if (radv < 0)
1231 return radv;
55d7de9d
WH
1232
1233 netif_dbg(dev, link, dev->net,
1234 "speed: %u duplex: %d anadv: 0x%04x anlpa: 0x%04x",
6e76510e 1235 ecmd.base.speed, ecmd.base.duplex, ladv, radv);
55d7de9d 1236
6e76510e
PR
1237 ret = lan78xx_update_flowcontrol(dev, ecmd.base.duplex, ladv,
1238 radv);
20ff5565
WH
1239
1240 if (!timer_pending(&dev->stat_monitor)) {
1241 dev->delta = 1;
1242 mod_timer(&dev->stat_monitor,
1243 jiffies + STAT_UPDATE_TIMER);
1244 }
136f55f6
SW
1245
1246 tasklet_schedule(&dev->bh);
55d7de9d
WH
1247 }
1248
1249 return ret;
1250}
1251
1252/* some work can't be done in tasklets, so we use keventd
1253 *
1254 * NOTE: annoying asymmetry: if it's active, schedule_work() fails,
1255 * but tasklet_schedule() doesn't. hope the failure is rare.
1256 */
e0c79ff6 1257static void lan78xx_defer_kevent(struct lan78xx_net *dev, int work)
55d7de9d
WH
1258{
1259 set_bit(work, &dev->flags);
1260 if (!schedule_delayed_work(&dev->wq, 0))
1261 netdev_err(dev->net, "kevent %d may have been dropped\n", work);
1262}
1263
1264static void lan78xx_status(struct lan78xx_net *dev, struct urb *urb)
1265{
1266 u32 intdata;
1267
1268 if (urb->actual_length != 4) {
1269 netdev_warn(dev->net,
1270 "unexpected urb length %d", urb->actual_length);
1271 return;
1272 }
1273
1274 memcpy(&intdata, urb->transfer_buffer, 4);
1275 le32_to_cpus(&intdata);
1276
1277 if (intdata & INT_ENP_PHY_INT) {
1278 netif_dbg(dev, link, dev->net, "PHY INTR: 0x%08x\n", intdata);
cc89c323
WH
1279 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
1280
1281 if (dev->domain_data.phyirq > 0)
1282 generic_handle_irq(dev->domain_data.phyirq);
55d7de9d
WH
1283 } else
1284 netdev_warn(dev->net,
1285 "unexpected interrupt: 0x%08x\n", intdata);
1286}
1287
1288static int lan78xx_ethtool_get_eeprom_len(struct net_device *netdev)
1289{
1290 return MAX_EEPROM_SIZE;
1291}
1292
1293static int lan78xx_ethtool_get_eeprom(struct net_device *netdev,
1294 struct ethtool_eeprom *ee, u8 *data)
1295{
1296 struct lan78xx_net *dev = netdev_priv(netdev);
8a7ffeb7
NS
1297 int ret;
1298
1299 ret = usb_autopm_get_interface(dev->intf);
1300 if (ret)
1301 return ret;
55d7de9d
WH
1302
1303 ee->magic = LAN78XX_EEPROM_MAGIC;
1304
8a7ffeb7
NS
1305 ret = lan78xx_read_raw_eeprom(dev, ee->offset, ee->len, data);
1306
1307 usb_autopm_put_interface(dev->intf);
1308
1309 return ret;
55d7de9d
WH
1310}
1311
1312static int lan78xx_ethtool_set_eeprom(struct net_device *netdev,
1313 struct ethtool_eeprom *ee, u8 *data)
1314{
1315 struct lan78xx_net *dev = netdev_priv(netdev);
8a7ffeb7
NS
1316 int ret;
1317
1318 ret = usb_autopm_get_interface(dev->intf);
1319 if (ret)
1320 return ret;
55d7de9d 1321
c0776822
NS
1322 /* Invalid EEPROM_INDICATOR at offset zero will result in a failure
1323 * to load data from EEPROM
1324 */
1325 if (ee->magic == LAN78XX_EEPROM_MAGIC)
8a7ffeb7 1326 ret = lan78xx_write_raw_eeprom(dev, ee->offset, ee->len, data);
55d7de9d
WH
1327 else if ((ee->magic == LAN78XX_OTP_MAGIC) &&
1328 (ee->offset == 0) &&
1329 (ee->len == 512) &&
1330 (data[0] == OTP_INDICATOR_1))
8a7ffeb7 1331 ret = lan78xx_write_raw_otp(dev, ee->offset, ee->len, data);
55d7de9d 1332
8a7ffeb7
NS
1333 usb_autopm_put_interface(dev->intf);
1334
1335 return ret;
55d7de9d
WH
1336}
1337
1338static void lan78xx_get_strings(struct net_device *netdev, u32 stringset,
1339 u8 *data)
1340{
1341 if (stringset == ETH_SS_STATS)
1342 memcpy(data, lan78xx_gstrings, sizeof(lan78xx_gstrings));
1343}
1344
1345static int lan78xx_get_sset_count(struct net_device *netdev, int sset)
1346{
1347 if (sset == ETH_SS_STATS)
1348 return ARRAY_SIZE(lan78xx_gstrings);
1349 else
1350 return -EOPNOTSUPP;
1351}
1352
1353static void lan78xx_get_stats(struct net_device *netdev,
1354 struct ethtool_stats *stats, u64 *data)
1355{
1356 struct lan78xx_net *dev = netdev_priv(netdev);
55d7de9d 1357
20ff5565 1358 lan78xx_update_stats(dev);
55d7de9d 1359
20ff5565
WH
1360 mutex_lock(&dev->stats.access_lock);
1361 memcpy(data, &dev->stats.curr_stat, sizeof(dev->stats.curr_stat));
1362 mutex_unlock(&dev->stats.access_lock);
55d7de9d
WH
1363}
1364
1365static void lan78xx_get_wol(struct net_device *netdev,
1366 struct ethtool_wolinfo *wol)
1367{
1368 struct lan78xx_net *dev = netdev_priv(netdev);
1369 int ret;
1370 u32 buf;
1371 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1372
1373 if (usb_autopm_get_interface(dev->intf) < 0)
1374 return;
1375
1376 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
1377 if (unlikely(ret < 0)) {
1378 wol->supported = 0;
1379 wol->wolopts = 0;
1380 } else {
1381 if (buf & USB_CFG_RMT_WKP_) {
1382 wol->supported = WAKE_ALL;
1383 wol->wolopts = pdata->wol;
1384 } else {
1385 wol->supported = 0;
1386 wol->wolopts = 0;
1387 }
1388 }
1389
1390 usb_autopm_put_interface(dev->intf);
1391}
1392
1393static int lan78xx_set_wol(struct net_device *netdev,
1394 struct ethtool_wolinfo *wol)
1395{
1396 struct lan78xx_net *dev = netdev_priv(netdev);
1397 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1398 int ret;
1399
1400 ret = usb_autopm_get_interface(dev->intf);
1401 if (ret < 0)
1402 return ret;
1403
eb9ad088
FF
1404 if (wol->wolopts & ~WAKE_ALL)
1405 return -EINVAL;
1406
1407 pdata->wol = wol->wolopts;
55d7de9d
WH
1408
1409 device_set_wakeup_enable(&dev->udev->dev, (bool)wol->wolopts);
1410
ce85e13a
WH
1411 phy_ethtool_set_wol(netdev->phydev, wol);
1412
55d7de9d
WH
1413 usb_autopm_put_interface(dev->intf);
1414
1415 return ret;
1416}
1417
1418static int lan78xx_get_eee(struct net_device *net, struct ethtool_eee *edata)
1419{
1420 struct lan78xx_net *dev = netdev_priv(net);
ce85e13a 1421 struct phy_device *phydev = net->phydev;
55d7de9d
WH
1422 int ret;
1423 u32 buf;
55d7de9d
WH
1424
1425 ret = usb_autopm_get_interface(dev->intf);
1426 if (ret < 0)
1427 return ret;
1428
ce85e13a
WH
1429 ret = phy_ethtool_get_eee(phydev, edata);
1430 if (ret < 0)
1431 goto exit;
1432
55d7de9d
WH
1433 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1434 if (buf & MAC_CR_EEE_EN_) {
55d7de9d 1435 edata->eee_enabled = true;
ce85e13a
WH
1436 edata->eee_active = !!(edata->advertised &
1437 edata->lp_advertised);
55d7de9d
WH
1438 edata->tx_lpi_enabled = true;
1439 /* EEE_TX_LPI_REQ_DLY & tx_lpi_timer are same uSec unit */
1440 ret = lan78xx_read_reg(dev, EEE_TX_LPI_REQ_DLY, &buf);
1441 edata->tx_lpi_timer = buf;
1442 } else {
55d7de9d
WH
1443 edata->eee_enabled = false;
1444 edata->eee_active = false;
55d7de9d
WH
1445 edata->tx_lpi_enabled = false;
1446 edata->tx_lpi_timer = 0;
1447 }
1448
ce85e13a
WH
1449 ret = 0;
1450exit:
55d7de9d
WH
1451 usb_autopm_put_interface(dev->intf);
1452
ce85e13a 1453 return ret;
55d7de9d
WH
1454}
1455
1456static int lan78xx_set_eee(struct net_device *net, struct ethtool_eee *edata)
1457{
1458 struct lan78xx_net *dev = netdev_priv(net);
1459 int ret;
1460 u32 buf;
1461
1462 ret = usb_autopm_get_interface(dev->intf);
1463 if (ret < 0)
1464 return ret;
1465
1466 if (edata->eee_enabled) {
1467 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1468 buf |= MAC_CR_EEE_EN_;
1469 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1470
ce85e13a
WH
1471 phy_ethtool_set_eee(net->phydev, edata);
1472
1473 buf = (u32)edata->tx_lpi_timer;
1474 ret = lan78xx_write_reg(dev, EEE_TX_LPI_REQ_DLY, buf);
55d7de9d
WH
1475 } else {
1476 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1477 buf &= ~MAC_CR_EEE_EN_;
1478 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1479 }
1480
1481 usb_autopm_put_interface(dev->intf);
1482
1483 return 0;
1484}
1485
1486static u32 lan78xx_get_link(struct net_device *net)
1487{
ce85e13a 1488 phy_read_status(net->phydev);
55d7de9d 1489
ce85e13a 1490 return net->phydev->link;
55d7de9d
WH
1491}
1492
55d7de9d
WH
1493static void lan78xx_get_drvinfo(struct net_device *net,
1494 struct ethtool_drvinfo *info)
1495{
1496 struct lan78xx_net *dev = netdev_priv(net);
1497
1498 strncpy(info->driver, DRIVER_NAME, sizeof(info->driver));
55d7de9d
WH
1499 usb_make_path(dev->udev, info->bus_info, sizeof(info->bus_info));
1500}
1501
1502static u32 lan78xx_get_msglevel(struct net_device *net)
1503{
1504 struct lan78xx_net *dev = netdev_priv(net);
1505
1506 return dev->msg_enable;
1507}
1508
1509static void lan78xx_set_msglevel(struct net_device *net, u32 level)
1510{
1511 struct lan78xx_net *dev = netdev_priv(net);
1512
1513 dev->msg_enable = level;
1514}
1515
6e76510e
PR
1516static int lan78xx_get_link_ksettings(struct net_device *net,
1517 struct ethtool_link_ksettings *cmd)
55d7de9d
WH
1518{
1519 struct lan78xx_net *dev = netdev_priv(net);
ce85e13a 1520 struct phy_device *phydev = net->phydev;
55d7de9d 1521 int ret;
55d7de9d 1522
55d7de9d
WH
1523 ret = usb_autopm_get_interface(dev->intf);
1524 if (ret < 0)
1525 return ret;
1526
5514174f 1527 phy_ethtool_ksettings_get(phydev, cmd);
55d7de9d 1528
55d7de9d
WH
1529 usb_autopm_put_interface(dev->intf);
1530
1531 return ret;
1532}
1533
6e76510e
PR
1534static int lan78xx_set_link_ksettings(struct net_device *net,
1535 const struct ethtool_link_ksettings *cmd)
55d7de9d
WH
1536{
1537 struct lan78xx_net *dev = netdev_priv(net);
ce85e13a 1538 struct phy_device *phydev = net->phydev;
55d7de9d
WH
1539 int ret = 0;
1540 int temp;
1541
55d7de9d
WH
1542 ret = usb_autopm_get_interface(dev->intf);
1543 if (ret < 0)
1544 return ret;
1545
55d7de9d 1546 /* change speed & duplex */
6e76510e 1547 ret = phy_ethtool_ksettings_set(phydev, cmd);
55d7de9d 1548
6e76510e 1549 if (!cmd->base.autoneg) {
55d7de9d 1550 /* force link down */
ce85e13a
WH
1551 temp = phy_read(phydev, MII_BMCR);
1552 phy_write(phydev, MII_BMCR, temp | BMCR_LOOPBACK);
55d7de9d 1553 mdelay(1);
ce85e13a 1554 phy_write(phydev, MII_BMCR, temp);
55d7de9d
WH
1555 }
1556
1557 usb_autopm_put_interface(dev->intf);
1558
1559 return ret;
1560}
1561
349e0c5e
WH
1562static void lan78xx_get_pause(struct net_device *net,
1563 struct ethtool_pauseparam *pause)
1564{
1565 struct lan78xx_net *dev = netdev_priv(net);
1566 struct phy_device *phydev = net->phydev;
6e76510e 1567 struct ethtool_link_ksettings ecmd;
349e0c5e 1568
6e76510e 1569 phy_ethtool_ksettings_get(phydev, &ecmd);
349e0c5e
WH
1570
1571 pause->autoneg = dev->fc_autoneg;
1572
1573 if (dev->fc_request_control & FLOW_CTRL_TX)
1574 pause->tx_pause = 1;
1575
1576 if (dev->fc_request_control & FLOW_CTRL_RX)
1577 pause->rx_pause = 1;
1578}
1579
1580static int lan78xx_set_pause(struct net_device *net,
1581 struct ethtool_pauseparam *pause)
1582{
1583 struct lan78xx_net *dev = netdev_priv(net);
1584 struct phy_device *phydev = net->phydev;
6e76510e 1585 struct ethtool_link_ksettings ecmd;
349e0c5e
WH
1586 int ret;
1587
6e76510e 1588 phy_ethtool_ksettings_get(phydev, &ecmd);
349e0c5e 1589
6e76510e 1590 if (pause->autoneg && !ecmd.base.autoneg) {
349e0c5e
WH
1591 ret = -EINVAL;
1592 goto exit;
1593 }
1594
1595 dev->fc_request_control = 0;
1596 if (pause->rx_pause)
1597 dev->fc_request_control |= FLOW_CTRL_RX;
1598
1599 if (pause->tx_pause)
1600 dev->fc_request_control |= FLOW_CTRL_TX;
1601
6e76510e 1602 if (ecmd.base.autoneg) {
349e0c5e 1603 u32 mii_adv;
6e76510e
PR
1604 u32 advertising;
1605
1606 ethtool_convert_link_mode_to_legacy_u32(
1607 &advertising, ecmd.link_modes.advertising);
349e0c5e 1608
6e76510e 1609 advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
349e0c5e 1610 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
6e76510e
PR
1611 advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
1612
1613 ethtool_convert_legacy_u32_to_link_mode(
1614 ecmd.link_modes.advertising, advertising);
1615
1616 phy_ethtool_ksettings_set(phydev, &ecmd);
349e0c5e
WH
1617 }
1618
1619 dev->fc_autoneg = pause->autoneg;
1620
1621 ret = 0;
1622exit:
1623 return ret;
1624}
1625
49621865
RC
1626static int lan78xx_get_regs_len(struct net_device *netdev)
1627{
1628 if (!netdev->phydev)
1629 return (sizeof(lan78xx_regs));
1630 else
1631 return (sizeof(lan78xx_regs) + PHY_REG_SIZE);
1632}
1633
1634static void
1635lan78xx_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
1636 void *buf)
1637{
1638 u32 *data = buf;
1639 int i, j;
1640 struct lan78xx_net *dev = netdev_priv(netdev);
1641
1642 /* Read Device/MAC registers */
bf37afce 1643 for (i = 0; i < ARRAY_SIZE(lan78xx_regs); i++)
49621865
RC
1644 lan78xx_read_reg(dev, lan78xx_regs[i], &data[i]);
1645
1646 if (!netdev->phydev)
1647 return;
1648
1649 /* Read PHY registers */
1650 for (j = 0; j < 32; i++, j++)
1651 data[i] = phy_read(netdev->phydev, j);
1652}
1653
55d7de9d
WH
1654static const struct ethtool_ops lan78xx_ethtool_ops = {
1655 .get_link = lan78xx_get_link,
860ce4b4 1656 .nway_reset = phy_ethtool_nway_reset,
55d7de9d
WH
1657 .get_drvinfo = lan78xx_get_drvinfo,
1658 .get_msglevel = lan78xx_get_msglevel,
1659 .set_msglevel = lan78xx_set_msglevel,
55d7de9d
WH
1660 .get_eeprom_len = lan78xx_ethtool_get_eeprom_len,
1661 .get_eeprom = lan78xx_ethtool_get_eeprom,
1662 .set_eeprom = lan78xx_ethtool_set_eeprom,
1663 .get_ethtool_stats = lan78xx_get_stats,
1664 .get_sset_count = lan78xx_get_sset_count,
1665 .get_strings = lan78xx_get_strings,
1666 .get_wol = lan78xx_get_wol,
1667 .set_wol = lan78xx_set_wol,
1668 .get_eee = lan78xx_get_eee,
1669 .set_eee = lan78xx_set_eee,
349e0c5e
WH
1670 .get_pauseparam = lan78xx_get_pause,
1671 .set_pauseparam = lan78xx_set_pause,
6e76510e
PR
1672 .get_link_ksettings = lan78xx_get_link_ksettings,
1673 .set_link_ksettings = lan78xx_set_link_ksettings,
49621865
RC
1674 .get_regs_len = lan78xx_get_regs_len,
1675 .get_regs = lan78xx_get_regs,
55d7de9d
WH
1676};
1677
1678static int lan78xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
1679{
55d7de9d
WH
1680 if (!netif_running(netdev))
1681 return -EINVAL;
1682
ce85e13a 1683 return phy_mii_ioctl(netdev->phydev, rq, cmd);
55d7de9d
WH
1684}
1685
1686static void lan78xx_init_mac_address(struct lan78xx_net *dev)
1687{
1688 u32 addr_lo, addr_hi;
1689 int ret;
1690 u8 addr[6];
1691
1692 ret = lan78xx_read_reg(dev, RX_ADDRL, &addr_lo);
1693 ret = lan78xx_read_reg(dev, RX_ADDRH, &addr_hi);
1694
1695 addr[0] = addr_lo & 0xFF;
1696 addr[1] = (addr_lo >> 8) & 0xFF;
1697 addr[2] = (addr_lo >> 16) & 0xFF;
1698 addr[3] = (addr_lo >> 24) & 0xFF;
1699 addr[4] = addr_hi & 0xFF;
1700 addr[5] = (addr_hi >> 8) & 0xFF;
1701
1702 if (!is_valid_ether_addr(addr)) {
760db29b
PE
1703 if (!eth_platform_get_mac_address(&dev->udev->dev, addr)) {
1704 /* valid address present in Device Tree */
1705 netif_dbg(dev, ifup, dev->net,
1706 "MAC address read from Device Tree");
1707 } else if (((lan78xx_read_eeprom(dev, EEPROM_MAC_OFFSET,
1708 ETH_ALEN, addr) == 0) ||
1709 (lan78xx_read_otp(dev, EEPROM_MAC_OFFSET,
1710 ETH_ALEN, addr) == 0)) &&
1711 is_valid_ether_addr(addr)) {
1712 /* eeprom values are valid so use them */
1713 netif_dbg(dev, ifup, dev->net,
1714 "MAC address read from EEPROM");
55d7de9d
WH
1715 } else {
1716 /* generate random MAC */
6c1f0a1f 1717 eth_random_addr(addr);
55d7de9d
WH
1718 netif_dbg(dev, ifup, dev->net,
1719 "MAC address set to random addr");
1720 }
760db29b
PE
1721
1722 addr_lo = addr[0] | (addr[1] << 8) |
1723 (addr[2] << 16) | (addr[3] << 24);
1724 addr_hi = addr[4] | (addr[5] << 8);
1725
1726 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
1727 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
55d7de9d
WH
1728 }
1729
1730 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo);
1731 ret = lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_);
1732
1733 ether_addr_copy(dev->net->dev_addr, addr);
1734}
1735
ce85e13a
WH
1736/* MDIO read and write wrappers for phylib */
1737static int lan78xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx)
1738{
1739 struct lan78xx_net *dev = bus->priv;
1740 u32 val, addr;
1741 int ret;
1742
1743 ret = usb_autopm_get_interface(dev->intf);
1744 if (ret < 0)
1745 return ret;
1746
1747 mutex_lock(&dev->phy_mutex);
1748
1749 /* confirm MII not busy */
1750 ret = lan78xx_phy_wait_not_busy(dev);
1751 if (ret < 0)
1752 goto done;
1753
1754 /* set the address, index & direction (read from PHY) */
1755 addr = mii_access(phy_id, idx, MII_READ);
1756 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1757
1758 ret = lan78xx_phy_wait_not_busy(dev);
1759 if (ret < 0)
1760 goto done;
1761
1762 ret = lan78xx_read_reg(dev, MII_DATA, &val);
1763
1764 ret = (int)(val & 0xFFFF);
1765
1766done:
1767 mutex_unlock(&dev->phy_mutex);
1768 usb_autopm_put_interface(dev->intf);
02dc1f3d 1769
ce85e13a
WH
1770 return ret;
1771}
1772
1773static int lan78xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx,
1774 u16 regval)
1775{
1776 struct lan78xx_net *dev = bus->priv;
1777 u32 val, addr;
1778 int ret;
1779
1780 ret = usb_autopm_get_interface(dev->intf);
1781 if (ret < 0)
1782 return ret;
1783
1784 mutex_lock(&dev->phy_mutex);
1785
1786 /* confirm MII not busy */
1787 ret = lan78xx_phy_wait_not_busy(dev);
1788 if (ret < 0)
1789 goto done;
1790
1791 val = (u32)regval;
1792 ret = lan78xx_write_reg(dev, MII_DATA, val);
1793
1794 /* set the address, index & direction (write to PHY) */
1795 addr = mii_access(phy_id, idx, MII_WRITE);
1796 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1797
1798 ret = lan78xx_phy_wait_not_busy(dev);
1799 if (ret < 0)
1800 goto done;
1801
1802done:
1803 mutex_unlock(&dev->phy_mutex);
1804 usb_autopm_put_interface(dev->intf);
1805 return 0;
1806}
1807
1808static int lan78xx_mdio_init(struct lan78xx_net *dev)
55d7de9d 1809{
1827b067 1810 struct device_node *node;
ce85e13a 1811 int ret;
ce85e13a
WH
1812
1813 dev->mdiobus = mdiobus_alloc();
1814 if (!dev->mdiobus) {
1815 netdev_err(dev->net, "can't allocate MDIO bus\n");
1816 return -ENOMEM;
1817 }
1818
1819 dev->mdiobus->priv = (void *)dev;
1820 dev->mdiobus->read = lan78xx_mdiobus_read;
1821 dev->mdiobus->write = lan78xx_mdiobus_write;
1822 dev->mdiobus->name = "lan78xx-mdiobus";
1823
1824 snprintf(dev->mdiobus->id, MII_BUS_ID_SIZE, "usb-%03d:%03d",
1825 dev->udev->bus->busnum, dev->udev->devnum);
1826
87177ba6
WH
1827 switch (dev->chipid) {
1828 case ID_REV_CHIP_ID_7800_:
1829 case ID_REV_CHIP_ID_7850_:
ce85e13a
WH
1830 /* set to internal PHY id */
1831 dev->mdiobus->phy_mask = ~(1 << 1);
1832 break;
02dc1f3d
WH
1833 case ID_REV_CHIP_ID_7801_:
1834 /* scan thru PHYAD[2..0] */
1835 dev->mdiobus->phy_mask = ~(0xFF);
1836 break;
ce85e13a
WH
1837 }
1838
1827b067 1839 node = of_get_child_by_name(dev->udev->dev.of_node, "mdio");
00e798c7
FF
1840 ret = of_mdiobus_register(dev->mdiobus, node);
1841 if (node)
1827b067 1842 of_node_put(node);
ce85e13a
WH
1843 if (ret) {
1844 netdev_err(dev->net, "can't register MDIO bus\n");
e7f4dc35 1845 goto exit1;
ce85e13a
WH
1846 }
1847
1848 netdev_dbg(dev->net, "registered mdiobus bus %s\n", dev->mdiobus->id);
1849 return 0;
ce85e13a
WH
1850exit1:
1851 mdiobus_free(dev->mdiobus);
1852 return ret;
1853}
1854
1855static void lan78xx_remove_mdio(struct lan78xx_net *dev)
1856{
1857 mdiobus_unregister(dev->mdiobus);
ce85e13a
WH
1858 mdiobus_free(dev->mdiobus);
1859}
1860
1861static void lan78xx_link_status_change(struct net_device *net)
1862{
14437e3f
WH
1863 struct phy_device *phydev = net->phydev;
1864 int ret, temp;
1865
1866 /* At forced 100 F/H mode, chip may fail to set mode correctly
1867 * when cable is switched between long(~50+m) and short one.
1868 * As workaround, set to 10 before setting to 100
1869 * at forced 100 F/H mode.
1870 */
1871 if (!phydev->autoneg && (phydev->speed == 100)) {
1872 /* disable phy interrupt */
1873 temp = phy_read(phydev, LAN88XX_INT_MASK);
1874 temp &= ~LAN88XX_INT_MASK_MDINTPIN_EN_;
1875 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1876
1877 temp = phy_read(phydev, MII_BMCR);
1878 temp &= ~(BMCR_SPEED100 | BMCR_SPEED1000);
1879 phy_write(phydev, MII_BMCR, temp); /* set to 10 first */
1880 temp |= BMCR_SPEED100;
1881 phy_write(phydev, MII_BMCR, temp); /* set to 100 later */
1882
1883 /* clear pending interrupt generated while workaround */
1884 temp = phy_read(phydev, LAN88XX_INT_STS);
1885
1886 /* enable phy interrupt back */
1887 temp = phy_read(phydev, LAN88XX_INT_MASK);
1888 temp |= LAN88XX_INT_MASK_MDINTPIN_EN_;
1889 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1890 }
55d7de9d
WH
1891}
1892
cc89c323
WH
1893static int irq_map(struct irq_domain *d, unsigned int irq,
1894 irq_hw_number_t hwirq)
1895{
1896 struct irq_domain_data *data = d->host_data;
1897
1898 irq_set_chip_data(irq, data);
1899 irq_set_chip_and_handler(irq, data->irqchip, data->irq_handler);
1900 irq_set_noprobe(irq);
1901
1902 return 0;
1903}
1904
1905static void irq_unmap(struct irq_domain *d, unsigned int irq)
1906{
1907 irq_set_chip_and_handler(irq, NULL, NULL);
1908 irq_set_chip_data(irq, NULL);
1909}
1910
1911static const struct irq_domain_ops chip_domain_ops = {
1912 .map = irq_map,
1913 .unmap = irq_unmap,
1914};
1915
1916static void lan78xx_irq_mask(struct irq_data *irqd)
1917{
1918 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1919
1920 data->irqenable &= ~BIT(irqd_to_hwirq(irqd));
1921}
1922
1923static void lan78xx_irq_unmask(struct irq_data *irqd)
1924{
1925 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1926
1927 data->irqenable |= BIT(irqd_to_hwirq(irqd));
1928}
1929
1930static void lan78xx_irq_bus_lock(struct irq_data *irqd)
1931{
1932 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1933
1934 mutex_lock(&data->irq_lock);
1935}
1936
1937static void lan78xx_irq_bus_sync_unlock(struct irq_data *irqd)
1938{
1939 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1940 struct lan78xx_net *dev =
1941 container_of(data, struct lan78xx_net, domain_data);
1942 u32 buf;
1943 int ret;
1944
1945 /* call register access here because irq_bus_lock & irq_bus_sync_unlock
1946 * are only two callbacks executed in non-atomic contex.
1947 */
1948 ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1949 if (buf != data->irqenable)
1950 ret = lan78xx_write_reg(dev, INT_EP_CTL, data->irqenable);
1951
1952 mutex_unlock(&data->irq_lock);
1953}
1954
1955static struct irq_chip lan78xx_irqchip = {
1956 .name = "lan78xx-irqs",
1957 .irq_mask = lan78xx_irq_mask,
1958 .irq_unmask = lan78xx_irq_unmask,
1959 .irq_bus_lock = lan78xx_irq_bus_lock,
1960 .irq_bus_sync_unlock = lan78xx_irq_bus_sync_unlock,
1961};
1962
1963static int lan78xx_setup_irq_domain(struct lan78xx_net *dev)
1964{
1965 struct device_node *of_node;
1966 struct irq_domain *irqdomain;
1967 unsigned int irqmap = 0;
1968 u32 buf;
1969 int ret = 0;
1970
1971 of_node = dev->udev->dev.parent->of_node;
1972
1973 mutex_init(&dev->domain_data.irq_lock);
1974
1975 lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1976 dev->domain_data.irqenable = buf;
1977
1978 dev->domain_data.irqchip = &lan78xx_irqchip;
1979 dev->domain_data.irq_handler = handle_simple_irq;
1980
1981 irqdomain = irq_domain_add_simple(of_node, MAX_INT_EP, 0,
1982 &chip_domain_ops, &dev->domain_data);
1983 if (irqdomain) {
1984 /* create mapping for PHY interrupt */
1985 irqmap = irq_create_mapping(irqdomain, INT_EP_PHY);
1986 if (!irqmap) {
1987 irq_domain_remove(irqdomain);
1988
1989 irqdomain = NULL;
1990 ret = -EINVAL;
1991 }
1992 } else {
1993 ret = -EINVAL;
1994 }
1995
1996 dev->domain_data.irqdomain = irqdomain;
1997 dev->domain_data.phyirq = irqmap;
1998
1999 return ret;
2000}
2001
2002static void lan78xx_remove_irq_domain(struct lan78xx_net *dev)
2003{
2004 if (dev->domain_data.phyirq > 0) {
2005 irq_dispose_mapping(dev->domain_data.phyirq);
2006
2007 if (dev->domain_data.irqdomain)
2008 irq_domain_remove(dev->domain_data.irqdomain);
2009 }
2010 dev->domain_data.phyirq = 0;
2011 dev->domain_data.irqdomain = NULL;
2012}
2013
02dc1f3d
WH
2014static int lan8835_fixup(struct phy_device *phydev)
2015{
2016 int buf;
2017 int ret;
2018 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
2019
2020 /* LED2/PME_N/IRQ_N/RGMII_ID pin to IRQ_N mode */
5f613677 2021 buf = phy_read_mmd(phydev, MDIO_MMD_PCS, 0x8010);
02dc1f3d
WH
2022 buf &= ~0x1800;
2023 buf |= 0x0800;
5f613677 2024 phy_write_mmd(phydev, MDIO_MMD_PCS, 0x8010, buf);
02dc1f3d
WH
2025
2026 /* RGMII MAC TXC Delay Enable */
2027 ret = lan78xx_write_reg(dev, MAC_RGMII_ID,
2028 MAC_RGMII_ID_TXC_DELAY_EN_);
2029
2030 /* RGMII TX DLL Tune Adjust */
2031 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00);
2032
2033 dev->interface = PHY_INTERFACE_MODE_RGMII_TXID;
2034
2035 return 1;
2036}
2037
2038static int ksz9031rnx_fixup(struct phy_device *phydev)
2039{
2040 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
2041
2042 /* Micrel9301RNX PHY configuration */
2043 /* RGMII Control Signal Pad Skew */
5f613677 2044 phy_write_mmd(phydev, MDIO_MMD_WIS, 4, 0x0077);
02dc1f3d 2045 /* RGMII RX Data Pad Skew */
5f613677 2046 phy_write_mmd(phydev, MDIO_MMD_WIS, 5, 0x7777);
02dc1f3d 2047 /* RGMII RX Clock Pad Skew */
5f613677 2048 phy_write_mmd(phydev, MDIO_MMD_WIS, 8, 0x1FF);
02dc1f3d
WH
2049
2050 dev->interface = PHY_INTERFACE_MODE_RGMII_RXID;
2051
2052 return 1;
2053}
2054
89b36fb5 2055static struct phy_device *lan7801_phy_init(struct lan78xx_net *dev)
55d7de9d 2056{
89b36fb5 2057 u32 buf;
ce85e13a 2058 int ret;
89b36fb5
RC
2059 struct fixed_phy_status fphy_status = {
2060 .link = 1,
2061 .speed = SPEED_1000,
2062 .duplex = DUPLEX_FULL,
2063 };
3b51cc75 2064 struct phy_device *phydev;
55d7de9d 2065
ce85e13a
WH
2066 phydev = phy_find_first(dev->mdiobus);
2067 if (!phydev) {
89b36fb5
RC
2068 netdev_dbg(dev->net, "PHY Not Found!! Registering Fixed PHY\n");
2069 phydev = fixed_phy_register(PHY_POLL, &fphy_status, -1,
2070 NULL);
2071 if (IS_ERR(phydev)) {
2072 netdev_err(dev->net, "No PHY/fixed_PHY found\n");
2073 return NULL;
2074 }
2075 netdev_dbg(dev->net, "Registered FIXED PHY\n");
2076 dev->interface = PHY_INTERFACE_MODE_RGMII;
2077 ret = lan78xx_write_reg(dev, MAC_RGMII_ID,
2078 MAC_RGMII_ID_TXC_DELAY_EN_);
2079 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00);
2080 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2081 buf |= HW_CFG_CLK125_EN_;
2082 buf |= HW_CFG_REFCLK25_EN_;
2083 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2084 } else {
02dc1f3d
WH
2085 if (!phydev->drv) {
2086 netdev_err(dev->net, "no PHY driver found\n");
89b36fb5 2087 return NULL;
02dc1f3d 2088 }
02dc1f3d 2089 dev->interface = PHY_INTERFACE_MODE_RGMII;
02dc1f3d
WH
2090 /* external PHY fixup for KSZ9031RNX */
2091 ret = phy_register_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0,
2092 ksz9031rnx_fixup);
2093 if (ret < 0) {
7670ed7a 2094 netdev_err(dev->net, "Failed to register fixup for PHY_KSZ9031RNX\n");
89b36fb5 2095 return NULL;
02dc1f3d
WH
2096 }
2097 /* external PHY fixup for LAN8835 */
2098 ret = phy_register_fixup_for_uid(PHY_LAN8835, 0xfffffff0,
2099 lan8835_fixup);
2100 if (ret < 0) {
7670ed7a 2101 netdev_err(dev->net, "Failed to register fixup for PHY_LAN8835\n");
89b36fb5 2102 return NULL;
02dc1f3d
WH
2103 }
2104 /* add more external PHY fixup here if needed */
2105
2106 phydev->is_internal = false;
89b36fb5
RC
2107 }
2108 return phydev;
2109}
2110
2111static int lan78xx_phy_init(struct lan78xx_net *dev)
2112{
2113 int ret;
2114 u32 mii_adv;
2115 struct phy_device *phydev;
2116
2117 switch (dev->chipid) {
2118 case ID_REV_CHIP_ID_7801_:
2119 phydev = lan7801_phy_init(dev);
2120 if (!phydev) {
2121 netdev_err(dev->net, "lan7801: PHY Init Failed");
2122 return -EIO;
2123 }
2124 break;
2125
2126 case ID_REV_CHIP_ID_7800_:
2127 case ID_REV_CHIP_ID_7850_:
2128 phydev = phy_find_first(dev->mdiobus);
2129 if (!phydev) {
2130 netdev_err(dev->net, "no PHY found\n");
2131 return -EIO;
2132 }
2133 phydev->is_internal = true;
2134 dev->interface = PHY_INTERFACE_MODE_GMII;
2135 break;
2136
2137 default:
2138 netdev_err(dev->net, "Unknown CHIP ID found\n");
2139 return -EIO;
02dc1f3d
WH
2140 }
2141
cc89c323
WH
2142 /* if phyirq is not set, use polling mode in phylib */
2143 if (dev->domain_data.phyirq > 0)
2144 phydev->irq = dev->domain_data.phyirq;
2145 else
2146 phydev->irq = 0;
2147 netdev_dbg(dev->net, "phydev->irq = %d\n", phydev->irq);
e4953910 2148
f6e3ef3e
WH
2149 /* set to AUTOMDIX */
2150 phydev->mdix = ETH_TP_MDI_AUTO;
2151
ce85e13a
WH
2152 ret = phy_connect_direct(dev->net, phydev,
2153 lan78xx_link_status_change,
02dc1f3d 2154 dev->interface);
ce85e13a
WH
2155 if (ret) {
2156 netdev_err(dev->net, "can't attach PHY to %s\n",
2157 dev->mdiobus->id);
89b36fb5
RC
2158 if (dev->chipid == ID_REV_CHIP_ID_7801_) {
2159 if (phy_is_pseudo_fixed_link(phydev)) {
2160 fixed_phy_unregister(phydev);
2161 } else {
2162 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX,
2163 0xfffffff0);
2164 phy_unregister_fixup_for_uid(PHY_LAN8835,
2165 0xfffffff0);
2166 }
2167 }
ce85e13a
WH
2168 return -EIO;
2169 }
55d7de9d 2170
ce85e13a
WH
2171 /* MAC doesn't support 1000T Half */
2172 phydev->supported &= ~SUPPORTED_1000baseT_Half;
e270b2db 2173
349e0c5e
WH
2174 /* support both flow controls */
2175 dev->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);
2176 phydev->advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
2177 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
2178 phydev->advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
2179
1827b067
PE
2180 if (phydev->mdio.dev.of_node) {
2181 u32 reg;
2182 int len;
2183
2184 len = of_property_count_elems_of_size(phydev->mdio.dev.of_node,
2185 "microchip,led-modes",
2186 sizeof(u32));
2187 if (len >= 0) {
2188 /* Ensure the appropriate LEDs are enabled */
2189 lan78xx_read_reg(dev, HW_CFG, &reg);
2190 reg &= ~(HW_CFG_LED0_EN_ |
2191 HW_CFG_LED1_EN_ |
2192 HW_CFG_LED2_EN_ |
2193 HW_CFG_LED3_EN_);
2194 reg |= (len > 0) * HW_CFG_LED0_EN_ |
2195 (len > 1) * HW_CFG_LED1_EN_ |
2196 (len > 2) * HW_CFG_LED2_EN_ |
2197 (len > 3) * HW_CFG_LED3_EN_;
2198 lan78xx_write_reg(dev, HW_CFG, reg);
2199 }
2200 }
2201
ce85e13a
WH
2202 genphy_config_aneg(phydev);
2203
349e0c5e
WH
2204 dev->fc_autoneg = phydev->autoneg;
2205
55d7de9d
WH
2206 return 0;
2207}
2208
2209static int lan78xx_set_rx_max_frame_length(struct lan78xx_net *dev, int size)
2210{
2211 int ret = 0;
2212 u32 buf;
2213 bool rxenabled;
2214
2215 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2216
2217 rxenabled = ((buf & MAC_RX_RXEN_) != 0);
2218
2219 if (rxenabled) {
2220 buf &= ~MAC_RX_RXEN_;
2221 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2222 }
2223
2224 /* add 4 to size for FCS */
2225 buf &= ~MAC_RX_MAX_SIZE_MASK_;
2226 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_);
2227
2228 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2229
2230 if (rxenabled) {
2231 buf |= MAC_RX_RXEN_;
2232 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2233 }
2234
2235 return 0;
2236}
2237
2238static int unlink_urbs(struct lan78xx_net *dev, struct sk_buff_head *q)
2239{
2240 struct sk_buff *skb;
2241 unsigned long flags;
2242 int count = 0;
2243
2244 spin_lock_irqsave(&q->lock, flags);
2245 while (!skb_queue_empty(q)) {
2246 struct skb_data *entry;
2247 struct urb *urb;
2248 int ret;
2249
2250 skb_queue_walk(q, skb) {
2251 entry = (struct skb_data *)skb->cb;
2252 if (entry->state != unlink_start)
2253 goto found;
2254 }
2255 break;
2256found:
2257 entry->state = unlink_start;
2258 urb = entry->urb;
2259
2260 /* Get reference count of the URB to avoid it to be
2261 * freed during usb_unlink_urb, which may trigger
2262 * use-after-free problem inside usb_unlink_urb since
2263 * usb_unlink_urb is always racing with .complete
2264 * handler(include defer_bh).
2265 */
2266 usb_get_urb(urb);
2267 spin_unlock_irqrestore(&q->lock, flags);
2268 /* during some PM-driven resume scenarios,
2269 * these (async) unlinks complete immediately
2270 */
2271 ret = usb_unlink_urb(urb);
2272 if (ret != -EINPROGRESS && ret != 0)
2273 netdev_dbg(dev->net, "unlink urb err, %d\n", ret);
2274 else
2275 count++;
2276 usb_put_urb(urb);
2277 spin_lock_irqsave(&q->lock, flags);
2278 }
2279 spin_unlock_irqrestore(&q->lock, flags);
2280 return count;
2281}
2282
2283static int lan78xx_change_mtu(struct net_device *netdev, int new_mtu)
2284{
2285 struct lan78xx_net *dev = netdev_priv(netdev);
2286 int ll_mtu = new_mtu + netdev->hard_header_len;
2287 int old_hard_mtu = dev->hard_mtu;
2288 int old_rx_urb_size = dev->rx_urb_size;
2289 int ret;
2290
55d7de9d
WH
2291 /* no second zero-length packet read wanted after mtu-sized packets */
2292 if ((ll_mtu % dev->maxpacket) == 0)
2293 return -EDOM;
2294
2259b7a6 2295 ret = lan78xx_set_rx_max_frame_length(dev, new_mtu + VLAN_ETH_HLEN);
55d7de9d
WH
2296
2297 netdev->mtu = new_mtu;
2298
2299 dev->hard_mtu = netdev->mtu + netdev->hard_header_len;
2300 if (dev->rx_urb_size == old_hard_mtu) {
2301 dev->rx_urb_size = dev->hard_mtu;
2302 if (dev->rx_urb_size > old_rx_urb_size) {
2303 if (netif_running(dev->net)) {
2304 unlink_urbs(dev, &dev->rxq);
2305 tasklet_schedule(&dev->bh);
2306 }
2307 }
2308 }
2309
2310 return 0;
2311}
2312
e0c79ff6 2313static int lan78xx_set_mac_addr(struct net_device *netdev, void *p)
55d7de9d
WH
2314{
2315 struct lan78xx_net *dev = netdev_priv(netdev);
2316 struct sockaddr *addr = p;
2317 u32 addr_lo, addr_hi;
2318 int ret;
2319
2320 if (netif_running(netdev))
2321 return -EBUSY;
2322
2323 if (!is_valid_ether_addr(addr->sa_data))
2324 return -EADDRNOTAVAIL;
2325
2326 ether_addr_copy(netdev->dev_addr, addr->sa_data);
2327
2328 addr_lo = netdev->dev_addr[0] |
2329 netdev->dev_addr[1] << 8 |
2330 netdev->dev_addr[2] << 16 |
2331 netdev->dev_addr[3] << 24;
2332 addr_hi = netdev->dev_addr[4] |
2333 netdev->dev_addr[5] << 8;
2334
2335 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
2336 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
2337
2338 return 0;
2339}
2340
2341/* Enable or disable Rx checksum offload engine */
2342static int lan78xx_set_features(struct net_device *netdev,
2343 netdev_features_t features)
2344{
2345 struct lan78xx_net *dev = netdev_priv(netdev);
2346 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2347 unsigned long flags;
2348 int ret;
2349
2350 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
2351
2352 if (features & NETIF_F_RXCSUM) {
2353 pdata->rfe_ctl |= RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_;
2354 pdata->rfe_ctl |= RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_;
2355 } else {
2356 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_);
2357 pdata->rfe_ctl &= ~(RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_);
2358 }
2359
2360 if (features & NETIF_F_HW_VLAN_CTAG_RX)
ec21ecf0
DS
2361 pdata->rfe_ctl |= RFE_CTL_VLAN_STRIP_;
2362 else
2363 pdata->rfe_ctl &= ~RFE_CTL_VLAN_STRIP_;
2364
4a27327b 2365 if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
55d7de9d
WH
2366 pdata->rfe_ctl |= RFE_CTL_VLAN_FILTER_;
2367 else
2368 pdata->rfe_ctl &= ~RFE_CTL_VLAN_FILTER_;
2369
2370 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
2371
2372 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2373
2374 return 0;
2375}
2376
2377static void lan78xx_deferred_vlan_write(struct work_struct *param)
2378{
2379 struct lan78xx_priv *pdata =
2380 container_of(param, struct lan78xx_priv, set_vlan);
2381 struct lan78xx_net *dev = pdata->dev;
2382
2383 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 0,
2384 DP_SEL_VHF_VLAN_LEN, pdata->vlan_table);
2385}
2386
2387static int lan78xx_vlan_rx_add_vid(struct net_device *netdev,
2388 __be16 proto, u16 vid)
2389{
2390 struct lan78xx_net *dev = netdev_priv(netdev);
2391 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2392 u16 vid_bit_index;
2393 u16 vid_dword_index;
2394
2395 vid_dword_index = (vid >> 5) & 0x7F;
2396 vid_bit_index = vid & 0x1F;
2397
2398 pdata->vlan_table[vid_dword_index] |= (1 << vid_bit_index);
2399
2400 /* defer register writes to a sleepable context */
2401 schedule_work(&pdata->set_vlan);
2402
2403 return 0;
2404}
2405
2406static int lan78xx_vlan_rx_kill_vid(struct net_device *netdev,
2407 __be16 proto, u16 vid)
2408{
2409 struct lan78xx_net *dev = netdev_priv(netdev);
2410 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2411 u16 vid_bit_index;
2412 u16 vid_dword_index;
2413
2414 vid_dword_index = (vid >> 5) & 0x7F;
2415 vid_bit_index = vid & 0x1F;
2416
2417 pdata->vlan_table[vid_dword_index] &= ~(1 << vid_bit_index);
2418
2419 /* defer register writes to a sleepable context */
2420 schedule_work(&pdata->set_vlan);
2421
2422 return 0;
2423}
2424
2425static void lan78xx_init_ltm(struct lan78xx_net *dev)
2426{
2427 int ret;
2428 u32 buf;
2429 u32 regs[6] = { 0 };
2430
2431 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
2432 if (buf & USB_CFG1_LTM_ENABLE_) {
2433 u8 temp[2];
2434 /* Get values from EEPROM first */
2435 if (lan78xx_read_eeprom(dev, 0x3F, 2, temp) == 0) {
2436 if (temp[0] == 24) {
2437 ret = lan78xx_read_raw_eeprom(dev,
2438 temp[1] * 2,
2439 24,
2440 (u8 *)regs);
2441 if (ret < 0)
2442 return;
2443 }
2444 } else if (lan78xx_read_otp(dev, 0x3F, 2, temp) == 0) {
2445 if (temp[0] == 24) {
2446 ret = lan78xx_read_raw_otp(dev,
2447 temp[1] * 2,
2448 24,
2449 (u8 *)regs);
2450 if (ret < 0)
2451 return;
2452 }
2453 }
2454 }
2455
2456 lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]);
2457 lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]);
2458 lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]);
2459 lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]);
2460 lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]);
2461 lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]);
2462}
2463
2464static int lan78xx_reset(struct lan78xx_net *dev)
2465{
2466 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2467 u32 buf;
2468 int ret = 0;
2469 unsigned long timeout;
e69647a1 2470 u8 sig;
55d7de9d
WH
2471
2472 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2473 buf |= HW_CFG_LRST_;
2474 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2475
2476 timeout = jiffies + HZ;
2477 do {
2478 mdelay(1);
2479 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2480 if (time_after(jiffies, timeout)) {
2481 netdev_warn(dev->net,
2482 "timeout on completion of LiteReset");
2483 return -EIO;
2484 }
2485 } while (buf & HW_CFG_LRST_);
2486
2487 lan78xx_init_mac_address(dev);
2488
ce85e13a
WH
2489 /* save DEVID for later usage */
2490 ret = lan78xx_read_reg(dev, ID_REV, &buf);
87177ba6
WH
2491 dev->chipid = (buf & ID_REV_CHIP_ID_MASK_) >> 16;
2492 dev->chiprev = buf & ID_REV_CHIP_REV_MASK_;
ce85e13a 2493
55d7de9d
WH
2494 /* Respond to the IN token with a NAK */
2495 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2496 buf |= USB_CFG_BIR_;
2497 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2498
2499 /* Init LTM */
2500 lan78xx_init_ltm(dev);
2501
55d7de9d
WH
2502 if (dev->udev->speed == USB_SPEED_SUPER) {
2503 buf = DEFAULT_BURST_CAP_SIZE / SS_USB_PKT_SIZE;
2504 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2505 dev->rx_qlen = 4;
2506 dev->tx_qlen = 4;
2507 } else if (dev->udev->speed == USB_SPEED_HIGH) {
2508 buf = DEFAULT_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
2509 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2510 dev->rx_qlen = RX_MAX_QUEUE_MEMORY / dev->rx_urb_size;
2511 dev->tx_qlen = RX_MAX_QUEUE_MEMORY / dev->hard_mtu;
2512 } else {
2513 buf = DEFAULT_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
2514 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2515 dev->rx_qlen = 4;
a5b1379a 2516 dev->tx_qlen = 4;
55d7de9d
WH
2517 }
2518
2519 ret = lan78xx_write_reg(dev, BURST_CAP, buf);
2520 ret = lan78xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
2521
2522 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2523 buf |= HW_CFG_MEF_;
2524 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2525
2526 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2527 buf |= USB_CFG_BCE_;
2528 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2529
2530 /* set FIFO sizes */
2531 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
2532 ret = lan78xx_write_reg(dev, FCT_RX_FIFO_END, buf);
2533
2534 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
2535 ret = lan78xx_write_reg(dev, FCT_TX_FIFO_END, buf);
2536
2537 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
2538 ret = lan78xx_write_reg(dev, FLOW, 0);
2539 ret = lan78xx_write_reg(dev, FCT_FLOW, 0);
2540
2541 /* Don't need rfe_ctl_lock during initialisation */
2542 ret = lan78xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
2543 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_ | RFE_CTL_DA_PERFECT_;
2544 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2545
2546 /* Enable or disable checksum offload engines */
2547 lan78xx_set_features(dev->net, dev->net->features);
2548
2549 lan78xx_set_multicast(dev->net);
2550
2551 /* reset PHY */
2552 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2553 buf |= PMT_CTL_PHY_RST_;
2554 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
2555
2556 timeout = jiffies + HZ;
2557 do {
2558 mdelay(1);
2559 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2560 if (time_after(jiffies, timeout)) {
2561 netdev_warn(dev->net, "timeout waiting for PHY Reset");
2562 return -EIO;
2563 }
6c595b03 2564 } while ((buf & PMT_CTL_PHY_RST_) || !(buf & PMT_CTL_READY_));
55d7de9d 2565
55d7de9d 2566 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
02dc1f3d
WH
2567 /* LAN7801 only has RGMII mode */
2568 if (dev->chipid == ID_REV_CHIP_ID_7801_)
2569 buf &= ~MAC_CR_GMII_EN_;
e69647a1
RC
2570
2571 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
2572 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
2573 if (!ret && sig != EEPROM_INDICATOR) {
2574 /* Implies there is no external eeprom. Set mac speed */
2575 netdev_info(dev->net, "No External EEPROM. Setting MAC Speed\n");
2576 buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_;
2577 }
2578 }
55d7de9d
WH
2579 ret = lan78xx_write_reg(dev, MAC_CR, buf);
2580
55d7de9d
WH
2581 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
2582 buf |= MAC_TX_TXEN_;
2583 ret = lan78xx_write_reg(dev, MAC_TX, buf);
2584
2585 ret = lan78xx_read_reg(dev, FCT_TX_CTL, &buf);
2586 buf |= FCT_TX_CTL_EN_;
2587 ret = lan78xx_write_reg(dev, FCT_TX_CTL, buf);
2588
2259b7a6
DS
2589 ret = lan78xx_set_rx_max_frame_length(dev,
2590 dev->net->mtu + VLAN_ETH_HLEN);
55d7de9d
WH
2591
2592 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2593 buf |= MAC_RX_RXEN_;
2594 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2595
2596 ret = lan78xx_read_reg(dev, FCT_RX_CTL, &buf);
2597 buf |= FCT_RX_CTL_EN_;
2598 ret = lan78xx_write_reg(dev, FCT_RX_CTL, buf);
2599
55d7de9d
WH
2600 return 0;
2601}
2602
20ff5565
WH
2603static void lan78xx_init_stats(struct lan78xx_net *dev)
2604{
2605 u32 *p;
2606 int i;
2607
2608 /* initialize for stats update
2609 * some counters are 20bits and some are 32bits
2610 */
2611 p = (u32 *)&dev->stats.rollover_max;
2612 for (i = 0; i < (sizeof(dev->stats.rollover_max) / (sizeof(u32))); i++)
2613 p[i] = 0xFFFFF;
2614
2615 dev->stats.rollover_max.rx_unicast_byte_count = 0xFFFFFFFF;
2616 dev->stats.rollover_max.rx_broadcast_byte_count = 0xFFFFFFFF;
2617 dev->stats.rollover_max.rx_multicast_byte_count = 0xFFFFFFFF;
2618 dev->stats.rollover_max.eee_rx_lpi_transitions = 0xFFFFFFFF;
2619 dev->stats.rollover_max.eee_rx_lpi_time = 0xFFFFFFFF;
2620 dev->stats.rollover_max.tx_unicast_byte_count = 0xFFFFFFFF;
2621 dev->stats.rollover_max.tx_broadcast_byte_count = 0xFFFFFFFF;
2622 dev->stats.rollover_max.tx_multicast_byte_count = 0xFFFFFFFF;
2623 dev->stats.rollover_max.eee_tx_lpi_transitions = 0xFFFFFFFF;
2624 dev->stats.rollover_max.eee_tx_lpi_time = 0xFFFFFFFF;
2625
fed56079 2626 set_bit(EVENT_STAT_UPDATE, &dev->flags);
20ff5565
WH
2627}
2628
55d7de9d
WH
2629static int lan78xx_open(struct net_device *net)
2630{
2631 struct lan78xx_net *dev = netdev_priv(net);
2632 int ret;
2633
2634 ret = usb_autopm_get_interface(dev->intf);
2635 if (ret < 0)
2636 goto out;
2637
92571a1a
AG
2638 phy_start(net->phydev);
2639
2640 netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
ce85e13a 2641
55d7de9d
WH
2642 /* for Link Check */
2643 if (dev->urb_intr) {
2644 ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL);
2645 if (ret < 0) {
2646 netif_err(dev, ifup, dev->net,
2647 "intr submit %d\n", ret);
2648 goto done;
2649 }
2650 }
2651
20ff5565
WH
2652 lan78xx_init_stats(dev);
2653
55d7de9d
WH
2654 set_bit(EVENT_DEV_OPEN, &dev->flags);
2655
2656 netif_start_queue(net);
2657
2658 dev->link_on = false;
2659
2660 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
2661done:
2662 usb_autopm_put_interface(dev->intf);
2663
2664out:
2665 return ret;
2666}
2667
2668static void lan78xx_terminate_urbs(struct lan78xx_net *dev)
2669{
2670 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(unlink_wakeup);
2671 DECLARE_WAITQUEUE(wait, current);
2672 int temp;
2673
2674 /* ensure there are no more active urbs */
2675 add_wait_queue(&unlink_wakeup, &wait);
2676 set_current_state(TASK_UNINTERRUPTIBLE);
2677 dev->wait = &unlink_wakeup;
2678 temp = unlink_urbs(dev, &dev->txq) + unlink_urbs(dev, &dev->rxq);
2679
2680 /* maybe wait for deletions to finish. */
2681 while (!skb_queue_empty(&dev->rxq) &&
2682 !skb_queue_empty(&dev->txq) &&
2683 !skb_queue_empty(&dev->done)) {
2684 schedule_timeout(msecs_to_jiffies(UNLINK_TIMEOUT_MS));
2685 set_current_state(TASK_UNINTERRUPTIBLE);
2686 netif_dbg(dev, ifdown, dev->net,
2687 "waited for %d urb completions\n", temp);
2688 }
2689 set_current_state(TASK_RUNNING);
2690 dev->wait = NULL;
2691 remove_wait_queue(&unlink_wakeup, &wait);
2692}
2693
e0c79ff6 2694static int lan78xx_stop(struct net_device *net)
55d7de9d
WH
2695{
2696 struct lan78xx_net *dev = netdev_priv(net);
2697
20ff5565
WH
2698 if (timer_pending(&dev->stat_monitor))
2699 del_timer_sync(&dev->stat_monitor);
2700
92571a1a
AG
2701 if (net->phydev)
2702 phy_stop(net->phydev);
ce85e13a 2703
55d7de9d
WH
2704 clear_bit(EVENT_DEV_OPEN, &dev->flags);
2705 netif_stop_queue(net);
2706
2707 netif_info(dev, ifdown, dev->net,
2708 "stop stats: rx/tx %lu/%lu, errs %lu/%lu\n",
2709 net->stats.rx_packets, net->stats.tx_packets,
2710 net->stats.rx_errors, net->stats.tx_errors);
2711
2712 lan78xx_terminate_urbs(dev);
2713
2714 usb_kill_urb(dev->urb_intr);
2715
2716 skb_queue_purge(&dev->rxq_pause);
2717
2718 /* deferred work (task, timer, softirq) must also stop.
2719 * can't flush_scheduled_work() until we drop rtnl (later),
2720 * else workers could deadlock; so make workers a NOP.
2721 */
2722 dev->flags = 0;
2723 cancel_delayed_work_sync(&dev->wq);
2724 tasklet_kill(&dev->bh);
2725
2726 usb_autopm_put_interface(dev->intf);
2727
2728 return 0;
2729}
2730
2731static int lan78xx_linearize(struct sk_buff *skb)
2732{
2733 return skb_linearize(skb);
2734}
2735
2736static struct sk_buff *lan78xx_tx_prep(struct lan78xx_net *dev,
2737 struct sk_buff *skb, gfp_t flags)
2738{
2739 u32 tx_cmd_a, tx_cmd_b;
2740
d4ca7359 2741 if (skb_cow_head(skb, TX_OVERHEAD)) {
55d7de9d 2742 dev_kfree_skb_any(skb);
d4ca7359 2743 return NULL;
55d7de9d
WH
2744 }
2745
2746 if (lan78xx_linearize(skb) < 0)
2747 return NULL;
2748
2749 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN_MASK_) | TX_CMD_A_FCS_;
2750
2751 if (skb->ip_summed == CHECKSUM_PARTIAL)
2752 tx_cmd_a |= TX_CMD_A_IPE_ | TX_CMD_A_TPE_;
2753
2754 tx_cmd_b = 0;
2755 if (skb_is_gso(skb)) {
2756 u16 mss = max(skb_shinfo(skb)->gso_size, TX_CMD_B_MSS_MIN_);
2757
2758 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT_) & TX_CMD_B_MSS_MASK_;
2759
2760 tx_cmd_a |= TX_CMD_A_LSO_;
2761 }
2762
2763 if (skb_vlan_tag_present(skb)) {
2764 tx_cmd_a |= TX_CMD_A_IVTG_;
2765 tx_cmd_b |= skb_vlan_tag_get(skb) & TX_CMD_B_VTAG_MASK_;
2766 }
2767
2768 skb_push(skb, 4);
2769 cpu_to_le32s(&tx_cmd_b);
2770 memcpy(skb->data, &tx_cmd_b, 4);
2771
2772 skb_push(skb, 4);
2773 cpu_to_le32s(&tx_cmd_a);
2774 memcpy(skb->data, &tx_cmd_a, 4);
2775
2776 return skb;
2777}
2778
2779static enum skb_state defer_bh(struct lan78xx_net *dev, struct sk_buff *skb,
2780 struct sk_buff_head *list, enum skb_state state)
2781{
2782 unsigned long flags;
2783 enum skb_state old_state;
2784 struct skb_data *entry = (struct skb_data *)skb->cb;
2785
2786 spin_lock_irqsave(&list->lock, flags);
2787 old_state = entry->state;
2788 entry->state = state;
55d7de9d
WH
2789
2790 __skb_unlink(skb, list);
2791 spin_unlock(&list->lock);
2792 spin_lock(&dev->done.lock);
55d7de9d
WH
2793
2794 __skb_queue_tail(&dev->done, skb);
2795 if (skb_queue_len(&dev->done) == 1)
2796 tasklet_schedule(&dev->bh);
2797 spin_unlock_irqrestore(&dev->done.lock, flags);
2798
2799 return old_state;
2800}
2801
2802static void tx_complete(struct urb *urb)
2803{
2804 struct sk_buff *skb = (struct sk_buff *)urb->context;
2805 struct skb_data *entry = (struct skb_data *)skb->cb;
2806 struct lan78xx_net *dev = entry->dev;
2807
2808 if (urb->status == 0) {
74d79a2e 2809 dev->net->stats.tx_packets += entry->num_of_packet;
55d7de9d
WH
2810 dev->net->stats.tx_bytes += entry->length;
2811 } else {
2812 dev->net->stats.tx_errors++;
2813
2814 switch (urb->status) {
2815 case -EPIPE:
2816 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
2817 break;
2818
2819 /* software-driven interface shutdown */
2820 case -ECONNRESET:
2821 case -ESHUTDOWN:
2822 break;
2823
2824 case -EPROTO:
2825 case -ETIME:
2826 case -EILSEQ:
2827 netif_stop_queue(dev->net);
2828 break;
2829 default:
2830 netif_dbg(dev, tx_err, dev->net,
2831 "tx err %d\n", entry->urb->status);
2832 break;
2833 }
2834 }
2835
2836 usb_autopm_put_interface_async(dev->intf);
2837
81c38e81 2838 defer_bh(dev, skb, &dev->txq, tx_done);
55d7de9d
WH
2839}
2840
2841static void lan78xx_queue_skb(struct sk_buff_head *list,
2842 struct sk_buff *newsk, enum skb_state state)
2843{
2844 struct skb_data *entry = (struct skb_data *)newsk->cb;
2845
2846 __skb_queue_tail(list, newsk);
2847 entry->state = state;
2848}
2849
e0c79ff6
BX
2850static netdev_tx_t
2851lan78xx_start_xmit(struct sk_buff *skb, struct net_device *net)
55d7de9d
WH
2852{
2853 struct lan78xx_net *dev = netdev_priv(net);
81c38e81 2854 struct sk_buff *skb2 = NULL;
55d7de9d 2855
81c38e81 2856 if (skb) {
55d7de9d 2857 skb_tx_timestamp(skb);
81c38e81
WH
2858 skb2 = lan78xx_tx_prep(dev, skb, GFP_ATOMIC);
2859 }
55d7de9d 2860
81c38e81
WH
2861 if (skb2) {
2862 skb_queue_tail(&dev->txq_pend, skb2);
55d7de9d 2863
4b2a4a96
WH
2864 /* throttle TX patch at slower than SUPER SPEED USB */
2865 if ((dev->udev->speed < USB_SPEED_SUPER) &&
2866 (skb_queue_len(&dev->txq_pend) > 10))
55d7de9d
WH
2867 netif_stop_queue(net);
2868 } else {
2869 netif_dbg(dev, tx_err, dev->net,
2870 "lan78xx_tx_prep return NULL\n");
2871 dev->net->stats.tx_errors++;
2872 dev->net->stats.tx_dropped++;
2873 }
2874
2875 tasklet_schedule(&dev->bh);
2876
2877 return NETDEV_TX_OK;
2878}
2879
e0c79ff6
BX
2880static int
2881lan78xx_get_endpoints(struct lan78xx_net *dev, struct usb_interface *intf)
55d7de9d
WH
2882{
2883 int tmp;
2884 struct usb_host_interface *alt = NULL;
2885 struct usb_host_endpoint *in = NULL, *out = NULL;
2886 struct usb_host_endpoint *status = NULL;
2887
2888 for (tmp = 0; tmp < intf->num_altsetting; tmp++) {
2889 unsigned ep;
2890
2891 in = NULL;
2892 out = NULL;
2893 status = NULL;
2894 alt = intf->altsetting + tmp;
2895
2896 for (ep = 0; ep < alt->desc.bNumEndpoints; ep++) {
2897 struct usb_host_endpoint *e;
2898 int intr = 0;
2899
2900 e = alt->endpoint + ep;
2901 switch (e->desc.bmAttributes) {
2902 case USB_ENDPOINT_XFER_INT:
2903 if (!usb_endpoint_dir_in(&e->desc))
2904 continue;
2905 intr = 1;
2906 /* FALLTHROUGH */
2907 case USB_ENDPOINT_XFER_BULK:
2908 break;
2909 default:
2910 continue;
2911 }
2912 if (usb_endpoint_dir_in(&e->desc)) {
2913 if (!intr && !in)
2914 in = e;
2915 else if (intr && !status)
2916 status = e;
2917 } else {
2918 if (!out)
2919 out = e;
2920 }
2921 }
2922 if (in && out)
2923 break;
2924 }
2925 if (!alt || !in || !out)
2926 return -EINVAL;
2927
2928 dev->pipe_in = usb_rcvbulkpipe(dev->udev,
2929 in->desc.bEndpointAddress &
2930 USB_ENDPOINT_NUMBER_MASK);
2931 dev->pipe_out = usb_sndbulkpipe(dev->udev,
2932 out->desc.bEndpointAddress &
2933 USB_ENDPOINT_NUMBER_MASK);
2934 dev->ep_intr = status;
2935
2936 return 0;
2937}
2938
2939static int lan78xx_bind(struct lan78xx_net *dev, struct usb_interface *intf)
2940{
2941 struct lan78xx_priv *pdata = NULL;
2942 int ret;
2943 int i;
2944
2945 ret = lan78xx_get_endpoints(dev, intf);
2946
2947 dev->data[0] = (unsigned long)kzalloc(sizeof(*pdata), GFP_KERNEL);
2948
2949 pdata = (struct lan78xx_priv *)(dev->data[0]);
2950 if (!pdata) {
2951 netdev_warn(dev->net, "Unable to allocate lan78xx_priv");
2952 return -ENOMEM;
2953 }
2954
2955 pdata->dev = dev;
2956
2957 spin_lock_init(&pdata->rfe_ctl_lock);
2958 mutex_init(&pdata->dataport_mutex);
2959
2960 INIT_WORK(&pdata->set_multicast, lan78xx_deferred_multicast_write);
2961
2962 for (i = 0; i < DP_SEL_VHF_VLAN_LEN; i++)
2963 pdata->vlan_table[i] = 0;
2964
2965 INIT_WORK(&pdata->set_vlan, lan78xx_deferred_vlan_write);
2966
2967 dev->net->features = 0;
2968
2969 if (DEFAULT_TX_CSUM_ENABLE)
2970 dev->net->features |= NETIF_F_HW_CSUM;
2971
2972 if (DEFAULT_RX_CSUM_ENABLE)
2973 dev->net->features |= NETIF_F_RXCSUM;
2974
2975 if (DEFAULT_TSO_CSUM_ENABLE)
2976 dev->net->features |= NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_SG;
2977
ec21ecf0
DS
2978 if (DEFAULT_VLAN_RX_OFFLOAD)
2979 dev->net->features |= NETIF_F_HW_VLAN_CTAG_RX;
2980
4a27327b
DS
2981 if (DEFAULT_VLAN_FILTER_ENABLE)
2982 dev->net->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2983
55d7de9d
WH
2984 dev->net->hw_features = dev->net->features;
2985
cc89c323
WH
2986 ret = lan78xx_setup_irq_domain(dev);
2987 if (ret < 0) {
2988 netdev_warn(dev->net,
2989 "lan78xx_setup_irq_domain() failed : %d", ret);
2d2d99ec 2990 goto out1;
cc89c323
WH
2991 }
2992
0573f94b
NS
2993 dev->net->hard_header_len += TX_OVERHEAD;
2994 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
2995
55d7de9d
WH
2996 /* Init all registers */
2997 ret = lan78xx_reset(dev);
2d2d99ec
RC
2998 if (ret) {
2999 netdev_warn(dev->net, "Registers INIT FAILED....");
3000 goto out2;
3001 }
55d7de9d 3002
fb52c3b5 3003 ret = lan78xx_mdio_init(dev);
2d2d99ec
RC
3004 if (ret) {
3005 netdev_warn(dev->net, "MDIO INIT FAILED.....");
3006 goto out2;
3007 }
ce85e13a 3008
55d7de9d
WH
3009 dev->net->flags |= IFF_MULTICAST;
3010
3011 pdata->wol = WAKE_MAGIC;
3012
fb52c3b5 3013 return ret;
2d2d99ec
RC
3014
3015out2:
3016 lan78xx_remove_irq_domain(dev);
3017
3018out1:
3019 netdev_warn(dev->net, "Bind routine FAILED");
3020 cancel_work_sync(&pdata->set_multicast);
3021 cancel_work_sync(&pdata->set_vlan);
3022 kfree(pdata);
3023 return ret;
55d7de9d
WH
3024}
3025
3026static void lan78xx_unbind(struct lan78xx_net *dev, struct usb_interface *intf)
3027{
3028 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
3029
cc89c323
WH
3030 lan78xx_remove_irq_domain(dev);
3031
ce85e13a
WH
3032 lan78xx_remove_mdio(dev);
3033
55d7de9d 3034 if (pdata) {
2d2d99ec
RC
3035 cancel_work_sync(&pdata->set_multicast);
3036 cancel_work_sync(&pdata->set_vlan);
55d7de9d
WH
3037 netif_dbg(dev, ifdown, dev->net, "free pdata");
3038 kfree(pdata);
3039 pdata = NULL;
3040 dev->data[0] = 0;
3041 }
3042}
3043
3044static void lan78xx_rx_csum_offload(struct lan78xx_net *dev,
3045 struct sk_buff *skb,
3046 u32 rx_cmd_a, u32 rx_cmd_b)
3047{
9343ac87
DS
3048 /* HW Checksum offload appears to be flawed if used when not stripping
3049 * VLAN headers. Drop back to S/W checksums under these conditions.
3050 */
55d7de9d 3051 if (!(dev->net->features & NETIF_F_RXCSUM) ||
9343ac87
DS
3052 unlikely(rx_cmd_a & RX_CMD_A_ICSM_) ||
3053 ((rx_cmd_a & RX_CMD_A_FVTG_) &&
3054 !(dev->net->features & NETIF_F_HW_VLAN_CTAG_RX))) {
55d7de9d
WH
3055 skb->ip_summed = CHECKSUM_NONE;
3056 } else {
3057 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT_));
3058 skb->ip_summed = CHECKSUM_COMPLETE;
3059 }
3060}
3061
ec21ecf0
DS
3062static void lan78xx_rx_vlan_offload(struct lan78xx_net *dev,
3063 struct sk_buff *skb,
3064 u32 rx_cmd_a, u32 rx_cmd_b)
3065{
3066 if ((dev->net->features & NETIF_F_HW_VLAN_CTAG_RX) &&
3067 (rx_cmd_a & RX_CMD_A_FVTG_))
3068 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
3069 (rx_cmd_b & 0xffff));
3070}
3071
e0c79ff6 3072static void lan78xx_skb_return(struct lan78xx_net *dev, struct sk_buff *skb)
55d7de9d
WH
3073{
3074 int status;
3075
3076 if (test_bit(EVENT_RX_PAUSED, &dev->flags)) {
3077 skb_queue_tail(&dev->rxq_pause, skb);
3078 return;
3079 }
3080
55d7de9d
WH
3081 dev->net->stats.rx_packets++;
3082 dev->net->stats.rx_bytes += skb->len;
3083
74d79a2e
WH
3084 skb->protocol = eth_type_trans(skb, dev->net);
3085
55d7de9d
WH
3086 netif_dbg(dev, rx_status, dev->net, "< rx, len %zu, type 0x%x\n",
3087 skb->len + sizeof(struct ethhdr), skb->protocol);
3088 memset(skb->cb, 0, sizeof(struct skb_data));
3089
3090 if (skb_defer_rx_timestamp(skb))
3091 return;
3092
3093 status = netif_rx(skb);
3094 if (status != NET_RX_SUCCESS)
3095 netif_dbg(dev, rx_err, dev->net,
3096 "netif_rx status %d\n", status);
3097}
3098
3099static int lan78xx_rx(struct lan78xx_net *dev, struct sk_buff *skb)
3100{
3101 if (skb->len < dev->net->hard_header_len)
3102 return 0;
3103
3104 while (skb->len > 0) {
3105 u32 rx_cmd_a, rx_cmd_b, align_count, size;
3106 u16 rx_cmd_c;
3107 struct sk_buff *skb2;
3108 unsigned char *packet;
3109
3110 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
3111 le32_to_cpus(&rx_cmd_a);
3112 skb_pull(skb, sizeof(rx_cmd_a));
3113
3114 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
3115 le32_to_cpus(&rx_cmd_b);
3116 skb_pull(skb, sizeof(rx_cmd_b));
3117
3118 memcpy(&rx_cmd_c, skb->data, sizeof(rx_cmd_c));
3119 le16_to_cpus(&rx_cmd_c);
3120 skb_pull(skb, sizeof(rx_cmd_c));
3121
3122 packet = skb->data;
3123
3124 /* get the packet length */
3125 size = (rx_cmd_a & RX_CMD_A_LEN_MASK_);
3126 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
3127
3128 if (unlikely(rx_cmd_a & RX_CMD_A_RED_)) {
3129 netif_dbg(dev, rx_err, dev->net,
3130 "Error rx_cmd_a=0x%08x", rx_cmd_a);
3131 } else {
3132 /* last frame in this batch */
3133 if (skb->len == size) {
3134 lan78xx_rx_csum_offload(dev, skb,
3135 rx_cmd_a, rx_cmd_b);
ec21ecf0
DS
3136 lan78xx_rx_vlan_offload(dev, skb,
3137 rx_cmd_a, rx_cmd_b);
55d7de9d
WH
3138
3139 skb_trim(skb, skb->len - 4); /* remove fcs */
3140 skb->truesize = size + sizeof(struct sk_buff);
3141
3142 return 1;
3143 }
3144
3145 skb2 = skb_clone(skb, GFP_ATOMIC);
3146 if (unlikely(!skb2)) {
3147 netdev_warn(dev->net, "Error allocating skb");
3148 return 0;
3149 }
3150
3151 skb2->len = size;
3152 skb2->data = packet;
3153 skb_set_tail_pointer(skb2, size);
3154
3155 lan78xx_rx_csum_offload(dev, skb2, rx_cmd_a, rx_cmd_b);
ec21ecf0 3156 lan78xx_rx_vlan_offload(dev, skb2, rx_cmd_a, rx_cmd_b);
55d7de9d
WH
3157
3158 skb_trim(skb2, skb2->len - 4); /* remove fcs */
3159 skb2->truesize = size + sizeof(struct sk_buff);
3160
3161 lan78xx_skb_return(dev, skb2);
3162 }
3163
3164 skb_pull(skb, size);
3165
3166 /* padding bytes before the next frame starts */
3167 if (skb->len)
3168 skb_pull(skb, align_count);
3169 }
3170
55d7de9d
WH
3171 return 1;
3172}
3173
3174static inline void rx_process(struct lan78xx_net *dev, struct sk_buff *skb)
3175{
3176 if (!lan78xx_rx(dev, skb)) {
3177 dev->net->stats.rx_errors++;
3178 goto done;
3179 }
3180
3181 if (skb->len) {
3182 lan78xx_skb_return(dev, skb);
3183 return;
3184 }
3185
3186 netif_dbg(dev, rx_err, dev->net, "drop\n");
3187 dev->net->stats.rx_errors++;
3188done:
3189 skb_queue_tail(&dev->done, skb);
3190}
3191
3192static void rx_complete(struct urb *urb);
3193
3194static int rx_submit(struct lan78xx_net *dev, struct urb *urb, gfp_t flags)
3195{
3196 struct sk_buff *skb;
3197 struct skb_data *entry;
3198 unsigned long lockflags;
3199 size_t size = dev->rx_urb_size;
3200 int ret = 0;
3201
3202 skb = netdev_alloc_skb_ip_align(dev->net, size);
3203 if (!skb) {
3204 usb_free_urb(urb);
3205 return -ENOMEM;
3206 }
3207
3208 entry = (struct skb_data *)skb->cb;
3209 entry->urb = urb;
3210 entry->dev = dev;
3211 entry->length = 0;
3212
3213 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_in,
3214 skb->data, size, rx_complete, skb);
3215
3216 spin_lock_irqsave(&dev->rxq.lock, lockflags);
3217
3218 if (netif_device_present(dev->net) &&
3219 netif_running(dev->net) &&
3220 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3221 !test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3222 ret = usb_submit_urb(urb, GFP_ATOMIC);
3223 switch (ret) {
3224 case 0:
3225 lan78xx_queue_skb(&dev->rxq, skb, rx_start);
3226 break;
3227 case -EPIPE:
3228 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3229 break;
3230 case -ENODEV:
3231 netif_dbg(dev, ifdown, dev->net, "device gone\n");
3232 netif_device_detach(dev->net);
3233 break;
3234 case -EHOSTUNREACH:
3235 ret = -ENOLINK;
3236 break;
3237 default:
3238 netif_dbg(dev, rx_err, dev->net,
3239 "rx submit, %d\n", ret);
3240 tasklet_schedule(&dev->bh);
3241 }
3242 } else {
3243 netif_dbg(dev, ifdown, dev->net, "rx: stopped\n");
3244 ret = -ENOLINK;
3245 }
3246 spin_unlock_irqrestore(&dev->rxq.lock, lockflags);
3247 if (ret) {
3248 dev_kfree_skb_any(skb);
3249 usb_free_urb(urb);
3250 }
3251 return ret;
3252}
3253
3254static void rx_complete(struct urb *urb)
3255{
3256 struct sk_buff *skb = (struct sk_buff *)urb->context;
3257 struct skb_data *entry = (struct skb_data *)skb->cb;
3258 struct lan78xx_net *dev = entry->dev;
3259 int urb_status = urb->status;
3260 enum skb_state state;
3261
3262 skb_put(skb, urb->actual_length);
3263 state = rx_done;
3264 entry->urb = NULL;
3265
3266 switch (urb_status) {
3267 case 0:
3268 if (skb->len < dev->net->hard_header_len) {
3269 state = rx_cleanup;
3270 dev->net->stats.rx_errors++;
3271 dev->net->stats.rx_length_errors++;
3272 netif_dbg(dev, rx_err, dev->net,
3273 "rx length %d\n", skb->len);
3274 }
3275 usb_mark_last_busy(dev->udev);
3276 break;
3277 case -EPIPE:
3278 dev->net->stats.rx_errors++;
3279 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3280 /* FALLTHROUGH */
3281 case -ECONNRESET: /* async unlink */
3282 case -ESHUTDOWN: /* hardware gone */
3283 netif_dbg(dev, ifdown, dev->net,
3284 "rx shutdown, code %d\n", urb_status);
3285 state = rx_cleanup;
3286 entry->urb = urb;
3287 urb = NULL;
3288 break;
3289 case -EPROTO:
3290 case -ETIME:
3291 case -EILSEQ:
3292 dev->net->stats.rx_errors++;
3293 state = rx_cleanup;
3294 entry->urb = urb;
3295 urb = NULL;
3296 break;
3297
3298 /* data overrun ... flush fifo? */
3299 case -EOVERFLOW:
3300 dev->net->stats.rx_over_errors++;
3301 /* FALLTHROUGH */
3302
3303 default:
3304 state = rx_cleanup;
3305 dev->net->stats.rx_errors++;
3306 netif_dbg(dev, rx_err, dev->net, "rx status %d\n", urb_status);
3307 break;
3308 }
3309
3310 state = defer_bh(dev, skb, &dev->rxq, state);
3311
3312 if (urb) {
3313 if (netif_running(dev->net) &&
3314 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3315 state != unlink_start) {
3316 rx_submit(dev, urb, GFP_ATOMIC);
3317 return;
3318 }
3319 usb_free_urb(urb);
3320 }
3321 netif_dbg(dev, rx_err, dev->net, "no read resubmitted\n");
3322}
3323
3324static void lan78xx_tx_bh(struct lan78xx_net *dev)
3325{
3326 int length;
3327 struct urb *urb = NULL;
3328 struct skb_data *entry;
3329 unsigned long flags;
3330 struct sk_buff_head *tqp = &dev->txq_pend;
3331 struct sk_buff *skb, *skb2;
3332 int ret;
3333 int count, pos;
3334 int skb_totallen, pkt_cnt;
3335
3336 skb_totallen = 0;
3337 pkt_cnt = 0;
74d79a2e
WH
3338 count = 0;
3339 length = 0;
dea39aca 3340 spin_lock_irqsave(&tqp->lock, flags);
55d7de9d
WH
3341 for (skb = tqp->next; pkt_cnt < tqp->qlen; skb = skb->next) {
3342 if (skb_is_gso(skb)) {
3343 if (pkt_cnt) {
3344 /* handle previous packets first */
3345 break;
3346 }
74d79a2e
WH
3347 count = 1;
3348 length = skb->len - TX_OVERHEAD;
dea39aca
SW
3349 __skb_unlink(skb, tqp);
3350 spin_unlock_irqrestore(&tqp->lock, flags);
55d7de9d
WH
3351 goto gso_skb;
3352 }
3353
3354 if ((skb_totallen + skb->len) > MAX_SINGLE_PACKET_SIZE)
3355 break;
3356 skb_totallen = skb->len + roundup(skb_totallen, sizeof(u32));
3357 pkt_cnt++;
3358 }
dea39aca 3359 spin_unlock_irqrestore(&tqp->lock, flags);
55d7de9d
WH
3360
3361 /* copy to a single skb */
3362 skb = alloc_skb(skb_totallen, GFP_ATOMIC);
3363 if (!skb)
3364 goto drop;
3365
3366 skb_put(skb, skb_totallen);
3367
3368 for (count = pos = 0; count < pkt_cnt; count++) {
3369 skb2 = skb_dequeue(tqp);
3370 if (skb2) {
74d79a2e 3371 length += (skb2->len - TX_OVERHEAD);
55d7de9d
WH
3372 memcpy(skb->data + pos, skb2->data, skb2->len);
3373 pos += roundup(skb2->len, sizeof(u32));
3374 dev_kfree_skb(skb2);
55d7de9d
WH
3375 }
3376 }
3377
55d7de9d
WH
3378gso_skb:
3379 urb = usb_alloc_urb(0, GFP_ATOMIC);
d7c4e84e 3380 if (!urb)
55d7de9d 3381 goto drop;
55d7de9d
WH
3382
3383 entry = (struct skb_data *)skb->cb;
3384 entry->urb = urb;
3385 entry->dev = dev;
3386 entry->length = length;
74d79a2e 3387 entry->num_of_packet = count;
55d7de9d
WH
3388
3389 spin_lock_irqsave(&dev->txq.lock, flags);
3390 ret = usb_autopm_get_interface_async(dev->intf);
3391 if (ret < 0) {
3392 spin_unlock_irqrestore(&dev->txq.lock, flags);
3393 goto drop;
3394 }
3395
3396 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_out,
3397 skb->data, skb->len, tx_complete, skb);
3398
3399 if (length % dev->maxpacket == 0) {
3400 /* send USB_ZERO_PACKET */
3401 urb->transfer_flags |= URB_ZERO_PACKET;
3402 }
3403
3404#ifdef CONFIG_PM
3405 /* if this triggers the device is still a sleep */
3406 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3407 /* transmission will be done in resume */
3408 usb_anchor_urb(urb, &dev->deferred);
3409 /* no use to process more packets */
3410 netif_stop_queue(dev->net);
3411 usb_put_urb(urb);
3412 spin_unlock_irqrestore(&dev->txq.lock, flags);
3413 netdev_dbg(dev->net, "Delaying transmission for resumption\n");
3414 return;
3415 }
3416#endif
3417
3418 ret = usb_submit_urb(urb, GFP_ATOMIC);
3419 switch (ret) {
3420 case 0:
860e9538 3421 netif_trans_update(dev->net);
55d7de9d
WH
3422 lan78xx_queue_skb(&dev->txq, skb, tx_start);
3423 if (skb_queue_len(&dev->txq) >= dev->tx_qlen)
3424 netif_stop_queue(dev->net);
3425 break;
3426 case -EPIPE:
3427 netif_stop_queue(dev->net);
3428 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
3429 usb_autopm_put_interface_async(dev->intf);
3430 break;
3431 default:
3432 usb_autopm_put_interface_async(dev->intf);
3433 netif_dbg(dev, tx_err, dev->net,
3434 "tx: submit urb err %d\n", ret);
3435 break;
3436 }
3437
3438 spin_unlock_irqrestore(&dev->txq.lock, flags);
3439
3440 if (ret) {
3441 netif_dbg(dev, tx_err, dev->net, "drop, code %d\n", ret);
3442drop:
3443 dev->net->stats.tx_dropped++;
3444 if (skb)
3445 dev_kfree_skb_any(skb);
3446 usb_free_urb(urb);
3447 } else
3448 netif_dbg(dev, tx_queued, dev->net,
3449 "> tx, len %d, type 0x%x\n", length, skb->protocol);
3450}
3451
3452static void lan78xx_rx_bh(struct lan78xx_net *dev)
3453{
3454 struct urb *urb;
3455 int i;
3456
3457 if (skb_queue_len(&dev->rxq) < dev->rx_qlen) {
3458 for (i = 0; i < 10; i++) {
3459 if (skb_queue_len(&dev->rxq) >= dev->rx_qlen)
3460 break;
3461 urb = usb_alloc_urb(0, GFP_ATOMIC);
3462 if (urb)
3463 if (rx_submit(dev, urb, GFP_ATOMIC) == -ENOLINK)
3464 return;
3465 }
3466
3467 if (skb_queue_len(&dev->rxq) < dev->rx_qlen)
3468 tasklet_schedule(&dev->bh);
3469 }
3470 if (skb_queue_len(&dev->txq) < dev->tx_qlen)
3471 netif_wake_queue(dev->net);
3472}
3473
3474static void lan78xx_bh(unsigned long param)
3475{
3476 struct lan78xx_net *dev = (struct lan78xx_net *)param;
3477 struct sk_buff *skb;
3478 struct skb_data *entry;
3479
55d7de9d
WH
3480 while ((skb = skb_dequeue(&dev->done))) {
3481 entry = (struct skb_data *)(skb->cb);
3482 switch (entry->state) {
3483 case rx_done:
3484 entry->state = rx_cleanup;
3485 rx_process(dev, skb);
3486 continue;
3487 case tx_done:
3488 usb_free_urb(entry->urb);
3489 dev_kfree_skb(skb);
3490 continue;
3491 case rx_cleanup:
3492 usb_free_urb(entry->urb);
3493 dev_kfree_skb(skb);
3494 continue;
3495 default:
3496 netdev_dbg(dev->net, "skb state %d\n", entry->state);
3497 return;
3498 }
55d7de9d
WH
3499 }
3500
3501 if (netif_device_present(dev->net) && netif_running(dev->net)) {
20ff5565
WH
3502 /* reset update timer delta */
3503 if (timer_pending(&dev->stat_monitor) && (dev->delta != 1)) {
3504 dev->delta = 1;
3505 mod_timer(&dev->stat_monitor,
3506 jiffies + STAT_UPDATE_TIMER);
3507 }
3508
55d7de9d
WH
3509 if (!skb_queue_empty(&dev->txq_pend))
3510 lan78xx_tx_bh(dev);
3511
3512 if (!timer_pending(&dev->delay) &&
3513 !test_bit(EVENT_RX_HALT, &dev->flags))
3514 lan78xx_rx_bh(dev);
3515 }
3516}
3517
3518static void lan78xx_delayedwork(struct work_struct *work)
3519{
3520 int status;
3521 struct lan78xx_net *dev;
3522
3523 dev = container_of(work, struct lan78xx_net, wq.work);
3524
3525 if (test_bit(EVENT_TX_HALT, &dev->flags)) {
3526 unlink_urbs(dev, &dev->txq);
3527 status = usb_autopm_get_interface(dev->intf);
3528 if (status < 0)
3529 goto fail_pipe;
3530 status = usb_clear_halt(dev->udev, dev->pipe_out);
3531 usb_autopm_put_interface(dev->intf);
3532 if (status < 0 &&
3533 status != -EPIPE &&
3534 status != -ESHUTDOWN) {
3535 if (netif_msg_tx_err(dev))
3536fail_pipe:
3537 netdev_err(dev->net,
3538 "can't clear tx halt, status %d\n",
3539 status);
3540 } else {
3541 clear_bit(EVENT_TX_HALT, &dev->flags);
3542 if (status != -ESHUTDOWN)
3543 netif_wake_queue(dev->net);
3544 }
3545 }
3546 if (test_bit(EVENT_RX_HALT, &dev->flags)) {
3547 unlink_urbs(dev, &dev->rxq);
3548 status = usb_autopm_get_interface(dev->intf);
3549 if (status < 0)
3550 goto fail_halt;
3551 status = usb_clear_halt(dev->udev, dev->pipe_in);
3552 usb_autopm_put_interface(dev->intf);
3553 if (status < 0 &&
3554 status != -EPIPE &&
3555 status != -ESHUTDOWN) {
3556 if (netif_msg_rx_err(dev))
3557fail_halt:
3558 netdev_err(dev->net,
3559 "can't clear rx halt, status %d\n",
3560 status);
3561 } else {
3562 clear_bit(EVENT_RX_HALT, &dev->flags);
3563 tasklet_schedule(&dev->bh);
3564 }
3565 }
3566
3567 if (test_bit(EVENT_LINK_RESET, &dev->flags)) {
3568 int ret = 0;
3569
3570 clear_bit(EVENT_LINK_RESET, &dev->flags);
3571 status = usb_autopm_get_interface(dev->intf);
3572 if (status < 0)
3573 goto skip_reset;
3574 if (lan78xx_link_reset(dev) < 0) {
3575 usb_autopm_put_interface(dev->intf);
3576skip_reset:
3577 netdev_info(dev->net, "link reset failed (%d)\n",
3578 ret);
3579 } else {
3580 usb_autopm_put_interface(dev->intf);
3581 }
3582 }
20ff5565
WH
3583
3584 if (test_bit(EVENT_STAT_UPDATE, &dev->flags)) {
3585 lan78xx_update_stats(dev);
3586
3587 clear_bit(EVENT_STAT_UPDATE, &dev->flags);
3588
3589 mod_timer(&dev->stat_monitor,
3590 jiffies + (STAT_UPDATE_TIMER * dev->delta));
3591
3592 dev->delta = min((dev->delta * 2), 50);
3593 }
55d7de9d
WH
3594}
3595
3596static void intr_complete(struct urb *urb)
3597{
3598 struct lan78xx_net *dev = urb->context;
3599 int status = urb->status;
3600
3601 switch (status) {
3602 /* success */
3603 case 0:
3604 lan78xx_status(dev, urb);
3605 break;
3606
3607 /* software-driven interface shutdown */
3608 case -ENOENT: /* urb killed */
3609 case -ESHUTDOWN: /* hardware gone */
3610 netif_dbg(dev, ifdown, dev->net,
3611 "intr shutdown, code %d\n", status);
3612 return;
3613
3614 /* NOTE: not throttling like RX/TX, since this endpoint
3615 * already polls infrequently
3616 */
3617 default:
3618 netdev_dbg(dev->net, "intr status %d\n", status);
3619 break;
3620 }
3621
3622 if (!netif_running(dev->net))
3623 return;
3624
3625 memset(urb->transfer_buffer, 0, urb->transfer_buffer_length);
3626 status = usb_submit_urb(urb, GFP_ATOMIC);
3627 if (status != 0)
3628 netif_err(dev, timer, dev->net,
3629 "intr resubmit --> %d\n", status);
3630}
3631
3632static void lan78xx_disconnect(struct usb_interface *intf)
3633{
3634 struct lan78xx_net *dev;
3635 struct usb_device *udev;
3636 struct net_device *net;
89b36fb5 3637 struct phy_device *phydev;
55d7de9d
WH
3638
3639 dev = usb_get_intfdata(intf);
3640 usb_set_intfdata(intf, NULL);
3641 if (!dev)
3642 return;
3643
3644 udev = interface_to_usbdev(intf);
55d7de9d 3645 net = dev->net;
89b36fb5 3646 phydev = net->phydev;
92571a1a
AG
3647
3648 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0);
3649 phy_unregister_fixup_for_uid(PHY_LAN8835, 0xfffffff0);
3650
3651 phy_disconnect(net->phydev);
3652
89b36fb5
RC
3653 if (phy_is_pseudo_fixed_link(phydev))
3654 fixed_phy_unregister(phydev);
3655
55d7de9d
WH
3656 unregister_netdev(net);
3657
3658 cancel_delayed_work_sync(&dev->wq);
3659
3660 usb_scuttle_anchored_urbs(&dev->deferred);
3661
3662 lan78xx_unbind(dev, intf);
3663
3664 usb_kill_urb(dev->urb_intr);
3665 usb_free_urb(dev->urb_intr);
3666
3667 free_netdev(net);
3668 usb_put_dev(udev);
3669}
3670
e0c79ff6 3671static void lan78xx_tx_timeout(struct net_device *net)
55d7de9d
WH
3672{
3673 struct lan78xx_net *dev = netdev_priv(net);
3674
3675 unlink_urbs(dev, &dev->txq);
3676 tasklet_schedule(&dev->bh);
3677}
3678
3679static const struct net_device_ops lan78xx_netdev_ops = {
3680 .ndo_open = lan78xx_open,
3681 .ndo_stop = lan78xx_stop,
3682 .ndo_start_xmit = lan78xx_start_xmit,
3683 .ndo_tx_timeout = lan78xx_tx_timeout,
3684 .ndo_change_mtu = lan78xx_change_mtu,
3685 .ndo_set_mac_address = lan78xx_set_mac_addr,
3686 .ndo_validate_addr = eth_validate_addr,
3687 .ndo_do_ioctl = lan78xx_ioctl,
3688 .ndo_set_rx_mode = lan78xx_set_multicast,
3689 .ndo_set_features = lan78xx_set_features,
3690 .ndo_vlan_rx_add_vid = lan78xx_vlan_rx_add_vid,
3691 .ndo_vlan_rx_kill_vid = lan78xx_vlan_rx_kill_vid,
3692};
3693
d28bb967 3694static void lan78xx_stat_monitor(struct timer_list *t)
20ff5565 3695{
d28bb967 3696 struct lan78xx_net *dev = from_timer(dev, t, stat_monitor);
20ff5565
WH
3697
3698 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE);
3699}
3700
55d7de9d
WH
3701static int lan78xx_probe(struct usb_interface *intf,
3702 const struct usb_device_id *id)
3703{
3704 struct lan78xx_net *dev;
3705 struct net_device *netdev;
3706 struct usb_device *udev;
3707 int ret;
3708 unsigned maxp;
3709 unsigned period;
3710 u8 *buf = NULL;
3711
3712 udev = interface_to_usbdev(intf);
3713 udev = usb_get_dev(udev);
3714
55d7de9d
WH
3715 netdev = alloc_etherdev(sizeof(struct lan78xx_net));
3716 if (!netdev) {
fb52c3b5
NS
3717 dev_err(&intf->dev, "Error: OOM\n");
3718 ret = -ENOMEM;
3719 goto out1;
55d7de9d
WH
3720 }
3721
3722 /* netdev_printk() needs this */
3723 SET_NETDEV_DEV(netdev, &intf->dev);
3724
3725 dev = netdev_priv(netdev);
3726 dev->udev = udev;
3727 dev->intf = intf;
3728 dev->net = netdev;
3729 dev->msg_enable = netif_msg_init(msg_level, NETIF_MSG_DRV
3730 | NETIF_MSG_PROBE | NETIF_MSG_LINK);
3731
3732 skb_queue_head_init(&dev->rxq);
3733 skb_queue_head_init(&dev->txq);
3734 skb_queue_head_init(&dev->done);
3735 skb_queue_head_init(&dev->rxq_pause);
3736 skb_queue_head_init(&dev->txq_pend);
3737 mutex_init(&dev->phy_mutex);
3738
3739 tasklet_init(&dev->bh, lan78xx_bh, (unsigned long)dev);
3740 INIT_DELAYED_WORK(&dev->wq, lan78xx_delayedwork);
3741 init_usb_anchor(&dev->deferred);
3742
3743 netdev->netdev_ops = &lan78xx_netdev_ops;
3744 netdev->watchdog_timeo = TX_TIMEOUT_JIFFIES;
3745 netdev->ethtool_ops = &lan78xx_ethtool_ops;
3746
20ff5565 3747 dev->delta = 1;
d28bb967 3748 timer_setup(&dev->stat_monitor, lan78xx_stat_monitor, 0);
20ff5565
WH
3749
3750 mutex_init(&dev->stats.access_lock);
3751
55d7de9d
WH
3752 ret = lan78xx_bind(dev, intf);
3753 if (ret < 0)
3754 goto out2;
3755 strcpy(netdev->name, "eth%d");
3756
3757 if (netdev->mtu > (dev->hard_mtu - netdev->hard_header_len))
3758 netdev->mtu = dev->hard_mtu - netdev->hard_header_len;
3759
f77f0aee
JW
3760 /* MTU range: 68 - 9000 */
3761 netdev->max_mtu = MAX_SINGLE_PACKET_SIZE;
3762
55d7de9d
WH
3763 dev->ep_blkin = (intf->cur_altsetting)->endpoint + 0;
3764 dev->ep_blkout = (intf->cur_altsetting)->endpoint + 1;
3765 dev->ep_intr = (intf->cur_altsetting)->endpoint + 2;
3766
3767 dev->pipe_in = usb_rcvbulkpipe(udev, BULK_IN_PIPE);
3768 dev->pipe_out = usb_sndbulkpipe(udev, BULK_OUT_PIPE);
3769
3770 dev->pipe_intr = usb_rcvintpipe(dev->udev,
3771 dev->ep_intr->desc.bEndpointAddress &
3772 USB_ENDPOINT_NUMBER_MASK);
3773 period = dev->ep_intr->desc.bInterval;
3774
3775 maxp = usb_maxpacket(dev->udev, dev->pipe_intr, 0);
3776 buf = kmalloc(maxp, GFP_KERNEL);
3777 if (buf) {
3778 dev->urb_intr = usb_alloc_urb(0, GFP_KERNEL);
3779 if (!dev->urb_intr) {
51920830 3780 ret = -ENOMEM;
55d7de9d
WH
3781 kfree(buf);
3782 goto out3;
3783 } else {
3784 usb_fill_int_urb(dev->urb_intr, dev->udev,
3785 dev->pipe_intr, buf, maxp,
3786 intr_complete, dev, period);
3787 }
3788 }
3789
3790 dev->maxpacket = usb_maxpacket(dev->udev, dev->pipe_out, 1);
3791
3792 /* driver requires remote-wakeup capability during autosuspend. */
3793 intf->needs_remote_wakeup = 1;
3794
3795 ret = register_netdev(netdev);
3796 if (ret != 0) {
3797 netif_err(dev, probe, netdev, "couldn't register the device\n");
fb52c3b5 3798 goto out3;
55d7de9d
WH
3799 }
3800
3801 usb_set_intfdata(intf, dev);
3802
3803 ret = device_set_wakeup_enable(&udev->dev, true);
3804
3805 /* Default delay of 2sec has more overhead than advantage.
3806 * Set to 10sec as default.
3807 */
3808 pm_runtime_set_autosuspend_delay(&udev->dev,
3809 DEFAULT_AUTOSUSPEND_DELAY);
3810
92571a1a
AG
3811 ret = lan78xx_phy_init(dev);
3812 if (ret < 0)
3813 goto out4;
3814
55d7de9d
WH
3815 return 0;
3816
92571a1a
AG
3817out4:
3818 unregister_netdev(netdev);
55d7de9d
WH
3819out3:
3820 lan78xx_unbind(dev, intf);
3821out2:
3822 free_netdev(netdev);
3823out1:
3824 usb_put_dev(udev);
3825
3826 return ret;
3827}
3828
3829static u16 lan78xx_wakeframe_crc16(const u8 *buf, int len)
3830{
3831 const u16 crc16poly = 0x8005;
3832 int i;
3833 u16 bit, crc, msb;
3834 u8 data;
3835
3836 crc = 0xFFFF;
3837 for (i = 0; i < len; i++) {
3838 data = *buf++;
3839 for (bit = 0; bit < 8; bit++) {
3840 msb = crc >> 15;
3841 crc <<= 1;
3842
3843 if (msb ^ (u16)(data & 1)) {
3844 crc ^= crc16poly;
3845 crc |= (u16)0x0001U;
3846 }
3847 data >>= 1;
3848 }
3849 }
3850
3851 return crc;
3852}
3853
3854static int lan78xx_set_suspend(struct lan78xx_net *dev, u32 wol)
3855{
3856 u32 buf;
3857 int ret;
3858 int mask_index;
3859 u16 crc;
3860 u32 temp_wucsr;
3861 u32 temp_pmt_ctl;
3862 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
3863 const u8 ipv6_multicast[3] = { 0x33, 0x33 };
3864 const u8 arp_type[2] = { 0x08, 0x06 };
3865
3866 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3867 buf &= ~MAC_TX_TXEN_;
3868 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3869 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3870 buf &= ~MAC_RX_RXEN_;
3871 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3872
3873 ret = lan78xx_write_reg(dev, WUCSR, 0);
3874 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3875 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3876
3877 temp_wucsr = 0;
3878
3879 temp_pmt_ctl = 0;
3880 ret = lan78xx_read_reg(dev, PMT_CTL, &temp_pmt_ctl);
3881 temp_pmt_ctl &= ~PMT_CTL_RES_CLR_WKP_EN_;
3882 temp_pmt_ctl |= PMT_CTL_RES_CLR_WKP_STS_;
3883
3884 for (mask_index = 0; mask_index < NUM_OF_WUF_CFG; mask_index++)
3885 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 0);
3886
3887 mask_index = 0;
3888 if (wol & WAKE_PHY) {
3889 temp_pmt_ctl |= PMT_CTL_PHY_WAKE_EN_;
3890
3891 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3892 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3893 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3894 }
3895 if (wol & WAKE_MAGIC) {
3896 temp_wucsr |= WUCSR_MPEN_;
3897
3898 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3899 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3900 temp_pmt_ctl |= PMT_CTL_SUS_MODE_3_;
3901 }
3902 if (wol & WAKE_BCAST) {
3903 temp_wucsr |= WUCSR_BCST_EN_;
3904
3905 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3906 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3907 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3908 }
3909 if (wol & WAKE_MCAST) {
3910 temp_wucsr |= WUCSR_WAKE_EN_;
3911
3912 /* set WUF_CFG & WUF_MASK for IPv4 Multicast */
3913 crc = lan78xx_wakeframe_crc16(ipv4_multicast, 3);
3914 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3915 WUF_CFGX_EN_ |
3916 WUF_CFGX_TYPE_MCAST_ |
3917 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3918 (crc & WUF_CFGX_CRC16_MASK_));
3919
3920 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 7);
3921 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3922 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3923 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3924 mask_index++;
3925
3926 /* for IPv6 Multicast */
3927 crc = lan78xx_wakeframe_crc16(ipv6_multicast, 2);
3928 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3929 WUF_CFGX_EN_ |
3930 WUF_CFGX_TYPE_MCAST_ |
3931 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3932 (crc & WUF_CFGX_CRC16_MASK_));
3933
3934 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 3);
3935 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3936 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3937 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3938 mask_index++;
3939
3940 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3941 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3942 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3943 }
3944 if (wol & WAKE_UCAST) {
3945 temp_wucsr |= WUCSR_PFDA_EN_;
3946
3947 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3948 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3949 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3950 }
3951 if (wol & WAKE_ARP) {
3952 temp_wucsr |= WUCSR_WAKE_EN_;
3953
3954 /* set WUF_CFG & WUF_MASK
3955 * for packettype (offset 12,13) = ARP (0x0806)
3956 */
3957 crc = lan78xx_wakeframe_crc16(arp_type, 2);
3958 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3959 WUF_CFGX_EN_ |
3960 WUF_CFGX_TYPE_ALL_ |
3961 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3962 (crc & WUF_CFGX_CRC16_MASK_));
3963
3964 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 0x3000);
3965 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3966 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3967 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3968 mask_index++;
3969
3970 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3971 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3972 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3973 }
3974
3975 ret = lan78xx_write_reg(dev, WUCSR, temp_wucsr);
3976
3977 /* when multiple WOL bits are set */
3978 if (hweight_long((unsigned long)wol) > 1) {
3979 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3980 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3981 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3982 }
3983 ret = lan78xx_write_reg(dev, PMT_CTL, temp_pmt_ctl);
3984
3985 /* clear WUPS */
3986 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3987 buf |= PMT_CTL_WUPS_MASK_;
3988 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3989
3990 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3991 buf |= MAC_RX_RXEN_;
3992 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3993
3994 return 0;
3995}
3996
e0c79ff6 3997static int lan78xx_suspend(struct usb_interface *intf, pm_message_t message)
55d7de9d
WH
3998{
3999 struct lan78xx_net *dev = usb_get_intfdata(intf);
4000 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
4001 u32 buf;
4002 int ret;
4003 int event;
4004
55d7de9d
WH
4005 event = message.event;
4006
4007 if (!dev->suspend_count++) {
4008 spin_lock_irq(&dev->txq.lock);
4009 /* don't autosuspend while transmitting */
4010 if ((skb_queue_len(&dev->txq) ||
4011 skb_queue_len(&dev->txq_pend)) &&
4012 PMSG_IS_AUTO(message)) {
4013 spin_unlock_irq(&dev->txq.lock);
4014 ret = -EBUSY;
4015 goto out;
4016 } else {
4017 set_bit(EVENT_DEV_ASLEEP, &dev->flags);
4018 spin_unlock_irq(&dev->txq.lock);
4019 }
4020
4021 /* stop TX & RX */
4022 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
4023 buf &= ~MAC_TX_TXEN_;
4024 ret = lan78xx_write_reg(dev, MAC_TX, buf);
4025 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
4026 buf &= ~MAC_RX_RXEN_;
4027 ret = lan78xx_write_reg(dev, MAC_RX, buf);
4028
4029 /* empty out the rx and queues */
4030 netif_device_detach(dev->net);
4031 lan78xx_terminate_urbs(dev);
4032 usb_kill_urb(dev->urb_intr);
4033
4034 /* reattach */
4035 netif_device_attach(dev->net);
4036 }
4037
4038 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
20ff5565
WH
4039 del_timer(&dev->stat_monitor);
4040
55d7de9d
WH
4041 if (PMSG_IS_AUTO(message)) {
4042 /* auto suspend (selective suspend) */
4043 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
4044 buf &= ~MAC_TX_TXEN_;
4045 ret = lan78xx_write_reg(dev, MAC_TX, buf);
4046 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
4047 buf &= ~MAC_RX_RXEN_;
4048 ret = lan78xx_write_reg(dev, MAC_RX, buf);
4049
4050 ret = lan78xx_write_reg(dev, WUCSR, 0);
4051 ret = lan78xx_write_reg(dev, WUCSR2, 0);
4052 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
4053
4054 /* set goodframe wakeup */
4055 ret = lan78xx_read_reg(dev, WUCSR, &buf);
4056
4057 buf |= WUCSR_RFE_WAKE_EN_;
4058 buf |= WUCSR_STORE_WAKE_;
4059
4060 ret = lan78xx_write_reg(dev, WUCSR, buf);
4061
4062 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
4063
4064 buf &= ~PMT_CTL_RES_CLR_WKP_EN_;
4065 buf |= PMT_CTL_RES_CLR_WKP_STS_;
4066
4067 buf |= PMT_CTL_PHY_WAKE_EN_;
4068 buf |= PMT_CTL_WOL_EN_;
4069 buf &= ~PMT_CTL_SUS_MODE_MASK_;
4070 buf |= PMT_CTL_SUS_MODE_3_;
4071
4072 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
4073
4074 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
4075
4076 buf |= PMT_CTL_WUPS_MASK_;
4077
4078 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
4079
4080 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
4081 buf |= MAC_RX_RXEN_;
4082 ret = lan78xx_write_reg(dev, MAC_RX, buf);
4083 } else {
4084 lan78xx_set_suspend(dev, pdata->wol);
4085 }
4086 }
4087
49d28b56 4088 ret = 0;
55d7de9d
WH
4089out:
4090 return ret;
4091}
4092
e0c79ff6 4093static int lan78xx_resume(struct usb_interface *intf)
55d7de9d
WH
4094{
4095 struct lan78xx_net *dev = usb_get_intfdata(intf);
4096 struct sk_buff *skb;
4097 struct urb *res;
4098 int ret;
4099 u32 buf;
4100
20ff5565
WH
4101 if (!timer_pending(&dev->stat_monitor)) {
4102 dev->delta = 1;
4103 mod_timer(&dev->stat_monitor,
4104 jiffies + STAT_UPDATE_TIMER);
4105 }
4106
55d7de9d
WH
4107 if (!--dev->suspend_count) {
4108 /* resume interrupt URBs */
4109 if (dev->urb_intr && test_bit(EVENT_DEV_OPEN, &dev->flags))
4110 usb_submit_urb(dev->urb_intr, GFP_NOIO);
4111
4112 spin_lock_irq(&dev->txq.lock);
4113 while ((res = usb_get_from_anchor(&dev->deferred))) {
4114 skb = (struct sk_buff *)res->context;
4115 ret = usb_submit_urb(res, GFP_ATOMIC);
4116 if (ret < 0) {
4117 dev_kfree_skb_any(skb);
4118 usb_free_urb(res);
4119 usb_autopm_put_interface_async(dev->intf);
4120 } else {
860e9538 4121 netif_trans_update(dev->net);
55d7de9d
WH
4122 lan78xx_queue_skb(&dev->txq, skb, tx_start);
4123 }
4124 }
4125
4126 clear_bit(EVENT_DEV_ASLEEP, &dev->flags);
4127 spin_unlock_irq(&dev->txq.lock);
4128
4129 if (test_bit(EVENT_DEV_OPEN, &dev->flags)) {
4130 if (!(skb_queue_len(&dev->txq) >= dev->tx_qlen))
4131 netif_start_queue(dev->net);
4132 tasklet_schedule(&dev->bh);
4133 }
4134 }
4135
4136 ret = lan78xx_write_reg(dev, WUCSR2, 0);
4137 ret = lan78xx_write_reg(dev, WUCSR, 0);
4138 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
4139
4140 ret = lan78xx_write_reg(dev, WUCSR2, WUCSR2_NS_RCD_ |
4141 WUCSR2_ARP_RCD_ |
4142 WUCSR2_IPV6_TCPSYN_RCD_ |
4143 WUCSR2_IPV4_TCPSYN_RCD_);
4144
4145 ret = lan78xx_write_reg(dev, WUCSR, WUCSR_EEE_TX_WAKE_ |
4146 WUCSR_EEE_RX_WAKE_ |
4147 WUCSR_PFDA_FR_ |
4148 WUCSR_RFE_WAKE_FR_ |
4149 WUCSR_WUFR_ |
4150 WUCSR_MPR_ |
4151 WUCSR_BCST_FR_);
4152
4153 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
4154 buf |= MAC_TX_TXEN_;
4155 ret = lan78xx_write_reg(dev, MAC_TX, buf);
4156
4157 return 0;
4158}
4159
e0c79ff6 4160static int lan78xx_reset_resume(struct usb_interface *intf)
55d7de9d
WH
4161{
4162 struct lan78xx_net *dev = usb_get_intfdata(intf);
4163
4164 lan78xx_reset(dev);
ce85e13a 4165
92571a1a 4166 phy_start(dev->net->phydev);
ce85e13a 4167
55d7de9d
WH
4168 return lan78xx_resume(intf);
4169}
4170
4171static const struct usb_device_id products[] = {
4172 {
4173 /* LAN7800 USB Gigabit Ethernet Device */
4174 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7800_USB_PRODUCT_ID),
4175 },
4176 {
4177 /* LAN7850 USB Gigabit Ethernet Device */
4178 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7850_USB_PRODUCT_ID),
4179 },
02dc1f3d
WH
4180 {
4181 /* LAN7801 USB Gigabit Ethernet Device */
4182 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7801_USB_PRODUCT_ID),
4183 },
55d7de9d
WH
4184 {},
4185};
4186MODULE_DEVICE_TABLE(usb, products);
4187
4188static struct usb_driver lan78xx_driver = {
4189 .name = DRIVER_NAME,
4190 .id_table = products,
4191 .probe = lan78xx_probe,
4192 .disconnect = lan78xx_disconnect,
4193 .suspend = lan78xx_suspend,
4194 .resume = lan78xx_resume,
4195 .reset_resume = lan78xx_reset_resume,
4196 .supports_autosuspend = 1,
4197 .disable_hub_initiated_lpm = 1,
4198};
4199
4200module_usb_driver(lan78xx_driver);
4201
4202MODULE_AUTHOR(DRIVER_AUTHOR);
4203MODULE_DESCRIPTION(DRIVER_DESC);
4204MODULE_LICENSE("GPL");