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2e55cc72 DB |
1 | /* |
2 | * ASIX AX8817X based USB 2.0 Ethernet Devices | |
933a27d3 | 3 | * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com> |
2e55cc72 | 4 | * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net> |
933a27d3 | 5 | * Copyright (C) 2006 James Painter <jamie.painter@iname.com> |
2e55cc72 DB |
6 | * Copyright (c) 2002-2003 TiVo Inc. |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | */ | |
22 | ||
23 | // #define DEBUG // error path messages, extra info | |
24 | // #define VERBOSE // more; success messages | |
25 | ||
2e55cc72 DB |
26 | #include <linux/module.h> |
27 | #include <linux/kmod.h> | |
2e55cc72 DB |
28 | #include <linux/init.h> |
29 | #include <linux/netdevice.h> | |
30 | #include <linux/etherdevice.h> | |
31 | #include <linux/ethtool.h> | |
32 | #include <linux/workqueue.h> | |
33 | #include <linux/mii.h> | |
34 | #include <linux/usb.h> | |
35 | #include <linux/crc32.h> | |
3692e94f | 36 | #include <linux/usb/usbnet.h> |
5a0e3ad6 | 37 | #include <linux/slab.h> |
2e55cc72 | 38 | |
f87ce5b2 | 39 | #define DRIVER_VERSION "22-Dec-2011" |
83e1b918 | 40 | #define DRIVER_NAME "asix" |
933a27d3 | 41 | |
2e55cc72 DB |
42 | /* ASIX AX8817X based USB 2.0 Ethernet Devices */ |
43 | ||
44 | #define AX_CMD_SET_SW_MII 0x06 | |
45 | #define AX_CMD_READ_MII_REG 0x07 | |
46 | #define AX_CMD_WRITE_MII_REG 0x08 | |
47 | #define AX_CMD_SET_HW_MII 0x0a | |
48 | #define AX_CMD_READ_EEPROM 0x0b | |
49 | #define AX_CMD_WRITE_EEPROM 0x0c | |
50 | #define AX_CMD_WRITE_ENABLE 0x0d | |
51 | #define AX_CMD_WRITE_DISABLE 0x0e | |
933a27d3 | 52 | #define AX_CMD_READ_RX_CTL 0x0f |
2e55cc72 DB |
53 | #define AX_CMD_WRITE_RX_CTL 0x10 |
54 | #define AX_CMD_READ_IPG012 0x11 | |
55 | #define AX_CMD_WRITE_IPG0 0x12 | |
56 | #define AX_CMD_WRITE_IPG1 0x13 | |
933a27d3 | 57 | #define AX_CMD_READ_NODE_ID 0x13 |
7f29a3ba | 58 | #define AX_CMD_WRITE_NODE_ID 0x14 |
2e55cc72 DB |
59 | #define AX_CMD_WRITE_IPG2 0x14 |
60 | #define AX_CMD_WRITE_MULTI_FILTER 0x16 | |
933a27d3 | 61 | #define AX88172_CMD_READ_NODE_ID 0x17 |
2e55cc72 DB |
62 | #define AX_CMD_READ_PHY_ID 0x19 |
63 | #define AX_CMD_READ_MEDIUM_STATUS 0x1a | |
64 | #define AX_CMD_WRITE_MEDIUM_MODE 0x1b | |
65 | #define AX_CMD_READ_MONITOR_MODE 0x1c | |
66 | #define AX_CMD_WRITE_MONITOR_MODE 0x1d | |
933a27d3 | 67 | #define AX_CMD_READ_GPIOS 0x1e |
2e55cc72 DB |
68 | #define AX_CMD_WRITE_GPIOS 0x1f |
69 | #define AX_CMD_SW_RESET 0x20 | |
70 | #define AX_CMD_SW_PHY_STATUS 0x21 | |
71 | #define AX_CMD_SW_PHY_SELECT 0x22 | |
2e55cc72 DB |
72 | |
73 | #define AX_MONITOR_MODE 0x01 | |
74 | #define AX_MONITOR_LINK 0x02 | |
75 | #define AX_MONITOR_MAGIC 0x04 | |
76 | #define AX_MONITOR_HSFS 0x10 | |
77 | ||
78 | /* AX88172 Medium Status Register values */ | |
933a27d3 DH |
79 | #define AX88172_MEDIUM_FD 0x02 |
80 | #define AX88172_MEDIUM_TX 0x04 | |
81 | #define AX88172_MEDIUM_FC 0x10 | |
82 | #define AX88172_MEDIUM_DEFAULT \ | |
83 | ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC ) | |
2e55cc72 DB |
84 | |
85 | #define AX_MCAST_FILTER_SIZE 8 | |
86 | #define AX_MAX_MCAST 64 | |
87 | ||
2e55cc72 DB |
88 | #define AX_SWRESET_CLEAR 0x00 |
89 | #define AX_SWRESET_RR 0x01 | |
90 | #define AX_SWRESET_RT 0x02 | |
91 | #define AX_SWRESET_PRTE 0x04 | |
92 | #define AX_SWRESET_PRL 0x08 | |
93 | #define AX_SWRESET_BZ 0x10 | |
94 | #define AX_SWRESET_IPRL 0x20 | |
95 | #define AX_SWRESET_IPPD 0x40 | |
96 | ||
97 | #define AX88772_IPG0_DEFAULT 0x15 | |
98 | #define AX88772_IPG1_DEFAULT 0x0c | |
99 | #define AX88772_IPG2_DEFAULT 0x12 | |
100 | ||
933a27d3 DH |
101 | /* AX88772 & AX88178 Medium Mode Register */ |
102 | #define AX_MEDIUM_PF 0x0080 | |
103 | #define AX_MEDIUM_JFE 0x0040 | |
104 | #define AX_MEDIUM_TFC 0x0020 | |
105 | #define AX_MEDIUM_RFC 0x0010 | |
106 | #define AX_MEDIUM_ENCK 0x0008 | |
107 | #define AX_MEDIUM_AC 0x0004 | |
108 | #define AX_MEDIUM_FD 0x0002 | |
109 | #define AX_MEDIUM_GM 0x0001 | |
110 | #define AX_MEDIUM_SM 0x1000 | |
111 | #define AX_MEDIUM_SBP 0x0800 | |
112 | #define AX_MEDIUM_PS 0x0200 | |
113 | #define AX_MEDIUM_RE 0x0100 | |
114 | ||
115 | #define AX88178_MEDIUM_DEFAULT \ | |
116 | (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \ | |
117 | AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \ | |
83e1b918 | 118 | AX_MEDIUM_RE) |
2e55cc72 | 119 | |
933a27d3 DH |
120 | #define AX88772_MEDIUM_DEFAULT \ |
121 | (AX_MEDIUM_FD | AX_MEDIUM_RFC | \ | |
122 | AX_MEDIUM_TFC | AX_MEDIUM_PS | \ | |
83e1b918 | 123 | AX_MEDIUM_AC | AX_MEDIUM_RE) |
933a27d3 DH |
124 | |
125 | /* AX88772 & AX88178 RX_CTL values */ | |
83e1b918 GG |
126 | #define AX_RX_CTL_SO 0x0080 |
127 | #define AX_RX_CTL_AP 0x0020 | |
128 | #define AX_RX_CTL_AM 0x0010 | |
129 | #define AX_RX_CTL_AB 0x0008 | |
130 | #define AX_RX_CTL_SEP 0x0004 | |
131 | #define AX_RX_CTL_AMALL 0x0002 | |
132 | #define AX_RX_CTL_PRO 0x0001 | |
133 | #define AX_RX_CTL_MFB_2048 0x0000 | |
134 | #define AX_RX_CTL_MFB_4096 0x0100 | |
135 | #define AX_RX_CTL_MFB_8192 0x0200 | |
136 | #define AX_RX_CTL_MFB_16384 0x0300 | |
137 | ||
138 | #define AX_DEFAULT_RX_CTL (AX_RX_CTL_SO | AX_RX_CTL_AB) | |
933a27d3 DH |
139 | |
140 | /* GPIO 0 .. 2 toggles */ | |
141 | #define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */ | |
142 | #define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */ | |
143 | #define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */ | |
144 | #define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */ | |
145 | #define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */ | |
146 | #define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */ | |
147 | #define AX_GPIO_RESERVED 0x40 /* Reserved */ | |
148 | #define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */ | |
149 | ||
150 | #define AX_EEPROM_MAGIC 0xdeadbeef | |
151 | #define AX88172_EEPROM_LEN 0x40 | |
152 | #define AX88772_EEPROM_LEN 0xff | |
153 | ||
154 | #define PHY_MODE_MARVELL 0x0000 | |
155 | #define MII_MARVELL_LED_CTRL 0x0018 | |
156 | #define MII_MARVELL_STATUS 0x001b | |
157 | #define MII_MARVELL_CTRL 0x0014 | |
158 | ||
159 | #define MARVELL_LED_MANUAL 0x0019 | |
160 | ||
161 | #define MARVELL_STATUS_HWCFG 0x0004 | |
162 | ||
163 | #define MARVELL_CTRL_TXDELAY 0x0002 | |
164 | #define MARVELL_CTRL_RXDELAY 0x0080 | |
2e55cc72 | 165 | |
3486140e | 166 | #define PHY_MODE_RTL8211CL 0x000C |
610d885d | 167 | |
2e55cc72 | 168 | /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */ |
48b1be6a | 169 | struct asix_data { |
2e55cc72 | 170 | u8 multi_filter[AX_MCAST_FILTER_SIZE]; |
7f29a3ba | 171 | u8 mac_addr[ETH_ALEN]; |
933a27d3 DH |
172 | u8 phymode; |
173 | u8 ledmode; | |
174 | u8 eeprom_len; | |
2e55cc72 DB |
175 | }; |
176 | ||
177 | struct ax88172_int_data { | |
51bf2976 | 178 | __le16 res1; |
2e55cc72 | 179 | u8 link; |
51bf2976 | 180 | __le16 res2; |
2e55cc72 | 181 | u8 status; |
51bf2976 | 182 | __le16 res3; |
ba2d3587 | 183 | } __packed; |
2e55cc72 | 184 | |
48b1be6a | 185 | static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, |
2e55cc72 DB |
186 | u16 size, void *data) |
187 | { | |
51bf2976 AV |
188 | void *buf; |
189 | int err = -ENOMEM; | |
190 | ||
60b86755 JP |
191 | netdev_dbg(dev->net, "asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", |
192 | cmd, value, index, size); | |
51bf2976 AV |
193 | |
194 | buf = kmalloc(size, GFP_KERNEL); | |
195 | if (!buf) | |
196 | goto out; | |
197 | ||
198 | err = usb_control_msg( | |
2e55cc72 DB |
199 | dev->udev, |
200 | usb_rcvctrlpipe(dev->udev, 0), | |
201 | cmd, | |
202 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
203 | value, | |
204 | index, | |
51bf2976 | 205 | buf, |
2e55cc72 DB |
206 | size, |
207 | USB_CTRL_GET_TIMEOUT); | |
94d43363 | 208 | if (err == size) |
51bf2976 | 209 | memcpy(data, buf, size); |
94d43363 RD |
210 | else if (err >= 0) |
211 | err = -EINVAL; | |
51bf2976 AV |
212 | kfree(buf); |
213 | ||
214 | out: | |
215 | return err; | |
2e55cc72 DB |
216 | } |
217 | ||
48b1be6a | 218 | static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, |
2e55cc72 DB |
219 | u16 size, void *data) |
220 | { | |
51bf2976 AV |
221 | void *buf = NULL; |
222 | int err = -ENOMEM; | |
223 | ||
60b86755 JP |
224 | netdev_dbg(dev->net, "asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", |
225 | cmd, value, index, size); | |
51bf2976 AV |
226 | |
227 | if (data) { | |
99bf2366 | 228 | buf = kmemdup(data, size, GFP_KERNEL); |
51bf2976 AV |
229 | if (!buf) |
230 | goto out; | |
51bf2976 AV |
231 | } |
232 | ||
233 | err = usb_control_msg( | |
2e55cc72 DB |
234 | dev->udev, |
235 | usb_sndctrlpipe(dev->udev, 0), | |
236 | cmd, | |
237 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
238 | value, | |
239 | index, | |
51bf2976 | 240 | buf, |
2e55cc72 DB |
241 | size, |
242 | USB_CTRL_SET_TIMEOUT); | |
51bf2976 AV |
243 | kfree(buf); |
244 | ||
245 | out: | |
246 | return err; | |
2e55cc72 DB |
247 | } |
248 | ||
7d12e780 | 249 | static void asix_async_cmd_callback(struct urb *urb) |
2e55cc72 DB |
250 | { |
251 | struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context; | |
c94cb314 | 252 | int status = urb->status; |
2e55cc72 | 253 | |
c94cb314 | 254 | if (status < 0) |
48b1be6a | 255 | printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d", |
c94cb314 | 256 | status); |
2e55cc72 DB |
257 | |
258 | kfree(req); | |
259 | usb_free_urb(urb); | |
260 | } | |
261 | ||
933a27d3 DH |
262 | static void |
263 | asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index, | |
264 | u16 size, void *data) | |
265 | { | |
266 | struct usb_ctrlrequest *req; | |
267 | int status; | |
268 | struct urb *urb; | |
269 | ||
60b86755 JP |
270 | netdev_dbg(dev->net, "asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", |
271 | cmd, value, index, size); | |
83e1b918 GG |
272 | |
273 | urb = usb_alloc_urb(0, GFP_ATOMIC); | |
274 | if (!urb) { | |
60b86755 | 275 | netdev_err(dev->net, "Error allocating URB in write_cmd_async!\n"); |
933a27d3 DH |
276 | return; |
277 | } | |
278 | ||
83e1b918 GG |
279 | req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC); |
280 | if (!req) { | |
60b86755 | 281 | netdev_err(dev->net, "Failed to allocate memory for control request\n"); |
933a27d3 DH |
282 | usb_free_urb(urb); |
283 | return; | |
284 | } | |
285 | ||
286 | req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE; | |
287 | req->bRequest = cmd; | |
9aa742ef ON |
288 | req->wValue = cpu_to_le16(value); |
289 | req->wIndex = cpu_to_le16(index); | |
290 | req->wLength = cpu_to_le16(size); | |
933a27d3 DH |
291 | |
292 | usb_fill_control_urb(urb, dev->udev, | |
293 | usb_sndctrlpipe(dev->udev, 0), | |
294 | (void *)req, data, size, | |
295 | asix_async_cmd_callback, req); | |
296 | ||
83e1b918 GG |
297 | status = usb_submit_urb(urb, GFP_ATOMIC); |
298 | if (status < 0) { | |
60b86755 JP |
299 | netdev_err(dev->net, "Error submitting the control message: status=%d\n", |
300 | status); | |
933a27d3 DH |
301 | kfree(req); |
302 | usb_free_urb(urb); | |
303 | } | |
304 | } | |
305 | ||
306 | static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb) | |
307 | { | |
308 | u8 *head; | |
309 | u32 header; | |
310 | char *packet; | |
311 | struct sk_buff *ax_skb; | |
312 | u16 size; | |
313 | ||
314 | head = (u8 *) skb->data; | |
315 | memcpy(&header, head, sizeof(header)); | |
316 | le32_to_cpus(&header); | |
317 | packet = head + sizeof(header); | |
318 | ||
319 | skb_pull(skb, 4); | |
320 | ||
321 | while (skb->len > 0) { | |
bca0beb9 | 322 | if ((header & 0x07ff) != ((~header >> 16) & 0x07ff)) |
60b86755 | 323 | netdev_err(dev->net, "asix_rx_fixup() Bad Header Length\n"); |
bc466e67 | 324 | |
933a27d3 | 325 | /* get the packet length */ |
bca0beb9 | 326 | size = (u16) (header & 0x000007ff); |
933a27d3 | 327 | |
3f78d1f2 | 328 | if ((skb->len) - ((size + 1) & 0xfffe) == 0) { |
f925b130 | 329 | u8 alignment = (unsigned long)skb->data & 0x3; |
3f78d1f2 NJ |
330 | if (alignment != 0x2) { |
331 | /* | |
332 | * not 16bit aligned so use the room provided by | |
333 | * the 32 bit header to align the data | |
334 | * | |
335 | * note we want 16bit alignment as MAC header is | |
336 | * 14bytes thus ip header will be aligned on | |
337 | * 32bit boundary so accessing ipheader elements | |
338 | * using a cast to struct ip header wont cause | |
339 | * an unaligned accesses. | |
340 | */ | |
341 | u8 realignment = (alignment + 2) & 0x3; | |
342 | memmove(skb->data - realignment, | |
343 | skb->data, | |
344 | size); | |
345 | skb->data -= realignment; | |
346 | skb_set_tail_pointer(skb, size); | |
347 | } | |
933a27d3 | 348 | return 2; |
3f78d1f2 NJ |
349 | } |
350 | ||
9227a46b | 351 | if (size > dev->net->mtu + ETH_HLEN) { |
60b86755 JP |
352 | netdev_err(dev->net, "asix_rx_fixup() Bad RX Length %d\n", |
353 | size); | |
933a27d3 DH |
354 | return 0; |
355 | } | |
356 | ax_skb = skb_clone(skb, GFP_ATOMIC); | |
357 | if (ax_skb) { | |
f925b130 | 358 | u8 alignment = (unsigned long)packet & 0x3; |
933a27d3 | 359 | ax_skb->len = size; |
3f78d1f2 NJ |
360 | |
361 | if (alignment != 0x2) { | |
362 | /* | |
363 | * not 16bit aligned use the room provided by | |
364 | * the 32 bit header to align the data | |
365 | */ | |
366 | u8 realignment = (alignment + 2) & 0x3; | |
367 | memmove(packet - realignment, packet, size); | |
368 | packet -= realignment; | |
369 | } | |
933a27d3 | 370 | ax_skb->data = packet; |
27a884dc | 371 | skb_set_tail_pointer(ax_skb, size); |
933a27d3 DH |
372 | usbnet_skb_return(dev, ax_skb); |
373 | } else { | |
374 | return 0; | |
375 | } | |
376 | ||
377 | skb_pull(skb, (size + 1) & 0xfffe); | |
378 | ||
6c15d74d | 379 | if (skb->len < sizeof(header)) |
933a27d3 DH |
380 | break; |
381 | ||
382 | head = (u8 *) skb->data; | |
383 | memcpy(&header, head, sizeof(header)); | |
384 | le32_to_cpus(&header); | |
385 | packet = head + sizeof(header); | |
386 | skb_pull(skb, 4); | |
387 | } | |
388 | ||
389 | if (skb->len < 0) { | |
60b86755 JP |
390 | netdev_err(dev->net, "asix_rx_fixup() Bad SKB Length %d\n", |
391 | skb->len); | |
933a27d3 DH |
392 | return 0; |
393 | } | |
394 | return 1; | |
395 | } | |
396 | ||
397 | static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb, | |
398 | gfp_t flags) | |
399 | { | |
400 | int padlen; | |
401 | int headroom = skb_headroom(skb); | |
402 | int tailroom = skb_tailroom(skb); | |
403 | u32 packet_len; | |
404 | u32 padbytes = 0xffff0000; | |
405 | ||
406 | padlen = ((skb->len + 4) % 512) ? 0 : 4; | |
407 | ||
8e95a202 JP |
408 | if ((!skb_cloned(skb)) && |
409 | ((headroom + tailroom) >= (4 + padlen))) { | |
933a27d3 DH |
410 | if ((headroom < 4) || (tailroom < padlen)) { |
411 | skb->data = memmove(skb->head + 4, skb->data, skb->len); | |
27a884dc | 412 | skb_set_tail_pointer(skb, skb->len); |
933a27d3 DH |
413 | } |
414 | } else { | |
415 | struct sk_buff *skb2; | |
416 | skb2 = skb_copy_expand(skb, 4, padlen, flags); | |
417 | dev_kfree_skb_any(skb); | |
418 | skb = skb2; | |
419 | if (!skb) | |
420 | return NULL; | |
421 | } | |
422 | ||
423 | skb_push(skb, 4); | |
424 | packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4); | |
57e4f041 | 425 | cpu_to_le32s(&packet_len); |
27d7ff46 | 426 | skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len)); |
933a27d3 DH |
427 | |
428 | if ((skb->len % 512) == 0) { | |
57e4f041 | 429 | cpu_to_le32s(&padbytes); |
27a884dc | 430 | memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes)); |
933a27d3 DH |
431 | skb_put(skb, sizeof(padbytes)); |
432 | } | |
433 | return skb; | |
434 | } | |
435 | ||
436 | static void asix_status(struct usbnet *dev, struct urb *urb) | |
437 | { | |
438 | struct ax88172_int_data *event; | |
439 | int link; | |
440 | ||
441 | if (urb->actual_length < 8) | |
442 | return; | |
443 | ||
444 | event = urb->transfer_buffer; | |
445 | link = event->link & 0x01; | |
446 | if (netif_carrier_ok(dev->net) != link) { | |
447 | if (link) { | |
448 | netif_carrier_on(dev->net); | |
449 | usbnet_defer_kevent (dev, EVENT_LINK_RESET ); | |
450 | } else | |
451 | netif_carrier_off(dev->net); | |
60b86755 | 452 | netdev_dbg(dev->net, "Link Status is: %d\n", link); |
933a27d3 DH |
453 | } |
454 | } | |
455 | ||
48b1be6a DH |
456 | static inline int asix_set_sw_mii(struct usbnet *dev) |
457 | { | |
458 | int ret; | |
459 | ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL); | |
460 | if (ret < 0) | |
60b86755 | 461 | netdev_err(dev->net, "Failed to enable software MII access\n"); |
48b1be6a DH |
462 | return ret; |
463 | } | |
464 | ||
465 | static inline int asix_set_hw_mii(struct usbnet *dev) | |
466 | { | |
467 | int ret; | |
468 | ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL); | |
469 | if (ret < 0) | |
60b86755 | 470 | netdev_err(dev->net, "Failed to enable hardware MII access\n"); |
48b1be6a DH |
471 | return ret; |
472 | } | |
473 | ||
933a27d3 | 474 | static inline int asix_get_phy_addr(struct usbnet *dev) |
48b1be6a | 475 | { |
51bf2976 AV |
476 | u8 buf[2]; |
477 | int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf); | |
48b1be6a | 478 | |
60b86755 | 479 | netdev_dbg(dev->net, "asix_get_phy_addr()\n"); |
933a27d3 | 480 | |
51bf2976 | 481 | if (ret < 0) { |
60b86755 | 482 | netdev_err(dev->net, "Error reading PHYID register: %02x\n", ret); |
51bf2976 | 483 | goto out; |
48b1be6a | 484 | } |
60b86755 JP |
485 | netdev_dbg(dev->net, "asix_get_phy_addr() returning 0x%04x\n", |
486 | *((__le16 *)buf)); | |
51bf2976 AV |
487 | ret = buf[1]; |
488 | ||
489 | out: | |
48b1be6a DH |
490 | return ret; |
491 | } | |
492 | ||
493 | static int asix_sw_reset(struct usbnet *dev, u8 flags) | |
494 | { | |
495 | int ret; | |
496 | ||
497 | ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL); | |
498 | if (ret < 0) | |
60b86755 | 499 | netdev_err(dev->net, "Failed to send software reset: %02x\n", ret); |
933a27d3 DH |
500 | |
501 | return ret; | |
502 | } | |
48b1be6a | 503 | |
933a27d3 DH |
504 | static u16 asix_read_rx_ctl(struct usbnet *dev) |
505 | { | |
51bf2976 AV |
506 | __le16 v; |
507 | int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v); | |
933a27d3 | 508 | |
51bf2976 | 509 | if (ret < 0) { |
60b86755 | 510 | netdev_err(dev->net, "Error reading RX_CTL register: %02x\n", ret); |
51bf2976 | 511 | goto out; |
933a27d3 | 512 | } |
51bf2976 AV |
513 | ret = le16_to_cpu(v); |
514 | out: | |
48b1be6a DH |
515 | return ret; |
516 | } | |
517 | ||
518 | static int asix_write_rx_ctl(struct usbnet *dev, u16 mode) | |
519 | { | |
520 | int ret; | |
521 | ||
60b86755 | 522 | netdev_dbg(dev->net, "asix_write_rx_ctl() - mode = 0x%04x\n", mode); |
48b1be6a DH |
523 | ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL); |
524 | if (ret < 0) | |
60b86755 JP |
525 | netdev_err(dev->net, "Failed to write RX_CTL mode to 0x%04x: %02x\n", |
526 | mode, ret); | |
48b1be6a DH |
527 | |
528 | return ret; | |
529 | } | |
530 | ||
933a27d3 | 531 | static u16 asix_read_medium_status(struct usbnet *dev) |
2e55cc72 | 532 | { |
51bf2976 AV |
533 | __le16 v; |
534 | int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v); | |
2e55cc72 | 535 | |
51bf2976 | 536 | if (ret < 0) { |
60b86755 JP |
537 | netdev_err(dev->net, "Error reading Medium Status register: %02x\n", |
538 | ret); | |
83e1b918 | 539 | return ret; /* TODO: callers not checking for error ret */ |
2e55cc72 | 540 | } |
83e1b918 GG |
541 | |
542 | return le16_to_cpu(v); | |
543 | ||
2e55cc72 DB |
544 | } |
545 | ||
933a27d3 | 546 | static int asix_write_medium_mode(struct usbnet *dev, u16 mode) |
2e55cc72 | 547 | { |
933a27d3 | 548 | int ret; |
2e55cc72 | 549 | |
60b86755 | 550 | netdev_dbg(dev->net, "asix_write_medium_mode() - mode = 0x%04x\n", mode); |
933a27d3 DH |
551 | ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL); |
552 | if (ret < 0) | |
60b86755 JP |
553 | netdev_err(dev->net, "Failed to write Medium Mode mode to 0x%04x: %02x\n", |
554 | mode, ret); | |
2e55cc72 | 555 | |
933a27d3 DH |
556 | return ret; |
557 | } | |
2e55cc72 | 558 | |
933a27d3 DH |
559 | static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep) |
560 | { | |
561 | int ret; | |
2e55cc72 | 562 | |
60b86755 | 563 | netdev_dbg(dev->net, "asix_write_gpio() - value = 0x%04x\n", value); |
933a27d3 DH |
564 | ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL); |
565 | if (ret < 0) | |
60b86755 JP |
566 | netdev_err(dev->net, "Failed to write GPIO value 0x%04x: %02x\n", |
567 | value, ret); | |
2e55cc72 | 568 | |
933a27d3 DH |
569 | if (sleep) |
570 | msleep(sleep); | |
571 | ||
572 | return ret; | |
2e55cc72 DB |
573 | } |
574 | ||
933a27d3 DH |
575 | /* |
576 | * AX88772 & AX88178 have a 16-bit RX_CTL value | |
577 | */ | |
48b1be6a | 578 | static void asix_set_multicast(struct net_device *net) |
2e55cc72 DB |
579 | { |
580 | struct usbnet *dev = netdev_priv(net); | |
48b1be6a | 581 | struct asix_data *data = (struct asix_data *)&dev->data; |
933a27d3 | 582 | u16 rx_ctl = AX_DEFAULT_RX_CTL; |
2e55cc72 DB |
583 | |
584 | if (net->flags & IFF_PROMISC) { | |
933a27d3 | 585 | rx_ctl |= AX_RX_CTL_PRO; |
8e95a202 | 586 | } else if (net->flags & IFF_ALLMULTI || |
4cd24eaf | 587 | netdev_mc_count(net) > AX_MAX_MCAST) { |
933a27d3 | 588 | rx_ctl |= AX_RX_CTL_AMALL; |
4cd24eaf | 589 | } else if (netdev_mc_empty(net)) { |
2e55cc72 DB |
590 | /* just broadcast and directed */ |
591 | } else { | |
592 | /* We use the 20 byte dev->data | |
593 | * for our 8 byte filter buffer | |
594 | * to avoid allocating memory that | |
595 | * is tricky to free later */ | |
22bedad3 | 596 | struct netdev_hw_addr *ha; |
2e55cc72 | 597 | u32 crc_bits; |
2e55cc72 DB |
598 | |
599 | memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE); | |
600 | ||
601 | /* Build the multicast hash filter. */ | |
22bedad3 JP |
602 | netdev_for_each_mc_addr(ha, net) { |
603 | crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; | |
2e55cc72 DB |
604 | data->multi_filter[crc_bits >> 3] |= |
605 | 1 << (crc_bits & 7); | |
2e55cc72 DB |
606 | } |
607 | ||
48b1be6a | 608 | asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0, |
2e55cc72 DB |
609 | AX_MCAST_FILTER_SIZE, data->multi_filter); |
610 | ||
933a27d3 | 611 | rx_ctl |= AX_RX_CTL_AM; |
2e55cc72 DB |
612 | } |
613 | ||
48b1be6a | 614 | asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); |
2e55cc72 DB |
615 | } |
616 | ||
48b1be6a | 617 | static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc) |
2e55cc72 DB |
618 | { |
619 | struct usbnet *dev = netdev_priv(netdev); | |
51bf2976 | 620 | __le16 res; |
2e55cc72 | 621 | |
a9fc6338 | 622 | mutex_lock(&dev->phy_mutex); |
48b1be6a DH |
623 | asix_set_sw_mii(dev); |
624 | asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id, | |
51bf2976 | 625 | (__u16)loc, 2, &res); |
48b1be6a | 626 | asix_set_hw_mii(dev); |
a9fc6338 | 627 | mutex_unlock(&dev->phy_mutex); |
2e55cc72 | 628 | |
60b86755 JP |
629 | netdev_dbg(dev->net, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n", |
630 | phy_id, loc, le16_to_cpu(res)); | |
2e55cc72 | 631 | |
51bf2976 | 632 | return le16_to_cpu(res); |
2e55cc72 DB |
633 | } |
634 | ||
635 | static void | |
48b1be6a | 636 | asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val) |
2e55cc72 DB |
637 | { |
638 | struct usbnet *dev = netdev_priv(netdev); | |
51bf2976 | 639 | __le16 res = cpu_to_le16(val); |
2e55cc72 | 640 | |
60b86755 JP |
641 | netdev_dbg(dev->net, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n", |
642 | phy_id, loc, val); | |
a9fc6338 | 643 | mutex_lock(&dev->phy_mutex); |
48b1be6a | 644 | asix_set_sw_mii(dev); |
51bf2976 | 645 | asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res); |
48b1be6a | 646 | asix_set_hw_mii(dev); |
a9fc6338 | 647 | mutex_unlock(&dev->phy_mutex); |
2e55cc72 DB |
648 | } |
649 | ||
933a27d3 DH |
650 | /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */ |
651 | static u32 asix_get_phyid(struct usbnet *dev) | |
2e55cc72 | 652 | { |
933a27d3 DH |
653 | int phy_reg; |
654 | u32 phy_id; | |
a77929a2 | 655 | int i; |
2e55cc72 | 656 | |
a77929a2 GG |
657 | /* Poll for the rare case the FW or phy isn't ready yet. */ |
658 | for (i = 0; i < 100; i++) { | |
659 | phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1); | |
660 | if (phy_reg != 0 && phy_reg != 0xFFFF) | |
661 | break; | |
662 | mdelay(1); | |
663 | } | |
664 | ||
665 | if (phy_reg <= 0 || phy_reg == 0xFFFF) | |
933a27d3 | 666 | return 0; |
2e55cc72 | 667 | |
933a27d3 | 668 | phy_id = (phy_reg & 0xffff) << 16; |
2e55cc72 | 669 | |
933a27d3 DH |
670 | phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2); |
671 | if (phy_reg < 0) | |
672 | return 0; | |
673 | ||
674 | phy_id |= (phy_reg & 0xffff); | |
675 | ||
676 | return phy_id; | |
2e55cc72 DB |
677 | } |
678 | ||
679 | static void | |
48b1be6a | 680 | asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo) |
2e55cc72 DB |
681 | { |
682 | struct usbnet *dev = netdev_priv(net); | |
683 | u8 opt; | |
684 | ||
48b1be6a | 685 | if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) { |
2e55cc72 DB |
686 | wolinfo->supported = 0; |
687 | wolinfo->wolopts = 0; | |
688 | return; | |
689 | } | |
690 | wolinfo->supported = WAKE_PHY | WAKE_MAGIC; | |
691 | wolinfo->wolopts = 0; | |
f87ce5b2 | 692 | if (opt & AX_MONITOR_LINK) |
693 | wolinfo->wolopts |= WAKE_PHY; | |
694 | if (opt & AX_MONITOR_MAGIC) | |
695 | wolinfo->wolopts |= WAKE_MAGIC; | |
2e55cc72 DB |
696 | } |
697 | ||
698 | static int | |
48b1be6a | 699 | asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo) |
2e55cc72 DB |
700 | { |
701 | struct usbnet *dev = netdev_priv(net); | |
702 | u8 opt = 0; | |
2e55cc72 DB |
703 | |
704 | if (wolinfo->wolopts & WAKE_PHY) | |
705 | opt |= AX_MONITOR_LINK; | |
706 | if (wolinfo->wolopts & WAKE_MAGIC) | |
707 | opt |= AX_MONITOR_MAGIC; | |
2e55cc72 | 708 | |
48b1be6a | 709 | if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE, |
51bf2976 | 710 | opt, 0, 0, NULL) < 0) |
2e55cc72 DB |
711 | return -EINVAL; |
712 | ||
713 | return 0; | |
714 | } | |
715 | ||
48b1be6a | 716 | static int asix_get_eeprom_len(struct net_device *net) |
2e55cc72 | 717 | { |
933a27d3 DH |
718 | struct usbnet *dev = netdev_priv(net); |
719 | struct asix_data *data = (struct asix_data *)&dev->data; | |
720 | ||
721 | return data->eeprom_len; | |
2e55cc72 DB |
722 | } |
723 | ||
48b1be6a | 724 | static int asix_get_eeprom(struct net_device *net, |
2e55cc72 DB |
725 | struct ethtool_eeprom *eeprom, u8 *data) |
726 | { | |
727 | struct usbnet *dev = netdev_priv(net); | |
51bf2976 | 728 | __le16 *ebuf = (__le16 *)data; |
2e55cc72 DB |
729 | int i; |
730 | ||
731 | /* Crude hack to ensure that we don't overwrite memory | |
732 | * if an odd length is supplied | |
733 | */ | |
734 | if (eeprom->len % 2) | |
735 | return -EINVAL; | |
736 | ||
737 | eeprom->magic = AX_EEPROM_MAGIC; | |
738 | ||
739 | /* ax8817x returns 2 bytes from eeprom on read */ | |
740 | for (i=0; i < eeprom->len / 2; i++) { | |
48b1be6a | 741 | if (asix_read_cmd(dev, AX_CMD_READ_EEPROM, |
2e55cc72 DB |
742 | eeprom->offset + i, 0, 2, &ebuf[i]) < 0) |
743 | return -EINVAL; | |
744 | } | |
745 | return 0; | |
746 | } | |
747 | ||
48b1be6a | 748 | static void asix_get_drvinfo (struct net_device *net, |
2e55cc72 DB |
749 | struct ethtool_drvinfo *info) |
750 | { | |
933a27d3 DH |
751 | struct usbnet *dev = netdev_priv(net); |
752 | struct asix_data *data = (struct asix_data *)&dev->data; | |
753 | ||
2e55cc72 DB |
754 | /* Inherit standard device info */ |
755 | usbnet_get_drvinfo(net, info); | |
83e1b918 | 756 | strncpy (info->driver, DRIVER_NAME, sizeof info->driver); |
933a27d3 DH |
757 | strncpy (info->version, DRIVER_VERSION, sizeof info->version); |
758 | info->eedump_len = data->eeprom_len; | |
2e55cc72 DB |
759 | } |
760 | ||
933a27d3 DH |
761 | static u32 asix_get_link(struct net_device *net) |
762 | { | |
763 | struct usbnet *dev = netdev_priv(net); | |
764 | ||
765 | return mii_link_ok(&dev->mii); | |
766 | } | |
767 | ||
768 | static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd) | |
769 | { | |
770 | struct usbnet *dev = netdev_priv(net); | |
771 | ||
772 | return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); | |
773 | } | |
774 | ||
7f29a3ba JK |
775 | static int asix_set_mac_address(struct net_device *net, void *p) |
776 | { | |
777 | struct usbnet *dev = netdev_priv(net); | |
778 | struct asix_data *data = (struct asix_data *)&dev->data; | |
779 | struct sockaddr *addr = p; | |
780 | ||
781 | if (netif_running(net)) | |
782 | return -EBUSY; | |
783 | if (!is_valid_ether_addr(addr->sa_data)) | |
784 | return -EADDRNOTAVAIL; | |
785 | ||
786 | memcpy(net->dev_addr, addr->sa_data, ETH_ALEN); | |
787 | ||
788 | /* We use the 20 byte dev->data | |
789 | * for our 6 byte mac buffer | |
790 | * to avoid allocating memory that | |
791 | * is tricky to free later */ | |
792 | memcpy(data->mac_addr, addr->sa_data, ETH_ALEN); | |
793 | asix_write_cmd_async(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN, | |
794 | data->mac_addr); | |
795 | ||
796 | return 0; | |
797 | } | |
798 | ||
933a27d3 DH |
799 | /* We need to override some ethtool_ops so we require our |
800 | own structure so we don't interfere with other usbnet | |
801 | devices that may be connected at the same time. */ | |
0fc0b732 | 802 | static const struct ethtool_ops ax88172_ethtool_ops = { |
933a27d3 DH |
803 | .get_drvinfo = asix_get_drvinfo, |
804 | .get_link = asix_get_link, | |
933a27d3 | 805 | .get_msglevel = usbnet_get_msglevel, |
2e55cc72 | 806 | .set_msglevel = usbnet_set_msglevel, |
48b1be6a DH |
807 | .get_wol = asix_get_wol, |
808 | .set_wol = asix_set_wol, | |
809 | .get_eeprom_len = asix_get_eeprom_len, | |
810 | .get_eeprom = asix_get_eeprom, | |
c41286fd AB |
811 | .get_settings = usbnet_get_settings, |
812 | .set_settings = usbnet_set_settings, | |
813 | .nway_reset = usbnet_nway_reset, | |
2e55cc72 DB |
814 | }; |
815 | ||
933a27d3 | 816 | static void ax88172_set_multicast(struct net_device *net) |
2e55cc72 DB |
817 | { |
818 | struct usbnet *dev = netdev_priv(net); | |
933a27d3 DH |
819 | struct asix_data *data = (struct asix_data *)&dev->data; |
820 | u8 rx_ctl = 0x8c; | |
2e55cc72 | 821 | |
933a27d3 DH |
822 | if (net->flags & IFF_PROMISC) { |
823 | rx_ctl |= 0x01; | |
8e95a202 | 824 | } else if (net->flags & IFF_ALLMULTI || |
4cd24eaf | 825 | netdev_mc_count(net) > AX_MAX_MCAST) { |
933a27d3 | 826 | rx_ctl |= 0x02; |
4cd24eaf | 827 | } else if (netdev_mc_empty(net)) { |
933a27d3 DH |
828 | /* just broadcast and directed */ |
829 | } else { | |
830 | /* We use the 20 byte dev->data | |
831 | * for our 8 byte filter buffer | |
832 | * to avoid allocating memory that | |
833 | * is tricky to free later */ | |
22bedad3 | 834 | struct netdev_hw_addr *ha; |
933a27d3 | 835 | u32 crc_bits; |
933a27d3 DH |
836 | |
837 | memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE); | |
838 | ||
839 | /* Build the multicast hash filter. */ | |
22bedad3 JP |
840 | netdev_for_each_mc_addr(ha, net) { |
841 | crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; | |
933a27d3 DH |
842 | data->multi_filter[crc_bits >> 3] |= |
843 | 1 << (crc_bits & 7); | |
933a27d3 DH |
844 | } |
845 | ||
846 | asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0, | |
847 | AX_MCAST_FILTER_SIZE, data->multi_filter); | |
848 | ||
849 | rx_ctl |= 0x10; | |
850 | } | |
851 | ||
852 | asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); | |
853 | } | |
854 | ||
855 | static int ax88172_link_reset(struct usbnet *dev) | |
856 | { | |
857 | u8 mode; | |
8ae6daca | 858 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
933a27d3 DH |
859 | |
860 | mii_check_media(&dev->mii, 1, 1); | |
861 | mii_ethtool_gset(&dev->mii, &ecmd); | |
862 | mode = AX88172_MEDIUM_DEFAULT; | |
863 | ||
864 | if (ecmd.duplex != DUPLEX_FULL) | |
865 | mode |= ~AX88172_MEDIUM_FD; | |
866 | ||
8ae6daca DD |
867 | netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", |
868 | ethtool_cmd_speed(&ecmd), ecmd.duplex, mode); | |
933a27d3 DH |
869 | |
870 | asix_write_medium_mode(dev, mode); | |
871 | ||
872 | return 0; | |
2e55cc72 DB |
873 | } |
874 | ||
1703338c SH |
875 | static const struct net_device_ops ax88172_netdev_ops = { |
876 | .ndo_open = usbnet_open, | |
877 | .ndo_stop = usbnet_stop, | |
878 | .ndo_start_xmit = usbnet_start_xmit, | |
879 | .ndo_tx_timeout = usbnet_tx_timeout, | |
880 | .ndo_change_mtu = usbnet_change_mtu, | |
881 | .ndo_set_mac_address = eth_mac_addr, | |
882 | .ndo_validate_addr = eth_validate_addr, | |
883 | .ndo_do_ioctl = asix_ioctl, | |
afc4b13d | 884 | .ndo_set_rx_mode = ax88172_set_multicast, |
1703338c SH |
885 | }; |
886 | ||
48b1be6a | 887 | static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf) |
2e55cc72 DB |
888 | { |
889 | int ret = 0; | |
51bf2976 | 890 | u8 buf[ETH_ALEN]; |
2e55cc72 DB |
891 | int i; |
892 | unsigned long gpio_bits = dev->driver_info->data; | |
933a27d3 DH |
893 | struct asix_data *data = (struct asix_data *)&dev->data; |
894 | ||
895 | data->eeprom_len = AX88172_EEPROM_LEN; | |
2e55cc72 DB |
896 | |
897 | usbnet_get_endpoints(dev,intf); | |
898 | ||
2e55cc72 DB |
899 | /* Toggle the GPIOs in a manufacturer/model specific way */ |
900 | for (i = 2; i >= 0; i--) { | |
83e1b918 GG |
901 | ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, |
902 | (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL); | |
903 | if (ret < 0) | |
51bf2976 | 904 | goto out; |
2e55cc72 DB |
905 | msleep(5); |
906 | } | |
907 | ||
83e1b918 GG |
908 | ret = asix_write_rx_ctl(dev, 0x80); |
909 | if (ret < 0) | |
51bf2976 | 910 | goto out; |
2e55cc72 DB |
911 | |
912 | /* Get the MAC address */ | |
83e1b918 GG |
913 | ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf); |
914 | if (ret < 0) { | |
2e55cc72 | 915 | dbg("read AX_CMD_READ_NODE_ID failed: %d", ret); |
51bf2976 | 916 | goto out; |
2e55cc72 DB |
917 | } |
918 | memcpy(dev->net->dev_addr, buf, ETH_ALEN); | |
919 | ||
2e55cc72 DB |
920 | /* Initialize MII structure */ |
921 | dev->mii.dev = dev->net; | |
48b1be6a DH |
922 | dev->mii.mdio_read = asix_mdio_read; |
923 | dev->mii.mdio_write = asix_mdio_write; | |
2e55cc72 DB |
924 | dev->mii.phy_id_mask = 0x3f; |
925 | dev->mii.reg_num_mask = 0x1f; | |
933a27d3 | 926 | dev->mii.phy_id = asix_get_phy_addr(dev); |
2e55cc72 | 927 | |
1703338c | 928 | dev->net->netdev_ops = &ax88172_netdev_ops; |
48b1be6a | 929 | dev->net->ethtool_ops = &ax88172_ethtool_ops; |
2e55cc72 | 930 | |
933a27d3 DH |
931 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); |
932 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, | |
2e55cc72 DB |
933 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); |
934 | mii_nway_restart(&dev->mii); | |
935 | ||
936 | return 0; | |
51bf2976 AV |
937 | |
938 | out: | |
2e55cc72 DB |
939 | return ret; |
940 | } | |
941 | ||
0fc0b732 | 942 | static const struct ethtool_ops ax88772_ethtool_ops = { |
48b1be6a | 943 | .get_drvinfo = asix_get_drvinfo, |
933a27d3 | 944 | .get_link = asix_get_link, |
2e55cc72 DB |
945 | .get_msglevel = usbnet_get_msglevel, |
946 | .set_msglevel = usbnet_set_msglevel, | |
48b1be6a DH |
947 | .get_wol = asix_get_wol, |
948 | .set_wol = asix_set_wol, | |
949 | .get_eeprom_len = asix_get_eeprom_len, | |
950 | .get_eeprom = asix_get_eeprom, | |
c41286fd AB |
951 | .get_settings = usbnet_get_settings, |
952 | .set_settings = usbnet_set_settings, | |
953 | .nway_reset = usbnet_nway_reset, | |
2e55cc72 DB |
954 | }; |
955 | ||
933a27d3 DH |
956 | static int ax88772_link_reset(struct usbnet *dev) |
957 | { | |
958 | u16 mode; | |
8ae6daca | 959 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
933a27d3 DH |
960 | |
961 | mii_check_media(&dev->mii, 1, 1); | |
962 | mii_ethtool_gset(&dev->mii, &ecmd); | |
963 | mode = AX88772_MEDIUM_DEFAULT; | |
964 | ||
8ae6daca | 965 | if (ethtool_cmd_speed(&ecmd) != SPEED_100) |
933a27d3 DH |
966 | mode &= ~AX_MEDIUM_PS; |
967 | ||
968 | if (ecmd.duplex != DUPLEX_FULL) | |
969 | mode &= ~AX_MEDIUM_FD; | |
970 | ||
8ae6daca DD |
971 | netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", |
972 | ethtool_cmd_speed(&ecmd), ecmd.duplex, mode); | |
933a27d3 DH |
973 | |
974 | asix_write_medium_mode(dev, mode); | |
975 | ||
976 | return 0; | |
977 | } | |
978 | ||
4ad1438f | 979 | static int ax88772_reset(struct usbnet *dev) |
2e55cc72 | 980 | { |
8ef66bdc | 981 | struct asix_data *data = (struct asix_data *)&dev->data; |
d0ffff8f | 982 | int ret, embd_phy; |
933a27d3 | 983 | u16 rx_ctl; |
2e55cc72 | 984 | |
83e1b918 GG |
985 | ret = asix_write_gpio(dev, |
986 | AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5); | |
987 | if (ret < 0) | |
51bf2976 | 988 | goto out; |
2e55cc72 | 989 | |
d0ffff8f | 990 | embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0); |
4ad1438f | 991 | |
83e1b918 GG |
992 | ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL); |
993 | if (ret < 0) { | |
2e55cc72 | 994 | dbg("Select PHY #1 failed: %d", ret); |
51bf2976 | 995 | goto out; |
2e55cc72 DB |
996 | } |
997 | ||
83e1b918 GG |
998 | ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL); |
999 | if (ret < 0) | |
51bf2976 | 1000 | goto out; |
2e55cc72 DB |
1001 | |
1002 | msleep(150); | |
83e1b918 GG |
1003 | |
1004 | ret = asix_sw_reset(dev, AX_SWRESET_CLEAR); | |
1005 | if (ret < 0) | |
51bf2976 | 1006 | goto out; |
2e55cc72 DB |
1007 | |
1008 | msleep(150); | |
4ad1438f | 1009 | |
d0ffff8f | 1010 | if (embd_phy) { |
83e1b918 GG |
1011 | ret = asix_sw_reset(dev, AX_SWRESET_IPRL); |
1012 | if (ret < 0) | |
51bf2976 | 1013 | goto out; |
83e1b918 GG |
1014 | } else { |
1015 | ret = asix_sw_reset(dev, AX_SWRESET_PRTE); | |
1016 | if (ret < 0) | |
51bf2976 | 1017 | goto out; |
d0ffff8f | 1018 | } |
2e55cc72 DB |
1019 | |
1020 | msleep(150); | |
933a27d3 DH |
1021 | rx_ctl = asix_read_rx_ctl(dev); |
1022 | dbg("RX_CTL is 0x%04x after software reset", rx_ctl); | |
83e1b918 GG |
1023 | ret = asix_write_rx_ctl(dev, 0x0000); |
1024 | if (ret < 0) | |
51bf2976 | 1025 | goto out; |
2e55cc72 | 1026 | |
933a27d3 DH |
1027 | rx_ctl = asix_read_rx_ctl(dev); |
1028 | dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl); | |
1029 | ||
83e1b918 GG |
1030 | ret = asix_sw_reset(dev, AX_SWRESET_PRL); |
1031 | if (ret < 0) | |
51bf2976 | 1032 | goto out; |
2e55cc72 | 1033 | |
2e55cc72 | 1034 | msleep(150); |
48b1be6a | 1035 | |
83e1b918 GG |
1036 | ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL); |
1037 | if (ret < 0) | |
51bf2976 | 1038 | goto out; |
2e55cc72 | 1039 | |
48b1be6a | 1040 | msleep(150); |
2e55cc72 | 1041 | |
933a27d3 DH |
1042 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); |
1043 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, | |
2e55cc72 DB |
1044 | ADVERTISE_ALL | ADVERTISE_CSMA); |
1045 | mii_nway_restart(&dev->mii); | |
1046 | ||
83e1b918 GG |
1047 | ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT); |
1048 | if (ret < 0) | |
51bf2976 | 1049 | goto out; |
2e55cc72 | 1050 | |
83e1b918 | 1051 | ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0, |
2e55cc72 | 1052 | AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT, |
83e1b918 GG |
1053 | AX88772_IPG2_DEFAULT, 0, NULL); |
1054 | if (ret < 0) { | |
2e55cc72 | 1055 | dbg("Write IPG,IPG1,IPG2 failed: %d", ret); |
51bf2976 | 1056 | goto out; |
2e55cc72 | 1057 | } |
2e55cc72 | 1058 | |
8ef66bdc JK |
1059 | /* Rewrite MAC address */ |
1060 | memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN); | |
1061 | ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN, | |
1062 | data->mac_addr); | |
1063 | if (ret < 0) | |
1064 | goto out; | |
1065 | ||
2e55cc72 | 1066 | /* Set RX_CTL to default values with 2k buffer, and enable cactus */ |
83e1b918 GG |
1067 | ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL); |
1068 | if (ret < 0) | |
51bf2976 | 1069 | goto out; |
2e55cc72 | 1070 | |
933a27d3 DH |
1071 | rx_ctl = asix_read_rx_ctl(dev); |
1072 | dbg("RX_CTL is 0x%04x after all initializations", rx_ctl); | |
1073 | ||
1074 | rx_ctl = asix_read_medium_status(dev); | |
1075 | dbg("Medium Status is 0x%04x after all initializations", rx_ctl); | |
1076 | ||
4ad1438f GG |
1077 | return 0; |
1078 | ||
1079 | out: | |
1080 | return ret; | |
1081 | ||
1082 | } | |
1083 | ||
1084 | static const struct net_device_ops ax88772_netdev_ops = { | |
1085 | .ndo_open = usbnet_open, | |
1086 | .ndo_stop = usbnet_stop, | |
1087 | .ndo_start_xmit = usbnet_start_xmit, | |
1088 | .ndo_tx_timeout = usbnet_tx_timeout, | |
1089 | .ndo_change_mtu = usbnet_change_mtu, | |
1090 | .ndo_set_mac_address = asix_set_mac_address, | |
1091 | .ndo_validate_addr = eth_validate_addr, | |
1092 | .ndo_do_ioctl = asix_ioctl, | |
1093 | .ndo_set_rx_mode = asix_set_multicast, | |
1094 | }; | |
1095 | ||
1096 | static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf) | |
1097 | { | |
d3665188 | 1098 | int ret, embd_phy; |
4ad1438f GG |
1099 | struct asix_data *data = (struct asix_data *)&dev->data; |
1100 | u8 buf[ETH_ALEN]; | |
1101 | u32 phyid; | |
1102 | ||
1103 | data->eeprom_len = AX88772_EEPROM_LEN; | |
1104 | ||
1105 | usbnet_get_endpoints(dev,intf); | |
1106 | ||
1107 | /* Get the MAC address */ | |
83e1b918 GG |
1108 | ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf); |
1109 | if (ret < 0) { | |
4ad1438f | 1110 | dbg("Failed to read MAC address: %d", ret); |
83e1b918 | 1111 | return ret; |
4ad1438f GG |
1112 | } |
1113 | memcpy(dev->net->dev_addr, buf, ETH_ALEN); | |
1114 | ||
1115 | /* Initialize MII structure */ | |
1116 | dev->mii.dev = dev->net; | |
1117 | dev->mii.mdio_read = asix_mdio_read; | |
1118 | dev->mii.mdio_write = asix_mdio_write; | |
1119 | dev->mii.phy_id_mask = 0x1f; | |
1120 | dev->mii.reg_num_mask = 0x1f; | |
1121 | dev->mii.phy_id = asix_get_phy_addr(dev); | |
1122 | ||
4ad1438f GG |
1123 | dev->net->netdev_ops = &ax88772_netdev_ops; |
1124 | dev->net->ethtool_ops = &ax88772_ethtool_ops; | |
1125 | ||
d3665188 GG |
1126 | embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0); |
1127 | ||
1128 | /* Reset the PHY to normal operation mode */ | |
1129 | ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL); | |
1130 | if (ret < 0) { | |
1131 | dbg("Select PHY #1 failed: %d", ret); | |
1132 | return ret; | |
1133 | } | |
1134 | ||
1135 | ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL); | |
83e1b918 GG |
1136 | if (ret < 0) |
1137 | return ret; | |
4ad1438f | 1138 | |
d3665188 GG |
1139 | msleep(150); |
1140 | ||
1141 | ret = asix_sw_reset(dev, AX_SWRESET_CLEAR); | |
1142 | if (ret < 0) | |
1143 | return ret; | |
1144 | ||
1145 | msleep(150); | |
1146 | ||
1147 | ret = asix_sw_reset(dev, embd_phy ? AX_SWRESET_IPRL : AX_SWRESET_PRTE); | |
1148 | ||
1149 | /* Read PHYID register *AFTER* the PHY was reset properly */ | |
1150 | phyid = asix_get_phyid(dev); | |
1151 | dbg("PHYID=0x%08x", phyid); | |
1152 | ||
2e55cc72 DB |
1153 | /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */ |
1154 | if (dev->driver_info->flags & FLAG_FRAMING_AX) { | |
1155 | /* hard_mtu is still the default - the device does not support | |
1156 | jumbo eth frames */ | |
1157 | dev->rx_urb_size = 2048; | |
1158 | } | |
83e1b918 | 1159 | |
2e55cc72 | 1160 | return 0; |
2e55cc72 DB |
1161 | } |
1162 | ||
bc689c97 | 1163 | static const struct ethtool_ops ax88178_ethtool_ops = { |
933a27d3 DH |
1164 | .get_drvinfo = asix_get_drvinfo, |
1165 | .get_link = asix_get_link, | |
933a27d3 DH |
1166 | .get_msglevel = usbnet_get_msglevel, |
1167 | .set_msglevel = usbnet_set_msglevel, | |
1168 | .get_wol = asix_get_wol, | |
1169 | .set_wol = asix_set_wol, | |
1170 | .get_eeprom_len = asix_get_eeprom_len, | |
1171 | .get_eeprom = asix_get_eeprom, | |
c41286fd AB |
1172 | .get_settings = usbnet_get_settings, |
1173 | .set_settings = usbnet_set_settings, | |
1174 | .nway_reset = usbnet_nway_reset, | |
933a27d3 DH |
1175 | }; |
1176 | ||
1177 | static int marvell_phy_init(struct usbnet *dev) | |
2e55cc72 | 1178 | { |
933a27d3 DH |
1179 | struct asix_data *data = (struct asix_data *)&dev->data; |
1180 | u16 reg; | |
2e55cc72 | 1181 | |
60b86755 | 1182 | netdev_dbg(dev->net, "marvell_phy_init()\n"); |
2e55cc72 | 1183 | |
933a27d3 | 1184 | reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS); |
60b86755 | 1185 | netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg); |
2e55cc72 | 1186 | |
933a27d3 DH |
1187 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL, |
1188 | MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY); | |
2e55cc72 | 1189 | |
933a27d3 DH |
1190 | if (data->ledmode) { |
1191 | reg = asix_mdio_read(dev->net, dev->mii.phy_id, | |
1192 | MII_MARVELL_LED_CTRL); | |
60b86755 | 1193 | netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg); |
2e55cc72 | 1194 | |
933a27d3 DH |
1195 | reg &= 0xf8ff; |
1196 | reg |= (1 + 0x0100); | |
1197 | asix_mdio_write(dev->net, dev->mii.phy_id, | |
1198 | MII_MARVELL_LED_CTRL, reg); | |
2e55cc72 | 1199 | |
933a27d3 DH |
1200 | reg = asix_mdio_read(dev->net, dev->mii.phy_id, |
1201 | MII_MARVELL_LED_CTRL); | |
60b86755 | 1202 | netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg); |
933a27d3 DH |
1203 | reg &= 0xfc0f; |
1204 | } | |
2e55cc72 | 1205 | |
933a27d3 DH |
1206 | return 0; |
1207 | } | |
1208 | ||
610d885d GG |
1209 | static int rtl8211cl_phy_init(struct usbnet *dev) |
1210 | { | |
1211 | struct asix_data *data = (struct asix_data *)&dev->data; | |
1212 | ||
1213 | netdev_dbg(dev->net, "rtl8211cl_phy_init()\n"); | |
1214 | ||
1215 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005); | |
1216 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0); | |
1217 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x01, | |
1218 | asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080); | |
1219 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0); | |
1220 | ||
1221 | if (data->ledmode == 12) { | |
1222 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002); | |
1223 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb); | |
1224 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0); | |
1225 | } | |
1226 | ||
1227 | return 0; | |
1228 | } | |
1229 | ||
933a27d3 DH |
1230 | static int marvell_led_status(struct usbnet *dev, u16 speed) |
1231 | { | |
1232 | u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL); | |
1233 | ||
60b86755 | 1234 | netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg); |
933a27d3 DH |
1235 | |
1236 | /* Clear out the center LED bits - 0x03F0 */ | |
1237 | reg &= 0xfc0f; | |
1238 | ||
1239 | switch (speed) { | |
1240 | case SPEED_1000: | |
1241 | reg |= 0x03e0; | |
1242 | break; | |
1243 | case SPEED_100: | |
1244 | reg |= 0x03b0; | |
1245 | break; | |
1246 | default: | |
1247 | reg |= 0x02f0; | |
2e55cc72 DB |
1248 | } |
1249 | ||
60b86755 | 1250 | netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg); |
933a27d3 DH |
1251 | asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg); |
1252 | ||
1253 | return 0; | |
1254 | } | |
1255 | ||
610d885d GG |
1256 | static int ax88178_reset(struct usbnet *dev) |
1257 | { | |
1258 | struct asix_data *data = (struct asix_data *)&dev->data; | |
1259 | int ret; | |
1260 | __le16 eeprom; | |
1261 | u8 status; | |
1262 | int gpio0 = 0; | |
b2d3ad29 | 1263 | u32 phyid; |
610d885d GG |
1264 | |
1265 | asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status); | |
1266 | dbg("GPIO Status: 0x%04x", status); | |
1267 | ||
1268 | asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL); | |
1269 | asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom); | |
1270 | asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL); | |
1271 | ||
1272 | dbg("EEPROM index 0x17 is 0x%04x", eeprom); | |
1273 | ||
1274 | if (eeprom == cpu_to_le16(0xffff)) { | |
1275 | data->phymode = PHY_MODE_MARVELL; | |
1276 | data->ledmode = 0; | |
1277 | gpio0 = 1; | |
1278 | } else { | |
b2d3ad29 | 1279 | data->phymode = le16_to_cpu(eeprom) & 0x7F; |
610d885d GG |
1280 | data->ledmode = le16_to_cpu(eeprom) >> 8; |
1281 | gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1; | |
1282 | } | |
1283 | dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode); | |
1284 | ||
b2d3ad29 | 1285 | /* Power up external GigaPHY through AX88178 GPIO pin */ |
610d885d GG |
1286 | asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40); |
1287 | if ((le16_to_cpu(eeprom) >> 8) != 1) { | |
1288 | asix_write_gpio(dev, 0x003c, 30); | |
1289 | asix_write_gpio(dev, 0x001c, 300); | |
1290 | asix_write_gpio(dev, 0x003c, 30); | |
1291 | } else { | |
1292 | dbg("gpio phymode == 1 path"); | |
1293 | asix_write_gpio(dev, AX_GPIO_GPO1EN, 30); | |
1294 | asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30); | |
1295 | } | |
1296 | ||
b2d3ad29 GG |
1297 | /* Read PHYID register *AFTER* powering up PHY */ |
1298 | phyid = asix_get_phyid(dev); | |
1299 | dbg("PHYID=0x%08x", phyid); | |
1300 | ||
1301 | /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */ | |
1302 | asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL); | |
1303 | ||
610d885d GG |
1304 | asix_sw_reset(dev, 0); |
1305 | msleep(150); | |
1306 | ||
1307 | asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD); | |
1308 | msleep(150); | |
1309 | ||
1310 | asix_write_rx_ctl(dev, 0); | |
1311 | ||
1312 | if (data->phymode == PHY_MODE_MARVELL) { | |
1313 | marvell_phy_init(dev); | |
1314 | msleep(60); | |
1315 | } else if (data->phymode == PHY_MODE_RTL8211CL) | |
1316 | rtl8211cl_phy_init(dev); | |
1317 | ||
1318 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, | |
1319 | BMCR_RESET | BMCR_ANENABLE); | |
1320 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, | |
1321 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); | |
1322 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000, | |
1323 | ADVERTISE_1000FULL); | |
1324 | ||
1325 | mii_nway_restart(&dev->mii); | |
1326 | ||
83e1b918 GG |
1327 | ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT); |
1328 | if (ret < 0) | |
1329 | return ret; | |
610d885d | 1330 | |
71bc5d94 JK |
1331 | /* Rewrite MAC address */ |
1332 | memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN); | |
1333 | ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN, | |
1334 | data->mac_addr); | |
1335 | if (ret < 0) | |
1336 | return ret; | |
1337 | ||
83e1b918 GG |
1338 | ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL); |
1339 | if (ret < 0) | |
1340 | return ret; | |
610d885d GG |
1341 | |
1342 | return 0; | |
610d885d GG |
1343 | } |
1344 | ||
933a27d3 DH |
1345 | static int ax88178_link_reset(struct usbnet *dev) |
1346 | { | |
1347 | u16 mode; | |
8ae6daca | 1348 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
933a27d3 | 1349 | struct asix_data *data = (struct asix_data *)&dev->data; |
8ae6daca | 1350 | u32 speed; |
933a27d3 | 1351 | |
60b86755 | 1352 | netdev_dbg(dev->net, "ax88178_link_reset()\n"); |
933a27d3 DH |
1353 | |
1354 | mii_check_media(&dev->mii, 1, 1); | |
1355 | mii_ethtool_gset(&dev->mii, &ecmd); | |
1356 | mode = AX88178_MEDIUM_DEFAULT; | |
8ae6daca | 1357 | speed = ethtool_cmd_speed(&ecmd); |
933a27d3 | 1358 | |
8ae6daca | 1359 | if (speed == SPEED_1000) |
a7f75c0c | 1360 | mode |= AX_MEDIUM_GM; |
8ae6daca | 1361 | else if (speed == SPEED_100) |
933a27d3 DH |
1362 | mode |= AX_MEDIUM_PS; |
1363 | else | |
1364 | mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM); | |
1365 | ||
a7f75c0c PK |
1366 | mode |= AX_MEDIUM_ENCK; |
1367 | ||
933a27d3 DH |
1368 | if (ecmd.duplex == DUPLEX_FULL) |
1369 | mode |= AX_MEDIUM_FD; | |
1370 | else | |
1371 | mode &= ~AX_MEDIUM_FD; | |
1372 | ||
8ae6daca DD |
1373 | netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", |
1374 | speed, ecmd.duplex, mode); | |
933a27d3 DH |
1375 | |
1376 | asix_write_medium_mode(dev, mode); | |
1377 | ||
1378 | if (data->phymode == PHY_MODE_MARVELL && data->ledmode) | |
8ae6daca | 1379 | marvell_led_status(dev, speed); |
933a27d3 DH |
1380 | |
1381 | return 0; | |
1382 | } | |
1383 | ||
1384 | static void ax88178_set_mfb(struct usbnet *dev) | |
1385 | { | |
1386 | u16 mfb = AX_RX_CTL_MFB_16384; | |
1387 | u16 rxctl; | |
1388 | u16 medium; | |
1389 | int old_rx_urb_size = dev->rx_urb_size; | |
1390 | ||
1391 | if (dev->hard_mtu < 2048) { | |
1392 | dev->rx_urb_size = 2048; | |
1393 | mfb = AX_RX_CTL_MFB_2048; | |
1394 | } else if (dev->hard_mtu < 4096) { | |
1395 | dev->rx_urb_size = 4096; | |
1396 | mfb = AX_RX_CTL_MFB_4096; | |
1397 | } else if (dev->hard_mtu < 8192) { | |
1398 | dev->rx_urb_size = 8192; | |
1399 | mfb = AX_RX_CTL_MFB_8192; | |
1400 | } else if (dev->hard_mtu < 16384) { | |
1401 | dev->rx_urb_size = 16384; | |
1402 | mfb = AX_RX_CTL_MFB_16384; | |
2e55cc72 | 1403 | } |
933a27d3 DH |
1404 | |
1405 | rxctl = asix_read_rx_ctl(dev); | |
1406 | asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb); | |
1407 | ||
1408 | medium = asix_read_medium_status(dev); | |
1409 | if (dev->net->mtu > 1500) | |
1410 | medium |= AX_MEDIUM_JFE; | |
1411 | else | |
1412 | medium &= ~AX_MEDIUM_JFE; | |
1413 | asix_write_medium_mode(dev, medium); | |
1414 | ||
1415 | if (dev->rx_urb_size > old_rx_urb_size) | |
1416 | usbnet_unlink_rx_urbs(dev); | |
2e55cc72 DB |
1417 | } |
1418 | ||
933a27d3 | 1419 | static int ax88178_change_mtu(struct net_device *net, int new_mtu) |
2e55cc72 | 1420 | { |
933a27d3 DH |
1421 | struct usbnet *dev = netdev_priv(net); |
1422 | int ll_mtu = new_mtu + net->hard_header_len + 4; | |
2e55cc72 | 1423 | |
60b86755 | 1424 | netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu); |
2e55cc72 | 1425 | |
933a27d3 DH |
1426 | if (new_mtu <= 0 || ll_mtu > 16384) |
1427 | return -EINVAL; | |
1428 | ||
1429 | if ((ll_mtu % dev->maxpacket) == 0) | |
1430 | return -EDOM; | |
1431 | ||
1432 | net->mtu = new_mtu; | |
1433 | dev->hard_mtu = net->mtu + net->hard_header_len; | |
1434 | ax88178_set_mfb(dev); | |
1435 | ||
1436 | return 0; | |
1437 | } | |
1438 | ||
1703338c SH |
1439 | static const struct net_device_ops ax88178_netdev_ops = { |
1440 | .ndo_open = usbnet_open, | |
1441 | .ndo_stop = usbnet_stop, | |
1442 | .ndo_start_xmit = usbnet_start_xmit, | |
1443 | .ndo_tx_timeout = usbnet_tx_timeout, | |
7f29a3ba | 1444 | .ndo_set_mac_address = asix_set_mac_address, |
1703338c | 1445 | .ndo_validate_addr = eth_validate_addr, |
afc4b13d | 1446 | .ndo_set_rx_mode = asix_set_multicast, |
1703338c SH |
1447 | .ndo_do_ioctl = asix_ioctl, |
1448 | .ndo_change_mtu = ax88178_change_mtu, | |
1449 | }; | |
1450 | ||
933a27d3 DH |
1451 | static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf) |
1452 | { | |
933a27d3 | 1453 | int ret; |
51bf2976 | 1454 | u8 buf[ETH_ALEN]; |
79de9efd GG |
1455 | struct asix_data *data = (struct asix_data *)&dev->data; |
1456 | ||
1457 | data->eeprom_len = AX88772_EEPROM_LEN; | |
933a27d3 DH |
1458 | |
1459 | usbnet_get_endpoints(dev,intf); | |
1460 | ||
933a27d3 | 1461 | /* Get the MAC address */ |
83e1b918 GG |
1462 | ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf); |
1463 | if (ret < 0) { | |
933a27d3 | 1464 | dbg("Failed to read MAC address: %d", ret); |
83e1b918 | 1465 | return ret; |
2e55cc72 | 1466 | } |
933a27d3 | 1467 | memcpy(dev->net->dev_addr, buf, ETH_ALEN); |
2e55cc72 | 1468 | |
933a27d3 DH |
1469 | /* Initialize MII structure */ |
1470 | dev->mii.dev = dev->net; | |
1471 | dev->mii.mdio_read = asix_mdio_read; | |
1472 | dev->mii.mdio_write = asix_mdio_write; | |
1473 | dev->mii.phy_id_mask = 0x1f; | |
1474 | dev->mii.reg_num_mask = 0xff; | |
1475 | dev->mii.supports_gmii = 1; | |
933a27d3 | 1476 | dev->mii.phy_id = asix_get_phy_addr(dev); |
1703338c SH |
1477 | |
1478 | dev->net->netdev_ops = &ax88178_netdev_ops; | |
933a27d3 | 1479 | dev->net->ethtool_ops = &ax88178_ethtool_ops; |
2e55cc72 | 1480 | |
b2d3ad29 GG |
1481 | /* Blink LEDS so users know driver saw dongle */ |
1482 | asix_sw_reset(dev, 0); | |
1483 | msleep(150); | |
2e55cc72 | 1484 | |
b2d3ad29 GG |
1485 | asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD); |
1486 | msleep(150); | |
933a27d3 DH |
1487 | |
1488 | /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */ | |
1489 | if (dev->driver_info->flags & FLAG_FRAMING_AX) { | |
1490 | /* hard_mtu is still the default - the device does not support | |
1491 | jumbo eth frames */ | |
1492 | dev->rx_urb_size = 2048; | |
1493 | } | |
933a27d3 | 1494 | |
83e1b918 | 1495 | return 0; |
2e55cc72 DB |
1496 | } |
1497 | ||
1498 | static const struct driver_info ax8817x_info = { | |
1499 | .description = "ASIX AX8817x USB 2.0 Ethernet", | |
48b1be6a DH |
1500 | .bind = ax88172_bind, |
1501 | .status = asix_status, | |
2e55cc72 DB |
1502 | .link_reset = ax88172_link_reset, |
1503 | .reset = ax88172_link_reset, | |
37e8273c | 1504 | .flags = FLAG_ETHER | FLAG_LINK_INTR, |
2e55cc72 DB |
1505 | .data = 0x00130103, |
1506 | }; | |
1507 | ||
1508 | static const struct driver_info dlink_dub_e100_info = { | |
1509 | .description = "DLink DUB-E100 USB Ethernet", | |
48b1be6a DH |
1510 | .bind = ax88172_bind, |
1511 | .status = asix_status, | |
2e55cc72 DB |
1512 | .link_reset = ax88172_link_reset, |
1513 | .reset = ax88172_link_reset, | |
37e8273c | 1514 | .flags = FLAG_ETHER | FLAG_LINK_INTR, |
2e55cc72 DB |
1515 | .data = 0x009f9d9f, |
1516 | }; | |
1517 | ||
1518 | static const struct driver_info netgear_fa120_info = { | |
1519 | .description = "Netgear FA-120 USB Ethernet", | |
48b1be6a DH |
1520 | .bind = ax88172_bind, |
1521 | .status = asix_status, | |
2e55cc72 DB |
1522 | .link_reset = ax88172_link_reset, |
1523 | .reset = ax88172_link_reset, | |
37e8273c | 1524 | .flags = FLAG_ETHER | FLAG_LINK_INTR, |
2e55cc72 DB |
1525 | .data = 0x00130103, |
1526 | }; | |
1527 | ||
1528 | static const struct driver_info hawking_uf200_info = { | |
1529 | .description = "Hawking UF200 USB Ethernet", | |
48b1be6a DH |
1530 | .bind = ax88172_bind, |
1531 | .status = asix_status, | |
2e55cc72 DB |
1532 | .link_reset = ax88172_link_reset, |
1533 | .reset = ax88172_link_reset, | |
37e8273c | 1534 | .flags = FLAG_ETHER | FLAG_LINK_INTR, |
2e55cc72 DB |
1535 | .data = 0x001f1d1f, |
1536 | }; | |
1537 | ||
1538 | static const struct driver_info ax88772_info = { | |
1539 | .description = "ASIX AX88772 USB 2.0 Ethernet", | |
1540 | .bind = ax88772_bind, | |
48b1be6a | 1541 | .status = asix_status, |
2e55cc72 | 1542 | .link_reset = ax88772_link_reset, |
4ad1438f | 1543 | .reset = ax88772_reset, |
37e8273c | 1544 | .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR, |
933a27d3 DH |
1545 | .rx_fixup = asix_rx_fixup, |
1546 | .tx_fixup = asix_tx_fixup, | |
1547 | }; | |
1548 | ||
1549 | static const struct driver_info ax88178_info = { | |
1550 | .description = "ASIX AX88178 USB 2.0 Ethernet", | |
1551 | .bind = ax88178_bind, | |
1552 | .status = asix_status, | |
1553 | .link_reset = ax88178_link_reset, | |
610d885d | 1554 | .reset = ax88178_reset, |
37e8273c | 1555 | .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR, |
933a27d3 DH |
1556 | .rx_fixup = asix_rx_fixup, |
1557 | .tx_fixup = asix_tx_fixup, | |
2e55cc72 DB |
1558 | }; |
1559 | ||
1560 | static const struct usb_device_id products [] = { | |
1561 | { | |
1562 | // Linksys USB200M | |
1563 | USB_DEVICE (0x077b, 0x2226), | |
1564 | .driver_info = (unsigned long) &ax8817x_info, | |
1565 | }, { | |
1566 | // Netgear FA120 | |
1567 | USB_DEVICE (0x0846, 0x1040), | |
1568 | .driver_info = (unsigned long) &netgear_fa120_info, | |
1569 | }, { | |
1570 | // DLink DUB-E100 | |
1571 | USB_DEVICE (0x2001, 0x1a00), | |
1572 | .driver_info = (unsigned long) &dlink_dub_e100_info, | |
1573 | }, { | |
1574 | // Intellinet, ST Lab USB Ethernet | |
1575 | USB_DEVICE (0x0b95, 0x1720), | |
1576 | .driver_info = (unsigned long) &ax8817x_info, | |
1577 | }, { | |
1578 | // Hawking UF200, TrendNet TU2-ET100 | |
1579 | USB_DEVICE (0x07b8, 0x420a), | |
1580 | .driver_info = (unsigned long) &hawking_uf200_info, | |
1581 | }, { | |
39c4b38c DH |
1582 | // Billionton Systems, USB2AR |
1583 | USB_DEVICE (0x08dd, 0x90ff), | |
1584 | .driver_info = (unsigned long) &ax8817x_info, | |
2e55cc72 DB |
1585 | }, { |
1586 | // ATEN UC210T | |
1587 | USB_DEVICE (0x0557, 0x2009), | |
1588 | .driver_info = (unsigned long) &ax8817x_info, | |
1589 | }, { | |
1590 | // Buffalo LUA-U2-KTX | |
1591 | USB_DEVICE (0x0411, 0x003d), | |
1592 | .driver_info = (unsigned long) &ax8817x_info, | |
ac7b77f1 MD |
1593 | }, { |
1594 | // Buffalo LUA-U2-GT 10/100/1000 | |
1595 | USB_DEVICE (0x0411, 0x006e), | |
1596 | .driver_info = (unsigned long) &ax88178_info, | |
2e55cc72 DB |
1597 | }, { |
1598 | // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter" | |
1599 | USB_DEVICE (0x6189, 0x182d), | |
1600 | .driver_info = (unsigned long) &ax8817x_info, | |
1601 | }, { | |
1602 | // corega FEther USB2-TX | |
1603 | USB_DEVICE (0x07aa, 0x0017), | |
1604 | .driver_info = (unsigned long) &ax8817x_info, | |
1605 | }, { | |
1606 | // Surecom EP-1427X-2 | |
1607 | USB_DEVICE (0x1189, 0x0893), | |
1608 | .driver_info = (unsigned long) &ax8817x_info, | |
1609 | }, { | |
1610 | // goodway corp usb gwusb2e | |
1611 | USB_DEVICE (0x1631, 0x6200), | |
1612 | .driver_info = (unsigned long) &ax8817x_info, | |
39c4b38c DH |
1613 | }, { |
1614 | // JVC MP-PRX1 Port Replicator | |
1615 | USB_DEVICE (0x04f1, 0x3008), | |
1616 | .driver_info = (unsigned long) &ax8817x_info, | |
30885909 MV |
1617 | }, { |
1618 | // ASIX AX88772B 10/100 | |
1619 | USB_DEVICE (0x0b95, 0x772b), | |
1620 | .driver_info = (unsigned long) &ax88772_info, | |
2e55cc72 DB |
1621 | }, { |
1622 | // ASIX AX88772 10/100 | |
39c4b38c DH |
1623 | USB_DEVICE (0x0b95, 0x7720), |
1624 | .driver_info = (unsigned long) &ax88772_info, | |
7327413c EW |
1625 | }, { |
1626 | // ASIX AX88178 10/100/1000 | |
1627 | USB_DEVICE (0x0b95, 0x1780), | |
933a27d3 | 1628 | .driver_info = (unsigned long) &ax88178_info, |
f4680d3d AE |
1629 | }, { |
1630 | // Logitec LAN-GTJ/U2A | |
1631 | USB_DEVICE (0x0789, 0x0160), | |
1632 | .driver_info = (unsigned long) &ax88178_info, | |
5e0f76c6 DH |
1633 | }, { |
1634 | // Linksys USB200M Rev 2 | |
1635 | USB_DEVICE (0x13b1, 0x0018), | |
1636 | .driver_info = (unsigned long) &ax88772_info, | |
5732ce84 DH |
1637 | }, { |
1638 | // 0Q0 cable ethernet | |
1639 | USB_DEVICE (0x1557, 0x7720), | |
1640 | .driver_info = (unsigned long) &ax88772_info, | |
933a27d3 DH |
1641 | }, { |
1642 | // DLink DUB-E100 H/W Ver B1 | |
1643 | USB_DEVICE (0x07d1, 0x3c05), | |
1644 | .driver_info = (unsigned long) &ax88772_info, | |
b923e7fc DH |
1645 | }, { |
1646 | // DLink DUB-E100 H/W Ver B1 Alternate | |
1647 | USB_DEVICE (0x2001, 0x3c05), | |
1648 | .driver_info = (unsigned long) &ax88772_info, | |
933a27d3 DH |
1649 | }, { |
1650 | // Linksys USB1000 | |
1651 | USB_DEVICE (0x1737, 0x0039), | |
1652 | .driver_info = (unsigned long) &ax88178_info, | |
b29cf31d YH |
1653 | }, { |
1654 | // IO-DATA ETG-US2 | |
1655 | USB_DEVICE (0x04bb, 0x0930), | |
1656 | .driver_info = (unsigned long) &ax88178_info, | |
2ed22bc2 DH |
1657 | }, { |
1658 | // Belkin F5D5055 | |
1659 | USB_DEVICE(0x050d, 0x5055), | |
1660 | .driver_info = (unsigned long) &ax88178_info, | |
3d60efb5 AN |
1661 | }, { |
1662 | // Apple USB Ethernet Adapter | |
1663 | USB_DEVICE(0x05ac, 0x1402), | |
1664 | .driver_info = (unsigned long) &ax88772_info, | |
ccf95402 JC |
1665 | }, { |
1666 | // Cables-to-Go USB Ethernet Adapter | |
1667 | USB_DEVICE(0x0b95, 0x772a), | |
1668 | .driver_info = (unsigned long) &ax88772_info, | |
fef7cc08 GKH |
1669 | }, { |
1670 | // ABOCOM for pci | |
1671 | USB_DEVICE(0x14ea, 0xab11), | |
1672 | .driver_info = (unsigned long) &ax88178_info, | |
1673 | }, { | |
1674 | // ASIX 88772a | |
1675 | USB_DEVICE(0x0db0, 0xa877), | |
1676 | .driver_info = (unsigned long) &ax88772_info, | |
e8303a3b AJ |
1677 | }, { |
1678 | // Asus USB Ethernet Adapter | |
1679 | USB_DEVICE (0x0b95, 0x7e2b), | |
1680 | .driver_info = (unsigned long) &ax88772_info, | |
2e55cc72 DB |
1681 | }, |
1682 | { }, // END | |
1683 | }; | |
1684 | MODULE_DEVICE_TABLE(usb, products); | |
1685 | ||
1686 | static struct usb_driver asix_driver = { | |
83e1b918 | 1687 | .name = DRIVER_NAME, |
2e55cc72 DB |
1688 | .id_table = products, |
1689 | .probe = usbnet_probe, | |
1690 | .suspend = usbnet_suspend, | |
1691 | .resume = usbnet_resume, | |
1692 | .disconnect = usbnet_disconnect, | |
a11a6544 | 1693 | .supports_autosuspend = 1, |
2e55cc72 DB |
1694 | }; |
1695 | ||
d632eb1b | 1696 | module_usb_driver(asix_driver); |
2e55cc72 DB |
1697 | |
1698 | MODULE_AUTHOR("David Hollis"); | |
4ad1438f | 1699 | MODULE_VERSION(DRIVER_VERSION); |
2e55cc72 DB |
1700 | MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices"); |
1701 | MODULE_LICENSE("GPL"); | |
1702 |