Commit | Line | Data |
---|---|---|
2e55cc72 DB |
1 | /* |
2 | * ASIX AX8817X based USB 2.0 Ethernet Devices | |
933a27d3 | 3 | * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com> |
2e55cc72 | 4 | * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net> |
933a27d3 | 5 | * Copyright (C) 2006 James Painter <jamie.painter@iname.com> |
2e55cc72 DB |
6 | * Copyright (c) 2002-2003 TiVo Inc. |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | */ | |
22 | ||
23 | // #define DEBUG // error path messages, extra info | |
24 | // #define VERBOSE // more; success messages | |
25 | ||
2e55cc72 DB |
26 | #include <linux/module.h> |
27 | #include <linux/kmod.h> | |
2e55cc72 DB |
28 | #include <linux/init.h> |
29 | #include <linux/netdevice.h> | |
30 | #include <linux/etherdevice.h> | |
31 | #include <linux/ethtool.h> | |
32 | #include <linux/workqueue.h> | |
33 | #include <linux/mii.h> | |
34 | #include <linux/usb.h> | |
35 | #include <linux/crc32.h> | |
3692e94f | 36 | #include <linux/usb/usbnet.h> |
5a0e3ad6 | 37 | #include <linux/slab.h> |
2e55cc72 | 38 | |
f87ce5b2 | 39 | #define DRIVER_VERSION "22-Dec-2011" |
83e1b918 | 40 | #define DRIVER_NAME "asix" |
933a27d3 | 41 | |
2e55cc72 DB |
42 | /* ASIX AX8817X based USB 2.0 Ethernet Devices */ |
43 | ||
44 | #define AX_CMD_SET_SW_MII 0x06 | |
45 | #define AX_CMD_READ_MII_REG 0x07 | |
46 | #define AX_CMD_WRITE_MII_REG 0x08 | |
47 | #define AX_CMD_SET_HW_MII 0x0a | |
48 | #define AX_CMD_READ_EEPROM 0x0b | |
49 | #define AX_CMD_WRITE_EEPROM 0x0c | |
50 | #define AX_CMD_WRITE_ENABLE 0x0d | |
51 | #define AX_CMD_WRITE_DISABLE 0x0e | |
933a27d3 | 52 | #define AX_CMD_READ_RX_CTL 0x0f |
2e55cc72 DB |
53 | #define AX_CMD_WRITE_RX_CTL 0x10 |
54 | #define AX_CMD_READ_IPG012 0x11 | |
55 | #define AX_CMD_WRITE_IPG0 0x12 | |
56 | #define AX_CMD_WRITE_IPG1 0x13 | |
933a27d3 | 57 | #define AX_CMD_READ_NODE_ID 0x13 |
7f29a3ba | 58 | #define AX_CMD_WRITE_NODE_ID 0x14 |
2e55cc72 DB |
59 | #define AX_CMD_WRITE_IPG2 0x14 |
60 | #define AX_CMD_WRITE_MULTI_FILTER 0x16 | |
933a27d3 | 61 | #define AX88172_CMD_READ_NODE_ID 0x17 |
2e55cc72 DB |
62 | #define AX_CMD_READ_PHY_ID 0x19 |
63 | #define AX_CMD_READ_MEDIUM_STATUS 0x1a | |
64 | #define AX_CMD_WRITE_MEDIUM_MODE 0x1b | |
65 | #define AX_CMD_READ_MONITOR_MODE 0x1c | |
66 | #define AX_CMD_WRITE_MONITOR_MODE 0x1d | |
933a27d3 | 67 | #define AX_CMD_READ_GPIOS 0x1e |
2e55cc72 DB |
68 | #define AX_CMD_WRITE_GPIOS 0x1f |
69 | #define AX_CMD_SW_RESET 0x20 | |
70 | #define AX_CMD_SW_PHY_STATUS 0x21 | |
71 | #define AX_CMD_SW_PHY_SELECT 0x22 | |
2e55cc72 DB |
72 | |
73 | #define AX_MONITOR_MODE 0x01 | |
74 | #define AX_MONITOR_LINK 0x02 | |
75 | #define AX_MONITOR_MAGIC 0x04 | |
76 | #define AX_MONITOR_HSFS 0x10 | |
77 | ||
78 | /* AX88172 Medium Status Register values */ | |
933a27d3 DH |
79 | #define AX88172_MEDIUM_FD 0x02 |
80 | #define AX88172_MEDIUM_TX 0x04 | |
81 | #define AX88172_MEDIUM_FC 0x10 | |
82 | #define AX88172_MEDIUM_DEFAULT \ | |
83 | ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC ) | |
2e55cc72 DB |
84 | |
85 | #define AX_MCAST_FILTER_SIZE 8 | |
86 | #define AX_MAX_MCAST 64 | |
87 | ||
2e55cc72 DB |
88 | #define AX_SWRESET_CLEAR 0x00 |
89 | #define AX_SWRESET_RR 0x01 | |
90 | #define AX_SWRESET_RT 0x02 | |
91 | #define AX_SWRESET_PRTE 0x04 | |
92 | #define AX_SWRESET_PRL 0x08 | |
93 | #define AX_SWRESET_BZ 0x10 | |
94 | #define AX_SWRESET_IPRL 0x20 | |
95 | #define AX_SWRESET_IPPD 0x40 | |
96 | ||
97 | #define AX88772_IPG0_DEFAULT 0x15 | |
98 | #define AX88772_IPG1_DEFAULT 0x0c | |
99 | #define AX88772_IPG2_DEFAULT 0x12 | |
100 | ||
933a27d3 DH |
101 | /* AX88772 & AX88178 Medium Mode Register */ |
102 | #define AX_MEDIUM_PF 0x0080 | |
103 | #define AX_MEDIUM_JFE 0x0040 | |
104 | #define AX_MEDIUM_TFC 0x0020 | |
105 | #define AX_MEDIUM_RFC 0x0010 | |
106 | #define AX_MEDIUM_ENCK 0x0008 | |
107 | #define AX_MEDIUM_AC 0x0004 | |
108 | #define AX_MEDIUM_FD 0x0002 | |
109 | #define AX_MEDIUM_GM 0x0001 | |
110 | #define AX_MEDIUM_SM 0x1000 | |
111 | #define AX_MEDIUM_SBP 0x0800 | |
112 | #define AX_MEDIUM_PS 0x0200 | |
113 | #define AX_MEDIUM_RE 0x0100 | |
114 | ||
115 | #define AX88178_MEDIUM_DEFAULT \ | |
116 | (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \ | |
117 | AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \ | |
83e1b918 | 118 | AX_MEDIUM_RE) |
2e55cc72 | 119 | |
933a27d3 DH |
120 | #define AX88772_MEDIUM_DEFAULT \ |
121 | (AX_MEDIUM_FD | AX_MEDIUM_RFC | \ | |
122 | AX_MEDIUM_TFC | AX_MEDIUM_PS | \ | |
83e1b918 | 123 | AX_MEDIUM_AC | AX_MEDIUM_RE) |
933a27d3 DH |
124 | |
125 | /* AX88772 & AX88178 RX_CTL values */ | |
83e1b918 GG |
126 | #define AX_RX_CTL_SO 0x0080 |
127 | #define AX_RX_CTL_AP 0x0020 | |
128 | #define AX_RX_CTL_AM 0x0010 | |
129 | #define AX_RX_CTL_AB 0x0008 | |
130 | #define AX_RX_CTL_SEP 0x0004 | |
131 | #define AX_RX_CTL_AMALL 0x0002 | |
132 | #define AX_RX_CTL_PRO 0x0001 | |
133 | #define AX_RX_CTL_MFB_2048 0x0000 | |
134 | #define AX_RX_CTL_MFB_4096 0x0100 | |
135 | #define AX_RX_CTL_MFB_8192 0x0200 | |
136 | #define AX_RX_CTL_MFB_16384 0x0300 | |
137 | ||
138 | #define AX_DEFAULT_RX_CTL (AX_RX_CTL_SO | AX_RX_CTL_AB) | |
933a27d3 DH |
139 | |
140 | /* GPIO 0 .. 2 toggles */ | |
141 | #define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */ | |
142 | #define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */ | |
143 | #define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */ | |
144 | #define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */ | |
145 | #define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */ | |
146 | #define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */ | |
147 | #define AX_GPIO_RESERVED 0x40 /* Reserved */ | |
148 | #define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */ | |
149 | ||
150 | #define AX_EEPROM_MAGIC 0xdeadbeef | |
151 | #define AX88172_EEPROM_LEN 0x40 | |
152 | #define AX88772_EEPROM_LEN 0xff | |
153 | ||
154 | #define PHY_MODE_MARVELL 0x0000 | |
155 | #define MII_MARVELL_LED_CTRL 0x0018 | |
156 | #define MII_MARVELL_STATUS 0x001b | |
157 | #define MII_MARVELL_CTRL 0x0014 | |
158 | ||
159 | #define MARVELL_LED_MANUAL 0x0019 | |
160 | ||
161 | #define MARVELL_STATUS_HWCFG 0x0004 | |
162 | ||
163 | #define MARVELL_CTRL_TXDELAY 0x0002 | |
164 | #define MARVELL_CTRL_RXDELAY 0x0080 | |
2e55cc72 | 165 | |
3486140e | 166 | #define PHY_MODE_RTL8211CL 0x000C |
610d885d | 167 | |
2e55cc72 | 168 | /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */ |
48b1be6a | 169 | struct asix_data { |
2e55cc72 | 170 | u8 multi_filter[AX_MCAST_FILTER_SIZE]; |
7f29a3ba | 171 | u8 mac_addr[ETH_ALEN]; |
933a27d3 DH |
172 | u8 phymode; |
173 | u8 ledmode; | |
174 | u8 eeprom_len; | |
2e55cc72 DB |
175 | }; |
176 | ||
177 | struct ax88172_int_data { | |
51bf2976 | 178 | __le16 res1; |
2e55cc72 | 179 | u8 link; |
51bf2976 | 180 | __le16 res2; |
2e55cc72 | 181 | u8 status; |
51bf2976 | 182 | __le16 res3; |
ba2d3587 | 183 | } __packed; |
2e55cc72 | 184 | |
48b1be6a | 185 | static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, |
2e55cc72 DB |
186 | u16 size, void *data) |
187 | { | |
51bf2976 AV |
188 | void *buf; |
189 | int err = -ENOMEM; | |
190 | ||
60b86755 JP |
191 | netdev_dbg(dev->net, "asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", |
192 | cmd, value, index, size); | |
51bf2976 AV |
193 | |
194 | buf = kmalloc(size, GFP_KERNEL); | |
195 | if (!buf) | |
196 | goto out; | |
197 | ||
198 | err = usb_control_msg( | |
2e55cc72 DB |
199 | dev->udev, |
200 | usb_rcvctrlpipe(dev->udev, 0), | |
201 | cmd, | |
202 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
203 | value, | |
204 | index, | |
51bf2976 | 205 | buf, |
2e55cc72 DB |
206 | size, |
207 | USB_CTRL_GET_TIMEOUT); | |
94d43363 | 208 | if (err == size) |
51bf2976 | 209 | memcpy(data, buf, size); |
94d43363 RD |
210 | else if (err >= 0) |
211 | err = -EINVAL; | |
51bf2976 AV |
212 | kfree(buf); |
213 | ||
214 | out: | |
215 | return err; | |
2e55cc72 DB |
216 | } |
217 | ||
48b1be6a | 218 | static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, |
2e55cc72 DB |
219 | u16 size, void *data) |
220 | { | |
51bf2976 AV |
221 | void *buf = NULL; |
222 | int err = -ENOMEM; | |
223 | ||
60b86755 JP |
224 | netdev_dbg(dev->net, "asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", |
225 | cmd, value, index, size); | |
51bf2976 AV |
226 | |
227 | if (data) { | |
99bf2366 | 228 | buf = kmemdup(data, size, GFP_KERNEL); |
51bf2976 AV |
229 | if (!buf) |
230 | goto out; | |
51bf2976 AV |
231 | } |
232 | ||
233 | err = usb_control_msg( | |
2e55cc72 DB |
234 | dev->udev, |
235 | usb_sndctrlpipe(dev->udev, 0), | |
236 | cmd, | |
237 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
238 | value, | |
239 | index, | |
51bf2976 | 240 | buf, |
2e55cc72 DB |
241 | size, |
242 | USB_CTRL_SET_TIMEOUT); | |
51bf2976 AV |
243 | kfree(buf); |
244 | ||
245 | out: | |
246 | return err; | |
2e55cc72 DB |
247 | } |
248 | ||
7d12e780 | 249 | static void asix_async_cmd_callback(struct urb *urb) |
2e55cc72 DB |
250 | { |
251 | struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context; | |
c94cb314 | 252 | int status = urb->status; |
2e55cc72 | 253 | |
c94cb314 | 254 | if (status < 0) |
48b1be6a | 255 | printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d", |
c94cb314 | 256 | status); |
2e55cc72 DB |
257 | |
258 | kfree(req); | |
259 | usb_free_urb(urb); | |
260 | } | |
261 | ||
933a27d3 DH |
262 | static void |
263 | asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index, | |
264 | u16 size, void *data) | |
265 | { | |
266 | struct usb_ctrlrequest *req; | |
267 | int status; | |
268 | struct urb *urb; | |
269 | ||
60b86755 JP |
270 | netdev_dbg(dev->net, "asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", |
271 | cmd, value, index, size); | |
83e1b918 GG |
272 | |
273 | urb = usb_alloc_urb(0, GFP_ATOMIC); | |
274 | if (!urb) { | |
60b86755 | 275 | netdev_err(dev->net, "Error allocating URB in write_cmd_async!\n"); |
933a27d3 DH |
276 | return; |
277 | } | |
278 | ||
83e1b918 GG |
279 | req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC); |
280 | if (!req) { | |
60b86755 | 281 | netdev_err(dev->net, "Failed to allocate memory for control request\n"); |
933a27d3 DH |
282 | usb_free_urb(urb); |
283 | return; | |
284 | } | |
285 | ||
286 | req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE; | |
287 | req->bRequest = cmd; | |
9aa742ef ON |
288 | req->wValue = cpu_to_le16(value); |
289 | req->wIndex = cpu_to_le16(index); | |
290 | req->wLength = cpu_to_le16(size); | |
933a27d3 DH |
291 | |
292 | usb_fill_control_urb(urb, dev->udev, | |
293 | usb_sndctrlpipe(dev->udev, 0), | |
294 | (void *)req, data, size, | |
295 | asix_async_cmd_callback, req); | |
296 | ||
83e1b918 GG |
297 | status = usb_submit_urb(urb, GFP_ATOMIC); |
298 | if (status < 0) { | |
60b86755 JP |
299 | netdev_err(dev->net, "Error submitting the control message: status=%d\n", |
300 | status); | |
933a27d3 DH |
301 | kfree(req); |
302 | usb_free_urb(urb); | |
303 | } | |
304 | } | |
305 | ||
306 | static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb) | |
307 | { | |
a9e0aca4 | 308 | int offset = 0; |
933a27d3 | 309 | |
a9e0aca4 ED |
310 | while (offset + sizeof(u32) < skb->len) { |
311 | struct sk_buff *ax_skb; | |
312 | u16 size; | |
313 | u32 header = get_unaligned_le32(skb->data + offset); | |
933a27d3 | 314 | |
a9e0aca4 | 315 | offset += sizeof(u32); |
bc466e67 | 316 | |
933a27d3 | 317 | /* get the packet length */ |
a9e0aca4 ED |
318 | size = (u16) (header & 0x7ff); |
319 | if (size != ((~header >> 16) & 0x07ff)) { | |
320 | netdev_err(dev->net, "asix_rx_fixup() Bad Header Length\n"); | |
321 | return 0; | |
3f78d1f2 NJ |
322 | } |
323 | ||
a9e0aca4 ED |
324 | if ((size > dev->net->mtu + ETH_HLEN) || |
325 | (size + offset > skb->len)) { | |
60b86755 JP |
326 | netdev_err(dev->net, "asix_rx_fixup() Bad RX Length %d\n", |
327 | size); | |
933a27d3 DH |
328 | return 0; |
329 | } | |
a9e0aca4 ED |
330 | ax_skb = netdev_alloc_skb_ip_align(dev->net, size); |
331 | if (!ax_skb) | |
933a27d3 | 332 | return 0; |
933a27d3 | 333 | |
a9e0aca4 ED |
334 | skb_put(ax_skb, size); |
335 | memcpy(ax_skb->data, skb->data + offset, size); | |
336 | usbnet_skb_return(dev, ax_skb); | |
933a27d3 | 337 | |
a9e0aca4 | 338 | offset += (size + 1) & 0xfffe; |
933a27d3 DH |
339 | } |
340 | ||
a9e0aca4 | 341 | if (skb->len != offset) { |
60b86755 JP |
342 | netdev_err(dev->net, "asix_rx_fixup() Bad SKB Length %d\n", |
343 | skb->len); | |
933a27d3 DH |
344 | return 0; |
345 | } | |
346 | return 1; | |
347 | } | |
348 | ||
349 | static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb, | |
350 | gfp_t flags) | |
351 | { | |
352 | int padlen; | |
353 | int headroom = skb_headroom(skb); | |
354 | int tailroom = skb_tailroom(skb); | |
355 | u32 packet_len; | |
356 | u32 padbytes = 0xffff0000; | |
357 | ||
358 | padlen = ((skb->len + 4) % 512) ? 0 : 4; | |
359 | ||
8e95a202 JP |
360 | if ((!skb_cloned(skb)) && |
361 | ((headroom + tailroom) >= (4 + padlen))) { | |
933a27d3 DH |
362 | if ((headroom < 4) || (tailroom < padlen)) { |
363 | skb->data = memmove(skb->head + 4, skb->data, skb->len); | |
27a884dc | 364 | skb_set_tail_pointer(skb, skb->len); |
933a27d3 DH |
365 | } |
366 | } else { | |
367 | struct sk_buff *skb2; | |
368 | skb2 = skb_copy_expand(skb, 4, padlen, flags); | |
369 | dev_kfree_skb_any(skb); | |
370 | skb = skb2; | |
371 | if (!skb) | |
372 | return NULL; | |
373 | } | |
374 | ||
375 | skb_push(skb, 4); | |
376 | packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4); | |
57e4f041 | 377 | cpu_to_le32s(&packet_len); |
27d7ff46 | 378 | skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len)); |
933a27d3 DH |
379 | |
380 | if ((skb->len % 512) == 0) { | |
57e4f041 | 381 | cpu_to_le32s(&padbytes); |
27a884dc | 382 | memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes)); |
933a27d3 DH |
383 | skb_put(skb, sizeof(padbytes)); |
384 | } | |
385 | return skb; | |
386 | } | |
387 | ||
388 | static void asix_status(struct usbnet *dev, struct urb *urb) | |
389 | { | |
390 | struct ax88172_int_data *event; | |
391 | int link; | |
392 | ||
393 | if (urb->actual_length < 8) | |
394 | return; | |
395 | ||
396 | event = urb->transfer_buffer; | |
397 | link = event->link & 0x01; | |
398 | if (netif_carrier_ok(dev->net) != link) { | |
399 | if (link) { | |
400 | netif_carrier_on(dev->net); | |
401 | usbnet_defer_kevent (dev, EVENT_LINK_RESET ); | |
402 | } else | |
403 | netif_carrier_off(dev->net); | |
60b86755 | 404 | netdev_dbg(dev->net, "Link Status is: %d\n", link); |
933a27d3 DH |
405 | } |
406 | } | |
407 | ||
48b1be6a DH |
408 | static inline int asix_set_sw_mii(struct usbnet *dev) |
409 | { | |
410 | int ret; | |
411 | ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL); | |
412 | if (ret < 0) | |
60b86755 | 413 | netdev_err(dev->net, "Failed to enable software MII access\n"); |
48b1be6a DH |
414 | return ret; |
415 | } | |
416 | ||
417 | static inline int asix_set_hw_mii(struct usbnet *dev) | |
418 | { | |
419 | int ret; | |
420 | ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL); | |
421 | if (ret < 0) | |
60b86755 | 422 | netdev_err(dev->net, "Failed to enable hardware MII access\n"); |
48b1be6a DH |
423 | return ret; |
424 | } | |
425 | ||
933a27d3 | 426 | static inline int asix_get_phy_addr(struct usbnet *dev) |
48b1be6a | 427 | { |
51bf2976 AV |
428 | u8 buf[2]; |
429 | int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf); | |
48b1be6a | 430 | |
60b86755 | 431 | netdev_dbg(dev->net, "asix_get_phy_addr()\n"); |
933a27d3 | 432 | |
51bf2976 | 433 | if (ret < 0) { |
60b86755 | 434 | netdev_err(dev->net, "Error reading PHYID register: %02x\n", ret); |
51bf2976 | 435 | goto out; |
48b1be6a | 436 | } |
60b86755 JP |
437 | netdev_dbg(dev->net, "asix_get_phy_addr() returning 0x%04x\n", |
438 | *((__le16 *)buf)); | |
51bf2976 AV |
439 | ret = buf[1]; |
440 | ||
441 | out: | |
48b1be6a DH |
442 | return ret; |
443 | } | |
444 | ||
445 | static int asix_sw_reset(struct usbnet *dev, u8 flags) | |
446 | { | |
447 | int ret; | |
448 | ||
449 | ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL); | |
450 | if (ret < 0) | |
60b86755 | 451 | netdev_err(dev->net, "Failed to send software reset: %02x\n", ret); |
933a27d3 DH |
452 | |
453 | return ret; | |
454 | } | |
48b1be6a | 455 | |
933a27d3 DH |
456 | static u16 asix_read_rx_ctl(struct usbnet *dev) |
457 | { | |
51bf2976 AV |
458 | __le16 v; |
459 | int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v); | |
933a27d3 | 460 | |
51bf2976 | 461 | if (ret < 0) { |
60b86755 | 462 | netdev_err(dev->net, "Error reading RX_CTL register: %02x\n", ret); |
51bf2976 | 463 | goto out; |
933a27d3 | 464 | } |
51bf2976 AV |
465 | ret = le16_to_cpu(v); |
466 | out: | |
48b1be6a DH |
467 | return ret; |
468 | } | |
469 | ||
470 | static int asix_write_rx_ctl(struct usbnet *dev, u16 mode) | |
471 | { | |
472 | int ret; | |
473 | ||
60b86755 | 474 | netdev_dbg(dev->net, "asix_write_rx_ctl() - mode = 0x%04x\n", mode); |
48b1be6a DH |
475 | ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL); |
476 | if (ret < 0) | |
60b86755 JP |
477 | netdev_err(dev->net, "Failed to write RX_CTL mode to 0x%04x: %02x\n", |
478 | mode, ret); | |
48b1be6a DH |
479 | |
480 | return ret; | |
481 | } | |
482 | ||
933a27d3 | 483 | static u16 asix_read_medium_status(struct usbnet *dev) |
2e55cc72 | 484 | { |
51bf2976 AV |
485 | __le16 v; |
486 | int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v); | |
2e55cc72 | 487 | |
51bf2976 | 488 | if (ret < 0) { |
60b86755 JP |
489 | netdev_err(dev->net, "Error reading Medium Status register: %02x\n", |
490 | ret); | |
83e1b918 | 491 | return ret; /* TODO: callers not checking for error ret */ |
2e55cc72 | 492 | } |
83e1b918 GG |
493 | |
494 | return le16_to_cpu(v); | |
495 | ||
2e55cc72 DB |
496 | } |
497 | ||
933a27d3 | 498 | static int asix_write_medium_mode(struct usbnet *dev, u16 mode) |
2e55cc72 | 499 | { |
933a27d3 | 500 | int ret; |
2e55cc72 | 501 | |
60b86755 | 502 | netdev_dbg(dev->net, "asix_write_medium_mode() - mode = 0x%04x\n", mode); |
933a27d3 DH |
503 | ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL); |
504 | if (ret < 0) | |
60b86755 JP |
505 | netdev_err(dev->net, "Failed to write Medium Mode mode to 0x%04x: %02x\n", |
506 | mode, ret); | |
2e55cc72 | 507 | |
933a27d3 DH |
508 | return ret; |
509 | } | |
2e55cc72 | 510 | |
933a27d3 DH |
511 | static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep) |
512 | { | |
513 | int ret; | |
2e55cc72 | 514 | |
60b86755 | 515 | netdev_dbg(dev->net, "asix_write_gpio() - value = 0x%04x\n", value); |
933a27d3 DH |
516 | ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL); |
517 | if (ret < 0) | |
60b86755 JP |
518 | netdev_err(dev->net, "Failed to write GPIO value 0x%04x: %02x\n", |
519 | value, ret); | |
2e55cc72 | 520 | |
933a27d3 DH |
521 | if (sleep) |
522 | msleep(sleep); | |
523 | ||
524 | return ret; | |
2e55cc72 DB |
525 | } |
526 | ||
933a27d3 DH |
527 | /* |
528 | * AX88772 & AX88178 have a 16-bit RX_CTL value | |
529 | */ | |
48b1be6a | 530 | static void asix_set_multicast(struct net_device *net) |
2e55cc72 DB |
531 | { |
532 | struct usbnet *dev = netdev_priv(net); | |
48b1be6a | 533 | struct asix_data *data = (struct asix_data *)&dev->data; |
933a27d3 | 534 | u16 rx_ctl = AX_DEFAULT_RX_CTL; |
2e55cc72 DB |
535 | |
536 | if (net->flags & IFF_PROMISC) { | |
933a27d3 | 537 | rx_ctl |= AX_RX_CTL_PRO; |
8e95a202 | 538 | } else if (net->flags & IFF_ALLMULTI || |
4cd24eaf | 539 | netdev_mc_count(net) > AX_MAX_MCAST) { |
933a27d3 | 540 | rx_ctl |= AX_RX_CTL_AMALL; |
4cd24eaf | 541 | } else if (netdev_mc_empty(net)) { |
2e55cc72 DB |
542 | /* just broadcast and directed */ |
543 | } else { | |
544 | /* We use the 20 byte dev->data | |
545 | * for our 8 byte filter buffer | |
546 | * to avoid allocating memory that | |
547 | * is tricky to free later */ | |
22bedad3 | 548 | struct netdev_hw_addr *ha; |
2e55cc72 | 549 | u32 crc_bits; |
2e55cc72 DB |
550 | |
551 | memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE); | |
552 | ||
553 | /* Build the multicast hash filter. */ | |
22bedad3 JP |
554 | netdev_for_each_mc_addr(ha, net) { |
555 | crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; | |
2e55cc72 DB |
556 | data->multi_filter[crc_bits >> 3] |= |
557 | 1 << (crc_bits & 7); | |
2e55cc72 DB |
558 | } |
559 | ||
48b1be6a | 560 | asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0, |
2e55cc72 DB |
561 | AX_MCAST_FILTER_SIZE, data->multi_filter); |
562 | ||
933a27d3 | 563 | rx_ctl |= AX_RX_CTL_AM; |
2e55cc72 DB |
564 | } |
565 | ||
48b1be6a | 566 | asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); |
2e55cc72 DB |
567 | } |
568 | ||
48b1be6a | 569 | static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc) |
2e55cc72 DB |
570 | { |
571 | struct usbnet *dev = netdev_priv(netdev); | |
51bf2976 | 572 | __le16 res; |
2e55cc72 | 573 | |
a9fc6338 | 574 | mutex_lock(&dev->phy_mutex); |
48b1be6a DH |
575 | asix_set_sw_mii(dev); |
576 | asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id, | |
51bf2976 | 577 | (__u16)loc, 2, &res); |
48b1be6a | 578 | asix_set_hw_mii(dev); |
a9fc6338 | 579 | mutex_unlock(&dev->phy_mutex); |
2e55cc72 | 580 | |
60b86755 JP |
581 | netdev_dbg(dev->net, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n", |
582 | phy_id, loc, le16_to_cpu(res)); | |
2e55cc72 | 583 | |
51bf2976 | 584 | return le16_to_cpu(res); |
2e55cc72 DB |
585 | } |
586 | ||
587 | static void | |
48b1be6a | 588 | asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val) |
2e55cc72 DB |
589 | { |
590 | struct usbnet *dev = netdev_priv(netdev); | |
51bf2976 | 591 | __le16 res = cpu_to_le16(val); |
2e55cc72 | 592 | |
60b86755 JP |
593 | netdev_dbg(dev->net, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n", |
594 | phy_id, loc, val); | |
a9fc6338 | 595 | mutex_lock(&dev->phy_mutex); |
48b1be6a | 596 | asix_set_sw_mii(dev); |
51bf2976 | 597 | asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res); |
48b1be6a | 598 | asix_set_hw_mii(dev); |
a9fc6338 | 599 | mutex_unlock(&dev->phy_mutex); |
2e55cc72 DB |
600 | } |
601 | ||
933a27d3 DH |
602 | /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */ |
603 | static u32 asix_get_phyid(struct usbnet *dev) | |
2e55cc72 | 604 | { |
933a27d3 DH |
605 | int phy_reg; |
606 | u32 phy_id; | |
a77929a2 | 607 | int i; |
2e55cc72 | 608 | |
a77929a2 GG |
609 | /* Poll for the rare case the FW or phy isn't ready yet. */ |
610 | for (i = 0; i < 100; i++) { | |
611 | phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1); | |
612 | if (phy_reg != 0 && phy_reg != 0xFFFF) | |
613 | break; | |
614 | mdelay(1); | |
615 | } | |
616 | ||
617 | if (phy_reg <= 0 || phy_reg == 0xFFFF) | |
933a27d3 | 618 | return 0; |
2e55cc72 | 619 | |
933a27d3 | 620 | phy_id = (phy_reg & 0xffff) << 16; |
2e55cc72 | 621 | |
933a27d3 DH |
622 | phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2); |
623 | if (phy_reg < 0) | |
624 | return 0; | |
625 | ||
626 | phy_id |= (phy_reg & 0xffff); | |
627 | ||
628 | return phy_id; | |
2e55cc72 DB |
629 | } |
630 | ||
631 | static void | |
48b1be6a | 632 | asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo) |
2e55cc72 DB |
633 | { |
634 | struct usbnet *dev = netdev_priv(net); | |
635 | u8 opt; | |
636 | ||
48b1be6a | 637 | if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) { |
2e55cc72 DB |
638 | wolinfo->supported = 0; |
639 | wolinfo->wolopts = 0; | |
640 | return; | |
641 | } | |
642 | wolinfo->supported = WAKE_PHY | WAKE_MAGIC; | |
643 | wolinfo->wolopts = 0; | |
f87ce5b2 | 644 | if (opt & AX_MONITOR_LINK) |
645 | wolinfo->wolopts |= WAKE_PHY; | |
646 | if (opt & AX_MONITOR_MAGIC) | |
647 | wolinfo->wolopts |= WAKE_MAGIC; | |
2e55cc72 DB |
648 | } |
649 | ||
650 | static int | |
48b1be6a | 651 | asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo) |
2e55cc72 DB |
652 | { |
653 | struct usbnet *dev = netdev_priv(net); | |
654 | u8 opt = 0; | |
2e55cc72 DB |
655 | |
656 | if (wolinfo->wolopts & WAKE_PHY) | |
657 | opt |= AX_MONITOR_LINK; | |
658 | if (wolinfo->wolopts & WAKE_MAGIC) | |
659 | opt |= AX_MONITOR_MAGIC; | |
2e55cc72 | 660 | |
48b1be6a | 661 | if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE, |
51bf2976 | 662 | opt, 0, 0, NULL) < 0) |
2e55cc72 DB |
663 | return -EINVAL; |
664 | ||
665 | return 0; | |
666 | } | |
667 | ||
48b1be6a | 668 | static int asix_get_eeprom_len(struct net_device *net) |
2e55cc72 | 669 | { |
933a27d3 DH |
670 | struct usbnet *dev = netdev_priv(net); |
671 | struct asix_data *data = (struct asix_data *)&dev->data; | |
672 | ||
673 | return data->eeprom_len; | |
2e55cc72 DB |
674 | } |
675 | ||
48b1be6a | 676 | static int asix_get_eeprom(struct net_device *net, |
2e55cc72 DB |
677 | struct ethtool_eeprom *eeprom, u8 *data) |
678 | { | |
679 | struct usbnet *dev = netdev_priv(net); | |
51bf2976 | 680 | __le16 *ebuf = (__le16 *)data; |
2e55cc72 DB |
681 | int i; |
682 | ||
683 | /* Crude hack to ensure that we don't overwrite memory | |
684 | * if an odd length is supplied | |
685 | */ | |
686 | if (eeprom->len % 2) | |
687 | return -EINVAL; | |
688 | ||
689 | eeprom->magic = AX_EEPROM_MAGIC; | |
690 | ||
691 | /* ax8817x returns 2 bytes from eeprom on read */ | |
692 | for (i=0; i < eeprom->len / 2; i++) { | |
48b1be6a | 693 | if (asix_read_cmd(dev, AX_CMD_READ_EEPROM, |
2e55cc72 DB |
694 | eeprom->offset + i, 0, 2, &ebuf[i]) < 0) |
695 | return -EINVAL; | |
696 | } | |
697 | return 0; | |
698 | } | |
699 | ||
48b1be6a | 700 | static void asix_get_drvinfo (struct net_device *net, |
2e55cc72 DB |
701 | struct ethtool_drvinfo *info) |
702 | { | |
933a27d3 DH |
703 | struct usbnet *dev = netdev_priv(net); |
704 | struct asix_data *data = (struct asix_data *)&dev->data; | |
705 | ||
2e55cc72 DB |
706 | /* Inherit standard device info */ |
707 | usbnet_get_drvinfo(net, info); | |
83e1b918 | 708 | strncpy (info->driver, DRIVER_NAME, sizeof info->driver); |
933a27d3 DH |
709 | strncpy (info->version, DRIVER_VERSION, sizeof info->version); |
710 | info->eedump_len = data->eeprom_len; | |
2e55cc72 DB |
711 | } |
712 | ||
933a27d3 DH |
713 | static u32 asix_get_link(struct net_device *net) |
714 | { | |
715 | struct usbnet *dev = netdev_priv(net); | |
716 | ||
717 | return mii_link_ok(&dev->mii); | |
718 | } | |
719 | ||
720 | static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd) | |
721 | { | |
722 | struct usbnet *dev = netdev_priv(net); | |
723 | ||
724 | return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); | |
725 | } | |
726 | ||
7f29a3ba JK |
727 | static int asix_set_mac_address(struct net_device *net, void *p) |
728 | { | |
729 | struct usbnet *dev = netdev_priv(net); | |
730 | struct asix_data *data = (struct asix_data *)&dev->data; | |
731 | struct sockaddr *addr = p; | |
732 | ||
733 | if (netif_running(net)) | |
734 | return -EBUSY; | |
735 | if (!is_valid_ether_addr(addr->sa_data)) | |
736 | return -EADDRNOTAVAIL; | |
737 | ||
738 | memcpy(net->dev_addr, addr->sa_data, ETH_ALEN); | |
739 | ||
740 | /* We use the 20 byte dev->data | |
741 | * for our 6 byte mac buffer | |
742 | * to avoid allocating memory that | |
743 | * is tricky to free later */ | |
744 | memcpy(data->mac_addr, addr->sa_data, ETH_ALEN); | |
745 | asix_write_cmd_async(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN, | |
746 | data->mac_addr); | |
747 | ||
748 | return 0; | |
749 | } | |
750 | ||
933a27d3 DH |
751 | /* We need to override some ethtool_ops so we require our |
752 | own structure so we don't interfere with other usbnet | |
753 | devices that may be connected at the same time. */ | |
0fc0b732 | 754 | static const struct ethtool_ops ax88172_ethtool_ops = { |
933a27d3 DH |
755 | .get_drvinfo = asix_get_drvinfo, |
756 | .get_link = asix_get_link, | |
933a27d3 | 757 | .get_msglevel = usbnet_get_msglevel, |
2e55cc72 | 758 | .set_msglevel = usbnet_set_msglevel, |
48b1be6a DH |
759 | .get_wol = asix_get_wol, |
760 | .set_wol = asix_set_wol, | |
761 | .get_eeprom_len = asix_get_eeprom_len, | |
762 | .get_eeprom = asix_get_eeprom, | |
c41286fd AB |
763 | .get_settings = usbnet_get_settings, |
764 | .set_settings = usbnet_set_settings, | |
765 | .nway_reset = usbnet_nway_reset, | |
2e55cc72 DB |
766 | }; |
767 | ||
933a27d3 | 768 | static void ax88172_set_multicast(struct net_device *net) |
2e55cc72 DB |
769 | { |
770 | struct usbnet *dev = netdev_priv(net); | |
933a27d3 DH |
771 | struct asix_data *data = (struct asix_data *)&dev->data; |
772 | u8 rx_ctl = 0x8c; | |
2e55cc72 | 773 | |
933a27d3 DH |
774 | if (net->flags & IFF_PROMISC) { |
775 | rx_ctl |= 0x01; | |
8e95a202 | 776 | } else if (net->flags & IFF_ALLMULTI || |
4cd24eaf | 777 | netdev_mc_count(net) > AX_MAX_MCAST) { |
933a27d3 | 778 | rx_ctl |= 0x02; |
4cd24eaf | 779 | } else if (netdev_mc_empty(net)) { |
933a27d3 DH |
780 | /* just broadcast and directed */ |
781 | } else { | |
782 | /* We use the 20 byte dev->data | |
783 | * for our 8 byte filter buffer | |
784 | * to avoid allocating memory that | |
785 | * is tricky to free later */ | |
22bedad3 | 786 | struct netdev_hw_addr *ha; |
933a27d3 | 787 | u32 crc_bits; |
933a27d3 DH |
788 | |
789 | memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE); | |
790 | ||
791 | /* Build the multicast hash filter. */ | |
22bedad3 JP |
792 | netdev_for_each_mc_addr(ha, net) { |
793 | crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; | |
933a27d3 DH |
794 | data->multi_filter[crc_bits >> 3] |= |
795 | 1 << (crc_bits & 7); | |
933a27d3 DH |
796 | } |
797 | ||
798 | asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0, | |
799 | AX_MCAST_FILTER_SIZE, data->multi_filter); | |
800 | ||
801 | rx_ctl |= 0x10; | |
802 | } | |
803 | ||
804 | asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); | |
805 | } | |
806 | ||
807 | static int ax88172_link_reset(struct usbnet *dev) | |
808 | { | |
809 | u8 mode; | |
8ae6daca | 810 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
933a27d3 DH |
811 | |
812 | mii_check_media(&dev->mii, 1, 1); | |
813 | mii_ethtool_gset(&dev->mii, &ecmd); | |
814 | mode = AX88172_MEDIUM_DEFAULT; | |
815 | ||
816 | if (ecmd.duplex != DUPLEX_FULL) | |
817 | mode |= ~AX88172_MEDIUM_FD; | |
818 | ||
8ae6daca DD |
819 | netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", |
820 | ethtool_cmd_speed(&ecmd), ecmd.duplex, mode); | |
933a27d3 DH |
821 | |
822 | asix_write_medium_mode(dev, mode); | |
823 | ||
824 | return 0; | |
2e55cc72 DB |
825 | } |
826 | ||
1703338c SH |
827 | static const struct net_device_ops ax88172_netdev_ops = { |
828 | .ndo_open = usbnet_open, | |
829 | .ndo_stop = usbnet_stop, | |
830 | .ndo_start_xmit = usbnet_start_xmit, | |
831 | .ndo_tx_timeout = usbnet_tx_timeout, | |
832 | .ndo_change_mtu = usbnet_change_mtu, | |
833 | .ndo_set_mac_address = eth_mac_addr, | |
834 | .ndo_validate_addr = eth_validate_addr, | |
835 | .ndo_do_ioctl = asix_ioctl, | |
afc4b13d | 836 | .ndo_set_rx_mode = ax88172_set_multicast, |
1703338c SH |
837 | }; |
838 | ||
48b1be6a | 839 | static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf) |
2e55cc72 DB |
840 | { |
841 | int ret = 0; | |
51bf2976 | 842 | u8 buf[ETH_ALEN]; |
2e55cc72 DB |
843 | int i; |
844 | unsigned long gpio_bits = dev->driver_info->data; | |
933a27d3 DH |
845 | struct asix_data *data = (struct asix_data *)&dev->data; |
846 | ||
847 | data->eeprom_len = AX88172_EEPROM_LEN; | |
2e55cc72 DB |
848 | |
849 | usbnet_get_endpoints(dev,intf); | |
850 | ||
2e55cc72 DB |
851 | /* Toggle the GPIOs in a manufacturer/model specific way */ |
852 | for (i = 2; i >= 0; i--) { | |
83e1b918 GG |
853 | ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, |
854 | (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL); | |
855 | if (ret < 0) | |
51bf2976 | 856 | goto out; |
2e55cc72 DB |
857 | msleep(5); |
858 | } | |
859 | ||
83e1b918 GG |
860 | ret = asix_write_rx_ctl(dev, 0x80); |
861 | if (ret < 0) | |
51bf2976 | 862 | goto out; |
2e55cc72 DB |
863 | |
864 | /* Get the MAC address */ | |
83e1b918 GG |
865 | ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf); |
866 | if (ret < 0) { | |
2e55cc72 | 867 | dbg("read AX_CMD_READ_NODE_ID failed: %d", ret); |
51bf2976 | 868 | goto out; |
2e55cc72 DB |
869 | } |
870 | memcpy(dev->net->dev_addr, buf, ETH_ALEN); | |
871 | ||
2e55cc72 DB |
872 | /* Initialize MII structure */ |
873 | dev->mii.dev = dev->net; | |
48b1be6a DH |
874 | dev->mii.mdio_read = asix_mdio_read; |
875 | dev->mii.mdio_write = asix_mdio_write; | |
2e55cc72 DB |
876 | dev->mii.phy_id_mask = 0x3f; |
877 | dev->mii.reg_num_mask = 0x1f; | |
933a27d3 | 878 | dev->mii.phy_id = asix_get_phy_addr(dev); |
2e55cc72 | 879 | |
1703338c | 880 | dev->net->netdev_ops = &ax88172_netdev_ops; |
48b1be6a | 881 | dev->net->ethtool_ops = &ax88172_ethtool_ops; |
2e55cc72 | 882 | |
933a27d3 DH |
883 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); |
884 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, | |
2e55cc72 DB |
885 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); |
886 | mii_nway_restart(&dev->mii); | |
887 | ||
888 | return 0; | |
51bf2976 AV |
889 | |
890 | out: | |
2e55cc72 DB |
891 | return ret; |
892 | } | |
893 | ||
0fc0b732 | 894 | static const struct ethtool_ops ax88772_ethtool_ops = { |
48b1be6a | 895 | .get_drvinfo = asix_get_drvinfo, |
933a27d3 | 896 | .get_link = asix_get_link, |
2e55cc72 DB |
897 | .get_msglevel = usbnet_get_msglevel, |
898 | .set_msglevel = usbnet_set_msglevel, | |
48b1be6a DH |
899 | .get_wol = asix_get_wol, |
900 | .set_wol = asix_set_wol, | |
901 | .get_eeprom_len = asix_get_eeprom_len, | |
902 | .get_eeprom = asix_get_eeprom, | |
c41286fd AB |
903 | .get_settings = usbnet_get_settings, |
904 | .set_settings = usbnet_set_settings, | |
905 | .nway_reset = usbnet_nway_reset, | |
2e55cc72 DB |
906 | }; |
907 | ||
933a27d3 DH |
908 | static int ax88772_link_reset(struct usbnet *dev) |
909 | { | |
910 | u16 mode; | |
8ae6daca | 911 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
933a27d3 DH |
912 | |
913 | mii_check_media(&dev->mii, 1, 1); | |
914 | mii_ethtool_gset(&dev->mii, &ecmd); | |
915 | mode = AX88772_MEDIUM_DEFAULT; | |
916 | ||
8ae6daca | 917 | if (ethtool_cmd_speed(&ecmd) != SPEED_100) |
933a27d3 DH |
918 | mode &= ~AX_MEDIUM_PS; |
919 | ||
920 | if (ecmd.duplex != DUPLEX_FULL) | |
921 | mode &= ~AX_MEDIUM_FD; | |
922 | ||
8ae6daca DD |
923 | netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", |
924 | ethtool_cmd_speed(&ecmd), ecmd.duplex, mode); | |
933a27d3 DH |
925 | |
926 | asix_write_medium_mode(dev, mode); | |
927 | ||
928 | return 0; | |
929 | } | |
930 | ||
4ad1438f | 931 | static int ax88772_reset(struct usbnet *dev) |
2e55cc72 | 932 | { |
8ef66bdc | 933 | struct asix_data *data = (struct asix_data *)&dev->data; |
d0ffff8f | 934 | int ret, embd_phy; |
933a27d3 | 935 | u16 rx_ctl; |
2e55cc72 | 936 | |
83e1b918 GG |
937 | ret = asix_write_gpio(dev, |
938 | AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5); | |
939 | if (ret < 0) | |
51bf2976 | 940 | goto out; |
2e55cc72 | 941 | |
d0ffff8f | 942 | embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0); |
4ad1438f | 943 | |
83e1b918 GG |
944 | ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL); |
945 | if (ret < 0) { | |
2e55cc72 | 946 | dbg("Select PHY #1 failed: %d", ret); |
51bf2976 | 947 | goto out; |
2e55cc72 DB |
948 | } |
949 | ||
83e1b918 GG |
950 | ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL); |
951 | if (ret < 0) | |
51bf2976 | 952 | goto out; |
2e55cc72 DB |
953 | |
954 | msleep(150); | |
83e1b918 GG |
955 | |
956 | ret = asix_sw_reset(dev, AX_SWRESET_CLEAR); | |
957 | if (ret < 0) | |
51bf2976 | 958 | goto out; |
2e55cc72 DB |
959 | |
960 | msleep(150); | |
4ad1438f | 961 | |
d0ffff8f | 962 | if (embd_phy) { |
83e1b918 GG |
963 | ret = asix_sw_reset(dev, AX_SWRESET_IPRL); |
964 | if (ret < 0) | |
51bf2976 | 965 | goto out; |
83e1b918 GG |
966 | } else { |
967 | ret = asix_sw_reset(dev, AX_SWRESET_PRTE); | |
968 | if (ret < 0) | |
51bf2976 | 969 | goto out; |
d0ffff8f | 970 | } |
2e55cc72 DB |
971 | |
972 | msleep(150); | |
933a27d3 DH |
973 | rx_ctl = asix_read_rx_ctl(dev); |
974 | dbg("RX_CTL is 0x%04x after software reset", rx_ctl); | |
83e1b918 GG |
975 | ret = asix_write_rx_ctl(dev, 0x0000); |
976 | if (ret < 0) | |
51bf2976 | 977 | goto out; |
2e55cc72 | 978 | |
933a27d3 DH |
979 | rx_ctl = asix_read_rx_ctl(dev); |
980 | dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl); | |
981 | ||
83e1b918 GG |
982 | ret = asix_sw_reset(dev, AX_SWRESET_PRL); |
983 | if (ret < 0) | |
51bf2976 | 984 | goto out; |
2e55cc72 | 985 | |
2e55cc72 | 986 | msleep(150); |
48b1be6a | 987 | |
83e1b918 GG |
988 | ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL); |
989 | if (ret < 0) | |
51bf2976 | 990 | goto out; |
2e55cc72 | 991 | |
48b1be6a | 992 | msleep(150); |
2e55cc72 | 993 | |
933a27d3 DH |
994 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); |
995 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, | |
2e55cc72 DB |
996 | ADVERTISE_ALL | ADVERTISE_CSMA); |
997 | mii_nway_restart(&dev->mii); | |
998 | ||
83e1b918 GG |
999 | ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT); |
1000 | if (ret < 0) | |
51bf2976 | 1001 | goto out; |
2e55cc72 | 1002 | |
83e1b918 | 1003 | ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0, |
2e55cc72 | 1004 | AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT, |
83e1b918 GG |
1005 | AX88772_IPG2_DEFAULT, 0, NULL); |
1006 | if (ret < 0) { | |
2e55cc72 | 1007 | dbg("Write IPG,IPG1,IPG2 failed: %d", ret); |
51bf2976 | 1008 | goto out; |
2e55cc72 | 1009 | } |
2e55cc72 | 1010 | |
8ef66bdc JK |
1011 | /* Rewrite MAC address */ |
1012 | memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN); | |
1013 | ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN, | |
1014 | data->mac_addr); | |
1015 | if (ret < 0) | |
1016 | goto out; | |
1017 | ||
2e55cc72 | 1018 | /* Set RX_CTL to default values with 2k buffer, and enable cactus */ |
83e1b918 GG |
1019 | ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL); |
1020 | if (ret < 0) | |
51bf2976 | 1021 | goto out; |
2e55cc72 | 1022 | |
933a27d3 DH |
1023 | rx_ctl = asix_read_rx_ctl(dev); |
1024 | dbg("RX_CTL is 0x%04x after all initializations", rx_ctl); | |
1025 | ||
1026 | rx_ctl = asix_read_medium_status(dev); | |
1027 | dbg("Medium Status is 0x%04x after all initializations", rx_ctl); | |
1028 | ||
4ad1438f GG |
1029 | return 0; |
1030 | ||
1031 | out: | |
1032 | return ret; | |
1033 | ||
1034 | } | |
1035 | ||
1036 | static const struct net_device_ops ax88772_netdev_ops = { | |
1037 | .ndo_open = usbnet_open, | |
1038 | .ndo_stop = usbnet_stop, | |
1039 | .ndo_start_xmit = usbnet_start_xmit, | |
1040 | .ndo_tx_timeout = usbnet_tx_timeout, | |
1041 | .ndo_change_mtu = usbnet_change_mtu, | |
1042 | .ndo_set_mac_address = asix_set_mac_address, | |
1043 | .ndo_validate_addr = eth_validate_addr, | |
1044 | .ndo_do_ioctl = asix_ioctl, | |
1045 | .ndo_set_rx_mode = asix_set_multicast, | |
1046 | }; | |
1047 | ||
1048 | static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf) | |
1049 | { | |
d3665188 | 1050 | int ret, embd_phy; |
4ad1438f GG |
1051 | struct asix_data *data = (struct asix_data *)&dev->data; |
1052 | u8 buf[ETH_ALEN]; | |
1053 | u32 phyid; | |
1054 | ||
1055 | data->eeprom_len = AX88772_EEPROM_LEN; | |
1056 | ||
1057 | usbnet_get_endpoints(dev,intf); | |
1058 | ||
1059 | /* Get the MAC address */ | |
83e1b918 GG |
1060 | ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf); |
1061 | if (ret < 0) { | |
4ad1438f | 1062 | dbg("Failed to read MAC address: %d", ret); |
83e1b918 | 1063 | return ret; |
4ad1438f GG |
1064 | } |
1065 | memcpy(dev->net->dev_addr, buf, ETH_ALEN); | |
1066 | ||
1067 | /* Initialize MII structure */ | |
1068 | dev->mii.dev = dev->net; | |
1069 | dev->mii.mdio_read = asix_mdio_read; | |
1070 | dev->mii.mdio_write = asix_mdio_write; | |
1071 | dev->mii.phy_id_mask = 0x1f; | |
1072 | dev->mii.reg_num_mask = 0x1f; | |
1073 | dev->mii.phy_id = asix_get_phy_addr(dev); | |
1074 | ||
4ad1438f GG |
1075 | dev->net->netdev_ops = &ax88772_netdev_ops; |
1076 | dev->net->ethtool_ops = &ax88772_ethtool_ops; | |
1077 | ||
d3665188 GG |
1078 | embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0); |
1079 | ||
1080 | /* Reset the PHY to normal operation mode */ | |
1081 | ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL); | |
1082 | if (ret < 0) { | |
1083 | dbg("Select PHY #1 failed: %d", ret); | |
1084 | return ret; | |
1085 | } | |
1086 | ||
1087 | ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL); | |
83e1b918 GG |
1088 | if (ret < 0) |
1089 | return ret; | |
4ad1438f | 1090 | |
d3665188 GG |
1091 | msleep(150); |
1092 | ||
1093 | ret = asix_sw_reset(dev, AX_SWRESET_CLEAR); | |
1094 | if (ret < 0) | |
1095 | return ret; | |
1096 | ||
1097 | msleep(150); | |
1098 | ||
1099 | ret = asix_sw_reset(dev, embd_phy ? AX_SWRESET_IPRL : AX_SWRESET_PRTE); | |
1100 | ||
1101 | /* Read PHYID register *AFTER* the PHY was reset properly */ | |
1102 | phyid = asix_get_phyid(dev); | |
1103 | dbg("PHYID=0x%08x", phyid); | |
1104 | ||
2e55cc72 DB |
1105 | /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */ |
1106 | if (dev->driver_info->flags & FLAG_FRAMING_AX) { | |
1107 | /* hard_mtu is still the default - the device does not support | |
1108 | jumbo eth frames */ | |
1109 | dev->rx_urb_size = 2048; | |
1110 | } | |
83e1b918 | 1111 | |
2e55cc72 | 1112 | return 0; |
2e55cc72 DB |
1113 | } |
1114 | ||
bc689c97 | 1115 | static const struct ethtool_ops ax88178_ethtool_ops = { |
933a27d3 DH |
1116 | .get_drvinfo = asix_get_drvinfo, |
1117 | .get_link = asix_get_link, | |
933a27d3 DH |
1118 | .get_msglevel = usbnet_get_msglevel, |
1119 | .set_msglevel = usbnet_set_msglevel, | |
1120 | .get_wol = asix_get_wol, | |
1121 | .set_wol = asix_set_wol, | |
1122 | .get_eeprom_len = asix_get_eeprom_len, | |
1123 | .get_eeprom = asix_get_eeprom, | |
c41286fd AB |
1124 | .get_settings = usbnet_get_settings, |
1125 | .set_settings = usbnet_set_settings, | |
1126 | .nway_reset = usbnet_nway_reset, | |
933a27d3 DH |
1127 | }; |
1128 | ||
1129 | static int marvell_phy_init(struct usbnet *dev) | |
2e55cc72 | 1130 | { |
933a27d3 DH |
1131 | struct asix_data *data = (struct asix_data *)&dev->data; |
1132 | u16 reg; | |
2e55cc72 | 1133 | |
60b86755 | 1134 | netdev_dbg(dev->net, "marvell_phy_init()\n"); |
2e55cc72 | 1135 | |
933a27d3 | 1136 | reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS); |
60b86755 | 1137 | netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg); |
2e55cc72 | 1138 | |
933a27d3 DH |
1139 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL, |
1140 | MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY); | |
2e55cc72 | 1141 | |
933a27d3 DH |
1142 | if (data->ledmode) { |
1143 | reg = asix_mdio_read(dev->net, dev->mii.phy_id, | |
1144 | MII_MARVELL_LED_CTRL); | |
60b86755 | 1145 | netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg); |
2e55cc72 | 1146 | |
933a27d3 DH |
1147 | reg &= 0xf8ff; |
1148 | reg |= (1 + 0x0100); | |
1149 | asix_mdio_write(dev->net, dev->mii.phy_id, | |
1150 | MII_MARVELL_LED_CTRL, reg); | |
2e55cc72 | 1151 | |
933a27d3 DH |
1152 | reg = asix_mdio_read(dev->net, dev->mii.phy_id, |
1153 | MII_MARVELL_LED_CTRL); | |
60b86755 | 1154 | netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg); |
933a27d3 DH |
1155 | reg &= 0xfc0f; |
1156 | } | |
2e55cc72 | 1157 | |
933a27d3 DH |
1158 | return 0; |
1159 | } | |
1160 | ||
610d885d GG |
1161 | static int rtl8211cl_phy_init(struct usbnet *dev) |
1162 | { | |
1163 | struct asix_data *data = (struct asix_data *)&dev->data; | |
1164 | ||
1165 | netdev_dbg(dev->net, "rtl8211cl_phy_init()\n"); | |
1166 | ||
1167 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005); | |
1168 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0); | |
1169 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x01, | |
1170 | asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080); | |
1171 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0); | |
1172 | ||
1173 | if (data->ledmode == 12) { | |
1174 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002); | |
1175 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb); | |
1176 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0); | |
1177 | } | |
1178 | ||
1179 | return 0; | |
1180 | } | |
1181 | ||
933a27d3 DH |
1182 | static int marvell_led_status(struct usbnet *dev, u16 speed) |
1183 | { | |
1184 | u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL); | |
1185 | ||
60b86755 | 1186 | netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg); |
933a27d3 DH |
1187 | |
1188 | /* Clear out the center LED bits - 0x03F0 */ | |
1189 | reg &= 0xfc0f; | |
1190 | ||
1191 | switch (speed) { | |
1192 | case SPEED_1000: | |
1193 | reg |= 0x03e0; | |
1194 | break; | |
1195 | case SPEED_100: | |
1196 | reg |= 0x03b0; | |
1197 | break; | |
1198 | default: | |
1199 | reg |= 0x02f0; | |
2e55cc72 DB |
1200 | } |
1201 | ||
60b86755 | 1202 | netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg); |
933a27d3 DH |
1203 | asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg); |
1204 | ||
1205 | return 0; | |
1206 | } | |
1207 | ||
610d885d GG |
1208 | static int ax88178_reset(struct usbnet *dev) |
1209 | { | |
1210 | struct asix_data *data = (struct asix_data *)&dev->data; | |
1211 | int ret; | |
1212 | __le16 eeprom; | |
1213 | u8 status; | |
1214 | int gpio0 = 0; | |
b2d3ad29 | 1215 | u32 phyid; |
610d885d GG |
1216 | |
1217 | asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status); | |
1218 | dbg("GPIO Status: 0x%04x", status); | |
1219 | ||
1220 | asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL); | |
1221 | asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom); | |
1222 | asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL); | |
1223 | ||
1224 | dbg("EEPROM index 0x17 is 0x%04x", eeprom); | |
1225 | ||
1226 | if (eeprom == cpu_to_le16(0xffff)) { | |
1227 | data->phymode = PHY_MODE_MARVELL; | |
1228 | data->ledmode = 0; | |
1229 | gpio0 = 1; | |
1230 | } else { | |
b2d3ad29 | 1231 | data->phymode = le16_to_cpu(eeprom) & 0x7F; |
610d885d GG |
1232 | data->ledmode = le16_to_cpu(eeprom) >> 8; |
1233 | gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1; | |
1234 | } | |
1235 | dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode); | |
1236 | ||
b2d3ad29 | 1237 | /* Power up external GigaPHY through AX88178 GPIO pin */ |
610d885d GG |
1238 | asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40); |
1239 | if ((le16_to_cpu(eeprom) >> 8) != 1) { | |
1240 | asix_write_gpio(dev, 0x003c, 30); | |
1241 | asix_write_gpio(dev, 0x001c, 300); | |
1242 | asix_write_gpio(dev, 0x003c, 30); | |
1243 | } else { | |
1244 | dbg("gpio phymode == 1 path"); | |
1245 | asix_write_gpio(dev, AX_GPIO_GPO1EN, 30); | |
1246 | asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30); | |
1247 | } | |
1248 | ||
b2d3ad29 GG |
1249 | /* Read PHYID register *AFTER* powering up PHY */ |
1250 | phyid = asix_get_phyid(dev); | |
1251 | dbg("PHYID=0x%08x", phyid); | |
1252 | ||
1253 | /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */ | |
1254 | asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL); | |
1255 | ||
610d885d GG |
1256 | asix_sw_reset(dev, 0); |
1257 | msleep(150); | |
1258 | ||
1259 | asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD); | |
1260 | msleep(150); | |
1261 | ||
1262 | asix_write_rx_ctl(dev, 0); | |
1263 | ||
1264 | if (data->phymode == PHY_MODE_MARVELL) { | |
1265 | marvell_phy_init(dev); | |
1266 | msleep(60); | |
1267 | } else if (data->phymode == PHY_MODE_RTL8211CL) | |
1268 | rtl8211cl_phy_init(dev); | |
1269 | ||
1270 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, | |
1271 | BMCR_RESET | BMCR_ANENABLE); | |
1272 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, | |
1273 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); | |
1274 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000, | |
1275 | ADVERTISE_1000FULL); | |
1276 | ||
1277 | mii_nway_restart(&dev->mii); | |
1278 | ||
83e1b918 GG |
1279 | ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT); |
1280 | if (ret < 0) | |
1281 | return ret; | |
610d885d | 1282 | |
71bc5d94 JK |
1283 | /* Rewrite MAC address */ |
1284 | memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN); | |
1285 | ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN, | |
1286 | data->mac_addr); | |
1287 | if (ret < 0) | |
1288 | return ret; | |
1289 | ||
83e1b918 GG |
1290 | ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL); |
1291 | if (ret < 0) | |
1292 | return ret; | |
610d885d GG |
1293 | |
1294 | return 0; | |
610d885d GG |
1295 | } |
1296 | ||
933a27d3 DH |
1297 | static int ax88178_link_reset(struct usbnet *dev) |
1298 | { | |
1299 | u16 mode; | |
8ae6daca | 1300 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
933a27d3 | 1301 | struct asix_data *data = (struct asix_data *)&dev->data; |
8ae6daca | 1302 | u32 speed; |
933a27d3 | 1303 | |
60b86755 | 1304 | netdev_dbg(dev->net, "ax88178_link_reset()\n"); |
933a27d3 DH |
1305 | |
1306 | mii_check_media(&dev->mii, 1, 1); | |
1307 | mii_ethtool_gset(&dev->mii, &ecmd); | |
1308 | mode = AX88178_MEDIUM_DEFAULT; | |
8ae6daca | 1309 | speed = ethtool_cmd_speed(&ecmd); |
933a27d3 | 1310 | |
8ae6daca | 1311 | if (speed == SPEED_1000) |
a7f75c0c | 1312 | mode |= AX_MEDIUM_GM; |
8ae6daca | 1313 | else if (speed == SPEED_100) |
933a27d3 DH |
1314 | mode |= AX_MEDIUM_PS; |
1315 | else | |
1316 | mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM); | |
1317 | ||
a7f75c0c PK |
1318 | mode |= AX_MEDIUM_ENCK; |
1319 | ||
933a27d3 DH |
1320 | if (ecmd.duplex == DUPLEX_FULL) |
1321 | mode |= AX_MEDIUM_FD; | |
1322 | else | |
1323 | mode &= ~AX_MEDIUM_FD; | |
1324 | ||
8ae6daca DD |
1325 | netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", |
1326 | speed, ecmd.duplex, mode); | |
933a27d3 DH |
1327 | |
1328 | asix_write_medium_mode(dev, mode); | |
1329 | ||
1330 | if (data->phymode == PHY_MODE_MARVELL && data->ledmode) | |
8ae6daca | 1331 | marvell_led_status(dev, speed); |
933a27d3 DH |
1332 | |
1333 | return 0; | |
1334 | } | |
1335 | ||
1336 | static void ax88178_set_mfb(struct usbnet *dev) | |
1337 | { | |
1338 | u16 mfb = AX_RX_CTL_MFB_16384; | |
1339 | u16 rxctl; | |
1340 | u16 medium; | |
1341 | int old_rx_urb_size = dev->rx_urb_size; | |
1342 | ||
1343 | if (dev->hard_mtu < 2048) { | |
1344 | dev->rx_urb_size = 2048; | |
1345 | mfb = AX_RX_CTL_MFB_2048; | |
1346 | } else if (dev->hard_mtu < 4096) { | |
1347 | dev->rx_urb_size = 4096; | |
1348 | mfb = AX_RX_CTL_MFB_4096; | |
1349 | } else if (dev->hard_mtu < 8192) { | |
1350 | dev->rx_urb_size = 8192; | |
1351 | mfb = AX_RX_CTL_MFB_8192; | |
1352 | } else if (dev->hard_mtu < 16384) { | |
1353 | dev->rx_urb_size = 16384; | |
1354 | mfb = AX_RX_CTL_MFB_16384; | |
2e55cc72 | 1355 | } |
933a27d3 DH |
1356 | |
1357 | rxctl = asix_read_rx_ctl(dev); | |
1358 | asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb); | |
1359 | ||
1360 | medium = asix_read_medium_status(dev); | |
1361 | if (dev->net->mtu > 1500) | |
1362 | medium |= AX_MEDIUM_JFE; | |
1363 | else | |
1364 | medium &= ~AX_MEDIUM_JFE; | |
1365 | asix_write_medium_mode(dev, medium); | |
1366 | ||
1367 | if (dev->rx_urb_size > old_rx_urb_size) | |
1368 | usbnet_unlink_rx_urbs(dev); | |
2e55cc72 DB |
1369 | } |
1370 | ||
933a27d3 | 1371 | static int ax88178_change_mtu(struct net_device *net, int new_mtu) |
2e55cc72 | 1372 | { |
933a27d3 DH |
1373 | struct usbnet *dev = netdev_priv(net); |
1374 | int ll_mtu = new_mtu + net->hard_header_len + 4; | |
2e55cc72 | 1375 | |
60b86755 | 1376 | netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu); |
2e55cc72 | 1377 | |
933a27d3 DH |
1378 | if (new_mtu <= 0 || ll_mtu > 16384) |
1379 | return -EINVAL; | |
1380 | ||
1381 | if ((ll_mtu % dev->maxpacket) == 0) | |
1382 | return -EDOM; | |
1383 | ||
1384 | net->mtu = new_mtu; | |
1385 | dev->hard_mtu = net->mtu + net->hard_header_len; | |
1386 | ax88178_set_mfb(dev); | |
1387 | ||
1388 | return 0; | |
1389 | } | |
1390 | ||
1703338c SH |
1391 | static const struct net_device_ops ax88178_netdev_ops = { |
1392 | .ndo_open = usbnet_open, | |
1393 | .ndo_stop = usbnet_stop, | |
1394 | .ndo_start_xmit = usbnet_start_xmit, | |
1395 | .ndo_tx_timeout = usbnet_tx_timeout, | |
7f29a3ba | 1396 | .ndo_set_mac_address = asix_set_mac_address, |
1703338c | 1397 | .ndo_validate_addr = eth_validate_addr, |
afc4b13d | 1398 | .ndo_set_rx_mode = asix_set_multicast, |
1703338c SH |
1399 | .ndo_do_ioctl = asix_ioctl, |
1400 | .ndo_change_mtu = ax88178_change_mtu, | |
1401 | }; | |
1402 | ||
933a27d3 DH |
1403 | static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf) |
1404 | { | |
933a27d3 | 1405 | int ret; |
51bf2976 | 1406 | u8 buf[ETH_ALEN]; |
79de9efd GG |
1407 | struct asix_data *data = (struct asix_data *)&dev->data; |
1408 | ||
1409 | data->eeprom_len = AX88772_EEPROM_LEN; | |
933a27d3 DH |
1410 | |
1411 | usbnet_get_endpoints(dev,intf); | |
1412 | ||
933a27d3 | 1413 | /* Get the MAC address */ |
83e1b918 GG |
1414 | ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf); |
1415 | if (ret < 0) { | |
933a27d3 | 1416 | dbg("Failed to read MAC address: %d", ret); |
83e1b918 | 1417 | return ret; |
2e55cc72 | 1418 | } |
933a27d3 | 1419 | memcpy(dev->net->dev_addr, buf, ETH_ALEN); |
2e55cc72 | 1420 | |
933a27d3 DH |
1421 | /* Initialize MII structure */ |
1422 | dev->mii.dev = dev->net; | |
1423 | dev->mii.mdio_read = asix_mdio_read; | |
1424 | dev->mii.mdio_write = asix_mdio_write; | |
1425 | dev->mii.phy_id_mask = 0x1f; | |
1426 | dev->mii.reg_num_mask = 0xff; | |
1427 | dev->mii.supports_gmii = 1; | |
933a27d3 | 1428 | dev->mii.phy_id = asix_get_phy_addr(dev); |
1703338c SH |
1429 | |
1430 | dev->net->netdev_ops = &ax88178_netdev_ops; | |
933a27d3 | 1431 | dev->net->ethtool_ops = &ax88178_ethtool_ops; |
2e55cc72 | 1432 | |
b2d3ad29 GG |
1433 | /* Blink LEDS so users know driver saw dongle */ |
1434 | asix_sw_reset(dev, 0); | |
1435 | msleep(150); | |
2e55cc72 | 1436 | |
b2d3ad29 GG |
1437 | asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD); |
1438 | msleep(150); | |
933a27d3 DH |
1439 | |
1440 | /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */ | |
1441 | if (dev->driver_info->flags & FLAG_FRAMING_AX) { | |
1442 | /* hard_mtu is still the default - the device does not support | |
1443 | jumbo eth frames */ | |
1444 | dev->rx_urb_size = 2048; | |
1445 | } | |
933a27d3 | 1446 | |
83e1b918 | 1447 | return 0; |
2e55cc72 DB |
1448 | } |
1449 | ||
1450 | static const struct driver_info ax8817x_info = { | |
1451 | .description = "ASIX AX8817x USB 2.0 Ethernet", | |
48b1be6a DH |
1452 | .bind = ax88172_bind, |
1453 | .status = asix_status, | |
2e55cc72 DB |
1454 | .link_reset = ax88172_link_reset, |
1455 | .reset = ax88172_link_reset, | |
37e8273c | 1456 | .flags = FLAG_ETHER | FLAG_LINK_INTR, |
2e55cc72 DB |
1457 | .data = 0x00130103, |
1458 | }; | |
1459 | ||
1460 | static const struct driver_info dlink_dub_e100_info = { | |
1461 | .description = "DLink DUB-E100 USB Ethernet", | |
48b1be6a DH |
1462 | .bind = ax88172_bind, |
1463 | .status = asix_status, | |
2e55cc72 DB |
1464 | .link_reset = ax88172_link_reset, |
1465 | .reset = ax88172_link_reset, | |
37e8273c | 1466 | .flags = FLAG_ETHER | FLAG_LINK_INTR, |
2e55cc72 DB |
1467 | .data = 0x009f9d9f, |
1468 | }; | |
1469 | ||
1470 | static const struct driver_info netgear_fa120_info = { | |
1471 | .description = "Netgear FA-120 USB Ethernet", | |
48b1be6a DH |
1472 | .bind = ax88172_bind, |
1473 | .status = asix_status, | |
2e55cc72 DB |
1474 | .link_reset = ax88172_link_reset, |
1475 | .reset = ax88172_link_reset, | |
37e8273c | 1476 | .flags = FLAG_ETHER | FLAG_LINK_INTR, |
2e55cc72 DB |
1477 | .data = 0x00130103, |
1478 | }; | |
1479 | ||
1480 | static const struct driver_info hawking_uf200_info = { | |
1481 | .description = "Hawking UF200 USB Ethernet", | |
48b1be6a DH |
1482 | .bind = ax88172_bind, |
1483 | .status = asix_status, | |
2e55cc72 DB |
1484 | .link_reset = ax88172_link_reset, |
1485 | .reset = ax88172_link_reset, | |
37e8273c | 1486 | .flags = FLAG_ETHER | FLAG_LINK_INTR, |
2e55cc72 DB |
1487 | .data = 0x001f1d1f, |
1488 | }; | |
1489 | ||
1490 | static const struct driver_info ax88772_info = { | |
1491 | .description = "ASIX AX88772 USB 2.0 Ethernet", | |
1492 | .bind = ax88772_bind, | |
48b1be6a | 1493 | .status = asix_status, |
2e55cc72 | 1494 | .link_reset = ax88772_link_reset, |
4ad1438f | 1495 | .reset = ax88772_reset, |
a9e0aca4 | 1496 | .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET, |
933a27d3 DH |
1497 | .rx_fixup = asix_rx_fixup, |
1498 | .tx_fixup = asix_tx_fixup, | |
1499 | }; | |
1500 | ||
1501 | static const struct driver_info ax88178_info = { | |
1502 | .description = "ASIX AX88178 USB 2.0 Ethernet", | |
1503 | .bind = ax88178_bind, | |
1504 | .status = asix_status, | |
1505 | .link_reset = ax88178_link_reset, | |
610d885d | 1506 | .reset = ax88178_reset, |
37e8273c | 1507 | .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR, |
933a27d3 DH |
1508 | .rx_fixup = asix_rx_fixup, |
1509 | .tx_fixup = asix_tx_fixup, | |
2e55cc72 DB |
1510 | }; |
1511 | ||
1512 | static const struct usb_device_id products [] = { | |
1513 | { | |
1514 | // Linksys USB200M | |
1515 | USB_DEVICE (0x077b, 0x2226), | |
1516 | .driver_info = (unsigned long) &ax8817x_info, | |
1517 | }, { | |
1518 | // Netgear FA120 | |
1519 | USB_DEVICE (0x0846, 0x1040), | |
1520 | .driver_info = (unsigned long) &netgear_fa120_info, | |
1521 | }, { | |
1522 | // DLink DUB-E100 | |
1523 | USB_DEVICE (0x2001, 0x1a00), | |
1524 | .driver_info = (unsigned long) &dlink_dub_e100_info, | |
1525 | }, { | |
1526 | // Intellinet, ST Lab USB Ethernet | |
1527 | USB_DEVICE (0x0b95, 0x1720), | |
1528 | .driver_info = (unsigned long) &ax8817x_info, | |
1529 | }, { | |
1530 | // Hawking UF200, TrendNet TU2-ET100 | |
1531 | USB_DEVICE (0x07b8, 0x420a), | |
1532 | .driver_info = (unsigned long) &hawking_uf200_info, | |
1533 | }, { | |
39c4b38c DH |
1534 | // Billionton Systems, USB2AR |
1535 | USB_DEVICE (0x08dd, 0x90ff), | |
1536 | .driver_info = (unsigned long) &ax8817x_info, | |
2e55cc72 DB |
1537 | }, { |
1538 | // ATEN UC210T | |
1539 | USB_DEVICE (0x0557, 0x2009), | |
1540 | .driver_info = (unsigned long) &ax8817x_info, | |
1541 | }, { | |
1542 | // Buffalo LUA-U2-KTX | |
1543 | USB_DEVICE (0x0411, 0x003d), | |
1544 | .driver_info = (unsigned long) &ax8817x_info, | |
ac7b77f1 MD |
1545 | }, { |
1546 | // Buffalo LUA-U2-GT 10/100/1000 | |
1547 | USB_DEVICE (0x0411, 0x006e), | |
1548 | .driver_info = (unsigned long) &ax88178_info, | |
2e55cc72 DB |
1549 | }, { |
1550 | // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter" | |
1551 | USB_DEVICE (0x6189, 0x182d), | |
1552 | .driver_info = (unsigned long) &ax8817x_info, | |
4e503919 JN |
1553 | }, { |
1554 | // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter" | |
1555 | USB_DEVICE (0x0df6, 0x0056), | |
1556 | .driver_info = (unsigned long) &ax88178_info, | |
2e55cc72 DB |
1557 | }, { |
1558 | // corega FEther USB2-TX | |
1559 | USB_DEVICE (0x07aa, 0x0017), | |
1560 | .driver_info = (unsigned long) &ax8817x_info, | |
1561 | }, { | |
1562 | // Surecom EP-1427X-2 | |
1563 | USB_DEVICE (0x1189, 0x0893), | |
1564 | .driver_info = (unsigned long) &ax8817x_info, | |
1565 | }, { | |
1566 | // goodway corp usb gwusb2e | |
1567 | USB_DEVICE (0x1631, 0x6200), | |
1568 | .driver_info = (unsigned long) &ax8817x_info, | |
39c4b38c DH |
1569 | }, { |
1570 | // JVC MP-PRX1 Port Replicator | |
1571 | USB_DEVICE (0x04f1, 0x3008), | |
1572 | .driver_info = (unsigned long) &ax8817x_info, | |
30885909 MV |
1573 | }, { |
1574 | // ASIX AX88772B 10/100 | |
1575 | USB_DEVICE (0x0b95, 0x772b), | |
1576 | .driver_info = (unsigned long) &ax88772_info, | |
2e55cc72 DB |
1577 | }, { |
1578 | // ASIX AX88772 10/100 | |
39c4b38c DH |
1579 | USB_DEVICE (0x0b95, 0x7720), |
1580 | .driver_info = (unsigned long) &ax88772_info, | |
7327413c EW |
1581 | }, { |
1582 | // ASIX AX88178 10/100/1000 | |
1583 | USB_DEVICE (0x0b95, 0x1780), | |
933a27d3 | 1584 | .driver_info = (unsigned long) &ax88178_info, |
f4680d3d AE |
1585 | }, { |
1586 | // Logitec LAN-GTJ/U2A | |
1587 | USB_DEVICE (0x0789, 0x0160), | |
1588 | .driver_info = (unsigned long) &ax88178_info, | |
5e0f76c6 DH |
1589 | }, { |
1590 | // Linksys USB200M Rev 2 | |
1591 | USB_DEVICE (0x13b1, 0x0018), | |
1592 | .driver_info = (unsigned long) &ax88772_info, | |
5732ce84 DH |
1593 | }, { |
1594 | // 0Q0 cable ethernet | |
1595 | USB_DEVICE (0x1557, 0x7720), | |
1596 | .driver_info = (unsigned long) &ax88772_info, | |
933a27d3 DH |
1597 | }, { |
1598 | // DLink DUB-E100 H/W Ver B1 | |
1599 | USB_DEVICE (0x07d1, 0x3c05), | |
1600 | .driver_info = (unsigned long) &ax88772_info, | |
b923e7fc DH |
1601 | }, { |
1602 | // DLink DUB-E100 H/W Ver B1 Alternate | |
1603 | USB_DEVICE (0x2001, 0x3c05), | |
1604 | .driver_info = (unsigned long) &ax88772_info, | |
933a27d3 DH |
1605 | }, { |
1606 | // Linksys USB1000 | |
1607 | USB_DEVICE (0x1737, 0x0039), | |
1608 | .driver_info = (unsigned long) &ax88178_info, | |
b29cf31d YH |
1609 | }, { |
1610 | // IO-DATA ETG-US2 | |
1611 | USB_DEVICE (0x04bb, 0x0930), | |
1612 | .driver_info = (unsigned long) &ax88178_info, | |
2ed22bc2 DH |
1613 | }, { |
1614 | // Belkin F5D5055 | |
1615 | USB_DEVICE(0x050d, 0x5055), | |
1616 | .driver_info = (unsigned long) &ax88178_info, | |
3d60efb5 AN |
1617 | }, { |
1618 | // Apple USB Ethernet Adapter | |
1619 | USB_DEVICE(0x05ac, 0x1402), | |
1620 | .driver_info = (unsigned long) &ax88772_info, | |
ccf95402 JC |
1621 | }, { |
1622 | // Cables-to-Go USB Ethernet Adapter | |
1623 | USB_DEVICE(0x0b95, 0x772a), | |
1624 | .driver_info = (unsigned long) &ax88772_info, | |
fef7cc08 GKH |
1625 | }, { |
1626 | // ABOCOM for pci | |
1627 | USB_DEVICE(0x14ea, 0xab11), | |
1628 | .driver_info = (unsigned long) &ax88178_info, | |
1629 | }, { | |
1630 | // ASIX 88772a | |
1631 | USB_DEVICE(0x0db0, 0xa877), | |
1632 | .driver_info = (unsigned long) &ax88772_info, | |
e8303a3b AJ |
1633 | }, { |
1634 | // Asus USB Ethernet Adapter | |
1635 | USB_DEVICE (0x0b95, 0x7e2b), | |
1636 | .driver_info = (unsigned long) &ax88772_info, | |
2e55cc72 DB |
1637 | }, |
1638 | { }, // END | |
1639 | }; | |
1640 | MODULE_DEVICE_TABLE(usb, products); | |
1641 | ||
1642 | static struct usb_driver asix_driver = { | |
83e1b918 | 1643 | .name = DRIVER_NAME, |
2e55cc72 DB |
1644 | .id_table = products, |
1645 | .probe = usbnet_probe, | |
1646 | .suspend = usbnet_suspend, | |
1647 | .resume = usbnet_resume, | |
1648 | .disconnect = usbnet_disconnect, | |
a11a6544 | 1649 | .supports_autosuspend = 1, |
2e55cc72 DB |
1650 | }; |
1651 | ||
d632eb1b | 1652 | module_usb_driver(asix_driver); |
2e55cc72 DB |
1653 | |
1654 | MODULE_AUTHOR("David Hollis"); | |
4ad1438f | 1655 | MODULE_VERSION(DRIVER_VERSION); |
2e55cc72 DB |
1656 | MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices"); |
1657 | MODULE_LICENSE("GPL"); | |
1658 |