Commit | Line | Data |
---|---|---|
17364b80 DB |
1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* Aquantia Corp. Aquantia AQtion USB to 5GbE Controller | |
3 | * Copyright (C) 2003-2005 David Hollis <dhollis@davehollis.com> | |
4 | * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net> | |
5 | * Copyright (C) 2002-2003 TiVo Inc. | |
6 | * Copyright (C) 2017-2018 ASIX | |
7 | * Copyright (C) 2018 Aquantia Corp. | |
8 | */ | |
9 | ||
10 | #include <linux/module.h> | |
11 | #include <linux/netdevice.h> | |
027e6f78 | 12 | #include <linux/ethtool.h> |
17364b80 DB |
13 | #include <linux/mii.h> |
14 | #include <linux/usb.h> | |
59b04eea | 15 | #include <linux/crc32.h> |
df2d59a2 | 16 | #include <linux/if_vlan.h> |
17364b80 DB |
17 | #include <linux/usb/cdc.h> |
18 | #include <linux/usb/usbnet.h> | |
abbd8e7d | 19 | #include <linux/linkmode.h> |
17364b80 | 20 | |
619fcb44 DB |
21 | #include "aqc111.h" |
22 | ||
027e6f78 DB |
23 | #define DRIVER_NAME "aqc111" |
24 | ||
619fcb44 DB |
25 | static int aqc111_read_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value, |
26 | u16 index, u16 size, void *data) | |
27 | { | |
28 | int ret; | |
29 | ||
30 | ret = usbnet_read_cmd_nopm(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | | |
31 | USB_RECIP_DEVICE, value, index, data, size); | |
32 | ||
33 | if (unlikely(ret < 0)) | |
34 | netdev_warn(dev->net, | |
35 | "Failed to read(0x%x) reg index 0x%04x: %d\n", | |
36 | cmd, index, ret); | |
37 | ||
38 | return ret; | |
39 | } | |
40 | ||
41 | static int aqc111_read_cmd(struct usbnet *dev, u8 cmd, u16 value, | |
42 | u16 index, u16 size, void *data) | |
43 | { | |
44 | int ret; | |
45 | ||
46 | ret = usbnet_read_cmd(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | | |
47 | USB_RECIP_DEVICE, value, index, data, size); | |
48 | ||
49 | if (unlikely(ret < 0)) | |
50 | netdev_warn(dev->net, | |
51 | "Failed to read(0x%x) reg index 0x%04x: %d\n", | |
52 | cmd, index, ret); | |
53 | ||
54 | return ret; | |
55 | } | |
56 | ||
e58ba454 DB |
57 | static int aqc111_read16_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value, |
58 | u16 index, u16 *data) | |
59 | { | |
60 | int ret = 0; | |
61 | ||
62 | ret = aqc111_read_cmd_nopm(dev, cmd, value, index, sizeof(*data), data); | |
63 | le16_to_cpus(data); | |
64 | ||
65 | return ret; | |
66 | } | |
67 | ||
f3aa095a DB |
68 | static int aqc111_read16_cmd(struct usbnet *dev, u8 cmd, u16 value, |
69 | u16 index, u16 *data) | |
70 | { | |
71 | int ret = 0; | |
72 | ||
73 | ret = aqc111_read_cmd(dev, cmd, value, index, sizeof(*data), data); | |
74 | le16_to_cpus(data); | |
75 | ||
76 | return ret; | |
77 | } | |
78 | ||
619fcb44 DB |
79 | static int __aqc111_write_cmd(struct usbnet *dev, u8 cmd, u8 reqtype, |
80 | u16 value, u16 index, u16 size, const void *data) | |
81 | { | |
82 | int err = -ENOMEM; | |
83 | void *buf = NULL; | |
84 | ||
85 | netdev_dbg(dev->net, | |
86 | "%s cmd=%#x reqtype=%#x value=%#x index=%#x size=%d\n", | |
87 | __func__, cmd, reqtype, value, index, size); | |
88 | ||
89 | if (data) { | |
90 | buf = kmemdup(data, size, GFP_KERNEL); | |
91 | if (!buf) | |
92 | goto out; | |
93 | } | |
94 | ||
95 | err = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), | |
96 | cmd, reqtype, value, index, buf, size, | |
97 | (cmd == AQ_PHY_POWER) ? AQ_USB_PHY_SET_TIMEOUT : | |
98 | AQ_USB_SET_TIMEOUT); | |
99 | ||
100 | if (unlikely(err < 0)) | |
101 | netdev_warn(dev->net, | |
102 | "Failed to write(0x%x) reg index 0x%04x: %d\n", | |
103 | cmd, index, err); | |
104 | kfree(buf); | |
105 | ||
106 | out: | |
107 | return err; | |
108 | } | |
109 | ||
110 | static int aqc111_write_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value, | |
111 | u16 index, u16 size, void *data) | |
112 | { | |
113 | int ret; | |
114 | ||
115 | ret = __aqc111_write_cmd(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | | |
116 | USB_RECIP_DEVICE, value, index, size, data); | |
117 | ||
118 | return ret; | |
119 | } | |
120 | ||
121 | static int aqc111_write_cmd(struct usbnet *dev, u8 cmd, u16 value, | |
122 | u16 index, u16 size, void *data) | |
123 | { | |
124 | int ret; | |
125 | ||
126 | if (usb_autopm_get_interface(dev->intf) < 0) | |
127 | return -ENODEV; | |
128 | ||
129 | ret = __aqc111_write_cmd(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | | |
130 | USB_RECIP_DEVICE, value, index, size, data); | |
131 | ||
132 | usb_autopm_put_interface(dev->intf); | |
133 | ||
134 | return ret; | |
135 | } | |
136 | ||
f3aa095a DB |
137 | static int aqc111_write16_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value, |
138 | u16 index, u16 *data) | |
139 | { | |
140 | u16 tmp = *data; | |
141 | ||
142 | cpu_to_le16s(&tmp); | |
143 | ||
144 | return aqc111_write_cmd_nopm(dev, cmd, value, index, sizeof(tmp), &tmp); | |
145 | } | |
146 | ||
147 | static int aqc111_write16_cmd(struct usbnet *dev, u8 cmd, u16 value, | |
148 | u16 index, u16 *data) | |
149 | { | |
150 | u16 tmp = *data; | |
151 | ||
152 | cpu_to_le16s(&tmp); | |
153 | ||
154 | return aqc111_write_cmd(dev, cmd, value, index, sizeof(tmp), &tmp); | |
155 | } | |
156 | ||
33cd597f DB |
157 | static int aqc111_write32_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value, |
158 | u16 index, u32 *data) | |
159 | { | |
160 | u32 tmp = *data; | |
161 | ||
162 | cpu_to_le32s(&tmp); | |
163 | ||
164 | return aqc111_write_cmd_nopm(dev, cmd, value, index, sizeof(tmp), &tmp); | |
165 | } | |
166 | ||
167 | static int aqc111_write32_cmd(struct usbnet *dev, u8 cmd, u16 value, | |
168 | u16 index, u32 *data) | |
169 | { | |
170 | u32 tmp = *data; | |
171 | ||
172 | cpu_to_le32s(&tmp); | |
173 | ||
174 | return aqc111_write_cmd(dev, cmd, value, index, sizeof(tmp), &tmp); | |
175 | } | |
176 | ||
59b04eea DB |
177 | static int aqc111_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, |
178 | u16 index, u16 size, void *data) | |
179 | { | |
180 | return usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | | |
181 | USB_RECIP_DEVICE, value, index, data, | |
182 | size); | |
183 | } | |
184 | ||
185 | static int aqc111_write16_cmd_async(struct usbnet *dev, u8 cmd, u16 value, | |
186 | u16 index, u16 *data) | |
187 | { | |
188 | u16 tmp = *data; | |
189 | ||
190 | cpu_to_le16s(&tmp); | |
191 | ||
192 | return aqc111_write_cmd_async(dev, cmd, value, index, | |
193 | sizeof(tmp), &tmp); | |
194 | } | |
195 | ||
027e6f78 DB |
196 | static void aqc111_get_drvinfo(struct net_device *net, |
197 | struct ethtool_drvinfo *info) | |
198 | { | |
199 | struct usbnet *dev = netdev_priv(net); | |
200 | struct aqc111_data *aqc111_data = dev->driver_priv; | |
201 | ||
202 | /* Inherit standard device info */ | |
203 | usbnet_get_drvinfo(net, info); | |
204 | strlcpy(info->driver, DRIVER_NAME, sizeof(info->driver)); | |
205 | snprintf(info->fw_version, sizeof(info->fw_version), "%u.%u.%u", | |
206 | aqc111_data->fw_ver.major, | |
207 | aqc111_data->fw_ver.minor, | |
208 | aqc111_data->fw_ver.rev); | |
209 | info->eedump_len = 0x00; | |
210 | info->regdump_len = 0x00; | |
211 | } | |
212 | ||
e58ba454 DB |
213 | static void aqc111_get_wol(struct net_device *net, |
214 | struct ethtool_wolinfo *wolinfo) | |
215 | { | |
216 | struct usbnet *dev = netdev_priv(net); | |
217 | struct aqc111_data *aqc111_data = dev->driver_priv; | |
218 | ||
219 | wolinfo->supported = WAKE_MAGIC; | |
220 | wolinfo->wolopts = 0; | |
221 | ||
222 | if (aqc111_data->wol_flags & AQ_WOL_FLAG_MP) | |
223 | wolinfo->wolopts |= WAKE_MAGIC; | |
224 | } | |
225 | ||
226 | static int aqc111_set_wol(struct net_device *net, | |
227 | struct ethtool_wolinfo *wolinfo) | |
228 | { | |
229 | struct usbnet *dev = netdev_priv(net); | |
230 | struct aqc111_data *aqc111_data = dev->driver_priv; | |
231 | ||
232 | if (wolinfo->wolopts & ~WAKE_MAGIC) | |
233 | return -EINVAL; | |
234 | ||
235 | aqc111_data->wol_flags = 0; | |
236 | if (wolinfo->wolopts & WAKE_MAGIC) | |
237 | aqc111_data->wol_flags |= AQ_WOL_FLAG_MP; | |
238 | ||
239 | return 0; | |
240 | } | |
241 | ||
abbd8e7d DB |
242 | static void aqc111_speed_to_link_mode(u32 speed, |
243 | struct ethtool_link_ksettings *elk) | |
244 | { | |
245 | switch (speed) { | |
246 | case SPEED_5000: | |
247 | ethtool_link_ksettings_add_link_mode(elk, advertising, | |
248 | 5000baseT_Full); | |
249 | break; | |
250 | case SPEED_2500: | |
251 | ethtool_link_ksettings_add_link_mode(elk, advertising, | |
252 | 2500baseT_Full); | |
253 | break; | |
254 | case SPEED_1000: | |
255 | ethtool_link_ksettings_add_link_mode(elk, advertising, | |
256 | 1000baseT_Full); | |
257 | break; | |
258 | case SPEED_100: | |
259 | ethtool_link_ksettings_add_link_mode(elk, advertising, | |
260 | 100baseT_Full); | |
261 | break; | |
262 | } | |
263 | } | |
264 | ||
265 | static int aqc111_get_link_ksettings(struct net_device *net, | |
266 | struct ethtool_link_ksettings *elk) | |
267 | { | |
268 | struct usbnet *dev = netdev_priv(net); | |
269 | struct aqc111_data *aqc111_data = dev->driver_priv; | |
270 | enum usb_device_speed usb_speed = dev->udev->speed; | |
271 | u32 speed = SPEED_UNKNOWN; | |
272 | ||
273 | ethtool_link_ksettings_zero_link_mode(elk, supported); | |
274 | ethtool_link_ksettings_add_link_mode(elk, supported, | |
275 | 100baseT_Full); | |
276 | ethtool_link_ksettings_add_link_mode(elk, supported, | |
277 | 1000baseT_Full); | |
278 | if (usb_speed == USB_SPEED_SUPER) { | |
279 | ethtool_link_ksettings_add_link_mode(elk, supported, | |
280 | 2500baseT_Full); | |
281 | ethtool_link_ksettings_add_link_mode(elk, supported, | |
282 | 5000baseT_Full); | |
283 | } | |
284 | ethtool_link_ksettings_add_link_mode(elk, supported, TP); | |
285 | ethtool_link_ksettings_add_link_mode(elk, supported, Autoneg); | |
286 | ||
287 | elk->base.port = PORT_TP; | |
288 | elk->base.transceiver = XCVR_INTERNAL; | |
289 | ||
290 | elk->base.mdio_support = 0x00; /*Not supported*/ | |
291 | ||
292 | if (aqc111_data->autoneg) | |
293 | linkmode_copy(elk->link_modes.advertising, | |
294 | elk->link_modes.supported); | |
295 | else | |
296 | aqc111_speed_to_link_mode(aqc111_data->advertised_speed, elk); | |
297 | ||
298 | elk->base.autoneg = aqc111_data->autoneg; | |
299 | ||
300 | switch (aqc111_data->link_speed) { | |
301 | case AQ_INT_SPEED_5G: | |
302 | speed = SPEED_5000; | |
303 | break; | |
304 | case AQ_INT_SPEED_2_5G: | |
305 | speed = SPEED_2500; | |
306 | break; | |
307 | case AQ_INT_SPEED_1G: | |
308 | speed = SPEED_1000; | |
309 | break; | |
310 | case AQ_INT_SPEED_100M: | |
311 | speed = SPEED_100; | |
312 | break; | |
313 | } | |
314 | elk->base.duplex = DUPLEX_FULL; | |
315 | elk->base.speed = speed; | |
316 | ||
317 | return 0; | |
318 | } | |
319 | ||
7b8b0654 DB |
320 | static void aqc111_set_phy_speed(struct usbnet *dev, u8 autoneg, u16 speed) |
321 | { | |
322 | struct aqc111_data *aqc111_data = dev->driver_priv; | |
369b46e9 | 323 | u32 phy_on_the_wire; |
7b8b0654 DB |
324 | |
325 | aqc111_data->phy_cfg &= ~AQ_ADV_MASK; | |
326 | aqc111_data->phy_cfg |= AQ_PAUSE; | |
327 | aqc111_data->phy_cfg |= AQ_ASYM_PAUSE; | |
328 | aqc111_data->phy_cfg |= AQ_DOWNSHIFT; | |
329 | aqc111_data->phy_cfg &= ~AQ_DSH_RETRIES_MASK; | |
330 | aqc111_data->phy_cfg |= (3 << AQ_DSH_RETRIES_SHIFT) & | |
331 | AQ_DSH_RETRIES_MASK; | |
332 | ||
333 | if (autoneg == AUTONEG_ENABLE) { | |
334 | switch (speed) { | |
335 | case SPEED_5000: | |
336 | aqc111_data->phy_cfg |= AQ_ADV_5G; | |
337 | /* fall-through */ | |
338 | case SPEED_2500: | |
339 | aqc111_data->phy_cfg |= AQ_ADV_2G5; | |
340 | /* fall-through */ | |
341 | case SPEED_1000: | |
342 | aqc111_data->phy_cfg |= AQ_ADV_1G; | |
343 | /* fall-through */ | |
344 | case SPEED_100: | |
345 | aqc111_data->phy_cfg |= AQ_ADV_100M; | |
346 | /* fall-through */ | |
347 | } | |
348 | } else { | |
349 | switch (speed) { | |
350 | case SPEED_5000: | |
351 | aqc111_data->phy_cfg |= AQ_ADV_5G; | |
352 | break; | |
353 | case SPEED_2500: | |
354 | aqc111_data->phy_cfg |= AQ_ADV_2G5; | |
355 | break; | |
356 | case SPEED_1000: | |
357 | aqc111_data->phy_cfg |= AQ_ADV_1G; | |
358 | break; | |
359 | case SPEED_100: | |
360 | aqc111_data->phy_cfg |= AQ_ADV_100M; | |
361 | break; | |
362 | } | |
363 | } | |
364 | ||
369b46e9 ON |
365 | phy_on_the_wire = aqc111_data->phy_cfg; |
366 | aqc111_write32_cmd(dev, AQ_PHY_OPS, 0, 0, &phy_on_the_wire); | |
7b8b0654 DB |
367 | } |
368 | ||
abbd8e7d DB |
369 | static int aqc111_set_link_ksettings(struct net_device *net, |
370 | const struct ethtool_link_ksettings *elk) | |
371 | { | |
372 | struct usbnet *dev = netdev_priv(net); | |
373 | struct aqc111_data *aqc111_data = dev->driver_priv; | |
374 | enum usb_device_speed usb_speed = dev->udev->speed; | |
375 | u8 autoneg = elk->base.autoneg; | |
376 | u32 speed = elk->base.speed; | |
377 | ||
378 | if (autoneg == AUTONEG_ENABLE) { | |
379 | if (aqc111_data->autoneg != AUTONEG_ENABLE) { | |
380 | aqc111_data->autoneg = AUTONEG_ENABLE; | |
381 | aqc111_data->advertised_speed = | |
382 | (usb_speed == USB_SPEED_SUPER) ? | |
383 | SPEED_5000 : SPEED_1000; | |
384 | aqc111_set_phy_speed(dev, aqc111_data->autoneg, | |
385 | aqc111_data->advertised_speed); | |
386 | } | |
387 | } else { | |
388 | if (speed != SPEED_100 && | |
389 | speed != SPEED_1000 && | |
390 | speed != SPEED_2500 && | |
391 | speed != SPEED_5000 && | |
392 | speed != SPEED_UNKNOWN) | |
393 | return -EINVAL; | |
394 | ||
395 | if (elk->base.duplex != DUPLEX_FULL) | |
396 | return -EINVAL; | |
397 | ||
398 | if (usb_speed != USB_SPEED_SUPER && speed > SPEED_1000) | |
399 | return -EINVAL; | |
400 | ||
401 | aqc111_data->autoneg = AUTONEG_DISABLE; | |
402 | if (speed != SPEED_UNKNOWN) | |
403 | aqc111_data->advertised_speed = speed; | |
404 | ||
405 | aqc111_set_phy_speed(dev, aqc111_data->autoneg, | |
406 | aqc111_data->advertised_speed); | |
407 | } | |
408 | ||
409 | return 0; | |
410 | } | |
411 | ||
027e6f78 DB |
412 | static const struct ethtool_ops aqc111_ethtool_ops = { |
413 | .get_drvinfo = aqc111_get_drvinfo, | |
e58ba454 DB |
414 | .get_wol = aqc111_get_wol, |
415 | .set_wol = aqc111_set_wol, | |
027e6f78 DB |
416 | .get_msglevel = usbnet_get_msglevel, |
417 | .set_msglevel = usbnet_set_msglevel, | |
418 | .get_link = ethtool_op_get_link, | |
abbd8e7d DB |
419 | .get_link_ksettings = aqc111_get_link_ksettings, |
420 | .set_link_ksettings = aqc111_set_link_ksettings | |
027e6f78 DB |
421 | }; |
422 | ||
a4017cc2 DB |
423 | static int aqc111_change_mtu(struct net_device *net, int new_mtu) |
424 | { | |
425 | struct usbnet *dev = netdev_priv(net); | |
426 | u16 reg16 = 0; | |
427 | u8 buf[5]; | |
428 | ||
429 | net->mtu = new_mtu; | |
430 | dev->hard_mtu = net->mtu + net->hard_header_len; | |
431 | ||
432 | aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE, | |
433 | 2, ®16); | |
434 | if (net->mtu > 1500) | |
435 | reg16 |= SFR_MEDIUM_JUMBO_EN; | |
436 | else | |
437 | reg16 &= ~SFR_MEDIUM_JUMBO_EN; | |
438 | ||
439 | aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE, | |
440 | 2, ®16); | |
441 | ||
442 | if (dev->net->mtu > 12500 && dev->net->mtu <= 16334) { | |
443 | memcpy(buf, &AQC111_BULKIN_SIZE[2], 5); | |
444 | /* RX bulk configuration */ | |
445 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QCTRL, | |
446 | 5, 5, buf); | |
447 | } | |
448 | ||
449 | /* Set high low water level */ | |
450 | if (dev->net->mtu <= 4500) | |
451 | reg16 = 0x0810; | |
452 | else if (dev->net->mtu <= 9500) | |
453 | reg16 = 0x1020; | |
454 | else if (dev->net->mtu <= 12500) | |
455 | reg16 = 0x1420; | |
456 | else if (dev->net->mtu <= 16334) | |
457 | reg16 = 0x1A20; | |
b8b27752 ON |
458 | else |
459 | return 0; | |
a4017cc2 DB |
460 | |
461 | aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_PAUSE_WATERLVL_LOW, | |
462 | 2, ®16); | |
463 | ||
464 | return 0; | |
465 | } | |
466 | ||
df2d59a2 DB |
467 | static int aqc111_set_mac_addr(struct net_device *net, void *p) |
468 | { | |
469 | struct usbnet *dev = netdev_priv(net); | |
470 | int ret = 0; | |
471 | ||
472 | ret = eth_mac_addr(net, p); | |
473 | if (ret < 0) | |
474 | return ret; | |
475 | ||
476 | /* Set the MAC address */ | |
477 | return aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_NODE_ID, ETH_ALEN, | |
478 | ETH_ALEN, net->dev_addr); | |
479 | } | |
480 | ||
4189673a DB |
481 | static int aqc111_vlan_rx_kill_vid(struct net_device *net, |
482 | __be16 proto, u16 vid) | |
483 | { | |
484 | struct usbnet *dev = netdev_priv(net); | |
485 | u8 vlan_ctrl = 0; | |
486 | u16 reg16 = 0; | |
487 | u8 reg8 = 0; | |
488 | ||
489 | aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, ®8); | |
490 | vlan_ctrl = reg8; | |
491 | ||
492 | /* Address */ | |
493 | reg8 = (vid / 16); | |
494 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_ADDRESS, 1, 1, ®8); | |
495 | /* Data */ | |
496 | reg8 = vlan_ctrl | SFR_VLAN_CONTROL_RD; | |
497 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, ®8); | |
498 | aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_DATA0, 2, ®16); | |
499 | reg16 &= ~(1 << (vid % 16)); | |
500 | aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_DATA0, 2, ®16); | |
501 | reg8 = vlan_ctrl | SFR_VLAN_CONTROL_WE; | |
502 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, ®8); | |
503 | ||
504 | return 0; | |
505 | } | |
506 | ||
507 | static int aqc111_vlan_rx_add_vid(struct net_device *net, __be16 proto, u16 vid) | |
508 | { | |
509 | struct usbnet *dev = netdev_priv(net); | |
510 | u8 vlan_ctrl = 0; | |
511 | u16 reg16 = 0; | |
512 | u8 reg8 = 0; | |
513 | ||
514 | aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, ®8); | |
515 | vlan_ctrl = reg8; | |
516 | ||
517 | /* Address */ | |
518 | reg8 = (vid / 16); | |
519 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_ADDRESS, 1, 1, ®8); | |
520 | /* Data */ | |
521 | reg8 = vlan_ctrl | SFR_VLAN_CONTROL_RD; | |
522 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, ®8); | |
523 | aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_DATA0, 2, ®16); | |
524 | reg16 |= (1 << (vid % 16)); | |
525 | aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_DATA0, 2, ®16); | |
526 | reg8 = vlan_ctrl | SFR_VLAN_CONTROL_WE; | |
527 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, ®8); | |
528 | ||
529 | return 0; | |
530 | } | |
531 | ||
59b04eea DB |
532 | static void aqc111_set_rx_mode(struct net_device *net) |
533 | { | |
534 | struct usbnet *dev = netdev_priv(net); | |
535 | struct aqc111_data *aqc111_data = dev->driver_priv; | |
536 | int mc_count = 0; | |
537 | ||
538 | mc_count = netdev_mc_count(net); | |
539 | ||
540 | aqc111_data->rxctl &= ~(SFR_RX_CTL_PRO | SFR_RX_CTL_AMALL | | |
541 | SFR_RX_CTL_AM); | |
542 | ||
543 | if (net->flags & IFF_PROMISC) { | |
544 | aqc111_data->rxctl |= SFR_RX_CTL_PRO; | |
545 | } else if ((net->flags & IFF_ALLMULTI) || mc_count > AQ_MAX_MCAST) { | |
546 | aqc111_data->rxctl |= SFR_RX_CTL_AMALL; | |
547 | } else if (!netdev_mc_empty(net)) { | |
548 | u8 m_filter[AQ_MCAST_FILTER_SIZE] = { 0 }; | |
549 | struct netdev_hw_addr *ha = NULL; | |
550 | u32 crc_bits = 0; | |
551 | ||
552 | netdev_for_each_mc_addr(ha, net) { | |
553 | crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; | |
554 | m_filter[crc_bits >> 3] |= BIT(crc_bits & 7); | |
555 | } | |
556 | ||
557 | aqc111_write_cmd_async(dev, AQ_ACCESS_MAC, | |
558 | SFR_MULTI_FILTER_ARRY, | |
559 | AQ_MCAST_FILTER_SIZE, | |
560 | AQ_MCAST_FILTER_SIZE, m_filter); | |
561 | ||
562 | aqc111_data->rxctl |= SFR_RX_CTL_AM; | |
563 | } | |
564 | ||
565 | aqc111_write16_cmd_async(dev, AQ_ACCESS_MAC, SFR_RX_CTL, | |
566 | 2, &aqc111_data->rxctl); | |
567 | } | |
568 | ||
6649d2a6 DB |
569 | static int aqc111_set_features(struct net_device *net, |
570 | netdev_features_t features) | |
571 | { | |
572 | struct usbnet *dev = netdev_priv(net); | |
573 | struct aqc111_data *aqc111_data = dev->driver_priv; | |
574 | netdev_features_t changed = net->features ^ features; | |
4189673a | 575 | u16 reg16 = 0; |
6649d2a6 DB |
576 | u8 reg8 = 0; |
577 | ||
578 | if (changed & NETIF_F_IP_CSUM) { | |
579 | aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL, 1, 1, ®8); | |
580 | reg8 ^= SFR_TXCOE_TCP | SFR_TXCOE_UDP; | |
581 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL, | |
582 | 1, 1, ®8); | |
583 | } | |
584 | ||
585 | if (changed & NETIF_F_IPV6_CSUM) { | |
586 | aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL, 1, 1, ®8); | |
587 | reg8 ^= SFR_TXCOE_TCPV6 | SFR_TXCOE_UDPV6; | |
588 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL, | |
589 | 1, 1, ®8); | |
590 | } | |
591 | ||
592 | if (changed & NETIF_F_RXCSUM) { | |
593 | aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_RXCOE_CTL, 1, 1, ®8); | |
594 | if (features & NETIF_F_RXCSUM) { | |
595 | aqc111_data->rx_checksum = 1; | |
596 | reg8 &= ~(SFR_RXCOE_IP | SFR_RXCOE_TCP | SFR_RXCOE_UDP | | |
597 | SFR_RXCOE_TCPV6 | SFR_RXCOE_UDPV6); | |
598 | } else { | |
599 | aqc111_data->rx_checksum = 0; | |
600 | reg8 |= SFR_RXCOE_IP | SFR_RXCOE_TCP | SFR_RXCOE_UDP | | |
601 | SFR_RXCOE_TCPV6 | SFR_RXCOE_UDPV6; | |
602 | } | |
603 | ||
604 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RXCOE_CTL, | |
605 | 1, 1, ®8); | |
606 | } | |
4189673a DB |
607 | if (changed & NETIF_F_HW_VLAN_CTAG_FILTER) { |
608 | if (features & NETIF_F_HW_VLAN_CTAG_FILTER) { | |
609 | u16 i = 0; | |
610 | ||
611 | for (i = 0; i < 256; i++) { | |
612 | /* Address */ | |
613 | reg8 = i; | |
614 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, | |
615 | SFR_VLAN_ID_ADDRESS, | |
616 | 1, 1, ®8); | |
617 | /* Data */ | |
618 | aqc111_write16_cmd(dev, AQ_ACCESS_MAC, | |
619 | SFR_VLAN_ID_DATA0, | |
620 | 2, ®16); | |
621 | reg8 = SFR_VLAN_CONTROL_WE; | |
622 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, | |
623 | SFR_VLAN_ID_CONTROL, | |
624 | 1, 1, ®8); | |
625 | } | |
626 | aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, | |
627 | 1, 1, ®8); | |
628 | reg8 |= SFR_VLAN_CONTROL_VFE; | |
629 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, | |
630 | SFR_VLAN_ID_CONTROL, 1, 1, ®8); | |
631 | } else { | |
632 | aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, | |
633 | 1, 1, ®8); | |
634 | reg8 &= ~SFR_VLAN_CONTROL_VFE; | |
635 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, | |
636 | SFR_VLAN_ID_CONTROL, 1, 1, ®8); | |
637 | } | |
638 | } | |
639 | ||
6649d2a6 DB |
640 | return 0; |
641 | } | |
642 | ||
7cea2d40 DB |
643 | static const struct net_device_ops aqc111_netdev_ops = { |
644 | .ndo_open = usbnet_open, | |
645 | .ndo_stop = usbnet_stop, | |
4a3576d2 DB |
646 | .ndo_start_xmit = usbnet_start_xmit, |
647 | .ndo_tx_timeout = usbnet_tx_timeout, | |
648 | .ndo_get_stats64 = usbnet_get_stats64, | |
a4017cc2 | 649 | .ndo_change_mtu = aqc111_change_mtu, |
df2d59a2 DB |
650 | .ndo_set_mac_address = aqc111_set_mac_addr, |
651 | .ndo_validate_addr = eth_validate_addr, | |
4189673a DB |
652 | .ndo_vlan_rx_add_vid = aqc111_vlan_rx_add_vid, |
653 | .ndo_vlan_rx_kill_vid = aqc111_vlan_rx_kill_vid, | |
59b04eea | 654 | .ndo_set_rx_mode = aqc111_set_rx_mode, |
6649d2a6 | 655 | .ndo_set_features = aqc111_set_features, |
7cea2d40 DB |
656 | }; |
657 | ||
df2d59a2 DB |
658 | static int aqc111_read_perm_mac(struct usbnet *dev) |
659 | { | |
660 | u8 buf[ETH_ALEN]; | |
661 | int ret; | |
662 | ||
663 | ret = aqc111_read_cmd(dev, AQ_FLASH_PARAMETERS, 0, 0, ETH_ALEN, buf); | |
664 | if (ret < 0) | |
665 | goto out; | |
666 | ||
667 | ether_addr_copy(dev->net->perm_addr, buf); | |
668 | ||
669 | return 0; | |
670 | out: | |
671 | return ret; | |
672 | } | |
673 | ||
33cd597f DB |
674 | static void aqc111_read_fw_version(struct usbnet *dev, |
675 | struct aqc111_data *aqc111_data) | |
676 | { | |
677 | aqc111_read_cmd(dev, AQ_ACCESS_MAC, AQ_FW_VER_MAJOR, | |
678 | 1, 1, &aqc111_data->fw_ver.major); | |
679 | aqc111_read_cmd(dev, AQ_ACCESS_MAC, AQ_FW_VER_MINOR, | |
680 | 1, 1, &aqc111_data->fw_ver.minor); | |
681 | aqc111_read_cmd(dev, AQ_ACCESS_MAC, AQ_FW_VER_REV, | |
682 | 1, 1, &aqc111_data->fw_ver.rev); | |
683 | ||
684 | if (aqc111_data->fw_ver.major & 0x80) | |
685 | aqc111_data->fw_ver.major &= ~0x80; | |
686 | } | |
687 | ||
7cea2d40 DB |
688 | static int aqc111_bind(struct usbnet *dev, struct usb_interface *intf) |
689 | { | |
690 | struct usb_device *udev = interface_to_usbdev(intf); | |
7b8b0654 | 691 | enum usb_device_speed usb_speed = udev->speed; |
33cd597f | 692 | struct aqc111_data *aqc111_data; |
7cea2d40 DB |
693 | int ret; |
694 | ||
695 | /* Check if vendor configuration */ | |
696 | if (udev->actconfig->desc.bConfigurationValue != 1) { | |
697 | usb_driver_set_configuration(udev, 1); | |
698 | return -ENODEV; | |
699 | } | |
700 | ||
701 | usb_reset_configuration(dev->udev); | |
702 | ||
703 | ret = usbnet_get_endpoints(dev, intf); | |
704 | if (ret < 0) { | |
705 | netdev_dbg(dev->net, "usbnet_get_endpoints failed"); | |
706 | return ret; | |
707 | } | |
708 | ||
33cd597f DB |
709 | aqc111_data = kzalloc(sizeof(*aqc111_data), GFP_KERNEL); |
710 | if (!aqc111_data) | |
711 | return -ENOMEM; | |
712 | ||
713 | /* store aqc111_data pointer in device data field */ | |
714 | dev->driver_priv = aqc111_data; | |
715 | ||
df2d59a2 DB |
716 | /* Init the MAC address */ |
717 | ret = aqc111_read_perm_mac(dev); | |
718 | if (ret) | |
719 | goto out; | |
720 | ||
721 | ether_addr_copy(dev->net->dev_addr, dev->net->perm_addr); | |
4a3576d2 | 722 | |
361459cd DB |
723 | /* Set Rx urb size */ |
724 | dev->rx_urb_size = URB_SIZE; | |
725 | ||
4a3576d2 DB |
726 | /* Set TX needed headroom & tailroom */ |
727 | dev->net->needed_headroom += sizeof(u64); | |
728 | dev->net->needed_tailroom += sizeof(u64); | |
729 | ||
a4017cc2 DB |
730 | dev->net->max_mtu = 16334; |
731 | ||
7cea2d40 | 732 | dev->net->netdev_ops = &aqc111_netdev_ops; |
027e6f78 | 733 | dev->net->ethtool_ops = &aqc111_ethtool_ops; |
7cea2d40 | 734 | |
4a3576d2 DB |
735 | if (usb_device_no_sg_constraint(dev->udev)) |
736 | dev->can_dma_sg = 1; | |
737 | ||
738 | dev->net->hw_features |= AQ_SUPPORT_HW_FEATURE; | |
739 | dev->net->features |= AQ_SUPPORT_FEATURE; | |
7afa6c98 | 740 | dev->net->vlan_features |= AQ_SUPPORT_VLAN_FEATURE; |
4a3576d2 | 741 | |
de074e7a DB |
742 | netif_set_gso_max_size(dev->net, 65535); |
743 | ||
33cd597f | 744 | aqc111_read_fw_version(dev, aqc111_data); |
7b8b0654 DB |
745 | aqc111_data->autoneg = AUTONEG_ENABLE; |
746 | aqc111_data->advertised_speed = (usb_speed == USB_SPEED_SUPER) ? | |
747 | SPEED_5000 : SPEED_1000; | |
33cd597f | 748 | |
7cea2d40 | 749 | return 0; |
df2d59a2 DB |
750 | |
751 | out: | |
752 | kfree(aqc111_data); | |
753 | return ret; | |
7cea2d40 DB |
754 | } |
755 | ||
756 | static void aqc111_unbind(struct usbnet *dev, struct usb_interface *intf) | |
757 | { | |
33cd597f | 758 | struct aqc111_data *aqc111_data = dev->driver_priv; |
f3aa095a | 759 | u16 reg16; |
369b46e9 | 760 | u32 phy_on_the_wire; |
f3aa095a DB |
761 | |
762 | /* Force bz */ | |
763 | reg16 = SFR_PHYPWR_RSTCTL_BZ; | |
764 | aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_PHYPWR_RSTCTL, | |
765 | 2, ®16); | |
766 | reg16 = 0; | |
767 | aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_PHYPWR_RSTCTL, | |
768 | 2, ®16); | |
33cd597f DB |
769 | |
770 | /* Power down ethernet PHY */ | |
7b8b0654 | 771 | aqc111_data->phy_cfg &= ~AQ_ADV_MASK; |
33cd597f DB |
772 | aqc111_data->phy_cfg |= AQ_LOW_POWER; |
773 | aqc111_data->phy_cfg &= ~AQ_PHY_POWER_EN; | |
369b46e9 | 774 | phy_on_the_wire = aqc111_data->phy_cfg; |
33cd597f | 775 | aqc111_write32_cmd_nopm(dev, AQ_PHY_OPS, 0, 0, |
369b46e9 | 776 | &phy_on_the_wire); |
33cd597f DB |
777 | |
778 | kfree(aqc111_data); | |
f3aa095a DB |
779 | } |
780 | ||
7b8b0654 DB |
781 | static void aqc111_status(struct usbnet *dev, struct urb *urb) |
782 | { | |
783 | struct aqc111_data *aqc111_data = dev->driver_priv; | |
784 | u64 *event_data = NULL; | |
785 | int link = 0; | |
786 | ||
787 | if (urb->actual_length < sizeof(*event_data)) | |
788 | return; | |
789 | ||
790 | event_data = urb->transfer_buffer; | |
791 | le64_to_cpus(event_data); | |
792 | ||
793 | if (*event_data & AQ_LS_MASK) | |
794 | link = 1; | |
795 | else | |
796 | link = 0; | |
797 | ||
798 | aqc111_data->link_speed = (*event_data & AQ_SPEED_MASK) >> | |
799 | AQ_SPEED_SHIFT; | |
800 | aqc111_data->link = link; | |
801 | ||
802 | if (netif_carrier_ok(dev->net) != link) | |
803 | usbnet_defer_kevent(dev, EVENT_LINK_RESET); | |
804 | } | |
805 | ||
806 | static void aqc111_configure_rx(struct usbnet *dev, | |
807 | struct aqc111_data *aqc111_data) | |
808 | { | |
809 | enum usb_device_speed usb_speed = dev->udev->speed; | |
810 | u16 link_speed = 0, usb_host = 0; | |
811 | u8 buf[5] = { 0 }; | |
812 | u8 queue_num = 0; | |
813 | u16 reg16 = 0; | |
814 | u8 reg8 = 0; | |
815 | ||
816 | buf[0] = 0x00; | |
817 | buf[1] = 0xF8; | |
818 | buf[2] = 0x07; | |
819 | switch (aqc111_data->link_speed) { | |
820 | case AQ_INT_SPEED_5G: | |
821 | link_speed = 5000; | |
822 | reg8 = 0x05; | |
823 | reg16 = 0x001F; | |
824 | break; | |
825 | case AQ_INT_SPEED_2_5G: | |
826 | link_speed = 2500; | |
827 | reg16 = 0x003F; | |
828 | break; | |
829 | case AQ_INT_SPEED_1G: | |
830 | link_speed = 1000; | |
831 | reg16 = 0x009F; | |
832 | break; | |
833 | case AQ_INT_SPEED_100M: | |
834 | link_speed = 100; | |
835 | queue_num = 1; | |
836 | reg16 = 0x063F; | |
837 | buf[1] = 0xFB; | |
838 | buf[2] = 0x4; | |
839 | break; | |
840 | } | |
841 | ||
842 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_INTER_PACKET_GAP_0, | |
843 | 1, 1, ®8); | |
844 | ||
845 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TX_PAUSE_RESEND_T, 3, 3, buf); | |
846 | ||
847 | switch (usb_speed) { | |
848 | case USB_SPEED_SUPER: | |
849 | usb_host = 3; | |
850 | break; | |
851 | case USB_SPEED_HIGH: | |
852 | usb_host = 2; | |
853 | break; | |
854 | case USB_SPEED_FULL: | |
855 | case USB_SPEED_LOW: | |
856 | usb_host = 1; | |
857 | queue_num = 0; | |
858 | break; | |
859 | default: | |
860 | usb_host = 0; | |
861 | break; | |
862 | } | |
863 | ||
a4017cc2 DB |
864 | if (dev->net->mtu > 12500 && dev->net->mtu <= 16334) |
865 | queue_num = 2; /* For Jumbo packet 16KB */ | |
866 | ||
7b8b0654 DB |
867 | memcpy(buf, &AQC111_BULKIN_SIZE[queue_num], 5); |
868 | /* RX bulk configuration */ | |
869 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QCTRL, 5, 5, buf); | |
870 | ||
871 | /* Set high low water level */ | |
a4017cc2 DB |
872 | if (dev->net->mtu <= 4500) |
873 | reg16 = 0x0810; | |
874 | else if (dev->net->mtu <= 9500) | |
875 | reg16 = 0x1020; | |
876 | else if (dev->net->mtu <= 12500) | |
877 | reg16 = 0x1420; | |
878 | else if (dev->net->mtu <= 16334) | |
879 | reg16 = 0x1A20; | |
7b8b0654 DB |
880 | |
881 | aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_PAUSE_WATERLVL_LOW, | |
882 | 2, ®16); | |
883 | netdev_info(dev->net, "Link Speed %d, USB %d", link_speed, usb_host); | |
884 | } | |
885 | ||
02031466 DB |
886 | static void aqc111_configure_csum_offload(struct usbnet *dev) |
887 | { | |
888 | u8 reg8 = 0; | |
889 | ||
890 | if (dev->net->features & NETIF_F_RXCSUM) { | |
891 | reg8 |= SFR_RXCOE_IP | SFR_RXCOE_TCP | SFR_RXCOE_UDP | | |
892 | SFR_RXCOE_TCPV6 | SFR_RXCOE_UDPV6; | |
893 | } | |
894 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RXCOE_CTL, 1, 1, ®8); | |
895 | ||
896 | reg8 = 0; | |
897 | if (dev->net->features & NETIF_F_IP_CSUM) | |
898 | reg8 |= SFR_TXCOE_IP | SFR_TXCOE_TCP | SFR_TXCOE_UDP; | |
899 | ||
900 | if (dev->net->features & NETIF_F_IPV6_CSUM) | |
901 | reg8 |= SFR_TXCOE_TCPV6 | SFR_TXCOE_UDPV6; | |
902 | ||
903 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL, 1, 1, ®8); | |
904 | } | |
905 | ||
7b8b0654 DB |
906 | static int aqc111_link_reset(struct usbnet *dev) |
907 | { | |
908 | struct aqc111_data *aqc111_data = dev->driver_priv; | |
909 | u16 reg16 = 0; | |
910 | u8 reg8 = 0; | |
911 | ||
912 | if (aqc111_data->link == 1) { /* Link up */ | |
913 | aqc111_configure_rx(dev, aqc111_data); | |
914 | ||
915 | /* Vlan Tag Filter */ | |
916 | reg8 = SFR_VLAN_CONTROL_VSO; | |
4189673a DB |
917 | if (dev->net->features & NETIF_F_HW_VLAN_CTAG_FILTER) |
918 | reg8 |= SFR_VLAN_CONTROL_VFE; | |
7b8b0654 DB |
919 | |
920 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, | |
921 | 1, 1, ®8); | |
922 | ||
923 | reg8 = 0x0; | |
924 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BMRX_DMA_CONTROL, | |
925 | 1, 1, ®8); | |
926 | ||
927 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BMTX_DMA_CONTROL, | |
928 | 1, 1, ®8); | |
929 | ||
930 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_ARC_CTRL, 1, 1, ®8); | |
931 | ||
932 | reg16 = SFR_RX_CTL_IPE | SFR_RX_CTL_AB; | |
59b04eea | 933 | aqc111_data->rxctl = reg16; |
7b8b0654 DB |
934 | aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, ®16); |
935 | ||
936 | reg8 = SFR_RX_PATH_READY; | |
937 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_ETH_MAC_PATH, | |
938 | 1, 1, ®8); | |
939 | ||
940 | reg8 = SFR_BULK_OUT_EFF_EN; | |
941 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL, | |
942 | 1, 1, ®8); | |
943 | ||
944 | reg16 = 0; | |
945 | aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE, | |
946 | 2, ®16); | |
947 | ||
948 | reg16 = SFR_MEDIUM_XGMIIMODE | SFR_MEDIUM_FULL_DUPLEX; | |
949 | aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE, | |
950 | 2, ®16); | |
951 | ||
02031466 DB |
952 | aqc111_configure_csum_offload(dev); |
953 | ||
59b04eea DB |
954 | aqc111_set_rx_mode(dev->net); |
955 | ||
7b8b0654 DB |
956 | aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE, |
957 | 2, ®16); | |
958 | ||
a4017cc2 DB |
959 | if (dev->net->mtu > 1500) |
960 | reg16 |= SFR_MEDIUM_JUMBO_EN; | |
961 | ||
7b8b0654 DB |
962 | reg16 |= SFR_MEDIUM_RECEIVE_EN | SFR_MEDIUM_RXFLOW_CTRLEN | |
963 | SFR_MEDIUM_TXFLOW_CTRLEN; | |
964 | aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE, | |
965 | 2, ®16); | |
966 | ||
59b04eea DB |
967 | aqc111_data->rxctl |= SFR_RX_CTL_START; |
968 | aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL, | |
969 | 2, &aqc111_data->rxctl); | |
7b8b0654 DB |
970 | |
971 | netif_carrier_on(dev->net); | |
972 | } else { | |
973 | aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE, | |
974 | 2, ®16); | |
975 | reg16 &= ~SFR_MEDIUM_RECEIVE_EN; | |
976 | aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE, | |
977 | 2, ®16); | |
978 | ||
59b04eea DB |
979 | aqc111_data->rxctl &= ~SFR_RX_CTL_START; |
980 | aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL, | |
981 | 2, &aqc111_data->rxctl); | |
7b8b0654 DB |
982 | |
983 | reg8 = SFR_BULK_OUT_FLUSH_EN | SFR_BULK_OUT_EFF_EN; | |
984 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL, | |
985 | 1, 1, ®8); | |
986 | reg8 = SFR_BULK_OUT_EFF_EN; | |
987 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL, | |
988 | 1, 1, ®8); | |
989 | ||
990 | netif_carrier_off(dev->net); | |
991 | } | |
992 | return 0; | |
993 | } | |
994 | ||
f3aa095a DB |
995 | static int aqc111_reset(struct usbnet *dev) |
996 | { | |
33cd597f | 997 | struct aqc111_data *aqc111_data = dev->driver_priv; |
f3aa095a | 998 | u8 reg8 = 0; |
369b46e9 | 999 | u32 phy_on_the_wire; |
f3aa095a | 1000 | |
361459cd DB |
1001 | dev->rx_urb_size = URB_SIZE; |
1002 | ||
4a3576d2 DB |
1003 | if (usb_device_no_sg_constraint(dev->udev)) |
1004 | dev->can_dma_sg = 1; | |
1005 | ||
1006 | dev->net->hw_features |= AQ_SUPPORT_HW_FEATURE; | |
1007 | dev->net->features |= AQ_SUPPORT_FEATURE; | |
7afa6c98 | 1008 | dev->net->vlan_features |= AQ_SUPPORT_VLAN_FEATURE; |
4a3576d2 | 1009 | |
33cd597f DB |
1010 | /* Power up ethernet PHY */ |
1011 | aqc111_data->phy_cfg = AQ_PHY_POWER_EN; | |
369b46e9 | 1012 | phy_on_the_wire = aqc111_data->phy_cfg; |
33cd597f | 1013 | aqc111_write32_cmd(dev, AQ_PHY_OPS, 0, 0, |
369b46e9 | 1014 | &phy_on_the_wire); |
33cd597f | 1015 | |
df2d59a2 DB |
1016 | /* Set the MAC address */ |
1017 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_NODE_ID, ETH_ALEN, | |
1018 | ETH_ALEN, dev->net->dev_addr); | |
1019 | ||
f3aa095a DB |
1020 | reg8 = 0xFF; |
1021 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BM_INT_MASK, 1, 1, ®8); | |
1022 | ||
1023 | reg8 = 0x0; | |
1024 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_SWP_CTRL, 1, 1, ®8); | |
1025 | ||
1026 | aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_MONITOR_MODE, 1, 1, ®8); | |
1027 | reg8 &= ~(SFR_MONITOR_MODE_EPHYRW | SFR_MONITOR_MODE_RWLC | | |
1028 | SFR_MONITOR_MODE_RWMP | SFR_MONITOR_MODE_RWWF | | |
1029 | SFR_MONITOR_MODE_RW_FLAG); | |
1030 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_MONITOR_MODE, 1, 1, ®8); | |
1031 | ||
7b8b0654 DB |
1032 | netif_carrier_off(dev->net); |
1033 | ||
1034 | /* Phy advertise */ | |
1035 | aqc111_set_phy_speed(dev, aqc111_data->autoneg, | |
1036 | aqc111_data->advertised_speed); | |
1037 | ||
f3aa095a DB |
1038 | return 0; |
1039 | } | |
1040 | ||
1041 | static int aqc111_stop(struct usbnet *dev) | |
1042 | { | |
33cd597f | 1043 | struct aqc111_data *aqc111_data = dev->driver_priv; |
f3aa095a | 1044 | u16 reg16 = 0; |
369b46e9 | 1045 | u32 phy_on_the_wire; |
f3aa095a DB |
1046 | |
1047 | aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE, | |
1048 | 2, ®16); | |
1049 | reg16 &= ~SFR_MEDIUM_RECEIVE_EN; | |
1050 | aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE, | |
1051 | 2, ®16); | |
1052 | reg16 = 0; | |
1053 | aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, ®16); | |
1054 | ||
33cd597f DB |
1055 | /* Put PHY to low power*/ |
1056 | aqc111_data->phy_cfg |= AQ_LOW_POWER; | |
369b46e9 | 1057 | phy_on_the_wire = aqc111_data->phy_cfg; |
33cd597f | 1058 | aqc111_write32_cmd(dev, AQ_PHY_OPS, 0, 0, |
369b46e9 | 1059 | &phy_on_the_wire); |
33cd597f | 1060 | |
7b8b0654 DB |
1061 | netif_carrier_off(dev->net); |
1062 | ||
f3aa095a | 1063 | return 0; |
7cea2d40 DB |
1064 | } |
1065 | ||
02031466 DB |
1066 | static void aqc111_rx_checksum(struct sk_buff *skb, u64 pkt_desc) |
1067 | { | |
1068 | u32 pkt_type = 0; | |
1069 | ||
1070 | skb->ip_summed = CHECKSUM_NONE; | |
1071 | /* checksum error bit is set */ | |
1072 | if (pkt_desc & AQ_RX_PD_L4_ERR || pkt_desc & AQ_RX_PD_L3_ERR) | |
1073 | return; | |
1074 | ||
1075 | pkt_type = pkt_desc & AQ_RX_PD_L4_TYPE_MASK; | |
1076 | /* It must be a TCP or UDP packet with a valid checksum */ | |
1077 | if (pkt_type == AQ_RX_PD_L4_TCP || pkt_type == AQ_RX_PD_L4_UDP) | |
1078 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
1079 | } | |
1080 | ||
361459cd DB |
1081 | static int aqc111_rx_fixup(struct usbnet *dev, struct sk_buff *skb) |
1082 | { | |
6649d2a6 | 1083 | struct aqc111_data *aqc111_data = dev->driver_priv; |
361459cd DB |
1084 | struct sk_buff *new_skb = NULL; |
1085 | u32 pkt_total_offset = 0; | |
1086 | u64 *pkt_desc_ptr = NULL; | |
1087 | u32 start_of_descs = 0; | |
1088 | u32 desc_offset = 0; /*RX Header Offset*/ | |
1089 | u16 pkt_count = 0; | |
1090 | u64 desc_hdr = 0; | |
7afa6c98 | 1091 | u16 vlan_tag = 0; |
361459cd DB |
1092 | u32 skb_len = 0; |
1093 | ||
1094 | if (!skb) | |
1095 | goto err; | |
1096 | ||
1097 | if (skb->len == 0) | |
1098 | goto err; | |
1099 | ||
1100 | skb_len = skb->len; | |
1101 | /* RX Descriptor Header */ | |
1102 | skb_trim(skb, skb->len - sizeof(desc_hdr)); | |
1103 | desc_hdr = le64_to_cpup((u64 *)skb_tail_pointer(skb)); | |
1104 | ||
1105 | /* Check these packets */ | |
1106 | desc_offset = (desc_hdr & AQ_RX_DH_DESC_OFFSET_MASK) >> | |
1107 | AQ_RX_DH_DESC_OFFSET_SHIFT; | |
1108 | pkt_count = desc_hdr & AQ_RX_DH_PKT_CNT_MASK; | |
1109 | start_of_descs = skb_len - ((pkt_count + 1) * sizeof(desc_hdr)); | |
1110 | ||
1111 | /* self check descs position */ | |
1112 | if (start_of_descs != desc_offset) | |
1113 | goto err; | |
1114 | ||
1115 | /* self check desc_offset from header*/ | |
1116 | if (desc_offset >= skb_len) | |
1117 | goto err; | |
1118 | ||
1119 | if (pkt_count == 0) | |
1120 | goto err; | |
1121 | ||
1122 | /* Get the first RX packet descriptor */ | |
1123 | pkt_desc_ptr = (u64 *)(skb->data + desc_offset); | |
1124 | ||
1125 | while (pkt_count--) { | |
1126 | u64 pkt_desc = le64_to_cpup(pkt_desc_ptr); | |
1127 | u32 pkt_len_with_padd = 0; | |
1128 | u32 pkt_len = 0; | |
1129 | ||
1130 | pkt_len = (u32)((pkt_desc & AQ_RX_PD_LEN_MASK) >> | |
1131 | AQ_RX_PD_LEN_SHIFT); | |
1132 | pkt_len_with_padd = ((pkt_len + 7) & 0x7FFF8); | |
1133 | ||
1134 | pkt_total_offset += pkt_len_with_padd; | |
1135 | if (pkt_total_offset > desc_offset || | |
1136 | (pkt_count == 0 && pkt_total_offset != desc_offset)) { | |
1137 | goto err; | |
1138 | } | |
1139 | ||
1140 | if (pkt_desc & AQ_RX_PD_DROP || | |
1141 | !(pkt_desc & AQ_RX_PD_RX_OK) || | |
1142 | pkt_len > (dev->hard_mtu + AQ_RX_HW_PAD)) { | |
1143 | skb_pull(skb, pkt_len_with_padd); | |
1144 | /* Next RX Packet Descriptor */ | |
1145 | pkt_desc_ptr++; | |
1146 | continue; | |
1147 | } | |
1148 | ||
1149 | /* Clone SKB */ | |
1150 | new_skb = skb_clone(skb, GFP_ATOMIC); | |
1151 | ||
1152 | if (!new_skb) | |
1153 | goto err; | |
1154 | ||
1155 | new_skb->len = pkt_len; | |
1156 | skb_pull(new_skb, AQ_RX_HW_PAD); | |
1157 | skb_set_tail_pointer(new_skb, new_skb->len); | |
1158 | ||
1159 | new_skb->truesize = SKB_TRUESIZE(new_skb->len); | |
6649d2a6 DB |
1160 | if (aqc111_data->rx_checksum) |
1161 | aqc111_rx_checksum(new_skb, pkt_desc); | |
361459cd | 1162 | |
7afa6c98 DB |
1163 | if (pkt_desc & AQ_RX_PD_VLAN) { |
1164 | vlan_tag = pkt_desc >> AQ_RX_PD_VLAN_SHIFT; | |
1165 | __vlan_hwaccel_put_tag(new_skb, htons(ETH_P_8021Q), | |
1166 | vlan_tag & VLAN_VID_MASK); | |
1167 | } | |
1168 | ||
361459cd DB |
1169 | usbnet_skb_return(dev, new_skb); |
1170 | if (pkt_count == 0) | |
1171 | break; | |
1172 | ||
1173 | skb_pull(skb, pkt_len_with_padd); | |
1174 | ||
1175 | /* Next RX Packet Header */ | |
1176 | pkt_desc_ptr++; | |
1177 | ||
1178 | new_skb = NULL; | |
1179 | } | |
1180 | ||
1181 | return 1; | |
1182 | ||
1183 | err: | |
1184 | return 0; | |
1185 | } | |
1186 | ||
4a3576d2 DB |
1187 | static struct sk_buff *aqc111_tx_fixup(struct usbnet *dev, struct sk_buff *skb, |
1188 | gfp_t flags) | |
1189 | { | |
1190 | int frame_size = dev->maxpacket; | |
1191 | struct sk_buff *new_skb = NULL; | |
1192 | u64 *tx_desc_ptr = NULL; | |
1193 | int padding_size = 0; | |
1194 | int headroom = 0; | |
1195 | int tailroom = 0; | |
1196 | u64 tx_desc = 0; | |
7afa6c98 | 1197 | u16 tci = 0; |
4a3576d2 DB |
1198 | |
1199 | /*Length of actual data*/ | |
1200 | tx_desc |= skb->len & AQ_TX_DESC_LEN_MASK; | |
1201 | ||
de074e7a DB |
1202 | /* TSO MSS */ |
1203 | tx_desc |= ((u64)(skb_shinfo(skb)->gso_size & AQ_TX_DESC_MSS_MASK)) << | |
1204 | AQ_TX_DESC_MSS_SHIFT; | |
1205 | ||
4a3576d2 DB |
1206 | headroom = (skb->len + sizeof(tx_desc)) % 8; |
1207 | if (headroom != 0) | |
1208 | padding_size = 8 - headroom; | |
1209 | ||
1210 | if (((skb->len + sizeof(tx_desc) + padding_size) % frame_size) == 0) { | |
1211 | padding_size += 8; | |
1212 | tx_desc |= AQ_TX_DESC_DROP_PADD; | |
1213 | } | |
1214 | ||
7afa6c98 DB |
1215 | /* Vlan Tag */ |
1216 | if (vlan_get_tag(skb, &tci) >= 0) { | |
1217 | tx_desc |= AQ_TX_DESC_VLAN; | |
1218 | tx_desc |= ((u64)tci & AQ_TX_DESC_VLAN_MASK) << | |
1219 | AQ_TX_DESC_VLAN_SHIFT; | |
1220 | } | |
1221 | ||
4a3576d2 DB |
1222 | if (!dev->can_dma_sg && (dev->net->features & NETIF_F_SG) && |
1223 | skb_linearize(skb)) | |
1224 | return NULL; | |
1225 | ||
1226 | headroom = skb_headroom(skb); | |
1227 | tailroom = skb_tailroom(skb); | |
1228 | ||
1229 | if (!(headroom >= sizeof(tx_desc) && tailroom >= padding_size)) { | |
1230 | new_skb = skb_copy_expand(skb, sizeof(tx_desc), | |
1231 | padding_size, flags); | |
1232 | dev_kfree_skb_any(skb); | |
1233 | skb = new_skb; | |
1234 | if (!skb) | |
1235 | return NULL; | |
1236 | } | |
1237 | if (padding_size != 0) | |
1238 | skb_put_zero(skb, padding_size); | |
1239 | /* Copy TX header */ | |
1240 | tx_desc_ptr = skb_push(skb, sizeof(tx_desc)); | |
1241 | *tx_desc_ptr = cpu_to_le64(tx_desc); | |
1242 | ||
1243 | usbnet_set_skb_tx_stats(skb, 1, 0); | |
1244 | ||
1245 | return skb; | |
1246 | } | |
1247 | ||
17364b80 DB |
1248 | static const struct driver_info aqc111_info = { |
1249 | .description = "Aquantia AQtion USB to 5GbE Controller", | |
7cea2d40 DB |
1250 | .bind = aqc111_bind, |
1251 | .unbind = aqc111_unbind, | |
7b8b0654 DB |
1252 | .status = aqc111_status, |
1253 | .link_reset = aqc111_link_reset, | |
f3aa095a DB |
1254 | .reset = aqc111_reset, |
1255 | .stop = aqc111_stop, | |
4a3576d2 DB |
1256 | .flags = FLAG_ETHER | FLAG_FRAMING_AX | |
1257 | FLAG_AVOID_UNLINK_URBS | FLAG_MULTI_PACKET, | |
361459cd | 1258 | .rx_fixup = aqc111_rx_fixup, |
4a3576d2 | 1259 | .tx_fixup = aqc111_tx_fixup, |
17364b80 DB |
1260 | }; |
1261 | ||
fa61ce4d DB |
1262 | #define ASIX111_DESC \ |
1263 | "ASIX USB 3.1 Gen1 to 5G Multi-Gigabit Ethernet Adapter" | |
1264 | ||
1265 | static const struct driver_info asix111_info = { | |
1266 | .description = ASIX111_DESC, | |
1267 | .bind = aqc111_bind, | |
1268 | .unbind = aqc111_unbind, | |
1269 | .status = aqc111_status, | |
1270 | .link_reset = aqc111_link_reset, | |
1271 | .reset = aqc111_reset, | |
1272 | .stop = aqc111_stop, | |
1273 | .flags = FLAG_ETHER | FLAG_FRAMING_AX | | |
1274 | FLAG_AVOID_UNLINK_URBS | FLAG_MULTI_PACKET, | |
1275 | .rx_fixup = aqc111_rx_fixup, | |
1276 | .tx_fixup = aqc111_tx_fixup, | |
1277 | }; | |
1278 | ||
1279 | #undef ASIX111_DESC | |
1280 | ||
1281 | #define ASIX112_DESC \ | |
1282 | "ASIX USB 3.1 Gen1 to 2.5G Multi-Gigabit Ethernet Adapter" | |
1283 | ||
1284 | static const struct driver_info asix112_info = { | |
1285 | .description = ASIX112_DESC, | |
1286 | .bind = aqc111_bind, | |
1287 | .unbind = aqc111_unbind, | |
1288 | .status = aqc111_status, | |
1289 | .link_reset = aqc111_link_reset, | |
1290 | .reset = aqc111_reset, | |
1291 | .stop = aqc111_stop, | |
1292 | .flags = FLAG_ETHER | FLAG_FRAMING_AX | | |
1293 | FLAG_AVOID_UNLINK_URBS | FLAG_MULTI_PACKET, | |
1294 | .rx_fixup = aqc111_rx_fixup, | |
1295 | .tx_fixup = aqc111_tx_fixup, | |
1296 | }; | |
1297 | ||
1298 | #undef ASIX112_DESC | |
1299 | ||
9098f21f DB |
1300 | static const struct driver_info trendnet_info = { |
1301 | .description = "USB-C 3.1 to 5GBASE-T Ethernet Adapter", | |
1302 | .bind = aqc111_bind, | |
1303 | .unbind = aqc111_unbind, | |
1304 | .status = aqc111_status, | |
1305 | .link_reset = aqc111_link_reset, | |
1306 | .reset = aqc111_reset, | |
1307 | .stop = aqc111_stop, | |
1308 | .flags = FLAG_ETHER | FLAG_FRAMING_AX | | |
1309 | FLAG_AVOID_UNLINK_URBS | FLAG_MULTI_PACKET, | |
1310 | .rx_fixup = aqc111_rx_fixup, | |
1311 | .tx_fixup = aqc111_tx_fixup, | |
1312 | }; | |
1313 | ||
b7ebee2f DB |
1314 | static const struct driver_info qnap_info = { |
1315 | .description = "QNAP QNA-UC5G1T USB to 5GbE Adapter", | |
1316 | .bind = aqc111_bind, | |
1317 | .unbind = aqc111_unbind, | |
1318 | .status = aqc111_status, | |
1319 | .link_reset = aqc111_link_reset, | |
1320 | .reset = aqc111_reset, | |
1321 | .stop = aqc111_stop, | |
1322 | .flags = FLAG_ETHER | FLAG_FRAMING_AX | | |
1323 | FLAG_AVOID_UNLINK_URBS | FLAG_MULTI_PACKET, | |
1324 | .rx_fixup = aqc111_rx_fixup, | |
1325 | .tx_fixup = aqc111_tx_fixup, | |
1326 | }; | |
1327 | ||
e58ba454 DB |
1328 | static int aqc111_suspend(struct usb_interface *intf, pm_message_t message) |
1329 | { | |
1330 | struct usbnet *dev = usb_get_intfdata(intf); | |
1331 | struct aqc111_data *aqc111_data = dev->driver_priv; | |
1332 | u16 temp_rx_ctrl = 0x00; | |
1333 | u16 reg16; | |
1334 | u8 reg8; | |
369b46e9 | 1335 | u32 phy_on_the_wire; |
e58ba454 DB |
1336 | |
1337 | usbnet_suspend(intf, message); | |
1338 | ||
1339 | aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, ®16); | |
1340 | temp_rx_ctrl = reg16; | |
1341 | /* Stop RX operations*/ | |
1342 | reg16 &= ~SFR_RX_CTL_START; | |
1343 | aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, ®16); | |
1344 | /* Force bz */ | |
1345 | aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_PHYPWR_RSTCTL, | |
1346 | 2, ®16); | |
1347 | reg16 |= SFR_PHYPWR_RSTCTL_BZ; | |
1348 | aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_PHYPWR_RSTCTL, | |
1349 | 2, ®16); | |
1350 | ||
1351 | reg8 = SFR_BULK_OUT_EFF_EN; | |
1352 | aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL, | |
1353 | 1, 1, ®8); | |
1354 | ||
1355 | temp_rx_ctrl &= ~(SFR_RX_CTL_START | SFR_RX_CTL_RF_WAK | | |
1356 | SFR_RX_CTL_AP | SFR_RX_CTL_AM); | |
1357 | aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL, | |
1358 | 2, &temp_rx_ctrl); | |
1359 | ||
1360 | reg8 = 0x00; | |
1361 | aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_ETH_MAC_PATH, | |
1362 | 1, 1, ®8); | |
1363 | ||
1364 | if (aqc111_data->wol_flags) { | |
97e6c858 NC |
1365 | struct aqc111_wol_cfg wol_cfg; |
1366 | ||
1367 | memset(&wol_cfg, 0, sizeof(struct aqc111_wol_cfg)); | |
e58ba454 DB |
1368 | |
1369 | aqc111_data->phy_cfg |= AQ_WOL; | |
1370 | ether_addr_copy(wol_cfg.hw_addr, dev->net->dev_addr); | |
1371 | wol_cfg.flags = aqc111_data->wol_flags; | |
1372 | ||
1373 | temp_rx_ctrl |= (SFR_RX_CTL_AB | SFR_RX_CTL_START); | |
1374 | aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL, | |
1375 | 2, &temp_rx_ctrl); | |
1376 | reg8 = 0x00; | |
1377 | aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_BM_INT_MASK, | |
1378 | 1, 1, ®8); | |
1379 | reg8 = SFR_BMRX_DMA_EN; | |
1380 | aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_BMRX_DMA_CONTROL, | |
1381 | 1, 1, ®8); | |
1382 | reg8 = SFR_RX_PATH_READY; | |
1383 | aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_ETH_MAC_PATH, | |
1384 | 1, 1, ®8); | |
1385 | reg8 = 0x07; | |
1386 | aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QCTRL, | |
1387 | 1, 1, ®8); | |
1388 | reg8 = 0x00; | |
1389 | aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, | |
1390 | SFR_RX_BULKIN_QTIMR_LOW, 1, 1, ®8); | |
1391 | aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, | |
1392 | SFR_RX_BULKIN_QTIMR_HIGH, 1, 1, ®8); | |
1393 | reg8 = 0xFF; | |
1394 | aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QSIZE, | |
1395 | 1, 1, ®8); | |
1396 | aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QIFG, | |
1397 | 1, 1, ®8); | |
1398 | ||
1399 | aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC, | |
1400 | SFR_MEDIUM_STATUS_MODE, 2, ®16); | |
1401 | reg16 |= SFR_MEDIUM_RECEIVE_EN; | |
1402 | aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, | |
1403 | SFR_MEDIUM_STATUS_MODE, 2, ®16); | |
1404 | ||
1405 | aqc111_write_cmd(dev, AQ_WOL_CFG, 0, 0, | |
1406 | WOL_CFG_SIZE, &wol_cfg); | |
369b46e9 | 1407 | phy_on_the_wire = aqc111_data->phy_cfg; |
e58ba454 | 1408 | aqc111_write32_cmd(dev, AQ_PHY_OPS, 0, 0, |
369b46e9 | 1409 | &phy_on_the_wire); |
e58ba454 DB |
1410 | } else { |
1411 | aqc111_data->phy_cfg |= AQ_LOW_POWER; | |
369b46e9 | 1412 | phy_on_the_wire = aqc111_data->phy_cfg; |
e58ba454 | 1413 | aqc111_write32_cmd(dev, AQ_PHY_OPS, 0, 0, |
369b46e9 | 1414 | &phy_on_the_wire); |
e58ba454 DB |
1415 | |
1416 | /* Disable RX path */ | |
1417 | aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC, | |
1418 | SFR_MEDIUM_STATUS_MODE, 2, ®16); | |
1419 | reg16 &= ~SFR_MEDIUM_RECEIVE_EN; | |
1420 | aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, | |
1421 | SFR_MEDIUM_STATUS_MODE, 2, ®16); | |
1422 | } | |
1423 | ||
1424 | return 0; | |
1425 | } | |
1426 | ||
1427 | static int aqc111_resume(struct usb_interface *intf) | |
1428 | { | |
1429 | struct usbnet *dev = usb_get_intfdata(intf); | |
1430 | struct aqc111_data *aqc111_data = dev->driver_priv; | |
2cf67270 | 1431 | u16 reg16, oldreg16; |
e58ba454 DB |
1432 | u8 reg8; |
1433 | ||
1434 | netif_carrier_off(dev->net); | |
1435 | ||
1436 | /* Power up ethernet PHY */ | |
1437 | aqc111_data->phy_cfg |= AQ_PHY_POWER_EN; | |
1438 | aqc111_data->phy_cfg &= ~AQ_LOW_POWER; | |
1439 | aqc111_data->phy_cfg &= ~AQ_WOL; | |
1440 | ||
1441 | reg8 = 0xFF; | |
1442 | aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_BM_INT_MASK, | |
1443 | 1, 1, ®8); | |
1444 | /* Configure RX control register => start operation */ | |
1445 | reg16 = aqc111_data->rxctl; | |
1446 | reg16 &= ~SFR_RX_CTL_START; | |
2cf67270 ON |
1447 | /* needs to be saved in case endianness is swapped */ |
1448 | oldreg16 = reg16; | |
e58ba454 DB |
1449 | aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, ®16); |
1450 | ||
2cf67270 | 1451 | reg16 = oldreg16 | SFR_RX_CTL_START; |
e58ba454 DB |
1452 | aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, ®16); |
1453 | ||
1454 | aqc111_set_phy_speed(dev, aqc111_data->autoneg, | |
1455 | aqc111_data->advertised_speed); | |
1456 | ||
1457 | aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE, | |
1458 | 2, ®16); | |
1459 | reg16 |= SFR_MEDIUM_RECEIVE_EN; | |
1460 | aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE, | |
1461 | 2, ®16); | |
1462 | reg8 = SFR_RX_PATH_READY; | |
1463 | aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_ETH_MAC_PATH, | |
1464 | 1, 1, ®8); | |
1465 | reg8 = 0x0; | |
1466 | aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BMRX_DMA_CONTROL, 1, 1, ®8); | |
1467 | ||
1468 | return usbnet_resume(intf); | |
1469 | } | |
1470 | ||
17364b80 DB |
1471 | #define AQC111_USB_ETH_DEV(vid, pid, table) \ |
1472 | USB_DEVICE_INTERFACE_CLASS((vid), (pid), USB_CLASS_VENDOR_SPEC), \ | |
1473 | .driver_info = (unsigned long)&(table) \ | |
1474 | }, \ | |
1475 | { \ | |
1476 | USB_DEVICE_AND_INTERFACE_INFO((vid), (pid), \ | |
1477 | USB_CLASS_COMM, \ | |
1478 | USB_CDC_SUBCLASS_ETHERNET, \ | |
1479 | USB_CDC_PROTO_NONE), \ | |
1480 | .driver_info = (unsigned long)&(table), | |
1481 | ||
1482 | static const struct usb_device_id products[] = { | |
1483 | {AQC111_USB_ETH_DEV(0x2eca, 0xc101, aqc111_info)}, | |
fa61ce4d DB |
1484 | {AQC111_USB_ETH_DEV(0x0b95, 0x2790, asix111_info)}, |
1485 | {AQC111_USB_ETH_DEV(0x0b95, 0x2791, asix112_info)}, | |
9098f21f | 1486 | {AQC111_USB_ETH_DEV(0x20f4, 0xe05a, trendnet_info)}, |
b7ebee2f | 1487 | {AQC111_USB_ETH_DEV(0x1c04, 0x0015, qnap_info)}, |
17364b80 DB |
1488 | { },/* END */ |
1489 | }; | |
1490 | MODULE_DEVICE_TABLE(usb, products); | |
1491 | ||
1492 | static struct usb_driver aq_driver = { | |
1493 | .name = "aqc111", | |
1494 | .id_table = products, | |
1495 | .probe = usbnet_probe, | |
e58ba454 DB |
1496 | .suspend = aqc111_suspend, |
1497 | .resume = aqc111_resume, | |
17364b80 DB |
1498 | .disconnect = usbnet_disconnect, |
1499 | }; | |
1500 | ||
1501 | module_usb_driver(aq_driver); | |
1502 | ||
1503 | MODULE_DESCRIPTION("Aquantia AQtion USB to 5/2.5GbE Controllers"); | |
1504 | MODULE_LICENSE("GPL"); |