be2net: Fix Rx pause counter for lancer
[linux-2.6-block.git] / drivers / net / tlan.c
CommitLineData
1da177e4
LT
1/*******************************************************************************
2 *
3 * Linux ThunderLAN Driver
4 *
5 * tlan.c
6 * by James Banks
7 *
8 * (C) 1997-1998 Caldera, Inc.
9 * (C) 1998 James Banks
10 * (C) 1999-2001 Torben Mathiasen
11 * (C) 2002 Samuel Chessman
12 *
13 * This software may be used and distributed according to the terms
14 * of the GNU General Public License, incorporated herein by reference.
15 *
1da177e4
LT
16 ** Useful (if not required) reading:
17 *
18 * Texas Instruments, ThunderLAN Programmer's Guide,
19 * TI Literature Number SPWU013A
20 * available in PDF format from www.ti.com
21 * Level One, LXT901 and LXT970 Data Sheets
22 * available in PDF format from www.level1.com
23 * National Semiconductor, DP83840A Data Sheet
24 * available in PDF format from www.national.com
25 * Microchip Technology, 24C01A/02A/04A Data Sheet
26 * available in PDF format from www.microchip.com
27 *
c659c38b 28 ******************************************************************************/
1da177e4 29
50624aab
JP
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
1da177e4
LT
32#include <linux/module.h>
33#include <linux/init.h>
34#include <linux/ioport.h>
35#include <linux/eisa.h>
36#include <linux/pci.h>
1e7f0bd8 37#include <linux/dma-mapping.h>
1da177e4
LT
38#include <linux/netdevice.h>
39#include <linux/etherdevice.h>
40#include <linux/delay.h>
41#include <linux/spinlock.h>
42#include <linux/workqueue.h>
43#include <linux/mii.h>
44
45#include "tlan.h"
46
1da177e4
LT
47
48/* For removing EISA devices */
c659c38b 49static struct net_device *tlan_eisa_devices;
1da177e4 50
c659c38b 51static int tlan_devices_installed;
1da177e4
LT
52
53/* Set speed, duplex and aui settings */
54static int aui[MAX_TLAN_BOARDS];
55static int duplex[MAX_TLAN_BOARDS];
56static int speed[MAX_TLAN_BOARDS];
57static int boards_found;
15efa9bb
SH
58module_param_array(aui, int, NULL, 0);
59module_param_array(duplex, int, NULL, 0);
60module_param_array(speed, int, NULL, 0);
61MODULE_PARM_DESC(aui, "ThunderLAN use AUI port(s) (0-1)");
c659c38b
SA
62MODULE_PARM_DESC(duplex,
63 "ThunderLAN duplex setting(s) (0-default, 1-half, 2-full)");
50624aab 64MODULE_PARM_DESC(speed, "ThunderLAN port speed setting(s) (0,10,100)");
1da177e4
LT
65
66MODULE_AUTHOR("Maintainer: Samuel Chessman <chessman@tux.org>");
67MODULE_DESCRIPTION("Driver for TI ThunderLAN based ethernet PCI adapters");
68MODULE_LICENSE("GPL");
69
70
71/* Define this to enable Link beat monitoring */
72#undef MONITOR
73
74/* Turn on debugging. See Documentation/networking/tlan.txt for details */
75static int debug;
15efa9bb
SH
76module_param(debug, int, 0);
77MODULE_PARM_DESC(debug, "ThunderLAN debug mask");
1da177e4 78
c659c38b 79static const char tlan_signature[] = "TLAN";
fa6d5d4f 80static const char tlan_banner[] = "ThunderLAN driver v1.17\n";
1da177e4
LT
81static int tlan_have_pci;
82static int tlan_have_eisa;
83
c659c38b
SA
84static const char * const media[] = {
85 "10BaseT-HD", "10BaseT-FD", "100baseTx-HD",
86 "100BaseTx-FD", "100BaseT4", NULL
1da177e4
LT
87};
88
89static struct board {
c659c38b
SA
90 const char *device_label;
91 u32 flags;
92 u16 addr_ofs;
1da177e4
LT
93} board_info[] = {
94 { "Compaq Netelligent 10 T PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
c659c38b
SA
95 { "Compaq Netelligent 10/100 TX PCI UTP",
96 TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
1da177e4 97 { "Compaq Integrated NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
dfc2c0a6
SH
98 { "Compaq NetFlex-3/P",
99 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
1da177e4 100 { "Compaq NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
dfc2c0a6
SH
101 { "Compaq Netelligent Integrated 10/100 TX UTP",
102 TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
c659c38b
SA
103 { "Compaq Netelligent Dual 10/100 TX PCI UTP",
104 TLAN_ADAPTER_NONE, 0x83 },
105 { "Compaq Netelligent 10/100 TX Embedded UTP",
106 TLAN_ADAPTER_NONE, 0x83 },
1da177e4 107 { "Olicom OC-2183/2185", TLAN_ADAPTER_USE_INTERN_10, 0x83 },
c659c38b
SA
108 { "Olicom OC-2325", TLAN_ADAPTER_UNMANAGED_PHY, 0xf8 },
109 { "Olicom OC-2326", TLAN_ADAPTER_USE_INTERN_10, 0xf8 },
1da177e4 110 { "Compaq Netelligent 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
c659c38b 111 { "Compaq Netelligent 10 T/2 PCI UTP/coax", TLAN_ADAPTER_NONE, 0x83 },
dfc2c0a6 112 { "Compaq NetFlex-3/E",
c659c38b 113 TLAN_ADAPTER_ACTIVITY_LED | /* EISA card */
dfc2c0a6 114 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
c659c38b
SA
115 { "Compaq NetFlex-3/E",
116 TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, /* EISA card */
1da177e4
LT
117};
118
a3aa1884 119static DEFINE_PCI_DEVICE_TABLE(tlan_pci_tbl) = {
1da177e4 120 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL10,
c659c38b 121 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
1da177e4 122 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100,
c659c38b 123 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
1da177e4 124 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3I,
c659c38b 125 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
1da177e4 126 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_THUNDER,
c659c38b 127 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
1da177e4 128 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3B,
c659c38b 129 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
1da177e4 130 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100PI,
c659c38b 131 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
1da177e4 132 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100D,
c659c38b 133 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },
1da177e4 134 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100I,
c659c38b 135 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 },
1da177e4 136 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2183,
c659c38b 137 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
1da177e4 138 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2325,
c659c38b 139 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 },
1da177e4 140 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2326,
c659c38b 141 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
1da177e4 142 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100,
c659c38b 143 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
1da177e4 144 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_T2,
c659c38b 145 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
1da177e4
LT
146 { 0,}
147};
6aa20a22 148MODULE_DEVICE_TABLE(pci, tlan_pci_tbl);
1da177e4 149
c659c38b
SA
150static void tlan_eisa_probe(void);
151static void tlan_eisa_cleanup(void);
152static int tlan_init(struct net_device *);
153static int tlan_open(struct net_device *dev);
154static netdev_tx_t tlan_start_tx(struct sk_buff *, struct net_device *);
155static irqreturn_t tlan_handle_interrupt(int, void *);
156static int tlan_close(struct net_device *);
157static struct net_device_stats *tlan_get_stats(struct net_device *);
158static void tlan_set_multicast_list(struct net_device *);
159static int tlan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
160static int tlan_probe1(struct pci_dev *pdev, long ioaddr,
161 int irq, int rev, const struct pci_device_id *ent);
162static void tlan_tx_timeout(struct net_device *dev);
163static void tlan_tx_timeout_work(struct work_struct *work);
164static int tlan_init_one(struct pci_dev *pdev,
165 const struct pci_device_id *ent);
166
167static u32 tlan_handle_tx_eof(struct net_device *, u16);
168static u32 tlan_handle_stat_overflow(struct net_device *, u16);
169static u32 tlan_handle_rx_eof(struct net_device *, u16);
170static u32 tlan_handle_dummy(struct net_device *, u16);
171static u32 tlan_handle_tx_eoc(struct net_device *, u16);
172static u32 tlan_handle_status_check(struct net_device *, u16);
173static u32 tlan_handle_rx_eoc(struct net_device *, u16);
174
175static void tlan_timer(unsigned long);
176
177static void tlan_reset_lists(struct net_device *);
178static void tlan_free_lists(struct net_device *);
179static void tlan_print_dio(u16);
180static void tlan_print_list(struct tlan_list *, char *, int);
181static void tlan_read_and_clear_stats(struct net_device *, int);
182static void tlan_reset_adapter(struct net_device *);
183static void tlan_finish_reset(struct net_device *);
184static void tlan_set_mac(struct net_device *, int areg, char *mac);
185
186static void tlan_phy_print(struct net_device *);
187static void tlan_phy_detect(struct net_device *);
188static void tlan_phy_power_down(struct net_device *);
189static void tlan_phy_power_up(struct net_device *);
190static void tlan_phy_reset(struct net_device *);
191static void tlan_phy_start_link(struct net_device *);
192static void tlan_phy_finish_auto_neg(struct net_device *);
1da177e4 193#ifdef MONITOR
c659c38b 194static void tlan_phy_monitor(struct net_device *);
1da177e4
LT
195#endif
196
197/*
c659c38b
SA
198 static int tlan_phy_nop(struct net_device *);
199 static int tlan_phy_internal_check(struct net_device *);
200 static int tlan_phy_internal_service(struct net_device *);
201 static int tlan_phy_dp83840a_check(struct net_device *);
1da177e4
LT
202*/
203
c659c38b
SA
204static bool tlan_mii_read_reg(struct net_device *, u16, u16, u16 *);
205static void tlan_mii_send_data(u16, u32, unsigned);
206static void tlan_mii_sync(u16);
207static void tlan_mii_write_reg(struct net_device *, u16, u16, u16);
1da177e4 208
c659c38b
SA
209static void tlan_ee_send_start(u16);
210static int tlan_ee_send_byte(u16, u8, int);
211static void tlan_ee_receive_byte(u16, u8 *, int);
212static int tlan_ee_read_byte(struct net_device *, u8, u8 *);
1da177e4
LT
213
214
93e16847 215static inline void
c659c38b 216tlan_store_skb(struct tlan_list *tag, struct sk_buff *skb)
1da177e4
LT
217{
218 unsigned long addr = (unsigned long)skb;
93e16847
SH
219 tag->buffer[9].address = addr;
220 tag->buffer[8].address = upper_32_bits(addr);
1da177e4
LT
221}
222
93e16847 223static inline struct sk_buff *
c659c38b 224tlan_get_skb(const struct tlan_list *tag)
1da177e4 225{
93e16847
SH
226 unsigned long addr;
227
0d63bea2
RF
228 addr = tag->buffer[9].address;
229 addr |= (tag->buffer[8].address << 16) << 16;
1da177e4
LT
230 return (struct sk_buff *) addr;
231}
232
c659c38b
SA
233static u32
234(*tlan_int_vector[TLAN_INT_NUMBER_OF_INTS])(struct net_device *, u16) = {
a3ccc789 235 NULL,
c659c38b
SA
236 tlan_handle_tx_eof,
237 tlan_handle_stat_overflow,
238 tlan_handle_rx_eof,
239 tlan_handle_dummy,
240 tlan_handle_tx_eoc,
241 tlan_handle_status_check,
242 tlan_handle_rx_eoc
1da177e4
LT
243};
244
245static inline void
c659c38b 246tlan_set_timer(struct net_device *dev, u32 ticks, u32 type)
1da177e4 247{
c659c38b 248 struct tlan_priv *priv = netdev_priv(dev);
1da177e4 249 unsigned long flags = 0;
6aa20a22 250
1da177e4
LT
251 if (!in_irq())
252 spin_lock_irqsave(&priv->lock, flags);
c659c38b
SA
253 if (priv->timer.function != NULL &&
254 priv->timer_type != TLAN_TIMER_ACTIVITY) {
1da177e4
LT
255 if (!in_irq())
256 spin_unlock_irqrestore(&priv->lock, flags);
257 return;
258 }
c659c38b 259 priv->timer.function = tlan_timer;
1da177e4
LT
260 if (!in_irq())
261 spin_unlock_irqrestore(&priv->lock, flags);
262
263 priv->timer.data = (unsigned long) dev;
c659c38b
SA
264 priv->timer_set_at = jiffies;
265 priv->timer_type = type;
1da177e4 266 mod_timer(&priv->timer, jiffies + ticks);
6aa20a22 267
c659c38b 268}
1da177e4
LT
269
270
271/*****************************************************************************
272******************************************************************************
273
c659c38b 274ThunderLAN driver primary functions
1da177e4 275
c659c38b 276these functions are more or less common to all linux network drivers.
1da177e4
LT
277
278******************************************************************************
279*****************************************************************************/
280
281
282
283
284
c659c38b
SA
285/***************************************************************
286 * tlan_remove_one
287 *
288 * Returns:
289 * Nothing
290 * Parms:
291 * None
292 *
293 * Goes through the TLanDevices list and frees the device
294 * structs and memory associated with each device (lists
295 * and buffers). It also ureserves the IO port regions
296 * associated with this device.
297 *
298 **************************************************************/
1da177e4
LT
299
300
c659c38b 301static void __devexit tlan_remove_one(struct pci_dev *pdev)
1da177e4 302{
c659c38b
SA
303 struct net_device *dev = pci_get_drvdata(pdev);
304 struct tlan_priv *priv = netdev_priv(dev);
6aa20a22 305
c659c38b 306 unregister_netdev(dev);
1da177e4 307
c659c38b
SA
308 if (priv->dma_storage) {
309 pci_free_consistent(priv->pci_dev,
310 priv->dma_size, priv->dma_storage,
311 priv->dma_storage_dma);
1da177e4
LT
312 }
313
314#ifdef CONFIG_PCI
315 pci_release_regions(pdev);
316#endif
6aa20a22 317
c659c38b 318 free_netdev(dev);
6aa20a22 319
c659c38b 320 pci_set_drvdata(pdev, NULL);
6aa20a22 321}
1da177e4 322
fa6d5d4f
SA
323static void tlan_start(struct net_device *dev)
324{
325 tlan_reset_lists(dev);
326 /* NOTE: It might not be necessary to read the stats before a
327 reset if you don't care what the values are.
328 */
329 tlan_read_and_clear_stats(dev, TLAN_IGNORE);
330 tlan_reset_adapter(dev);
331 netif_wake_queue(dev);
332}
333
334static void tlan_stop(struct net_device *dev)
335{
336 struct tlan_priv *priv = netdev_priv(dev);
337
338 tlan_read_and_clear_stats(dev, TLAN_RECORD);
339 outl(TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD);
340 /* Reset and power down phy */
341 tlan_reset_adapter(dev);
342 if (priv->timer.function != NULL) {
343 del_timer_sync(&priv->timer);
344 priv->timer.function = NULL;
345 }
346}
347
348#ifdef CONFIG_PM
349
350static int tlan_suspend(struct pci_dev *pdev, pm_message_t state)
351{
352 struct net_device *dev = pci_get_drvdata(pdev);
353
354 if (netif_running(dev))
355 tlan_stop(dev);
356
357 netif_device_detach(dev);
358 pci_save_state(pdev);
359 pci_disable_device(pdev);
360 pci_wake_from_d3(pdev, false);
361 pci_set_power_state(pdev, PCI_D3hot);
362
363 return 0;
364}
365
366static int tlan_resume(struct pci_dev *pdev)
367{
368 struct net_device *dev = pci_get_drvdata(pdev);
369
370 pci_set_power_state(pdev, PCI_D0);
371 pci_restore_state(pdev);
372 pci_enable_wake(pdev, 0, 0);
373 netif_device_attach(dev);
374
375 if (netif_running(dev))
376 tlan_start(dev);
377
378 return 0;
379}
380
381#else /* CONFIG_PM */
382
383#define tlan_suspend NULL
384#define tlan_resume NULL
385
386#endif /* CONFIG_PM */
387
388
1da177e4
LT
389static struct pci_driver tlan_driver = {
390 .name = "tlan",
391 .id_table = tlan_pci_tbl,
392 .probe = tlan_init_one,
6aa20a22 393 .remove = __devexit_p(tlan_remove_one),
fa6d5d4f
SA
394 .suspend = tlan_suspend,
395 .resume = tlan_resume,
1da177e4
LT
396};
397
398static int __init tlan_probe(void)
399{
6c04a515 400 int rc = -ENODEV;
6aa20a22 401
50624aab 402 pr_info("%s", tlan_banner);
6aa20a22 403
1da177e4 404 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting PCI Probe....\n");
6aa20a22 405
1da177e4
LT
406 /* Use new style PCI probing. Now the kernel will
407 do most of this for us */
6c04a515
LP
408 rc = pci_register_driver(&tlan_driver);
409
410 if (rc != 0) {
50624aab 411 pr_err("Could not register pci driver\n");
6c04a515
LP
412 goto err_out_pci_free;
413 }
1da177e4
LT
414
415 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting EISA Probe....\n");
c659c38b 416 tlan_eisa_probe();
6aa20a22 417
50624aab
JP
418 pr_info("%d device%s installed, PCI: %d EISA: %d\n",
419 tlan_devices_installed, tlan_devices_installed == 1 ? "" : "s",
420 tlan_have_pci, tlan_have_eisa);
1da177e4 421
c659c38b 422 if (tlan_devices_installed == 0) {
6c04a515
LP
423 rc = -ENODEV;
424 goto err_out_pci_unreg;
1da177e4
LT
425 }
426 return 0;
6c04a515
LP
427
428err_out_pci_unreg:
429 pci_unregister_driver(&tlan_driver);
430err_out_pci_free:
6c04a515 431 return rc;
1da177e4 432}
6aa20a22 433
1da177e4 434
c659c38b
SA
435static int __devinit tlan_init_one(struct pci_dev *pdev,
436 const struct pci_device_id *ent)
1da177e4 437{
c659c38b 438 return tlan_probe1(pdev, -1, -1, 0, ent);
1da177e4
LT
439}
440
441
442/*
c659c38b
SA
443***************************************************************
444* tlan_probe1
445*
446* Returns:
447* 0 on success, error code on error
448* Parms:
449* none
450*
451* The name is lower case to fit in with all the rest of
452* the netcard_probe names. This function looks for
453* another TLan based adapter, setting it up with the
454* allocated device struct if one is found.
455* tlan_probe has been ported to the new net API and
456* now allocates its own device structure. This function
457* is also used by modules.
458*
459**************************************************************/
460
461static int __devinit tlan_probe1(struct pci_dev *pdev,
dfc2c0a6 462 long ioaddr, int irq, int rev,
c659c38b 463 const struct pci_device_id *ent)
1da177e4
LT
464{
465
466 struct net_device *dev;
c659c38b 467 struct tlan_priv *priv;
1da177e4
LT
468 u16 device_id;
469 int reg, rc = -ENODEV;
470
ad9f6713 471#ifdef CONFIG_PCI
1da177e4
LT
472 if (pdev) {
473 rc = pci_enable_device(pdev);
474 if (rc)
475 return rc;
476
c659c38b 477 rc = pci_request_regions(pdev, tlan_signature);
1da177e4 478 if (rc) {
50624aab 479 pr_err("Could not reserve IO regions\n");
1da177e4
LT
480 goto err_out;
481 }
482 }
ad9f6713 483#endif /* CONFIG_PCI */
1da177e4 484
c659c38b 485 dev = alloc_etherdev(sizeof(struct tlan_priv));
1da177e4 486 if (dev == NULL) {
50624aab 487 pr_err("Could not allocate memory for device\n");
1da177e4
LT
488 rc = -ENOMEM;
489 goto err_out_regions;
490 }
1da177e4 491 SET_NETDEV_DEV(dev, &pdev->dev);
6aa20a22 492
1da177e4
LT
493 priv = netdev_priv(dev);
494
c659c38b 495 priv->pci_dev = pdev;
c4028958 496 priv->dev = dev;
6aa20a22 497
1da177e4
LT
498 /* Is this a PCI device? */
499 if (pdev) {
c659c38b 500 u32 pci_io_base = 0;
1da177e4
LT
501
502 priv->adapter = &board_info[ent->driver_data];
503
284901a9 504 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1da177e4 505 if (rc) {
50624aab 506 pr_err("No suitable PCI mapping available\n");
1da177e4
LT
507 goto err_out_free_dev;
508 }
509
c659c38b 510 for (reg = 0; reg <= 5; reg++) {
1da177e4
LT
511 if (pci_resource_flags(pdev, reg) & IORESOURCE_IO) {
512 pci_io_base = pci_resource_start(pdev, reg);
c659c38b
SA
513 TLAN_DBG(TLAN_DEBUG_GNRL,
514 "IO mapping is available at %x.\n",
515 pci_io_base);
1da177e4
LT
516 break;
517 }
518 }
519 if (!pci_io_base) {
50624aab 520 pr_err("No IO mappings available\n");
1da177e4
LT
521 rc = -EIO;
522 goto err_out_free_dev;
523 }
6aa20a22 524
1da177e4
LT
525 dev->base_addr = pci_io_base;
526 dev->irq = pdev->irq;
c659c38b 527 priv->adapter_rev = pdev->revision;
1da177e4
LT
528 pci_set_master(pdev);
529 pci_set_drvdata(pdev, dev);
530
531 } else { /* EISA card */
532 /* This is a hack. We need to know which board structure
533 * is suited for this adapter */
534 device_id = inw(ioaddr + EISA_ID2);
535 priv->is_eisa = 1;
536 if (device_id == 0x20F1) {
c659c38b
SA
537 priv->adapter = &board_info[13]; /* NetFlex-3/E */
538 priv->adapter_rev = 23; /* TLAN 2.3 */
1da177e4
LT
539 } else {
540 priv->adapter = &board_info[14];
c659c38b 541 priv->adapter_rev = 10; /* TLAN 1.0 */
1da177e4
LT
542 }
543 dev->base_addr = ioaddr;
544 dev->irq = irq;
545 }
546
547 /* Kernel parameters */
548 if (dev->mem_start) {
549 priv->aui = dev->mem_start & 0x01;
dfc2c0a6
SH
550 priv->duplex = ((dev->mem_start & 0x06) == 0x06) ? 0
551 : (dev->mem_start & 0x06) >> 1;
552 priv->speed = ((dev->mem_start & 0x18) == 0x18) ? 0
553 : (dev->mem_start & 0x18) >> 3;
6aa20a22 554
c659c38b 555 if (priv->speed == 0x1)
1da177e4 556 priv->speed = TLAN_SPEED_10;
c659c38b 557 else if (priv->speed == 0x2)
1da177e4 558 priv->speed = TLAN_SPEED_100;
c659c38b 559
1da177e4
LT
560 debug = priv->debug = dev->mem_end;
561 } else {
562 priv->aui = aui[boards_found];
563 priv->speed = speed[boards_found];
564 priv->duplex = duplex[boards_found];
565 priv->debug = debug;
566 }
6aa20a22 567
1da177e4
LT
568 /* This will be used when we get an adapter error from
569 * within our irq handler */
c659c38b 570 INIT_WORK(&priv->tlan_tqueue, tlan_tx_timeout_work);
1da177e4
LT
571
572 spin_lock_init(&priv->lock);
6aa20a22 573
c659c38b 574 rc = tlan_init(dev);
1da177e4 575 if (rc) {
50624aab 576 pr_err("Could not set up device\n");
1da177e4
LT
577 goto err_out_free_dev;
578 }
579
580 rc = register_netdev(dev);
581 if (rc) {
50624aab 582 pr_err("Could not register device\n");
1da177e4
LT
583 goto err_out_uninit;
584 }
585
6aa20a22 586
c659c38b 587 tlan_devices_installed++;
1da177e4 588 boards_found++;
6aa20a22 589
1da177e4
LT
590 /* pdev is NULL if this is an EISA device */
591 if (pdev)
592 tlan_have_pci++;
593 else {
c659c38b
SA
594 priv->next_device = tlan_eisa_devices;
595 tlan_eisa_devices = dev;
1da177e4
LT
596 tlan_have_eisa++;
597 }
6aa20a22 598
50624aab
JP
599 netdev_info(dev, "irq=%2d, io=%04x, %s, Rev. %d\n",
600 (int)dev->irq,
601 (int)dev->base_addr,
602 priv->adapter->device_label,
603 priv->adapter_rev);
1da177e4
LT
604 return 0;
605
606err_out_uninit:
c659c38b
SA
607 pci_free_consistent(priv->pci_dev, priv->dma_size, priv->dma_storage,
608 priv->dma_storage_dma);
1da177e4
LT
609err_out_free_dev:
610 free_netdev(dev);
611err_out_regions:
612#ifdef CONFIG_PCI
613 if (pdev)
614 pci_release_regions(pdev);
615#endif
616err_out:
617 if (pdev)
618 pci_disable_device(pdev);
619 return rc;
620}
621
622
c659c38b 623static void tlan_eisa_cleanup(void)
1da177e4
LT
624{
625 struct net_device *dev;
c659c38b 626 struct tlan_priv *priv;
6aa20a22 627
c659c38b
SA
628 while (tlan_have_eisa) {
629 dev = tlan_eisa_devices;
1da177e4 630 priv = netdev_priv(dev);
c659c38b
SA
631 if (priv->dma_storage) {
632 pci_free_consistent(priv->pci_dev, priv->dma_size,
633 priv->dma_storage,
634 priv->dma_storage_dma);
1da177e4 635 }
c659c38b
SA
636 release_region(dev->base_addr, 0x10);
637 unregister_netdev(dev);
638 tlan_eisa_devices = priv->next_device;
639 free_netdev(dev);
1da177e4
LT
640 tlan_have_eisa--;
641 }
642}
6aa20a22
JG
643
644
1da177e4
LT
645static void __exit tlan_exit(void)
646{
647 pci_unregister_driver(&tlan_driver);
648
649 if (tlan_have_eisa)
c659c38b 650 tlan_eisa_cleanup();
1da177e4 651
1da177e4
LT
652}
653
654
655/* Module loading/unloading */
656module_init(tlan_probe);
657module_exit(tlan_exit);
658
659
660
c659c38b
SA
661/**************************************************************
662 * tlan_eisa_probe
663 *
664 * Returns: 0 on success, 1 otherwise
665 *
666 * Parms: None
667 *
668 *
669 * This functions probes for EISA devices and calls
670 * TLan_probe1 when one is found.
671 *
672 *************************************************************/
1da177e4 673
c659c38b 674static void __init tlan_eisa_probe(void)
1da177e4 675{
c659c38b
SA
676 long ioaddr;
677 int rc = -ENODEV;
678 int irq;
1da177e4
LT
679 u16 device_id;
680
6aa20a22 681 if (!EISA_bus) {
1da177e4
LT
682 TLAN_DBG(TLAN_DEBUG_PROBE, "No EISA bus present\n");
683 return;
684 }
6aa20a22 685
1da177e4
LT
686 /* Loop through all slots of the EISA bus */
687 for (ioaddr = 0x1000; ioaddr < 0x9000; ioaddr += 0x1000) {
6aa20a22 688
c659c38b
SA
689 TLAN_DBG(TLAN_DEBUG_PROBE, "EISA_ID 0x%4x: 0x%4x\n",
690 (int) ioaddr + 0xc80, inw(ioaddr + EISA_ID));
691 TLAN_DBG(TLAN_DEBUG_PROBE, "EISA_ID 0x%4x: 0x%4x\n",
692 (int) ioaddr + 0xc82, inw(ioaddr + EISA_ID2));
1da177e4
LT
693
694
c659c38b
SA
695 TLAN_DBG(TLAN_DEBUG_PROBE,
696 "Probing for EISA adapter at IO: 0x%4x : ",
697 (int) ioaddr);
698 if (request_region(ioaddr, 0x10, tlan_signature) == NULL)
1da177e4
LT
699 goto out;
700
6aa20a22 701 if (inw(ioaddr + EISA_ID) != 0x110E) {
1da177e4
LT
702 release_region(ioaddr, 0x10);
703 goto out;
704 }
6aa20a22 705
1da177e4 706 device_id = inw(ioaddr + EISA_ID2);
6aa20a22 707 if (device_id != 0x20F1 && device_id != 0x40F1) {
c659c38b 708 release_region(ioaddr, 0x10);
1da177e4
LT
709 goto out;
710 }
6aa20a22 711
c659c38b
SA
712 /* check if adapter is enabled */
713 if (inb(ioaddr + EISA_CR) != 0x1) {
714 release_region(ioaddr, 0x10);
1da177e4
LT
715 goto out2;
716 }
6aa20a22
JG
717
718 if (debug == 0x10)
50624aab 719 pr_info("Found one\n");
1da177e4
LT
720
721
722 /* Get irq from board */
c659c38b
SA
723 switch (inb(ioaddr + 0xcc0)) {
724 case(0x10):
725 irq = 5;
726 break;
727 case(0x20):
728 irq = 9;
729 break;
730 case(0x40):
731 irq = 10;
732 break;
733 case(0x80):
734 irq = 11;
735 break;
736 default:
737 goto out;
6aa20a22
JG
738 }
739
740
1da177e4 741 /* Setup the newly found eisa adapter */
c659c38b
SA
742 rc = tlan_probe1(NULL, ioaddr, irq,
743 12, NULL);
1da177e4 744 continue;
6aa20a22 745
c659c38b
SA
746out:
747 if (debug == 0x10)
50624aab 748 pr_info("None found\n");
c659c38b 749 continue;
1da177e4 750
c659c38b
SA
751out2:
752 if (debug == 0x10)
50624aab 753 pr_info("Card found but it is not enabled, skipping\n");
c659c38b 754 continue;
6aa20a22 755
1da177e4
LT
756 }
757
c659c38b 758}
1da177e4
LT
759
760#ifdef CONFIG_NET_POLL_CONTROLLER
c659c38b 761static void tlan_poll(struct net_device *dev)
1da177e4
LT
762{
763 disable_irq(dev->irq);
c659c38b 764 tlan_handle_interrupt(dev->irq, dev);
1da177e4
LT
765 enable_irq(dev->irq);
766}
767#endif
768
c659c38b
SA
769static const struct net_device_ops tlan_netdev_ops = {
770 .ndo_open = tlan_open,
771 .ndo_stop = tlan_close,
772 .ndo_start_xmit = tlan_start_tx,
773 .ndo_tx_timeout = tlan_tx_timeout,
774 .ndo_get_stats = tlan_get_stats,
775 .ndo_set_multicast_list = tlan_set_multicast_list,
776 .ndo_do_ioctl = tlan_ioctl,
391c5e6e 777 .ndo_change_mtu = eth_change_mtu,
c659c38b 778 .ndo_set_mac_address = eth_mac_addr,
391c5e6e
SH
779 .ndo_validate_addr = eth_validate_addr,
780#ifdef CONFIG_NET_POLL_CONTROLLER
c659c38b 781 .ndo_poll_controller = tlan_poll,
391c5e6e
SH
782#endif
783};
6aa20a22 784
1da177e4
LT
785
786
c659c38b
SA
787/***************************************************************
788 * tlan_init
789 *
790 * Returns:
791 * 0 on success, error code otherwise.
792 * Parms:
793 * dev The structure of the device to be
794 * init'ed.
795 *
796 * This function completes the initialization of the
797 * device structure and driver. It reserves the IO
798 * addresses, allocates memory for the lists and bounce
799 * buffers, retrieves the MAC address from the eeprom
800 * and assignes the device's methods.
801 *
802 **************************************************************/
803
804static int tlan_init(struct net_device *dev)
1da177e4
LT
805{
806 int dma_size;
c659c38b 807 int err;
1da177e4 808 int i;
c659c38b 809 struct tlan_priv *priv;
1da177e4
LT
810
811 priv = netdev_priv(dev);
6aa20a22 812
c659c38b
SA
813 dma_size = (TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS)
814 * (sizeof(struct tlan_list));
815 priv->dma_storage = pci_alloc_consistent(priv->pci_dev,
816 dma_size,
817 &priv->dma_storage_dma);
818 priv->dma_size = dma_size;
819
820 if (priv->dma_storage == NULL) {
50624aab 821 pr_err("Could not allocate lists and buffers for %s\n",
c659c38b 822 dev->name);
1da177e4
LT
823 return -ENOMEM;
824 }
c659c38b
SA
825 memset(priv->dma_storage, 0, dma_size);
826 priv->rx_list = (struct tlan_list *)
827 ALIGN((unsigned long)priv->dma_storage, 8);
828 priv->rx_list_dma = ALIGN(priv->dma_storage_dma, 8);
829 priv->tx_list = priv->rx_list + TLAN_NUM_RX_LISTS;
830 priv->tx_list_dma =
831 priv->rx_list_dma + sizeof(struct tlan_list)*TLAN_NUM_RX_LISTS;
93e16847 832
1da177e4 833 err = 0;
c659c38b
SA
834 for (i = 0; i < 6 ; i++)
835 err |= tlan_ee_read_byte(dev,
836 (u8) priv->adapter->addr_ofs + i,
837 (u8 *) &dev->dev_addr[i]);
838 if (err) {
50624aab
JP
839 pr_err("%s: Error reading MAC from eeprom: %d\n",
840 dev->name, err);
1da177e4
LT
841 }
842 dev->addr_len = 6;
843
844 netif_carrier_off(dev);
845
846 /* Device methods */
c659c38b 847 dev->netdev_ops = &tlan_netdev_ops;
1da177e4
LT
848 dev->watchdog_timeo = TX_TIMEOUT;
849
850 return 0;
851
c659c38b 852}
1da177e4
LT
853
854
855
856
c659c38b
SA
857/***************************************************************
858 * tlan_open
859 *
860 * Returns:
861 * 0 on success, error code otherwise.
862 * Parms:
863 * dev Structure of device to be opened.
864 *
865 * This routine puts the driver and TLAN adapter in a
866 * state where it is ready to send and receive packets.
867 * It allocates the IRQ, resets and brings the adapter
868 * out of reset, and allows interrupts. It also delays
869 * the startup for autonegotiation or sends a Rx GO
870 * command to the adapter, as appropriate.
871 *
872 **************************************************************/
1da177e4 873
c659c38b 874static int tlan_open(struct net_device *dev)
1da177e4 875{
c659c38b 876 struct tlan_priv *priv = netdev_priv(dev);
1da177e4 877 int err;
6aa20a22 878
c659c38b
SA
879 priv->tlan_rev = tlan_dio_read8(dev->base_addr, TLAN_DEF_REVISION);
880 err = request_irq(dev->irq, tlan_handle_interrupt, IRQF_SHARED,
881 dev->name, dev);
6aa20a22 882
c659c38b 883 if (err) {
50624aab
JP
884 netdev_err(dev, "Cannot open because IRQ %d is already in use\n",
885 dev->irq);
1da177e4
LT
886 return err;
887 }
6aa20a22 888
1da177e4 889 init_timer(&priv->timer);
6aa20a22 890
fa6d5d4f 891 tlan_start(dev);
1da177e4 892
c659c38b
SA
893 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Opened. TLAN Chip Rev: %x\n",
894 dev->name, priv->tlan_rev);
1da177e4
LT
895
896 return 0;
897
c659c38b 898}
1da177e4
LT
899
900
901
c659c38b
SA
902/**************************************************************
903 * tlan_ioctl
904 *
905 * Returns:
906 * 0 on success, error code otherwise
907 * Params:
908 * dev structure of device to receive ioctl.
909 *
910 * rq ifreq structure to hold userspace data.
911 *
912 * cmd ioctl command.
913 *
914 *
915 *************************************************************/
1da177e4 916
c659c38b 917static int tlan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1da177e4 918{
c659c38b 919 struct tlan_priv *priv = netdev_priv(dev);
1da177e4 920 struct mii_ioctl_data *data = if_mii(rq);
c659c38b 921 u32 phy = priv->phy[priv->phy_num];
6aa20a22 922
c659c38b 923 if (!priv->phy_online)
1da177e4
LT
924 return -EAGAIN;
925
c659c38b
SA
926 switch (cmd) {
927 case SIOCGMIIPHY: /* get address of MII PHY in use. */
928 data->phy_id = phy;
1da177e4
LT
929
930
c659c38b
SA
931 case SIOCGMIIREG: /* read MII PHY register. */
932 tlan_mii_read_reg(dev, data->phy_id & 0x1f,
933 data->reg_num & 0x1f, &data->val_out);
934 return 0;
6aa20a22 935
1da177e4 936
c659c38b
SA
937 case SIOCSMIIREG: /* write MII PHY register. */
938 tlan_mii_write_reg(dev, data->phy_id & 0x1f,
939 data->reg_num & 0x1f, data->val_in);
940 return 0;
941 default:
942 return -EOPNOTSUPP;
1da177e4 943 }
c659c38b 944}
1da177e4
LT
945
946
c659c38b
SA
947/***************************************************************
948 * tlan_tx_timeout
949 *
950 * Returns: nothing
951 *
952 * Params:
953 * dev structure of device which timed out
954 * during transmit.
955 *
956 **************************************************************/
1da177e4 957
c659c38b 958static void tlan_tx_timeout(struct net_device *dev)
1da177e4 959{
6aa20a22 960
c659c38b 961 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Transmit timed out.\n", dev->name);
6aa20a22 962
1da177e4 963 /* Ok so we timed out, lets see what we can do about it...*/
c659c38b
SA
964 tlan_free_lists(dev);
965 tlan_reset_lists(dev);
966 tlan_read_and_clear_stats(dev, TLAN_IGNORE);
967 tlan_reset_adapter(dev);
1ae5dc34 968 dev->trans_start = jiffies; /* prevent tx timeout */
c659c38b 969 netif_wake_queue(dev);
1da177e4
LT
970
971}
6aa20a22 972
1da177e4 973
c659c38b
SA
974/***************************************************************
975 * tlan_tx_timeout_work
976 *
977 * Returns: nothing
978 *
979 * Params:
980 * work work item of device which timed out
981 *
982 **************************************************************/
c4028958 983
c659c38b 984static void tlan_tx_timeout_work(struct work_struct *work)
c4028958 985{
c659c38b
SA
986 struct tlan_priv *priv =
987 container_of(work, struct tlan_priv, tlan_tqueue);
c4028958 988
c659c38b 989 tlan_tx_timeout(priv->dev);
c4028958
DH
990}
991
992
1da177e4 993
c659c38b
SA
994/***************************************************************
995 * tlan_start_tx
996 *
997 * Returns:
998 * 0 on success, non-zero on failure.
999 * Parms:
1000 * skb A pointer to the sk_buff containing the
1001 * frame to be sent.
1002 * dev The device to send the data on.
1003 *
1004 * This function adds a frame to the Tx list to be sent
1005 * ASAP. First it verifies that the adapter is ready and
1006 * there is room in the queue. Then it sets up the next
1007 * available list, copies the frame to the corresponding
1008 * buffer. If the adapter Tx channel is idle, it gives
1009 * the adapter a Tx Go command on the list, otherwise it
1010 * sets the forward address of the previous list to point
1011 * to this one. Then it frees the sk_buff.
1012 *
1013 **************************************************************/
1014
1015static netdev_tx_t tlan_start_tx(struct sk_buff *skb, struct net_device *dev)
1da177e4 1016{
c659c38b 1017 struct tlan_priv *priv = netdev_priv(dev);
1da177e4 1018 dma_addr_t tail_list_phys;
c659c38b 1019 struct tlan_list *tail_list;
1da177e4 1020 unsigned long flags;
8953f128 1021 unsigned int txlen;
1da177e4 1022
c659c38b
SA
1023 if (!priv->phy_online) {
1024 TLAN_DBG(TLAN_DEBUG_TX, "TRANSMIT: %s PHY is not ready\n",
1025 dev->name);
1da177e4 1026 dev_kfree_skb_any(skb);
6ed10654 1027 return NETDEV_TX_OK;
1da177e4
LT
1028 }
1029
41873e9a 1030 if (skb_padto(skb, TLAN_MIN_FRAME_SIZE))
6ed10654 1031 return NETDEV_TX_OK;
8953f128 1032 txlen = max(skb->len, (unsigned int)TLAN_MIN_FRAME_SIZE);
41873e9a 1033
c659c38b
SA
1034 tail_list = priv->tx_list + priv->tx_tail;
1035 tail_list_phys =
1036 priv->tx_list_dma + sizeof(struct tlan_list)*priv->tx_tail;
6aa20a22 1037
c659c38b
SA
1038 if (tail_list->c_stat != TLAN_CSTAT_UNUSED) {
1039 TLAN_DBG(TLAN_DEBUG_TX,
1040 "TRANSMIT: %s is busy (Head=%d Tail=%d)\n",
1041 dev->name, priv->tx_head, priv->tx_tail);
1da177e4 1042 netif_stop_queue(dev);
c659c38b 1043 priv->tx_busy_count++;
5b548140 1044 return NETDEV_TX_BUSY;
1da177e4
LT
1045 }
1046
1047 tail_list->forward = 0;
1048
c659c38b 1049 tail_list->buffer[0].address = pci_map_single(priv->pci_dev,
5eeabf51
SA
1050 skb->data, txlen,
1051 PCI_DMA_TODEVICE);
c659c38b 1052 tlan_store_skb(tail_list, skb);
1da177e4 1053
c659c38b 1054 tail_list->frame_size = (u16) txlen;
8953f128 1055 tail_list->buffer[0].count = TLAN_LAST_BUFFER | (u32) txlen;
41873e9a
SH
1056 tail_list->buffer[1].count = 0;
1057 tail_list->buffer[1].address = 0;
1da177e4
LT
1058
1059 spin_lock_irqsave(&priv->lock, flags);
c659c38b
SA
1060 tail_list->c_stat = TLAN_CSTAT_READY;
1061 if (!priv->tx_in_progress) {
1062 priv->tx_in_progress = 1;
1063 TLAN_DBG(TLAN_DEBUG_TX,
1064 "TRANSMIT: Starting TX on buffer %d\n",
1065 priv->tx_tail);
1066 outl(tail_list_phys, dev->base_addr + TLAN_CH_PARM);
1067 outl(TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD);
1da177e4 1068 } else {
c659c38b
SA
1069 TLAN_DBG(TLAN_DEBUG_TX,
1070 "TRANSMIT: Adding buffer %d to TX channel\n",
1071 priv->tx_tail);
1072 if (priv->tx_tail == 0) {
1073 (priv->tx_list + (TLAN_NUM_TX_LISTS - 1))->forward
dfc2c0a6 1074 = tail_list_phys;
1da177e4 1075 } else {
c659c38b 1076 (priv->tx_list + (priv->tx_tail - 1))->forward
dfc2c0a6 1077 = tail_list_phys;
1da177e4
LT
1078 }
1079 }
1080 spin_unlock_irqrestore(&priv->lock, flags);
1081
c659c38b 1082 CIRC_INC(priv->tx_tail, TLAN_NUM_TX_LISTS);
1da177e4 1083
6ed10654 1084 return NETDEV_TX_OK;
1da177e4 1085
c659c38b 1086}
1da177e4
LT
1087
1088
1089
1090
c659c38b
SA
1091/***************************************************************
1092 * tlan_handle_interrupt
1093 *
1094 * Returns:
1095 * Nothing
1096 * Parms:
1097 * irq The line on which the interrupt
1098 * occurred.
1099 * dev_id A pointer to the device assigned to
1100 * this irq line.
1101 *
1102 * This function handles an interrupt generated by its
1103 * assigned TLAN adapter. The function deactivates
1104 * interrupts on its adapter, records the type of
1105 * interrupt, executes the appropriate subhandler, and
1106 * acknowdges the interrupt to the adapter (thus
1107 * re-enabling adapter interrupts.
1108 *
1109 **************************************************************/
1da177e4 1110
c659c38b 1111static irqreturn_t tlan_handle_interrupt(int irq, void *dev_id)
1da177e4 1112{
a3ccc789 1113 struct net_device *dev = dev_id;
c659c38b 1114 struct tlan_priv *priv = netdev_priv(dev);
1da177e4 1115 u16 host_int;
a3ccc789 1116 u16 type;
1da177e4
LT
1117
1118 spin_lock(&priv->lock);
1119
c659c38b
SA
1120 host_int = inw(dev->base_addr + TLAN_HOST_INT);
1121 type = (host_int & TLAN_HI_IT_MASK) >> 2;
1122 if (type) {
a3ccc789
SH
1123 u32 ack;
1124 u32 host_cmd;
1da177e4 1125
c659c38b
SA
1126 outw(host_int, dev->base_addr + TLAN_HOST_INT);
1127 ack = tlan_int_vector[type](dev, host_int);
1da177e4 1128
c659c38b
SA
1129 if (ack) {
1130 host_cmd = TLAN_HC_ACK | ack | (type << 18);
1131 outl(host_cmd, dev->base_addr + TLAN_HOST_CMD);
a3ccc789 1132 }
1da177e4
LT
1133 }
1134
1135 spin_unlock(&priv->lock);
1136
a3ccc789 1137 return IRQ_RETVAL(type);
c659c38b 1138}
1da177e4
LT
1139
1140
1141
1142
c659c38b
SA
1143/***************************************************************
1144 * tlan_close
1145 *
1146 * Returns:
1147 * An error code.
1148 * Parms:
1149 * dev The device structure of the device to
1150 * close.
1151 *
1152 * This function shuts down the adapter. It records any
1153 * stats, puts the adapter into reset state, deactivates
1154 * its time as needed, and frees the irq it is using.
1155 *
1156 **************************************************************/
1da177e4 1157
c659c38b 1158static int tlan_close(struct net_device *dev)
1da177e4 1159{
c659c38b 1160 struct tlan_priv *priv = netdev_priv(dev);
1da177e4 1161
1da177e4 1162 priv->neg_be_verbose = 0;
fa6d5d4f 1163 tlan_stop(dev);
6aa20a22 1164
c659c38b
SA
1165 free_irq(dev->irq, dev);
1166 tlan_free_lists(dev);
1167 TLAN_DBG(TLAN_DEBUG_GNRL, "Device %s closed.\n", dev->name);
1da177e4
LT
1168
1169 return 0;
1170
c659c38b 1171}
1da177e4
LT
1172
1173
1174
1175
c659c38b
SA
1176/***************************************************************
1177 * tlan_get_stats
1178 *
1179 * Returns:
1180 * A pointer to the device's statistics structure.
1181 * Parms:
1182 * dev The device structure to return the
1183 * stats for.
1184 *
1185 * This function updates the devices statistics by reading
1186 * the TLAN chip's onboard registers. Then it returns the
1187 * address of the statistics structure.
1188 *
1189 **************************************************************/
1da177e4 1190
c659c38b 1191static struct net_device_stats *tlan_get_stats(struct net_device *dev)
1da177e4 1192{
c659c38b 1193 struct tlan_priv *priv = netdev_priv(dev);
1da177e4
LT
1194 int i;
1195
1196 /* Should only read stats if open ? */
c659c38b 1197 tlan_read_and_clear_stats(dev, TLAN_RECORD);
1da177e4 1198
c659c38b
SA
1199 TLAN_DBG(TLAN_DEBUG_RX, "RECEIVE: %s EOC count = %d\n", dev->name,
1200 priv->rx_eoc_count);
1201 TLAN_DBG(TLAN_DEBUG_TX, "TRANSMIT: %s Busy count = %d\n", dev->name,
1202 priv->tx_busy_count);
1203 if (debug & TLAN_DEBUG_GNRL) {
1204 tlan_print_dio(dev->base_addr);
1205 tlan_phy_print(dev);
1da177e4 1206 }
c659c38b
SA
1207 if (debug & TLAN_DEBUG_LIST) {
1208 for (i = 0; i < TLAN_NUM_RX_LISTS; i++)
1209 tlan_print_list(priv->rx_list + i, "RX", i);
1210 for (i = 0; i < TLAN_NUM_TX_LISTS; i++)
1211 tlan_print_list(priv->tx_list + i, "TX", i);
1da177e4 1212 }
6aa20a22 1213
f8f31544 1214 return &dev->stats;
1da177e4 1215
c659c38b 1216}
1da177e4
LT
1217
1218
1219
1220
c659c38b
SA
1221/***************************************************************
1222 * tlan_set_multicast_list
1223 *
1224 * Returns:
1225 * Nothing
1226 * Parms:
1227 * dev The device structure to set the
1228 * multicast list for.
1229 *
1230 * This function sets the TLAN adaptor to various receive
1231 * modes. If the IFF_PROMISC flag is set, promiscuous
1232 * mode is acitviated. Otherwise, promiscuous mode is
1233 * turned off. If the IFF_ALLMULTI flag is set, then
1234 * the hash table is set to receive all group addresses.
1235 * Otherwise, the first three multicast addresses are
1236 * stored in AREG_1-3, and the rest are selected via the
1237 * hash table, as necessary.
1238 *
1239 **************************************************************/
1da177e4 1240
c659c38b 1241static void tlan_set_multicast_list(struct net_device *dev)
6aa20a22 1242{
22bedad3 1243 struct netdev_hw_addr *ha;
1da177e4
LT
1244 u32 hash1 = 0;
1245 u32 hash2 = 0;
1246 int i;
1247 u32 offset;
1248 u8 tmp;
1249
c659c38b
SA
1250 if (dev->flags & IFF_PROMISC) {
1251 tmp = tlan_dio_read8(dev->base_addr, TLAN_NET_CMD);
1252 tlan_dio_write8(dev->base_addr,
1253 TLAN_NET_CMD, tmp | TLAN_NET_CMD_CAF);
1da177e4 1254 } else {
c659c38b
SA
1255 tmp = tlan_dio_read8(dev->base_addr, TLAN_NET_CMD);
1256 tlan_dio_write8(dev->base_addr,
1257 TLAN_NET_CMD, tmp & ~TLAN_NET_CMD_CAF);
1258 if (dev->flags & IFF_ALLMULTI) {
1259 for (i = 0; i < 3; i++)
1260 tlan_set_mac(dev, i + 1, NULL);
1261 tlan_dio_write32(dev->base_addr, TLAN_HASH_1,
1262 0xffffffff);
1263 tlan_dio_write32(dev->base_addr, TLAN_HASH_2,
1264 0xffffffff);
1da177e4 1265 } else {
567ec874 1266 i = 0;
22bedad3 1267 netdev_for_each_mc_addr(ha, dev) {
c659c38b
SA
1268 if (i < 3) {
1269 tlan_set_mac(dev, i + 1,
22bedad3 1270 (char *) &ha->addr);
1da177e4 1271 } else {
c659c38b
SA
1272 offset =
1273 tlan_hash_func((u8 *)&ha->addr);
1274 if (offset < 32)
1275 hash1 |= (1 << offset);
1da177e4 1276 else
c659c38b 1277 hash2 |= (1 << (offset - 32));
1da177e4 1278 }
567ec874 1279 i++;
1da177e4 1280 }
c659c38b
SA
1281 for ( ; i < 3; i++)
1282 tlan_set_mac(dev, i + 1, NULL);
1283 tlan_dio_write32(dev->base_addr, TLAN_HASH_1, hash1);
1284 tlan_dio_write32(dev->base_addr, TLAN_HASH_2, hash2);
1da177e4
LT
1285 }
1286 }
1287
c659c38b 1288}
1da177e4
LT
1289
1290
1291
1292/*****************************************************************************
1293******************************************************************************
1294
c659c38b 1295ThunderLAN driver interrupt vectors and table
1da177e4 1296
c659c38b
SA
1297please see chap. 4, "Interrupt Handling" of the "ThunderLAN
1298Programmer's Guide" for more informations on handling interrupts
1299generated by TLAN based adapters.
1da177e4
LT
1300
1301******************************************************************************
1302*****************************************************************************/
1303
1304
1da177e4
LT
1305
1306
c659c38b
SA
1307/***************************************************************
1308 * tlan_handle_tx_eof
1309 *
1310 * Returns:
1311 * 1
1312 * Parms:
1313 * dev Device assigned the IRQ that was
1314 * raised.
1315 * host_int The contents of the HOST_INT
1316 * port.
1317 *
1318 * This function handles Tx EOF interrupts which are raised
1319 * by the adapter when it has completed sending the
1320 * contents of a buffer. If detemines which list/buffer
1321 * was completed and resets it. If the buffer was the last
1322 * in the channel (EOC), then the function checks to see if
1323 * another buffer is ready to send, and if so, sends a Tx
1324 * Go command. Finally, the driver activates/continues the
1325 * activity LED.
1326 *
1327 **************************************************************/
1328
1329static u32 tlan_handle_tx_eof(struct net_device *dev, u16 host_int)
1da177e4 1330{
c659c38b 1331 struct tlan_priv *priv = netdev_priv(dev);
1da177e4 1332 int eoc = 0;
c659c38b 1333 struct tlan_list *head_list;
1da177e4
LT
1334 dma_addr_t head_list_phys;
1335 u32 ack = 0;
c659c38b 1336 u16 tmp_c_stat;
6aa20a22 1337
c659c38b
SA
1338 TLAN_DBG(TLAN_DEBUG_TX,
1339 "TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n",
1340 priv->tx_head, priv->tx_tail);
1341 head_list = priv->tx_list + priv->tx_head;
1da177e4 1342
c659c38b
SA
1343 while (((tmp_c_stat = head_list->c_stat) & TLAN_CSTAT_FRM_CMP)
1344 && (ack < 255)) {
1345 struct sk_buff *skb = tlan_get_skb(head_list);
5eeabf51 1346
1da177e4 1347 ack++;
c659c38b 1348 pci_unmap_single(priv->pci_dev, head_list->buffer[0].address,
5eeabf51
SA
1349 max(skb->len,
1350 (unsigned int)TLAN_MIN_FRAME_SIZE),
1351 PCI_DMA_TODEVICE);
1352 dev_kfree_skb_any(skb);
1353 head_list->buffer[8].address = 0;
1354 head_list->buffer[9].address = 0;
6aa20a22 1355
c659c38b 1356 if (tmp_c_stat & TLAN_CSTAT_EOC)
1da177e4 1357 eoc = 1;
6aa20a22 1358
c659c38b 1359 dev->stats.tx_bytes += head_list->frame_size;
1da177e4 1360
c659c38b 1361 head_list->c_stat = TLAN_CSTAT_UNUSED;
6aa20a22 1362 netif_start_queue(dev);
c659c38b
SA
1363 CIRC_INC(priv->tx_head, TLAN_NUM_TX_LISTS);
1364 head_list = priv->tx_list + priv->tx_head;
1da177e4
LT
1365 }
1366
1367 if (!ack)
50624aab
JP
1368 netdev_info(dev,
1369 "Received interrupt for uncompleted TX frame\n");
c659c38b
SA
1370
1371 if (eoc) {
1372 TLAN_DBG(TLAN_DEBUG_TX,
1373 "TRANSMIT: handling TX EOC (Head=%d Tail=%d)\n",
1374 priv->tx_head, priv->tx_tail);
1375 head_list = priv->tx_list + priv->tx_head;
1376 head_list_phys = priv->tx_list_dma
1377 + sizeof(struct tlan_list)*priv->tx_head;
f45437ef
SA
1378 if ((head_list->c_stat & TLAN_CSTAT_READY)
1379 == TLAN_CSTAT_READY) {
c659c38b 1380 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM);
1da177e4
LT
1381 ack |= TLAN_HC_GO;
1382 } else {
c659c38b 1383 priv->tx_in_progress = 0;
1da177e4
LT
1384 }
1385 }
6aa20a22 1386
c659c38b
SA
1387 if (priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED) {
1388 tlan_dio_write8(dev->base_addr,
1389 TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT);
1390 if (priv->timer.function == NULL) {
1391 priv->timer.function = tlan_timer;
1392 priv->timer.data = (unsigned long) dev;
1393 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1394 priv->timer_set_at = jiffies;
1395 priv->timer_type = TLAN_TIMER_ACTIVITY;
1396 add_timer(&priv->timer);
1397 } else if (priv->timer_type == TLAN_TIMER_ACTIVITY) {
1398 priv->timer_set_at = jiffies;
1da177e4
LT
1399 }
1400 }
1401
1402 return ack;
1403
c659c38b 1404}
1da177e4
LT
1405
1406
1407
1408
c659c38b
SA
1409/***************************************************************
1410 * TLan_HandleStatOverflow
1411 *
1412 * Returns:
1413 * 1
1414 * Parms:
1415 * dev Device assigned the IRQ that was
1416 * raised.
1417 * host_int The contents of the HOST_INT
1418 * port.
1419 *
1420 * This function handles the Statistics Overflow interrupt
1421 * which means that one or more of the TLAN statistics
1422 * registers has reached 1/2 capacity and needs to be read.
1423 *
1424 **************************************************************/
1da177e4 1425
c659c38b 1426static u32 tlan_handle_stat_overflow(struct net_device *dev, u16 host_int)
1da177e4 1427{
c659c38b 1428 tlan_read_and_clear_stats(dev, TLAN_RECORD);
1da177e4
LT
1429
1430 return 1;
1431
c659c38b
SA
1432}
1433
1434
1435
1436
1437/***************************************************************
1438 * TLan_HandleRxEOF
1439 *
1440 * Returns:
1441 * 1
1442 * Parms:
1443 * dev Device assigned the IRQ that was
1444 * raised.
1445 * host_int The contents of the HOST_INT
1446 * port.
1447 *
1448 * This function handles the Rx EOF interrupt which
1449 * indicates a frame has been received by the adapter from
1450 * the net and the frame has been transferred to memory.
1451 * The function determines the bounce buffer the frame has
1452 * been loaded into, creates a new sk_buff big enough to
1453 * hold the frame, and sends it to protocol stack. It
1454 * then resets the used buffer and appends it to the end
1455 * of the list. If the frame was the last in the Rx
1456 * channel (EOC), the function restarts the receive channel
1457 * by sending an Rx Go command to the adapter. Then it
1458 * activates/continues the activity LED.
1459 *
1460 **************************************************************/
1461
1462static u32 tlan_handle_rx_eof(struct net_device *dev, u16 host_int)
1da177e4 1463{
c659c38b 1464 struct tlan_priv *priv = netdev_priv(dev);
1da177e4
LT
1465 u32 ack = 0;
1466 int eoc = 0;
c659c38b 1467 struct tlan_list *head_list;
1da177e4 1468 struct sk_buff *skb;
c659c38b
SA
1469 struct tlan_list *tail_list;
1470 u16 tmp_c_stat;
1da177e4
LT
1471 dma_addr_t head_list_phys;
1472
c659c38b
SA
1473 TLAN_DBG(TLAN_DEBUG_RX, "RECEIVE: handling RX EOF (Head=%d Tail=%d)\n",
1474 priv->rx_head, priv->rx_tail);
1475 head_list = priv->rx_list + priv->rx_head;
1476 head_list_phys =
1477 priv->rx_list_dma + sizeof(struct tlan_list)*priv->rx_head;
6aa20a22 1478
c659c38b
SA
1479 while (((tmp_c_stat = head_list->c_stat) & TLAN_CSTAT_FRM_CMP)
1480 && (ack < 255)) {
1481 dma_addr_t frame_dma = head_list->buffer[0].address;
1482 u32 frame_size = head_list->frame_size;
5eeabf51
SA
1483 struct sk_buff *new_skb;
1484
1da177e4 1485 ack++;
c659c38b 1486 if (tmp_c_stat & TLAN_CSTAT_EOC)
1da177e4 1487 eoc = 1;
6aa20a22 1488
89d71a66
ED
1489 new_skb = netdev_alloc_skb_ip_align(dev,
1490 TLAN_MAX_FRAME_SIZE + 5);
c659c38b 1491 if (!new_skb)
5eeabf51 1492 goto drop_and_reuse;
6aa20a22 1493
c659c38b
SA
1494 skb = tlan_get_skb(head_list);
1495 pci_unmap_single(priv->pci_dev, frame_dma,
5eeabf51 1496 TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
c659c38b 1497 skb_put(skb, frame_size);
1da177e4 1498
c659c38b 1499 dev->stats.rx_bytes += frame_size;
1da177e4 1500
c659c38b
SA
1501 skb->protocol = eth_type_trans(skb, dev);
1502 netif_rx(skb);
6aa20a22 1503
c659c38b
SA
1504 head_list->buffer[0].address =
1505 pci_map_single(priv->pci_dev, new_skb->data,
1506 TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
93e16847 1507
c659c38b 1508 tlan_store_skb(head_list, new_skb);
dfc2c0a6 1509drop_and_reuse:
1da177e4 1510 head_list->forward = 0;
c659c38b
SA
1511 head_list->c_stat = 0;
1512 tail_list = priv->rx_list + priv->rx_tail;
1da177e4
LT
1513 tail_list->forward = head_list_phys;
1514
c659c38b
SA
1515 CIRC_INC(priv->rx_head, TLAN_NUM_RX_LISTS);
1516 CIRC_INC(priv->rx_tail, TLAN_NUM_RX_LISTS);
1517 head_list = priv->rx_list + priv->rx_head;
1518 head_list_phys = priv->rx_list_dma
1519 + sizeof(struct tlan_list)*priv->rx_head;
1da177e4
LT
1520 }
1521
1522 if (!ack)
50624aab
JP
1523 netdev_info(dev,
1524 "Received interrupt for uncompleted RX frame\n");
c659c38b
SA
1525
1526
1527 if (eoc) {
1528 TLAN_DBG(TLAN_DEBUG_RX,
1529 "RECEIVE: handling RX EOC (Head=%d Tail=%d)\n",
1530 priv->rx_head, priv->rx_tail);
1531 head_list = priv->rx_list + priv->rx_head;
1532 head_list_phys = priv->rx_list_dma
1533 + sizeof(struct tlan_list)*priv->rx_head;
1534 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM);
1da177e4 1535 ack |= TLAN_HC_GO | TLAN_HC_RT;
c659c38b 1536 priv->rx_eoc_count++;
1da177e4
LT
1537 }
1538
c659c38b
SA
1539 if (priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED) {
1540 tlan_dio_write8(dev->base_addr,
1541 TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT);
1542 if (priv->timer.function == NULL) {
1543 priv->timer.function = tlan_timer;
1da177e4
LT
1544 priv->timer.data = (unsigned long) dev;
1545 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
c659c38b
SA
1546 priv->timer_set_at = jiffies;
1547 priv->timer_type = TLAN_TIMER_ACTIVITY;
1da177e4 1548 add_timer(&priv->timer);
c659c38b
SA
1549 } else if (priv->timer_type == TLAN_TIMER_ACTIVITY) {
1550 priv->timer_set_at = jiffies;
1da177e4
LT
1551 }
1552 }
1553
1da177e4
LT
1554 return ack;
1555
c659c38b 1556}
1da177e4
LT
1557
1558
1559
1560
c659c38b
SA
1561/***************************************************************
1562 * tlan_handle_dummy
1563 *
1564 * Returns:
1565 * 1
1566 * Parms:
1567 * dev Device assigned the IRQ that was
1568 * raised.
1569 * host_int The contents of the HOST_INT
1570 * port.
1571 *
1572 * This function handles the Dummy interrupt, which is
1573 * raised whenever a test interrupt is generated by setting
1574 * the Req_Int bit of HOST_CMD to 1.
1575 *
1576 **************************************************************/
1da177e4 1577
c659c38b 1578static u32 tlan_handle_dummy(struct net_device *dev, u16 host_int)
1da177e4 1579{
50624aab 1580 netdev_info(dev, "Test interrupt\n");
1da177e4
LT
1581 return 1;
1582
c659c38b 1583}
1da177e4
LT
1584
1585
1586
1587
c659c38b
SA
1588/***************************************************************
1589 * tlan_handle_tx_eoc
1590 *
1591 * Returns:
1592 * 1
1593 * Parms:
1594 * dev Device assigned the IRQ that was
1595 * raised.
1596 * host_int The contents of the HOST_INT
1597 * port.
1598 *
1599 * This driver is structured to determine EOC occurrences by
1600 * reading the CSTAT member of the list structure. Tx EOC
1601 * interrupts are disabled via the DIO INTDIS register.
1602 * However, TLAN chips before revision 3.0 didn't have this
1603 * functionality, so process EOC events if this is the
1604 * case.
1605 *
1606 **************************************************************/
1da177e4 1607
c659c38b 1608static u32 tlan_handle_tx_eoc(struct net_device *dev, u16 host_int)
1da177e4 1609{
c659c38b
SA
1610 struct tlan_priv *priv = netdev_priv(dev);
1611 struct tlan_list *head_list;
1da177e4
LT
1612 dma_addr_t head_list_phys;
1613 u32 ack = 1;
6aa20a22 1614
1da177e4 1615 host_int = 0;
c659c38b
SA
1616 if (priv->tlan_rev < 0x30) {
1617 TLAN_DBG(TLAN_DEBUG_TX,
1618 "TRANSMIT: handling TX EOC (Head=%d Tail=%d) -- IRQ\n",
1619 priv->tx_head, priv->tx_tail);
1620 head_list = priv->tx_list + priv->tx_head;
1621 head_list_phys = priv->tx_list_dma
1622 + sizeof(struct tlan_list)*priv->tx_head;
f45437ef
SA
1623 if ((head_list->c_stat & TLAN_CSTAT_READY)
1624 == TLAN_CSTAT_READY) {
1da177e4 1625 netif_stop_queue(dev);
c659c38b 1626 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM);
1da177e4
LT
1627 ack |= TLAN_HC_GO;
1628 } else {
c659c38b 1629 priv->tx_in_progress = 0;
1da177e4
LT
1630 }
1631 }
1632
1633 return ack;
1634
c659c38b 1635}
1da177e4
LT
1636
1637
1638
1639
c659c38b
SA
1640/***************************************************************
1641 * tlan_handle_status_check
1642 *
1643 * Returns:
1644 * 0 if Adapter check, 1 if Network Status check.
1645 * Parms:
1646 * dev Device assigned the IRQ that was
1647 * raised.
1648 * host_int The contents of the HOST_INT
1649 * port.
1650 *
1651 * This function handles Adapter Check/Network Status
1652 * interrupts generated by the adapter. It checks the
1653 * vector in the HOST_INT register to determine if it is
1654 * an Adapter Check interrupt. If so, it resets the
1655 * adapter. Otherwise it clears the status registers
1656 * and services the PHY.
1657 *
1658 **************************************************************/
1da177e4 1659
c659c38b 1660static u32 tlan_handle_status_check(struct net_device *dev, u16 host_int)
6aa20a22 1661{
c659c38b 1662 struct tlan_priv *priv = netdev_priv(dev);
1da177e4
LT
1663 u32 ack;
1664 u32 error;
1665 u8 net_sts;
1666 u32 phy;
1667 u16 tlphy_ctl;
1668 u16 tlphy_sts;
6aa20a22 1669
1da177e4 1670 ack = 1;
c659c38b
SA
1671 if (host_int & TLAN_HI_IV_MASK) {
1672 netif_stop_queue(dev);
1673 error = inl(dev->base_addr + TLAN_CH_PARM);
50624aab 1674 netdev_info(dev, "Adaptor Error = 0x%x\n", error);
c659c38b
SA
1675 tlan_read_and_clear_stats(dev, TLAN_RECORD);
1676 outl(TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD);
1da177e4
LT
1677
1678 schedule_work(&priv->tlan_tqueue);
1679
1680 netif_wake_queue(dev);
1681 ack = 0;
1682 } else {
c659c38b
SA
1683 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Status Check\n", dev->name);
1684 phy = priv->phy[priv->phy_num];
1685
1686 net_sts = tlan_dio_read8(dev->base_addr, TLAN_NET_STS);
1687 if (net_sts) {
1688 tlan_dio_write8(dev->base_addr, TLAN_NET_STS, net_sts);
1689 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Net_Sts = %x\n",
1690 dev->name, (unsigned) net_sts);
1da177e4 1691 }
c659c38b
SA
1692 if ((net_sts & TLAN_NET_STS_MIRQ) && (priv->phy_num == 0)) {
1693 tlan_mii_read_reg(dev, phy, TLAN_TLPHY_STS, &tlphy_sts);
1694 tlan_mii_read_reg(dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl);
1695 if (!(tlphy_sts & TLAN_TS_POLOK) &&
1696 !(tlphy_ctl & TLAN_TC_SWAPOL)) {
1697 tlphy_ctl |= TLAN_TC_SWAPOL;
1698 tlan_mii_write_reg(dev, phy, TLAN_TLPHY_CTL,
1699 tlphy_ctl);
1700 } else if ((tlphy_sts & TLAN_TS_POLOK) &&
1701 (tlphy_ctl & TLAN_TC_SWAPOL)) {
1702 tlphy_ctl &= ~TLAN_TC_SWAPOL;
1703 tlan_mii_write_reg(dev, phy, TLAN_TLPHY_CTL,
1704 tlphy_ctl);
1da177e4 1705 }
c659c38b
SA
1706
1707 if (debug)
1708 tlan_phy_print(dev);
1da177e4
LT
1709 }
1710 }
1711
1712 return ack;
1713
c659c38b 1714}
1da177e4
LT
1715
1716
1717
1718
c659c38b
SA
1719/***************************************************************
1720 * tlan_handle_rx_eoc
1721 *
1722 * Returns:
1723 * 1
1724 * Parms:
1725 * dev Device assigned the IRQ that was
1726 * raised.
1727 * host_int The contents of the HOST_INT
1728 * port.
1729 *
1730 * This driver is structured to determine EOC occurrences by
1731 * reading the CSTAT member of the list structure. Rx EOC
1732 * interrupts are disabled via the DIO INTDIS register.
1733 * However, TLAN chips before revision 3.0 didn't have this
1734 * CSTAT member or a INTDIS register, so if this chip is
1735 * pre-3.0, process EOC interrupts normally.
1736 *
1737 **************************************************************/
1da177e4 1738
c659c38b 1739static u32 tlan_handle_rx_eoc(struct net_device *dev, u16 host_int)
1da177e4 1740{
c659c38b 1741 struct tlan_priv *priv = netdev_priv(dev);
1da177e4
LT
1742 dma_addr_t head_list_phys;
1743 u32 ack = 1;
1744
c659c38b
SA
1745 if (priv->tlan_rev < 0x30) {
1746 TLAN_DBG(TLAN_DEBUG_RX,
1747 "RECEIVE: Handling RX EOC (head=%d tail=%d) -- IRQ\n",
1748 priv->rx_head, priv->rx_tail);
1749 head_list_phys = priv->rx_list_dma
1750 + sizeof(struct tlan_list)*priv->rx_head;
1751 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM);
1da177e4 1752 ack |= TLAN_HC_GO | TLAN_HC_RT;
c659c38b 1753 priv->rx_eoc_count++;
1da177e4
LT
1754 }
1755
1756 return ack;
1757
c659c38b 1758}
1da177e4
LT
1759
1760
1761
1762
1763/*****************************************************************************
1764******************************************************************************
1765
c659c38b 1766ThunderLAN driver timer function
1da177e4
LT
1767
1768******************************************************************************
1769*****************************************************************************/
1770
1771
c659c38b
SA
1772/***************************************************************
1773 * tlan_timer
1774 *
1775 * Returns:
1776 * Nothing
1777 * Parms:
1778 * data A value given to add timer when
1779 * add_timer was called.
1780 *
1781 * This function handles timed functionality for the
1782 * TLAN driver. The two current timer uses are for
1783 * delaying for autonegotionation and driving the ACT LED.
1784 * - Autonegotiation requires being allowed about
1785 * 2 1/2 seconds before attempting to transmit a
1786 * packet. It would be a very bad thing to hang
1787 * the kernel this long, so the driver doesn't
1788 * allow transmission 'til after this time, for
1789 * certain PHYs. It would be much nicer if all
1790 * PHYs were interrupt-capable like the internal
1791 * PHY.
1792 * - The ACT LED, which shows adapter activity, is
1793 * driven by the driver, and so must be left on
1794 * for a short period to power up the LED so it
1795 * can be seen. This delay can be changed by
1796 * changing the TLAN_TIMER_ACT_DELAY in tlan.h,
1797 * if desired. 100 ms produces a slightly
1798 * sluggish response.
1799 *
1800 **************************************************************/
1801
1802static void tlan_timer(unsigned long data)
1da177e4
LT
1803{
1804 struct net_device *dev = (struct net_device *) data;
c659c38b 1805 struct tlan_priv *priv = netdev_priv(dev);
1da177e4
LT
1806 u32 elapsed;
1807 unsigned long flags = 0;
1808
1809 priv->timer.function = NULL;
1810
c659c38b 1811 switch (priv->timer_type) {
6aa20a22 1812#ifdef MONITOR
c659c38b
SA
1813 case TLAN_TIMER_LINK_BEAT:
1814 tlan_phy_monitor(dev);
1815 break;
1da177e4 1816#endif
c659c38b
SA
1817 case TLAN_TIMER_PHY_PDOWN:
1818 tlan_phy_power_down(dev);
1819 break;
1820 case TLAN_TIMER_PHY_PUP:
1821 tlan_phy_power_up(dev);
1822 break;
1823 case TLAN_TIMER_PHY_RESET:
1824 tlan_phy_reset(dev);
1825 break;
1826 case TLAN_TIMER_PHY_START_LINK:
1827 tlan_phy_start_link(dev);
1828 break;
1829 case TLAN_TIMER_PHY_FINISH_AN:
1830 tlan_phy_finish_auto_neg(dev);
1831 break;
1832 case TLAN_TIMER_FINISH_RESET:
1833 tlan_finish_reset(dev);
1834 break;
1835 case TLAN_TIMER_ACTIVITY:
1836 spin_lock_irqsave(&priv->lock, flags);
1837 if (priv->timer.function == NULL) {
1838 elapsed = jiffies - priv->timer_set_at;
1839 if (elapsed >= TLAN_TIMER_ACT_DELAY) {
1840 tlan_dio_write8(dev->base_addr,
1841 TLAN_LED_REG, TLAN_LED_LINK);
1842 } else {
1843 priv->timer.function = tlan_timer;
1844 priv->timer.expires = priv->timer_set_at
1845 + TLAN_TIMER_ACT_DELAY;
1846 spin_unlock_irqrestore(&priv->lock, flags);
1847 add_timer(&priv->timer);
1848 break;
1da177e4 1849 }
c659c38b
SA
1850 }
1851 spin_unlock_irqrestore(&priv->lock, flags);
1852 break;
1853 default:
1854 break;
1da177e4
LT
1855 }
1856
c659c38b 1857}
1da177e4
LT
1858
1859
1860
1861
1862/*****************************************************************************
1863******************************************************************************
1864
c659c38b 1865ThunderLAN driver adapter related routines
1da177e4
LT
1866
1867******************************************************************************
1868*****************************************************************************/
1869
1870
c659c38b
SA
1871/***************************************************************
1872 * tlan_reset_lists
1873 *
1874 * Returns:
1875 * Nothing
1876 * Parms:
1877 * dev The device structure with the list
1878 * stuctures to be reset.
1879 *
1880 * This routine sets the variables associated with managing
1881 * the TLAN lists to their initial values.
1882 *
1883 **************************************************************/
1884
1885static void tlan_reset_lists(struct net_device *dev)
1da177e4 1886{
c659c38b 1887 struct tlan_priv *priv = netdev_priv(dev);
1da177e4 1888 int i;
c659c38b 1889 struct tlan_list *list;
1da177e4
LT
1890 dma_addr_t list_phys;
1891 struct sk_buff *skb;
1da177e4 1892
c659c38b
SA
1893 priv->tx_head = 0;
1894 priv->tx_tail = 0;
1895 for (i = 0; i < TLAN_NUM_TX_LISTS; i++) {
1896 list = priv->tx_list + i;
1897 list->c_stat = TLAN_CSTAT_UNUSED;
5eeabf51 1898 list->buffer[0].address = 0;
1da177e4
LT
1899 list->buffer[2].count = 0;
1900 list->buffer[2].address = 0;
1901 list->buffer[8].address = 0;
1902 list->buffer[9].address = 0;
1903 }
1904
c659c38b
SA
1905 priv->rx_head = 0;
1906 priv->rx_tail = TLAN_NUM_RX_LISTS - 1;
1907 for (i = 0; i < TLAN_NUM_RX_LISTS; i++) {
1908 list = priv->rx_list + i;
1909 list_phys = priv->rx_list_dma + sizeof(struct tlan_list)*i;
1910 list->c_stat = TLAN_CSTAT_READY;
1911 list->frame_size = TLAN_MAX_FRAME_SIZE;
1da177e4 1912 list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER;
89d71a66 1913 skb = netdev_alloc_skb_ip_align(dev, TLAN_MAX_FRAME_SIZE + 5);
c659c38b 1914 if (!skb) {
50624aab 1915 netdev_err(dev, "Out of memory for received data\n");
5eeabf51 1916 break;
1da177e4 1917 }
5eeabf51 1918
c659c38b 1919 list->buffer[0].address = pci_map_single(priv->pci_dev,
5eeabf51
SA
1920 skb->data,
1921 TLAN_MAX_FRAME_SIZE,
1922 PCI_DMA_FROMDEVICE);
c659c38b 1923 tlan_store_skb(list, skb);
1da177e4
LT
1924 list->buffer[1].count = 0;
1925 list->buffer[1].address = 0;
c659c38b 1926 list->forward = list_phys + sizeof(struct tlan_list);
9ded65a1
SH
1927 }
1928
1929 /* in case ran out of memory early, clear bits */
1930 while (i < TLAN_NUM_RX_LISTS) {
c659c38b 1931 tlan_store_skb(priv->rx_list + i, NULL);
9ded65a1 1932 ++i;
1da177e4 1933 }
9ded65a1 1934 list->forward = 0;
1da177e4 1935
c659c38b 1936}
1da177e4
LT
1937
1938
c659c38b 1939static void tlan_free_lists(struct net_device *dev)
1da177e4 1940{
c659c38b 1941 struct tlan_priv *priv = netdev_priv(dev);
1da177e4 1942 int i;
c659c38b 1943 struct tlan_list *list;
1da177e4
LT
1944 struct sk_buff *skb;
1945
c659c38b
SA
1946 for (i = 0; i < TLAN_NUM_TX_LISTS; i++) {
1947 list = priv->tx_list + i;
1948 skb = tlan_get_skb(list);
1949 if (skb) {
5eeabf51 1950 pci_unmap_single(
c659c38b 1951 priv->pci_dev,
5eeabf51
SA
1952 list->buffer[0].address,
1953 max(skb->len,
1954 (unsigned int)TLAN_MIN_FRAME_SIZE),
1955 PCI_DMA_TODEVICE);
c659c38b 1956 dev_kfree_skb_any(skb);
5eeabf51
SA
1957 list->buffer[8].address = 0;
1958 list->buffer[9].address = 0;
1da177e4 1959 }
5eeabf51 1960 }
1da177e4 1961
c659c38b
SA
1962 for (i = 0; i < TLAN_NUM_RX_LISTS; i++) {
1963 list = priv->rx_list + i;
1964 skb = tlan_get_skb(list);
1965 if (skb) {
1966 pci_unmap_single(priv->pci_dev,
5eeabf51
SA
1967 list->buffer[0].address,
1968 TLAN_MAX_FRAME_SIZE,
1969 PCI_DMA_FROMDEVICE);
c659c38b 1970 dev_kfree_skb_any(skb);
5eeabf51
SA
1971 list->buffer[8].address = 0;
1972 list->buffer[9].address = 0;
1da177e4
LT
1973 }
1974 }
c659c38b 1975}
1da177e4
LT
1976
1977
1978
1979
c659c38b
SA
1980/***************************************************************
1981 * tlan_print_dio
1982 *
1983 * Returns:
1984 * Nothing
1985 * Parms:
1986 * io_base Base IO port of the device of
1987 * which to print DIO registers.
1988 *
1989 * This function prints out all the internal (DIO)
1990 * registers of a TLAN chip.
1991 *
1992 **************************************************************/
1da177e4 1993
c659c38b 1994static void tlan_print_dio(u16 io_base)
1da177e4
LT
1995{
1996 u32 data0, data1;
1997 int i;
1998
50624aab
JP
1999 pr_info("Contents of internal registers for io base 0x%04hx\n",
2000 io_base);
2001 pr_info("Off. +0 +4\n");
c659c38b
SA
2002 for (i = 0; i < 0x4C; i += 8) {
2003 data0 = tlan_dio_read32(io_base, i);
2004 data1 = tlan_dio_read32(io_base, i + 0x4);
50624aab 2005 pr_info("0x%02x 0x%08x 0x%08x\n", i, data0, data1);
1da177e4
LT
2006 }
2007
c659c38b 2008}
1da177e4
LT
2009
2010
2011
2012
c659c38b
SA
2013/***************************************************************
2014 * TLan_PrintList
2015 *
2016 * Returns:
2017 * Nothing
2018 * Parms:
2019 * list A pointer to the struct tlan_list structure to
2020 * be printed.
2021 * type A string to designate type of list,
2022 * "Rx" or "Tx".
2023 * num The index of the list.
2024 *
2025 * This function prints out the contents of the list
2026 * pointed to by the list parameter.
2027 *
2028 **************************************************************/
1da177e4 2029
c659c38b 2030static void tlan_print_list(struct tlan_list *list, char *type, int num)
1da177e4
LT
2031{
2032 int i;
2033
50624aab
JP
2034 pr_info("%s List %d at %p\n", type, num, list);
2035 pr_info(" Forward = 0x%08x\n", list->forward);
2036 pr_info(" CSTAT = 0x%04hx\n", list->c_stat);
2037 pr_info(" Frame Size = 0x%04hx\n", list->frame_size);
c659c38b
SA
2038 /* for (i = 0; i < 10; i++) { */
2039 for (i = 0; i < 2; i++) {
50624aab
JP
2040 pr_info(" Buffer[%d].count, addr = 0x%08x, 0x%08x\n",
2041 i, list->buffer[i].count, list->buffer[i].address);
1da177e4
LT
2042 }
2043
c659c38b 2044}
1da177e4
LT
2045
2046
2047
2048
c659c38b
SA
2049/***************************************************************
2050 * tlan_read_and_clear_stats
2051 *
2052 * Returns:
2053 * Nothing
2054 * Parms:
2055 * dev Pointer to device structure of adapter
2056 * to which to read stats.
2057 * record Flag indicating whether to add
2058 *
2059 * This functions reads all the internal status registers
2060 * of the TLAN chip, which clears them as a side effect.
2061 * It then either adds the values to the device's status
2062 * struct, or discards them, depending on whether record
2063 * is TLAN_RECORD (!=0) or TLAN_IGNORE (==0).
2064 *
2065 **************************************************************/
1da177e4 2066
c659c38b 2067static void tlan_read_and_clear_stats(struct net_device *dev, int record)
1da177e4 2068{
1da177e4
LT
2069 u32 tx_good, tx_under;
2070 u32 rx_good, rx_over;
2071 u32 def_tx, crc, code;
2072 u32 multi_col, single_col;
2073 u32 excess_col, late_col, loss;
2074
c659c38b
SA
2075 outw(TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR);
2076 tx_good = inb(dev->base_addr + TLAN_DIO_DATA);
2077 tx_good += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8;
2078 tx_good += inb(dev->base_addr + TLAN_DIO_DATA + 2) << 16;
2079 tx_under = inb(dev->base_addr + TLAN_DIO_DATA + 3);
2080
2081 outw(TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR);
2082 rx_good = inb(dev->base_addr + TLAN_DIO_DATA);
2083 rx_good += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8;
2084 rx_good += inb(dev->base_addr + TLAN_DIO_DATA + 2) << 16;
2085 rx_over = inb(dev->base_addr + TLAN_DIO_DATA + 3);
2086
2087 outw(TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR);
2088 def_tx = inb(dev->base_addr + TLAN_DIO_DATA);
2089 def_tx += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8;
2090 crc = inb(dev->base_addr + TLAN_DIO_DATA + 2);
2091 code = inb(dev->base_addr + TLAN_DIO_DATA + 3);
2092
2093 outw(TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR);
2094 multi_col = inb(dev->base_addr + TLAN_DIO_DATA);
2095 multi_col += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8;
2096 single_col = inb(dev->base_addr + TLAN_DIO_DATA + 2);
2097 single_col += inb(dev->base_addr + TLAN_DIO_DATA + 3) << 8;
2098
2099 outw(TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR);
2100 excess_col = inb(dev->base_addr + TLAN_DIO_DATA);
2101 late_col = inb(dev->base_addr + TLAN_DIO_DATA + 1);
2102 loss = inb(dev->base_addr + TLAN_DIO_DATA + 2);
2103
2104 if (record) {
f8f31544
SH
2105 dev->stats.rx_packets += rx_good;
2106 dev->stats.rx_errors += rx_over + crc + code;
2107 dev->stats.tx_packets += tx_good;
2108 dev->stats.tx_errors += tx_under + loss;
c659c38b
SA
2109 dev->stats.collisions += multi_col
2110 + single_col + excess_col + late_col;
f8f31544
SH
2111
2112 dev->stats.rx_over_errors += rx_over;
2113 dev->stats.rx_crc_errors += crc;
2114 dev->stats.rx_frame_errors += code;
2115
2116 dev->stats.tx_aborted_errors += tx_under;
2117 dev->stats.tx_carrier_errors += loss;
1da177e4 2118 }
6aa20a22 2119
c659c38b 2120}
1da177e4
LT
2121
2122
2123
2124
c659c38b
SA
2125/***************************************************************
2126 * TLan_Reset
2127 *
2128 * Returns:
2129 * 0
2130 * Parms:
2131 * dev Pointer to device structure of adapter
2132 * to be reset.
2133 *
2134 * This function resets the adapter and it's physical
2135 * device. See Chap. 3, pp. 9-10 of the "ThunderLAN
2136 * Programmer's Guide" for details. The routine tries to
2137 * implement what is detailed there, though adjustments
2138 * have been made.
2139 *
2140 **************************************************************/
1da177e4 2141
98e0f521 2142static void
c659c38b 2143tlan_reset_adapter(struct net_device *dev)
1da177e4 2144{
c659c38b 2145 struct tlan_priv *priv = netdev_priv(dev);
1da177e4
LT
2146 int i;
2147 u32 addr;
2148 u32 data;
2149 u8 data8;
2150
c659c38b
SA
2151 priv->tlan_full_duplex = false;
2152 priv->phy_online = 0;
1da177e4
LT
2153 netif_carrier_off(dev);
2154
2155/* 1. Assert reset bit. */
2156
2157 data = inl(dev->base_addr + TLAN_HOST_CMD);
2158 data |= TLAN_HC_AD_RST;
2159 outl(data, dev->base_addr + TLAN_HOST_CMD);
6aa20a22 2160
1da177e4
LT
2161 udelay(1000);
2162
c659c38b 2163/* 2. Turn off interrupts. (Probably isn't necessary) */
1da177e4
LT
2164
2165 data = inl(dev->base_addr + TLAN_HOST_CMD);
2166 data |= TLAN_HC_INT_OFF;
2167 outl(data, dev->base_addr + TLAN_HOST_CMD);
2168
2169/* 3. Clear AREGs and HASHs. */
2170
c659c38b
SA
2171 for (i = TLAN_AREG_0; i <= TLAN_HASH_2; i += 4)
2172 tlan_dio_write32(dev->base_addr, (u16) i, 0);
1da177e4
LT
2173
2174/* 4. Setup NetConfig register. */
2175
2176 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
c659c38b 2177 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, (u16) data);
1da177e4
LT
2178
2179/* 5. Load Ld_Tmr and Ld_Thr in HOST_CMD. */
2180
c659c38b
SA
2181 outl(TLAN_HC_LD_TMR | 0x3f, dev->base_addr + TLAN_HOST_CMD);
2182 outl(TLAN_HC_LD_THR | 0x9, dev->base_addr + TLAN_HOST_CMD);
1da177e4
LT
2183
2184/* 6. Unreset the MII by setting NMRST (in NetSio) to 1. */
2185
c659c38b 2186 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
1da177e4 2187 addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
c659c38b 2188 tlan_set_bit(TLAN_NET_SIO_NMRST, addr);
1da177e4
LT
2189
2190/* 7. Setup the remaining registers. */
2191
c659c38b 2192 if (priv->tlan_rev >= 0x30) {
1da177e4 2193 data8 = TLAN_ID_TX_EOC | TLAN_ID_RX_EOC;
c659c38b 2194 tlan_dio_write8(dev->base_addr, TLAN_INT_DIS, data8);
1da177e4 2195 }
c659c38b 2196 tlan_phy_detect(dev);
1da177e4 2197 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN;
6aa20a22 2198
c659c38b 2199 if (priv->adapter->flags & TLAN_ADAPTER_BIT_RATE_PHY) {
1da177e4 2200 data |= TLAN_NET_CFG_BIT;
c659c38b
SA
2201 if (priv->aui == 1) {
2202 tlan_dio_write8(dev->base_addr, TLAN_ACOMMIT, 0x0a);
2203 } else if (priv->duplex == TLAN_DUPLEX_FULL) {
2204 tlan_dio_write8(dev->base_addr, TLAN_ACOMMIT, 0x00);
2205 priv->tlan_full_duplex = true;
1da177e4 2206 } else {
c659c38b 2207 tlan_dio_write8(dev->base_addr, TLAN_ACOMMIT, 0x08);
1da177e4
LT
2208 }
2209 }
2210
c659c38b 2211 if (priv->phy_num == 0)
1da177e4 2212 data |= TLAN_NET_CFG_PHY_EN;
c659c38b 2213 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, (u16) data);
1da177e4 2214
c659c38b
SA
2215 if (priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY)
2216 tlan_finish_reset(dev);
2217 else
2218 tlan_phy_power_down(dev);
1da177e4 2219
c659c38b 2220}
1da177e4
LT
2221
2222
2223
2224
98e0f521 2225static void
c659c38b 2226tlan_finish_reset(struct net_device *dev)
1da177e4 2227{
c659c38b 2228 struct tlan_priv *priv = netdev_priv(dev);
1da177e4
LT
2229 u8 data;
2230 u32 phy;
2231 u8 sio;
2232 u16 status;
2233 u16 partner;
2234 u16 tlphy_ctl;
c659c38b 2235 u16 tlphy_par;
1da177e4 2236 u16 tlphy_id1, tlphy_id2;
c659c38b 2237 int i;
1da177e4 2238
c659c38b 2239 phy = priv->phy[priv->phy_num];
1da177e4
LT
2240
2241 data = TLAN_NET_CMD_NRESET | TLAN_NET_CMD_NWRAP;
c659c38b 2242 if (priv->tlan_full_duplex)
1da177e4 2243 data |= TLAN_NET_CMD_DUPLEX;
c659c38b 2244 tlan_dio_write8(dev->base_addr, TLAN_NET_CMD, data);
6aa20a22 2245 data = TLAN_NET_MASK_MASK4 | TLAN_NET_MASK_MASK5;
c659c38b 2246 if (priv->phy_num == 0)
6aa20a22 2247 data |= TLAN_NET_MASK_MASK7;
c659c38b
SA
2248 tlan_dio_write8(dev->base_addr, TLAN_NET_MASK, data);
2249 tlan_dio_write16(dev->base_addr, TLAN_MAX_RX, ((1536)+7)&~7);
2250 tlan_mii_read_reg(dev, phy, MII_GEN_ID_HI, &tlphy_id1);
2251 tlan_mii_read_reg(dev, phy, MII_GEN_ID_LO, &tlphy_id2);
6aa20a22 2252
c659c38b
SA
2253 if ((priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY) ||
2254 (priv->aui)) {
1da177e4 2255 status = MII_GS_LINK;
50624aab 2256 netdev_info(dev, "Link forced\n");
1da177e4 2257 } else {
c659c38b
SA
2258 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &status);
2259 udelay(1000);
2260 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &status);
2261 if ((status & MII_GS_LINK) &&
2262 /* We only support link info on Nat.Sem. PHY's */
2263 (tlphy_id1 == NAT_SEM_ID1) &&
2264 (tlphy_id2 == NAT_SEM_ID2)) {
2265 tlan_mii_read_reg(dev, phy, MII_AN_LPA, &partner);
2266 tlan_mii_read_reg(dev, phy, TLAN_TLPHY_PAR, &tlphy_par);
2267
50624aab
JP
2268 netdev_info(dev,
2269 "Link active with %s %uMbps %s-Duplex\n",
2270 !(tlphy_par & TLAN_PHY_AN_EN_STAT)
2271 ? "forced" : "Autonegotiation enabled,",
2272 tlphy_par & TLAN_PHY_SPEED_100
2273 ? 100 : 10,
2274 tlphy_par & TLAN_PHY_DUPLEX_FULL
2275 ? "Full" : "Half");
2276
2277 if (tlphy_par & TLAN_PHY_AN_EN_STAT) {
2278 netdev_info(dev, "Partner capability:");
2279 for (i = 5; i < 10; i++)
2280 if (partner & (1 << i))
2281 pr_cont(" %s", media[i-5]);
2282 pr_cont("\n");
1da177e4
LT
2283 }
2284
c659c38b
SA
2285 tlan_dio_write8(dev->base_addr, TLAN_LED_REG,
2286 TLAN_LED_LINK);
6aa20a22 2287#ifdef MONITOR
1da177e4 2288 /* We have link beat..for now anyway */
c659c38b
SA
2289 priv->link = 1;
2290 /*Enabling link beat monitoring */
2291 tlan_set_timer(dev, (10*HZ), TLAN_TIMER_LINK_BEAT);
6aa20a22 2292#endif
1da177e4 2293 } else if (status & MII_GS_LINK) {
50624aab 2294 netdev_info(dev, "Link active\n");
c659c38b
SA
2295 tlan_dio_write8(dev->base_addr, TLAN_LED_REG,
2296 TLAN_LED_LINK);
1da177e4
LT
2297 }
2298 }
2299
c659c38b
SA
2300 if (priv->phy_num == 0) {
2301 tlan_mii_read_reg(dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl);
2302 tlphy_ctl |= TLAN_TC_INTEN;
2303 tlan_mii_write_reg(dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
2304 sio = tlan_dio_read8(dev->base_addr, TLAN_NET_SIO);
2305 sio |= TLAN_NET_SIO_MINTEN;
2306 tlan_dio_write8(dev->base_addr, TLAN_NET_SIO, sio);
2307 }
2308
2309 if (status & MII_GS_LINK) {
2310 tlan_set_mac(dev, 0, dev->dev_addr);
2311 priv->phy_online = 1;
2312 outb((TLAN_HC_INT_ON >> 8), dev->base_addr + TLAN_HOST_CMD + 1);
2313 if (debug >= 1 && debug != TLAN_DEBUG_PROBE)
2314 outb((TLAN_HC_REQ_INT >> 8),
2315 dev->base_addr + TLAN_HOST_CMD + 1);
2316 outl(priv->rx_list_dma, dev->base_addr + TLAN_CH_PARM);
2317 outl(TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD);
1da177e4
LT
2318 netif_carrier_on(dev);
2319 } else {
50624aab 2320 netdev_info(dev, "Link inactive, will retry in 10 secs...\n");
c659c38b 2321 tlan_set_timer(dev, (10*HZ), TLAN_TIMER_FINISH_RESET);
1da177e4
LT
2322 return;
2323 }
c659c38b 2324 tlan_set_multicast_list(dev);
1da177e4 2325
c659c38b 2326}
1da177e4
LT
2327
2328
2329
2330
c659c38b
SA
2331/***************************************************************
2332 * tlan_set_mac
2333 *
2334 * Returns:
2335 * Nothing
2336 * Parms:
2337 * dev Pointer to device structure of adapter
2338 * on which to change the AREG.
2339 * areg The AREG to set the address in (0 - 3).
2340 * mac A pointer to an array of chars. Each
2341 * element stores one byte of the address.
2342 * IE, it isn't in ascii.
2343 *
2344 * This function transfers a MAC address to one of the
2345 * TLAN AREGs (address registers). The TLAN chip locks
2346 * the register on writing to offset 0 and unlocks the
2347 * register after writing to offset 5. If NULL is passed
2348 * in mac, then the AREG is filled with 0's.
2349 *
2350 **************************************************************/
1da177e4 2351
c659c38b 2352static void tlan_set_mac(struct net_device *dev, int areg, char *mac)
1da177e4
LT
2353{
2354 int i;
6aa20a22 2355
1da177e4
LT
2356 areg *= 6;
2357
c659c38b
SA
2358 if (mac != NULL) {
2359 for (i = 0; i < 6; i++)
2360 tlan_dio_write8(dev->base_addr,
2361 TLAN_AREG_0 + areg + i, mac[i]);
1da177e4 2362 } else {
c659c38b
SA
2363 for (i = 0; i < 6; i++)
2364 tlan_dio_write8(dev->base_addr,
2365 TLAN_AREG_0 + areg + i, 0);
1da177e4
LT
2366 }
2367
c659c38b 2368}
1da177e4
LT
2369
2370
2371
2372
2373/*****************************************************************************
2374******************************************************************************
2375
c659c38b 2376ThunderLAN driver PHY layer routines
1da177e4
LT
2377
2378******************************************************************************
2379*****************************************************************************/
2380
2381
2382
c659c38b
SA
2383/*********************************************************************
2384 * tlan_phy_print
2385 *
2386 * Returns:
2387 * Nothing
2388 * Parms:
2389 * dev A pointer to the device structure of the
2390 * TLAN device having the PHYs to be detailed.
2391 *
2392 * This function prints the registers a PHY (aka transceiver).
2393 *
2394 ********************************************************************/
1da177e4 2395
c659c38b 2396static void tlan_phy_print(struct net_device *dev)
1da177e4 2397{
c659c38b 2398 struct tlan_priv *priv = netdev_priv(dev);
1da177e4
LT
2399 u16 i, data0, data1, data2, data3, phy;
2400
c659c38b
SA
2401 phy = priv->phy[priv->phy_num];
2402
2403 if (priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY) {
50624aab 2404 netdev_info(dev, "Unmanaged PHY\n");
c659c38b 2405 } else if (phy <= TLAN_PHY_MAX_ADDR) {
50624aab
JP
2406 netdev_info(dev, "PHY 0x%02x\n", phy);
2407 pr_info(" Off. +0 +1 +2 +3\n");
c659c38b 2408 for (i = 0; i < 0x20; i += 4) {
c659c38b 2409 tlan_mii_read_reg(dev, phy, i, &data0);
c659c38b 2410 tlan_mii_read_reg(dev, phy, i + 1, &data1);
c659c38b 2411 tlan_mii_read_reg(dev, phy, i + 2, &data2);
c659c38b 2412 tlan_mii_read_reg(dev, phy, i + 3, &data3);
50624aab
JP
2413 pr_info(" 0x%02x 0x%04hx 0x%04hx 0x%04hx 0x%04hx\n",
2414 i, data0, data1, data2, data3);
1da177e4
LT
2415 }
2416 } else {
50624aab 2417 netdev_info(dev, "Invalid PHY\n");
1da177e4
LT
2418 }
2419
c659c38b 2420}
1da177e4
LT
2421
2422
2423
2424
c659c38b
SA
2425/*********************************************************************
2426 * tlan_phy_detect
2427 *
2428 * Returns:
2429 * Nothing
2430 * Parms:
2431 * dev A pointer to the device structure of the adapter
2432 * for which the PHY needs determined.
2433 *
2434 * So far I've found that adapters which have external PHYs
2435 * may also use the internal PHY for part of the functionality.
2436 * (eg, AUI/Thinnet). This function finds out if this TLAN
2437 * chip has an internal PHY, and then finds the first external
2438 * PHY (starting from address 0) if it exists).
2439 *
2440 ********************************************************************/
1da177e4 2441
c659c38b 2442static void tlan_phy_detect(struct net_device *dev)
1da177e4 2443{
c659c38b 2444 struct tlan_priv *priv = netdev_priv(dev);
1da177e4
LT
2445 u16 control;
2446 u16 hi;
2447 u16 lo;
2448 u32 phy;
2449
c659c38b
SA
2450 if (priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY) {
2451 priv->phy_num = 0xffff;
1da177e4
LT
2452 return;
2453 }
2454
c659c38b 2455 tlan_mii_read_reg(dev, TLAN_PHY_MAX_ADDR, MII_GEN_ID_HI, &hi);
6aa20a22 2456
c659c38b 2457 if (hi != 0xffff)
1da177e4 2458 priv->phy[0] = TLAN_PHY_MAX_ADDR;
c659c38b 2459 else
1da177e4 2460 priv->phy[0] = TLAN_PHY_NONE;
1da177e4
LT
2461
2462 priv->phy[1] = TLAN_PHY_NONE;
c659c38b
SA
2463 for (phy = 0; phy <= TLAN_PHY_MAX_ADDR; phy++) {
2464 tlan_mii_read_reg(dev, phy, MII_GEN_CTL, &control);
2465 tlan_mii_read_reg(dev, phy, MII_GEN_ID_HI, &hi);
2466 tlan_mii_read_reg(dev, phy, MII_GEN_ID_LO, &lo);
2467 if ((control != 0xffff) ||
2468 (hi != 0xffff) || (lo != 0xffff)) {
2469 TLAN_DBG(TLAN_DEBUG_GNRL,
2470 "PHY found at %02x %04x %04x %04x\n",
2471 phy, control, hi, lo);
2472 if ((priv->phy[1] == TLAN_PHY_NONE) &&
2473 (phy != TLAN_PHY_MAX_ADDR)) {
1da177e4
LT
2474 priv->phy[1] = phy;
2475 }
2476 }
2477 }
2478
c659c38b
SA
2479 if (priv->phy[1] != TLAN_PHY_NONE)
2480 priv->phy_num = 1;
2481 else if (priv->phy[0] != TLAN_PHY_NONE)
2482 priv->phy_num = 0;
2483 else
50624aab 2484 netdev_info(dev, "Cannot initialize device, no PHY was found!\n");
1da177e4 2485
c659c38b 2486}
1da177e4
LT
2487
2488
2489
2490
c659c38b 2491static void tlan_phy_power_down(struct net_device *dev)
1da177e4 2492{
c659c38b 2493 struct tlan_priv *priv = netdev_priv(dev);
1da177e4
LT
2494 u16 value;
2495
c659c38b 2496 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Powering down PHY(s).\n", dev->name);
1da177e4 2497 value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE;
c659c38b
SA
2498 tlan_mii_sync(dev->base_addr);
2499 tlan_mii_write_reg(dev, priv->phy[priv->phy_num], MII_GEN_CTL, value);
2500 if ((priv->phy_num == 0) &&
2501 (priv->phy[1] != TLAN_PHY_NONE) &&
2502 (!(priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10))) {
2503 tlan_mii_sync(dev->base_addr);
2504 tlan_mii_write_reg(dev, priv->phy[1], MII_GEN_CTL, value);
1da177e4
LT
2505 }
2506
2507 /* Wait for 50 ms and powerup
2508 * This is abitrary. It is intended to make sure the
2509 * transceiver settles.
2510 */
c659c38b 2511 tlan_set_timer(dev, (HZ/20), TLAN_TIMER_PHY_PUP);
1da177e4 2512
c659c38b 2513}
1da177e4
LT
2514
2515
2516
2517
c659c38b 2518static void tlan_phy_power_up(struct net_device *dev)
1da177e4 2519{
c659c38b 2520 struct tlan_priv *priv = netdev_priv(dev);
1da177e4
LT
2521 u16 value;
2522
c659c38b
SA
2523 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Powering up PHY.\n", dev->name);
2524 tlan_mii_sync(dev->base_addr);
1da177e4 2525 value = MII_GC_LOOPBK;
c659c38b
SA
2526 tlan_mii_write_reg(dev, priv->phy[priv->phy_num], MII_GEN_CTL, value);
2527 tlan_mii_sync(dev->base_addr);
1da177e4
LT
2528 /* Wait for 500 ms and reset the
2529 * transceiver. The TLAN docs say both 50 ms and
2530 * 500 ms, so do the longer, just in case.
2531 */
c659c38b 2532 tlan_set_timer(dev, (HZ/20), TLAN_TIMER_PHY_RESET);
1da177e4 2533
c659c38b 2534}
1da177e4
LT
2535
2536
2537
2538
c659c38b 2539static void tlan_phy_reset(struct net_device *dev)
1da177e4 2540{
c659c38b 2541 struct tlan_priv *priv = netdev_priv(dev);
1da177e4
LT
2542 u16 phy;
2543 u16 value;
2544
c659c38b 2545 phy = priv->phy[priv->phy_num];
1da177e4 2546
c659c38b
SA
2547 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Reseting PHY.\n", dev->name);
2548 tlan_mii_sync(dev->base_addr);
1da177e4 2549 value = MII_GC_LOOPBK | MII_GC_RESET;
c659c38b
SA
2550 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, value);
2551 tlan_mii_read_reg(dev, phy, MII_GEN_CTL, &value);
2552 while (value & MII_GC_RESET)
2553 tlan_mii_read_reg(dev, phy, MII_GEN_CTL, &value);
1da177e4
LT
2554
2555 /* Wait for 500 ms and initialize.
2556 * I don't remember why I wait this long.
2557 * I've changed this to 50ms, as it seems long enough.
2558 */
c659c38b 2559 tlan_set_timer(dev, (HZ/20), TLAN_TIMER_PHY_START_LINK);
1da177e4 2560
c659c38b 2561}
1da177e4
LT
2562
2563
2564
2565
c659c38b 2566static void tlan_phy_start_link(struct net_device *dev)
1da177e4 2567{
c659c38b 2568 struct tlan_priv *priv = netdev_priv(dev);
1da177e4
LT
2569 u16 ability;
2570 u16 control;
2571 u16 data;
2572 u16 phy;
2573 u16 status;
2574 u16 tctl;
2575
c659c38b
SA
2576 phy = priv->phy[priv->phy_num];
2577 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Trying to activate link.\n", dev->name);
2578 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &status);
2579 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &ability);
1da177e4 2580
c659c38b
SA
2581 if ((status & MII_GS_AUTONEG) &&
2582 (!priv->aui)) {
1da177e4 2583 ability = status >> 11;
c659c38b
SA
2584 if (priv->speed == TLAN_SPEED_10 &&
2585 priv->duplex == TLAN_DUPLEX_HALF) {
2586 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x0000);
2587 } else if (priv->speed == TLAN_SPEED_10 &&
2588 priv->duplex == TLAN_DUPLEX_FULL) {
2589 priv->tlan_full_duplex = true;
2590 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x0100);
2591 } else if (priv->speed == TLAN_SPEED_100 &&
2592 priv->duplex == TLAN_DUPLEX_HALF) {
2593 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x2000);
2594 } else if (priv->speed == TLAN_SPEED_100 &&
2595 priv->duplex == TLAN_DUPLEX_FULL) {
2596 priv->tlan_full_duplex = true;
2597 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x2100);
1da177e4 2598 } else {
6aa20a22 2599
1da177e4 2600 /* Set Auto-Neg advertisement */
c659c38b
SA
2601 tlan_mii_write_reg(dev, phy, MII_AN_ADV,
2602 (ability << 5) | 1);
1da177e4 2603 /* Enablee Auto-Neg */
c659c38b 2604 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x1000);
1da177e4 2605 /* Restart Auto-Neg */
c659c38b 2606 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x1200);
1da177e4 2607 /* Wait for 4 sec for autonegotiation
c659c38b
SA
2608 * to complete. The max spec time is less than this
2609 * but the card need additional time to start AN.
2610 * .5 sec should be plenty extra.
2611 */
50624aab 2612 netdev_info(dev, "Starting autonegotiation\n");
c659c38b 2613 tlan_set_timer(dev, (2*HZ), TLAN_TIMER_PHY_FINISH_AN);
1da177e4
LT
2614 return;
2615 }
6aa20a22
JG
2616
2617 }
2618
c659c38b
SA
2619 if ((priv->aui) && (priv->phy_num != 0)) {
2620 priv->phy_num = 0;
2621 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN
2622 | TLAN_NET_CFG_PHY_EN;
2623 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, data);
2624 tlan_set_timer(dev, (40*HZ/1000), TLAN_TIMER_PHY_PDOWN);
1da177e4 2625 return;
c659c38b 2626 } else if (priv->phy_num == 0) {
1da177e4 2627 control = 0;
c659c38b
SA
2628 tlan_mii_read_reg(dev, phy, TLAN_TLPHY_CTL, &tctl);
2629 if (priv->aui) {
2630 tctl |= TLAN_TC_AUISEL;
6aa20a22 2631 } else {
c659c38b
SA
2632 tctl &= ~TLAN_TC_AUISEL;
2633 if (priv->duplex == TLAN_DUPLEX_FULL) {
1da177e4 2634 control |= MII_GC_DUPLEX;
c659c38b 2635 priv->tlan_full_duplex = true;
1da177e4 2636 }
c659c38b 2637 if (priv->speed == TLAN_SPEED_100)
1da177e4 2638 control |= MII_GC_SPEEDSEL;
1da177e4 2639 }
c659c38b
SA
2640 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, control);
2641 tlan_mii_write_reg(dev, phy, TLAN_TLPHY_CTL, tctl);
1da177e4
LT
2642 }
2643
2644 /* Wait for 2 sec to give the transceiver time
2645 * to establish link.
2646 */
c659c38b 2647 tlan_set_timer(dev, (4*HZ), TLAN_TIMER_FINISH_RESET);
1da177e4 2648
c659c38b 2649}
1da177e4
LT
2650
2651
2652
2653
c659c38b 2654static void tlan_phy_finish_auto_neg(struct net_device *dev)
1da177e4 2655{
c659c38b 2656 struct tlan_priv *priv = netdev_priv(dev);
1da177e4
LT
2657 u16 an_adv;
2658 u16 an_lpa;
2659 u16 data;
2660 u16 mode;
2661 u16 phy;
2662 u16 status;
6aa20a22 2663
c659c38b 2664 phy = priv->phy[priv->phy_num];
1da177e4 2665
c659c38b
SA
2666 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &status);
2667 udelay(1000);
2668 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &status);
1da177e4 2669
c659c38b 2670 if (!(status & MII_GS_AUTOCMPLT)) {
1da177e4
LT
2671 /* Wait for 8 sec to give the process
2672 * more time. Perhaps we should fail after a while.
2673 */
c659c38b 2674 if (!priv->neg_be_verbose++) {
50624aab
JP
2675 pr_info("Giving autonegotiation more time.\n");
2676 pr_info("Please check that your adapter has\n");
2677 pr_info("been properly connected to a HUB or Switch.\n");
2678 pr_info("Trying to establish link in the background...\n");
c659c38b
SA
2679 }
2680 tlan_set_timer(dev, (8*HZ), TLAN_TIMER_PHY_FINISH_AN);
1da177e4
LT
2681 return;
2682 }
2683
50624aab 2684 netdev_info(dev, "Autonegotiation complete\n");
c659c38b
SA
2685 tlan_mii_read_reg(dev, phy, MII_AN_ADV, &an_adv);
2686 tlan_mii_read_reg(dev, phy, MII_AN_LPA, &an_lpa);
1da177e4 2687 mode = an_adv & an_lpa & 0x03E0;
c659c38b
SA
2688 if (mode & 0x0100)
2689 priv->tlan_full_duplex = true;
2690 else if (!(mode & 0x0080) && (mode & 0x0040))
2691 priv->tlan_full_duplex = true;
2692
2693 if ((!(mode & 0x0180)) &&
2694 (priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10) &&
2695 (priv->phy_num != 0)) {
2696 priv->phy_num = 0;
2697 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN
2698 | TLAN_NET_CFG_PHY_EN;
2699 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, data);
2700 tlan_set_timer(dev, (400*HZ/1000), TLAN_TIMER_PHY_PDOWN);
1da177e4
LT
2701 return;
2702 }
2703
c659c38b
SA
2704 if (priv->phy_num == 0) {
2705 if ((priv->duplex == TLAN_DUPLEX_FULL) ||
2706 (an_adv & an_lpa & 0x0040)) {
2707 tlan_mii_write_reg(dev, phy, MII_GEN_CTL,
2708 MII_GC_AUTOENB | MII_GC_DUPLEX);
50624aab 2709 netdev_info(dev, "Starting internal PHY with FULL-DUPLEX\n");
1da177e4 2710 } else {
c659c38b
SA
2711 tlan_mii_write_reg(dev, phy, MII_GEN_CTL,
2712 MII_GC_AUTOENB);
50624aab 2713 netdev_info(dev, "Starting internal PHY with HALF-DUPLEX\n");
1da177e4
LT
2714 }
2715 }
2716
2717 /* Wait for 100 ms. No reason in partiticular.
2718 */
c659c38b 2719 tlan_set_timer(dev, (HZ/10), TLAN_TIMER_FINISH_RESET);
6aa20a22 2720
c659c38b 2721}
1da177e4
LT
2722
2723#ifdef MONITOR
2724
c659c38b
SA
2725/*********************************************************************
2726 *
2727 * tlan_phy_monitor
2728 *
2729 * Returns:
2730 * None
2731 *
2732 * Params:
2733 * dev The device structure of this device.
2734 *
2735 *
2736 * This function monitors PHY condition by reading the status
2737 * register via the MII bus. This can be used to give info
2738 * about link changes (up/down), and possible switch to alternate
2739 * media.
2740 *
2741 *******************************************************************/
2742
2743void tlan_phy_monitor(struct net_device *dev)
1da177e4 2744{
c659c38b 2745 struct tlan_priv *priv = netdev_priv(dev);
1da177e4
LT
2746 u16 phy;
2747 u16 phy_status;
2748
c659c38b 2749 phy = priv->phy[priv->phy_num];
1da177e4 2750
c659c38b
SA
2751 /* Get PHY status register */
2752 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &phy_status);
1da177e4 2753
c659c38b
SA
2754 /* Check if link has been lost */
2755 if (!(phy_status & MII_GS_LINK)) {
2756 if (priv->link) {
2757 priv->link = 0;
2758 printk(KERN_DEBUG "TLAN: %s has lost link\n",
2759 dev->name);
2760 netif_carrier_off(dev);
2761 tlan_set_timer(dev, (2*HZ), TLAN_TIMER_LINK_BEAT);
2762 return;
1da177e4
LT
2763 }
2764 }
2765
c659c38b
SA
2766 /* Link restablished? */
2767 if ((phy_status & MII_GS_LINK) && !priv->link) {
2768 priv->link = 1;
2769 printk(KERN_DEBUG "TLAN: %s has reestablished link\n",
2770 dev->name);
7d17c1d6 2771 netif_carrier_on(dev);
c659c38b 2772 }
1da177e4
LT
2773
2774 /* Setup a new monitor */
c659c38b 2775 tlan_set_timer(dev, (2*HZ), TLAN_TIMER_LINK_BEAT);
6aa20a22 2776}
1da177e4
LT
2777
2778#endif /* MONITOR */
2779
2780
2781/*****************************************************************************
2782******************************************************************************
2783
c659c38b 2784ThunderLAN driver MII routines
1da177e4 2785
c659c38b
SA
2786these routines are based on the information in chap. 2 of the
2787"ThunderLAN Programmer's Guide", pp. 15-24.
1da177e4
LT
2788
2789******************************************************************************
2790*****************************************************************************/
2791
2792
c659c38b
SA
2793/***************************************************************
2794 * tlan_mii_read_reg
2795 *
2796 * Returns:
2797 * false if ack received ok
2798 * true if no ack received or other error
2799 *
2800 * Parms:
2801 * dev The device structure containing
2802 * The io address and interrupt count
2803 * for this device.
2804 * phy The address of the PHY to be queried.
2805 * reg The register whose contents are to be
2806 * retrieved.
2807 * val A pointer to a variable to store the
2808 * retrieved value.
2809 *
2810 * This function uses the TLAN's MII bus to retrieve the contents
2811 * of a given register on a PHY. It sends the appropriate info
2812 * and then reads the 16-bit register value from the MII bus via
2813 * the TLAN SIO register.
2814 *
2815 **************************************************************/
2816
2817static bool
2818tlan_mii_read_reg(struct net_device *dev, u16 phy, u16 reg, u16 *val)
1da177e4
LT
2819{
2820 u8 nack;
2821 u16 sio, tmp;
c659c38b 2822 u32 i;
37fce430 2823 bool err;
1da177e4 2824 int minten;
c659c38b 2825 struct tlan_priv *priv = netdev_priv(dev);
1da177e4
LT
2826 unsigned long flags = 0;
2827
37fce430 2828 err = false;
1da177e4
LT
2829 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
2830 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
6aa20a22 2831
1da177e4
LT
2832 if (!in_irq())
2833 spin_lock_irqsave(&priv->lock, flags);
2834
c659c38b 2835 tlan_mii_sync(dev->base_addr);
1da177e4 2836
c659c38b
SA
2837 minten = tlan_get_bit(TLAN_NET_SIO_MINTEN, sio);
2838 if (minten)
2839 tlan_clear_bit(TLAN_NET_SIO_MINTEN, sio);
1da177e4 2840
c659c38b
SA
2841 tlan_mii_send_data(dev->base_addr, 0x1, 2); /* start (01b) */
2842 tlan_mii_send_data(dev->base_addr, 0x2, 2); /* read (10b) */
2843 tlan_mii_send_data(dev->base_addr, phy, 5); /* device # */
2844 tlan_mii_send_data(dev->base_addr, reg, 5); /* register # */
1da177e4
LT
2845
2846
c659c38b 2847 tlan_clear_bit(TLAN_NET_SIO_MTXEN, sio); /* change direction */
1da177e4 2848
c659c38b
SA
2849 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio); /* clock idle bit */
2850 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
2851 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio); /* wait 300ns */
1da177e4 2852
c659c38b
SA
2853 nack = tlan_get_bit(TLAN_NET_SIO_MDATA, sio); /* check for ACK */
2854 tlan_set_bit(TLAN_NET_SIO_MCLK, sio); /* finish ACK */
2855 if (nack) { /* no ACK, so fake it */
1da177e4 2856 for (i = 0; i < 16; i++) {
c659c38b
SA
2857 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio);
2858 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
1da177e4
LT
2859 }
2860 tmp = 0xffff;
37fce430 2861 err = true;
1da177e4
LT
2862 } else { /* ACK, so read data */
2863 for (tmp = 0, i = 0x8000; i; i >>= 1) {
c659c38b
SA
2864 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio);
2865 if (tlan_get_bit(TLAN_NET_SIO_MDATA, sio))
1da177e4 2866 tmp |= i;
c659c38b 2867 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
1da177e4
LT
2868 }
2869 }
2870
2871
c659c38b
SA
2872 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio); /* idle cycle */
2873 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
1da177e4 2874
c659c38b
SA
2875 if (minten)
2876 tlan_set_bit(TLAN_NET_SIO_MINTEN, sio);
1da177e4
LT
2877
2878 *val = tmp;
6aa20a22 2879
1da177e4
LT
2880 if (!in_irq())
2881 spin_unlock_irqrestore(&priv->lock, flags);
2882
2883 return err;
2884
c659c38b 2885}
1da177e4
LT
2886
2887
2888
2889
c659c38b
SA
2890/***************************************************************
2891 * tlan_mii_send_data
2892 *
2893 * Returns:
2894 * Nothing
2895 * Parms:
2896 * base_port The base IO port of the adapter in
2897 * question.
2898 * dev The address of the PHY to be queried.
2899 * data The value to be placed on the MII bus.
2900 * num_bits The number of bits in data that are to
2901 * be placed on the MII bus.
2902 *
2903 * This function sends on sequence of bits on the MII
2904 * configuration bus.
2905 *
2906 **************************************************************/
1da177e4 2907
c659c38b 2908static void tlan_mii_send_data(u16 base_port, u32 data, unsigned num_bits)
1da177e4
LT
2909{
2910 u16 sio;
2911 u32 i;
2912
c659c38b 2913 if (num_bits == 0)
1da177e4
LT
2914 return;
2915
c659c38b 2916 outw(TLAN_NET_SIO, base_port + TLAN_DIO_ADR);
1da177e4 2917 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
c659c38b 2918 tlan_set_bit(TLAN_NET_SIO_MTXEN, sio);
1da177e4 2919
c659c38b
SA
2920 for (i = (0x1 << (num_bits - 1)); i; i >>= 1) {
2921 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio);
2922 (void) tlan_get_bit(TLAN_NET_SIO_MCLK, sio);
2923 if (data & i)
2924 tlan_set_bit(TLAN_NET_SIO_MDATA, sio);
1da177e4 2925 else
c659c38b
SA
2926 tlan_clear_bit(TLAN_NET_SIO_MDATA, sio);
2927 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
2928 (void) tlan_get_bit(TLAN_NET_SIO_MCLK, sio);
1da177e4
LT
2929 }
2930
c659c38b 2931}
1da177e4
LT
2932
2933
2934
2935
c659c38b
SA
2936/***************************************************************
2937 * TLan_MiiSync
2938 *
2939 * Returns:
2940 * Nothing
2941 * Parms:
2942 * base_port The base IO port of the adapter in
2943 * question.
2944 *
2945 * This functions syncs all PHYs in terms of the MII configuration
2946 * bus.
2947 *
2948 **************************************************************/
1da177e4 2949
c659c38b 2950static void tlan_mii_sync(u16 base_port)
1da177e4
LT
2951{
2952 int i;
2953 u16 sio;
2954
c659c38b 2955 outw(TLAN_NET_SIO, base_port + TLAN_DIO_ADR);
1da177e4
LT
2956 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
2957
c659c38b
SA
2958 tlan_clear_bit(TLAN_NET_SIO_MTXEN, sio);
2959 for (i = 0; i < 32; i++) {
2960 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio);
2961 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
1da177e4
LT
2962 }
2963
c659c38b 2964}
1da177e4
LT
2965
2966
2967
2968
c659c38b
SA
2969/***************************************************************
2970 * tlan_mii_write_reg
2971 *
2972 * Returns:
2973 * Nothing
2974 * Parms:
2975 * dev The device structure for the device
2976 * to write to.
2977 * phy The address of the PHY to be written to.
2978 * reg The register whose contents are to be
2979 * written.
2980 * val The value to be written to the register.
2981 *
2982 * This function uses the TLAN's MII bus to write the contents of a
2983 * given register on a PHY. It sends the appropriate info and then
2984 * writes the 16-bit register value from the MII configuration bus
2985 * via the TLAN SIO register.
2986 *
2987 **************************************************************/
1da177e4 2988
c659c38b
SA
2989static void
2990tlan_mii_write_reg(struct net_device *dev, u16 phy, u16 reg, u16 val)
1da177e4
LT
2991{
2992 u16 sio;
2993 int minten;
2994 unsigned long flags = 0;
c659c38b 2995 struct tlan_priv *priv = netdev_priv(dev);
1da177e4
LT
2996
2997 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
2998 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
6aa20a22 2999
1da177e4
LT
3000 if (!in_irq())
3001 spin_lock_irqsave(&priv->lock, flags);
3002
c659c38b 3003 tlan_mii_sync(dev->base_addr);
1da177e4 3004
c659c38b
SA
3005 minten = tlan_get_bit(TLAN_NET_SIO_MINTEN, sio);
3006 if (minten)
3007 tlan_clear_bit(TLAN_NET_SIO_MINTEN, sio);
1da177e4 3008
c659c38b
SA
3009 tlan_mii_send_data(dev->base_addr, 0x1, 2); /* start (01b) */
3010 tlan_mii_send_data(dev->base_addr, 0x1, 2); /* write (01b) */
3011 tlan_mii_send_data(dev->base_addr, phy, 5); /* device # */
3012 tlan_mii_send_data(dev->base_addr, reg, 5); /* register # */
1da177e4 3013
c659c38b
SA
3014 tlan_mii_send_data(dev->base_addr, 0x2, 2); /* send ACK */
3015 tlan_mii_send_data(dev->base_addr, val, 16); /* send data */
1da177e4 3016
c659c38b
SA
3017 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio); /* idle cycle */
3018 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
1da177e4 3019
c659c38b
SA
3020 if (minten)
3021 tlan_set_bit(TLAN_NET_SIO_MINTEN, sio);
6aa20a22 3022
1da177e4
LT
3023 if (!in_irq())
3024 spin_unlock_irqrestore(&priv->lock, flags);
3025
c659c38b 3026}
1da177e4
LT
3027
3028
3029
3030
3031/*****************************************************************************
3032******************************************************************************
3033
c659c38b 3034ThunderLAN driver eeprom routines
1da177e4 3035
c659c38b
SA
3036the Compaq netelligent 10 and 10/100 cards use a microchip 24C02A
3037EEPROM. these functions are based on information in microchip's
3038data sheet. I don't know how well this functions will work with
3039other Eeproms.
1da177e4
LT
3040
3041******************************************************************************
3042*****************************************************************************/
3043
3044
c659c38b
SA
3045/***************************************************************
3046 * tlan_ee_send_start
3047 *
3048 * Returns:
3049 * Nothing
3050 * Parms:
3051 * io_base The IO port base address for the
3052 * TLAN device with the EEPROM to
3053 * use.
3054 *
3055 * This function sends a start cycle to an EEPROM attached
3056 * to a TLAN chip.
3057 *
3058 **************************************************************/
3059
3060static void tlan_ee_send_start(u16 io_base)
1da177e4
LT
3061{
3062 u16 sio;
3063
c659c38b 3064 outw(TLAN_NET_SIO, io_base + TLAN_DIO_ADR);
1da177e4
LT
3065 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3066
c659c38b
SA
3067 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3068 tlan_set_bit(TLAN_NET_SIO_EDATA, sio);
3069 tlan_set_bit(TLAN_NET_SIO_ETXEN, sio);
3070 tlan_clear_bit(TLAN_NET_SIO_EDATA, sio);
3071 tlan_clear_bit(TLAN_NET_SIO_ECLOK, sio);
3072
3073}
3074
3075
3076
3077
3078/***************************************************************
3079 * tlan_ee_send_byte
3080 *
3081 * Returns:
3082 * If the correct ack was received, 0, otherwise 1
3083 * Parms: io_base The IO port base address for the
3084 * TLAN device with the EEPROM to
3085 * use.
3086 * data The 8 bits of information to
3087 * send to the EEPROM.
3088 * stop If TLAN_EEPROM_STOP is passed, a
3089 * stop cycle is sent after the
3090 * byte is sent after the ack is
3091 * read.
3092 *
3093 * This function sends a byte on the serial EEPROM line,
3094 * driving the clock to send each bit. The function then
3095 * reverses transmission direction and reads an acknowledge
3096 * bit.
3097 *
3098 **************************************************************/
3099
3100static int tlan_ee_send_byte(u16 io_base, u8 data, int stop)
1da177e4
LT
3101{
3102 int err;
3103 u8 place;
3104 u16 sio;
3105
c659c38b 3106 outw(TLAN_NET_SIO, io_base + TLAN_DIO_ADR);
1da177e4
LT
3107 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3108
3109 /* Assume clock is low, tx is enabled; */
c659c38b
SA
3110 for (place = 0x80; place != 0; place >>= 1) {
3111 if (place & data)
3112 tlan_set_bit(TLAN_NET_SIO_EDATA, sio);
1da177e4 3113 else
c659c38b
SA
3114 tlan_clear_bit(TLAN_NET_SIO_EDATA, sio);
3115 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3116 tlan_clear_bit(TLAN_NET_SIO_ECLOK, sio);
1da177e4 3117 }
c659c38b
SA
3118 tlan_clear_bit(TLAN_NET_SIO_ETXEN, sio);
3119 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3120 err = tlan_get_bit(TLAN_NET_SIO_EDATA, sio);
3121 tlan_clear_bit(TLAN_NET_SIO_ECLOK, sio);
3122 tlan_set_bit(TLAN_NET_SIO_ETXEN, sio);
1da177e4 3123
c659c38b 3124 if ((!err) && stop) {
dfc2c0a6 3125 /* STOP, raise data while clock is high */
c659c38b
SA
3126 tlan_clear_bit(TLAN_NET_SIO_EDATA, sio);
3127 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3128 tlan_set_bit(TLAN_NET_SIO_EDATA, sio);
1da177e4
LT
3129 }
3130
807540ba 3131 return err;
1da177e4 3132
c659c38b
SA
3133}
3134
3135
3136
3137
3138/***************************************************************
3139 * tlan_ee_receive_byte
3140 *
3141 * Returns:
3142 * Nothing
3143 * Parms:
3144 * io_base The IO port base address for the
3145 * TLAN device with the EEPROM to
3146 * use.
3147 * data An address to a char to hold the
3148 * data sent from the EEPROM.
3149 * stop If TLAN_EEPROM_STOP is passed, a
3150 * stop cycle is sent after the
3151 * byte is received, and no ack is
3152 * sent.
3153 *
3154 * This function receives 8 bits of data from the EEPROM
3155 * over the serial link. It then sends and ack bit, or no
3156 * ack and a stop bit. This function is used to retrieve
3157 * data after the address of a byte in the EEPROM has been
3158 * sent.
3159 *
3160 **************************************************************/
3161
3162static void tlan_ee_receive_byte(u16 io_base, u8 *data, int stop)
1da177e4
LT
3163{
3164 u8 place;
3165 u16 sio;
3166
c659c38b 3167 outw(TLAN_NET_SIO, io_base + TLAN_DIO_ADR);
1da177e4
LT
3168 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3169 *data = 0;
3170
3171 /* Assume clock is low, tx is enabled; */
c659c38b
SA
3172 tlan_clear_bit(TLAN_NET_SIO_ETXEN, sio);
3173 for (place = 0x80; place; place >>= 1) {
3174 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3175 if (tlan_get_bit(TLAN_NET_SIO_EDATA, sio))
1da177e4 3176 *data |= place;
c659c38b 3177 tlan_clear_bit(TLAN_NET_SIO_ECLOK, sio);
1da177e4
LT
3178 }
3179
c659c38b
SA
3180 tlan_set_bit(TLAN_NET_SIO_ETXEN, sio);
3181 if (!stop) {
3182 tlan_clear_bit(TLAN_NET_SIO_EDATA, sio); /* ack = 0 */
3183 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3184 tlan_clear_bit(TLAN_NET_SIO_ECLOK, sio);
1da177e4 3185 } else {
c659c38b
SA
3186 tlan_set_bit(TLAN_NET_SIO_EDATA, sio); /* no ack = 1 (?) */
3187 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3188 tlan_clear_bit(TLAN_NET_SIO_ECLOK, sio);
dfc2c0a6 3189 /* STOP, raise data while clock is high */
c659c38b
SA
3190 tlan_clear_bit(TLAN_NET_SIO_EDATA, sio);
3191 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3192 tlan_set_bit(TLAN_NET_SIO_EDATA, sio);
3193 }
3194
3195}
3196
3197
3198
3199
3200/***************************************************************
3201 * tlan_ee_read_byte
3202 *
3203 * Returns:
3204 * No error = 0, else, the stage at which the error
3205 * occurred.
3206 * Parms:
3207 * io_base The IO port base address for the
3208 * TLAN device with the EEPROM to
3209 * use.
3210 * ee_addr The address of the byte in the
3211 * EEPROM whose contents are to be
3212 * retrieved.
3213 * data An address to a char to hold the
3214 * data obtained from the EEPROM.
3215 *
3216 * This function reads a byte of information from an byte
3217 * cell in the EEPROM.
3218 *
3219 **************************************************************/
3220
3221static int tlan_ee_read_byte(struct net_device *dev, u8 ee_addr, u8 *data)
1da177e4
LT
3222{
3223 int err;
c659c38b 3224 struct tlan_priv *priv = netdev_priv(dev);
1da177e4 3225 unsigned long flags = 0;
c659c38b 3226 int ret = 0;
1da177e4
LT
3227
3228 spin_lock_irqsave(&priv->lock, flags);
3229
c659c38b
SA
3230 tlan_ee_send_start(dev->base_addr);
3231 err = tlan_ee_send_byte(dev->base_addr, 0xa0, TLAN_EEPROM_ACK);
3232 if (err) {
3233 ret = 1;
1da177e4
LT
3234 goto fail;
3235 }
c659c38b
SA
3236 err = tlan_ee_send_byte(dev->base_addr, ee_addr, TLAN_EEPROM_ACK);
3237 if (err) {
3238 ret = 2;
1da177e4
LT
3239 goto fail;
3240 }
c659c38b
SA
3241 tlan_ee_send_start(dev->base_addr);
3242 err = tlan_ee_send_byte(dev->base_addr, 0xa1, TLAN_EEPROM_ACK);
3243 if (err) {
3244 ret = 3;
1da177e4
LT
3245 goto fail;
3246 }
c659c38b 3247 tlan_ee_receive_byte(dev->base_addr, data, TLAN_EEPROM_STOP);
1da177e4
LT
3248fail:
3249 spin_unlock_irqrestore(&priv->lock, flags);
3250
3251 return ret;
3252
c659c38b 3253}
1da177e4
LT
3254
3255
3256