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0a0c72c9 DM |
1 | /* |
2 | * smc911x.c | |
3 | * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices. | |
4 | * | |
5 | * Copyright (C) 2005 Sensoria Corp | |
6 | * Derived from the unified SMC91x driver by Nicolas Pitre | |
d5498bef | 7 | * and the smsc911x.c reference driver by SMSC |
0a0c72c9 DM |
8 | * |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * Arguments: | |
24 | * watchdog = TX watchdog timeout | |
25 | * tx_fifo_kb = Size of TX FIFO in KB | |
26 | * | |
27 | * History: | |
28 | * 04/16/05 Dustin McIntire Initial version | |
29 | */ | |
30 | static const char version[] = | |
31 | "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n"; | |
32 | ||
33 | /* Debugging options */ | |
34 | #define ENABLE_SMC_DEBUG_RX 0 | |
35 | #define ENABLE_SMC_DEBUG_TX 0 | |
36 | #define ENABLE_SMC_DEBUG_DMA 0 | |
37 | #define ENABLE_SMC_DEBUG_PKTS 0 | |
38 | #define ENABLE_SMC_DEBUG_MISC 0 | |
39 | #define ENABLE_SMC_DEBUG_FUNC 0 | |
40 | ||
41 | #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0) | |
42 | #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1) | |
43 | #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2) | |
44 | #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3) | |
45 | #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4) | |
46 | #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5) | |
47 | ||
48 | #ifndef SMC_DEBUG | |
49 | #define SMC_DEBUG ( SMC_DEBUG_RX | \ | |
50 | SMC_DEBUG_TX | \ | |
51 | SMC_DEBUG_DMA | \ | |
52 | SMC_DEBUG_PKTS | \ | |
53 | SMC_DEBUG_MISC | \ | |
54 | SMC_DEBUG_FUNC \ | |
55 | ) | |
56 | #endif | |
57 | ||
0a0c72c9 DM |
58 | #include <linux/init.h> |
59 | #include <linux/module.h> | |
60 | #include <linux/kernel.h> | |
61 | #include <linux/sched.h> | |
62 | #include <linux/slab.h> | |
63 | #include <linux/delay.h> | |
64 | #include <linux/interrupt.h> | |
65 | #include <linux/errno.h> | |
66 | #include <linux/ioport.h> | |
67 | #include <linux/crc32.h> | |
68 | #include <linux/device.h> | |
69 | #include <linux/platform_device.h> | |
70 | #include <linux/spinlock.h> | |
71 | #include <linux/ethtool.h> | |
72 | #include <linux/mii.h> | |
73 | #include <linux/workqueue.h> | |
74 | ||
75 | #include <linux/netdevice.h> | |
76 | #include <linux/etherdevice.h> | |
77 | #include <linux/skbuff.h> | |
78 | ||
79 | #include <asm/io.h> | |
0a0c72c9 DM |
80 | |
81 | #include "smc911x.h" | |
82 | ||
83 | /* | |
84 | * Transmit timeout, default 5 seconds. | |
85 | */ | |
86 | static int watchdog = 5000; | |
87 | module_param(watchdog, int, 0400); | |
88 | MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds"); | |
89 | ||
90 | static int tx_fifo_kb=8; | |
91 | module_param(tx_fifo_kb, int, 0400); | |
92 | MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)"); | |
93 | ||
94 | MODULE_LICENSE("GPL"); | |
72abb461 | 95 | MODULE_ALIAS("platform:smc911x"); |
0a0c72c9 DM |
96 | |
97 | /* | |
98 | * The internal workings of the driver. If you are changing anything | |
99 | * here with the SMC stuff, you should have the datasheet and know | |
100 | * what you are doing. | |
101 | */ | |
102 | #define CARDNAME "smc911x" | |
103 | ||
104 | /* | |
105 | * Use power-down feature of the chip | |
106 | */ | |
107 | #define POWER_DOWN 1 | |
108 | ||
0a0c72c9 DM |
109 | #if SMC_DEBUG > 0 |
110 | #define DBG(n, args...) \ | |
111 | do { \ | |
112 | if (SMC_DEBUG & (n)) \ | |
113 | printk(args); \ | |
114 | } while (0) | |
115 | ||
116 | #define PRINTK(args...) printk(args) | |
117 | #else | |
118 | #define DBG(n, args...) do { } while (0) | |
119 | #define PRINTK(args...) printk(KERN_DEBUG args) | |
120 | #endif | |
121 | ||
122 | #if SMC_DEBUG_PKTS > 0 | |
123 | static void PRINT_PKT(u_char *buf, int length) | |
124 | { | |
125 | int i; | |
126 | int remainder; | |
127 | int lines; | |
128 | ||
129 | lines = length / 16; | |
130 | remainder = length % 16; | |
131 | ||
132 | for (i = 0; i < lines ; i ++) { | |
133 | int cur; | |
134 | for (cur = 0; cur < 8; cur++) { | |
135 | u_char a, b; | |
136 | a = *buf++; | |
137 | b = *buf++; | |
138 | printk("%02x%02x ", a, b); | |
139 | } | |
140 | printk("\n"); | |
141 | } | |
142 | for (i = 0; i < remainder/2 ; i++) { | |
143 | u_char a, b; | |
144 | a = *buf++; | |
145 | b = *buf++; | |
146 | printk("%02x%02x ", a, b); | |
147 | } | |
148 | printk("\n"); | |
149 | } | |
150 | #else | |
151 | #define PRINT_PKT(x...) do { } while (0) | |
152 | #endif | |
153 | ||
154 | ||
155 | /* this enables an interrupt in the interrupt mask register */ | |
699559f8 | 156 | #define SMC_ENABLE_INT(lp, x) do { \ |
0a0c72c9 DM |
157 | unsigned int __mask; \ |
158 | unsigned long __flags; \ | |
159 | spin_lock_irqsave(&lp->lock, __flags); \ | |
699559f8 | 160 | __mask = SMC_GET_INT_EN((lp)); \ |
0a0c72c9 | 161 | __mask |= (x); \ |
699559f8 | 162 | SMC_SET_INT_EN((lp), __mask); \ |
0a0c72c9 DM |
163 | spin_unlock_irqrestore(&lp->lock, __flags); \ |
164 | } while (0) | |
165 | ||
166 | /* this disables an interrupt from the interrupt mask register */ | |
699559f8 | 167 | #define SMC_DISABLE_INT(lp, x) do { \ |
0a0c72c9 DM |
168 | unsigned int __mask; \ |
169 | unsigned long __flags; \ | |
170 | spin_lock_irqsave(&lp->lock, __flags); \ | |
699559f8 | 171 | __mask = SMC_GET_INT_EN((lp)); \ |
0a0c72c9 | 172 | __mask &= ~(x); \ |
699559f8 | 173 | SMC_SET_INT_EN((lp), __mask); \ |
0a0c72c9 DM |
174 | spin_unlock_irqrestore(&lp->lock, __flags); \ |
175 | } while (0) | |
176 | ||
177 | /* | |
178 | * this does a soft reset on the device | |
179 | */ | |
180 | static void smc911x_reset(struct net_device *dev) | |
181 | { | |
0a0c72c9 DM |
182 | struct smc911x_local *lp = netdev_priv(dev); |
183 | unsigned int reg, timeout=0, resets=1; | |
184 | unsigned long flags; | |
185 | ||
186 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | |
187 | ||
188 | /* Take out of PM setting first */ | |
699559f8 | 189 | if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) { |
0a0c72c9 | 190 | /* Write to the bytetest will take out of powerdown */ |
699559f8 | 191 | SMC_SET_BYTE_TEST(lp, 0); |
0a0c72c9 DM |
192 | timeout=10; |
193 | do { | |
194 | udelay(10); | |
699559f8 | 195 | reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_; |
db2961c5 | 196 | } while (--timeout && !reg); |
0a0c72c9 DM |
197 | if (timeout == 0) { |
198 | PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name); | |
199 | return; | |
200 | } | |
201 | } | |
202 | ||
203 | /* Disable all interrupts */ | |
204 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 | 205 | SMC_SET_INT_EN(lp, 0); |
0a0c72c9 DM |
206 | spin_unlock_irqrestore(&lp->lock, flags); |
207 | ||
208 | while (resets--) { | |
699559f8 | 209 | SMC_SET_HW_CFG(lp, HW_CFG_SRST_); |
0a0c72c9 DM |
210 | timeout=10; |
211 | do { | |
212 | udelay(10); | |
699559f8 | 213 | reg = SMC_GET_HW_CFG(lp); |
0a0c72c9 DM |
214 | /* If chip indicates reset timeout then try again */ |
215 | if (reg & HW_CFG_SRST_TO_) { | |
216 | PRINTK("%s: chip reset timeout, retrying...\n", dev->name); | |
217 | resets++; | |
218 | break; | |
219 | } | |
db2961c5 | 220 | } while (--timeout && (reg & HW_CFG_SRST_)); |
0a0c72c9 DM |
221 | } |
222 | if (timeout == 0) { | |
223 | PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name); | |
224 | return; | |
225 | } | |
226 | ||
227 | /* make sure EEPROM has finished loading before setting GPIO_CFG */ | |
228 | timeout=1000; | |
699559f8 | 229 | while ( timeout-- && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_)) { |
0a0c72c9 DM |
230 | udelay(10); |
231 | } | |
232 | if (timeout == 0){ | |
233 | PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name); | |
234 | return; | |
235 | } | |
236 | ||
237 | /* Initialize interrupts */ | |
699559f8 MD |
238 | SMC_SET_INT_EN(lp, 0); |
239 | SMC_ACK_INT(lp, -1); | |
0a0c72c9 DM |
240 | |
241 | /* Reset the FIFO level and flow control settings */ | |
699559f8 | 242 | SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16); |
0a0c72c9 | 243 | //TODO: Figure out what appropriate pause time is |
699559f8 MD |
244 | SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_); |
245 | SMC_SET_AFC_CFG(lp, lp->afc_cfg); | |
0a0c72c9 DM |
246 | |
247 | ||
248 | /* Set to LED outputs */ | |
699559f8 | 249 | SMC_SET_GPIO_CFG(lp, 0x70070000); |
0a0c72c9 | 250 | |
d5498bef | 251 | /* |
0a0c72c9 | 252 | * Deassert IRQ for 1*10us for edge type interrupts |
d5498bef | 253 | * and drive IRQ pin push-pull |
0a0c72c9 | 254 | */ |
699559f8 | 255 | SMC_SET_IRQ_CFG(lp, (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_); |
0a0c72c9 DM |
256 | |
257 | /* clear anything saved */ | |
258 | if (lp->pending_tx_skb != NULL) { | |
259 | dev_kfree_skb (lp->pending_tx_skb); | |
260 | lp->pending_tx_skb = NULL; | |
09f75cd7 JG |
261 | dev->stats.tx_errors++; |
262 | dev->stats.tx_aborted_errors++; | |
0a0c72c9 DM |
263 | } |
264 | } | |
265 | ||
266 | /* | |
267 | * Enable Interrupts, Receive, and Transmit | |
268 | */ | |
269 | static void smc911x_enable(struct net_device *dev) | |
270 | { | |
0a0c72c9 DM |
271 | struct smc911x_local *lp = netdev_priv(dev); |
272 | unsigned mask, cfg, cr; | |
273 | unsigned long flags; | |
274 | ||
275 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | |
276 | ||
699559f8 | 277 | SMC_SET_MAC_ADDR(lp, dev->dev_addr); |
0a0c72c9 DM |
278 | |
279 | /* Enable TX */ | |
699559f8 | 280 | cfg = SMC_GET_HW_CFG(lp); |
0a0c72c9 DM |
281 | cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF; |
282 | cfg |= HW_CFG_SF_; | |
699559f8 MD |
283 | SMC_SET_HW_CFG(lp, cfg); |
284 | SMC_SET_FIFO_TDA(lp, 0xFF); | |
0a0c72c9 | 285 | /* Update TX stats on every 64 packets received or every 1 sec */ |
699559f8 MD |
286 | SMC_SET_FIFO_TSL(lp, 64); |
287 | SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000); | |
0a0c72c9 DM |
288 | |
289 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 | 290 | SMC_GET_MAC_CR(lp, cr); |
0a0c72c9 | 291 | cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_; |
699559f8 MD |
292 | SMC_SET_MAC_CR(lp, cr); |
293 | SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_); | |
0a0c72c9 DM |
294 | spin_unlock_irqrestore(&lp->lock, flags); |
295 | ||
296 | /* Add 2 byte padding to start of packets */ | |
699559f8 | 297 | SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_); |
0a0c72c9 DM |
298 | |
299 | /* Turn on receiver and enable RX */ | |
300 | if (cr & MAC_CR_RXEN_) | |
301 | DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name); | |
302 | ||
303 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 | 304 | SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_); |
0a0c72c9 DM |
305 | spin_unlock_irqrestore(&lp->lock, flags); |
306 | ||
307 | /* Interrupt on every received packet */ | |
699559f8 MD |
308 | SMC_SET_FIFO_RSA(lp, 0x01); |
309 | SMC_SET_FIFO_RSL(lp, 0x00); | |
0a0c72c9 DM |
310 | |
311 | /* now, enable interrupts */ | |
d5498bef JG |
312 | mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ | |
313 | INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ | | |
0a0c72c9 DM |
314 | INT_EN_PHY_INT_EN_; |
315 | if (IS_REV_A(lp->revision)) | |
316 | mask|=INT_EN_RDFL_EN_; | |
317 | else { | |
318 | mask|=INT_EN_RDFO_EN_; | |
319 | } | |
699559f8 | 320 | SMC_ENABLE_INT(lp, mask); |
0a0c72c9 DM |
321 | } |
322 | ||
323 | /* | |
324 | * this puts the device in an inactive state | |
325 | */ | |
326 | static void smc911x_shutdown(struct net_device *dev) | |
327 | { | |
0a0c72c9 DM |
328 | struct smc911x_local *lp = netdev_priv(dev); |
329 | unsigned cr; | |
330 | unsigned long flags; | |
331 | ||
332 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __FUNCTION__); | |
333 | ||
334 | /* Disable IRQ's */ | |
699559f8 | 335 | SMC_SET_INT_EN(lp, 0); |
0a0c72c9 DM |
336 | |
337 | /* Turn of Rx and TX */ | |
338 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 | 339 | SMC_GET_MAC_CR(lp, cr); |
0a0c72c9 | 340 | cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_); |
699559f8 MD |
341 | SMC_SET_MAC_CR(lp, cr); |
342 | SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_); | |
0a0c72c9 DM |
343 | spin_unlock_irqrestore(&lp->lock, flags); |
344 | } | |
345 | ||
346 | static inline void smc911x_drop_pkt(struct net_device *dev) | |
d5498bef | 347 | { |
699559f8 | 348 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
349 | unsigned int fifo_count, timeout, reg; |
350 | ||
351 | DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __FUNCTION__); | |
699559f8 | 352 | fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF; |
0a0c72c9 DM |
353 | if (fifo_count <= 4) { |
354 | /* Manually dump the packet data */ | |
355 | while (fifo_count--) | |
699559f8 | 356 | SMC_GET_RX_FIFO(lp); |
0a0c72c9 DM |
357 | } else { |
358 | /* Fast forward through the bad packet */ | |
699559f8 | 359 | SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_); |
0a0c72c9 DM |
360 | timeout=50; |
361 | do { | |
362 | udelay(10); | |
699559f8 | 363 | reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_; |
db2961c5 | 364 | } while (--timeout && reg); |
0a0c72c9 DM |
365 | if (timeout == 0) { |
366 | PRINTK("%s: timeout waiting for RX fast forward\n", dev->name); | |
367 | } | |
368 | } | |
369 | } | |
370 | ||
371 | /* | |
372 | * This is the procedure to handle the receipt of a packet. | |
373 | * It should be called after checking for packet presence in | |
d5498bef | 374 | * the RX status FIFO. It must be called with the spin lock |
0a0c72c9 DM |
375 | * already held. |
376 | */ | |
377 | static inline void smc911x_rcv(struct net_device *dev) | |
378 | { | |
699559f8 | 379 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
380 | unsigned int pkt_len, status; |
381 | struct sk_buff *skb; | |
382 | unsigned char *data; | |
383 | ||
d5498bef | 384 | DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", |
0a0c72c9 | 385 | dev->name, __FUNCTION__); |
699559f8 | 386 | status = SMC_GET_RX_STS_FIFO(lp); |
d5498bef | 387 | DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n", |
0a0c72c9 DM |
388 | dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff); |
389 | pkt_len = (status & RX_STS_PKT_LEN_) >> 16; | |
d5498bef | 390 | if (status & RX_STS_ES_) { |
0a0c72c9 | 391 | /* Deal with a bad packet */ |
09f75cd7 | 392 | dev->stats.rx_errors++; |
d5498bef | 393 | if (status & RX_STS_CRC_ERR_) |
09f75cd7 | 394 | dev->stats.rx_crc_errors++; |
0a0c72c9 DM |
395 | else { |
396 | if (status & RX_STS_LEN_ERR_) | |
09f75cd7 | 397 | dev->stats.rx_length_errors++; |
d5498bef | 398 | if (status & RX_STS_MCAST_) |
09f75cd7 | 399 | dev->stats.multicast++; |
0a0c72c9 DM |
400 | } |
401 | /* Remove the bad packet data from the RX FIFO */ | |
402 | smc911x_drop_pkt(dev); | |
403 | } else { | |
404 | /* Receive a valid packet */ | |
405 | /* Alloc a buffer with extra room for DMA alignment */ | |
406 | skb=dev_alloc_skb(pkt_len+32); | |
407 | if (unlikely(skb == NULL)) { | |
408 | PRINTK( "%s: Low memory, rcvd packet dropped.\n", | |
409 | dev->name); | |
09f75cd7 | 410 | dev->stats.rx_dropped++; |
0a0c72c9 DM |
411 | smc911x_drop_pkt(dev); |
412 | return; | |
413 | } | |
d5498bef | 414 | /* Align IP header to 32 bits |
0a0c72c9 | 415 | * Note that the device is configured to add a 2 |
d5498bef | 416 | * byte padding to the packet start, so we really |
0a0c72c9 DM |
417 | * want to write to the orignal data pointer */ |
418 | data = skb->data; | |
419 | skb_reserve(skb, 2); | |
420 | skb_put(skb,pkt_len-4); | |
421 | #ifdef SMC_USE_DMA | |
422 | { | |
423 | unsigned int fifo; | |
424 | /* Lower the FIFO threshold if possible */ | |
699559f8 | 425 | fifo = SMC_GET_FIFO_INT(lp); |
0a0c72c9 DM |
426 | if (fifo & 0xFF) fifo--; |
427 | DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n", | |
428 | dev->name, fifo & 0xff); | |
699559f8 | 429 | SMC_SET_FIFO_INT(lp, fifo); |
0a0c72c9 | 430 | /* Setup RX DMA */ |
699559f8 | 431 | SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_)); |
0a0c72c9 DM |
432 | lp->rxdma_active = 1; |
433 | lp->current_rx_skb = skb; | |
699559f8 | 434 | SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15); |
0a0c72c9 DM |
435 | /* Packet processing deferred to DMA RX interrupt */ |
436 | } | |
437 | #else | |
699559f8 MD |
438 | SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_)); |
439 | SMC_PULL_DATA(lp, data, pkt_len+2+3); | |
0a0c72c9 | 440 | |
b4cf2058 | 441 | DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name); |
0a0c72c9 DM |
442 | PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64); |
443 | dev->last_rx = jiffies; | |
0a0c72c9 DM |
444 | skb->protocol = eth_type_trans(skb, dev); |
445 | netif_rx(skb); | |
09f75cd7 JG |
446 | dev->stats.rx_packets++; |
447 | dev->stats.rx_bytes += pkt_len-4; | |
0a0c72c9 DM |
448 | #endif |
449 | } | |
450 | } | |
451 | ||
452 | /* | |
453 | * This is called to actually send a packet to the chip. | |
454 | */ | |
455 | static void smc911x_hardware_send_pkt(struct net_device *dev) | |
456 | { | |
457 | struct smc911x_local *lp = netdev_priv(dev); | |
0a0c72c9 DM |
458 | struct sk_buff *skb; |
459 | unsigned int cmdA, cmdB, len; | |
460 | unsigned char *buf; | |
461 | unsigned long flags; | |
462 | ||
463 | DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __FUNCTION__); | |
464 | BUG_ON(lp->pending_tx_skb == NULL); | |
465 | ||
466 | skb = lp->pending_tx_skb; | |
467 | lp->pending_tx_skb = NULL; | |
468 | ||
d5498bef JG |
469 | /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */ |
470 | /* cmdB {31:16] pkt tag [10:0] length */ | |
0a0c72c9 DM |
471 | #ifdef SMC_USE_DMA |
472 | /* 16 byte buffer alignment mode */ | |
473 | buf = (char*)((u32)(skb->data) & ~0xF); | |
d5498bef | 474 | len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF; |
0a0c72c9 DM |
475 | cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) | |
476 | TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ | | |
477 | skb->len; | |
478 | #else | |
479 | buf = (char*)((u32)skb->data & ~0x3); | |
d5498bef | 480 | len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3; |
0a0c72c9 DM |
481 | cmdA = (((u32)skb->data & 0x3) << 16) | |
482 | TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ | | |
483 | skb->len; | |
484 | #endif | |
d5498bef | 485 | /* tag is packet length so we can use this in stats update later */ |
0a0c72c9 | 486 | cmdB = (skb->len << 16) | (skb->len & 0x7FF); |
d5498bef | 487 | |
0a0c72c9 DM |
488 | DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n", |
489 | dev->name, len, len, buf, cmdA, cmdB); | |
699559f8 MD |
490 | SMC_SET_TX_FIFO(lp, cmdA); |
491 | SMC_SET_TX_FIFO(lp, cmdB); | |
0a0c72c9 DM |
492 | |
493 | DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name); | |
494 | PRINT_PKT(buf, len <= 64 ? len : 64); | |
495 | ||
496 | /* Send pkt via PIO or DMA */ | |
497 | #ifdef SMC_USE_DMA | |
498 | lp->current_tx_skb = skb; | |
699559f8 | 499 | SMC_PUSH_DATA(lp, buf, len); |
0a0c72c9 DM |
500 | /* DMA complete IRQ will free buffer and set jiffies */ |
501 | #else | |
699559f8 | 502 | SMC_PUSH_DATA(lp, buf, len); |
0a0c72c9 DM |
503 | dev->trans_start = jiffies; |
504 | dev_kfree_skb(skb); | |
505 | #endif | |
506 | spin_lock_irqsave(&lp->lock, flags); | |
507 | if (!lp->tx_throttle) { | |
508 | netif_wake_queue(dev); | |
509 | } | |
510 | spin_unlock_irqrestore(&lp->lock, flags); | |
699559f8 | 511 | SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_); |
0a0c72c9 DM |
512 | } |
513 | ||
514 | /* | |
515 | * Since I am not sure if I will have enough room in the chip's ram | |
516 | * to store the packet, I call this routine which either sends it | |
517 | * now, or set the card to generates an interrupt when ready | |
518 | * for the packet. | |
519 | */ | |
520 | static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) | |
521 | { | |
522 | struct smc911x_local *lp = netdev_priv(dev); | |
0a0c72c9 DM |
523 | unsigned int free; |
524 | unsigned long flags; | |
525 | ||
d5498bef | 526 | DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", |
0a0c72c9 DM |
527 | dev->name, __FUNCTION__); |
528 | ||
529 | BUG_ON(lp->pending_tx_skb != NULL); | |
530 | ||
699559f8 | 531 | free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_; |
0a0c72c9 DM |
532 | DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free); |
533 | ||
534 | /* Turn off the flow when running out of space in FIFO */ | |
535 | if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) { | |
d5498bef | 536 | DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n", |
0a0c72c9 DM |
537 | dev->name, free); |
538 | spin_lock_irqsave(&lp->lock, flags); | |
539 | /* Reenable when at least 1 packet of size MTU present */ | |
699559f8 | 540 | SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64); |
0a0c72c9 DM |
541 | lp->tx_throttle = 1; |
542 | netif_stop_queue(dev); | |
543 | spin_unlock_irqrestore(&lp->lock, flags); | |
544 | } | |
545 | ||
d5498bef | 546 | /* Drop packets when we run out of space in TX FIFO |
0a0c72c9 | 547 | * Account for overhead required for: |
d5498bef JG |
548 | * |
549 | * Tx command words 8 bytes | |
0a0c72c9 DM |
550 | * Start offset 15 bytes |
551 | * End padding 15 bytes | |
d5498bef | 552 | */ |
0a0c72c9 | 553 | if (unlikely(free < (skb->len + 8 + 15 + 15))) { |
d5498bef | 554 | printk("%s: No Tx free space %d < %d\n", |
0a0c72c9 DM |
555 | dev->name, free, skb->len); |
556 | lp->pending_tx_skb = NULL; | |
09f75cd7 JG |
557 | dev->stats.tx_errors++; |
558 | dev->stats.tx_dropped++; | |
0a0c72c9 DM |
559 | dev_kfree_skb(skb); |
560 | return 0; | |
561 | } | |
d5498bef | 562 | |
0a0c72c9 DM |
563 | #ifdef SMC_USE_DMA |
564 | { | |
565 | /* If the DMA is already running then defer this packet Tx until | |
d5498bef | 566 | * the DMA IRQ starts it |
0a0c72c9 DM |
567 | */ |
568 | spin_lock_irqsave(&lp->lock, flags); | |
569 | if (lp->txdma_active) { | |
570 | DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name); | |
571 | lp->pending_tx_skb = skb; | |
572 | netif_stop_queue(dev); | |
573 | spin_unlock_irqrestore(&lp->lock, flags); | |
574 | return 0; | |
575 | } else { | |
576 | DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name); | |
577 | lp->txdma_active = 1; | |
578 | } | |
579 | spin_unlock_irqrestore(&lp->lock, flags); | |
580 | } | |
581 | #endif | |
582 | lp->pending_tx_skb = skb; | |
583 | smc911x_hardware_send_pkt(dev); | |
584 | ||
585 | return 0; | |
586 | } | |
587 | ||
588 | /* | |
589 | * This handles a TX status interrupt, which is only called when: | |
590 | * - a TX error occurred, or | |
591 | * - TX of a packet completed. | |
592 | */ | |
593 | static void smc911x_tx(struct net_device *dev) | |
594 | { | |
0a0c72c9 DM |
595 | struct smc911x_local *lp = netdev_priv(dev); |
596 | unsigned int tx_status; | |
597 | ||
d5498bef | 598 | DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", |
0a0c72c9 DM |
599 | dev->name, __FUNCTION__); |
600 | ||
601 | /* Collect the TX status */ | |
699559f8 | 602 | while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) { |
d5498bef JG |
603 | DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n", |
604 | dev->name, | |
699559f8 MD |
605 | (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16); |
606 | tx_status = SMC_GET_TX_STS_FIFO(lp); | |
09f75cd7 JG |
607 | dev->stats.tx_packets++; |
608 | dev->stats.tx_bytes+=tx_status>>16; | |
d5498bef JG |
609 | DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n", |
610 | dev->name, (tx_status & 0xffff0000) >> 16, | |
0a0c72c9 | 611 | tx_status & 0x0000ffff); |
d5498bef | 612 | /* count Tx errors, but ignore lost carrier errors when in |
0a0c72c9 | 613 | * full-duplex mode */ |
d5498bef | 614 | if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx && |
0a0c72c9 | 615 | !(tx_status & 0x00000306))) { |
09f75cd7 | 616 | dev->stats.tx_errors++; |
0a0c72c9 DM |
617 | } |
618 | if (tx_status & TX_STS_MANY_COLL_) { | |
09f75cd7 JG |
619 | dev->stats.collisions+=16; |
620 | dev->stats.tx_aborted_errors++; | |
0a0c72c9 | 621 | } else { |
09f75cd7 | 622 | dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3; |
0a0c72c9 DM |
623 | } |
624 | /* carrier error only has meaning for half-duplex communication */ | |
d5498bef | 625 | if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) && |
0a0c72c9 | 626 | !lp->ctl_rfduplx) { |
09f75cd7 | 627 | dev->stats.tx_carrier_errors++; |
d5498bef | 628 | } |
0a0c72c9 | 629 | if (tx_status & TX_STS_LATE_COLL_) { |
09f75cd7 JG |
630 | dev->stats.collisions++; |
631 | dev->stats.tx_aborted_errors++; | |
0a0c72c9 DM |
632 | } |
633 | } | |
634 | } | |
635 | ||
636 | ||
637 | /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/ | |
638 | /* | |
639 | * Reads a register from the MII Management serial interface | |
640 | */ | |
641 | ||
642 | static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg) | |
643 | { | |
699559f8 | 644 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
645 | unsigned int phydata; |
646 | ||
699559f8 | 647 | SMC_GET_MII(lp, phyreg, phyaddr, phydata); |
0a0c72c9 DM |
648 | |
649 | DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n", | |
650 | __FUNCTION__, phyaddr, phyreg, phydata); | |
651 | return phydata; | |
652 | } | |
653 | ||
654 | ||
655 | /* | |
656 | * Writes a register to the MII Management serial interface | |
657 | */ | |
658 | static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg, | |
659 | int phydata) | |
660 | { | |
699559f8 | 661 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
662 | |
663 | DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n", | |
664 | __FUNCTION__, phyaddr, phyreg, phydata); | |
665 | ||
699559f8 | 666 | SMC_SET_MII(lp, phyreg, phyaddr, phydata); |
0a0c72c9 DM |
667 | } |
668 | ||
669 | /* | |
670 | * Finds and reports the PHY address (115 and 117 have external | |
671 | * PHY interface 118 has internal only | |
672 | */ | |
673 | static void smc911x_phy_detect(struct net_device *dev) | |
674 | { | |
0a0c72c9 DM |
675 | struct smc911x_local *lp = netdev_priv(dev); |
676 | int phyaddr; | |
677 | unsigned int cfg, id1, id2; | |
678 | ||
679 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | |
680 | ||
681 | lp->phy_type = 0; | |
682 | ||
683 | /* | |
684 | * Scan all 32 PHY addresses if necessary, starting at | |
685 | * PHY#1 to PHY#31, and then PHY#0 last. | |
686 | */ | |
687 | switch(lp->version) { | |
688 | case 0x115: | |
689 | case 0x117: | |
699559f8 | 690 | cfg = SMC_GET_HW_CFG(lp); |
0a0c72c9 DM |
691 | if (cfg & HW_CFG_EXT_PHY_DET_) { |
692 | cfg &= ~HW_CFG_PHY_CLK_SEL_; | |
693 | cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_; | |
699559f8 | 694 | SMC_SET_HW_CFG(lp, cfg); |
0a0c72c9 DM |
695 | udelay(10); /* Wait for clocks to stop */ |
696 | ||
697 | cfg |= HW_CFG_EXT_PHY_EN_; | |
699559f8 | 698 | SMC_SET_HW_CFG(lp, cfg); |
0a0c72c9 DM |
699 | udelay(10); /* Wait for clocks to stop */ |
700 | ||
701 | cfg &= ~HW_CFG_PHY_CLK_SEL_; | |
702 | cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_; | |
699559f8 | 703 | SMC_SET_HW_CFG(lp, cfg); |
0a0c72c9 DM |
704 | udelay(10); /* Wait for clocks to stop */ |
705 | ||
706 | cfg |= HW_CFG_SMI_SEL_; | |
699559f8 | 707 | SMC_SET_HW_CFG(lp, cfg); |
0a0c72c9 DM |
708 | |
709 | for (phyaddr = 1; phyaddr < 32; ++phyaddr) { | |
710 | ||
711 | /* Read the PHY identifiers */ | |
699559f8 MD |
712 | SMC_GET_PHY_ID1(lp, phyaddr & 31, id1); |
713 | SMC_GET_PHY_ID2(lp, phyaddr & 31, id2); | |
0a0c72c9 DM |
714 | |
715 | /* Make sure it is a valid identifier */ | |
d5498bef JG |
716 | if (id1 != 0x0000 && id1 != 0xffff && |
717 | id1 != 0x8000 && id2 != 0x0000 && | |
0a0c72c9 DM |
718 | id2 != 0xffff && id2 != 0x8000) { |
719 | /* Save the PHY's address */ | |
720 | lp->mii.phy_id = phyaddr & 31; | |
721 | lp->phy_type = id1 << 16 | id2; | |
722 | break; | |
723 | } | |
724 | } | |
725 | } | |
726 | default: | |
727 | /* Internal media only */ | |
699559f8 MD |
728 | SMC_GET_PHY_ID1(lp, 1, id1); |
729 | SMC_GET_PHY_ID2(lp, 1, id2); | |
0a0c72c9 DM |
730 | /* Save the PHY's address */ |
731 | lp->mii.phy_id = 1; | |
732 | lp->phy_type = id1 << 16 | id2; | |
733 | } | |
734 | ||
735 | DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n", | |
736 | dev->name, id1, id2, lp->mii.phy_id); | |
737 | } | |
738 | ||
739 | /* | |
740 | * Sets the PHY to a configuration as determined by the user. | |
741 | * Called with spin_lock held. | |
742 | */ | |
743 | static int smc911x_phy_fixed(struct net_device *dev) | |
744 | { | |
745 | struct smc911x_local *lp = netdev_priv(dev); | |
0a0c72c9 DM |
746 | int phyaddr = lp->mii.phy_id; |
747 | int bmcr; | |
748 | ||
749 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | |
750 | ||
751 | /* Enter Link Disable state */ | |
699559f8 | 752 | SMC_GET_PHY_BMCR(lp, phyaddr, bmcr); |
0a0c72c9 | 753 | bmcr |= BMCR_PDOWN; |
699559f8 | 754 | SMC_SET_PHY_BMCR(lp, phyaddr, bmcr); |
0a0c72c9 DM |
755 | |
756 | /* | |
757 | * Set our fixed capabilities | |
758 | * Disable auto-negotiation | |
759 | */ | |
760 | bmcr &= ~BMCR_ANENABLE; | |
761 | if (lp->ctl_rfduplx) | |
762 | bmcr |= BMCR_FULLDPLX; | |
763 | ||
764 | if (lp->ctl_rspeed == 100) | |
765 | bmcr |= BMCR_SPEED100; | |
766 | ||
767 | /* Write our capabilities to the phy control register */ | |
699559f8 | 768 | SMC_SET_PHY_BMCR(lp, phyaddr, bmcr); |
0a0c72c9 DM |
769 | |
770 | /* Re-Configure the Receive/Phy Control register */ | |
771 | bmcr &= ~BMCR_PDOWN; | |
699559f8 | 772 | SMC_SET_PHY_BMCR(lp, phyaddr, bmcr); |
0a0c72c9 DM |
773 | |
774 | return 1; | |
775 | } | |
776 | ||
777 | /* | |
778 | * smc911x_phy_reset - reset the phy | |
779 | * @dev: net device | |
780 | * @phy: phy address | |
781 | * | |
782 | * Issue a software reset for the specified PHY and | |
783 | * wait up to 100ms for the reset to complete. We should | |
784 | * not access the PHY for 50ms after issuing the reset. | |
785 | * | |
786 | * The time to wait appears to be dependent on the PHY. | |
787 | * | |
788 | */ | |
789 | static int smc911x_phy_reset(struct net_device *dev, int phy) | |
790 | { | |
791 | struct smc911x_local *lp = netdev_priv(dev); | |
0a0c72c9 DM |
792 | int timeout; |
793 | unsigned long flags; | |
794 | unsigned int reg; | |
795 | ||
796 | DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__); | |
797 | ||
798 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 | 799 | reg = SMC_GET_PMT_CTRL(lp); |
0a0c72c9 DM |
800 | reg &= ~0xfffff030; |
801 | reg |= PMT_CTRL_PHY_RST_; | |
699559f8 | 802 | SMC_SET_PMT_CTRL(lp, reg); |
0a0c72c9 DM |
803 | spin_unlock_irqrestore(&lp->lock, flags); |
804 | for (timeout = 2; timeout; timeout--) { | |
805 | msleep(50); | |
806 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 | 807 | reg = SMC_GET_PMT_CTRL(lp); |
0a0c72c9 DM |
808 | spin_unlock_irqrestore(&lp->lock, flags); |
809 | if (!(reg & PMT_CTRL_PHY_RST_)) { | |
d5498bef | 810 | /* extra delay required because the phy may |
0a0c72c9 | 811 | * not be completed with its reset |
d5498bef | 812 | * when PHY_BCR_RESET_ is cleared. 256us |
0a0c72c9 DM |
813 | * should suffice, but use 500us to be safe |
814 | */ | |
815 | udelay(500); | |
816 | break; | |
817 | } | |
818 | } | |
819 | ||
820 | return reg & PMT_CTRL_PHY_RST_; | |
821 | } | |
822 | ||
823 | /* | |
824 | * smc911x_phy_powerdown - powerdown phy | |
825 | * @dev: net device | |
826 | * @phy: phy address | |
827 | * | |
828 | * Power down the specified PHY | |
829 | */ | |
830 | static void smc911x_phy_powerdown(struct net_device *dev, int phy) | |
831 | { | |
699559f8 | 832 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
833 | unsigned int bmcr; |
834 | ||
835 | /* Enter Link Disable state */ | |
699559f8 | 836 | SMC_GET_PHY_BMCR(lp, phy, bmcr); |
0a0c72c9 | 837 | bmcr |= BMCR_PDOWN; |
699559f8 | 838 | SMC_SET_PHY_BMCR(lp, phy, bmcr); |
0a0c72c9 DM |
839 | } |
840 | ||
841 | /* | |
842 | * smc911x_phy_check_media - check the media status and adjust BMCR | |
843 | * @dev: net device | |
844 | * @init: set true for initialisation | |
845 | * | |
846 | * Select duplex mode depending on negotiation state. This | |
847 | * also updates our carrier state. | |
848 | */ | |
849 | static void smc911x_phy_check_media(struct net_device *dev, int init) | |
850 | { | |
851 | struct smc911x_local *lp = netdev_priv(dev); | |
0a0c72c9 DM |
852 | int phyaddr = lp->mii.phy_id; |
853 | unsigned int bmcr, cr; | |
854 | ||
855 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | |
856 | ||
857 | if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) { | |
858 | /* duplex state has changed */ | |
699559f8 MD |
859 | SMC_GET_PHY_BMCR(lp, phyaddr, bmcr); |
860 | SMC_GET_MAC_CR(lp, cr); | |
0a0c72c9 DM |
861 | if (lp->mii.full_duplex) { |
862 | DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name); | |
863 | bmcr |= BMCR_FULLDPLX; | |
864 | cr |= MAC_CR_RCVOWN_; | |
865 | } else { | |
866 | DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name); | |
867 | bmcr &= ~BMCR_FULLDPLX; | |
868 | cr &= ~MAC_CR_RCVOWN_; | |
869 | } | |
699559f8 MD |
870 | SMC_SET_PHY_BMCR(lp, phyaddr, bmcr); |
871 | SMC_SET_MAC_CR(lp, cr); | |
0a0c72c9 DM |
872 | } |
873 | } | |
874 | ||
875 | /* | |
876 | * Configures the specified PHY through the MII management interface | |
877 | * using Autonegotiation. | |
878 | * Calls smc911x_phy_fixed() if the user has requested a certain config. | |
879 | * If RPC ANEG bit is set, the media selection is dependent purely on | |
880 | * the selection by the MII (either in the MII BMCR reg or the result | |
881 | * of autonegotiation.) If the RPC ANEG bit is cleared, the selection | |
882 | * is controlled by the RPC SPEED and RPC DPLX bits. | |
883 | */ | |
ef8142a5 | 884 | static void smc911x_phy_configure(struct work_struct *work) |
0a0c72c9 | 885 | { |
ef8142a5 AM |
886 | struct smc911x_local *lp = container_of(work, struct smc911x_local, |
887 | phy_configure); | |
888 | struct net_device *dev = lp->netdev; | |
0a0c72c9 DM |
889 | int phyaddr = lp->mii.phy_id; |
890 | int my_phy_caps; /* My PHY capabilities */ | |
891 | int my_ad_caps; /* My Advertised capabilities */ | |
892 | int status; | |
893 | unsigned long flags; | |
894 | ||
895 | DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__); | |
896 | ||
897 | /* | |
898 | * We should not be called if phy_type is zero. | |
899 | */ | |
900 | if (lp->phy_type == 0) | |
4bb073c0 | 901 | return; |
0a0c72c9 DM |
902 | |
903 | if (smc911x_phy_reset(dev, phyaddr)) { | |
904 | printk("%s: PHY reset timed out\n", dev->name); | |
4bb073c0 | 905 | return; |
0a0c72c9 DM |
906 | } |
907 | spin_lock_irqsave(&lp->lock, flags); | |
908 | ||
909 | /* | |
910 | * Enable PHY Interrupts (for register 18) | |
911 | * Interrupts listed here are enabled | |
912 | */ | |
699559f8 | 913 | SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ | |
0a0c72c9 DM |
914 | PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ | |
915 | PHY_INT_MASK_LINK_DOWN_); | |
916 | ||
917 | /* If the user requested no auto neg, then go set his request */ | |
918 | if (lp->mii.force_media) { | |
919 | smc911x_phy_fixed(dev); | |
920 | goto smc911x_phy_configure_exit; | |
921 | } | |
922 | ||
923 | /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */ | |
699559f8 | 924 | SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps); |
0a0c72c9 DM |
925 | if (!(my_phy_caps & BMSR_ANEGCAPABLE)) { |
926 | printk(KERN_INFO "Auto negotiation NOT supported\n"); | |
927 | smc911x_phy_fixed(dev); | |
928 | goto smc911x_phy_configure_exit; | |
929 | } | |
930 | ||
931 | /* CSMA capable w/ both pauses */ | |
932 | my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; | |
933 | ||
934 | if (my_phy_caps & BMSR_100BASE4) | |
935 | my_ad_caps |= ADVERTISE_100BASE4; | |
936 | if (my_phy_caps & BMSR_100FULL) | |
937 | my_ad_caps |= ADVERTISE_100FULL; | |
938 | if (my_phy_caps & BMSR_100HALF) | |
939 | my_ad_caps |= ADVERTISE_100HALF; | |
940 | if (my_phy_caps & BMSR_10FULL) | |
941 | my_ad_caps |= ADVERTISE_10FULL; | |
942 | if (my_phy_caps & BMSR_10HALF) | |
943 | my_ad_caps |= ADVERTISE_10HALF; | |
944 | ||
945 | /* Disable capabilities not selected by our user */ | |
946 | if (lp->ctl_rspeed != 100) | |
947 | my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF); | |
948 | ||
949 | if (!lp->ctl_rfduplx) | |
950 | my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL); | |
951 | ||
952 | /* Update our Auto-Neg Advertisement Register */ | |
699559f8 | 953 | SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps); |
0a0c72c9 DM |
954 | lp->mii.advertising = my_ad_caps; |
955 | ||
956 | /* | |
957 | * Read the register back. Without this, it appears that when | |
958 | * auto-negotiation is restarted, sometimes it isn't ready and | |
959 | * the link does not come up. | |
960 | */ | |
961 | udelay(10); | |
699559f8 | 962 | SMC_GET_PHY_MII_ADV(lp, phyaddr, status); |
0a0c72c9 DM |
963 | |
964 | DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps); | |
965 | DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps); | |
966 | ||
967 | /* Restart auto-negotiation process in order to advertise my caps */ | |
699559f8 | 968 | SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART); |
0a0c72c9 DM |
969 | |
970 | smc911x_phy_check_media(dev, 1); | |
971 | ||
972 | smc911x_phy_configure_exit: | |
973 | spin_unlock_irqrestore(&lp->lock, flags); | |
0a0c72c9 DM |
974 | } |
975 | ||
976 | /* | |
977 | * smc911x_phy_interrupt | |
978 | * | |
979 | * Purpose: Handle interrupts relating to PHY register 18. This is | |
980 | * called from the "hard" interrupt handler under our private spinlock. | |
981 | */ | |
982 | static void smc911x_phy_interrupt(struct net_device *dev) | |
983 | { | |
984 | struct smc911x_local *lp = netdev_priv(dev); | |
0a0c72c9 DM |
985 | int phyaddr = lp->mii.phy_id; |
986 | int status; | |
987 | ||
988 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | |
989 | ||
990 | if (lp->phy_type == 0) | |
991 | return; | |
992 | ||
993 | smc911x_phy_check_media(dev, 0); | |
994 | /* read to clear status bits */ | |
699559f8 | 995 | SMC_GET_PHY_INT_SRC(lp, phyaddr,status); |
d5498bef | 996 | DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n", |
0a0c72c9 | 997 | dev->name, status & 0xffff); |
d5498bef | 998 | DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n", |
699559f8 | 999 | dev->name, SMC_GET_AFC_CFG(lp)); |
0a0c72c9 DM |
1000 | } |
1001 | ||
1002 | /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/ | |
1003 | ||
1004 | /* | |
1005 | * This is the main routine of the driver, to handle the device when | |
1006 | * it needs some attention. | |
1007 | */ | |
7d12e780 | 1008 | static irqreturn_t smc911x_interrupt(int irq, void *dev_id) |
0a0c72c9 DM |
1009 | { |
1010 | struct net_device *dev = dev_id; | |
0a0c72c9 DM |
1011 | struct smc911x_local *lp = netdev_priv(dev); |
1012 | unsigned int status, mask, timeout; | |
1013 | unsigned int rx_overrun=0, cr, pkts; | |
1014 | unsigned long flags; | |
1015 | ||
1016 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | |
1017 | ||
1018 | spin_lock_irqsave(&lp->lock, flags); | |
1019 | ||
1020 | /* Spurious interrupt check */ | |
699559f8 | 1021 | if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) != |
0a0c72c9 | 1022 | (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) { |
a4d09272 | 1023 | spin_unlock_irqrestore(&lp->lock, flags); |
0a0c72c9 DM |
1024 | return IRQ_NONE; |
1025 | } | |
1026 | ||
699559f8 MD |
1027 | mask = SMC_GET_INT_EN(lp); |
1028 | SMC_SET_INT_EN(lp, 0); | |
0a0c72c9 DM |
1029 | |
1030 | /* set a timeout value, so I don't stay here forever */ | |
1031 | timeout = 8; | |
1032 | ||
1033 | ||
1034 | do { | |
699559f8 | 1035 | status = SMC_GET_INT(lp); |
0a0c72c9 DM |
1036 | |
1037 | DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n", | |
1038 | dev->name, status, mask, status & ~mask); | |
1039 | ||
1040 | status &= mask; | |
1041 | if (!status) | |
1042 | break; | |
1043 | ||
1044 | /* Handle SW interrupt condition */ | |
1045 | if (status & INT_STS_SW_INT_) { | |
699559f8 | 1046 | SMC_ACK_INT(lp, INT_STS_SW_INT_); |
0a0c72c9 DM |
1047 | mask &= ~INT_EN_SW_INT_EN_; |
1048 | } | |
1049 | /* Handle various error conditions */ | |
1050 | if (status & INT_STS_RXE_) { | |
699559f8 | 1051 | SMC_ACK_INT(lp, INT_STS_RXE_); |
09f75cd7 | 1052 | dev->stats.rx_errors++; |
d5498bef | 1053 | } |
0a0c72c9 | 1054 | if (status & INT_STS_RXDFH_INT_) { |
699559f8 MD |
1055 | SMC_ACK_INT(lp, INT_STS_RXDFH_INT_); |
1056 | dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp); | |
0a0c72c9 DM |
1057 | } |
1058 | /* Undocumented interrupt-what is the right thing to do here? */ | |
1059 | if (status & INT_STS_RXDF_INT_) { | |
699559f8 | 1060 | SMC_ACK_INT(lp, INT_STS_RXDF_INT_); |
0a0c72c9 DM |
1061 | } |
1062 | ||
1063 | /* Rx Data FIFO exceeds set level */ | |
1064 | if (status & INT_STS_RDFL_) { | |
1065 | if (IS_REV_A(lp->revision)) { | |
1066 | rx_overrun=1; | |
699559f8 | 1067 | SMC_GET_MAC_CR(lp, cr); |
0a0c72c9 | 1068 | cr &= ~MAC_CR_RXEN_; |
699559f8 | 1069 | SMC_SET_MAC_CR(lp, cr); |
0a0c72c9 | 1070 | DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name); |
09f75cd7 JG |
1071 | dev->stats.rx_errors++; |
1072 | dev->stats.rx_fifo_errors++; | |
0a0c72c9 | 1073 | } |
699559f8 | 1074 | SMC_ACK_INT(lp, INT_STS_RDFL_); |
0a0c72c9 DM |
1075 | } |
1076 | if (status & INT_STS_RDFO_) { | |
1077 | if (!IS_REV_A(lp->revision)) { | |
699559f8 | 1078 | SMC_GET_MAC_CR(lp, cr); |
0a0c72c9 | 1079 | cr &= ~MAC_CR_RXEN_; |
699559f8 | 1080 | SMC_SET_MAC_CR(lp, cr); |
0a0c72c9 DM |
1081 | rx_overrun=1; |
1082 | DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name); | |
09f75cd7 JG |
1083 | dev->stats.rx_errors++; |
1084 | dev->stats.rx_fifo_errors++; | |
0a0c72c9 | 1085 | } |
699559f8 | 1086 | SMC_ACK_INT(lp, INT_STS_RDFO_); |
0a0c72c9 DM |
1087 | } |
1088 | /* Handle receive condition */ | |
1089 | if ((status & INT_STS_RSFL_) || rx_overrun) { | |
1090 | unsigned int fifo; | |
1091 | DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name); | |
699559f8 | 1092 | fifo = SMC_GET_RX_FIFO_INF(lp); |
d5498bef JG |
1093 | pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16; |
1094 | DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n", | |
0a0c72c9 DM |
1095 | dev->name, pkts, fifo & 0xFFFF ); |
1096 | if (pkts != 0) { | |
1097 | #ifdef SMC_USE_DMA | |
1098 | unsigned int fifo; | |
1099 | if (lp->rxdma_active){ | |
d5498bef | 1100 | DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, |
0a0c72c9 DM |
1101 | "%s: RX DMA active\n", dev->name); |
1102 | /* The DMA is already running so up the IRQ threshold */ | |
699559f8 | 1103 | fifo = SMC_GET_FIFO_INT(lp) & ~0xFF; |
0a0c72c9 | 1104 | fifo |= pkts & 0xFF; |
d5498bef | 1105 | DBG(SMC_DEBUG_RX, |
0a0c72c9 DM |
1106 | "%s: Setting RX stat FIFO threshold to %d\n", |
1107 | dev->name, fifo & 0xff); | |
699559f8 | 1108 | SMC_SET_FIFO_INT(lp, fifo); |
0a0c72c9 DM |
1109 | } else |
1110 | #endif | |
1111 | smc911x_rcv(dev); | |
1112 | } | |
699559f8 | 1113 | SMC_ACK_INT(lp, INT_STS_RSFL_); |
0a0c72c9 DM |
1114 | } |
1115 | /* Handle transmit FIFO available */ | |
1116 | if (status & INT_STS_TDFA_) { | |
1117 | DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name); | |
699559f8 | 1118 | SMC_SET_FIFO_TDA(lp, 0xFF); |
0a0c72c9 DM |
1119 | lp->tx_throttle = 0; |
1120 | #ifdef SMC_USE_DMA | |
1121 | if (!lp->txdma_active) | |
1122 | #endif | |
1123 | netif_wake_queue(dev); | |
699559f8 | 1124 | SMC_ACK_INT(lp, INT_STS_TDFA_); |
0a0c72c9 DM |
1125 | } |
1126 | /* Handle transmit done condition */ | |
1127 | #if 1 | |
1128 | if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) { | |
d5498bef JG |
1129 | DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC, |
1130 | "%s: Tx stat FIFO limit (%d) /GPT irq\n", | |
699559f8 | 1131 | dev->name, (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16); |
0a0c72c9 | 1132 | smc911x_tx(dev); |
699559f8 MD |
1133 | SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000); |
1134 | SMC_ACK_INT(lp, INT_STS_TSFL_); | |
1135 | SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_); | |
0a0c72c9 DM |
1136 | } |
1137 | #else | |
1138 | if (status & INT_STS_TSFL_) { | |
1139 | DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, ); | |
1140 | smc911x_tx(dev); | |
699559f8 | 1141 | SMC_ACK_INT(lp, INT_STS_TSFL_); |
0a0c72c9 DM |
1142 | } |
1143 | ||
1144 | if (status & INT_STS_GPT_INT_) { | |
d5498bef JG |
1145 | DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n", |
1146 | dev->name, | |
699559f8 MD |
1147 | SMC_GET_IRQ_CFG(lp), |
1148 | SMC_GET_FIFO_INT(lp), | |
1149 | SMC_GET_RX_CFG(lp)); | |
0a0c72c9 DM |
1150 | DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x " |
1151 | "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n", | |
d5498bef | 1152 | dev->name, |
699559f8 MD |
1153 | (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16, |
1154 | SMC_GET_RX_FIFO_INF(lp) & 0xffff, | |
1155 | SMC_GET_RX_STS_FIFO_PEEK(lp)); | |
1156 | SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000); | |
1157 | SMC_ACK_INT(lp, INT_STS_GPT_INT_); | |
0a0c72c9 DM |
1158 | } |
1159 | #endif | |
1160 | ||
3a4fa0a2 | 1161 | /* Handle PHY interrupt condition */ |
0a0c72c9 DM |
1162 | if (status & INT_STS_PHY_INT_) { |
1163 | DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name); | |
1164 | smc911x_phy_interrupt(dev); | |
699559f8 | 1165 | SMC_ACK_INT(lp, INT_STS_PHY_INT_); |
0a0c72c9 DM |
1166 | } |
1167 | } while (--timeout); | |
1168 | ||
1169 | /* restore mask state */ | |
699559f8 | 1170 | SMC_SET_INT_EN(lp, mask); |
0a0c72c9 | 1171 | |
d5498bef | 1172 | DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n", |
0a0c72c9 DM |
1173 | dev->name, 8-timeout); |
1174 | ||
1175 | spin_unlock_irqrestore(&lp->lock, flags); | |
1176 | ||
1177 | DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout); | |
1178 | ||
1179 | return IRQ_HANDLED; | |
1180 | } | |
1181 | ||
1182 | #ifdef SMC_USE_DMA | |
1183 | static void | |
7d12e780 | 1184 | smc911x_tx_dma_irq(int dma, void *data) |
0a0c72c9 DM |
1185 | { |
1186 | struct net_device *dev = (struct net_device *)data; | |
1187 | struct smc911x_local *lp = netdev_priv(dev); | |
1188 | struct sk_buff *skb = lp->current_tx_skb; | |
1189 | unsigned long flags; | |
1190 | ||
1191 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | |
1192 | ||
1193 | DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name); | |
1194 | /* Clear the DMA interrupt sources */ | |
1195 | SMC_DMA_ACK_IRQ(dev, dma); | |
1196 | BUG_ON(skb == NULL); | |
1197 | dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE); | |
1198 | dev->trans_start = jiffies; | |
1199 | dev_kfree_skb_irq(skb); | |
1200 | lp->current_tx_skb = NULL; | |
1201 | if (lp->pending_tx_skb != NULL) | |
1202 | smc911x_hardware_send_pkt(dev); | |
1203 | else { | |
d5498bef | 1204 | DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, |
0a0c72c9 DM |
1205 | "%s: No pending Tx packets. DMA disabled\n", dev->name); |
1206 | spin_lock_irqsave(&lp->lock, flags); | |
1207 | lp->txdma_active = 0; | |
1208 | if (!lp->tx_throttle) { | |
1209 | netif_wake_queue(dev); | |
1210 | } | |
1211 | spin_unlock_irqrestore(&lp->lock, flags); | |
1212 | } | |
1213 | ||
d5498bef | 1214 | DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, |
0a0c72c9 DM |
1215 | "%s: TX DMA irq completed\n", dev->name); |
1216 | } | |
1217 | static void | |
7d12e780 | 1218 | smc911x_rx_dma_irq(int dma, void *data) |
0a0c72c9 DM |
1219 | { |
1220 | struct net_device *dev = (struct net_device *)data; | |
1221 | unsigned long ioaddr = dev->base_addr; | |
1222 | struct smc911x_local *lp = netdev_priv(dev); | |
1223 | struct sk_buff *skb = lp->current_rx_skb; | |
1224 | unsigned long flags; | |
1225 | unsigned int pkts; | |
1226 | ||
1227 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | |
1228 | DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name); | |
1229 | /* Clear the DMA interrupt sources */ | |
1230 | SMC_DMA_ACK_IRQ(dev, dma); | |
1231 | dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE); | |
1232 | BUG_ON(skb == NULL); | |
1233 | lp->current_rx_skb = NULL; | |
1234 | PRINT_PKT(skb->data, skb->len); | |
1235 | dev->last_rx = jiffies; | |
0a0c72c9 | 1236 | skb->protocol = eth_type_trans(skb, dev); |
09f75cd7 JG |
1237 | dev->stats.rx_packets++; |
1238 | dev->stats.rx_bytes += skb->len; | |
d30f53ae | 1239 | netif_rx(skb); |
0a0c72c9 DM |
1240 | |
1241 | spin_lock_irqsave(&lp->lock, flags); | |
d5498bef | 1242 | pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16; |
0a0c72c9 DM |
1243 | if (pkts != 0) { |
1244 | smc911x_rcv(dev); | |
1245 | }else { | |
1246 | lp->rxdma_active = 0; | |
1247 | } | |
1248 | spin_unlock_irqrestore(&lp->lock, flags); | |
d5498bef JG |
1249 | DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, |
1250 | "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n", | |
0a0c72c9 DM |
1251 | dev->name, pkts); |
1252 | } | |
1253 | #endif /* SMC_USE_DMA */ | |
1254 | ||
1255 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
1256 | /* | |
1257 | * Polling receive - used by netconsole and other diagnostic tools | |
1258 | * to allow network i/o with interrupts disabled. | |
1259 | */ | |
1260 | static void smc911x_poll_controller(struct net_device *dev) | |
1261 | { | |
1262 | disable_irq(dev->irq); | |
9b6d2efe | 1263 | smc911x_interrupt(dev->irq, dev); |
0a0c72c9 DM |
1264 | enable_irq(dev->irq); |
1265 | } | |
1266 | #endif | |
1267 | ||
1268 | /* Our watchdog timed out. Called by the networking layer */ | |
1269 | static void smc911x_timeout(struct net_device *dev) | |
1270 | { | |
1271 | struct smc911x_local *lp = netdev_priv(dev); | |
0a0c72c9 DM |
1272 | int status, mask; |
1273 | unsigned long flags; | |
1274 | ||
1275 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | |
1276 | ||
1277 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 MD |
1278 | status = SMC_GET_INT(lp); |
1279 | mask = SMC_GET_INT_EN(lp); | |
0a0c72c9 DM |
1280 | spin_unlock_irqrestore(&lp->lock, flags); |
1281 | DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n", | |
1282 | dev->name, status, mask); | |
1283 | ||
1284 | /* Dump the current TX FIFO contents and restart */ | |
699559f8 MD |
1285 | mask = SMC_GET_TX_CFG(lp); |
1286 | SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_); | |
0a0c72c9 DM |
1287 | /* |
1288 | * Reconfiguring the PHY doesn't seem like a bad idea here, but | |
1289 | * smc911x_phy_configure() calls msleep() which calls schedule_timeout() | |
1290 | * which calls schedule(). Hence we use a work queue. | |
1291 | */ | |
4bb073c0 DM |
1292 | if (lp->phy_type != 0) |
1293 | schedule_work(&lp->phy_configure); | |
0a0c72c9 DM |
1294 | |
1295 | /* We can accept TX packets again */ | |
1296 | dev->trans_start = jiffies; | |
1297 | netif_wake_queue(dev); | |
1298 | } | |
1299 | ||
1300 | /* | |
1301 | * This routine will, depending on the values passed to it, | |
1302 | * either make it accept multicast packets, go into | |
1303 | * promiscuous mode (for TCPDUMP and cousins) or accept | |
1304 | * a select set of multicast packets | |
1305 | */ | |
1306 | static void smc911x_set_multicast_list(struct net_device *dev) | |
1307 | { | |
1308 | struct smc911x_local *lp = netdev_priv(dev); | |
0a0c72c9 DM |
1309 | unsigned int multicast_table[2]; |
1310 | unsigned int mcr, update_multicast = 0; | |
1311 | unsigned long flags; | |
0a0c72c9 DM |
1312 | |
1313 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | |
1314 | ||
1315 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 | 1316 | SMC_GET_MAC_CR(lp, mcr); |
0a0c72c9 DM |
1317 | spin_unlock_irqrestore(&lp->lock, flags); |
1318 | ||
1319 | if (dev->flags & IFF_PROMISC) { | |
1320 | ||
1321 | DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name); | |
1322 | mcr |= MAC_CR_PRMS_; | |
1323 | } | |
1324 | /* | |
1325 | * Here, I am setting this to accept all multicast packets. | |
1326 | * I don't need to zero the multicast table, because the flag is | |
1327 | * checked before the table is | |
1328 | */ | |
1329 | else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) { | |
1330 | DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name); | |
1331 | mcr |= MAC_CR_MCPAS_; | |
1332 | } | |
1333 | ||
1334 | /* | |
1335 | * This sets the internal hardware table to filter out unwanted | |
1336 | * multicast packets before they take up memory. | |
1337 | * | |
1338 | * The SMC chip uses a hash table where the high 6 bits of the CRC of | |
1339 | * address are the offset into the table. If that bit is 1, then the | |
1340 | * multicast packet is accepted. Otherwise, it's dropped silently. | |
1341 | * | |
1342 | * To use the 6 bits as an offset into the table, the high 1 bit is | |
1343 | * the number of the 32 bit register, while the low 5 bits are the bit | |
1344 | * within that register. | |
1345 | */ | |
1346 | else if (dev->mc_count) { | |
1347 | int i; | |
1348 | struct dev_mc_list *cur_addr; | |
1349 | ||
1350 | /* Set the Hash perfec mode */ | |
1351 | mcr |= MAC_CR_HPFILT_; | |
1352 | ||
1353 | /* start with a table of all zeros: reject all */ | |
1354 | memset(multicast_table, 0, sizeof(multicast_table)); | |
1355 | ||
1356 | cur_addr = dev->mc_list; | |
1357 | for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) { | |
7b31f7ff | 1358 | u32 position; |
0a0c72c9 DM |
1359 | |
1360 | /* do we have a pointer here? */ | |
1361 | if (!cur_addr) | |
1362 | break; | |
1363 | /* make sure this is a multicast address - | |
1364 | shouldn't this be a given if we have it here ? */ | |
1365 | if (!(*cur_addr->dmi_addr & 1)) | |
1366 | continue; | |
1367 | ||
7b31f7ff PK |
1368 | /* upper 6 bits are used as hash index */ |
1369 | position = ether_crc(ETH_ALEN, cur_addr->dmi_addr)>>26; | |
0a0c72c9 | 1370 | |
7b31f7ff | 1371 | multicast_table[position>>5] |= 1 << (position&0x1f); |
0a0c72c9 DM |
1372 | } |
1373 | ||
1374 | /* be sure I get rid of flags I might have set */ | |
1375 | mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); | |
1376 | ||
1377 | /* now, the table can be loaded into the chipset */ | |
1378 | update_multicast = 1; | |
1379 | } else { | |
d5498bef | 1380 | DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n", |
0a0c72c9 DM |
1381 | dev->name); |
1382 | mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); | |
1383 | ||
1384 | /* | |
1385 | * since I'm disabling all multicast entirely, I need to | |
1386 | * clear the multicast list | |
1387 | */ | |
1388 | memset(multicast_table, 0, sizeof(multicast_table)); | |
1389 | update_multicast = 1; | |
1390 | } | |
1391 | ||
1392 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 | 1393 | SMC_SET_MAC_CR(lp, mcr); |
0a0c72c9 | 1394 | if (update_multicast) { |
d5498bef JG |
1395 | DBG(SMC_DEBUG_MISC, |
1396 | "%s: update mcast hash table 0x%08x 0x%08x\n", | |
0a0c72c9 | 1397 | dev->name, multicast_table[0], multicast_table[1]); |
699559f8 MD |
1398 | SMC_SET_HASHL(lp, multicast_table[0]); |
1399 | SMC_SET_HASHH(lp, multicast_table[1]); | |
0a0c72c9 DM |
1400 | } |
1401 | spin_unlock_irqrestore(&lp->lock, flags); | |
1402 | } | |
1403 | ||
1404 | ||
1405 | /* | |
1406 | * Open and Initialize the board | |
1407 | * | |
1408 | * Set up everything, reset the card, etc.. | |
1409 | */ | |
1410 | static int | |
1411 | smc911x_open(struct net_device *dev) | |
1412 | { | |
ef8142a5 AM |
1413 | struct smc911x_local *lp = netdev_priv(dev); |
1414 | ||
0a0c72c9 DM |
1415 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); |
1416 | ||
1417 | /* | |
1418 | * Check that the address is valid. If its not, refuse | |
1419 | * to bring the device up. The user must specify an | |
1420 | * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx | |
1421 | */ | |
1422 | if (!is_valid_ether_addr(dev->dev_addr)) { | |
1423 | PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__); | |
1424 | return -EINVAL; | |
1425 | } | |
1426 | ||
1427 | /* reset the hardware */ | |
1428 | smc911x_reset(dev); | |
1429 | ||
1430 | /* Configure the PHY, initialize the link state */ | |
ef8142a5 | 1431 | smc911x_phy_configure(&lp->phy_configure); |
0a0c72c9 DM |
1432 | |
1433 | /* Turn on Tx + Rx */ | |
1434 | smc911x_enable(dev); | |
1435 | ||
1436 | netif_start_queue(dev); | |
1437 | ||
1438 | return 0; | |
1439 | } | |
1440 | ||
1441 | /* | |
1442 | * smc911x_close | |
1443 | * | |
1444 | * this makes the board clean up everything that it can | |
1445 | * and not talk to the outside world. Caused by | |
1446 | * an 'ifconfig ethX down' | |
1447 | */ | |
1448 | static int smc911x_close(struct net_device *dev) | |
1449 | { | |
1450 | struct smc911x_local *lp = netdev_priv(dev); | |
1451 | ||
1452 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | |
1453 | ||
1454 | netif_stop_queue(dev); | |
1455 | netif_carrier_off(dev); | |
1456 | ||
1457 | /* clear everything */ | |
1458 | smc911x_shutdown(dev); | |
1459 | ||
1460 | if (lp->phy_type != 0) { | |
1461 | /* We need to ensure that no calls to | |
1462 | * smc911x_phy_configure are pending. | |
0a0c72c9 | 1463 | */ |
4bb073c0 | 1464 | cancel_work_sync(&lp->phy_configure); |
0a0c72c9 DM |
1465 | smc911x_phy_powerdown(dev, lp->mii.phy_id); |
1466 | } | |
1467 | ||
1468 | if (lp->pending_tx_skb) { | |
1469 | dev_kfree_skb(lp->pending_tx_skb); | |
1470 | lp->pending_tx_skb = NULL; | |
1471 | } | |
1472 | ||
1473 | return 0; | |
1474 | } | |
1475 | ||
0a0c72c9 DM |
1476 | /* |
1477 | * Ethtool support | |
1478 | */ | |
1479 | static int | |
1480 | smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd) | |
1481 | { | |
1482 | struct smc911x_local *lp = netdev_priv(dev); | |
0a0c72c9 DM |
1483 | int ret, status; |
1484 | unsigned long flags; | |
1485 | ||
1486 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | |
1487 | cmd->maxtxpkt = 1; | |
1488 | cmd->maxrxpkt = 1; | |
1489 | ||
1490 | if (lp->phy_type != 0) { | |
1491 | spin_lock_irqsave(&lp->lock, flags); | |
1492 | ret = mii_ethtool_gset(&lp->mii, cmd); | |
1493 | spin_unlock_irqrestore(&lp->lock, flags); | |
1494 | } else { | |
1495 | cmd->supported = SUPPORTED_10baseT_Half | | |
1496 | SUPPORTED_10baseT_Full | | |
1497 | SUPPORTED_TP | SUPPORTED_AUI; | |
1498 | ||
1499 | if (lp->ctl_rspeed == 10) | |
1500 | cmd->speed = SPEED_10; | |
1501 | else if (lp->ctl_rspeed == 100) | |
1502 | cmd->speed = SPEED_100; | |
1503 | ||
1504 | cmd->autoneg = AUTONEG_DISABLE; | |
1505 | if (lp->mii.phy_id==1) | |
1506 | cmd->transceiver = XCVR_INTERNAL; | |
1507 | else | |
1508 | cmd->transceiver = XCVR_EXTERNAL; | |
1509 | cmd->port = 0; | |
699559f8 | 1510 | SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status); |
d5498bef JG |
1511 | cmd->duplex = |
1512 | (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ? | |
0a0c72c9 DM |
1513 | DUPLEX_FULL : DUPLEX_HALF; |
1514 | ret = 0; | |
1515 | } | |
1516 | ||
1517 | return ret; | |
1518 | } | |
1519 | ||
1520 | static int | |
1521 | smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd) | |
1522 | { | |
1523 | struct smc911x_local *lp = netdev_priv(dev); | |
1524 | int ret; | |
1525 | unsigned long flags; | |
1526 | ||
1527 | if (lp->phy_type != 0) { | |
1528 | spin_lock_irqsave(&lp->lock, flags); | |
1529 | ret = mii_ethtool_sset(&lp->mii, cmd); | |
1530 | spin_unlock_irqrestore(&lp->lock, flags); | |
1531 | } else { | |
1532 | if (cmd->autoneg != AUTONEG_DISABLE || | |
1533 | cmd->speed != SPEED_10 || | |
1534 | (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) || | |
1535 | (cmd->port != PORT_TP && cmd->port != PORT_AUI)) | |
1536 | return -EINVAL; | |
1537 | ||
1538 | lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL; | |
1539 | ||
1540 | ret = 0; | |
1541 | } | |
1542 | ||
1543 | return ret; | |
1544 | } | |
1545 | ||
1546 | static void | |
1547 | smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info) | |
1548 | { | |
1549 | strncpy(info->driver, CARDNAME, sizeof(info->driver)); | |
1550 | strncpy(info->version, version, sizeof(info->version)); | |
43cb76d9 | 1551 | strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info)); |
0a0c72c9 DM |
1552 | } |
1553 | ||
1554 | static int smc911x_ethtool_nwayreset(struct net_device *dev) | |
1555 | { | |
1556 | struct smc911x_local *lp = netdev_priv(dev); | |
1557 | int ret = -EINVAL; | |
1558 | unsigned long flags; | |
1559 | ||
1560 | if (lp->phy_type != 0) { | |
1561 | spin_lock_irqsave(&lp->lock, flags); | |
1562 | ret = mii_nway_restart(&lp->mii); | |
1563 | spin_unlock_irqrestore(&lp->lock, flags); | |
1564 | } | |
1565 | ||
1566 | return ret; | |
1567 | } | |
1568 | ||
1569 | static u32 smc911x_ethtool_getmsglevel(struct net_device *dev) | |
1570 | { | |
1571 | struct smc911x_local *lp = netdev_priv(dev); | |
1572 | return lp->msg_enable; | |
1573 | } | |
1574 | ||
1575 | static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level) | |
1576 | { | |
1577 | struct smc911x_local *lp = netdev_priv(dev); | |
1578 | lp->msg_enable = level; | |
1579 | } | |
1580 | ||
1581 | static int smc911x_ethtool_getregslen(struct net_device *dev) | |
1582 | { | |
1583 | /* System regs + MAC regs + PHY regs */ | |
d5498bef JG |
1584 | return (((E2P_CMD - ID_REV)/4 + 1) + |
1585 | (WUCSR - MAC_CR)+1 + 32) * sizeof(u32); | |
0a0c72c9 DM |
1586 | } |
1587 | ||
d5498bef | 1588 | static void smc911x_ethtool_getregs(struct net_device *dev, |
0a0c72c9 DM |
1589 | struct ethtool_regs* regs, void *buf) |
1590 | { | |
0a0c72c9 DM |
1591 | struct smc911x_local *lp = netdev_priv(dev); |
1592 | unsigned long flags; | |
1593 | u32 reg,i,j=0; | |
1594 | u32 *data = (u32*)buf; | |
1595 | ||
1596 | regs->version = lp->version; | |
1597 | for(i=ID_REV;i<=E2P_CMD;i+=4) { | |
699559f8 | 1598 | data[j++] = SMC_inl(lp, i); |
0a0c72c9 DM |
1599 | } |
1600 | for(i=MAC_CR;i<=WUCSR;i++) { | |
1601 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 | 1602 | SMC_GET_MAC_CSR(lp, i, reg); |
0a0c72c9 | 1603 | spin_unlock_irqrestore(&lp->lock, flags); |
d5498bef | 1604 | data[j++] = reg; |
0a0c72c9 DM |
1605 | } |
1606 | for(i=0;i<=31;i++) { | |
1607 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 | 1608 | SMC_GET_MII(lp, i, lp->mii.phy_id, reg); |
0a0c72c9 | 1609 | spin_unlock_irqrestore(&lp->lock, flags); |
d5498bef | 1610 | data[j++] = reg & 0xFFFF; |
0a0c72c9 DM |
1611 | } |
1612 | } | |
1613 | ||
1614 | static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev) | |
1615 | { | |
699559f8 | 1616 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
1617 | unsigned int timeout; |
1618 | int e2p_cmd; | |
1619 | ||
699559f8 | 1620 | e2p_cmd = SMC_GET_E2P_CMD(lp); |
0a0c72c9 DM |
1621 | for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) { |
1622 | if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) { | |
d5498bef | 1623 | PRINTK("%s: %s timeout waiting for EEPROM to respond\n", |
0a0c72c9 DM |
1624 | dev->name, __FUNCTION__); |
1625 | return -EFAULT; | |
d5498bef | 1626 | } |
0a0c72c9 | 1627 | mdelay(1); |
699559f8 | 1628 | e2p_cmd = SMC_GET_E2P_CMD(lp); |
0a0c72c9 DM |
1629 | } |
1630 | if (timeout == 0) { | |
d5498bef | 1631 | PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n", |
0a0c72c9 DM |
1632 | dev->name, __FUNCTION__); |
1633 | return -ETIMEDOUT; | |
1634 | } | |
1635 | return 0; | |
1636 | } | |
1637 | ||
d5498bef | 1638 | static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev, |
0a0c72c9 DM |
1639 | int cmd, int addr) |
1640 | { | |
699559f8 | 1641 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
1642 | int ret; |
1643 | ||
d5498bef | 1644 | if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0) |
0a0c72c9 | 1645 | return ret; |
699559f8 | 1646 | SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ | |
d5498bef | 1647 | ((cmd) & (0x7<<28)) | |
0a0c72c9 DM |
1648 | ((addr) & 0xFF)); |
1649 | return 0; | |
1650 | } | |
1651 | ||
d5498bef | 1652 | static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev, |
0a0c72c9 DM |
1653 | u8 *data) |
1654 | { | |
699559f8 | 1655 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
1656 | int ret; |
1657 | ||
d5498bef | 1658 | if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0) |
0a0c72c9 | 1659 | return ret; |
699559f8 | 1660 | *data = SMC_GET_E2P_DATA(lp); |
0a0c72c9 DM |
1661 | return 0; |
1662 | } | |
1663 | ||
d5498bef | 1664 | static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev, |
0a0c72c9 DM |
1665 | u8 data) |
1666 | { | |
699559f8 | 1667 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
1668 | int ret; |
1669 | ||
d5498bef | 1670 | if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0) |
0a0c72c9 | 1671 | return ret; |
699559f8 | 1672 | SMC_SET_E2P_DATA(lp, data); |
0a0c72c9 DM |
1673 | return 0; |
1674 | } | |
1675 | ||
d5498bef | 1676 | static int smc911x_ethtool_geteeprom(struct net_device *dev, |
0a0c72c9 DM |
1677 | struct ethtool_eeprom *eeprom, u8 *data) |
1678 | { | |
1679 | u8 eebuf[SMC911X_EEPROM_LEN]; | |
1680 | int i, ret; | |
1681 | ||
1682 | for(i=0;i<SMC911X_EEPROM_LEN;i++) { | |
1683 | if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0) | |
1684 | return ret; | |
1685 | if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0) | |
1686 | return ret; | |
1687 | } | |
1688 | memcpy(data, eebuf+eeprom->offset, eeprom->len); | |
d5498bef | 1689 | return 0; |
0a0c72c9 DM |
1690 | } |
1691 | ||
d5498bef | 1692 | static int smc911x_ethtool_seteeprom(struct net_device *dev, |
0a0c72c9 DM |
1693 | struct ethtool_eeprom *eeprom, u8 *data) |
1694 | { | |
1695 | int i, ret; | |
1696 | ||
1697 | /* Enable erase */ | |
1698 | if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0) | |
1699 | return ret; | |
1700 | for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) { | |
1701 | /* erase byte */ | |
1702 | if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0) | |
1703 | return ret; | |
1704 | /* write byte */ | |
1705 | if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0) | |
1706 | return ret; | |
1707 | if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0) | |
1708 | return ret; | |
1709 | } | |
1710 | return 0; | |
1711 | } | |
1712 | ||
1713 | static int smc911x_ethtool_geteeprom_len(struct net_device *dev) | |
1714 | { | |
1715 | return SMC911X_EEPROM_LEN; | |
1716 | } | |
1717 | ||
7282d491 | 1718 | static const struct ethtool_ops smc911x_ethtool_ops = { |
0a0c72c9 DM |
1719 | .get_settings = smc911x_ethtool_getsettings, |
1720 | .set_settings = smc911x_ethtool_setsettings, | |
1721 | .get_drvinfo = smc911x_ethtool_getdrvinfo, | |
1722 | .get_msglevel = smc911x_ethtool_getmsglevel, | |
1723 | .set_msglevel = smc911x_ethtool_setmsglevel, | |
1724 | .nway_reset = smc911x_ethtool_nwayreset, | |
1725 | .get_link = ethtool_op_get_link, | |
1726 | .get_regs_len = smc911x_ethtool_getregslen, | |
1727 | .get_regs = smc911x_ethtool_getregs, | |
1728 | .get_eeprom_len = smc911x_ethtool_geteeprom_len, | |
1729 | .get_eeprom = smc911x_ethtool_geteeprom, | |
1730 | .set_eeprom = smc911x_ethtool_seteeprom, | |
1731 | }; | |
1732 | ||
1733 | /* | |
1734 | * smc911x_findirq | |
1735 | * | |
1736 | * This routine has a simple purpose -- make the SMC chip generate an | |
1737 | * interrupt, so an auto-detect routine can detect it, and find the IRQ, | |
1738 | */ | |
699559f8 | 1739 | static int __init smc911x_findirq(struct net_device *dev) |
0a0c72c9 | 1740 | { |
699559f8 | 1741 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
1742 | int timeout = 20; |
1743 | unsigned long cookie; | |
1744 | ||
1745 | DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__); | |
1746 | ||
1747 | cookie = probe_irq_on(); | |
1748 | ||
1749 | /* | |
1750 | * Force a SW interrupt | |
1751 | */ | |
1752 | ||
699559f8 | 1753 | SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_); |
0a0c72c9 DM |
1754 | |
1755 | /* | |
1756 | * Wait until positive that the interrupt has been generated | |
1757 | */ | |
1758 | do { | |
1759 | int int_status; | |
1760 | udelay(10); | |
699559f8 | 1761 | int_status = SMC_GET_INT_EN(lp); |
0a0c72c9 DM |
1762 | if (int_status & INT_EN_SW_INT_EN_) |
1763 | break; /* got the interrupt */ | |
1764 | } while (--timeout); | |
1765 | ||
1766 | /* | |
1767 | * there is really nothing that I can do here if timeout fails, | |
1768 | * as autoirq_report will return a 0 anyway, which is what I | |
1769 | * want in this case. Plus, the clean up is needed in both | |
1770 | * cases. | |
1771 | */ | |
1772 | ||
1773 | /* and disable all interrupts again */ | |
699559f8 | 1774 | SMC_SET_INT_EN(lp, 0); |
0a0c72c9 DM |
1775 | |
1776 | /* and return what I found */ | |
1777 | return probe_irq_off(cookie); | |
1778 | } | |
1779 | ||
1780 | /* | |
1781 | * Function: smc911x_probe(unsigned long ioaddr) | |
1782 | * | |
1783 | * Purpose: | |
1784 | * Tests to see if a given ioaddr points to an SMC911x chip. | |
1785 | * Returns a 0 on success | |
1786 | * | |
1787 | * Algorithm: | |
1788 | * (1) see if the endian word is OK | |
1789 | * (1) see if I recognize the chip ID in the appropriate register | |
1790 | * | |
1791 | * Here I do typical initialization tasks. | |
1792 | * | |
1793 | * o Initialize the structure if needed | |
1794 | * o print out my vanity message if not done so already | |
1795 | * o print out what type of hardware is detected | |
1796 | * o print out the ethernet address | |
1797 | * o find the IRQ | |
1798 | * o set up my private data | |
1799 | * o configure the dev structure with my subroutines | |
1800 | * o actually GRAB the irq. | |
1801 | * o GRAB the region | |
1802 | */ | |
699559f8 | 1803 | static int __init smc911x_probe(struct net_device *dev) |
0a0c72c9 DM |
1804 | { |
1805 | struct smc911x_local *lp = netdev_priv(dev); | |
1806 | int i, retval; | |
1807 | unsigned int val, chip_id, revision; | |
1808 | const char *version_string; | |
12c03f59 | 1809 | unsigned long irq_flags; |
0a0c72c9 DM |
1810 | |
1811 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | |
1812 | ||
1813 | /* First, see if the endian word is recognized */ | |
699559f8 | 1814 | val = SMC_GET_BYTE_TEST(lp); |
0a0c72c9 DM |
1815 | DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val); |
1816 | if (val != 0x87654321) { | |
1817 | printk(KERN_ERR "Invalid chip endian 0x08%x\n",val); | |
1818 | retval = -ENODEV; | |
1819 | goto err_out; | |
1820 | } | |
1821 | ||
1822 | /* | |
1823 | * check if the revision register is something that I | |
1824 | * recognize. These might need to be added to later, | |
1825 | * as future revisions could be added. | |
1826 | */ | |
699559f8 | 1827 | chip_id = SMC_GET_PN(lp); |
0a0c72c9 DM |
1828 | DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id); |
1829 | for(i=0;chip_ids[i].id != 0; i++) { | |
1830 | if (chip_ids[i].id == chip_id) break; | |
1831 | } | |
1832 | if (!chip_ids[i].id) { | |
1833 | printk(KERN_ERR "Unknown chip ID %04x\n", chip_id); | |
1834 | retval = -ENODEV; | |
1835 | goto err_out; | |
1836 | } | |
1837 | version_string = chip_ids[i].name; | |
1838 | ||
699559f8 | 1839 | revision = SMC_GET_REV(lp); |
0a0c72c9 DM |
1840 | DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision); |
1841 | ||
1842 | /* At this point I'll assume that the chip is an SMC911x. */ | |
1843 | DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name); | |
1844 | ||
1845 | /* Validate the TX FIFO size requested */ | |
1846 | if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) { | |
1847 | printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb); | |
1848 | retval = -EINVAL; | |
1849 | goto err_out; | |
1850 | } | |
d5498bef | 1851 | |
0a0c72c9 | 1852 | /* fill in some of the fields */ |
0a0c72c9 DM |
1853 | lp->version = chip_ids[i].id; |
1854 | lp->revision = revision; | |
1855 | lp->tx_fifo_kb = tx_fifo_kb; | |
1856 | /* Reverse calculate the RX FIFO size from the TX */ | |
1857 | lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512; | |
1858 | lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15; | |
1859 | ||
1860 | /* Set the automatic flow control values */ | |
1861 | switch(lp->tx_fifo_kb) { | |
d5498bef | 1862 | /* |
0a0c72c9 DM |
1863 | * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64 |
1864 | * AFC_LO is AFC_HI/2 | |
1865 | * BACK_DUR is about 5uS*(AFC_LO) rounded down | |
1866 | */ | |
1867 | case 2:/* 13440 Rx Data Fifo Size */ | |
1868 | lp->afc_cfg=0x008C46AF;break; | |
1869 | case 3:/* 12480 Rx Data Fifo Size */ | |
1870 | lp->afc_cfg=0x0082419F;break; | |
1871 | case 4:/* 11520 Rx Data Fifo Size */ | |
1872 | lp->afc_cfg=0x00783C9F;break; | |
1873 | case 5:/* 10560 Rx Data Fifo Size */ | |
1874 | lp->afc_cfg=0x006E374F;break; | |
1875 | case 6:/* 9600 Rx Data Fifo Size */ | |
1876 | lp->afc_cfg=0x0064328F;break; | |
1877 | case 7:/* 8640 Rx Data Fifo Size */ | |
1878 | lp->afc_cfg=0x005A2D7F;break; | |
1879 | case 8:/* 7680 Rx Data Fifo Size */ | |
1880 | lp->afc_cfg=0x0050287F;break; | |
1881 | case 9:/* 6720 Rx Data Fifo Size */ | |
1882 | lp->afc_cfg=0x0046236F;break; | |
1883 | case 10:/* 5760 Rx Data Fifo Size */ | |
1884 | lp->afc_cfg=0x003C1E6F;break; | |
1885 | case 11:/* 4800 Rx Data Fifo Size */ | |
1886 | lp->afc_cfg=0x0032195F;break; | |
d5498bef | 1887 | /* |
0a0c72c9 DM |
1888 | * AFC_HI is ~1520 bytes less than RX Data Fifo Size |
1889 | * AFC_LO is AFC_HI/2 | |
1890 | * BACK_DUR is about 5uS*(AFC_LO) rounded down | |
1891 | */ | |
1892 | case 12:/* 3840 Rx Data Fifo Size */ | |
1893 | lp->afc_cfg=0x0024124F;break; | |
1894 | case 13:/* 2880 Rx Data Fifo Size */ | |
1895 | lp->afc_cfg=0x0015073F;break; | |
1896 | case 14:/* 1920 Rx Data Fifo Size */ | |
1897 | lp->afc_cfg=0x0006032F;break; | |
1898 | default: | |
d5498bef | 1899 | PRINTK("%s: ERROR -- no AFC_CFG setting found", |
0a0c72c9 DM |
1900 | dev->name); |
1901 | break; | |
1902 | } | |
1903 | ||
d5498bef JG |
1904 | DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX, |
1905 | "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME, | |
0a0c72c9 DM |
1906 | lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg); |
1907 | ||
1908 | spin_lock_init(&lp->lock); | |
1909 | ||
1910 | /* Get the MAC address */ | |
699559f8 | 1911 | SMC_GET_MAC_ADDR(lp, dev->dev_addr); |
0a0c72c9 DM |
1912 | |
1913 | /* now, reset the chip, and put it into a known state */ | |
1914 | smc911x_reset(dev); | |
1915 | ||
1916 | /* | |
1917 | * If dev->irq is 0, then the device has to be banged on to see | |
1918 | * what the IRQ is. | |
1919 | * | |
1920 | * Specifying an IRQ is done with the assumption that the user knows | |
1921 | * what (s)he is doing. No checking is done!!!! | |
1922 | */ | |
1923 | if (dev->irq < 1) { | |
1924 | int trials; | |
1925 | ||
1926 | trials = 3; | |
1927 | while (trials--) { | |
699559f8 | 1928 | dev->irq = smc911x_findirq(dev); |
0a0c72c9 DM |
1929 | if (dev->irq) |
1930 | break; | |
1931 | /* kick the card and try again */ | |
1932 | smc911x_reset(dev); | |
1933 | } | |
1934 | } | |
1935 | if (dev->irq == 0) { | |
1936 | printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n", | |
1937 | dev->name); | |
1938 | retval = -ENODEV; | |
1939 | goto err_out; | |
1940 | } | |
1941 | dev->irq = irq_canonicalize(dev->irq); | |
1942 | ||
1943 | /* Fill in the fields of the device structure with ethernet values. */ | |
1944 | ether_setup(dev); | |
1945 | ||
1946 | dev->open = smc911x_open; | |
1947 | dev->stop = smc911x_close; | |
1948 | dev->hard_start_xmit = smc911x_hard_start_xmit; | |
1949 | dev->tx_timeout = smc911x_timeout; | |
1950 | dev->watchdog_timeo = msecs_to_jiffies(watchdog); | |
0a0c72c9 DM |
1951 | dev->set_multicast_list = smc911x_set_multicast_list; |
1952 | dev->ethtool_ops = &smc911x_ethtool_ops; | |
1953 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
1954 | dev->poll_controller = smc911x_poll_controller; | |
1955 | #endif | |
1956 | ||
ef8142a5 | 1957 | INIT_WORK(&lp->phy_configure, smc911x_phy_configure); |
0a0c72c9 DM |
1958 | lp->mii.phy_id_mask = 0x1f; |
1959 | lp->mii.reg_num_mask = 0x1f; | |
1960 | lp->mii.force_media = 0; | |
1961 | lp->mii.full_duplex = 0; | |
1962 | lp->mii.dev = dev; | |
1963 | lp->mii.mdio_read = smc911x_phy_read; | |
1964 | lp->mii.mdio_write = smc911x_phy_write; | |
1965 | ||
1966 | /* | |
1967 | * Locate the phy, if any. | |
1968 | */ | |
1969 | smc911x_phy_detect(dev); | |
1970 | ||
1971 | /* Set default parameters */ | |
1972 | lp->msg_enable = NETIF_MSG_LINK; | |
1973 | lp->ctl_rfduplx = 1; | |
1974 | lp->ctl_rspeed = 100; | |
1975 | ||
12c03f59 MD |
1976 | #ifdef SMC_DYNAMIC_BUS_CONFIG |
1977 | irq_flags = lp->cfg.irq_flags; | |
1978 | #else | |
1979 | irq_flags = IRQF_SHARED | SMC_IRQ_SENSE; | |
1980 | #endif | |
1981 | ||
0a0c72c9 | 1982 | /* Grab the IRQ */ |
f2773a29 | 1983 | retval = request_irq(dev->irq, &smc911x_interrupt, |
12c03f59 | 1984 | irq_flags, dev->name, dev); |
0a0c72c9 DM |
1985 | if (retval) |
1986 | goto err_out; | |
1987 | ||
0a0c72c9 DM |
1988 | #ifdef SMC_USE_DMA |
1989 | lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq); | |
1990 | lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq); | |
1991 | lp->rxdma_active = 0; | |
1992 | lp->txdma_active = 0; | |
1993 | dev->dma = lp->rxdma; | |
1994 | #endif | |
1995 | ||
1996 | retval = register_netdev(dev); | |
1997 | if (retval == 0) { | |
1998 | /* now, print out the card info, in a short format.. */ | |
1999 | printk("%s: %s (rev %d) at %#lx IRQ %d", | |
2000 | dev->name, version_string, lp->revision, | |
2001 | dev->base_addr, dev->irq); | |
2002 | ||
2003 | #ifdef SMC_USE_DMA | |
2004 | if (lp->rxdma != -1) | |
2005 | printk(" RXDMA %d ", lp->rxdma); | |
2006 | ||
2007 | if (lp->txdma != -1) | |
2008 | printk("TXDMA %d", lp->txdma); | |
2009 | #endif | |
2010 | printk("\n"); | |
2011 | if (!is_valid_ether_addr(dev->dev_addr)) { | |
2012 | printk("%s: Invalid ethernet MAC address. Please " | |
2013 | "set using ifconfig\n", dev->name); | |
2014 | } else { | |
2015 | /* Print the Ethernet address */ | |
2016 | printk("%s: Ethernet addr: ", dev->name); | |
2017 | for (i = 0; i < 5; i++) | |
2018 | printk("%2.2x:", dev->dev_addr[i]); | |
2019 | printk("%2.2x\n", dev->dev_addr[5]); | |
2020 | } | |
2021 | ||
2022 | if (lp->phy_type == 0) { | |
2023 | PRINTK("%s: No PHY found\n", dev->name); | |
2024 | } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) { | |
2025 | PRINTK("%s: LAN911x Internal PHY\n", dev->name); | |
2026 | } else { | |
2027 | PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type); | |
2028 | } | |
2029 | } | |
d5498bef | 2030 | |
0a0c72c9 DM |
2031 | err_out: |
2032 | #ifdef SMC_USE_DMA | |
2033 | if (retval) { | |
2034 | if (lp->rxdma != -1) { | |
2035 | SMC_DMA_FREE(dev, lp->rxdma); | |
2036 | } | |
2037 | if (lp->txdma != -1) { | |
2038 | SMC_DMA_FREE(dev, lp->txdma); | |
2039 | } | |
2040 | } | |
2041 | #endif | |
2042 | return retval; | |
2043 | } | |
2044 | ||
2045 | /* | |
2046 | * smc911x_init(void) | |
2047 | * | |
2048 | * Output: | |
2049 | * 0 --> there is a device | |
2050 | * anything else, error | |
2051 | */ | |
2052 | static int smc911x_drv_probe(struct platform_device *pdev) | |
2053 | { | |
12c03f59 | 2054 | struct smc91x_platdata *pd = pdev->dev.platform_data; |
0a0c72c9 DM |
2055 | struct net_device *ndev; |
2056 | struct resource *res; | |
ef8142a5 | 2057 | struct smc911x_local *lp; |
0a0c72c9 DM |
2058 | unsigned int *addr; |
2059 | int ret; | |
2060 | ||
2061 | DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__); | |
2062 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
2063 | if (!res) { | |
2064 | ret = -ENODEV; | |
2065 | goto out; | |
2066 | } | |
2067 | ||
2068 | /* | |
2069 | * Request the regions. | |
2070 | */ | |
2071 | if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) { | |
2072 | ret = -EBUSY; | |
2073 | goto out; | |
2074 | } | |
2075 | ||
2076 | ndev = alloc_etherdev(sizeof(struct smc911x_local)); | |
2077 | if (!ndev) { | |
2078 | printk("%s: could not allocate device.\n", CARDNAME); | |
2079 | ret = -ENOMEM; | |
2080 | goto release_1; | |
2081 | } | |
0a0c72c9 DM |
2082 | SET_NETDEV_DEV(ndev, &pdev->dev); |
2083 | ||
2084 | ndev->dma = (unsigned char)-1; | |
2085 | ndev->irq = platform_get_irq(pdev, 0); | |
ef8142a5 AM |
2086 | lp = netdev_priv(ndev); |
2087 | lp->netdev = ndev; | |
12c03f59 MD |
2088 | #ifdef SMC_DYNAMIC_BUS_CONFIG |
2089 | if (!pd) { | |
2090 | ret = -EINVAL; | |
2091 | goto release_both; | |
2092 | } | |
2093 | memcpy(&lp->cfg, pd, sizeof(lp->cfg)); | |
2094 | #endif | |
0a0c72c9 DM |
2095 | |
2096 | addr = ioremap(res->start, SMC911X_IO_EXTENT); | |
2097 | if (!addr) { | |
2098 | ret = -ENOMEM; | |
2099 | goto release_both; | |
2100 | } | |
2101 | ||
2102 | platform_set_drvdata(pdev, ndev); | |
699559f8 MD |
2103 | lp->base = addr; |
2104 | ndev->base_addr = res->start; | |
2105 | ret = smc911x_probe(ndev); | |
0a0c72c9 DM |
2106 | if (ret != 0) { |
2107 | platform_set_drvdata(pdev, NULL); | |
2108 | iounmap(addr); | |
2109 | release_both: | |
2110 | free_netdev(ndev); | |
2111 | release_1: | |
2112 | release_mem_region(res->start, SMC911X_IO_EXTENT); | |
2113 | out: | |
2114 | printk("%s: not found (%d).\n", CARDNAME, ret); | |
2115 | } | |
2116 | #ifdef SMC_USE_DMA | |
2117 | else { | |
0a0c72c9 DM |
2118 | lp->physaddr = res->start; |
2119 | lp->dev = &pdev->dev; | |
2120 | } | |
2121 | #endif | |
2122 | ||
2123 | return ret; | |
2124 | } | |
2125 | ||
2126 | static int smc911x_drv_remove(struct platform_device *pdev) | |
2127 | { | |
2128 | struct net_device *ndev = platform_get_drvdata(pdev); | |
699559f8 | 2129 | struct smc911x_local *lp = netdev_priv(ndev); |
0a0c72c9 DM |
2130 | struct resource *res; |
2131 | ||
2132 | DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__); | |
2133 | platform_set_drvdata(pdev, NULL); | |
2134 | ||
2135 | unregister_netdev(ndev); | |
2136 | ||
2137 | free_irq(ndev->irq, ndev); | |
2138 | ||
2139 | #ifdef SMC_USE_DMA | |
2140 | { | |
0a0c72c9 DM |
2141 | if (lp->rxdma != -1) { |
2142 | SMC_DMA_FREE(dev, lp->rxdma); | |
2143 | } | |
2144 | if (lp->txdma != -1) { | |
2145 | SMC_DMA_FREE(dev, lp->txdma); | |
2146 | } | |
2147 | } | |
2148 | #endif | |
699559f8 | 2149 | iounmap(lp->base); |
0a0c72c9 DM |
2150 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
2151 | release_mem_region(res->start, SMC911X_IO_EXTENT); | |
2152 | ||
2153 | free_netdev(ndev); | |
2154 | return 0; | |
2155 | } | |
2156 | ||
2157 | static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state) | |
2158 | { | |
2159 | struct net_device *ndev = platform_get_drvdata(dev); | |
699559f8 | 2160 | struct smc911x_local *lp = netdev_priv(ndev); |
0a0c72c9 DM |
2161 | |
2162 | DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__); | |
2163 | if (ndev) { | |
2164 | if (netif_running(ndev)) { | |
2165 | netif_device_detach(ndev); | |
2166 | smc911x_shutdown(ndev); | |
2167 | #if POWER_DOWN | |
2168 | /* Set D2 - Energy detect only setting */ | |
699559f8 | 2169 | SMC_SET_PMT_CTRL(lp, 2<<12); |
0a0c72c9 DM |
2170 | #endif |
2171 | } | |
2172 | } | |
2173 | return 0; | |
2174 | } | |
2175 | ||
2176 | static int smc911x_drv_resume(struct platform_device *dev) | |
2177 | { | |
2178 | struct net_device *ndev = platform_get_drvdata(dev); | |
2179 | ||
2180 | DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__); | |
2181 | if (ndev) { | |
2182 | struct smc911x_local *lp = netdev_priv(ndev); | |
2183 | ||
2184 | if (netif_running(ndev)) { | |
2185 | smc911x_reset(ndev); | |
2186 | smc911x_enable(ndev); | |
2187 | if (lp->phy_type != 0) | |
ef8142a5 | 2188 | smc911x_phy_configure(&lp->phy_configure); |
0a0c72c9 DM |
2189 | netif_device_attach(ndev); |
2190 | } | |
2191 | } | |
2192 | return 0; | |
2193 | } | |
2194 | ||
2195 | static struct platform_driver smc911x_driver = { | |
2196 | .probe = smc911x_drv_probe, | |
2197 | .remove = smc911x_drv_remove, | |
2198 | .suspend = smc911x_drv_suspend, | |
2199 | .resume = smc911x_drv_resume, | |
2200 | .driver = { | |
2201 | .name = CARDNAME, | |
72abb461 | 2202 | .owner = THIS_MODULE, |
0a0c72c9 DM |
2203 | }, |
2204 | }; | |
d5498bef | 2205 | |
0a0c72c9 DM |
2206 | static int __init smc911x_init(void) |
2207 | { | |
2208 | return platform_driver_register(&smc911x_driver); | |
2209 | } | |
2210 | ||
2211 | static void __exit smc911x_cleanup(void) | |
2212 | { | |
2213 | platform_driver_unregister(&smc911x_driver); | |
2214 | } | |
2215 | ||
2216 | module_init(smc911x_init); | |
2217 | module_exit(smc911x_cleanup); |