Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /****************************************************************************** |
2 | * | |
3 | * (C)Copyright 1998,1999 SysKonnect, | |
4 | * a business unit of Schneider & Koch & Co. Datensysteme GmbH. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * The information in this file is provided "AS IS" without warranty. | |
12 | * | |
13 | ******************************************************************************/ | |
14 | ||
15 | /* | |
16 | * AMD Fplus in tag mode data structs | |
17 | * defs for fplustm.c | |
18 | */ | |
19 | ||
20 | #ifndef _FPLUS_ | |
21 | #define _FPLUS_ | |
22 | ||
23 | #ifndef HW_PTR | |
24 | #define HW_PTR void __iomem * | |
25 | #endif | |
26 | ||
27 | /* | |
28 | * fplus error statistic structure | |
29 | */ | |
30 | struct err_st { | |
31 | u_long err_valid ; /* memory status valid */ | |
32 | u_long err_abort ; /* memory status receive abort */ | |
33 | u_long err_e_indicator ; /* error indicator */ | |
34 | u_long err_crc ; /* error detected (CRC or length) */ | |
35 | u_long err_llc_frame ; /* LLC frame */ | |
36 | u_long err_mac_frame ; /* MAC frame */ | |
37 | u_long err_smt_frame ; /* SMT frame */ | |
38 | u_long err_imp_frame ; /* implementer frame */ | |
39 | u_long err_no_buf ; /* no buffer available */ | |
40 | u_long err_too_long ; /* longer than max. buffer */ | |
41 | u_long err_bec_stat ; /* beacon state entered */ | |
42 | u_long err_clm_stat ; /* claim state entered */ | |
43 | u_long err_sifg_det ; /* short interframe gap detect */ | |
44 | u_long err_phinv ; /* PHY invalid */ | |
45 | u_long err_tkiss ; /* token issued */ | |
46 | u_long err_tkerr ; /* token error */ | |
47 | } ; | |
48 | ||
49 | /* | |
50 | * Transmit Descriptor struct | |
51 | */ | |
52 | struct s_smt_fp_txd { | |
2f220e30 AV |
53 | __le32 txd_tbctrl ; /* transmit buffer control */ |
54 | __le32 txd_txdscr ; /* transmit frame status word */ | |
55 | __le32 txd_tbadr ; /* physical tx buffer address */ | |
56 | __le32 txd_ntdadr ; /* physical pointer to the next TxD */ | |
1da177e4 | 57 | #ifdef ENA_64BIT_SUP |
2f220e30 | 58 | __le32 txd_tbadr_hi ; /* physical tx buffer addr (high dword)*/ |
1da177e4 LT |
59 | #endif |
60 | char far *txd_virt ; /* virtual pointer to the data frag */ | |
61 | /* virt pointer to the next TxD */ | |
62 | struct s_smt_fp_txd volatile far *txd_next ; | |
63 | struct s_txd_os txd_os ; /* OS - specific struct */ | |
64 | } ; | |
65 | ||
66 | /* | |
67 | * Receive Descriptor struct | |
68 | */ | |
69 | struct s_smt_fp_rxd { | |
2f220e30 AV |
70 | __le32 rxd_rbctrl ; /* receive buffer control */ |
71 | __le32 rxd_rfsw ; /* receive frame status word */ | |
72 | __le32 rxd_rbadr ; /* physical rx buffer address */ | |
73 | __le32 rxd_nrdadr ; /* physical pointer to the next RxD */ | |
1da177e4 | 74 | #ifdef ENA_64BIT_SUP |
2f220e30 | 75 | __le32 rxd_rbadr_hi ; /* physical tx buffer addr (high dword)*/ |
1da177e4 LT |
76 | #endif |
77 | char far *rxd_virt ; /* virtual pointer to the data frag */ | |
78 | /* virt pointer to the next RxD */ | |
79 | struct s_smt_fp_rxd volatile far *rxd_next ; | |
80 | struct s_rxd_os rxd_os ; /* OS - specific struct */ | |
81 | } ; | |
82 | ||
83 | /* | |
84 | * Descriptor Union Definition | |
85 | */ | |
86 | union s_fp_descr { | |
87 | struct s_smt_fp_txd t ; /* pointer to the TxD */ | |
88 | struct s_smt_fp_rxd r ; /* pointer to the RxD */ | |
89 | } ; | |
90 | ||
91 | /* | |
92 | * TxD Ring Control struct | |
93 | */ | |
94 | struct s_smt_tx_queue { | |
95 | struct s_smt_fp_txd volatile *tx_curr_put ; /* next free TxD */ | |
96 | struct s_smt_fp_txd volatile *tx_prev_put ; /* shadow put pointer */ | |
97 | struct s_smt_fp_txd volatile *tx_curr_get ; /* next TxD to release*/ | |
98 | u_short tx_free ; /* count of free TxD's */ | |
99 | u_short tx_used ; /* count of used TxD's */ | |
100 | HW_PTR tx_bmu_ctl ; /* BMU addr for tx start */ | |
101 | HW_PTR tx_bmu_dsc ; /* BMU addr for curr dsc. */ | |
102 | } ; | |
103 | ||
104 | /* | |
105 | * RxD Ring Control struct | |
106 | */ | |
107 | struct s_smt_rx_queue { | |
108 | struct s_smt_fp_rxd volatile *rx_curr_put ; /* next RxD to queue into */ | |
109 | struct s_smt_fp_rxd volatile *rx_prev_put ; /* shadow put pointer */ | |
110 | struct s_smt_fp_rxd volatile *rx_curr_get ; /* next RxD to fill */ | |
111 | u_short rx_free ; /* count of free RxD's */ | |
112 | u_short rx_used ; /* count of used RxD's */ | |
113 | HW_PTR rx_bmu_ctl ; /* BMU addr for rx start */ | |
114 | HW_PTR rx_bmu_dsc ; /* BMU addr for curr dsc. */ | |
115 | } ; | |
116 | ||
117 | #define VOID_FRAME_OFF 0x00 | |
118 | #define CLAIM_FRAME_OFF 0x08 | |
119 | #define BEACON_FRAME_OFF 0x10 | |
120 | #define DBEACON_FRAME_OFF 0x18 | |
121 | #define RX_FIFO_OFF 0x21 /* to get a prime number for */ | |
122 | /* the RX_FIFO_SPACE */ | |
123 | ||
124 | #define RBC_MEM_SIZE 0x8000 | |
125 | #define SEND_ASYNC_AS_SYNC 0x1 | |
126 | #define SYNC_TRAFFIC_ON 0x2 | |
127 | ||
128 | /* big FIFO memory */ | |
129 | #define RX_FIFO_SPACE 0x4000 - RX_FIFO_OFF | |
130 | #define TX_FIFO_SPACE 0x4000 | |
131 | ||
132 | #define TX_SMALL_FIFO 0x0900 | |
133 | #define TX_MEDIUM_FIFO TX_FIFO_SPACE / 2 | |
134 | #define TX_LARGE_FIFO TX_FIFO_SPACE - TX_SMALL_FIFO | |
135 | ||
136 | #define RX_SMALL_FIFO 0x0900 | |
137 | #define RX_LARGE_FIFO RX_FIFO_SPACE - RX_SMALL_FIFO | |
138 | ||
139 | struct s_smt_fifo_conf { | |
140 | u_short rbc_ram_start ; /* FIFO start address */ | |
141 | u_short rbc_ram_end ; /* FIFO size */ | |
142 | u_short rx1_fifo_start ; /* rx queue start address */ | |
143 | u_short rx1_fifo_size ; /* rx queue size */ | |
144 | u_short rx2_fifo_start ; /* rx queue start address */ | |
145 | u_short rx2_fifo_size ; /* rx queue size */ | |
146 | u_short tx_s_start ; /* sync queue start address */ | |
147 | u_short tx_s_size ; /* sync queue size */ | |
148 | u_short tx_a0_start ; /* async queue A0 start address */ | |
149 | u_short tx_a0_size ; /* async queue A0 size */ | |
150 | u_short fifo_config_mode ; /* FIFO configuration mode */ | |
151 | } ; | |
152 | ||
153 | #define FM_ADDRX (FM_ADDET|FM_EXGPA0|FM_EXGPA1) | |
154 | ||
155 | struct s_smt_fp { | |
156 | u_short mdr2init ; /* mode register 2 init value */ | |
157 | u_short mdr3init ; /* mode register 3 init value */ | |
158 | u_short frselreg_init ; /* frame selection register init val */ | |
159 | u_short rx_mode ; /* address mode broad/multi/promisc */ | |
160 | u_short nsa_mode ; | |
161 | u_short rx_prom ; | |
162 | u_short exgpa ; | |
163 | ||
164 | struct err_st err_stats ; /* error statistics */ | |
165 | ||
166 | /* | |
167 | * MAC buffers | |
168 | */ | |
169 | struct fddi_mac_sf { /* special frame build buffer */ | |
170 | u_char mac_fc ; | |
171 | struct fddi_addr mac_dest ; | |
172 | struct fddi_addr mac_source ; | |
173 | u_char mac_info[0x20] ; | |
174 | } mac_sfb ; | |
175 | ||
176 | ||
177 | /* | |
178 | * queues | |
179 | */ | |
180 | #define QUEUE_S 0 | |
181 | #define QUEUE_A0 1 | |
182 | #define QUEUE_R1 0 | |
183 | #define QUEUE_R2 1 | |
184 | #define USED_QUEUES 2 | |
185 | ||
186 | /* | |
187 | * queue pointers; points to the queue dependent variables | |
188 | */ | |
189 | struct s_smt_tx_queue *tx[USED_QUEUES] ; | |
190 | struct s_smt_rx_queue *rx[USED_QUEUES] ; | |
191 | ||
192 | /* | |
193 | * queue dependent variables | |
194 | */ | |
195 | struct s_smt_tx_queue tx_q[USED_QUEUES] ; | |
196 | struct s_smt_rx_queue rx_q[USED_QUEUES] ; | |
197 | ||
198 | /* | |
199 | * FIFO configuration struct | |
200 | */ | |
201 | struct s_smt_fifo_conf fifo ; | |
202 | ||
203 | /* last formac status */ | |
204 | u_short s2u ; | |
205 | u_short s2l ; | |
206 | ||
207 | /* calculated FORMAC+ reg.addr. */ | |
208 | HW_PTR fm_st1u ; | |
209 | HW_PTR fm_st1l ; | |
210 | HW_PTR fm_st2u ; | |
211 | HW_PTR fm_st2l ; | |
212 | HW_PTR fm_st3u ; | |
213 | HW_PTR fm_st3l ; | |
214 | ||
215 | ||
216 | /* | |
217 | * multicast table | |
218 | */ | |
219 | #define FPMAX_MULTICAST 32 | |
220 | #define SMT_MAX_MULTI 4 | |
221 | struct { | |
222 | struct s_fpmc { | |
223 | struct fddi_addr a ; /* mc address */ | |
224 | u_char n ; /* usage counter */ | |
225 | u_char perm ; /* flag: permanent */ | |
226 | } table[FPMAX_MULTICAST] ; | |
227 | } mc ; | |
228 | struct fddi_addr group_addr ; | |
229 | u_long func_addr ; /* functional address */ | |
230 | int smt_slots_used ; /* count of table entries for the SMT */ | |
231 | int os_slots_used ; /* count of table entries */ | |
232 | /* used by the os-specific module */ | |
233 | } ; | |
234 | ||
235 | /* | |
236 | * modes for mac_set_rx_mode() | |
237 | */ | |
238 | #define RX_ENABLE_ALLMULTI 1 /* enable all multicasts */ | |
239 | #define RX_DISABLE_ALLMULTI 2 /* disable "enable all multicasts" */ | |
25985edc LDM |
240 | #define RX_ENABLE_PROMISC 3 /* enable promiscuous */ |
241 | #define RX_DISABLE_PROMISC 4 /* disable promiscuous */ | |
1da177e4 LT |
242 | #define RX_ENABLE_NSA 5 /* enable reception of NSA frames */ |
243 | #define RX_DISABLE_NSA 6 /* disable reception of NSA frames */ | |
244 | ||
245 | ||
246 | /* | |
247 | * support for byte reversal in AIX | |
248 | * (descriptors and pointers must be byte reversed in memory | |
249 | * CPU is big endian; M-Channel is little endian) | |
250 | */ | |
251 | #ifdef AIX | |
252 | #define MDR_REV | |
253 | #define AIX_REVERSE(x) ((((x)<<24L)&0xff000000L) + \ | |
254 | (((x)<< 8L)&0x00ff0000L) + \ | |
255 | (((x)>> 8L)&0x0000ff00L) + \ | |
256 | (((x)>>24L)&0x000000ffL)) | |
257 | #else | |
258 | #ifndef AIX_REVERSE | |
259 | #define AIX_REVERSE(x) (x) | |
260 | #endif | |
261 | #endif | |
262 | ||
263 | #ifdef MDR_REV | |
264 | #define MDR_REVERSE(x) ((((x)<<24L)&0xff000000L) + \ | |
265 | (((x)<< 8L)&0x00ff0000L) + \ | |
266 | (((x)>> 8L)&0x0000ff00L) + \ | |
267 | (((x)>>24L)&0x000000ffL)) | |
268 | #else | |
269 | #ifndef MDR_REVERSE | |
270 | #define MDR_REVERSE(x) (x) | |
271 | #endif | |
272 | #endif | |
273 | ||
274 | #endif |