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sfc: Clear RXIN_SEL when soft-resetting QT2025C
[linux-block.git] / drivers / net / sfc / mcdi.c
CommitLineData
afd4aea0
BH		 1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2008-2009 Solarflare Communications Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
10#include <linux/delay.h>
11#include "net_driver.h"
12#include "nic.h"
13#include "io.h"
14#include "regs.h"
15#include "mcdi_pcol.h"
16#include "phy.h"
17
18/**************************************************************************
19 *
20 * Management-Controller-to-Driver Interface
21 *
22 **************************************************************************
23 */
24
25/* Software-defined structure to the shared-memory */
26#define CMD_NOTIFY_PORT0 0
27#define CMD_NOTIFY_PORT1 4
28#define CMD_PDU_PORT0 0x008
29#define CMD_PDU_PORT1 0x108
30#define REBOOT_FLAG_PORT0 0x3f8
31#define REBOOT_FLAG_PORT1 0x3fc
32
33#define MCDI_RPC_TIMEOUT 10 /*seconds */
34
35#define MCDI_PDU(efx) \
36 (efx_port_num(efx) ? CMD_PDU_PORT1 : CMD_PDU_PORT0)
37#define MCDI_DOORBELL(efx) \
38 (efx_port_num(efx) ? CMD_NOTIFY_PORT1 : CMD_NOTIFY_PORT0)
39#define MCDI_REBOOT_FLAG(efx) \
40 (efx_port_num(efx) ? REBOOT_FLAG_PORT1 : REBOOT_FLAG_PORT0)
41
42#define SEQ_MASK \
43 EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
44
45static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
46{
47 struct siena_nic_data *nic_data;
48 EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
49 nic_data = efx->nic_data;
50 return &nic_data->mcdi;
51}
52
53void efx_mcdi_init(struct efx_nic *efx)
54{
55 struct efx_mcdi_iface *mcdi;
56
57 if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
58 return;
59
60 mcdi = efx_mcdi(efx);
61 init_waitqueue_head(&mcdi->wq);
62 spin_lock_init(&mcdi->iface_lock);
63 atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT);
64 mcdi->mode = MCDI_MODE_POLL;
65
66 (void) efx_mcdi_poll_reboot(efx);
67}
68
69static void efx_mcdi_copyin(struct efx_nic *efx, unsigned cmd,
70 const u8 *inbuf, size_t inlen)
71{
72 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
73 unsigned pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
74 unsigned doorbell = FR_CZ_MC_TREG_SMEM + MCDI_DOORBELL(efx);
75 unsigned int i;
76 efx_dword_t hdr;
77 u32 xflags, seqno;
78
79 BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT);
80 BUG_ON(inlen & 3 || inlen >= 0x100);
81
82 seqno = mcdi->seqno & SEQ_MASK;
83 xflags = 0;
84 if (mcdi->mode == MCDI_MODE_EVENTS)
85 xflags |= MCDI_HEADER_XFLAGS_EVREQ;
86
87 EFX_POPULATE_DWORD_6(hdr,
88 MCDI_HEADER_RESPONSE, 0,
89 MCDI_HEADER_RESYNC, 1,
90 MCDI_HEADER_CODE, cmd,
91 MCDI_HEADER_DATALEN, inlen,
92 MCDI_HEADER_SEQ, seqno,
93 MCDI_HEADER_XFLAGS, xflags);
94
95 efx_writed(efx, &hdr, pdu);
96
97 for (i = 0; i < inlen; i += 4)
98 _efx_writed(efx, *((__le32 *)(inbuf + i)), pdu + 4 + i);
99
100 /* Ensure the payload is written out before the header */
101 wmb();
102
103 /* ring the doorbell with a distinctive value */
104 _efx_writed(efx, (__force __le32) 0x45789abc, doorbell);
105}
106
107static void efx_mcdi_copyout(struct efx_nic *efx, u8 *outbuf, size_t outlen)
108{
109 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
110 unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
111 int i;
112
113 BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT);
114 BUG_ON(outlen & 3 || outlen >= 0x100);
115
116 for (i = 0; i < outlen; i += 4)
117 *((__le32 *)(outbuf + i)) = _efx_readd(efx, pdu + 4 + i);
118}
119
120static int efx_mcdi_poll(struct efx_nic *efx)
121{
122 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
123 unsigned int time, finish;
124 unsigned int respseq, respcmd, error;
125 unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
126 unsigned int rc, spins;
127 efx_dword_t reg;
128
129 /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
e0bf54c9 130 rc = -efx_mcdi_poll_reboot(efx);
afd4aea0
BH		 131 if (rc)
132 goto out;
133
134 /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
135 * because generally mcdi responses are fast. After that, back off
136 * and poll once a jiffy (approximately)
137 */
138 spins = TICK_USEC;
139 finish = get_seconds() + MCDI_RPC_TIMEOUT;
140
141 while (1) {
142 if (spins != 0) {
143 --spins;
144 udelay(1);
55029c1d
BH		 145 } else {
146 schedule_timeout_uninterruptible(1);
147 }
afd4aea0
BH		 148
149 time = get_seconds();
150
151 rmb();
152 efx_readd(efx, &reg, pdu);
153
154 /* All 1's indicates that shared memory is in reset (and is
155 * not a valid header). Wait for it to come out reset before
156 * completing the command */
157 if (EFX_DWORD_FIELD(reg, EFX_DWORD_0) != 0xffffffff &&
158 EFX_DWORD_FIELD(reg, MCDI_HEADER_RESPONSE))
159 break;
160
161 if (time >= finish)
162 return -ETIMEDOUT;
163 }
164
165 mcdi->resplen = EFX_DWORD_FIELD(reg, MCDI_HEADER_DATALEN);
166 respseq = EFX_DWORD_FIELD(reg, MCDI_HEADER_SEQ);
167 respcmd = EFX_DWORD_FIELD(reg, MCDI_HEADER_CODE);
168 error = EFX_DWORD_FIELD(reg, MCDI_HEADER_ERROR);
169
170 if (error && mcdi->resplen == 0) {
62776d03 171 netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
afd4aea0
BH		 172 rc = EIO;
173 } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
62776d03
BH		 174 netif_err(efx, hw, efx->net_dev,
175 "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
176 respseq, mcdi->seqno);
afd4aea0
BH		 177 rc = EIO;
178 } else if (error) {
179 efx_readd(efx, &reg, pdu + 4);
180 switch (EFX_DWORD_FIELD(reg, EFX_DWORD_0)) {
181#define TRANSLATE_ERROR(name) \
182 case MC_CMD_ERR_ ## name: \
183 rc = name; \
184 break
185 TRANSLATE_ERROR(ENOENT);
186 TRANSLATE_ERROR(EINTR);
187 TRANSLATE_ERROR(EACCES);
188 TRANSLATE_ERROR(EBUSY);
189 TRANSLATE_ERROR(EINVAL);
190 TRANSLATE_ERROR(EDEADLK);
191 TRANSLATE_ERROR(ENOSYS);
192 TRANSLATE_ERROR(ETIME);
193#undef TRANSLATE_ERROR
194 default:
195 rc = EIO;
196 break;
197 }
198 } else
199 rc = 0;
200
201out:
202 mcdi->resprc = rc;
203 if (rc)
204 mcdi->resplen = 0;
205
206 /* Return rc=0 like wait_event_timeout() */
207 return 0;
208}
209
210/* Test and clear MC-rebooted flag for this port/function */
211int efx_mcdi_poll_reboot(struct efx_nic *efx)
212{
213 unsigned int addr = FR_CZ_MC_TREG_SMEM + MCDI_REBOOT_FLAG(efx);
214 efx_dword_t reg;
215 uint32_t value;
216
217 if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
218 return false;
219
220 efx_readd(efx, &reg, addr);
221 value = EFX_DWORD_FIELD(reg, EFX_DWORD_0);
222
223 if (value == 0)
224 return 0;
225
226 EFX_ZERO_DWORD(reg);
227 efx_writed(efx, &reg, addr);
228
229 if (value == MC_STATUS_DWORD_ASSERT)
230 return -EINTR;
231 else
232 return -EIO;
233}
234
235static void efx_mcdi_acquire(struct efx_mcdi_iface *mcdi)
236{
237 /* Wait until the interface becomes QUIESCENT and we win the race
238 * to mark it RUNNING. */
239 wait_event(mcdi->wq,
240 atomic_cmpxchg(&mcdi->state,
241 MCDI_STATE_QUIESCENT,
242 MCDI_STATE_RUNNING)
243 == MCDI_STATE_QUIESCENT);
244}
245
246static int efx_mcdi_await_completion(struct efx_nic *efx)
247{
248 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
249
250 if (wait_event_timeout(
251 mcdi->wq,
252 atomic_read(&mcdi->state) == MCDI_STATE_COMPLETED,
253 msecs_to_jiffies(MCDI_RPC_TIMEOUT * 1000)) == 0)
254 return -ETIMEDOUT;
255
256 /* Check if efx_mcdi_set_mode() switched us back to polled completions.
257 * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
258 * completed the request first, then we'll just end up completing the
259 * request again, which is safe.
260 *
261 * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
262 * wait_event_timeout() implicitly provides.
263 */
264 if (mcdi->mode == MCDI_MODE_POLL)
265 return efx_mcdi_poll(efx);
266
267 return 0;
268}
269
270static bool efx_mcdi_complete(struct efx_mcdi_iface *mcdi)
271{
272 /* If the interface is RUNNING, then move to COMPLETED and wake any
273 * waiters. If the interface isn't in RUNNING then we've received a
274 * duplicate completion after we've already transitioned back to
275 * QUIESCENT. [A subsequent invocation would increment seqno, so would
276 * have failed the seqno check].
277 */
278 if (atomic_cmpxchg(&mcdi->state,
279 MCDI_STATE_RUNNING,
280 MCDI_STATE_COMPLETED) == MCDI_STATE_RUNNING) {
281 wake_up(&mcdi->wq);
282 return true;
283 }
284
285 return false;
286}
287
288static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
289{
290 atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT);
291 wake_up(&mcdi->wq);
292}
293
294static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
295 unsigned int datalen, unsigned int errno)
296{
297 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
298 bool wake = false;
299
300 spin_lock(&mcdi->iface_lock);
301
302 if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
303 if (mcdi->credits)
304 /* The request has been cancelled */
305 --mcdi->credits;
306 else
62776d03
BH		 307 netif_err(efx, hw, efx->net_dev,
308 "MC response mismatch tx seq 0x%x rx "
309 "seq 0x%x\n", seqno, mcdi->seqno);
afd4aea0
BH		 310 } else {
311 mcdi->resprc = errno;
312 mcdi->resplen = datalen;
313
314 wake = true;
315 }
316
317 spin_unlock(&mcdi->iface_lock);
318
319 if (wake)
320 efx_mcdi_complete(mcdi);
321}
322
323/* Issue the given command by writing the data into the shared memory PDU,
324 * ring the doorbell and wait for completion. Copyout the result. */
325int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
326 const u8 *inbuf, size_t inlen, u8 *outbuf, size_t outlen,
327 size_t *outlen_actual)
328{
329 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
330 int rc;
331 BUG_ON(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
332
333 efx_mcdi_acquire(mcdi);
334
335 /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
336 spin_lock_bh(&mcdi->iface_lock);
337 ++mcdi->seqno;
338 spin_unlock_bh(&mcdi->iface_lock);
339
340 efx_mcdi_copyin(efx, cmd, inbuf, inlen);
341
342 if (mcdi->mode == MCDI_MODE_POLL)
343 rc = efx_mcdi_poll(efx);
344 else
345 rc = efx_mcdi_await_completion(efx);
346
347 if (rc != 0) {
348 /* Close the race with efx_mcdi_ev_cpl() executing just too late
349 * and completing a request we've just cancelled, by ensuring
350 * that the seqno check therein fails.
351 */
352 spin_lock_bh(&mcdi->iface_lock);
353 ++mcdi->seqno;
354 ++mcdi->credits;
355 spin_unlock_bh(&mcdi->iface_lock);
356
62776d03
BH		 357 netif_err(efx, hw, efx->net_dev,
358 "MC command 0x%x inlen %d mode %d timed out\n",
359 cmd, (int)inlen, mcdi->mode);
afd4aea0
BH		 360 } else {
361 size_t resplen;
362
363 /* At the very least we need a memory barrier here to ensure
364 * we pick up changes from efx_mcdi_ev_cpl(). Protect against
365 * a spurious efx_mcdi_ev_cpl() running concurrently by
366 * acquiring the iface_lock. */
367 spin_lock_bh(&mcdi->iface_lock);
368 rc = -mcdi->resprc;
369 resplen = mcdi->resplen;
370 spin_unlock_bh(&mcdi->iface_lock);
371
372 if (rc == 0) {
373 efx_mcdi_copyout(efx, outbuf,
374 min(outlen, mcdi->resplen + 3) & ~0x3);
375 if (outlen_actual != NULL)
376 *outlen_actual = resplen;
377 } else if (cmd == MC_CMD_REBOOT && rc == -EIO)
378 ; /* Don't reset if MC_CMD_REBOOT returns EIO */
379 else if (rc == -EIO || rc == -EINTR) {
62776d03
BH		 380 netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n",
381 -rc);
afd4aea0
BH		 382 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
383 } else
f18ca364 384 netif_dbg(efx, hw, efx->net_dev,
62776d03
BH		 385 "MC command 0x%x inlen %d failed rc=%d\n",
386 cmd, (int)inlen, -rc);
afd4aea0
BH		 387 }
388
389 efx_mcdi_release(mcdi);
390 return rc;
391}
392
393void efx_mcdi_mode_poll(struct efx_nic *efx)
394{
395 struct efx_mcdi_iface *mcdi;
396
397 if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
398 return;
399
400 mcdi = efx_mcdi(efx);
401 if (mcdi->mode == MCDI_MODE_POLL)
402 return;
403
404 /* We can switch from event completion to polled completion, because
405 * mcdi requests are always completed in shared memory. We do this by
406 * switching the mode to POLL'd then completing the request.
407 * efx_mcdi_await_completion() will then call efx_mcdi_poll().
408 *
409 * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
410 * which efx_mcdi_complete() provides for us.
411 */
412 mcdi->mode = MCDI_MODE_POLL;
413
414 efx_mcdi_complete(mcdi);
415}
416
417void efx_mcdi_mode_event(struct efx_nic *efx)
418{
419 struct efx_mcdi_iface *mcdi;
420
421 if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
422 return;
423
424 mcdi = efx_mcdi(efx);
425
426 if (mcdi->mode == MCDI_MODE_EVENTS)
427 return;
428
429 /* We can't switch from polled to event completion in the middle of a
430 * request, because the completion method is specified in the request.
431 * So acquire the interface to serialise the requestors. We don't need
432 * to acquire the iface_lock to change the mode here, but we do need a
433 * write memory barrier ensure that efx_mcdi_rpc() sees it, which
434 * efx_mcdi_acquire() provides.
435 */
436 efx_mcdi_acquire(mcdi);
437 mcdi->mode = MCDI_MODE_EVENTS;
438 efx_mcdi_release(mcdi);
439}
440
441static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
442{
443 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
444
445 /* If there is an outstanding MCDI request, it has been terminated
446 * either by a BADASSERT or REBOOT event. If the mcdi interface is
447 * in polled mode, then do nothing because the MC reboot handler will
448 * set the header correctly. However, if the mcdi interface is waiting
449 * for a CMDDONE event it won't receive it [and since all MCDI events
450 * are sent to the same queue, we can't be racing with
451 * efx_mcdi_ev_cpl()]
452 *
453 * There's a race here with efx_mcdi_rpc(), because we might receive
454 * a REBOOT event *before* the request has been copied out. In polled
455 * mode (during startup) this is irrelevent, because efx_mcdi_complete()
456 * is ignored. In event mode, this condition is just an edge-case of
457 * receiving a REBOOT event after posting the MCDI request. Did the mc
458 * reboot before or after the copyout? The best we can do always is
459 * just return failure.
460 */
461 spin_lock(&mcdi->iface_lock);
462 if (efx_mcdi_complete(mcdi)) {
463 if (mcdi->mode == MCDI_MODE_EVENTS) {
464 mcdi->resprc = rc;
465 mcdi->resplen = 0;
466 }
467 } else
468 /* Nobody was waiting for an MCDI request, so trigger a reset */
469 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
470
471 spin_unlock(&mcdi->iface_lock);
472}
473
474static unsigned int efx_mcdi_event_link_speed[] = {
475 [MCDI_EVENT_LINKCHANGE_SPEED_100M] = 100,
476 [MCDI_EVENT_LINKCHANGE_SPEED_1G] = 1000,
477 [MCDI_EVENT_LINKCHANGE_SPEED_10G] = 10000,
478};
479
480
481static void efx_mcdi_process_link_change(struct efx_nic *efx, efx_qword_t *ev)
482{
483 u32 flags, fcntl, speed, lpa;
484
485 speed = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_SPEED);
486 EFX_BUG_ON_PARANOID(speed >= ARRAY_SIZE(efx_mcdi_event_link_speed));
487 speed = efx_mcdi_event_link_speed[speed];
488
489 flags = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LINK_FLAGS);
490 fcntl = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_FCNTL);
491 lpa = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LP_CAP);
492
493 /* efx->link_state is only modified by efx_mcdi_phy_get_link(),
494 * which is only run after flushing the event queues. Therefore, it
495 * is safe to modify the link state outside of the mac_lock here.
496 */
497 efx_mcdi_phy_decode_link(efx, &efx->link_state, speed, flags, fcntl);
498
499 efx_mcdi_phy_check_fcntl(efx, lpa);
500
501 efx_link_status_changed(efx);
502}
503
504static const char *sensor_names[] = {
505 [MC_CMD_SENSOR_CONTROLLER_TEMP] = "Controller temp. sensor",
506 [MC_CMD_SENSOR_PHY_COMMON_TEMP] = "PHY shared temp. sensor",
507 [MC_CMD_SENSOR_CONTROLLER_COOLING] = "Controller cooling",
508 [MC_CMD_SENSOR_PHY0_TEMP] = "PHY 0 temp. sensor",
509 [MC_CMD_SENSOR_PHY0_COOLING] = "PHY 0 cooling",
510 [MC_CMD_SENSOR_PHY1_TEMP] = "PHY 1 temp. sensor",
511 [MC_CMD_SENSOR_PHY1_COOLING] = "PHY 1 cooling",
512 [MC_CMD_SENSOR_IN_1V0] = "1.0V supply sensor",
513 [MC_CMD_SENSOR_IN_1V2] = "1.2V supply sensor",
514 [MC_CMD_SENSOR_IN_1V8] = "1.8V supply sensor",
515 [MC_CMD_SENSOR_IN_2V5] = "2.5V supply sensor",
516 [MC_CMD_SENSOR_IN_3V3] = "3.3V supply sensor",
517 [MC_CMD_SENSOR_IN_12V0] = "12V supply sensor"
518};
519
520static const char *sensor_status_names[] = {
521 [MC_CMD_SENSOR_STATE_OK] = "OK",
522 [MC_CMD_SENSOR_STATE_WARNING] = "Warning",
523 [MC_CMD_SENSOR_STATE_FATAL] = "Fatal",
524 [MC_CMD_SENSOR_STATE_BROKEN] = "Device failure",
525};
526
527static void efx_mcdi_sensor_event(struct efx_nic *efx, efx_qword_t *ev)
528{
529 unsigned int monitor, state, value;
530 const char *name, *state_txt;
531 monitor = EFX_QWORD_FIELD(*ev, MCDI_EVENT_SENSOREVT_MONITOR);
532 state = EFX_QWORD_FIELD(*ev, MCDI_EVENT_SENSOREVT_STATE);
533 value = EFX_QWORD_FIELD(*ev, MCDI_EVENT_SENSOREVT_VALUE);
534 /* Deal gracefully with the board having more drivers than we
535 * know about, but do not expect new sensor states. */
536 name = (monitor >= ARRAY_SIZE(sensor_names))
537 ? "No sensor name available" :
538 sensor_names[monitor];
539 EFX_BUG_ON_PARANOID(state >= ARRAY_SIZE(sensor_status_names));
540 state_txt = sensor_status_names[state];
541
62776d03
BH		 542 netif_err(efx, hw, efx->net_dev,
543 "Sensor %d (%s) reports condition '%s' for raw value %d\n",
544 monitor, name, state_txt, value);
afd4aea0
BH		 545}
546
547/* Called from falcon_process_eventq for MCDI events */
548void efx_mcdi_process_event(struct efx_channel *channel,
549 efx_qword_t *event)
550{
551 struct efx_nic *efx = channel->efx;
552 int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
553 u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
554
555 switch (code) {
556 case MCDI_EVENT_CODE_BADSSERT:
62776d03
BH		 557 netif_err(efx, hw, efx->net_dev,
558 "MC watchdog or assertion failure at 0x%x\n", data);
afd4aea0
BH		 559 efx_mcdi_ev_death(efx, EINTR);
560 break;
561
562 case MCDI_EVENT_CODE_PMNOTICE:
62776d03 563 netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
afd4aea0
BH		 564 break;
565
566 case MCDI_EVENT_CODE_CMDDONE:
567 efx_mcdi_ev_cpl(efx,
568 MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
569 MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
570 MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
571 break;
572
573 case MCDI_EVENT_CODE_LINKCHANGE:
574 efx_mcdi_process_link_change(efx, event);
575 break;
576 case MCDI_EVENT_CODE_SENSOREVT:
577 efx_mcdi_sensor_event(efx, event);
578 break;
579 case MCDI_EVENT_CODE_SCHEDERR:
62776d03
BH		 580 netif_info(efx, hw, efx->net_dev,
581 "MC Scheduler error address=0x%x\n", data);
afd4aea0
BH		 582 break;
583 case MCDI_EVENT_CODE_REBOOT:
62776d03 584 netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
afd4aea0
BH		 585 efx_mcdi_ev_death(efx, EIO);
586 break;
587 case MCDI_EVENT_CODE_MAC_STATS_DMA:
588 /* MAC stats are gather lazily. We can ignore this. */
589 break;
590
591 default:
62776d03
BH		 592 netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n",
593 code);
afd4aea0
BH		 594 }
595}
596
597/**************************************************************************
598 *
599 * Specific request functions
600 *
601 **************************************************************************
602 */
603
604int efx_mcdi_fwver(struct efx_nic *efx, u64 *version, u32 *build)
605{
606 u8 outbuf[ALIGN(MC_CMD_GET_VERSION_V1_OUT_LEN, 4)];
607 size_t outlength;
608 const __le16 *ver_words;
609 int rc;
610
611 BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
612
613 rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
614 outbuf, sizeof(outbuf), &outlength);
615 if (rc)
616 goto fail;
617
618 if (outlength == MC_CMD_GET_VERSION_V0_OUT_LEN) {
619 *version = 0;
620 *build = MCDI_DWORD(outbuf, GET_VERSION_OUT_FIRMWARE);
621 return 0;
622 }
623
624 if (outlength < MC_CMD_GET_VERSION_V1_OUT_LEN) {
00bbb4a5 625 rc = -EIO;
afd4aea0
BH		 626 goto fail;
627 }
628
629 ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
630 *version = (((u64)le16_to_cpu(ver_words[0]) << 48) |
631 ((u64)le16_to_cpu(ver_words[1]) << 32) |
632 ((u64)le16_to_cpu(ver_words[2]) << 16) |
633 le16_to_cpu(ver_words[3]));
634 *build = MCDI_DWORD(outbuf, GET_VERSION_OUT_FIRMWARE);
635
636 return 0;
637
638fail:
62776d03 639 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 640 return rc;
641}
642
643int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
644 bool *was_attached)
645{
646 u8 inbuf[MC_CMD_DRV_ATTACH_IN_LEN];
647 u8 outbuf[MC_CMD_DRV_ATTACH_OUT_LEN];
648 size_t outlen;
649 int rc;
650
651 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
652 driver_operating ? 1 : 0);
653 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
654
655 rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
656 outbuf, sizeof(outbuf), &outlen);
657 if (rc)
658 goto fail;
00bbb4a5
BH		 659 if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
660 rc = -EIO;
afd4aea0 661 goto fail;
00bbb4a5 662 }
afd4aea0
BH		 663
664 if (was_attached != NULL)
665 *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
666 return 0;
667
668fail:
62776d03 669 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 670 return rc;
671}
672
673int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
674 u16 *fw_subtype_list)
675{
676 uint8_t outbuf[MC_CMD_GET_BOARD_CFG_OUT_LEN];
677 size_t outlen;
678 int port_num = efx_port_num(efx);
679 int offset;
680 int rc;
681
682 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
683
684 rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
685 outbuf, sizeof(outbuf), &outlen);
686 if (rc)
687 goto fail;
688
689 if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LEN) {
00bbb4a5 690 rc = -EIO;
afd4aea0
BH		 691 goto fail;
692 }
693
694 offset = (port_num)
695 ? MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST
696 : MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST;
697 if (mac_address)
698 memcpy(mac_address, outbuf + offset, ETH_ALEN);
699 if (fw_subtype_list)
700 memcpy(fw_subtype_list,
701 outbuf + MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST,
702 MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_LEN);
703
704 return 0;
705
706fail:
62776d03
BH		 707 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
708 __func__, rc, (int)outlen);
afd4aea0
BH		 709
710 return rc;
711}
712
713int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
714{
715 u8 inbuf[MC_CMD_LOG_CTRL_IN_LEN];
716 u32 dest = 0;
717 int rc;
718
719 if (uart)
720 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
721 if (evq)
722 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
723
724 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
725 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
726
727 BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
728
729 rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
730 NULL, 0, NULL);
731 if (rc)
732 goto fail;
733
734 return 0;
735
736fail:
62776d03 737 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 738 return rc;
739}
740
741int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
742{
743 u8 outbuf[MC_CMD_NVRAM_TYPES_OUT_LEN];
744 size_t outlen;
745 int rc;
746
747 BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
748
749 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
750 outbuf, sizeof(outbuf), &outlen);
751 if (rc)
752 goto fail;
00bbb4a5
BH		 753 if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
754 rc = -EIO;
afd4aea0 755 goto fail;
00bbb4a5 756 }
afd4aea0
BH		 757
758 *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
759 return 0;
760
761fail:
62776d03
BH		 762 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
763 __func__, rc);
afd4aea0
BH		 764 return rc;
765}
766
767int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
768 size_t *size_out, size_t *erase_size_out,
769 bool *protected_out)
770{
771 u8 inbuf[MC_CMD_NVRAM_INFO_IN_LEN];
772 u8 outbuf[MC_CMD_NVRAM_INFO_OUT_LEN];
773 size_t outlen;
774 int rc;
775
776 MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
777
778 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
779 outbuf, sizeof(outbuf), &outlen);
780 if (rc)
781 goto fail;
00bbb4a5
BH		 782 if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
783 rc = -EIO;
afd4aea0 784 goto fail;
00bbb4a5 785 }
afd4aea0
BH		 786
787 *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
788 *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
789 *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
790 (1 << MC_CMD_NVRAM_PROTECTED_LBN));
791 return 0;
792
793fail:
62776d03 794 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 795 return rc;
796}
797
798int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
799{
800 u8 inbuf[MC_CMD_NVRAM_UPDATE_START_IN_LEN];
801 int rc;
802
803 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
804
805 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
806
807 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
808 NULL, 0, NULL);
809 if (rc)
810 goto fail;
811
812 return 0;
813
814fail:
62776d03 815 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 816 return rc;
817}
818
819int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
820 loff_t offset, u8 *buffer, size_t length)
821{
822 u8 inbuf[MC_CMD_NVRAM_READ_IN_LEN];
5a27e86b 823 u8 outbuf[MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX)];
afd4aea0
BH		 824 size_t outlen;
825 int rc;
826
827 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
828 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
829 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
830
831 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
832 outbuf, sizeof(outbuf), &outlen);
833 if (rc)
834 goto fail;
835
836 memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
837 return 0;
838
839fail:
62776d03 840 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 841 return rc;
842}
843
844int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
845 loff_t offset, const u8 *buffer, size_t length)
846{
5a27e86b 847 u8 inbuf[MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX)];
afd4aea0
BH		 848 int rc;
849
850 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
851 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
852 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
853 memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
854
855 BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
856
5a27e86b
BH		 857 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
858 ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
afd4aea0
BH		 859 NULL, 0, NULL);
860 if (rc)
861 goto fail;
862
863 return 0;
864
865fail:
62776d03 866 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 867 return rc;
868}
869
870int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
871 loff_t offset, size_t length)
872{
873 u8 inbuf[MC_CMD_NVRAM_ERASE_IN_LEN];
874 int rc;
875
876 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
877 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
878 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
879
880 BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
881
882 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
883 NULL, 0, NULL);
884 if (rc)
885 goto fail;
886
887 return 0;
888
889fail:
62776d03 890 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 891 return rc;
892}
893
894int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
895{
896 u8 inbuf[MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN];
897 int rc;
898
899 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
900
901 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
902
903 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
904 NULL, 0, NULL);
905 if (rc)
906 goto fail;
907
908 return 0;
909
910fail:
62776d03 911 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 912 return rc;
913}
914
2e803407
BH		 915static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
916{
917 u8 inbuf[MC_CMD_NVRAM_TEST_IN_LEN];
918 u8 outbuf[MC_CMD_NVRAM_TEST_OUT_LEN];
919 int rc;
920
921 MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
922
923 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
924 outbuf, sizeof(outbuf), NULL);
925 if (rc)
926 return rc;
927
928 switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
929 case MC_CMD_NVRAM_TEST_PASS:
930 case MC_CMD_NVRAM_TEST_NOTSUPP:
931 return 0;
932 default:
933 return -EIO;
934 }
935}
936
937int efx_mcdi_nvram_test_all(struct efx_nic *efx)
938{
939 u32 nvram_types;
940 unsigned int type;
941 int rc;
942
943 rc = efx_mcdi_nvram_types(efx, &nvram_types);
944 if (rc)
b548a988 945 goto fail1;
2e803407
BH		 946
947 type = 0;
948 while (nvram_types != 0) {
949 if (nvram_types & 1) {
950 rc = efx_mcdi_nvram_test(efx, type);
951 if (rc)
b548a988 952 goto fail2;
2e803407
BH		 953 }
954 type++;
955 nvram_types >>= 1;
956 }
957
958 return 0;
b548a988
BH		 959
960fail2:
62776d03
BH		 961 netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
962 __func__, type);
b548a988 963fail1:
62776d03 964 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
b548a988 965 return rc;
2e803407
BH		 966}
967
8b2103ad 968static int efx_mcdi_read_assertion(struct efx_nic *efx)
afd4aea0 969{
8b2103ad
SH		 970 u8 inbuf[MC_CMD_GET_ASSERTS_IN_LEN];
971 u8 outbuf[MC_CMD_GET_ASSERTS_OUT_LEN];
afd4aea0
BH		 972 unsigned int flags, index, ofst;
973 const char *reason;
974 size_t outlen;
975 int retry;
976 int rc;
977
8b2103ad
SH		 978 /* Attempt to read any stored assertion state before we reboot
979 * the mcfw out of the assertion handler. Retry twice, once
afd4aea0
BH		 980 * because a boot-time assertion might cause this command to fail
981 * with EINTR. And once again because GET_ASSERTS can race with
982 * MC_CMD_REBOOT running on the other port. */
983 retry = 2;
984 do {
8b2103ad 985 MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
afd4aea0 986 rc = efx_mcdi_rpc(efx, MC_CMD_GET_ASSERTS,
8b2103ad
SH		 987 inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
988 outbuf, sizeof(outbuf), &outlen);
afd4aea0
BH		 989 } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
990
991 if (rc)
992 return rc;
993 if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
00bbb4a5 994 return -EIO;
afd4aea0 995
8b2103ad
SH		 996 /* Print out any recorded assertion state */
997 flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
afd4aea0
BH		 998 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
999 return 0;
1000
afd4aea0
BH		 1001 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1002 ? "system-level assertion"
1003 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1004 ? "thread-level assertion"
1005 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1006 ? "watchdog reset"
1007 : "unknown assertion";
62776d03
BH		 1008 netif_err(efx, hw, efx->net_dev,
1009 "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
1010 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1011 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
afd4aea0
BH		 1012
1013 /* Print out the registers */
1014 ofst = MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST;
1015 for (index = 1; index < 32; index++) {
62776d03 1016 netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n", index,
8b2103ad 1017 MCDI_DWORD2(outbuf, ofst));
afd4aea0
BH		 1018 ofst += sizeof(efx_dword_t);
1019 }
1020
1021 return 0;
1022}
1023
8b2103ad
SH		 1024static void efx_mcdi_exit_assertion(struct efx_nic *efx)
1025{
1026 u8 inbuf[MC_CMD_REBOOT_IN_LEN];
1027
1028 /* Atomically reboot the mcfw out of the assertion handler */
1029 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1030 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
1031 MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
1032 efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
1033 NULL, 0, NULL);
1034}
1035
1036int efx_mcdi_handle_assertion(struct efx_nic *efx)
1037{
1038 int rc;
1039
1040 rc = efx_mcdi_read_assertion(efx);
1041 if (rc)
1042 return rc;
1043
1044 efx_mcdi_exit_assertion(efx);
1045
1046 return 0;
1047}
1048
afd4aea0
BH		 1049void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
1050{
1051 u8 inbuf[MC_CMD_SET_ID_LED_IN_LEN];
1052 int rc;
1053
1054 BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
1055 BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
1056 BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
1057
1058 BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
1059
1060 MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
1061
1062 rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
1063 NULL, 0, NULL);
1064 if (rc)
62776d03
BH		 1065 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1066 __func__, rc);
afd4aea0
BH		 1067}
1068
1069int efx_mcdi_reset_port(struct efx_nic *efx)
1070{
1071 int rc = efx_mcdi_rpc(efx, MC_CMD_PORT_RESET, NULL, 0, NULL, 0, NULL);
1072 if (rc)
62776d03
BH		 1073 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1074 __func__, rc);
afd4aea0
BH		 1075 return rc;
1076}
1077
1078int efx_mcdi_reset_mc(struct efx_nic *efx)
1079{
1080 u8 inbuf[MC_CMD_REBOOT_IN_LEN];
1081 int rc;
1082
1083 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1084 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
1085 rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
1086 NULL, 0, NULL);
1087 /* White is black, and up is down */
1088 if (rc == -EIO)
1089 return 0;
1090 if (rc == 0)
1091 rc = -EIO;
62776d03 1092 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 1093 return rc;
1094}
1095
d215697f 1096static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
1097 const u8 *mac, int *id_out)
afd4aea0
BH		 1098{
1099 u8 inbuf[MC_CMD_WOL_FILTER_SET_IN_LEN];
1100 u8 outbuf[MC_CMD_WOL_FILTER_SET_OUT_LEN];
1101 size_t outlen;
1102 int rc;
1103
1104 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
1105 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
1106 MC_CMD_FILTER_MODE_SIMPLE);
1107 memcpy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac, ETH_ALEN);
1108
1109 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
1110 outbuf, sizeof(outbuf), &outlen);
1111 if (rc)
1112 goto fail;
1113
1114 if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
00bbb4a5 1115 rc = -EIO;
afd4aea0
BH		 1116 goto fail;
1117 }
1118
1119 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
1120
1121 return 0;
1122
1123fail:
1124 *id_out = -1;
62776d03 1125 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 1126 return rc;
1127
1128}
1129
1130
1131int
1132efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
1133{
1134 return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
1135}
1136
1137
1138int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
1139{
1140 u8 outbuf[MC_CMD_WOL_FILTER_GET_OUT_LEN];
1141 size_t outlen;
1142 int rc;
1143
1144 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
1145 outbuf, sizeof(outbuf), &outlen);
1146 if (rc)
1147 goto fail;
1148
1149 if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
00bbb4a5 1150 rc = -EIO;
afd4aea0
BH		 1151 goto fail;
1152 }
1153
1154 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
1155
1156 return 0;
1157
1158fail:
1159 *id_out = -1;
62776d03 1160 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 1161 return rc;
1162}
1163
1164
1165int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
1166{
1167 u8 inbuf[MC_CMD_WOL_FILTER_REMOVE_IN_LEN];
1168 int rc;
1169
1170 MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
1171
1172 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
1173 NULL, 0, NULL);
1174 if (rc)
1175 goto fail;
1176
1177 return 0;
1178
1179fail:
62776d03 1180 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 1181 return rc;
1182}
1183
1184
1185int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
1186{
1187 int rc;
1188
1189 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
1190 if (rc)
1191 goto fail;
1192
1193 return 0;
1194
1195fail:
62776d03 1196 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 1197 return rc;
1198}
1199
Linux 6.x block layer and io_uring tree(s)