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zd1201: treat firmware data as const
[linux-2.6-block.git] / drivers / net / saa9730.c
CommitLineData
1da177e4 1/*
05d9c84d
RB		 2 * Copyright (C) 2000, 2005 MIPS Technologies, Inc. All rights reserved.
3 * Authors: Carsten Langgaard <carstenl@mips.com>
4 * Maciej W. Rozycki <macro@mips.com>
5 * Copyright (C) 2004 Ralf Baechle <ralf@linux-mips.org>
1da177e4
LT		 6 *
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 *
1da177e4
LT		 20 * SAA9730 ethernet driver.
21 *
22 * Changes:
05d9c84d
RB		 23 * Angelo Dell'Aera <buffer@antifork.org> : Conversion to the new PCI API
24 * (pci_driver).
25 * Conversion to spinlocks.
26 * Error handling fixes.
1da177e4
LT		 27 */
28
29#include <linux/init.h>
30#include <linux/netdevice.h>
31#include <linux/delay.h>
32#include <linux/etherdevice.h>
33#include <linux/module.h>
34#include <linux/skbuff.h>
35#include <linux/pci.h>
36#include <linux/spinlock.h>
05d9c84d 37#include <linux/types.h>
1da177e4
LT		 38
39#include <asm/addrspace.h>
05d9c84d
RB		 40#include <asm/io.h>
41
1da177e4
LT		 42#include <asm/mips-boards/prom.h>
43
44#include "saa9730.h"
45
46#ifdef LAN_SAA9730_DEBUG
47int lan_saa9730_debug = LAN_SAA9730_DEBUG;
48#else
49int lan_saa9730_debug;
50#endif
51
52#define DRV_MODULE_NAME "saa9730"
53
54static struct pci_device_id saa9730_pci_tbl[] = {
05d9c84d 55 { PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730,
62ff0d0a 56 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
1da177e4
LT		 57 { 0, }
58};
59
60MODULE_DEVICE_TABLE(pci, saa9730_pci_tbl);
61
62/* Non-zero only if the current card is a PCI with BIOS-set IRQ. */
63static unsigned int pci_irq_line;
64
1da177e4
LT		 65static void evm_saa9730_enable_lan_int(struct lan_saa9730_private *lp)
66{
69a43ac0
RB		 67 writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) | EVM_LAN_INT,
68 &lp->evm_saa9730_regs->InterruptBlock1);
69 writel(readl(&lp->evm_saa9730_regs->InterruptStatus1) | EVM_LAN_INT,
70 &lp->evm_saa9730_regs->InterruptStatus1);
71 writel(readl(&lp->evm_saa9730_regs->InterruptEnable1) | EVM_LAN_INT |
72 EVM_MASTER_EN, &lp->evm_saa9730_regs->InterruptEnable1);
1da177e4 73}
05d9c84d 74
1da177e4
LT		 75static void evm_saa9730_disable_lan_int(struct lan_saa9730_private *lp)
76{
69a43ac0
RB		 77 writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) & ~EVM_LAN_INT,
78 &lp->evm_saa9730_regs->InterruptBlock1);
79 writel(readl(&lp->evm_saa9730_regs->InterruptEnable1) & ~EVM_LAN_INT,
80 &lp->evm_saa9730_regs->InterruptEnable1);
1da177e4
LT		 81}
82
83static void evm_saa9730_clear_lan_int(struct lan_saa9730_private *lp)
84{
69a43ac0 85 writel(EVM_LAN_INT, &lp->evm_saa9730_regs->InterruptStatus1);
1da177e4
LT		 86}
87
88static void evm_saa9730_block_lan_int(struct lan_saa9730_private *lp)
89{
69a43ac0
RB		 90 writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) & ~EVM_LAN_INT,
91 &lp->evm_saa9730_regs->InterruptBlock1);
1da177e4
LT		 92}
93
94static void evm_saa9730_unblock_lan_int(struct lan_saa9730_private *lp)
95{
69a43ac0
RB		 96 writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) | EVM_LAN_INT,
97 &lp->evm_saa9730_regs->InterruptBlock1);
1da177e4
LT		 98}
99
b77eb35e 100static void __used show_saa9730_regs(struct net_device *dev)
1da177e4 101{
b77eb35e 102 struct lan_saa9730_private *lp = netdev_priv(dev);
1da177e4 103 int i, j;
b77eb35e 104
05d9c84d
RB		 105 printk("TxmBufferA = %p\n", lp->TxmBuffer[0][0]);
106 printk("TxmBufferB = %p\n", lp->TxmBuffer[1][0]);
107 printk("RcvBufferA = %p\n", lp->RcvBuffer[0][0]);
108 printk("RcvBufferB = %p\n", lp->RcvBuffer[1][0]);
b77eb35e 109
1da177e4
LT		 110 for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
111 for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
112 printk("TxmBuffer[%d][%d] = %x\n", i, j,
113 le32_to_cpu(*(unsigned int *)
114 lp->TxmBuffer[i][j]));
115 }
116 }
117 for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
118 for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
119 printk("RcvBuffer[%d][%d] = %x\n", i, j,
120 le32_to_cpu(*(unsigned int *)
121 lp->RcvBuffer[i][j]));
122 }
123 }
124 printk("lp->evm_saa9730_regs->InterruptBlock1 = %x\n",
05d9c84d 125 readl(&lp->evm_saa9730_regs->InterruptBlock1));
1da177e4 126 printk("lp->evm_saa9730_regs->InterruptStatus1 = %x\n",
05d9c84d 127 readl(&lp->evm_saa9730_regs->InterruptStatus1));
1da177e4 128 printk("lp->evm_saa9730_regs->InterruptEnable1 = %x\n",
05d9c84d 129 readl(&lp->evm_saa9730_regs->InterruptEnable1));
1da177e4 130 printk("lp->lan_saa9730_regs->Ok2Use = %x\n",
05d9c84d 131 readl(&lp->lan_saa9730_regs->Ok2Use));
1da177e4
LT		 132 printk("lp->NextTxmBufferIndex = %x\n", lp->NextTxmBufferIndex);
133 printk("lp->NextTxmPacketIndex = %x\n", lp->NextTxmPacketIndex);
134 printk("lp->PendingTxmBufferIndex = %x\n",
135 lp->PendingTxmBufferIndex);
136 printk("lp->PendingTxmPacketIndex = %x\n",
137 lp->PendingTxmPacketIndex);
138 printk("lp->lan_saa9730_regs->LanDmaCtl = %x\n",
05d9c84d 139 readl(&lp->lan_saa9730_regs->LanDmaCtl));
1da177e4 140 printk("lp->lan_saa9730_regs->DmaStatus = %x\n",
05d9c84d 141 readl(&lp->lan_saa9730_regs->DmaStatus));
1da177e4 142 printk("lp->lan_saa9730_regs->CamCtl = %x\n",
05d9c84d 143 readl(&lp->lan_saa9730_regs->CamCtl));
1da177e4 144 printk("lp->lan_saa9730_regs->TxCtl = %x\n",
05d9c84d 145 readl(&lp->lan_saa9730_regs->TxCtl));
1da177e4 146 printk("lp->lan_saa9730_regs->TxStatus = %x\n",
05d9c84d 147 readl(&lp->lan_saa9730_regs->TxStatus));
1da177e4 148 printk("lp->lan_saa9730_regs->RxCtl = %x\n",
05d9c84d 149 readl(&lp->lan_saa9730_regs->RxCtl));
1da177e4 150 printk("lp->lan_saa9730_regs->RxStatus = %x\n",
05d9c84d 151 readl(&lp->lan_saa9730_regs->RxStatus));
b77eb35e 152
1da177e4 153 for (i = 0; i < LAN_SAA9730_CAM_DWORDS; i++) {
69a43ac0 154 writel(i, &lp->lan_saa9730_regs->CamAddress);
1da177e4 155 printk("lp->lan_saa9730_regs->CamData = %x\n",
05d9c84d 156 readl(&lp->lan_saa9730_regs->CamData));
1da177e4 157 }
b77eb35e 158
09f75cd7
JG		 159 printk("dev->stats.tx_packets = %lx\n", dev->stats.tx_packets);
160 printk("dev->stats.tx_errors = %lx\n", dev->stats.tx_errors);
161 printk("dev->stats.tx_aborted_errors = %lx\n",
162 dev->stats.tx_aborted_errors);
163 printk("dev->stats.tx_window_errors = %lx\n",
164 dev->stats.tx_window_errors);
165 printk("dev->stats.tx_carrier_errors = %lx\n",
166 dev->stats.tx_carrier_errors);
167 printk("dev->stats.tx_fifo_errors = %lx\n",
168 dev->stats.tx_fifo_errors);
169 printk("dev->stats.tx_heartbeat_errors = %lx\n",
170 dev->stats.tx_heartbeat_errors);
171 printk("dev->stats.collisions = %lx\n", dev->stats.collisions);
172
173 printk("dev->stats.rx_packets = %lx\n", dev->stats.rx_packets);
174 printk("dev->stats.rx_errors = %lx\n", dev->stats.rx_errors);
175 printk("dev->stats.rx_dropped = %lx\n", dev->stats.rx_dropped);
176 printk("dev->stats.rx_crc_errors = %lx\n", dev->stats.rx_crc_errors);
177 printk("dev->stats.rx_frame_errors = %lx\n",
178 dev->stats.rx_frame_errors);
179 printk("dev->stats.rx_fifo_errors = %lx\n",
180 dev->stats.rx_fifo_errors);
181 printk("dev->stats.rx_length_errors = %lx\n",
182 dev->stats.rx_length_errors);
1da177e4
LT		 183
184 printk("lp->lan_saa9730_regs->DebugPCIMasterAddr = %x\n",
05d9c84d 185 readl(&lp->lan_saa9730_regs->DebugPCIMasterAddr));
1da177e4 186 printk("lp->lan_saa9730_regs->DebugLanTxStateMachine = %x\n",
05d9c84d 187 readl(&lp->lan_saa9730_regs->DebugLanTxStateMachine));
1da177e4 188 printk("lp->lan_saa9730_regs->DebugLanRxStateMachine = %x\n",
05d9c84d 189 readl(&lp->lan_saa9730_regs->DebugLanRxStateMachine));
1da177e4 190 printk("lp->lan_saa9730_regs->DebugLanTxFifoPointers = %x\n",
05d9c84d 191 readl(&lp->lan_saa9730_regs->DebugLanTxFifoPointers));
1da177e4 192 printk("lp->lan_saa9730_regs->DebugLanRxFifoPointers = %x\n",
05d9c84d 193 readl(&lp->lan_saa9730_regs->DebugLanRxFifoPointers));
1da177e4 194 printk("lp->lan_saa9730_regs->DebugLanCtlStateMachine = %x\n",
05d9c84d 195 readl(&lp->lan_saa9730_regs->DebugLanCtlStateMachine));
1da177e4
LT		 196}
197
198static void lan_saa9730_buffer_init(struct lan_saa9730_private *lp)
199{
200 int i, j;
201
202 /* Init RX buffers */
203 for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
204 for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
205 *(unsigned int *) lp->RcvBuffer[i][j] =
206 cpu_to_le32(RXSF_READY <<
207 RX_STAT_CTL_OWNER_SHF);
208 }
209 }
210
211 /* Init TX buffers */
212 for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
213 for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
214 *(unsigned int *) lp->TxmBuffer[i][j] =
215 cpu_to_le32(TXSF_EMPTY <<
216 TX_STAT_CTL_OWNER_SHF);
217 }
218 }
219}
220
05d9c84d
RB		 221static void lan_saa9730_free_buffers(struct pci_dev *pdev,
222 struct lan_saa9730_private *lp)
223{
224 pci_free_consistent(pdev, lp->buffer_size, lp->buffer_start,
225 lp->dma_addr);
226}
227
228static int lan_saa9730_allocate_buffers(struct pci_dev *pdev,
229 struct lan_saa9730_private *lp)
1da177e4 230{
1da177e4 231 void *Pa;
05d9c84d
RB		 232 unsigned int i, j, rxoffset, txoffset;
233 int ret;
234
235 /* Initialize buffer space */
236 lp->DmaRcvPackets = LAN_SAA9730_RCV_Q_SIZE;
237 lp->DmaTxmPackets = LAN_SAA9730_TXM_Q_SIZE;
238
239 /* Initialize Rx Buffer Index */
240 lp->NextRcvPacketIndex = 0;
241 lp->NextRcvBufferIndex = 0;
242
243 /* Set current buffer index & next available packet index */
244 lp->NextTxmPacketIndex = 0;
245 lp->NextTxmBufferIndex = 0;
246 lp->PendingTxmPacketIndex = 0;
247 lp->PendingTxmBufferIndex = 0;
1da177e4 248
62ff0d0a
RB		 249 /*
250 * Allocate all RX and TX packets in one chunk.
1da177e4
LT		 251 * The Rx and Tx packets must be PACKET_SIZE aligned.
252 */
05d9c84d
RB		 253 lp->buffer_size = ((LAN_SAA9730_RCV_Q_SIZE + LAN_SAA9730_TXM_Q_SIZE) *
254 LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_BUFFERS) +
255 LAN_SAA9730_PACKET_SIZE;
256 lp->buffer_start = pci_alloc_consistent(pdev, lp->buffer_size,
257 &lp->dma_addr);
258 if (!lp->buffer_start) {
259 ret = -ENOMEM;
260 goto out;
261 }
1da177e4 262
05d9c84d
RB		 263 Pa = (void *)ALIGN((unsigned long)lp->buffer_start,
264 LAN_SAA9730_PACKET_SIZE);
1da177e4 265
05d9c84d 266 rxoffset = Pa - lp->buffer_start;
1da177e4
LT		 267
268 /* Init RX buffers */
269 for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
270 for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
271 *(unsigned int *) Pa =
272 cpu_to_le32(RXSF_READY <<
273 RX_STAT_CTL_OWNER_SHF);
05d9c84d
RB		 274 lp->RcvBuffer[i][j] = Pa;
275 Pa += LAN_SAA9730_PACKET_SIZE;
1da177e4
LT		 276 }
277 }
278
05d9c84d
RB		 279 txoffset = Pa - lp->buffer_start;
280
1da177e4
LT		 281 /* Init TX buffers */
282 for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
283 for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
284 *(unsigned int *) Pa =
285 cpu_to_le32(TXSF_EMPTY <<
286 TX_STAT_CTL_OWNER_SHF);
05d9c84d
RB		 287 lp->TxmBuffer[i][j] = Pa;
288 Pa += LAN_SAA9730_PACKET_SIZE;
1da177e4
LT		 289 }
290 }
291
62ff0d0a
RB		 292 /*
293 * Set rx buffer A and rx buffer B to point to the first two buffer
1da177e4
LT		 294 * spaces.
295 */
69a43ac0
RB		 296 writel(lp->dma_addr + rxoffset, &lp->lan_saa9730_regs->RxBuffA);
297 writel(lp->dma_addr + rxoffset +
298 LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_RCV_Q_SIZE,
299 &lp->lan_saa9730_regs->RxBuffB);
1da177e4 300
62ff0d0a 301 /*
1da177e4 302 * Set txm_buf_a and txm_buf_b to point to the first two buffer
62ff0d0a 303 * space
1da177e4 304 */
69a43ac0
RB		 305 writel(lp->dma_addr + txoffset,
306 &lp->lan_saa9730_regs->TxBuffA);
307 writel(lp->dma_addr + txoffset +
308 LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_TXM_Q_SIZE,
309 &lp->lan_saa9730_regs->TxBuffB);
1da177e4
LT		 310
311 /* Set packet number */
69a43ac0
RB		 312 writel((lp->DmaRcvPackets << PK_COUNT_RX_A_SHF) |
313 (lp->DmaRcvPackets << PK_COUNT_RX_B_SHF) |
314 (lp->DmaTxmPackets << PK_COUNT_TX_A_SHF) |
315 (lp->DmaTxmPackets << PK_COUNT_TX_B_SHF),
316 &lp->lan_saa9730_regs->PacketCount);
1da177e4
LT		 317
318 return 0;
05d9c84d
RB		 319
320out:
321 return ret;
1da177e4
LT		 322}
323
324static int lan_saa9730_cam_load(struct lan_saa9730_private *lp)
325{
326 unsigned int i;
327 unsigned char *NetworkAddress;
328
329 NetworkAddress = (unsigned char *) &lp->PhysicalAddress[0][0];
330
331 for (i = 0; i < LAN_SAA9730_CAM_DWORDS; i++) {
332 /* First set address to where data is written */
69a43ac0
RB		 333 writel(i, &lp->lan_saa9730_regs->CamAddress);
334 writel((NetworkAddress[0] << 24) | (NetworkAddress[1] << 16) |
335 (NetworkAddress[2] << 8) | NetworkAddress[3],
336 &lp->lan_saa9730_regs->CamData);
1da177e4
LT		 337 NetworkAddress += 4;
338 }
339 return 0;
340}
341
342static int lan_saa9730_cam_init(struct net_device *dev)
343{
05d9c84d 344 struct lan_saa9730_private *lp = netdev_priv(dev);
1da177e4
LT		 345 unsigned int i;
346
347 /* Copy MAC-address into all entries. */
348 for (i = 0; i < LAN_SAA9730_CAM_ENTRIES; i++) {
349 memcpy((unsigned char *) lp->PhysicalAddress[i],
350 (unsigned char *) dev->dev_addr, 6);
351 }
352
353 return 0;
354}
355
356static int lan_saa9730_mii_init(struct lan_saa9730_private *lp)
357{
358 int i, l;
359
360 /* Check link status, spin here till station is not busy. */
361 i = 0;
05d9c84d 362 while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) & MD_CA_BUSY) {
1da177e4
LT		 363 i++;
364 if (i > 100) {
365 printk("Error: lan_saa9730_mii_init: timeout\n");
366 return -1;
367 }
368 mdelay(1); /* wait 1 ms. */
369 }
370
371 /* Now set the control and address register. */
69a43ac0
RB		 372 writel(MD_CA_BUSY | PHY_STATUS | PHY_ADDRESS << MD_CA_PHY_SHF,
373 &lp->lan_saa9730_regs->StationMgmtCtl);
1da177e4
LT		 374
375 /* check link status, spin here till station is not busy */
376 i = 0;
05d9c84d 377 while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) & MD_CA_BUSY) {
1da177e4
LT		 378 i++;
379 if (i > 100) {
380 printk("Error: lan_saa9730_mii_init: timeout\n");
381 return -1;
382 }
383 mdelay(1); /* wait 1 ms. */
384 }
385
386 /* Wait for 1 ms. */
387 mdelay(1);
388
389 /* Check the link status. */
05d9c84d 390 if (readl(&lp->lan_saa9730_regs->StationMgmtData) &
1da177e4
LT		 391 PHY_STATUS_LINK_UP) {
392 /* Link is up. */
393 return 0;
394 } else {
395 /* Link is down, reset the PHY first. */
396
397 /* set PHY address = 'CONTROL' */
69a43ac0
RB		 398 writel(PHY_ADDRESS << MD_CA_PHY_SHF | MD_CA_WR | PHY_CONTROL,
399 &lp->lan_saa9730_regs->StationMgmtCtl);
1da177e4
LT		 400
401 /* Wait for 1 ms. */
402 mdelay(1);
403
404 /* set 'CONTROL' = force reset and renegotiate */
69a43ac0
RB		 405 writel(PHY_CONTROL_RESET | PHY_CONTROL_AUTO_NEG |
406 PHY_CONTROL_RESTART_AUTO_NEG,
407 &lp->lan_saa9730_regs->StationMgmtData);
1da177e4
LT		 408
409 /* Wait for 50 ms. */
410 mdelay(50);
411
412 /* set 'BUSY' to start operation */
69a43ac0
RB		 413 writel(MD_CA_BUSY | PHY_ADDRESS << MD_CA_PHY_SHF | MD_CA_WR |
414 PHY_CONTROL, &lp->lan_saa9730_regs->StationMgmtCtl);
1da177e4
LT		 415
416 /* await completion */
417 i = 0;
05d9c84d 418 while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) &
1da177e4
LT		 419 MD_CA_BUSY) {
420 i++;
421 if (i > 100) {
422 printk
423 ("Error: lan_saa9730_mii_init: timeout\n");
424 return -1;
425 }
426 mdelay(1); /* wait 1 ms. */
427 }
428
429 /* Wait for 1 ms. */
430 mdelay(1);
431
432 for (l = 0; l < 2; l++) {
433 /* set PHY address = 'STATUS' */
69a43ac0
RB		 434 writel(MD_CA_BUSY | PHY_ADDRESS << MD_CA_PHY_SHF |
435 PHY_STATUS,
436 &lp->lan_saa9730_regs->StationMgmtCtl);
1da177e4
LT		 437
438 /* await completion */
439 i = 0;
05d9c84d 440 while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) &
1da177e4
LT		 441 MD_CA_BUSY) {
442 i++;
443 if (i > 100) {
444 printk
445 ("Error: lan_saa9730_mii_init: timeout\n");
446 return -1;
447 }
448 mdelay(1); /* wait 1 ms. */
449 }
450
451 /* wait for 3 sec. */
452 mdelay(3000);
453
454 /* check the link status */
05d9c84d 455 if (readl(&lp->lan_saa9730_regs->StationMgmtData) &
1da177e4
LT		 456 PHY_STATUS_LINK_UP) {
457 /* link is up */
458 break;
459 }
460 }
461 }
462
463 return 0;
464}
465
466static int lan_saa9730_control_init(struct lan_saa9730_private *lp)
467{
468 /* Initialize DMA control register. */
69a43ac0
RB		 469 writel((LANMB_ANY << DMA_CTL_MAX_XFER_SHF) |
470 (LANEND_LITTLE << DMA_CTL_ENDIAN_SHF) |
471 (LAN_SAA9730_RCV_Q_INT_THRESHOLD << DMA_CTL_RX_INT_COUNT_SHF)
472 | DMA_CTL_RX_INT_TO_EN | DMA_CTL_RX_INT_EN |
473 DMA_CTL_MAC_RX_INT_EN | DMA_CTL_MAC_TX_INT_EN,
474 &lp->lan_saa9730_regs->LanDmaCtl);
1da177e4
LT		 475
476 /* Initial MAC control register. */
69a43ac0
RB		 477 writel((MACCM_MII << MAC_CONTROL_CONN_SHF) | MAC_CONTROL_FULL_DUP,
478 &lp->lan_saa9730_regs->MacCtl);
1da177e4
LT		 479
480 /* Initialize CAM control register. */
69a43ac0
RB		 481 writel(CAM_CONTROL_COMP_EN | CAM_CONTROL_BROAD_ACC,
482 &lp->lan_saa9730_regs->CamCtl);
1da177e4 483
62ff0d0a 484 /*
1da177e4 485 * Initialize CAM enable register, only turn on first entry, should
62ff0d0a 486 * contain own addr.
1da177e4 487 */
69a43ac0 488 writel(0x0001, &lp->lan_saa9730_regs->CamEnable);
1da177e4
LT		 489
490 /* Initialize Tx control register */
69a43ac0 491 writel(TX_CTL_EN_COMP, &lp->lan_saa9730_regs->TxCtl);
1da177e4
LT		 492
493 /* Initialize Rcv control register */
69a43ac0 494 writel(RX_CTL_STRIP_CRC, &lp->lan_saa9730_regs->RxCtl);
1da177e4
LT		 495
496 /* Reset DMA engine */
69a43ac0 497 writel(DMA_TEST_SW_RESET, &lp->lan_saa9730_regs->DmaTest);
1da177e4
LT		 498
499 return 0;
500}
501
502static int lan_saa9730_stop(struct lan_saa9730_private *lp)
503{
504 int i;
505
506 /* Stop DMA first */
69a43ac0
RB		 507 writel(readl(&lp->lan_saa9730_regs->LanDmaCtl) &
508 ~(DMA_CTL_EN_TX_DMA | DMA_CTL_EN_RX_DMA),
509 &lp->lan_saa9730_regs->LanDmaCtl);
1da177e4
LT		 510
511 /* Set the SW Reset bits in DMA and MAC control registers */
69a43ac0
RB		 512 writel(DMA_TEST_SW_RESET, &lp->lan_saa9730_regs->DmaTest);
513 writel(readl(&lp->lan_saa9730_regs->MacCtl) | MAC_CONTROL_RESET,
514 &lp->lan_saa9730_regs->MacCtl);
1da177e4 515
62ff0d0a 516 /*
1da177e4
LT		 517 * Wait for MAC reset to have finished. The reset bit is auto cleared
518 * when the reset is done.
519 */
520 i = 0;
05d9c84d 521 while (readl(&lp->lan_saa9730_regs->MacCtl) & MAC_CONTROL_RESET) {
1da177e4
LT		 522 i++;
523 if (i > 100) {
524 printk
525 ("Error: lan_sa9730_stop: MAC reset timeout\n");
526 return -1;
527 }
528 mdelay(1); /* wait 1 ms. */
529 }
530
531 return 0;
532}
533
534static int lan_saa9730_dma_init(struct lan_saa9730_private *lp)
535{
536 /* Stop lan controller. */
537 lan_saa9730_stop(lp);
538
69a43ac0
RB		 539 writel(LAN_SAA9730_DEFAULT_TIME_OUT_CNT,
540 &lp->lan_saa9730_regs->Timeout);
1da177e4
LT		 541
542 return 0;
543}
544
545static int lan_saa9730_start(struct lan_saa9730_private *lp)
546{
547 lan_saa9730_buffer_init(lp);
548
549 /* Initialize Rx Buffer Index */
550 lp->NextRcvPacketIndex = 0;
05d9c84d 551 lp->NextRcvBufferIndex = 0;
1da177e4 552
05d9c84d 553 /* Set current buffer index & next available packet index */
1da177e4
LT		 554 lp->NextTxmPacketIndex = 0;
555 lp->NextTxmBufferIndex = 0;
556 lp->PendingTxmPacketIndex = 0;
557 lp->PendingTxmBufferIndex = 0;
558
69a43ac0
RB		 559 writel(readl(&lp->lan_saa9730_regs->LanDmaCtl) | DMA_CTL_EN_TX_DMA |
560 DMA_CTL_EN_RX_DMA, &lp->lan_saa9730_regs->LanDmaCtl);
1da177e4
LT		 561
562 /* For Tx, turn on MAC then DMA */
69a43ac0
RB		 563 writel(readl(&lp->lan_saa9730_regs->TxCtl) | TX_CTL_TX_EN,
564 &lp->lan_saa9730_regs->TxCtl);
1da177e4
LT		 565
566 /* For Rx, turn on DMA then MAC */
69a43ac0
RB		 567 writel(readl(&lp->lan_saa9730_regs->RxCtl) | RX_CTL_RX_EN,
568 &lp->lan_saa9730_regs->RxCtl);
1da177e4 569
05d9c84d 570 /* Set Ok2Use to let hardware own the buffers. */
69a43ac0 571 writel(OK2USE_RX_A | OK2USE_RX_B, &lp->lan_saa9730_regs->Ok2Use);
1da177e4
LT		 572
573 return 0;
574}
575
576static int lan_saa9730_restart(struct lan_saa9730_private *lp)
577{
578 lan_saa9730_stop(lp);
579 lan_saa9730_start(lp);
580
581 return 0;
582}
583
584static int lan_saa9730_tx(struct net_device *dev)
585{
05d9c84d 586 struct lan_saa9730_private *lp = netdev_priv(dev);
1da177e4
LT		 587 unsigned int *pPacket;
588 unsigned int tx_status;
589
590 if (lan_saa9730_debug > 5)
591 printk("lan_saa9730_tx interrupt\n");
592
593 /* Clear interrupt. */
69a43ac0 594 writel(DMA_STATUS_MAC_TX_INT, &lp->lan_saa9730_regs->DmaStatus);
1da177e4
LT		 595
596 while (1) {
05d9c84d
RB		 597 pPacket = lp->TxmBuffer[lp->PendingTxmBufferIndex]
598 [lp->PendingTxmPacketIndex];
1da177e4
LT		 599
600 /* Get status of first packet transmitted. */
601 tx_status = le32_to_cpu(*pPacket);
602
603 /* Check ownership. */
604 if ((tx_status & TX_STAT_CTL_OWNER_MSK) !=
605 (TXSF_HWDONE << TX_STAT_CTL_OWNER_SHF)) break;
606
607 /* Check for error. */
608 if (tx_status & TX_STAT_CTL_ERROR_MSK) {
609 if (lan_saa9730_debug > 1)
610 printk("lan_saa9730_tx: tx error = %x\n",
611 tx_status);
612
09f75cd7 613 dev->stats.tx_errors++;
1da177e4
LT		 614 if (tx_status &
615 (TX_STATUS_EX_COLL << TX_STAT_CTL_STATUS_SHF))
09f75cd7 616 dev->stats.tx_aborted_errors++;
1da177e4 617 if (tx_status &
05d9c84d 618 (TX_STATUS_LATE_COLL << TX_STAT_CTL_STATUS_SHF))
09f75cd7 619 dev->stats.tx_window_errors++;
1da177e4
LT		 620 if (tx_status &
621 (TX_STATUS_L_CARR << TX_STAT_CTL_STATUS_SHF))
09f75cd7 622 dev->stats.tx_carrier_errors++;
1da177e4
LT		 623 if (tx_status &
624 (TX_STATUS_UNDER << TX_STAT_CTL_STATUS_SHF))
09f75cd7 625 dev->stats.tx_fifo_errors++;
1da177e4
LT		 626 if (tx_status &
627 (TX_STATUS_SQ_ERR << TX_STAT_CTL_STATUS_SHF))
09f75cd7 628 dev->stats.tx_heartbeat_errors++;
1da177e4 629
09f75cd7 630 dev->stats.collisions +=
05d9c84d 631 tx_status & TX_STATUS_TX_COLL_MSK;
1da177e4
LT		 632 }
633
634 /* Free buffer. */
635 *pPacket =
636 cpu_to_le32(TXSF_EMPTY << TX_STAT_CTL_OWNER_SHF);
637
638 /* Update pending index pointer. */
639 lp->PendingTxmPacketIndex++;
640 if (lp->PendingTxmPacketIndex >= LAN_SAA9730_TXM_Q_SIZE) {
641 lp->PendingTxmPacketIndex = 0;
642 lp->PendingTxmBufferIndex ^= 1;
643 }
644 }
645
05d9c84d
RB		 646 /* The tx buffer is no longer full. */
647 netif_wake_queue(dev);
1da177e4
LT		 648
649 return 0;
650}
651
652static int lan_saa9730_rx(struct net_device *dev)
653{
05d9c84d 654 struct lan_saa9730_private *lp = netdev_priv(dev);
1da177e4
LT		 655 int len = 0;
656 struct sk_buff *skb = 0;
657 unsigned int rx_status;
658 int BufferIndex;
659 int PacketIndex;
660 unsigned int *pPacket;
661 unsigned char *pData;
662
663 if (lan_saa9730_debug > 5)
664 printk("lan_saa9730_rx interrupt\n");
665
666 /* Clear receive interrupts. */
69a43ac0
RB		 667 writel(DMA_STATUS_MAC_RX_INT | DMA_STATUS_RX_INT |
668 DMA_STATUS_RX_TO_INT, &lp->lan_saa9730_regs->DmaStatus);
1da177e4
LT		 669
670 /* Address next packet */
05d9c84d 671 BufferIndex = lp->NextRcvBufferIndex;
1da177e4 672 PacketIndex = lp->NextRcvPacketIndex;
05d9c84d 673 pPacket = lp->RcvBuffer[BufferIndex][PacketIndex];
1da177e4
LT		 674 rx_status = le32_to_cpu(*pPacket);
675
676 /* Process each packet. */
677 while ((rx_status & RX_STAT_CTL_OWNER_MSK) ==
678 (RXSF_HWDONE << RX_STAT_CTL_OWNER_SHF)) {
679 /* Check the rx status. */
680 if (rx_status & (RX_STATUS_GOOD << RX_STAT_CTL_STATUS_SHF)) {
681 /* Received packet is good. */
682 len = (rx_status & RX_STAT_CTL_LENGTH_MSK) >>
683 RX_STAT_CTL_LENGTH_SHF;
684
685 pData = (unsigned char *) pPacket;
686 pData += 4;
687 skb = dev_alloc_skb(len + 2);
688 if (skb == 0) {
689 printk
690 ("%s: Memory squeeze, deferring packet.\n",
691 dev->name);
09f75cd7 692 dev->stats.rx_dropped++;
1da177e4 693 } else {
09f75cd7
JG		 694 dev->stats.rx_bytes += len;
695 dev->stats.rx_packets++;
1da177e4
LT		 696 skb_reserve(skb, 2); /* 16 byte align */
697 skb_put(skb, len); /* make room */
8c7b7faa 698 skb_copy_to_linear_data(skb,
1da177e4 699 (unsigned char *) pData,
8c7b7faa 700 len);
1da177e4
LT		 701 skb->protocol = eth_type_trans(skb, dev);
702 netif_rx(skb);
703 dev->last_rx = jiffies;
704 }
705 } else {
706 /* We got an error packet. */
707 if (lan_saa9730_debug > 2)
708 printk
709 ("lan_saa9730_rx: We got an error packet = %x\n",
710 rx_status);
711
09f75cd7 712 dev->stats.rx_errors++;
1da177e4
LT		 713 if (rx_status &
714 (RX_STATUS_CRC_ERR << RX_STAT_CTL_STATUS_SHF))
09f75cd7 715 dev->stats.rx_crc_errors++;
1da177e4 716 if (rx_status &
05d9c84d 717 (RX_STATUS_ALIGN_ERR << RX_STAT_CTL_STATUS_SHF))
09f75cd7 718 dev->stats.rx_frame_errors++;
1da177e4
LT		 719 if (rx_status &
720 (RX_STATUS_OVERFLOW << RX_STAT_CTL_STATUS_SHF))
09f75cd7 721 dev->stats.rx_fifo_errors++;
1da177e4
LT		 722 if (rx_status &
723 (RX_STATUS_LONG_ERR << RX_STAT_CTL_STATUS_SHF))
09f75cd7 724 dev->stats.rx_length_errors++;
1da177e4
LT		 725 }
726
727 /* Indicate we have processed the buffer. */
05d9c84d
RB		 728 *pPacket = cpu_to_le32(RXSF_READY << RX_STAT_CTL_OWNER_SHF);
729
730 /* Make sure A or B is available to hardware as appropriate. */
69a43ac0
RB		 731 writel(BufferIndex ? OK2USE_RX_B : OK2USE_RX_A,
732 &lp->lan_saa9730_regs->Ok2Use);
1da177e4
LT		 733
734 /* Go to next packet in sequence. */
735 lp->NextRcvPacketIndex++;
736 if (lp->NextRcvPacketIndex >= LAN_SAA9730_RCV_Q_SIZE) {
737 lp->NextRcvPacketIndex = 0;
05d9c84d 738 lp->NextRcvBufferIndex ^= 1;
1da177e4 739 }
1da177e4
LT		 740
741 /* Address next packet */
05d9c84d 742 BufferIndex = lp->NextRcvBufferIndex;
1da177e4 743 PacketIndex = lp->NextRcvPacketIndex;
05d9c84d 744 pPacket = lp->RcvBuffer[BufferIndex][PacketIndex];
1da177e4
LT		 745 rx_status = le32_to_cpu(*pPacket);
746 }
747
1da177e4
LT		 748 return 0;
749}
750
7d12e780 751static irqreturn_t lan_saa9730_interrupt(const int irq, void *dev_id)
1da177e4 752{
c31f28e7 753 struct net_device *dev = dev_id;
05d9c84d 754 struct lan_saa9730_private *lp = netdev_priv(dev);
1da177e4
LT		 755
756 if (lan_saa9730_debug > 5)
757 printk("lan_saa9730_interrupt\n");
758
759 /* Disable the EVM LAN interrupt. */
760 evm_saa9730_block_lan_int(lp);
761
762 /* Clear the EVM LAN interrupt. */
763 evm_saa9730_clear_lan_int(lp);
764
765 /* Service pending transmit interrupts. */
05d9c84d 766 if (readl(&lp->lan_saa9730_regs->DmaStatus) & DMA_STATUS_MAC_TX_INT)
1da177e4
LT		 767 lan_saa9730_tx(dev);
768
769 /* Service pending receive interrupts. */
05d9c84d 770 if (readl(&lp->lan_saa9730_regs->DmaStatus) &
1da177e4
LT		 771 (DMA_STATUS_MAC_RX_INT | DMA_STATUS_RX_INT |
772 DMA_STATUS_RX_TO_INT)) lan_saa9730_rx(dev);
773
774 /* Enable the EVM LAN interrupt. */
775 evm_saa9730_unblock_lan_int(lp);
776
777 return IRQ_HANDLED;
778}
779
1da177e4
LT		 780static int lan_saa9730_open(struct net_device *dev)
781{
05d9c84d 782 struct lan_saa9730_private *lp = netdev_priv(dev);
1da177e4
LT		 783
784 /* Associate IRQ with lan_saa9730_interrupt */
785 if (request_irq(dev->irq, &lan_saa9730_interrupt, 0, "SAA9730 Eth",
786 dev)) {
787 printk("lan_saa9730_open: Can't get irq %d\n", dev->irq);
788 return -EAGAIN;
789 }
790
791 /* Enable the Lan interrupt in the event manager. */
792 evm_saa9730_enable_lan_int(lp);
793
794 /* Start the LAN controller */
795 if (lan_saa9730_start(lp))
796 return -1;
797
798 netif_start_queue(dev);
799
800 return 0;
801}
802
803static int lan_saa9730_write(struct lan_saa9730_private *lp,
804 struct sk_buff *skb, int skblen)
805{
806 unsigned char *pbData = skb->data;
807 unsigned int len = skblen;
808 unsigned char *pbPacketData;
809 unsigned int tx_status;
810 int BufferIndex;
811 int PacketIndex;
812
813 if (lan_saa9730_debug > 5)
05d9c84d 814 printk("lan_saa9730_write: skb=%p\n", skb);
1da177e4
LT		 815
816 BufferIndex = lp->NextTxmBufferIndex;
817 PacketIndex = lp->NextTxmPacketIndex;
818
05d9c84d
RB		 819 tx_status = le32_to_cpu(*(unsigned int *)lp->TxmBuffer[BufferIndex]
820 [PacketIndex]);
1da177e4
LT		 821 if ((tx_status & TX_STAT_CTL_OWNER_MSK) !=
822 (TXSF_EMPTY << TX_STAT_CTL_OWNER_SHF)) {
823 if (lan_saa9730_debug > 4)
824 printk
825 ("lan_saa9730_write: Tx buffer not available: tx_status = %x\n",
826 tx_status);
827 return -1;
828 }
829
830 lp->NextTxmPacketIndex++;
831 if (lp->NextTxmPacketIndex >= LAN_SAA9730_TXM_Q_SIZE) {
832 lp->NextTxmPacketIndex = 0;
833 lp->NextTxmBufferIndex ^= 1;
834 }
835
05d9c84d 836 pbPacketData = lp->TxmBuffer[BufferIndex][PacketIndex];
1da177e4
LT		 837 pbPacketData += 4;
838
839 /* copy the bits */
840 memcpy(pbPacketData, pbData, len);
841
842 /* Set transmit status for hardware */
05d9c84d
RB		 843 *(unsigned int *)lp->TxmBuffer[BufferIndex][PacketIndex] =
844 cpu_to_le32((TXSF_READY << TX_STAT_CTL_OWNER_SHF) |
845 (TX_STAT_CTL_INT_AFTER_TX <<
846 TX_STAT_CTL_FRAME_SHF) |
847 (len << TX_STAT_CTL_LENGTH_SHF));
848
849 /* Make sure A or B is available to hardware as appropriate. */
69a43ac0
RB		 850 writel(BufferIndex ? OK2USE_TX_B : OK2USE_TX_A,
851 &lp->lan_saa9730_regs->Ok2Use);
1da177e4
LT		 852
853 return 0;
854}
855
856static void lan_saa9730_tx_timeout(struct net_device *dev)
857{
05d9c84d 858 struct lan_saa9730_private *lp = netdev_priv(dev);
1da177e4
LT		 859
860 /* Transmitter timeout, serious problems */
09f75cd7 861 dev->stats.tx_errors++;
1da177e4 862 printk("%s: transmit timed out, reset\n", dev->name);
b77eb35e 863 /*show_saa9730_regs(dev); */
1da177e4
LT		 864 lan_saa9730_restart(lp);
865
866 dev->trans_start = jiffies;
05d9c84d 867 netif_wake_queue(dev);
1da177e4
LT		 868}
869
870static int lan_saa9730_start_xmit(struct sk_buff *skb,
871 struct net_device *dev)
872{
05d9c84d 873 struct lan_saa9730_private *lp = netdev_priv(dev);
1da177e4
LT		 874 unsigned long flags;
875 int skblen;
876 int len;
877
878 if (lan_saa9730_debug > 4)
05d9c84d 879 printk("Send packet: skb=%p\n", skb);
1da177e4
LT		 880
881 skblen = skb->len;
882
883 spin_lock_irqsave(&lp->lock, flags);
884
885 len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
886
887 if (lan_saa9730_write(lp, skb, skblen)) {
888 spin_unlock_irqrestore(&lp->lock, flags);
05d9c84d 889 printk("Error when writing packet to controller: skb=%p\n", skb);
1da177e4
LT		 890 netif_stop_queue(dev);
891 return -1;
892 }
893
09f75cd7
JG		 894 dev->stats.tx_bytes += len;
895 dev->stats.tx_packets++;
1da177e4
LT		 896
897 dev->trans_start = jiffies;
05d9c84d 898 netif_wake_queue(dev);
1da177e4
LT		 899 dev_kfree_skb(skb);
900
901 spin_unlock_irqrestore(&lp->lock, flags);
902
903 return 0;
904}
905
906static int lan_saa9730_close(struct net_device *dev)
907{
05d9c84d 908 struct lan_saa9730_private *lp = netdev_priv(dev);
1da177e4
LT		 909
910 if (lan_saa9730_debug > 1)
911 printk("lan_saa9730_close:\n");
912
913 netif_stop_queue(dev);
914
915 /* Disable the Lan interrupt in the event manager. */
916 evm_saa9730_disable_lan_int(lp);
917
918 /* Stop the controller */
919 if (lan_saa9730_stop(lp))
920 return -1;
921
922 free_irq(dev->irq, (void *) dev);
923
924 return 0;
925}
926
1da177e4
LT		 927static void lan_saa9730_set_multicast(struct net_device *dev)
928{
05d9c84d 929 struct lan_saa9730_private *lp = netdev_priv(dev);
1da177e4
LT		 930
931 /* Stop the controller */
932 lan_saa9730_stop(lp);
933
934 if (dev->flags & IFF_PROMISC) {
935 /* accept all packets */
69a43ac0
RB		 936 writel(CAM_CONTROL_COMP_EN | CAM_CONTROL_STATION_ACC |
937 CAM_CONTROL_GROUP_ACC | CAM_CONTROL_BROAD_ACC,
938 &lp->lan_saa9730_regs->CamCtl);
1da177e4 939 } else {
82a0244d 940 if (dev->flags & IFF_ALLMULTI || dev->mc_count) {
1da177e4 941 /* accept all multicast packets */
62ff0d0a 942 /*
1da177e4
LT		 943 * Will handle the multicast stuff later. -carstenl
944 */
82a0244d
YH		 945 writel(CAM_CONTROL_COMP_EN | CAM_CONTROL_GROUP_ACC |
946 CAM_CONTROL_BROAD_ACC,
947 &lp->lan_saa9730_regs->CamCtl);
1da177e4
LT		 948 }
949 }
950
951 lan_saa9730_restart(lp);
952}
953
954
955static void __devexit saa9730_remove_one(struct pci_dev *pdev)
956{
62ff0d0a 957 struct net_device *dev = pci_get_drvdata(pdev);
05d9c84d 958 struct lan_saa9730_private *lp = netdev_priv(dev);
1da177e4 959
62ff0d0a
RB		 960 if (dev) {
961 unregister_netdev(dev);
05d9c84d
RB		 962 lan_saa9730_free_buffers(pdev, lp);
963 iounmap(lp->lan_saa9730_regs);
964 iounmap(lp->evm_saa9730_regs);
62ff0d0a
RB		 965 free_netdev(dev);
966 pci_release_regions(pdev);
967 pci_disable_device(pdev);
968 pci_set_drvdata(pdev, NULL);
969 }
1da177e4
LT		 970}
971
972
05d9c84d
RB		 973static int lan_saa9730_init(struct net_device *dev, struct pci_dev *pdev,
974 unsigned long ioaddr, int irq)
1da177e4 975{
05d9c84d 976 struct lan_saa9730_private *lp = netdev_priv(dev);
1da177e4 977 unsigned char ethernet_addr[6];
05d9c84d 978 int ret;
1da177e4 979
05d9c84d
RB		 980 if (get_ethernet_addr(ethernet_addr)) {
981 ret = -ENODEV;
982 goto out;
983 }
62ff0d0a 984
1da177e4
LT		 985 memcpy(dev->dev_addr, ethernet_addr, 6);
986 dev->base_addr = ioaddr;
987 dev->irq = irq;
62ff0d0a 988
05d9c84d 989 lp->pci_dev = pdev;
1da177e4
LT		 990
991 /* Set SAA9730 LAN base address. */
05d9c84d
RB		 992 lp->lan_saa9730_regs = ioremap(ioaddr + SAA9730_LAN_REGS_ADDR,
993 SAA9730_LAN_REGS_SIZE);
994 if (!lp->lan_saa9730_regs) {
995 ret = -ENOMEM;
996 goto out;
997 }
1da177e4
LT		 998
999 /* Set SAA9730 EVM base address. */
05d9c84d
RB		 1000 lp->evm_saa9730_regs = ioremap(ioaddr + SAA9730_EVM_REGS_ADDR,
1001 SAA9730_EVM_REGS_SIZE);
1002 if (!lp->evm_saa9730_regs) {
1003 ret = -ENOMEM;
1004 goto out_iounmap_lan;
1005 }
1da177e4
LT		 1006
1007 /* Allocate LAN RX/TX frame buffer space. */
05d9c84d
RB		 1008 if ((ret = lan_saa9730_allocate_buffers(pdev, lp)))
1009 goto out_iounmap;
1da177e4
LT		 1010
1011 /* Stop LAN controller. */
62ff0d0a 1012 if ((ret = lan_saa9730_stop(lp)))
05d9c84d 1013 goto out_free_consistent;
62ff0d0a 1014
1da177e4
LT		 1015 /* Initialize CAM registers. */
1016 if ((ret = lan_saa9730_cam_init(dev)))
05d9c84d 1017 goto out_free_consistent;
1da177e4
LT		 1018
1019 /* Initialize MII registers. */
1020 if ((ret = lan_saa9730_mii_init(lp)))
05d9c84d 1021 goto out_free_consistent;
1da177e4
LT		 1022
1023 /* Initialize control registers. */
62ff0d0a 1024 if ((ret = lan_saa9730_control_init(lp)))
05d9c84d 1025 goto out_free_consistent;
62ff0d0a 1026
1da177e4 1027 /* Load CAM registers. */
62ff0d0a 1028 if ((ret = lan_saa9730_cam_load(lp)))
05d9c84d 1029 goto out_free_consistent;
62ff0d0a 1030
1da177e4
LT		 1031 /* Initialize DMA context registers. */
1032 if ((ret = lan_saa9730_dma_init(lp)))
05d9c84d 1033 goto out_free_consistent;
62ff0d0a 1034
1da177e4 1035 spin_lock_init(&lp->lock);
62ff0d0a 1036
1da177e4
LT		 1037 dev->open = lan_saa9730_open;
1038 dev->hard_start_xmit = lan_saa9730_start_xmit;
1039 dev->stop = lan_saa9730_close;
1da177e4
LT		 1040 dev->set_multicast_list = lan_saa9730_set_multicast;
1041 dev->tx_timeout = lan_saa9730_tx_timeout;
1042 dev->watchdog_timeo = (HZ >> 1);
1043 dev->dma = 0;
62ff0d0a 1044
05d9c84d 1045 ret = register_netdev (dev);
1da177e4 1046 if (ret)
05d9c84d
RB		 1047 goto out_free_consistent;
1048
1da177e4
LT		 1049 return 0;
1050
05d9c84d
RB		 1051out_free_consistent:
1052 lan_saa9730_free_buffers(pdev, lp);
1053out_iounmap:
1054 iounmap(lp->evm_saa9730_regs);
1055out_iounmap_lan:
1056 iounmap(lp->lan_saa9730_regs);
1057out:
1da177e4
LT		 1058 return ret;
1059}
1060
1061
1062static int __devinit saa9730_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1063{
05d9c84d
RB		 1064 struct net_device *dev = NULL;
1065 unsigned long pci_ioaddr;
1da177e4
LT		 1066 int err;
1067
1068 if (lan_saa9730_debug > 1)
1069 printk("saa9730.c: PCI bios is present, checking for devices...\n");
1070
1da177e4 1071 err = pci_enable_device(pdev);
62ff0d0a
RB		 1072 if (err) {
1073 printk(KERN_ERR "Cannot enable PCI device, aborting.\n");
05d9c84d 1074 goto out;
62ff0d0a 1075 }
1da177e4
LT		 1076
1077 err = pci_request_regions(pdev, DRV_MODULE_NAME);
1078 if (err) {
1079 printk(KERN_ERR "Cannot obtain PCI resources, aborting.\n");
05d9c84d 1080 goto out_disable_pdev;
1da177e4
LT		 1081 }
1082
1083 pci_irq_line = pdev->irq;
1084 /* LAN base address in located at BAR 1. */
1085
1086 pci_ioaddr = pci_resource_start(pdev, 1);
1087 pci_set_master(pdev);
1088
05d9c84d 1089 printk("Found SAA9730 (PCI) at %lx, irq %d.\n",
1da177e4
LT		 1090 pci_ioaddr, pci_irq_line);
1091
05d9c84d
RB		 1092 dev = alloc_etherdev(sizeof(struct lan_saa9730_private));
1093 if (!dev)
1094 goto out_disable_pdev;
1095
1096 err = lan_saa9730_init(dev, pdev, pci_ioaddr, pci_irq_line);
1da177e4 1097 if (err) {
05d9c84d
RB		 1098 printk("LAN init failed");
1099 goto out_free_netdev;
1da177e4
LT		 1100 }
1101
1102 pci_set_drvdata(pdev, dev);
1103 SET_NETDEV_DEV(dev, &pdev->dev);
1104 return 0;
62ff0d0a 1105
05d9c84d 1106out_free_netdev:
1da177e4 1107 free_netdev(dev);
05d9c84d
RB		 1108out_disable_pdev:
1109 pci_disable_device(pdev);
1da177e4 1110out:
05d9c84d 1111 pci_set_drvdata(pdev, NULL);
1da177e4
LT		 1112 return err;
1113}
1114
1115
1116static struct pci_driver saa9730_driver = {
62ff0d0a
RB		 1117 .name = DRV_MODULE_NAME,
1118 .id_table = saa9730_pci_tbl,
1119 .probe = saa9730_init_one,
1120 .remove = __devexit_p(saa9730_remove_one),
1da177e4
LT		 1121};
1122
1123
1124static int __init saa9730_init(void)
1125{
29917620 1126 return pci_register_driver(&saa9730_driver);
1da177e4
LT		 1127}
1128
1129static void __exit saa9730_cleanup(void)
1130{
62ff0d0a 1131 pci_unregister_driver(&saa9730_driver);
1da177e4
LT		 1132}
1133
1134module_init(saa9730_init);
1135module_exit(saa9730_cleanup);
1136
05d9c84d
RB		 1137MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
1138MODULE_DESCRIPTION("Philips SAA9730 ethernet driver");
1da177e4 1139MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)