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af19b491 AKS |
1 | /* |
2 | * Copyright (C) 2009 - QLogic Corporation. | |
3 | * All rights reserved. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License | |
7 | * as published by the Free Software Foundation; either version 2 | |
8 | * of the License, or (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, | |
18 | * MA 02111-1307, USA. | |
19 | * | |
20 | * The full GNU General Public License is included in this distribution | |
21 | * in the file called "COPYING". | |
22 | * | |
23 | */ | |
24 | ||
25 | #include <linux/netdevice.h> | |
26 | #include <linux/delay.h> | |
27 | #include "qlcnic.h" | |
28 | ||
29 | struct crb_addr_pair { | |
30 | u32 addr; | |
31 | u32 data; | |
32 | }; | |
33 | ||
34 | #define QLCNIC_MAX_CRB_XFORM 60 | |
35 | static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM]; | |
36 | ||
37 | #define crb_addr_transform(name) \ | |
38 | (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \ | |
39 | QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20) | |
40 | ||
41 | #define QLCNIC_ADDR_ERROR (0xffffffff) | |
42 | ||
43 | static void | |
44 | qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter, | |
45 | struct qlcnic_host_rds_ring *rds_ring); | |
46 | ||
47 | static void crb_addr_transform_setup(void) | |
48 | { | |
49 | crb_addr_transform(XDMA); | |
50 | crb_addr_transform(TIMR); | |
51 | crb_addr_transform(SRE); | |
52 | crb_addr_transform(SQN3); | |
53 | crb_addr_transform(SQN2); | |
54 | crb_addr_transform(SQN1); | |
55 | crb_addr_transform(SQN0); | |
56 | crb_addr_transform(SQS3); | |
57 | crb_addr_transform(SQS2); | |
58 | crb_addr_transform(SQS1); | |
59 | crb_addr_transform(SQS0); | |
60 | crb_addr_transform(RPMX7); | |
61 | crb_addr_transform(RPMX6); | |
62 | crb_addr_transform(RPMX5); | |
63 | crb_addr_transform(RPMX4); | |
64 | crb_addr_transform(RPMX3); | |
65 | crb_addr_transform(RPMX2); | |
66 | crb_addr_transform(RPMX1); | |
67 | crb_addr_transform(RPMX0); | |
68 | crb_addr_transform(ROMUSB); | |
69 | crb_addr_transform(SN); | |
70 | crb_addr_transform(QMN); | |
71 | crb_addr_transform(QMS); | |
72 | crb_addr_transform(PGNI); | |
73 | crb_addr_transform(PGND); | |
74 | crb_addr_transform(PGN3); | |
75 | crb_addr_transform(PGN2); | |
76 | crb_addr_transform(PGN1); | |
77 | crb_addr_transform(PGN0); | |
78 | crb_addr_transform(PGSI); | |
79 | crb_addr_transform(PGSD); | |
80 | crb_addr_transform(PGS3); | |
81 | crb_addr_transform(PGS2); | |
82 | crb_addr_transform(PGS1); | |
83 | crb_addr_transform(PGS0); | |
84 | crb_addr_transform(PS); | |
85 | crb_addr_transform(PH); | |
86 | crb_addr_transform(NIU); | |
87 | crb_addr_transform(I2Q); | |
88 | crb_addr_transform(EG); | |
89 | crb_addr_transform(MN); | |
90 | crb_addr_transform(MS); | |
91 | crb_addr_transform(CAS2); | |
92 | crb_addr_transform(CAS1); | |
93 | crb_addr_transform(CAS0); | |
94 | crb_addr_transform(CAM); | |
95 | crb_addr_transform(C2C1); | |
96 | crb_addr_transform(C2C0); | |
97 | crb_addr_transform(SMB); | |
98 | crb_addr_transform(OCM0); | |
99 | crb_addr_transform(I2C0); | |
100 | } | |
101 | ||
102 | void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter) | |
103 | { | |
104 | struct qlcnic_recv_context *recv_ctx; | |
105 | struct qlcnic_host_rds_ring *rds_ring; | |
106 | struct qlcnic_rx_buffer *rx_buf; | |
107 | int i, ring; | |
108 | ||
109 | recv_ctx = &adapter->recv_ctx; | |
110 | for (ring = 0; ring < adapter->max_rds_rings; ring++) { | |
111 | rds_ring = &recv_ctx->rds_rings[ring]; | |
112 | for (i = 0; i < rds_ring->num_desc; ++i) { | |
113 | rx_buf = &(rds_ring->rx_buf_arr[i]); | |
114 | if (rx_buf->state == QLCNIC_BUFFER_FREE) | |
115 | continue; | |
116 | pci_unmap_single(adapter->pdev, | |
117 | rx_buf->dma, | |
118 | rds_ring->dma_size, | |
119 | PCI_DMA_FROMDEVICE); | |
120 | if (rx_buf->skb != NULL) | |
121 | dev_kfree_skb_any(rx_buf->skb); | |
122 | } | |
123 | } | |
124 | } | |
125 | ||
126 | void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter) | |
127 | { | |
128 | struct qlcnic_cmd_buffer *cmd_buf; | |
129 | struct qlcnic_skb_frag *buffrag; | |
130 | int i, j; | |
131 | struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring; | |
132 | ||
133 | cmd_buf = tx_ring->cmd_buf_arr; | |
134 | for (i = 0; i < tx_ring->num_desc; i++) { | |
135 | buffrag = cmd_buf->frag_array; | |
136 | if (buffrag->dma) { | |
137 | pci_unmap_single(adapter->pdev, buffrag->dma, | |
138 | buffrag->length, PCI_DMA_TODEVICE); | |
139 | buffrag->dma = 0ULL; | |
140 | } | |
141 | for (j = 0; j < cmd_buf->frag_count; j++) { | |
142 | buffrag++; | |
143 | if (buffrag->dma) { | |
144 | pci_unmap_page(adapter->pdev, buffrag->dma, | |
145 | buffrag->length, | |
146 | PCI_DMA_TODEVICE); | |
147 | buffrag->dma = 0ULL; | |
148 | } | |
149 | } | |
150 | if (cmd_buf->skb) { | |
151 | dev_kfree_skb_any(cmd_buf->skb); | |
152 | cmd_buf->skb = NULL; | |
153 | } | |
154 | cmd_buf++; | |
155 | } | |
156 | } | |
157 | ||
158 | void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter) | |
159 | { | |
160 | struct qlcnic_recv_context *recv_ctx; | |
161 | struct qlcnic_host_rds_ring *rds_ring; | |
162 | struct qlcnic_host_tx_ring *tx_ring; | |
163 | int ring; | |
164 | ||
165 | recv_ctx = &adapter->recv_ctx; | |
166 | ||
167 | if (recv_ctx->rds_rings == NULL) | |
168 | goto skip_rds; | |
169 | ||
170 | for (ring = 0; ring < adapter->max_rds_rings; ring++) { | |
171 | rds_ring = &recv_ctx->rds_rings[ring]; | |
172 | vfree(rds_ring->rx_buf_arr); | |
173 | rds_ring->rx_buf_arr = NULL; | |
174 | } | |
175 | kfree(recv_ctx->rds_rings); | |
176 | ||
177 | skip_rds: | |
178 | if (adapter->tx_ring == NULL) | |
179 | return; | |
180 | ||
181 | tx_ring = adapter->tx_ring; | |
182 | vfree(tx_ring->cmd_buf_arr); | |
183 | kfree(adapter->tx_ring); | |
184 | } | |
185 | ||
186 | int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter) | |
187 | { | |
188 | struct qlcnic_recv_context *recv_ctx; | |
189 | struct qlcnic_host_rds_ring *rds_ring; | |
190 | struct qlcnic_host_sds_ring *sds_ring; | |
191 | struct qlcnic_host_tx_ring *tx_ring; | |
192 | struct qlcnic_rx_buffer *rx_buf; | |
193 | int ring, i, size; | |
194 | ||
195 | struct qlcnic_cmd_buffer *cmd_buf_arr; | |
196 | struct net_device *netdev = adapter->netdev; | |
197 | ||
198 | size = sizeof(struct qlcnic_host_tx_ring); | |
199 | tx_ring = kzalloc(size, GFP_KERNEL); | |
200 | if (tx_ring == NULL) { | |
201 | dev_err(&netdev->dev, "failed to allocate tx ring struct\n"); | |
202 | return -ENOMEM; | |
203 | } | |
204 | adapter->tx_ring = tx_ring; | |
205 | ||
206 | tx_ring->num_desc = adapter->num_txd; | |
207 | tx_ring->txq = netdev_get_tx_queue(netdev, 0); | |
208 | ||
209 | cmd_buf_arr = vmalloc(TX_BUFF_RINGSIZE(tx_ring)); | |
210 | if (cmd_buf_arr == NULL) { | |
211 | dev_err(&netdev->dev, "failed to allocate cmd buffer ring\n"); | |
212 | return -ENOMEM; | |
213 | } | |
214 | memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring)); | |
215 | tx_ring->cmd_buf_arr = cmd_buf_arr; | |
216 | ||
217 | recv_ctx = &adapter->recv_ctx; | |
218 | ||
219 | size = adapter->max_rds_rings * sizeof(struct qlcnic_host_rds_ring); | |
220 | rds_ring = kzalloc(size, GFP_KERNEL); | |
221 | if (rds_ring == NULL) { | |
222 | dev_err(&netdev->dev, "failed to allocate rds ring struct\n"); | |
223 | return -ENOMEM; | |
224 | } | |
225 | recv_ctx->rds_rings = rds_ring; | |
226 | ||
227 | for (ring = 0; ring < adapter->max_rds_rings; ring++) { | |
228 | rds_ring = &recv_ctx->rds_rings[ring]; | |
229 | switch (ring) { | |
230 | case RCV_RING_NORMAL: | |
231 | rds_ring->num_desc = adapter->num_rxd; | |
232 | if (adapter->ahw.cut_through) { | |
233 | rds_ring->dma_size = | |
234 | QLCNIC_CT_DEFAULT_RX_BUF_LEN; | |
235 | rds_ring->skb_size = | |
236 | QLCNIC_CT_DEFAULT_RX_BUF_LEN; | |
237 | } else { | |
238 | rds_ring->dma_size = | |
239 | QLCNIC_P3_RX_BUF_MAX_LEN; | |
240 | rds_ring->skb_size = | |
241 | rds_ring->dma_size + NET_IP_ALIGN; | |
242 | } | |
243 | break; | |
244 | ||
245 | case RCV_RING_JUMBO: | |
246 | rds_ring->num_desc = adapter->num_jumbo_rxd; | |
247 | rds_ring->dma_size = | |
248 | QLCNIC_P3_RX_JUMBO_BUF_MAX_LEN; | |
249 | ||
250 | if (adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO) | |
251 | rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA; | |
252 | ||
253 | rds_ring->skb_size = | |
254 | rds_ring->dma_size + NET_IP_ALIGN; | |
255 | break; | |
256 | ||
257 | case RCV_RING_LRO: | |
258 | rds_ring->num_desc = adapter->num_lro_rxd; | |
259 | rds_ring->dma_size = QLCNIC_RX_LRO_BUFFER_LENGTH; | |
260 | rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN; | |
261 | break; | |
262 | ||
263 | } | |
264 | rds_ring->rx_buf_arr = (struct qlcnic_rx_buffer *) | |
265 | vmalloc(RCV_BUFF_RINGSIZE(rds_ring)); | |
266 | if (rds_ring->rx_buf_arr == NULL) { | |
267 | dev_err(&netdev->dev, "Failed to allocate " | |
268 | "rx buffer ring %d\n", ring); | |
269 | goto err_out; | |
270 | } | |
271 | memset(rds_ring->rx_buf_arr, 0, RCV_BUFF_RINGSIZE(rds_ring)); | |
272 | INIT_LIST_HEAD(&rds_ring->free_list); | |
273 | /* | |
274 | * Now go through all of them, set reference handles | |
275 | * and put them in the queues. | |
276 | */ | |
277 | rx_buf = rds_ring->rx_buf_arr; | |
278 | for (i = 0; i < rds_ring->num_desc; i++) { | |
279 | list_add_tail(&rx_buf->list, | |
280 | &rds_ring->free_list); | |
281 | rx_buf->ref_handle = i; | |
282 | rx_buf->state = QLCNIC_BUFFER_FREE; | |
283 | rx_buf++; | |
284 | } | |
285 | spin_lock_init(&rds_ring->lock); | |
286 | } | |
287 | ||
288 | for (ring = 0; ring < adapter->max_sds_rings; ring++) { | |
289 | sds_ring = &recv_ctx->sds_rings[ring]; | |
290 | sds_ring->irq = adapter->msix_entries[ring].vector; | |
291 | sds_ring->adapter = adapter; | |
292 | sds_ring->num_desc = adapter->num_rxd; | |
293 | ||
294 | for (i = 0; i < NUM_RCV_DESC_RINGS; i++) | |
295 | INIT_LIST_HEAD(&sds_ring->free_list[i]); | |
296 | } | |
297 | ||
298 | return 0; | |
299 | ||
300 | err_out: | |
301 | qlcnic_free_sw_resources(adapter); | |
302 | return -ENOMEM; | |
303 | } | |
304 | ||
305 | /* | |
306 | * Utility to translate from internal Phantom CRB address | |
307 | * to external PCI CRB address. | |
308 | */ | |
309 | static u32 qlcnic_decode_crb_addr(u32 addr) | |
310 | { | |
311 | int i; | |
312 | u32 base_addr, offset, pci_base; | |
313 | ||
314 | crb_addr_transform_setup(); | |
315 | ||
316 | pci_base = QLCNIC_ADDR_ERROR; | |
317 | base_addr = addr & 0xfff00000; | |
318 | offset = addr & 0x000fffff; | |
319 | ||
320 | for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) { | |
321 | if (crb_addr_xform[i] == base_addr) { | |
322 | pci_base = i << 20; | |
323 | break; | |
324 | } | |
325 | } | |
326 | if (pci_base == QLCNIC_ADDR_ERROR) | |
327 | return pci_base; | |
328 | else | |
329 | return pci_base + offset; | |
330 | } | |
331 | ||
332 | #define QLCNIC_MAX_ROM_WAIT_USEC 100 | |
333 | ||
334 | static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter) | |
335 | { | |
336 | long timeout = 0; | |
337 | long done = 0; | |
338 | ||
339 | cond_resched(); | |
340 | ||
341 | while (done == 0) { | |
342 | done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS); | |
343 | done &= 2; | |
344 | if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) { | |
345 | dev_err(&adapter->pdev->dev, | |
346 | "Timeout reached waiting for rom done"); | |
347 | return -EIO; | |
348 | } | |
349 | udelay(1); | |
350 | } | |
351 | return 0; | |
352 | } | |
353 | ||
354 | static int do_rom_fast_read(struct qlcnic_adapter *adapter, | |
355 | int addr, int *valp) | |
356 | { | |
357 | QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr); | |
358 | QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); | |
359 | QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3); | |
360 | QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb); | |
361 | if (qlcnic_wait_rom_done(adapter)) { | |
362 | dev_err(&adapter->pdev->dev, "Error waiting for rom done\n"); | |
363 | return -EIO; | |
364 | } | |
365 | /* reset abyte_cnt and dummy_byte_cnt */ | |
366 | QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0); | |
367 | udelay(10); | |
368 | QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); | |
369 | ||
370 | *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA); | |
371 | return 0; | |
372 | } | |
373 | ||
374 | static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr, | |
375 | u8 *bytes, size_t size) | |
376 | { | |
377 | int addridx; | |
378 | int ret = 0; | |
379 | ||
380 | for (addridx = addr; addridx < (addr + size); addridx += 4) { | |
381 | int v; | |
382 | ret = do_rom_fast_read(adapter, addridx, &v); | |
383 | if (ret != 0) | |
384 | break; | |
385 | *(__le32 *)bytes = cpu_to_le32(v); | |
386 | bytes += 4; | |
387 | } | |
388 | ||
389 | return ret; | |
390 | } | |
391 | ||
392 | int | |
393 | qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr, | |
394 | u8 *bytes, size_t size) | |
395 | { | |
396 | int ret; | |
397 | ||
398 | ret = qlcnic_rom_lock(adapter); | |
399 | if (ret < 0) | |
400 | return ret; | |
401 | ||
402 | ret = do_rom_fast_read_words(adapter, addr, bytes, size); | |
403 | ||
404 | qlcnic_rom_unlock(adapter); | |
405 | return ret; | |
406 | } | |
407 | ||
408 | int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, int addr, int *valp) | |
409 | { | |
410 | int ret; | |
411 | ||
412 | if (qlcnic_rom_lock(adapter) != 0) | |
413 | return -EIO; | |
414 | ||
415 | ret = do_rom_fast_read(adapter, addr, valp); | |
416 | qlcnic_rom_unlock(adapter); | |
417 | return ret; | |
418 | } | |
419 | ||
420 | int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter) | |
421 | { | |
422 | int addr, val; | |
423 | int i, n, init_delay; | |
424 | struct crb_addr_pair *buf; | |
425 | unsigned offset; | |
426 | u32 off; | |
427 | struct pci_dev *pdev = adapter->pdev; | |
428 | ||
429 | /* resetall */ | |
430 | qlcnic_rom_lock(adapter); | |
431 | QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xffffffff); | |
432 | qlcnic_rom_unlock(adapter); | |
433 | ||
434 | if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) || | |
435 | qlcnic_rom_fast_read(adapter, 4, &n) != 0) { | |
436 | dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n); | |
437 | return -EIO; | |
438 | } | |
439 | offset = n & 0xffffU; | |
440 | n = (n >> 16) & 0xffffU; | |
441 | ||
442 | if (n >= 1024) { | |
443 | dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n"); | |
444 | return -EIO; | |
445 | } | |
446 | ||
447 | buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL); | |
448 | if (buf == NULL) { | |
449 | dev_err(&pdev->dev, "Unable to calloc memory for rom read.\n"); | |
450 | return -ENOMEM; | |
451 | } | |
452 | ||
453 | for (i = 0; i < n; i++) { | |
454 | if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 || | |
455 | qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) { | |
456 | kfree(buf); | |
457 | return -EIO; | |
458 | } | |
459 | ||
460 | buf[i].addr = addr; | |
461 | buf[i].data = val; | |
462 | } | |
463 | ||
464 | for (i = 0; i < n; i++) { | |
465 | ||
466 | off = qlcnic_decode_crb_addr(buf[i].addr); | |
467 | if (off == QLCNIC_ADDR_ERROR) { | |
468 | dev_err(&pdev->dev, "CRB init value out of range %x\n", | |
469 | buf[i].addr); | |
470 | continue; | |
471 | } | |
472 | off += QLCNIC_PCI_CRBSPACE; | |
473 | ||
474 | if (off & 1) | |
475 | continue; | |
476 | ||
477 | /* skipping cold reboot MAGIC */ | |
478 | if (off == QLCNIC_CAM_RAM(0x1fc)) | |
479 | continue; | |
480 | if (off == (QLCNIC_CRB_I2C0 + 0x1c)) | |
481 | continue; | |
482 | if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */ | |
483 | continue; | |
484 | if (off == (ROMUSB_GLB + 0xa8)) | |
485 | continue; | |
486 | if (off == (ROMUSB_GLB + 0xc8)) /* core clock */ | |
487 | continue; | |
488 | if (off == (ROMUSB_GLB + 0x24)) /* MN clock */ | |
489 | continue; | |
490 | if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */ | |
491 | continue; | |
492 | if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET) | |
493 | continue; | |
494 | /* skip the function enable register */ | |
495 | if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION)) | |
496 | continue; | |
497 | if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2)) | |
498 | continue; | |
499 | if ((off & 0x0ff00000) == QLCNIC_CRB_SMB) | |
500 | continue; | |
501 | ||
502 | init_delay = 1; | |
503 | /* After writing this register, HW needs time for CRB */ | |
504 | /* to quiet down (else crb_window returns 0xffffffff) */ | |
505 | if (off == QLCNIC_ROMUSB_GLB_SW_RESET) | |
506 | init_delay = 1000; | |
507 | ||
508 | QLCWR32(adapter, off, buf[i].data); | |
509 | ||
510 | msleep(init_delay); | |
511 | } | |
512 | kfree(buf); | |
513 | ||
514 | /* p2dn replyCount */ | |
515 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e); | |
516 | /* disable_peg_cache 0 & 1*/ | |
517 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8); | |
518 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8); | |
519 | ||
520 | /* peg_clr_all */ | |
521 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0); | |
522 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0); | |
523 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0); | |
524 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0); | |
525 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0); | |
526 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0); | |
527 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0); | |
528 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0); | |
529 | return 0; | |
530 | } | |
531 | ||
532 | static int | |
533 | qlcnic_has_mn(struct qlcnic_adapter *adapter) | |
534 | { | |
535 | u32 capability, flashed_ver; | |
536 | capability = 0; | |
537 | ||
538 | qlcnic_rom_fast_read(adapter, | |
539 | QLCNIC_FW_VERSION_OFFSET, (int *)&flashed_ver); | |
540 | flashed_ver = QLCNIC_DECODE_VERSION(flashed_ver); | |
541 | ||
542 | if (flashed_ver >= QLCNIC_VERSION_CODE(4, 0, 220)) { | |
543 | ||
544 | capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY); | |
545 | if (capability & QLCNIC_PEG_TUNE_MN_PRESENT) | |
546 | return 1; | |
547 | } | |
548 | return 0; | |
549 | } | |
550 | ||
551 | static | |
552 | struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section) | |
553 | { | |
554 | u32 i; | |
555 | struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0]; | |
556 | __le32 entries = cpu_to_le32(directory->num_entries); | |
557 | ||
558 | for (i = 0; i < entries; i++) { | |
559 | ||
560 | __le32 offs = cpu_to_le32(directory->findex) + | |
561 | (i * cpu_to_le32(directory->entry_size)); | |
562 | __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8)); | |
563 | ||
564 | if (tab_type == section) | |
565 | return (struct uni_table_desc *) &unirom[offs]; | |
566 | } | |
567 | ||
568 | return NULL; | |
569 | } | |
570 | ||
571 | static int | |
572 | qlcnic_set_product_offs(struct qlcnic_adapter *adapter) | |
573 | { | |
574 | struct uni_table_desc *ptab_descr; | |
575 | const u8 *unirom = adapter->fw->data; | |
576 | u32 i; | |
577 | __le32 entries; | |
578 | int mn_present = qlcnic_has_mn(adapter); | |
579 | ||
580 | ptab_descr = qlcnic_get_table_desc(unirom, | |
581 | QLCNIC_UNI_DIR_SECT_PRODUCT_TBL); | |
582 | if (ptab_descr == NULL) | |
583 | return -1; | |
584 | ||
585 | entries = cpu_to_le32(ptab_descr->num_entries); | |
586 | nomn: | |
587 | for (i = 0; i < entries; i++) { | |
588 | ||
589 | __le32 flags, file_chiprev, offs; | |
590 | u8 chiprev = adapter->ahw.revision_id; | |
591 | u32 flagbit; | |
592 | ||
593 | offs = cpu_to_le32(ptab_descr->findex) + | |
594 | (i * cpu_to_le32(ptab_descr->entry_size)); | |
595 | flags = cpu_to_le32(*((int *)&unirom[offs] + | |
596 | QLCNIC_UNI_FLAGS_OFF)); | |
597 | file_chiprev = cpu_to_le32(*((int *)&unirom[offs] + | |
598 | QLCNIC_UNI_CHIP_REV_OFF)); | |
599 | ||
600 | flagbit = mn_present ? 1 : 2; | |
601 | ||
602 | if ((chiprev == file_chiprev) && | |
603 | ((1ULL << flagbit) & flags)) { | |
604 | adapter->file_prd_off = offs; | |
605 | return 0; | |
606 | } | |
607 | } | |
608 | if (mn_present) { | |
609 | mn_present = 0; | |
610 | goto nomn; | |
611 | } | |
612 | return -1; | |
613 | } | |
614 | ||
615 | static | |
616 | struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter, | |
617 | u32 section, u32 idx_offset) | |
618 | { | |
619 | const u8 *unirom = adapter->fw->data; | |
620 | int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] + | |
621 | idx_offset)); | |
622 | struct uni_table_desc *tab_desc; | |
623 | __le32 offs; | |
624 | ||
625 | tab_desc = qlcnic_get_table_desc(unirom, section); | |
626 | ||
627 | if (tab_desc == NULL) | |
628 | return NULL; | |
629 | ||
630 | offs = cpu_to_le32(tab_desc->findex) + | |
631 | (cpu_to_le32(tab_desc->entry_size) * idx); | |
632 | ||
633 | return (struct uni_data_desc *)&unirom[offs]; | |
634 | } | |
635 | ||
636 | static u8 * | |
637 | qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter) | |
638 | { | |
639 | u32 offs = QLCNIC_BOOTLD_START; | |
640 | ||
641 | if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE) | |
642 | offs = cpu_to_le32((qlcnic_get_data_desc(adapter, | |
643 | QLCNIC_UNI_DIR_SECT_BOOTLD, | |
644 | QLCNIC_UNI_BOOTLD_IDX_OFF))->findex); | |
645 | ||
646 | return (u8 *)&adapter->fw->data[offs]; | |
647 | } | |
648 | ||
649 | static u8 * | |
650 | qlcnic_get_fw_offs(struct qlcnic_adapter *adapter) | |
651 | { | |
652 | u32 offs = QLCNIC_IMAGE_START; | |
653 | ||
654 | if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE) | |
655 | offs = cpu_to_le32((qlcnic_get_data_desc(adapter, | |
656 | QLCNIC_UNI_DIR_SECT_FW, | |
657 | QLCNIC_UNI_FIRMWARE_IDX_OFF))->findex); | |
658 | ||
659 | return (u8 *)&adapter->fw->data[offs]; | |
660 | } | |
661 | ||
662 | static __le32 | |
663 | qlcnic_get_fw_size(struct qlcnic_adapter *adapter) | |
664 | { | |
665 | if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE) | |
666 | return cpu_to_le32((qlcnic_get_data_desc(adapter, | |
667 | QLCNIC_UNI_DIR_SECT_FW, | |
668 | QLCNIC_UNI_FIRMWARE_IDX_OFF))->size); | |
669 | else | |
670 | return cpu_to_le32( | |
671 | *(u32 *)&adapter->fw->data[QLCNIC_FW_SIZE_OFFSET]); | |
672 | } | |
673 | ||
674 | static __le32 | |
675 | qlcnic_get_fw_version(struct qlcnic_adapter *adapter) | |
676 | { | |
677 | struct uni_data_desc *fw_data_desc; | |
678 | const struct firmware *fw = adapter->fw; | |
679 | __le32 major, minor, sub; | |
680 | const u8 *ver_str; | |
681 | int i, ret; | |
682 | ||
683 | if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE) | |
684 | return cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET]); | |
685 | ||
686 | fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW, | |
687 | QLCNIC_UNI_FIRMWARE_IDX_OFF); | |
688 | ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) + | |
689 | cpu_to_le32(fw_data_desc->size) - 17; | |
690 | ||
691 | for (i = 0; i < 12; i++) { | |
692 | if (!strncmp(&ver_str[i], "REV=", 4)) { | |
693 | ret = sscanf(&ver_str[i+4], "%u.%u.%u ", | |
694 | &major, &minor, &sub); | |
695 | if (ret != 3) | |
696 | return 0; | |
697 | else | |
698 | return major + (minor << 8) + (sub << 16); | |
699 | } | |
700 | } | |
701 | ||
702 | return 0; | |
703 | } | |
704 | ||
705 | static __le32 | |
706 | qlcnic_get_bios_version(struct qlcnic_adapter *adapter) | |
707 | { | |
708 | const struct firmware *fw = adapter->fw; | |
709 | __le32 bios_ver, prd_off = adapter->file_prd_off; | |
710 | ||
711 | if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE) | |
712 | return cpu_to_le32( | |
713 | *(u32 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET]); | |
714 | ||
715 | bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off]) | |
716 | + QLCNIC_UNI_BIOS_VERSION_OFF)); | |
717 | ||
718 | return (bios_ver << 24) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24); | |
719 | } | |
720 | ||
721 | int | |
722 | qlcnic_need_fw_reset(struct qlcnic_adapter *adapter) | |
723 | { | |
724 | u32 count, old_count; | |
725 | u32 val, version, major, minor, build; | |
726 | int i, timeout; | |
727 | ||
728 | if (adapter->need_fw_reset) | |
729 | return 1; | |
730 | ||
731 | /* last attempt had failed */ | |
732 | if (QLCRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED) | |
733 | return 1; | |
734 | ||
735 | old_count = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER); | |
736 | ||
737 | for (i = 0; i < 10; i++) { | |
738 | ||
739 | timeout = msleep_interruptible(200); | |
740 | if (timeout) { | |
741 | QLCWR32(adapter, CRB_CMDPEG_STATE, | |
742 | PHAN_INITIALIZE_FAILED); | |
743 | return -EINTR; | |
744 | } | |
745 | ||
746 | count = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER); | |
747 | if (count != old_count) | |
748 | break; | |
749 | } | |
750 | ||
751 | /* firmware is dead */ | |
752 | if (count == old_count) | |
753 | return 1; | |
754 | ||
755 | /* check if we have got newer or different file firmware */ | |
756 | if (adapter->fw) { | |
757 | ||
758 | val = qlcnic_get_fw_version(adapter); | |
759 | ||
760 | version = QLCNIC_DECODE_VERSION(val); | |
761 | ||
762 | major = QLCRD32(adapter, QLCNIC_FW_VERSION_MAJOR); | |
763 | minor = QLCRD32(adapter, QLCNIC_FW_VERSION_MINOR); | |
764 | build = QLCRD32(adapter, QLCNIC_FW_VERSION_SUB); | |
765 | ||
766 | if (version > QLCNIC_VERSION_CODE(major, minor, build)) | |
767 | return 1; | |
768 | } | |
769 | ||
770 | return 0; | |
771 | } | |
772 | ||
773 | static const char *fw_name[] = { | |
774 | QLCNIC_UNIFIED_ROMIMAGE_NAME, | |
775 | QLCNIC_FLASH_ROMIMAGE_NAME, | |
776 | }; | |
777 | ||
778 | int | |
779 | qlcnic_load_firmware(struct qlcnic_adapter *adapter) | |
780 | { | |
781 | u64 *ptr64; | |
782 | u32 i, flashaddr, size; | |
783 | const struct firmware *fw = adapter->fw; | |
784 | struct pci_dev *pdev = adapter->pdev; | |
785 | ||
786 | dev_info(&pdev->dev, "loading firmware from %s\n", | |
787 | fw_name[adapter->fw_type]); | |
788 | ||
789 | if (fw) { | |
790 | __le64 data; | |
791 | ||
792 | size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8; | |
793 | ||
794 | ptr64 = (u64 *)qlcnic_get_bootld_offs(adapter); | |
795 | flashaddr = QLCNIC_BOOTLD_START; | |
796 | ||
797 | for (i = 0; i < size; i++) { | |
798 | data = cpu_to_le64(ptr64[i]); | |
799 | ||
800 | if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data)) | |
801 | return -EIO; | |
802 | ||
803 | flashaddr += 8; | |
804 | } | |
805 | ||
806 | size = (__force u32)qlcnic_get_fw_size(adapter) / 8; | |
807 | ||
808 | ptr64 = (u64 *)qlcnic_get_fw_offs(adapter); | |
809 | flashaddr = QLCNIC_IMAGE_START; | |
810 | ||
811 | for (i = 0; i < size; i++) { | |
812 | data = cpu_to_le64(ptr64[i]); | |
813 | ||
814 | if (qlcnic_pci_mem_write_2M(adapter, | |
815 | flashaddr, data)) | |
816 | return -EIO; | |
817 | ||
818 | flashaddr += 8; | |
819 | } | |
820 | } else { | |
821 | u64 data; | |
822 | u32 hi, lo; | |
823 | ||
824 | size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8; | |
825 | flashaddr = QLCNIC_BOOTLD_START; | |
826 | ||
827 | for (i = 0; i < size; i++) { | |
828 | if (qlcnic_rom_fast_read(adapter, | |
829 | flashaddr, (int *)&lo) != 0) | |
830 | return -EIO; | |
831 | if (qlcnic_rom_fast_read(adapter, | |
832 | flashaddr + 4, (int *)&hi) != 0) | |
833 | return -EIO; | |
834 | ||
835 | data = (((u64)hi << 32) | lo); | |
836 | ||
837 | if (qlcnic_pci_mem_write_2M(adapter, | |
838 | flashaddr, data)) | |
839 | return -EIO; | |
840 | ||
841 | flashaddr += 8; | |
842 | } | |
843 | } | |
844 | msleep(1); | |
845 | ||
846 | QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020); | |
847 | QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e); | |
848 | return 0; | |
849 | } | |
850 | ||
851 | static int | |
852 | qlcnic_validate_firmware(struct qlcnic_adapter *adapter) | |
853 | { | |
854 | __le32 val; | |
855 | u32 ver, min_ver, bios, min_size; | |
856 | struct pci_dev *pdev = adapter->pdev; | |
857 | const struct firmware *fw = adapter->fw; | |
858 | u8 fw_type = adapter->fw_type; | |
859 | ||
860 | if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) { | |
861 | if (qlcnic_set_product_offs(adapter)) | |
862 | return -EINVAL; | |
863 | ||
864 | min_size = QLCNIC_UNI_FW_MIN_SIZE; | |
865 | } else { | |
866 | val = cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]); | |
867 | if ((__force u32)val != QLCNIC_BDINFO_MAGIC) | |
868 | return -EINVAL; | |
869 | ||
870 | min_size = QLCNIC_FW_MIN_SIZE; | |
871 | } | |
872 | ||
873 | if (fw->size < min_size) | |
874 | return -EINVAL; | |
875 | ||
876 | val = qlcnic_get_fw_version(adapter); | |
877 | ||
878 | min_ver = QLCNIC_VERSION_CODE(4, 0, 216); | |
879 | ||
880 | ver = QLCNIC_DECODE_VERSION(val); | |
881 | ||
882 | if ((_major(ver) > _QLCNIC_LINUX_MAJOR) || (ver < min_ver)) { | |
883 | dev_err(&pdev->dev, | |
884 | "%s: firmware version %d.%d.%d unsupported\n", | |
885 | fw_name[fw_type], _major(ver), _minor(ver), _build(ver)); | |
886 | return -EINVAL; | |
887 | } | |
888 | ||
889 | val = qlcnic_get_bios_version(adapter); | |
890 | qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios); | |
891 | if ((__force u32)val != bios) { | |
892 | dev_err(&pdev->dev, "%s: firmware bios is incompatible\n", | |
893 | fw_name[fw_type]); | |
894 | return -EINVAL; | |
895 | } | |
896 | ||
897 | /* check if flashed firmware is newer */ | |
898 | if (qlcnic_rom_fast_read(adapter, | |
899 | QLCNIC_FW_VERSION_OFFSET, (int *)&val)) | |
900 | return -EIO; | |
901 | ||
902 | val = QLCNIC_DECODE_VERSION(val); | |
903 | if (val > ver) { | |
904 | dev_info(&pdev->dev, "%s: firmware is older than flash\n", | |
905 | fw_name[fw_type]); | |
906 | return -EINVAL; | |
907 | } | |
908 | ||
909 | QLCWR32(adapter, QLCNIC_CAM_RAM(0x1fc), QLCNIC_BDINFO_MAGIC); | |
910 | return 0; | |
911 | } | |
912 | ||
913 | static void | |
914 | qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter) | |
915 | { | |
916 | u8 fw_type; | |
917 | ||
918 | switch (adapter->fw_type) { | |
919 | case QLCNIC_UNKNOWN_ROMIMAGE: | |
920 | fw_type = QLCNIC_UNIFIED_ROMIMAGE; | |
921 | break; | |
922 | ||
923 | case QLCNIC_UNIFIED_ROMIMAGE: | |
924 | default: | |
925 | fw_type = QLCNIC_FLASH_ROMIMAGE; | |
926 | break; | |
927 | } | |
928 | ||
929 | adapter->fw_type = fw_type; | |
930 | } | |
931 | ||
932 | ||
933 | ||
934 | void qlcnic_request_firmware(struct qlcnic_adapter *adapter) | |
935 | { | |
936 | struct pci_dev *pdev = adapter->pdev; | |
937 | int rc; | |
938 | ||
939 | adapter->fw_type = QLCNIC_UNKNOWN_ROMIMAGE; | |
940 | ||
941 | next: | |
942 | qlcnic_get_next_fwtype(adapter); | |
943 | ||
944 | if (adapter->fw_type == QLCNIC_FLASH_ROMIMAGE) { | |
945 | adapter->fw = NULL; | |
946 | } else { | |
947 | rc = request_firmware(&adapter->fw, | |
948 | fw_name[adapter->fw_type], &pdev->dev); | |
949 | if (rc != 0) | |
950 | goto next; | |
951 | ||
952 | rc = qlcnic_validate_firmware(adapter); | |
953 | if (rc != 0) { | |
954 | release_firmware(adapter->fw); | |
955 | msleep(1); | |
956 | goto next; | |
957 | } | |
958 | } | |
959 | } | |
960 | ||
961 | ||
962 | void | |
963 | qlcnic_release_firmware(struct qlcnic_adapter *adapter) | |
964 | { | |
965 | if (adapter->fw) | |
966 | release_firmware(adapter->fw); | |
967 | adapter->fw = NULL; | |
968 | } | |
969 | ||
970 | int qlcnic_phantom_init(struct qlcnic_adapter *adapter) | |
971 | { | |
972 | u32 val; | |
973 | int retries = 60; | |
974 | ||
975 | do { | |
976 | val = QLCRD32(adapter, CRB_CMDPEG_STATE); | |
977 | ||
978 | switch (val) { | |
979 | case PHAN_INITIALIZE_COMPLETE: | |
980 | case PHAN_INITIALIZE_ACK: | |
981 | return 0; | |
982 | case PHAN_INITIALIZE_FAILED: | |
983 | goto out_err; | |
984 | default: | |
985 | break; | |
986 | } | |
987 | ||
988 | msleep(500); | |
989 | ||
990 | } while (--retries); | |
991 | ||
992 | QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED); | |
993 | ||
994 | out_err: | |
995 | dev_err(&adapter->pdev->dev, "firmware init failed\n"); | |
996 | return -EIO; | |
997 | } | |
998 | ||
999 | static int | |
1000 | qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter) | |
1001 | { | |
1002 | u32 val; | |
1003 | int retries = 2000; | |
1004 | ||
1005 | do { | |
1006 | val = QLCRD32(adapter, CRB_RCVPEG_STATE); | |
1007 | ||
1008 | if (val == PHAN_PEG_RCV_INITIALIZED) | |
1009 | return 0; | |
1010 | ||
1011 | msleep(10); | |
1012 | ||
1013 | } while (--retries); | |
1014 | ||
1015 | if (!retries) { | |
1016 | dev_err(&adapter->pdev->dev, "Receive Peg initialization not " | |
1017 | "complete, state: 0x%x.\n", val); | |
1018 | return -EIO; | |
1019 | } | |
1020 | ||
1021 | return 0; | |
1022 | } | |
1023 | ||
1024 | int qlcnic_init_firmware(struct qlcnic_adapter *adapter) | |
1025 | { | |
1026 | int err; | |
1027 | ||
1028 | err = qlcnic_receive_peg_ready(adapter); | |
1029 | if (err) | |
1030 | return err; | |
1031 | ||
1032 | QLCWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT); | |
1033 | QLCWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC); | |
1034 | QLCWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE); | |
1035 | QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK); | |
1036 | ||
1037 | return err; | |
1038 | } | |
1039 | ||
1040 | static void | |
1041 | qlcnic_handle_linkevent(struct qlcnic_adapter *adapter, | |
1042 | struct qlcnic_fw_msg *msg) | |
1043 | { | |
1044 | u32 cable_OUI; | |
1045 | u16 cable_len; | |
1046 | u16 link_speed; | |
1047 | u8 link_status, module, duplex, autoneg; | |
1048 | struct net_device *netdev = adapter->netdev; | |
1049 | ||
1050 | adapter->has_link_events = 1; | |
1051 | ||
1052 | cable_OUI = msg->body[1] & 0xffffffff; | |
1053 | cable_len = (msg->body[1] >> 32) & 0xffff; | |
1054 | link_speed = (msg->body[1] >> 48) & 0xffff; | |
1055 | ||
1056 | link_status = msg->body[2] & 0xff; | |
1057 | duplex = (msg->body[2] >> 16) & 0xff; | |
1058 | autoneg = (msg->body[2] >> 24) & 0xff; | |
1059 | ||
1060 | module = (msg->body[2] >> 8) & 0xff; | |
1061 | if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) | |
1062 | dev_info(&netdev->dev, "unsupported cable: OUI 0x%x, " | |
1063 | "length %d\n", cable_OUI, cable_len); | |
1064 | else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) | |
1065 | dev_info(&netdev->dev, "unsupported cable length %d\n", | |
1066 | cable_len); | |
1067 | ||
1068 | qlcnic_advert_link_change(adapter, link_status); | |
1069 | ||
1070 | if (duplex == LINKEVENT_FULL_DUPLEX) | |
1071 | adapter->link_duplex = DUPLEX_FULL; | |
1072 | else | |
1073 | adapter->link_duplex = DUPLEX_HALF; | |
1074 | ||
1075 | adapter->module_type = module; | |
1076 | adapter->link_autoneg = autoneg; | |
1077 | adapter->link_speed = link_speed; | |
1078 | } | |
1079 | ||
1080 | static void | |
1081 | qlcnic_handle_fw_message(int desc_cnt, int index, | |
1082 | struct qlcnic_host_sds_ring *sds_ring) | |
1083 | { | |
1084 | struct qlcnic_fw_msg msg; | |
1085 | struct status_desc *desc; | |
1086 | int i = 0, opcode; | |
1087 | ||
1088 | while (desc_cnt > 0 && i < 8) { | |
1089 | desc = &sds_ring->desc_head[index]; | |
1090 | msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]); | |
1091 | msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]); | |
1092 | ||
1093 | index = get_next_index(index, sds_ring->num_desc); | |
1094 | desc_cnt--; | |
1095 | } | |
1096 | ||
1097 | opcode = qlcnic_get_nic_msg_opcode(msg.body[0]); | |
1098 | switch (opcode) { | |
1099 | case QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE: | |
1100 | qlcnic_handle_linkevent(sds_ring->adapter, &msg); | |
1101 | break; | |
1102 | default: | |
1103 | break; | |
1104 | } | |
1105 | } | |
1106 | ||
1107 | static int | |
1108 | qlcnic_alloc_rx_skb(struct qlcnic_adapter *adapter, | |
1109 | struct qlcnic_host_rds_ring *rds_ring, | |
1110 | struct qlcnic_rx_buffer *buffer) | |
1111 | { | |
1112 | struct sk_buff *skb; | |
1113 | dma_addr_t dma; | |
1114 | struct pci_dev *pdev = adapter->pdev; | |
1115 | ||
1116 | buffer->skb = dev_alloc_skb(rds_ring->skb_size); | |
1117 | if (!buffer->skb) | |
1118 | return -ENOMEM; | |
1119 | ||
1120 | skb = buffer->skb; | |
1121 | ||
1122 | if (!adapter->ahw.cut_through) | |
1123 | skb_reserve(skb, 2); | |
1124 | ||
1125 | dma = pci_map_single(pdev, skb->data, | |
1126 | rds_ring->dma_size, PCI_DMA_FROMDEVICE); | |
1127 | ||
1128 | if (pci_dma_mapping_error(pdev, dma)) { | |
1129 | dev_kfree_skb_any(skb); | |
1130 | buffer->skb = NULL; | |
1131 | return -ENOMEM; | |
1132 | } | |
1133 | ||
1134 | buffer->skb = skb; | |
1135 | buffer->dma = dma; | |
1136 | buffer->state = QLCNIC_BUFFER_BUSY; | |
1137 | ||
1138 | return 0; | |
1139 | } | |
1140 | ||
1141 | static struct sk_buff *qlcnic_process_rxbuf(struct qlcnic_adapter *adapter, | |
1142 | struct qlcnic_host_rds_ring *rds_ring, u16 index, u16 cksum) | |
1143 | { | |
1144 | struct qlcnic_rx_buffer *buffer; | |
1145 | struct sk_buff *skb; | |
1146 | ||
1147 | buffer = &rds_ring->rx_buf_arr[index]; | |
1148 | ||
1149 | pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size, | |
1150 | PCI_DMA_FROMDEVICE); | |
1151 | ||
1152 | skb = buffer->skb; | |
1153 | if (!skb) | |
1154 | goto no_skb; | |
1155 | ||
1156 | if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) { | |
1157 | adapter->stats.csummed++; | |
1158 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
1159 | } else { | |
1160 | skb->ip_summed = CHECKSUM_NONE; | |
1161 | } | |
1162 | ||
1163 | skb->dev = adapter->netdev; | |
1164 | ||
1165 | buffer->skb = NULL; | |
1166 | no_skb: | |
1167 | buffer->state = QLCNIC_BUFFER_FREE; | |
1168 | return skb; | |
1169 | } | |
1170 | ||
1171 | static struct qlcnic_rx_buffer * | |
1172 | qlcnic_process_rcv(struct qlcnic_adapter *adapter, | |
1173 | struct qlcnic_host_sds_ring *sds_ring, | |
1174 | int ring, u64 sts_data0) | |
1175 | { | |
1176 | struct net_device *netdev = adapter->netdev; | |
1177 | struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx; | |
1178 | struct qlcnic_rx_buffer *buffer; | |
1179 | struct sk_buff *skb; | |
1180 | struct qlcnic_host_rds_ring *rds_ring; | |
1181 | int index, length, cksum, pkt_offset; | |
1182 | ||
1183 | if (unlikely(ring >= adapter->max_rds_rings)) | |
1184 | return NULL; | |
1185 | ||
1186 | rds_ring = &recv_ctx->rds_rings[ring]; | |
1187 | ||
1188 | index = qlcnic_get_sts_refhandle(sts_data0); | |
1189 | if (unlikely(index >= rds_ring->num_desc)) | |
1190 | return NULL; | |
1191 | ||
1192 | buffer = &rds_ring->rx_buf_arr[index]; | |
1193 | ||
1194 | length = qlcnic_get_sts_totallength(sts_data0); | |
1195 | cksum = qlcnic_get_sts_status(sts_data0); | |
1196 | pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0); | |
1197 | ||
1198 | skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum); | |
1199 | if (!skb) | |
1200 | return buffer; | |
1201 | ||
1202 | if (length > rds_ring->skb_size) | |
1203 | skb_put(skb, rds_ring->skb_size); | |
1204 | else | |
1205 | skb_put(skb, length); | |
1206 | ||
1207 | if (pkt_offset) | |
1208 | skb_pull(skb, pkt_offset); | |
1209 | ||
1210 | skb->truesize = skb->len + sizeof(struct sk_buff); | |
1211 | skb->protocol = eth_type_trans(skb, netdev); | |
1212 | ||
1213 | napi_gro_receive(&sds_ring->napi, skb); | |
1214 | ||
1215 | adapter->stats.rx_pkts++; | |
1216 | adapter->stats.rxbytes += length; | |
1217 | ||
1218 | return buffer; | |
1219 | } | |
1220 | ||
1221 | #define QLC_TCP_HDR_SIZE 20 | |
1222 | #define QLC_TCP_TS_OPTION_SIZE 12 | |
1223 | #define QLC_TCP_TS_HDR_SIZE (QLC_TCP_HDR_SIZE + QLC_TCP_TS_OPTION_SIZE) | |
1224 | ||
1225 | static struct qlcnic_rx_buffer * | |
1226 | qlcnic_process_lro(struct qlcnic_adapter *adapter, | |
1227 | struct qlcnic_host_sds_ring *sds_ring, | |
1228 | int ring, u64 sts_data0, u64 sts_data1) | |
1229 | { | |
1230 | struct net_device *netdev = adapter->netdev; | |
1231 | struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx; | |
1232 | struct qlcnic_rx_buffer *buffer; | |
1233 | struct sk_buff *skb; | |
1234 | struct qlcnic_host_rds_ring *rds_ring; | |
1235 | struct iphdr *iph; | |
1236 | struct tcphdr *th; | |
1237 | bool push, timestamp; | |
1238 | int l2_hdr_offset, l4_hdr_offset; | |
1239 | int index; | |
1240 | u16 lro_length, length, data_offset; | |
1241 | u32 seq_number; | |
1242 | ||
1243 | if (unlikely(ring > adapter->max_rds_rings)) | |
1244 | return NULL; | |
1245 | ||
1246 | rds_ring = &recv_ctx->rds_rings[ring]; | |
1247 | ||
1248 | index = qlcnic_get_lro_sts_refhandle(sts_data0); | |
1249 | if (unlikely(index > rds_ring->num_desc)) | |
1250 | return NULL; | |
1251 | ||
1252 | buffer = &rds_ring->rx_buf_arr[index]; | |
1253 | ||
1254 | timestamp = qlcnic_get_lro_sts_timestamp(sts_data0); | |
1255 | lro_length = qlcnic_get_lro_sts_length(sts_data0); | |
1256 | l2_hdr_offset = qlcnic_get_lro_sts_l2_hdr_offset(sts_data0); | |
1257 | l4_hdr_offset = qlcnic_get_lro_sts_l4_hdr_offset(sts_data0); | |
1258 | push = qlcnic_get_lro_sts_push_flag(sts_data0); | |
1259 | seq_number = qlcnic_get_lro_sts_seq_number(sts_data1); | |
1260 | ||
1261 | skb = qlcnic_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK); | |
1262 | if (!skb) | |
1263 | return buffer; | |
1264 | ||
1265 | if (timestamp) | |
1266 | data_offset = l4_hdr_offset + QLC_TCP_TS_HDR_SIZE; | |
1267 | else | |
1268 | data_offset = l4_hdr_offset + QLC_TCP_HDR_SIZE; | |
1269 | ||
1270 | skb_put(skb, lro_length + data_offset); | |
1271 | ||
1272 | skb->truesize = skb->len + sizeof(struct sk_buff) + skb_headroom(skb); | |
1273 | ||
1274 | skb_pull(skb, l2_hdr_offset); | |
1275 | skb->protocol = eth_type_trans(skb, netdev); | |
1276 | ||
1277 | iph = (struct iphdr *)skb->data; | |
1278 | th = (struct tcphdr *)(skb->data + (iph->ihl << 2)); | |
1279 | ||
1280 | length = (iph->ihl << 2) + (th->doff << 2) + lro_length; | |
1281 | iph->tot_len = htons(length); | |
1282 | iph->check = 0; | |
1283 | iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl); | |
1284 | th->psh = push; | |
1285 | th->seq = htonl(seq_number); | |
1286 | ||
1287 | length = skb->len; | |
1288 | ||
1289 | netif_receive_skb(skb); | |
1290 | ||
1291 | adapter->stats.lro_pkts++; | |
1292 | adapter->stats.rxbytes += length; | |
1293 | ||
1294 | return buffer; | |
1295 | } | |
1296 | ||
1297 | int | |
1298 | qlcnic_process_rcv_ring(struct qlcnic_host_sds_ring *sds_ring, int max) | |
1299 | { | |
1300 | struct qlcnic_adapter *adapter = sds_ring->adapter; | |
1301 | struct list_head *cur; | |
1302 | struct status_desc *desc; | |
1303 | struct qlcnic_rx_buffer *rxbuf; | |
1304 | u64 sts_data0, sts_data1; | |
1305 | ||
1306 | int count = 0; | |
1307 | int opcode, ring, desc_cnt; | |
1308 | u32 consumer = sds_ring->consumer; | |
1309 | ||
1310 | while (count < max) { | |
1311 | desc = &sds_ring->desc_head[consumer]; | |
1312 | sts_data0 = le64_to_cpu(desc->status_desc_data[0]); | |
1313 | ||
1314 | if (!(sts_data0 & STATUS_OWNER_HOST)) | |
1315 | break; | |
1316 | ||
1317 | desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0); | |
1318 | opcode = qlcnic_get_sts_opcode(sts_data0); | |
1319 | ||
1320 | switch (opcode) { | |
1321 | case QLCNIC_RXPKT_DESC: | |
1322 | case QLCNIC_OLD_RXPKT_DESC: | |
1323 | case QLCNIC_SYN_OFFLOAD: | |
1324 | ring = qlcnic_get_sts_type(sts_data0); | |
1325 | rxbuf = qlcnic_process_rcv(adapter, sds_ring, | |
1326 | ring, sts_data0); | |
1327 | break; | |
1328 | case QLCNIC_LRO_DESC: | |
1329 | ring = qlcnic_get_lro_sts_type(sts_data0); | |
1330 | sts_data1 = le64_to_cpu(desc->status_desc_data[1]); | |
1331 | rxbuf = qlcnic_process_lro(adapter, sds_ring, | |
1332 | ring, sts_data0, sts_data1); | |
1333 | break; | |
1334 | case QLCNIC_RESPONSE_DESC: | |
1335 | qlcnic_handle_fw_message(desc_cnt, consumer, sds_ring); | |
1336 | default: | |
1337 | goto skip; | |
1338 | } | |
1339 | ||
1340 | WARN_ON(desc_cnt > 1); | |
1341 | ||
1342 | if (rxbuf) | |
1343 | list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]); | |
1344 | ||
1345 | skip: | |
1346 | for (; desc_cnt > 0; desc_cnt--) { | |
1347 | desc = &sds_ring->desc_head[consumer]; | |
1348 | desc->status_desc_data[0] = | |
1349 | cpu_to_le64(STATUS_OWNER_PHANTOM); | |
1350 | consumer = get_next_index(consumer, sds_ring->num_desc); | |
1351 | } | |
1352 | count++; | |
1353 | } | |
1354 | ||
1355 | for (ring = 0; ring < adapter->max_rds_rings; ring++) { | |
1356 | struct qlcnic_host_rds_ring *rds_ring = | |
1357 | &adapter->recv_ctx.rds_rings[ring]; | |
1358 | ||
1359 | if (!list_empty(&sds_ring->free_list[ring])) { | |
1360 | list_for_each(cur, &sds_ring->free_list[ring]) { | |
1361 | rxbuf = list_entry(cur, | |
1362 | struct qlcnic_rx_buffer, list); | |
1363 | qlcnic_alloc_rx_skb(adapter, rds_ring, rxbuf); | |
1364 | } | |
1365 | spin_lock(&rds_ring->lock); | |
1366 | list_splice_tail_init(&sds_ring->free_list[ring], | |
1367 | &rds_ring->free_list); | |
1368 | spin_unlock(&rds_ring->lock); | |
1369 | } | |
1370 | ||
1371 | qlcnic_post_rx_buffers_nodb(adapter, rds_ring); | |
1372 | } | |
1373 | ||
1374 | if (count) { | |
1375 | sds_ring->consumer = consumer; | |
1376 | writel(consumer, sds_ring->crb_sts_consumer); | |
1377 | } | |
1378 | ||
1379 | return count; | |
1380 | } | |
1381 | ||
1382 | void | |
1383 | qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter, u32 ringid, | |
1384 | struct qlcnic_host_rds_ring *rds_ring) | |
1385 | { | |
1386 | struct rcv_desc *pdesc; | |
1387 | struct qlcnic_rx_buffer *buffer; | |
1388 | int producer, count = 0; | |
1389 | struct list_head *head; | |
1390 | ||
1391 | producer = rds_ring->producer; | |
1392 | ||
1393 | spin_lock(&rds_ring->lock); | |
1394 | head = &rds_ring->free_list; | |
1395 | while (!list_empty(head)) { | |
1396 | ||
1397 | buffer = list_entry(head->next, struct qlcnic_rx_buffer, list); | |
1398 | ||
1399 | if (!buffer->skb) { | |
1400 | if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer)) | |
1401 | break; | |
1402 | } | |
1403 | ||
1404 | count++; | |
1405 | list_del(&buffer->list); | |
1406 | ||
1407 | /* make a rcv descriptor */ | |
1408 | pdesc = &rds_ring->desc_head[producer]; | |
1409 | pdesc->addr_buffer = cpu_to_le64(buffer->dma); | |
1410 | pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); | |
1411 | pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size); | |
1412 | ||
1413 | producer = get_next_index(producer, rds_ring->num_desc); | |
1414 | } | |
1415 | spin_unlock(&rds_ring->lock); | |
1416 | ||
1417 | if (count) { | |
1418 | rds_ring->producer = producer; | |
1419 | writel((producer-1) & (rds_ring->num_desc-1), | |
1420 | rds_ring->crb_rcv_producer); | |
1421 | } | |
1422 | } | |
1423 | ||
1424 | static void | |
1425 | qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter, | |
1426 | struct qlcnic_host_rds_ring *rds_ring) | |
1427 | { | |
1428 | struct rcv_desc *pdesc; | |
1429 | struct qlcnic_rx_buffer *buffer; | |
1430 | int producer, count = 0; | |
1431 | struct list_head *head; | |
1432 | ||
1433 | producer = rds_ring->producer; | |
1434 | if (!spin_trylock(&rds_ring->lock)) | |
1435 | return; | |
1436 | ||
1437 | head = &rds_ring->free_list; | |
1438 | while (!list_empty(head)) { | |
1439 | ||
1440 | buffer = list_entry(head->next, struct qlcnic_rx_buffer, list); | |
1441 | ||
1442 | if (!buffer->skb) { | |
1443 | if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer)) | |
1444 | break; | |
1445 | } | |
1446 | ||
1447 | count++; | |
1448 | list_del(&buffer->list); | |
1449 | ||
1450 | /* make a rcv descriptor */ | |
1451 | pdesc = &rds_ring->desc_head[producer]; | |
1452 | pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); | |
1453 | pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size); | |
1454 | pdesc->addr_buffer = cpu_to_le64(buffer->dma); | |
1455 | ||
1456 | producer = get_next_index(producer, rds_ring->num_desc); | |
1457 | } | |
1458 | ||
1459 | if (count) { | |
1460 | rds_ring->producer = producer; | |
1461 | writel((producer - 1) & (rds_ring->num_desc - 1), | |
1462 | rds_ring->crb_rcv_producer); | |
1463 | } | |
1464 | spin_unlock(&rds_ring->lock); | |
1465 | } | |
1466 |