[linux-2.6-block.git] / drivers / net / phy / vitesse.c

/*
 * Driver for Vitesse PHYs
 *
 * Author: Kriston Carson
 *
 * Copyright (c) 2005 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/phy.h>

/* Vitesse Extended Control Register 1 */
#define MII_VSC8244_EXT_CON1           0x17
#define MII_VSC8244_EXTCON1_INIT       0x0000

/* Vitesse Interrupt Mask Register */
#define MII_VSC8244_IMASK		0x19
#define MII_VSC8244_IMASK_IEN		0x8000
#define MII_VSC8244_IMASK_SPEED		0x4000
#define MII_VSC8244_IMASK_LINK		0x2000
#define MII_VSC8244_IMASK_DUPLEX	0x1000
#define MII_VSC8244_IMASK_MASK		0xf000

/* Vitesse Interrupt Status Register */
#define MII_VSC8244_ISTAT		0x1a
#define MII_VSC8244_ISTAT_STATUS	0x8000
#define MII_VSC8244_ISTAT_SPEED		0x4000
#define MII_VSC8244_ISTAT_LINK		0x2000
#define MII_VSC8244_ISTAT_DUPLEX	0x1000

/* Vitesse Auxiliary Control/Status Register */
#define MII_VSC8244_AUX_CONSTAT        	0x1c
#define MII_VSC8244_AUXCONSTAT_INIT    	0x0004
#define MII_VSC8244_AUXCONSTAT_DUPLEX  	0x0020
#define MII_VSC8244_AUXCONSTAT_SPEED   	0x0018
#define MII_VSC8244_AUXCONSTAT_GBIT    	0x0010
#define MII_VSC8244_AUXCONSTAT_100     	0x0008

MODULE_DESCRIPTION("Vitesse PHY driver");
MODULE_AUTHOR("Kriston Carson");
MODULE_LICENSE("GPL");

static int vsc824x_config_init(struct phy_device *phydev)
{
	int err;

	err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT,
			MII_VSC8244_AUXCONSTAT_INIT);
	if (err < 0)
		return err;

	err = phy_write(phydev, MII_VSC8244_EXT_CON1,
			MII_VSC8244_EXTCON1_INIT);
	return err;
}

static int vsc824x_ack_interrupt(struct phy_device *phydev)
{
	int err = 0;
	
	/*
	 * Don't bother to ACK the interrupts if interrupts
	 * are disabled.  The 824x cannot clear the interrupts
	 * if they are disabled.
	 */
	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
		err = phy_read(phydev, MII_VSC8244_ISTAT);

	return (err < 0) ? err : 0;
}

static int vsc824x_config_intr(struct phy_device *phydev)
{
	int err;

	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
		err = phy_write(phydev, MII_VSC8244_IMASK,
				MII_VSC8244_IMASK_MASK);
	else {
		/*
		 * The Vitesse PHY cannot clear the interrupt
		 * once it has disabled them, so we clear them first
		 */
		err = phy_read(phydev, MII_VSC8244_ISTAT);

		if (err)
			return err;

		err = phy_write(phydev, MII_VSC8244_IMASK, 0);
	}

	return err;
}

/* Vitesse 824x */
static struct phy_driver vsc8244_driver = {
	.phy_id		= 0x000fc6c0,
	.name		= "Vitesse VSC8244",
	.phy_id_mask	= 0x000fffc0,
	.features	= PHY_GBIT_FEATURES,
	.flags		= PHY_HAS_INTERRUPT,
	.config_init	= &vsc824x_config_init,
	.config_aneg	= &genphy_config_aneg,
	.read_status	= &genphy_read_status,
	.ack_interrupt	= &vsc824x_ack_interrupt,
	.config_intr	= &vsc824x_config_intr,
	.driver 	= { .owner = THIS_MODULE,},
};

static int __init vsc8244_init(void)
{
	return phy_driver_register(&vsc8244_driver);
}

static void __exit vsc8244_exit(void)
{
	phy_driver_unregister(&vsc8244_driver);
}

module_init(vsc8244_init);
module_exit(vsc8244_exit);
Commit	Line	Data
ef82a306 JL	1	/*
	2	* Driver for Vitesse PHYs
	3	*
	4	* Author: Kriston Carson
	5	*
	6	* Copyright (c) 2005 Freescale Semiconductor, Inc.
	7	*
	8	* This program is free software; you can redistribute it and/or modify it
	9	* under the terms of the GNU General Public License as published by the
	10	* Free Software Foundation; either version 2 of the License, or (at your
	11	* option) any later version.
	12	*
	13	*/
	14
ef82a306 JL	15	#include <linux/kernel.h>
	16	#include <linux/module.h>
	17	#include <linux/mii.h>
	18	#include <linux/ethtool.h>
	19	#include <linux/phy.h>
	20
	21	/* Vitesse Extended Control Register 1 */
	22	#define MII_VSC8244_EXT_CON1 0x17
	23	#define MII_VSC8244_EXTCON1_INIT 0x0000
	24
	25	/* Vitesse Interrupt Mask Register */
	26	#define MII_VSC8244_IMASK 0x19
	27	#define MII_VSC8244_IMASK_IEN 0x8000
	28	#define MII_VSC8244_IMASK_SPEED 0x4000
	29	#define MII_VSC8244_IMASK_LINK 0x2000
	30	#define MII_VSC8244_IMASK_DUPLEX 0x1000
	31	#define MII_VSC8244_IMASK_MASK 0xf000
	32
	33	/* Vitesse Interrupt Status Register */
	34	#define MII_VSC8244_ISTAT 0x1a
	35	#define MII_VSC8244_ISTAT_STATUS 0x8000
	36	#define MII_VSC8244_ISTAT_SPEED 0x4000
	37	#define MII_VSC8244_ISTAT_LINK 0x2000
	38	#define MII_VSC8244_ISTAT_DUPLEX 0x1000
	39
	40	/* Vitesse Auxiliary Control/Status Register */
	41	#define MII_VSC8244_AUX_CONSTAT 0x1c
	42	#define MII_VSC8244_AUXCONSTAT_INIT 0x0004
	43	#define MII_VSC8244_AUXCONSTAT_DUPLEX 0x0020
	44	#define MII_VSC8244_AUXCONSTAT_SPEED 0x0018
	45	#define MII_VSC8244_AUXCONSTAT_GBIT 0x0010
	46	#define MII_VSC8244_AUXCONSTAT_100 0x0008
	47
	48	MODULE_DESCRIPTION("Vitesse PHY driver");
	49	MODULE_AUTHOR("Kriston Carson");
	50	MODULE_LICENSE("GPL");
	51
	52	static int vsc824x_config_init(struct phy_device *phydev)
	53	{
	54	int err;
	55
	56	err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT,
	57	MII_VSC8244_AUXCONSTAT_INIT);
	58	if (err < 0)
	59	return err;
	60
	61	err = phy_write(phydev, MII_VSC8244_EXT_CON1,
	62	MII_VSC8244_EXTCON1_INIT);
	63	return err;
	64	}
	65
	66	static int vsc824x_ack_interrupt(struct phy_device *phydev)
	67	{
1d5e83aa AF	68	int err = 0;
	69
	70	/*
	71	* Don't bother to ACK the interrupts if interrupts
	72	* are disabled. The 824x cannot clear the interrupts
	73	* if they are disabled.
	74	*/
	75	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
	76	err = phy_read(phydev, MII_VSC8244_ISTAT);
ef82a306 JL	77
	78	return (err < 0) ? err : 0;
	79	}
	80
	81	static int vsc824x_config_intr(struct phy_device *phydev)
	82	{
	83	int err;
	84
	85	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
	86	err = phy_write(phydev, MII_VSC8244_IMASK,
	87	MII_VSC8244_IMASK_MASK);
1d5e83aa AF	88	else {
	89	/*
	90	* The Vitesse PHY cannot clear the interrupt
	91	* once it has disabled them, so we clear them first
	92	*/
	93	err = phy_read(phydev, MII_VSC8244_ISTAT);
	94
	95	if (err)
	96	return err;
	97
ef82a306	98	err = phy_write(phydev, MII_VSC8244_IMASK, 0);
1d5e83aa AF	99	}
1d5e83aa AF	100
ef82a306 JL	101	return err;
	102	}
	103
	104	/* Vitesse 824x */
	105	static struct phy_driver vsc8244_driver = {
5f708dd9	106	.phy_id = 0x000fc6c0,
ef82a306 JL	107	.name = "Vitesse VSC8244",
	108	.phy_id_mask = 0x000fffc0,
	109	.features = PHY_GBIT_FEATURES,
	110	.flags = PHY_HAS_INTERRUPT,
	111	.config_init = &vsc824x_config_init,
	112	.config_aneg = &genphy_config_aneg,
	113	.read_status = &genphy_read_status,
	114	.ack_interrupt = &vsc824x_ack_interrupt,
	115	.config_intr = &vsc824x_config_intr,
	116	.driver = { .owner = THIS_MODULE,},
	117	};
	118
	119	static int __init vsc8244_init(void)
	120	{
	121	return phy_driver_register(&vsc8244_driver);
	122	}
	123
	124	static void __exit vsc8244_exit(void)
	125	{
	126	phy_driver_unregister(&vsc8244_driver);
	127	}
	128
	129	module_init(vsc8244_init);
	130	module_exit(vsc8244_exit);