[linux-block.git] / drivers / net / phy / spi_ks8995.c

// SPDX-License-Identifier: GPL-2.0
/*
 * SPI driver for Micrel/Kendin KS8995M and KSZ8864RMN ethernet switches
 *
 * Copyright (C) 2008 Gabor Juhos <juhosg at openwrt.org>
 *
 * This file was based on: drivers/spi/at25.c
 *     Copyright (C) 2006 David Brownell
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/gpio/consumer.h>
#include <linux/of.h>

#include <linux/spi/spi.h>

#define DRV_VERSION		"0.1.1"
#define DRV_DESC		"Micrel KS8995 Ethernet switch SPI driver"

/* ------------------------------------------------------------------------ */

#define KS8995_REG_ID0		0x00    /* Chip ID0 */
#define KS8995_REG_ID1		0x01    /* Chip ID1 */

#define KS8995_REG_GC0		0x02    /* Global Control 0 */
#define KS8995_REG_GC1		0x03    /* Global Control 1 */
#define KS8995_REG_GC2		0x04    /* Global Control 2 */
#define KS8995_REG_GC3		0x05    /* Global Control 3 */
#define KS8995_REG_GC4		0x06    /* Global Control 4 */
#define KS8995_REG_GC5		0x07    /* Global Control 5 */
#define KS8995_REG_GC6		0x08    /* Global Control 6 */
#define KS8995_REG_GC7		0x09    /* Global Control 7 */
#define KS8995_REG_GC8		0x0a    /* Global Control 8 */
#define KS8995_REG_GC9		0x0b    /* Global Control 9 */

#define KS8995_REG_PC(p, r)	((0x10 * p) + r)	 /* Port Control */
#define KS8995_REG_PS(p, r)	((0x10 * p) + r + 0xe)  /* Port Status */

#define KS8995_REG_TPC0		0x60    /* TOS Priority Control 0 */
#define KS8995_REG_TPC1		0x61    /* TOS Priority Control 1 */
#define KS8995_REG_TPC2		0x62    /* TOS Priority Control 2 */
#define KS8995_REG_TPC3		0x63    /* TOS Priority Control 3 */
#define KS8995_REG_TPC4		0x64    /* TOS Priority Control 4 */
#define KS8995_REG_TPC5		0x65    /* TOS Priority Control 5 */
#define KS8995_REG_TPC6		0x66    /* TOS Priority Control 6 */
#define KS8995_REG_TPC7		0x67    /* TOS Priority Control 7 */

#define KS8995_REG_MAC0		0x68    /* MAC address 0 */
#define KS8995_REG_MAC1		0x69    /* MAC address 1 */
#define KS8995_REG_MAC2		0x6a    /* MAC address 2 */
#define KS8995_REG_MAC3		0x6b    /* MAC address 3 */
#define KS8995_REG_MAC4		0x6c    /* MAC address 4 */
#define KS8995_REG_MAC5		0x6d    /* MAC address 5 */

#define KS8995_REG_IAC0		0x6e    /* Indirect Access Control 0 */
#define KS8995_REG_IAC1		0x6f    /* Indirect Access Control 0 */
#define KS8995_REG_IAD7		0x70    /* Indirect Access Data 7 */
#define KS8995_REG_IAD6		0x71    /* Indirect Access Data 6 */
#define KS8995_REG_IAD5		0x72    /* Indirect Access Data 5 */
#define KS8995_REG_IAD4		0x73    /* Indirect Access Data 4 */
#define KS8995_REG_IAD3		0x74    /* Indirect Access Data 3 */
#define KS8995_REG_IAD2		0x75    /* Indirect Access Data 2 */
#define KS8995_REG_IAD1		0x76    /* Indirect Access Data 1 */
#define KS8995_REG_IAD0		0x77    /* Indirect Access Data 0 */

#define KSZ8864_REG_ID1		0xfe	/* Chip ID in bit 7 */

#define KS8995_REGS_SIZE	0x80
#define KSZ8864_REGS_SIZE	0x100
#define KSZ8795_REGS_SIZE	0x100

#define ID1_CHIPID_M		0xf
#define ID1_CHIPID_S		4
#define ID1_REVISION_M		0x7
#define ID1_REVISION_S		1
#define ID1_START_SW		1	/* start the switch */

#define FAMILY_KS8995		0x95
#define FAMILY_KSZ8795		0x87
#define CHIPID_M		0
#define KS8995_CHIP_ID		0x00
#define KSZ8864_CHIP_ID		0x01
#define KSZ8795_CHIP_ID		0x09

#define KS8995_CMD_WRITE	0x02U
#define KS8995_CMD_READ		0x03U

#define KS8995_RESET_DELAY	10 /* usec */

enum ks8995_chip_variant {
	ks8995,
	ksz8864,
	ksz8795,
	max_variant
};

struct ks8995_chip_params {
	char *name;
	int family_id;
	int chip_id;
	int regs_size;
	int addr_width;
	int addr_shift;
};

static const struct ks8995_chip_params ks8995_chip[] = {
	[ks8995] = {
		.name = "KS8995MA",
		.family_id = FAMILY_KS8995,
		.chip_id = KS8995_CHIP_ID,
		.regs_size = KS8995_REGS_SIZE,
		.addr_width = 8,
		.addr_shift = 0,
	},
	[ksz8864] = {
		.name = "KSZ8864RMN",
		.family_id = FAMILY_KS8995,
		.chip_id = KSZ8864_CHIP_ID,
		.regs_size = KSZ8864_REGS_SIZE,
		.addr_width = 8,
		.addr_shift = 0,
	},
	[ksz8795] = {
		.name = "KSZ8795CLX",
		.family_id = FAMILY_KSZ8795,
		.chip_id = KSZ8795_CHIP_ID,
		.regs_size = KSZ8795_REGS_SIZE,
		.addr_width = 12,
		.addr_shift = 1,
	},
};

struct ks8995_switch {
	struct spi_device	*spi;
	struct mutex		lock;
	struct gpio_desc	*reset_gpio;
	struct bin_attribute	regs_attr;
	const struct ks8995_chip_params	*chip;
	int			revision_id;
};

static const struct spi_device_id ks8995_id[] = {
	{"ks8995", ks8995},
	{"ksz8864", ksz8864},
	{"ksz8795", ksz8795},
	{ }
};
MODULE_DEVICE_TABLE(spi, ks8995_id);

static const struct of_device_id ks8895_spi_of_match[] = {
	{ .compatible = "micrel,ks8995" },
	{ .compatible = "micrel,ksz8864" },
	{ .compatible = "micrel,ksz8795" },
	{ },
};
MODULE_DEVICE_TABLE(of, ks8895_spi_of_match);

static inline u8 get_chip_id(u8 val)
{
	return (val >> ID1_CHIPID_S) & ID1_CHIPID_M;
}

static inline u8 get_chip_rev(u8 val)
{
	return (val >> ID1_REVISION_S) & ID1_REVISION_M;
}

/* create_spi_cmd - create a chip specific SPI command header
 * @ks: pointer to switch instance
 * @cmd: SPI command for switch
 * @address: register address for command
 *
 * Different chip families use different bit pattern to address the switches
 * registers:
 *
 * KS8995: 8bit command + 8bit address
 * KSZ8795: 3bit command + 12bit address + 1bit TR (?)
 */
static inline __be16 create_spi_cmd(struct ks8995_switch *ks, int cmd,
				    unsigned address)
{
	u16 result = cmd;

	/* make room for address (incl. address shift) */
	result <<= ks->chip->addr_width + ks->chip->addr_shift;
	/* add address */
	result |= address << ks->chip->addr_shift;
	/* SPI protocol needs big endian */
	return cpu_to_be16(result);
}
/* ------------------------------------------------------------------------ */
static int ks8995_read(struct ks8995_switch *ks, char *buf,
		 unsigned offset, size_t count)
{
	__be16 cmd;
	struct spi_transfer t[2];
	struct spi_message m;
	int err;

	cmd = create_spi_cmd(ks, KS8995_CMD_READ, offset);
	spi_message_init(&m);

	memset(&t, 0, sizeof(t));

	t[0].tx_buf = &cmd;
	t[0].len = sizeof(cmd);
	spi_message_add_tail(&t[0], &m);

	t[1].rx_buf = buf;
	t[1].len = count;
	spi_message_add_tail(&t[1], &m);

	mutex_lock(&ks->lock);
	err = spi_sync(ks->spi, &m);
	mutex_unlock(&ks->lock);

	return err ? err : count;
}

static int ks8995_write(struct ks8995_switch *ks, char *buf,
		 unsigned offset, size_t count)
{
	__be16 cmd;
	struct spi_transfer t[2];
	struct spi_message m;
	int err;

	cmd = create_spi_cmd(ks, KS8995_CMD_WRITE, offset);
	spi_message_init(&m);

	memset(&t, 0, sizeof(t));

	t[0].tx_buf = &cmd;
	t[0].len = sizeof(cmd);
	spi_message_add_tail(&t[0], &m);

	t[1].tx_buf = buf;
	t[1].len = count;
	spi_message_add_tail(&t[1], &m);

	mutex_lock(&ks->lock);
	err = spi_sync(ks->spi, &m);
	mutex_unlock(&ks->lock);

	return err ? err : count;
}

static inline int ks8995_read_reg(struct ks8995_switch *ks, u8 addr, u8 *buf)
{
	return ks8995_read(ks, buf, addr, 1) != 1;
}

static inline int ks8995_write_reg(struct ks8995_switch *ks, u8 addr, u8 val)
{
	char buf = val;

	return ks8995_write(ks, &buf, addr, 1) != 1;
}

/* ------------------------------------------------------------------------ */

static int ks8995_stop(struct ks8995_switch *ks)
{
	return ks8995_write_reg(ks, KS8995_REG_ID1, 0);
}

static int ks8995_start(struct ks8995_switch *ks)
{
	return ks8995_write_reg(ks, KS8995_REG_ID1, 1);
}

static int ks8995_reset(struct ks8995_switch *ks)
{
	int err;

	err = ks8995_stop(ks);
	if (err)
		return err;

	udelay(KS8995_RESET_DELAY);

	return ks8995_start(ks);
}

static ssize_t ks8995_registers_read(struct file *filp, struct kobject *kobj,
	struct bin_attribute *bin_attr, char *buf, loff_t off, size_t count)
{
	struct device *dev;
	struct ks8995_switch *ks8995;

	dev = kobj_to_dev(kobj);
	ks8995 = dev_get_drvdata(dev);

	return ks8995_read(ks8995, buf, off, count);
}

static ssize_t ks8995_registers_write(struct file *filp, struct kobject *kobj,
	struct bin_attribute *bin_attr, char *buf, loff_t off, size_t count)
{
	struct device *dev;
	struct ks8995_switch *ks8995;

	dev = kobj_to_dev(kobj);
	ks8995 = dev_get_drvdata(dev);

	return ks8995_write(ks8995, buf, off, count);
}

/* ks8995_get_revision - get chip revision
 * @ks: pointer to switch instance
 *
 * Verify chip family and id and get chip revision.
 */
static int ks8995_get_revision(struct ks8995_switch *ks)
{
	int err;
	u8 id0, id1, ksz8864_id;

	/* read family id */
	err = ks8995_read_reg(ks, KS8995_REG_ID0, &id0);
	if (err) {
		err = -EIO;
		goto err_out;
	}

	/* verify family id */
	if (id0 != ks->chip->family_id) {
		dev_err(&ks->spi->dev, "chip family id mismatch: expected 0x%02x but 0x%02x read\n",
			ks->chip->family_id, id0);
		err = -ENODEV;
		goto err_out;
	}

	switch (ks->chip->family_id) {
	case FAMILY_KS8995:
		/* try reading chip id at CHIP ID1 */
		err = ks8995_read_reg(ks, KS8995_REG_ID1, &id1);
		if (err) {
			err = -EIO;
			goto err_out;
		}

		/* verify chip id */
		if ((get_chip_id(id1) == CHIPID_M) &&
		    (get_chip_id(id1) == ks->chip->chip_id)) {
			/* KS8995MA */
			ks->revision_id = get_chip_rev(id1);
		} else if (get_chip_id(id1) != CHIPID_M) {
			/* KSZ8864RMN */
			err = ks8995_read_reg(ks, KS8995_REG_ID1, &ksz8864_id);
			if (err) {
				err = -EIO;
				goto err_out;
			}

			if ((ksz8864_id & 0x80) &&
			    (ks->chip->chip_id == KSZ8864_CHIP_ID)) {
				ks->revision_id = get_chip_rev(id1);
			}

		} else {
			dev_err(&ks->spi->dev, "unsupported chip id for KS8995 family: 0x%02x\n",
				id1);
			err = -ENODEV;
		}
		break;
	case FAMILY_KSZ8795:
		/* try reading chip id at CHIP ID1 */
		err = ks8995_read_reg(ks, KS8995_REG_ID1, &id1);
		if (err) {
			err = -EIO;
			goto err_out;
		}

		if (get_chip_id(id1) == ks->chip->chip_id) {
			ks->revision_id = get_chip_rev(id1);
		} else {
			dev_err(&ks->spi->dev, "unsupported chip id for KSZ8795 family: 0x%02x\n",
				id1);
			err = -ENODEV;
		}
		break;
	default:
		dev_err(&ks->spi->dev, "unsupported family id: 0x%02x\n", id0);
		err = -ENODEV;
		break;
	}
err_out:
	return err;
}

static const struct bin_attribute ks8995_registers_attr = {
	.attr = {
		.name   = "registers",
		.mode   = 0600,
	},
	.size   = KS8995_REGS_SIZE,
	.read   = ks8995_registers_read,
	.write  = ks8995_registers_write,
};

/* ------------------------------------------------------------------------ */
static int ks8995_probe(struct spi_device *spi)
{
	struct ks8995_switch *ks;
	int err;
	int variant = spi_get_device_id(spi)->driver_data;

	if (variant >= max_variant) {
		dev_err(&spi->dev, "bad chip variant %d\n", variant);
		return -ENODEV;
	}

	ks = devm_kzalloc(&spi->dev, sizeof(*ks), GFP_KERNEL);
	if (!ks)
		return -ENOMEM;

	mutex_init(&ks->lock);
	ks->spi = spi;
	ks->chip = &ks8995_chip[variant];

	ks->reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset",
						 GPIOD_OUT_HIGH);
	err = PTR_ERR_OR_ZERO(ks->reset_gpio);
	if (err) {
		dev_err(&spi->dev,
			"failed to get reset gpio: %d\n", err);
		return err;
	}

	err = gpiod_set_consumer_name(ks->reset_gpio, "switch-reset");
	if (err)
		return err;

	/* de-assert switch reset */
	/* FIXME: this likely requires a delay */
	gpiod_set_value_cansleep(ks->reset_gpio, 0);

	spi_set_drvdata(spi, ks);

	spi->mode = SPI_MODE_0;
	spi->bits_per_word = 8;
	err = spi_setup(spi);
	if (err) {
		dev_err(&spi->dev, "spi_setup failed, err=%d\n", err);
		return err;
	}

	err = ks8995_get_revision(ks);
	if (err)
		return err;

	memcpy(&ks->regs_attr, &ks8995_registers_attr, sizeof(ks->regs_attr));
	ks->regs_attr.size = ks->chip->regs_size;

	err = ks8995_reset(ks);
	if (err)
		return err;

	sysfs_attr_init(&ks->regs_attr.attr);
	err = sysfs_create_bin_file(&spi->dev.kobj, &ks->regs_attr);
	if (err) {
		dev_err(&spi->dev, "unable to create sysfs file, err=%d\n",
				    err);
		return err;
	}

	dev_info(&spi->dev, "%s device found, Chip ID:%x, Revision:%x\n",
		 ks->chip->name, ks->chip->chip_id, ks->revision_id);

	return 0;
}

static void ks8995_remove(struct spi_device *spi)
{
	struct ks8995_switch *ks = spi_get_drvdata(spi);

	sysfs_remove_bin_file(&spi->dev.kobj, &ks->regs_attr);

	/* assert reset */
	gpiod_set_value_cansleep(ks->reset_gpio, 1);
}

/* ------------------------------------------------------------------------ */
static struct spi_driver ks8995_driver = {
	.driver = {
		.name	    = "spi-ks8995",
		.of_match_table = of_match_ptr(ks8895_spi_of_match),
	},
	.probe	  = ks8995_probe,
	.remove	  = ks8995_remove,
	.id_table = ks8995_id,
};

module_spi_driver(ks8995_driver);

MODULE_DESCRIPTION(DRV_DESC);
MODULE_VERSION(DRV_VERSION);
MODULE_AUTHOR("Gabor Juhos <juhosg at openwrt.org>");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
a2443fd1	1	// SPDX-License-Identifier: GPL-2.0
a8e510f6	2	/*
240a12d5	3	* SPI driver for Micrel/Kendin KS8995M and KSZ8864RMN ethernet switches
a8e510f6 FL	4	*
	5	* Copyright (C) 2008 Gabor Juhos <juhosg at openwrt.org>
	6	*
	7	* This file was based on: drivers/spi/at25.c
	8	* Copyright (C) 2006 David Brownell
a8e510f6 FL	9	*/
a8e510f6 FL	10
8d242488 JP	11	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
8d242488 JP	12
a8e510f6 FL	13	#include <linux/types.h>
a8e510f6 FL	14	#include <linux/kernel.h>
a8e510f6 FL	15	#include <linux/module.h>
	16	#include <linux/delay.h>
	17	#include <linux/device.h>
27090cbd	18	#include <linux/gpio/consumer.h>
cd6f288c	19	#include <linux/of.h>
a8e510f6 FL	20
	21	#include <linux/spi/spi.h>
	22
	23	#define DRV_VERSION "0.1.1"
	24	#define DRV_DESC "Micrel KS8995 Ethernet switch SPI driver"
	25
	26	/* ------------------------------------------------------------------------ */
	27
	28	#define KS8995_REG_ID0 0x00 /* Chip ID0 */
	29	#define KS8995_REG_ID1 0x01 /* Chip ID1 */
	30
	31	#define KS8995_REG_GC0 0x02 /* Global Control 0 */
	32	#define KS8995_REG_GC1 0x03 /* Global Control 1 */
	33	#define KS8995_REG_GC2 0x04 /* Global Control 2 */
	34	#define KS8995_REG_GC3 0x05 /* Global Control 3 */
	35	#define KS8995_REG_GC4 0x06 /* Global Control 4 */
	36	#define KS8995_REG_GC5 0x07 /* Global Control 5 */
	37	#define KS8995_REG_GC6 0x08 /* Global Control 6 */
	38	#define KS8995_REG_GC7 0x09 /* Global Control 7 */
	39	#define KS8995_REG_GC8 0x0a /* Global Control 8 */
	40	#define KS8995_REG_GC9 0x0b /* Global Control 9 */
	41
	42	#define KS8995_REG_PC(p, r) ((0x10 * p) + r) /* Port Control */
	43	#define KS8995_REG_PS(p, r) ((0x10 * p) + r + 0xe) /* Port Status */
	44
	45	#define KS8995_REG_TPC0 0x60 /* TOS Priority Control 0 */
	46	#define KS8995_REG_TPC1 0x61 /* TOS Priority Control 1 */
	47	#define KS8995_REG_TPC2 0x62 /* TOS Priority Control 2 */
	48	#define KS8995_REG_TPC3 0x63 /* TOS Priority Control 3 */
	49	#define KS8995_REG_TPC4 0x64 /* TOS Priority Control 4 */
	50	#define KS8995_REG_TPC5 0x65 /* TOS Priority Control 5 */
	51	#define KS8995_REG_TPC6 0x66 /* TOS Priority Control 6 */
	52	#define KS8995_REG_TPC7 0x67 /* TOS Priority Control 7 */
	53
	54	#define KS8995_REG_MAC0 0x68 /* MAC address 0 */
	55	#define KS8995_REG_MAC1 0x69 /* MAC address 1 */
	56	#define KS8995_REG_MAC2 0x6a /* MAC address 2 */
	57	#define KS8995_REG_MAC3 0x6b /* MAC address 3 */
	58	#define KS8995_REG_MAC4 0x6c /* MAC address 4 */
	59	#define KS8995_REG_MAC5 0x6d /* MAC address 5 */
	60
	61	#define KS8995_REG_IAC0 0x6e /* Indirect Access Control 0 */
	62	#define KS8995_REG_IAC1 0x6f /* Indirect Access Control 0 */
	63	#define KS8995_REG_IAD7 0x70 /* Indirect Access Data 7 */
	64	#define KS8995_REG_IAD6 0x71 /* Indirect Access Data 6 */
	65	#define KS8995_REG_IAD5 0x72 /* Indirect Access Data 5 */
	66	#define KS8995_REG_IAD4 0x73 /* Indirect Access Data 4 */
	67	#define KS8995_REG_IAD3 0x74 /* Indirect Access Data 3 */
	68	#define KS8995_REG_IAD2 0x75 /* Indirect Access Data 2 */
	69	#define KS8995_REG_IAD1 0x76 /* Indirect Access Data 1 */
	70	#define KS8995_REG_IAD0 0x77 /* Indirect Access Data 0 */
	71
240a12d5 PZ	72	#define KSZ8864_REG_ID1 0xfe /* Chip ID in bit 7 */
240a12d5 PZ	73
a8e510f6	74	#define KS8995_REGS_SIZE 0x80
240a12d5	75	#define KSZ8864_REGS_SIZE 0x100
c0e6cb1f	76	#define KSZ8795_REGS_SIZE 0x100
a8e510f6 FL	77
	78	#define ID1_CHIPID_M 0xf
	79	#define ID1_CHIPID_S 4
	80	#define ID1_REVISION_M 0x7
	81	#define ID1_REVISION_S 1
	82	#define ID1_START_SW 1 /* start the switch */
	83
	84	#define FAMILY_KS8995 0x95
c0e6cb1f	85	#define FAMILY_KSZ8795 0x87
a8e510f6	86	#define CHIPID_M 0
484e36ff HB	87	#define KS8995_CHIP_ID 0x00
484e36ff HB	88	#define KSZ8864_CHIP_ID 0x01
c0e6cb1f	89	#define KSZ8795_CHIP_ID 0x09
a8e510f6 FL	90
	91	#define KS8995_CMD_WRITE 0x02U
	92	#define KS8995_CMD_READ 0x03U
	93
	94	#define KS8995_RESET_DELAY 10 /* usec */
	95
aa54c8da HB	96	enum ks8995_chip_variant {
	97	ks8995,
	98	ksz8864,
c0e6cb1f	99	ksz8795,
aa54c8da HB	100	max_variant
	101	};
	102
	103	struct ks8995_chip_params {
	104	char *name;
484e36ff HB	105	int family_id;
484e36ff HB	106	int chip_id;
aa54c8da	107	int regs_size;
6665e623 HB	108	int addr_width;
6665e623 HB	109	int addr_shift;
aa54c8da HB	110	};
	111
	112	static const struct ks8995_chip_params ks8995_chip[] = {
	113	[ks8995] = {
	114	.name = "KS8995MA",
484e36ff HB	115	.family_id = FAMILY_KS8995,
484e36ff HB	116	.chip_id = KS8995_CHIP_ID,
aa54c8da	117	.regs_size = KS8995_REGS_SIZE,
6665e623 HB	118	.addr_width = 8,
6665e623 HB	119	.addr_shift = 0,
aa54c8da HB	120	},
	121	[ksz8864] = {
	122	.name = "KSZ8864RMN",
484e36ff HB	123	.family_id = FAMILY_KS8995,
484e36ff HB	124	.chip_id = KSZ8864_CHIP_ID,
aa54c8da	125	.regs_size = KSZ8864_REGS_SIZE,
6665e623 HB	126	.addr_width = 8,
6665e623 HB	127	.addr_shift = 0,
aa54c8da	128	},
c0e6cb1f HB	129	[ksz8795] = {
	130	.name = "KSZ8795CLX",
	131	.family_id = FAMILY_KSZ8795,
	132	.chip_id = KSZ8795_CHIP_ID,
	133	.regs_size = KSZ8795_REGS_SIZE,
	134	.addr_width = 12,
	135	.addr_shift = 1,
	136	},
aa54c8da HB	137	};
aa54c8da HB	138
a8e510f6 FL	139	struct ks8995_switch {
	140	struct spi_device *spi;
	141	struct mutex lock;
006534ec	142	struct gpio_desc *reset_gpio;
240a12d5	143	struct bin_attribute regs_attr;
aa54c8da	144	const struct ks8995_chip_params *chip;
484e36ff	145	int revision_id;
a8e510f6 FL	146	};
a8e510f6 FL	147
aa54c8da HB	148	static const struct spi_device_id ks8995_id[] = {
	149	{"ks8995", ks8995},
	150	{"ksz8864", ksz8864},
c0e6cb1f	151	{"ksz8795", ksz8795},
aa54c8da HB	152	{ }
	153	};
	154	MODULE_DEVICE_TABLE(spi, ks8995_id);
	155
2f23a2a7	156	static const struct of_device_id ks8895_spi_of_match[] = {
3bdee6a8 WL	157	{ .compatible = "micrel,ks8995" },
	158	{ .compatible = "micrel,ksz8864" },
	159	{ .compatible = "micrel,ksz8795" },
	160	{ },
	161	};
2f23a2a7 DG	162	MODULE_DEVICE_TABLE(of, ks8895_spi_of_match);
2f23a2a7 DG	163
a8e510f6 FL	164	static inline u8 get_chip_id(u8 val)
	165	{
	166	return (val >> ID1_CHIPID_S) & ID1_CHIPID_M;
	167	}
	168
	169	static inline u8 get_chip_rev(u8 val)
	170	{
	171	return (val >> ID1_REVISION_S) & ID1_REVISION_M;
	172	}
	173
6665e623 HB	174	/* create_spi_cmd - create a chip specific SPI command header
	175	* @ks: pointer to switch instance
	176	* @cmd: SPI command for switch
	177	* @address: register address for command
	178	*
	179	* Different chip families use different bit pattern to address the switches
	180	* registers:
	181	*
	182	* KS8995: 8bit command + 8bit address
	183	* KSZ8795: 3bit command + 12bit address + 1bit TR (?)
	184	*/
	185	static inline __be16 create_spi_cmd(struct ks8995_switch *ks, int cmd,
	186	unsigned address)
	187	{
	188	u16 result = cmd;
	189
	190	/* make room for address (incl. address shift) */
	191	result <<= ks->chip->addr_width + ks->chip->addr_shift;
	192	/* add address */
	193	result \|= address << ks->chip->addr_shift;
	194	/* SPI protocol needs big endian */
	195	return cpu_to_be16(result);
	196	}
a8e510f6 FL	197	/* ------------------------------------------------------------------------ */
	198	static int ks8995_read(struct ks8995_switch ks, char buf,
	199	unsigned offset, size_t count)
	200	{
6665e623	201	__be16 cmd;
a8e510f6 FL	202	struct spi_transfer t[2];
	203	struct spi_message m;
	204	int err;
	205
6665e623	206	cmd = create_spi_cmd(ks, KS8995_CMD_READ, offset);
a8e510f6 FL	207	spi_message_init(&m);
	208
	209	memset(&t, 0, sizeof(t));
	210
6665e623	211	t[0].tx_buf = &cmd;
a8e510f6 FL	212	t[0].len = sizeof(cmd);
	213	spi_message_add_tail(&t[0], &m);
	214
	215	t[1].rx_buf = buf;
	216	t[1].len = count;
	217	spi_message_add_tail(&t[1], &m);
	218
a8e510f6 FL	219	mutex_lock(&ks->lock);
	220	err = spi_sync(ks->spi, &m);
	221	mutex_unlock(&ks->lock);
	222
	223	return err ? err : count;
	224	}
	225
a8e510f6 FL	226	static int ks8995_write(struct ks8995_switch ks, char buf,
	227	unsigned offset, size_t count)
	228	{
6665e623	229	__be16 cmd;
a8e510f6 FL	230	struct spi_transfer t[2];
	231	struct spi_message m;
	232	int err;
	233
6665e623	234	cmd = create_spi_cmd(ks, KS8995_CMD_WRITE, offset);
a8e510f6 FL	235	spi_message_init(&m);
	236
	237	memset(&t, 0, sizeof(t));
	238
6665e623	239	t[0].tx_buf = &cmd;
a8e510f6 FL	240	t[0].len = sizeof(cmd);
	241	spi_message_add_tail(&t[0], &m);
	242
	243	t[1].tx_buf = buf;
	244	t[1].len = count;
	245	spi_message_add_tail(&t[1], &m);
	246
a8e510f6 FL	247	mutex_lock(&ks->lock);
	248	err = spi_sync(ks->spi, &m);
	249	mutex_unlock(&ks->lock);
	250
	251	return err ? err : count;
	252	}
	253
	254	static inline int ks8995_read_reg(struct ks8995_switch ks, u8 addr, u8 buf)
	255	{
7aff9675	256	return ks8995_read(ks, buf, addr, 1) != 1;
a8e510f6 FL	257	}
	258
	259	static inline int ks8995_write_reg(struct ks8995_switch *ks, u8 addr, u8 val)
	260	{
	261	char buf = val;
	262
7aff9675	263	return ks8995_write(ks, &buf, addr, 1) != 1;
a8e510f6 FL	264	}
	265
	266	/* ------------------------------------------------------------------------ */
	267
	268	static int ks8995_stop(struct ks8995_switch *ks)
	269	{
	270	return ks8995_write_reg(ks, KS8995_REG_ID1, 0);
	271	}
	272
	273	static int ks8995_start(struct ks8995_switch *ks)
	274	{
	275	return ks8995_write_reg(ks, KS8995_REG_ID1, 1);
	276	}
	277
	278	static int ks8995_reset(struct ks8995_switch *ks)
	279	{
	280	int err;
	281
	282	err = ks8995_stop(ks);
	283	if (err)
	284	return err;
	285
	286	udelay(KS8995_RESET_DELAY);
	287
	288	return ks8995_start(ks);
	289	}
	290
a8e510f6 FL	291	static ssize_t ks8995_registers_read(struct file filp, struct kobject kobj,
	292	struct bin_attribute bin_attr, char buf, loff_t off, size_t count)
	293	{
	294	struct device *dev;
	295	struct ks8995_switch *ks8995;
	296
414698f6	297	dev = kobj_to_dev(kobj);
a8e510f6 FL	298	ks8995 = dev_get_drvdata(dev);
a8e510f6 FL	299
a8e510f6 FL	300	return ks8995_read(ks8995, buf, off, count);
	301	}
	302
a8e510f6 FL	303	static ssize_t ks8995_registers_write(struct file filp, struct kobject kobj,
	304	struct bin_attribute bin_attr, char buf, loff_t off, size_t count)
	305	{
	306	struct device *dev;
	307	struct ks8995_switch *ks8995;
	308
414698f6	309	dev = kobj_to_dev(kobj);
a8e510f6 FL	310	ks8995 = dev_get_drvdata(dev);
a8e510f6 FL	311
a8e510f6 FL	312	return ks8995_write(ks8995, buf, off, count);
	313	}
	314
484e36ff HB	315	/* ks8995_get_revision - get chip revision
	316	* @ks: pointer to switch instance
	317	*
	318	* Verify chip family and id and get chip revision.
	319	*/
	320	static int ks8995_get_revision(struct ks8995_switch *ks)
	321	{
	322	int err;
	323	u8 id0, id1, ksz8864_id;
	324
	325	/* read family id */
	326	err = ks8995_read_reg(ks, KS8995_REG_ID0, &id0);
	327	if (err) {
	328	err = -EIO;
	329	goto err_out;
	330	}
	331
	332	/* verify family id */
	333	if (id0 != ks->chip->family_id) {
	334	dev_err(&ks->spi->dev, "chip family id mismatch: expected 0x%02x but 0x%02x read\n",
	335	ks->chip->family_id, id0);
	336	err = -ENODEV;
	337	goto err_out;
	338	}
	339
	340	switch (ks->chip->family_id) {
	341	case FAMILY_KS8995:
	342	/* try reading chip id at CHIP ID1 */
	343	err = ks8995_read_reg(ks, KS8995_REG_ID1, &id1);
	344	if (err) {
	345	err = -EIO;
	346	goto err_out;
	347	}
	348
	349	/* verify chip id */
	350	if ((get_chip_id(id1) == CHIPID_M) &&
	351	(get_chip_id(id1) == ks->chip->chip_id)) {
	352	/* KS8995MA */
	353	ks->revision_id = get_chip_rev(id1);
	354	} else if (get_chip_id(id1) != CHIPID_M) {
	355	/* KSZ8864RMN */
	356	err = ks8995_read_reg(ks, KS8995_REG_ID1, &ksz8864_id);
	357	if (err) {
	358	err = -EIO;
	359	goto err_out;
	360	}
	361
	362	if ((ksz8864_id & 0x80) &&
	363	(ks->chip->chip_id == KSZ8864_CHIP_ID)) {
	364	ks->revision_id = get_chip_rev(id1);
	365	}
	366
	367	} else {
	368	dev_err(&ks->spi->dev, "unsupported chip id for KS8995 family: 0x%02x\n",
	369	id1);
	370	err = -ENODEV;
	371	}
	372	break;
c0e6cb1f HB	373	case FAMILY_KSZ8795:
	374	/* try reading chip id at CHIP ID1 */
	375	err = ks8995_read_reg(ks, KS8995_REG_ID1, &id1);
	376	if (err) {
	377	err = -EIO;
	378	goto err_out;
	379	}
	380
	381	if (get_chip_id(id1) == ks->chip->chip_id) {
	382	ks->revision_id = get_chip_rev(id1);
	383	} else {
	384	dev_err(&ks->spi->dev, "unsupported chip id for KSZ8795 family: 0x%02x\n",
	385	id1);
	386	err = -ENODEV;
	387	}
	388	break;
484e36ff HB	389	default:
	390	dev_err(&ks->spi->dev, "unsupported family id: 0x%02x\n", id0);
	391	err = -ENODEV;
	392	break;
	393	}
	394	err_out:
	395	return err;
	396	}
	397
240a12d5	398	static const struct bin_attribute ks8995_registers_attr = {
a8e510f6 FL	399	.attr = {
a8e510f6 FL	400	.name = "registers",
d61e4038	401	.mode = 0600,
a8e510f6 FL	402	},
	403	.size = KS8995_REGS_SIZE,
	404	.read = ks8995_registers_read,
	405	.write = ks8995_registers_write,
	406	};
	407
	408	/* ------------------------------------------------------------------------ */
633d1594	409	static int ks8995_probe(struct spi_device *spi)
a8e510f6	410	{
cd6f288c HB	411	struct ks8995_switch *ks;
cd6f288c HB	412	int err;
aa54c8da	413	int variant = spi_get_device_id(spi)->driver_data;
a8e510f6	414
aa54c8da HB	415	if (variant >= max_variant) {
	416	dev_err(&spi->dev, "bad chip variant %d\n", variant);
	417	return -ENODEV;
	418	}
	419
b32a8b64	420	ks = devm_kzalloc(&spi->dev, sizeof(*ks), GFP_KERNEL);
e68ed8f0	421	if (!ks)
a8e510f6	422	return -ENOMEM;
a8e510f6 FL	423
a8e510f6 FL	424	mutex_init(&ks->lock);
a1459c1c	425	ks->spi = spi;
aa54c8da HB	426	ks->chip = &ks8995_chip[variant];
aa54c8da HB	427
006534ec DT	428	ks->reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset",
	429	GPIOD_OUT_HIGH);
	430	err = PTR_ERR_OR_ZERO(ks->reset_gpio);
	431	if (err) {
	432	dev_err(&spi->dev,
	433	"failed to get reset gpio: %d\n", err);
	434	return err;
cd6f288c HB	435	}
cd6f288c HB	436
006534ec DT	437	err = gpiod_set_consumer_name(ks->reset_gpio, "switch-reset");
	438	if (err)
	439	return err;
cd6f288c HB	440
cd6f288c HB	441	/* de-assert switch reset */
006534ec DT	442	/* FIXME: this likely requires a delay */
006534ec DT	443	gpiod_set_value_cansleep(ks->reset_gpio, 0);
cd6f288c	444
5d5f1846	445	spi_set_drvdata(spi, ks);
a8e510f6 FL	446
	447	spi->mode = SPI_MODE_0;
	448	spi->bits_per_word = 8;
	449	err = spi_setup(spi);
	450	if (err) {
	451	dev_err(&spi->dev, "spi_setup failed, err=%d\n", err);
b32a8b64	452	return err;
a8e510f6 FL	453	}
a8e510f6 FL	454
484e36ff HB	455	err = ks8995_get_revision(ks);
484e36ff HB	456	if (err)
b32a8b64	457	return err;
a8e510f6	458
240a12d5	459	memcpy(&ks->regs_attr, &ks8995_registers_attr, sizeof(ks->regs_attr));
239870f2	460	ks->regs_attr.size = ks->chip->regs_size;
240a12d5	461
a8e510f6 FL	462	err = ks8995_reset(ks);
a8e510f6 FL	463	if (err)
b32a8b64	464	return err;
a8e510f6	465
4342696d	466	sysfs_attr_init(&ks->regs_attr.attr);
240a12d5	467	err = sysfs_create_bin_file(&spi->dev.kobj, &ks->regs_attr);
a8e510f6 FL	468	if (err) {
	469	dev_err(&spi->dev, "unable to create sysfs file, err=%d\n",
	470	err);
b32a8b64	471	return err;
a8e510f6 FL	472	}
a8e510f6 FL	473
484e36ff HB	474	dev_info(&spi->dev, "%s device found, Chip ID:%x, Revision:%x\n",
484e36ff HB	475	ks->chip->name, ks->chip->chip_id, ks->revision_id);
a8e510f6 FL	476
a8e510f6 FL	477	return 0;
a8e510f6 FL	478	}
a8e510f6 FL	479
a0386bba	480	static void ks8995_remove(struct spi_device *spi)
a8e510f6	481	{
30349bdb VZ	482	struct ks8995_switch *ks = spi_get_drvdata(spi);
	483
	484	sysfs_remove_bin_file(&spi->dev.kobj, &ks->regs_attr);
a8e510f6	485
cd6f288c	486	/* assert reset */
006534ec	487	gpiod_set_value_cansleep(ks->reset_gpio, 1);
a8e510f6 FL	488	}
	489
	490	/* ------------------------------------------------------------------------ */
a8e510f6 FL	491	static struct spi_driver ks8995_driver = {
	492	.driver = {
	493	.name = "spi-ks8995",
2f23a2a7	494	.of_match_table = of_match_ptr(ks8895_spi_of_match),
a8e510f6 FL	495	},
a8e510f6 FL	496	.probe = ks8995_probe,
633d1594	497	.remove = ks8995_remove,
aa54c8da	498	.id_table = ks8995_id,
a8e510f6 FL	499	};
a8e510f6 FL	500
1a9561a3	501	module_spi_driver(ks8995_driver);
a8e510f6 FL	502
	503	MODULE_DESCRIPTION(DRV_DESC);
	504	MODULE_VERSION(DRV_VERSION);
	505	MODULE_AUTHOR("Gabor Juhos <juhosg at openwrt.org>");
	506	MODULE_LICENSE("GPL v2");