net: mdio_bus: make mdio_bus_type const
[linux-2.6-block.git] / drivers / net / phy / phy_device.c
CommitLineData
a2443fd1 1// SPDX-License-Identifier: GPL-2.0+
2f53e904 2/* Framework for finding and configuring PHYs.
00db8189
AF
3 * Also contains generic PHY driver
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
00db8189 8 */
8d242488
JP
9
10#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
11
425775ed 12#include <linux/acpi.h>
e42bcd0f 13#include <linux/bitmap.h>
00db8189 14#include <linux/delay.h>
e42bcd0f 15#include <linux/errno.h>
00db8189 16#include <linux/etherdevice.h>
e42bcd0f
BG
17#include <linux/ethtool.h>
18#include <linux/init.h>
19#include <linux/interrupt.h>
20#include <linux/io.h>
21#include <linux/kernel.h>
01e5b728 22#include <linux/list.h>
e42bcd0f
BG
23#include <linux/mdio.h>
24#include <linux/mii.h>
00db8189
AF
25#include <linux/mm.h>
26#include <linux/module.h>
01e5b728 27#include <linux/of.h>
e42bcd0f 28#include <linux/netdevice.h>
00db8189 29#include <linux/phy.h>
60495b66 30#include <linux/phylib_stubs.h>
2e0bc452 31#include <linux/phy_led_triggers.h>
5e82147d 32#include <linux/pse-pd/pse.h>
e42bcd0f 33#include <linux/property.h>
70ef7d87 34#include <linux/rtnetlink.h>
298e54fa 35#include <linux/sfp.h>
e42bcd0f
BG
36#include <linux/skbuff.h>
37#include <linux/slab.h>
38#include <linux/string.h>
2f53e904 39#include <linux/uaccess.h>
e42bcd0f 40#include <linux/unistd.h>
00db8189 41
afcceaa3
OH
42MODULE_DESCRIPTION("PHY library");
43MODULE_AUTHOR("Andy Fleming");
44MODULE_LICENSE("GPL");
45
719655a1
AL
46__ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
47EXPORT_SYMBOL_GPL(phy_basic_features);
48
49__ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
50EXPORT_SYMBOL_GPL(phy_basic_t1_features);
51
16178c8e
PB
52__ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init;
53EXPORT_SYMBOL_GPL(phy_basic_t1s_p2mp_features);
54
719655a1
AL
55__ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
56EXPORT_SYMBOL_GPL(phy_gbit_features);
57
58__ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
59EXPORT_SYMBOL_GPL(phy_gbit_fibre_features);
60
61__ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
62EXPORT_SYMBOL_GPL(phy_gbit_all_ports_features);
63
64__ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
65EXPORT_SYMBOL_GPL(phy_10gbit_features);
66
9e857a40
AL
67__ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
68EXPORT_SYMBOL_GPL(phy_10gbit_fec_features);
69
54638c6e 70const int phy_basic_ports_array[3] = {
719655a1
AL
71 ETHTOOL_LINK_MODE_Autoneg_BIT,
72 ETHTOOL_LINK_MODE_TP_BIT,
73 ETHTOOL_LINK_MODE_MII_BIT,
74};
3c1bcc86 75EXPORT_SYMBOL_GPL(phy_basic_ports_array);
719655a1 76
54638c6e 77const int phy_fibre_port_array[1] = {
719655a1
AL
78 ETHTOOL_LINK_MODE_FIBRE_BIT,
79};
3c1bcc86 80EXPORT_SYMBOL_GPL(phy_fibre_port_array);
719655a1 81
54638c6e 82const int phy_all_ports_features_array[7] = {
719655a1
AL
83 ETHTOOL_LINK_MODE_Autoneg_BIT,
84 ETHTOOL_LINK_MODE_TP_BIT,
85 ETHTOOL_LINK_MODE_MII_BIT,
86 ETHTOOL_LINK_MODE_FIBRE_BIT,
87 ETHTOOL_LINK_MODE_AUI_BIT,
88 ETHTOOL_LINK_MODE_BNC_BIT,
89 ETHTOOL_LINK_MODE_Backplane_BIT,
90};
3c1bcc86 91EXPORT_SYMBOL_GPL(phy_all_ports_features_array);
719655a1 92
3c1bcc86 93const int phy_10_100_features_array[4] = {
719655a1
AL
94 ETHTOOL_LINK_MODE_10baseT_Half_BIT,
95 ETHTOOL_LINK_MODE_10baseT_Full_BIT,
96 ETHTOOL_LINK_MODE_100baseT_Half_BIT,
97 ETHTOOL_LINK_MODE_100baseT_Full_BIT,
98};
3c1bcc86 99EXPORT_SYMBOL_GPL(phy_10_100_features_array);
719655a1 100
3254e0b9 101const int phy_basic_t1_features_array[3] = {
719655a1 102 ETHTOOL_LINK_MODE_TP_BIT,
3254e0b9 103 ETHTOOL_LINK_MODE_10baseT1L_Full_BIT,
e5fb32c6 104 ETHTOOL_LINK_MODE_100baseT1_Full_BIT,
719655a1 105};
3c1bcc86 106EXPORT_SYMBOL_GPL(phy_basic_t1_features_array);
719655a1 107
16178c8e
PB
108const int phy_basic_t1s_p2mp_features_array[2] = {
109 ETHTOOL_LINK_MODE_TP_BIT,
110 ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT,
111};
112EXPORT_SYMBOL_GPL(phy_basic_t1s_p2mp_features_array);
113
3c1bcc86 114const int phy_gbit_features_array[2] = {
719655a1
AL
115 ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
116 ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
117};
3c1bcc86 118EXPORT_SYMBOL_GPL(phy_gbit_features_array);
719655a1 119
3c1bcc86 120const int phy_10gbit_features_array[1] = {
719655a1
AL
121 ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
122};
3c1bcc86 123EXPORT_SYMBOL_GPL(phy_10gbit_features_array);
719655a1 124
4f2b38e3 125static const int phy_10gbit_fec_features_array[1] = {
9e857a40
AL
126 ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
127};
9e857a40 128
719655a1
AL
129__ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
130EXPORT_SYMBOL_GPL(phy_10gbit_full_features);
131
132static const int phy_10gbit_full_features_array[] = {
133 ETHTOOL_LINK_MODE_10baseT_Full_BIT,
134 ETHTOOL_LINK_MODE_100baseT_Full_BIT,
135 ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
136 ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
137};
138
14e47d1f
OR
139static const int phy_eee_cap1_features_array[] = {
140 ETHTOOL_LINK_MODE_100baseT_Full_BIT,
141 ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
142 ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
143 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
144 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
145 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
146};
147
148__ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init;
149EXPORT_SYMBOL_GPL(phy_eee_cap1_features);
150
719655a1
AL
151static void features_init(void)
152{
153 /* 10/100 half/full*/
154 linkmode_set_bit_array(phy_basic_ports_array,
155 ARRAY_SIZE(phy_basic_ports_array),
156 phy_basic_features);
157 linkmode_set_bit_array(phy_10_100_features_array,
158 ARRAY_SIZE(phy_10_100_features_array),
159 phy_basic_features);
160
161 /* 100 full, TP */
162 linkmode_set_bit_array(phy_basic_t1_features_array,
163 ARRAY_SIZE(phy_basic_t1_features_array),
164 phy_basic_t1_features);
165
16178c8e
PB
166 /* 10 half, P2MP, TP */
167 linkmode_set_bit_array(phy_basic_t1s_p2mp_features_array,
168 ARRAY_SIZE(phy_basic_t1s_p2mp_features_array),
169 phy_basic_t1s_p2mp_features);
170
719655a1
AL
171 /* 10/100 half/full + 1000 half/full */
172 linkmode_set_bit_array(phy_basic_ports_array,
173 ARRAY_SIZE(phy_basic_ports_array),
174 phy_gbit_features);
175 linkmode_set_bit_array(phy_10_100_features_array,
176 ARRAY_SIZE(phy_10_100_features_array),
177 phy_gbit_features);
178 linkmode_set_bit_array(phy_gbit_features_array,
179 ARRAY_SIZE(phy_gbit_features_array),
180 phy_gbit_features);
181
182 /* 10/100 half/full + 1000 half/full + fibre*/
183 linkmode_set_bit_array(phy_basic_ports_array,
184 ARRAY_SIZE(phy_basic_ports_array),
185 phy_gbit_fibre_features);
186 linkmode_set_bit_array(phy_10_100_features_array,
187 ARRAY_SIZE(phy_10_100_features_array),
188 phy_gbit_fibre_features);
189 linkmode_set_bit_array(phy_gbit_features_array,
190 ARRAY_SIZE(phy_gbit_features_array),
191 phy_gbit_fibre_features);
192 linkmode_set_bit_array(phy_fibre_port_array,
193 ARRAY_SIZE(phy_fibre_port_array),
194 phy_gbit_fibre_features);
195
196 /* 10/100 half/full + 1000 half/full + TP/MII/FIBRE/AUI/BNC/Backplane*/
197 linkmode_set_bit_array(phy_all_ports_features_array,
198 ARRAY_SIZE(phy_all_ports_features_array),
199 phy_gbit_all_ports_features);
200 linkmode_set_bit_array(phy_10_100_features_array,
201 ARRAY_SIZE(phy_10_100_features_array),
202 phy_gbit_all_ports_features);
203 linkmode_set_bit_array(phy_gbit_features_array,
204 ARRAY_SIZE(phy_gbit_features_array),
205 phy_gbit_all_ports_features);
206
207 /* 10/100 half/full + 1000 half/full + 10G full*/
208 linkmode_set_bit_array(phy_all_ports_features_array,
209 ARRAY_SIZE(phy_all_ports_features_array),
210 phy_10gbit_features);
211 linkmode_set_bit_array(phy_10_100_features_array,
212 ARRAY_SIZE(phy_10_100_features_array),
213 phy_10gbit_features);
214 linkmode_set_bit_array(phy_gbit_features_array,
215 ARRAY_SIZE(phy_gbit_features_array),
216 phy_10gbit_features);
217 linkmode_set_bit_array(phy_10gbit_features_array,
218 ARRAY_SIZE(phy_10gbit_features_array),
219 phy_10gbit_features);
220
221 /* 10/100/1000/10G full */
222 linkmode_set_bit_array(phy_all_ports_features_array,
223 ARRAY_SIZE(phy_all_ports_features_array),
224 phy_10gbit_full_features);
225 linkmode_set_bit_array(phy_10gbit_full_features_array,
226 ARRAY_SIZE(phy_10gbit_full_features_array),
227 phy_10gbit_full_features);
9e857a40
AL
228 /* 10G FEC only */
229 linkmode_set_bit_array(phy_10gbit_fec_features_array,
230 ARRAY_SIZE(phy_10gbit_fec_features_array),
231 phy_10gbit_fec_features);
14e47d1f
OR
232 linkmode_set_bit_array(phy_eee_cap1_features_array,
233 ARRAY_SIZE(phy_eee_cap1_features_array),
234 phy_eee_cap1_features);
235
719655a1
AL
236}
237
6f4a7f41
AV
238void phy_device_free(struct phy_device *phydev)
239{
e5a03bfd 240 put_device(&phydev->mdio.dev);
6f4a7f41 241}
4dea547f 242EXPORT_SYMBOL(phy_device_free);
6f4a7f41 243
711fdba3
AL
244static void phy_mdio_device_free(struct mdio_device *mdiodev)
245{
246 struct phy_device *phydev;
247
248 phydev = container_of(mdiodev, struct phy_device, mdio);
249 phy_device_free(phydev);
250}
251
6f4a7f41
AV
252static void phy_device_release(struct device *dev)
253{
cdde1560 254 fwnode_handle_put(dev->fwnode);
b2a43191 255 kfree(to_phy_device(dev));
6f4a7f41
AV
256}
257
711fdba3
AL
258static void phy_mdio_device_remove(struct mdio_device *mdiodev)
259{
260 struct phy_device *phydev;
261
262 phydev = container_of(mdiodev, struct phy_device, mdio);
263 phy_device_remove(phydev);
264}
265
921690f2 266static struct phy_driver genphy_driver;
4dea547f 267
f62220d3
AF
268static LIST_HEAD(phy_fixup_list);
269static DEFINE_MUTEX(phy_fixup_lock);
270
bc87922f
AL
271static bool mdio_bus_phy_may_suspend(struct phy_device *phydev)
272{
301de697
VO
273 struct device_driver *drv = phydev->mdio.dev.driver;
274 struct phy_driver *phydrv = to_phy_driver(drv);
bc87922f
AL
275 struct net_device *netdev = phydev->attached_dev;
276
301de697 277 if (!drv || !phydrv->suspend)
bc87922f
AL
278 return false;
279
280 /* PHY not attached? May suspend if the PHY has not already been
281 * suspended as part of a prior call to phy_disconnect() ->
282 * phy_detach() -> phy_suspend() because the parent netdev might be the
283 * MDIO bus driver and clock gated at this point.
284 */
285 if (!netdev)
503ba7c6 286 goto out;
bc87922f 287
93f41e67
HK
288 if (netdev->wol_enabled)
289 return false;
290
291 /* As long as not all affected network drivers support the
292 * wol_enabled flag, let's check for hints that WoL is enabled.
293 * Don't suspend PHY if the attached netdev parent may wake up.
bc87922f
AL
294 * The parent may point to a PCI device, as in tg3 driver.
295 */
296 if (netdev->dev.parent && device_may_wakeup(netdev->dev.parent))
297 return false;
298
299 /* Also don't suspend PHY if the netdev itself may wakeup. This
300 * is the case for devices w/o underlaying pwr. mgmt. aware bus,
301 * e.g. SoC devices.
302 */
303 if (device_may_wakeup(&netdev->dev))
304 return false;
305
503ba7c6
FF
306out:
307 return !phydev->suspended;
bc87922f
AL
308}
309
7f654157 310static __maybe_unused int mdio_bus_phy_suspend(struct device *dev)
bc87922f
AL
311{
312 struct phy_device *phydev = to_phy_device(dev);
313
fba863b8
HK
314 if (phydev->mac_managed_pm)
315 return 0;
316
1758bde2
LW
317 /* Wakeup interrupts may occur during the system sleep transition when
318 * the PHY is inaccessible. Set flag to postpone handling until the PHY
319 * has resumed. Wait for concurrent interrupt handler to complete.
320 */
321 if (phy_interrupt_is_valid(phydev)) {
322 phydev->irq_suspended = 1;
323 synchronize_irq(phydev->irq);
324 }
325
bc87922f
AL
326 /* We must stop the state machine manually, otherwise it stops out of
327 * control, possibly with the phydev->lock held. Upon resume, netdev
328 * may call phy routines that try to grab the same lock, and that may
329 * lead to a deadlock.
330 */
331 if (phydev->attached_dev && phydev->adjust_link)
332 phy_stop_machine(phydev);
333
334 if (!mdio_bus_phy_may_suspend(phydev))
335 return 0;
336
611d779a
HK
337 phydev->suspended_by_mdio_bus = 1;
338
bc87922f
AL
339 return phy_suspend(phydev);
340}
341
7f654157 342static __maybe_unused int mdio_bus_phy_resume(struct device *dev)
bc87922f
AL
343{
344 struct phy_device *phydev = to_phy_device(dev);
345 int ret;
346
fba863b8
HK
347 if (phydev->mac_managed_pm)
348 return 0;
349
611d779a 350 if (!phydev->suspended_by_mdio_bus)
bc87922f
AL
351 goto no_resume;
352
611d779a
HK
353 phydev->suspended_by_mdio_bus = 0;
354
ea64cdfa
LW
355 /* If we managed to get here with the PHY state machine in a state
356 * neither PHY_HALTED, PHY_READY nor PHY_UP, this is an indication
357 * that something went wrong and we should most likely be using
358 * MAC managed PM, but we are not.
744d23c7 359 */
ea64cdfa
LW
360 WARN_ON(phydev->state != PHY_HALTED && phydev->state != PHY_READY &&
361 phydev->state != PHY_UP);
744d23c7 362
4c0d2e96 363 ret = phy_init_hw(phydev);
bc87922f
AL
364 if (ret < 0)
365 return ret;
366
4c0d2e96 367 ret = phy_resume(phydev);
bc87922f
AL
368 if (ret < 0)
369 return ret;
4c0d2e96 370no_resume:
1758bde2
LW
371 if (phy_interrupt_is_valid(phydev)) {
372 phydev->irq_suspended = 0;
373 synchronize_irq(phydev->irq);
374
375 /* Rerun interrupts which were postponed by phy_interrupt()
376 * because they occurred during the system sleep transition.
377 */
378 if (phydev->irq_rerun) {
379 phydev->irq_rerun = 0;
380 enable_irq(phydev->irq);
381 irq_wake_thread(phydev->irq, phydev);
382 }
383 }
384
8742beb5
KH
385 if (phydev->attached_dev && phydev->adjust_link)
386 phy_start_machine(phydev);
bc87922f
AL
387
388 return 0;
389}
390
4c0d2e96
HK
391static SIMPLE_DEV_PM_OPS(mdio_bus_phy_pm_ops, mdio_bus_phy_suspend,
392 mdio_bus_phy_resume);
bc87922f 393
2f53e904
SS
394/**
395 * phy_register_fixup - creates a new phy_fixup and adds it to the list
e5a03bfd 396 * @bus_id: A string which matches phydev->mdio.dev.bus_id (or PHY_ANY_ID)
f62220d3 397 * @phy_uid: Used to match against phydev->phy_id (the UID of the PHY)
2f53e904 398 * It can also be PHY_ANY_UID
f62220d3 399 * @phy_uid_mask: Applied to phydev->phy_id and fixup->phy_uid before
2f53e904 400 * comparison
f62220d3
AF
401 * @run: The actual code to be run when a matching PHY is found
402 */
403int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
2f53e904 404 int (*run)(struct phy_device *))
f62220d3 405{
553fe92b 406 struct phy_fixup *fixup = kzalloc(sizeof(*fixup), GFP_KERNEL);
f62220d3 407
f62220d3
AF
408 if (!fixup)
409 return -ENOMEM;
410
fb3ceec1 411 strscpy(fixup->bus_id, bus_id, sizeof(fixup->bus_id));
f62220d3
AF
412 fixup->phy_uid = phy_uid;
413 fixup->phy_uid_mask = phy_uid_mask;
414 fixup->run = run;
415
416 mutex_lock(&phy_fixup_lock);
417 list_add_tail(&fixup->list, &phy_fixup_list);
418 mutex_unlock(&phy_fixup_lock);
419
420 return 0;
421}
422EXPORT_SYMBOL(phy_register_fixup);
423
424/* Registers a fixup to be run on any PHY with the UID in phy_uid */
425int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
2f53e904 426 int (*run)(struct phy_device *))
f62220d3
AF
427{
428 return phy_register_fixup(PHY_ANY_ID, phy_uid, phy_uid_mask, run);
429}
430EXPORT_SYMBOL(phy_register_fixup_for_uid);
431
432/* Registers a fixup to be run on the PHY with id string bus_id */
433int phy_register_fixup_for_id(const char *bus_id,
2f53e904 434 int (*run)(struct phy_device *))
f62220d3
AF
435{
436 return phy_register_fixup(bus_id, PHY_ANY_UID, 0xffffffff, run);
437}
438EXPORT_SYMBOL(phy_register_fixup_for_id);
439
f38e7a32
WH
440/**
441 * phy_unregister_fixup - remove a phy_fixup from the list
442 * @bus_id: A string matches fixup->bus_id (or PHY_ANY_ID) in phy_fixup_list
443 * @phy_uid: A phy id matches fixup->phy_id (or PHY_ANY_UID) in phy_fixup_list
444 * @phy_uid_mask: Applied to phy_uid and fixup->phy_uid before comparison
445 */
446int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask)
447{
448 struct list_head *pos, *n;
449 struct phy_fixup *fixup;
450 int ret;
451
452 ret = -ENODEV;
453
454 mutex_lock(&phy_fixup_lock);
455 list_for_each_safe(pos, n, &phy_fixup_list) {
456 fixup = list_entry(pos, struct phy_fixup, list);
457
458 if ((!strcmp(fixup->bus_id, bus_id)) &&
4b159f50 459 phy_id_compare(fixup->phy_uid, phy_uid, phy_uid_mask)) {
f38e7a32
WH
460 list_del(&fixup->list);
461 kfree(fixup);
462 ret = 0;
463 break;
464 }
465 }
466 mutex_unlock(&phy_fixup_lock);
467
468 return ret;
469}
470EXPORT_SYMBOL(phy_unregister_fixup);
471
472/* Unregisters a fixup of any PHY with the UID in phy_uid */
473int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask)
474{
475 return phy_unregister_fixup(PHY_ANY_ID, phy_uid, phy_uid_mask);
476}
477EXPORT_SYMBOL(phy_unregister_fixup_for_uid);
478
479/* Unregisters a fixup of the PHY with id string bus_id */
480int phy_unregister_fixup_for_id(const char *bus_id)
481{
482 return phy_unregister_fixup(bus_id, PHY_ANY_UID, 0xffffffff);
483}
484EXPORT_SYMBOL(phy_unregister_fixup_for_id);
485
2f53e904 486/* Returns 1 if fixup matches phydev in bus_id and phy_uid.
f62220d3
AF
487 * Fixups can be set to match any in one or more fields.
488 */
489static int phy_needs_fixup(struct phy_device *phydev, struct phy_fixup *fixup)
490{
84eff6d1 491 if (strcmp(fixup->bus_id, phydev_name(phydev)) != 0)
f62220d3
AF
492 if (strcmp(fixup->bus_id, PHY_ANY_ID) != 0)
493 return 0;
494
4b159f50
RK
495 if (!phy_id_compare(phydev->phy_id, fixup->phy_uid,
496 fixup->phy_uid_mask))
f62220d3
AF
497 if (fixup->phy_uid != PHY_ANY_UID)
498 return 0;
499
500 return 1;
501}
502
503/* Runs any matching fixups for this phydev */
fbfcec63 504static int phy_scan_fixups(struct phy_device *phydev)
f62220d3
AF
505{
506 struct phy_fixup *fixup;
507
508 mutex_lock(&phy_fixup_lock);
509 list_for_each_entry(fixup, &phy_fixup_list, list) {
510 if (phy_needs_fixup(phydev, fixup)) {
553fe92b 511 int err = fixup->run(phydev);
f62220d3 512
bc23283c
JS
513 if (err < 0) {
514 mutex_unlock(&phy_fixup_lock);
f62220d3 515 return err;
bc23283c 516 }
b0ae009f 517 phydev->has_fixups = true;
f62220d3
AF
518 }
519 }
520 mutex_unlock(&phy_fixup_lock);
521
522 return 0;
523}
f62220d3 524
e76a4957
AL
525static int phy_bus_match(struct device *dev, struct device_driver *drv)
526{
527 struct phy_device *phydev = to_phy_device(dev);
528 struct phy_driver *phydrv = to_phy_driver(drv);
529 const int num_ids = ARRAY_SIZE(phydev->c45_ids.device_ids);
530 int i;
531
a9049e0c
AL
532 if (!(phydrv->mdiodrv.flags & MDIO_DEVICE_IS_PHY))
533 return 0;
534
e76a4957
AL
535 if (phydrv->match_phy_device)
536 return phydrv->match_phy_device(phydev);
537
538 if (phydev->is_c45) {
539 for (i = 1; i < num_ids; i++) {
b95e86d8 540 if (phydev->c45_ids.device_ids[i] == 0xffffffff)
e76a4957
AL
541 continue;
542
4b159f50
RK
543 if (phy_id_compare(phydev->c45_ids.device_ids[i],
544 phydrv->phy_id, phydrv->phy_id_mask))
e76a4957
AL
545 return 1;
546 }
547 return 0;
548 } else {
4b159f50
RK
549 return phy_id_compare(phydev->phy_id, phydrv->phy_id,
550 phydrv->phy_id_mask);
e76a4957
AL
551 }
552}
553
7f4828ff
HK
554static ssize_t
555phy_id_show(struct device *dev, struct device_attribute *attr, char *buf)
556{
557 struct phy_device *phydev = to_phy_device(dev);
558
b5155ddd 559 return sysfs_emit(buf, "0x%.8lx\n", (unsigned long)phydev->phy_id);
7f4828ff
HK
560}
561static DEVICE_ATTR_RO(phy_id);
562
563static ssize_t
564phy_interface_show(struct device *dev, struct device_attribute *attr, char *buf)
565{
566 struct phy_device *phydev = to_phy_device(dev);
567 const char *mode = NULL;
568
569 if (phy_is_internal(phydev))
570 mode = "internal";
571 else
572 mode = phy_modes(phydev->interface);
573
b5155ddd 574 return sysfs_emit(buf, "%s\n", mode);
7f4828ff
HK
575}
576static DEVICE_ATTR_RO(phy_interface);
577
578static ssize_t
579phy_has_fixups_show(struct device *dev, struct device_attribute *attr,
580 char *buf)
581{
582 struct phy_device *phydev = to_phy_device(dev);
583
b5155ddd 584 return sysfs_emit(buf, "%d\n", phydev->has_fixups);
7f4828ff
HK
585}
586static DEVICE_ATTR_RO(phy_has_fixups);
587
b0bade51
FF
588static ssize_t phy_dev_flags_show(struct device *dev,
589 struct device_attribute *attr,
590 char *buf)
591{
592 struct phy_device *phydev = to_phy_device(dev);
593
b5155ddd 594 return sysfs_emit(buf, "0x%08x\n", phydev->dev_flags);
b0bade51
FF
595}
596static DEVICE_ATTR_RO(phy_dev_flags);
597
7f4828ff
HK
598static struct attribute *phy_dev_attrs[] = {
599 &dev_attr_phy_id.attr,
600 &dev_attr_phy_interface.attr,
601 &dev_attr_phy_has_fixups.attr,
b0bade51 602 &dev_attr_phy_dev_flags.attr,
7f4828ff
HK
603 NULL,
604};
605ATTRIBUTE_GROUPS(phy_dev);
606
607static const struct device_type mdio_bus_phy_type = {
608 .name = "PHY",
609 .groups = phy_dev_groups,
610 .release = phy_device_release,
4c0d2e96 611 .pm = pm_ptr(&mdio_bus_phy_pm_ops),
7f4828ff
HK
612};
613
7d49a32a 614static int phy_request_driver_module(struct phy_device *dev, u32 phy_id)
13d0ab67
HK
615{
616 int ret;
617
618 ret = request_module(MDIO_MODULE_PREFIX MDIO_ID_FMT,
619 MDIO_ID_ARGS(phy_id));
21e19442
HK
620 /* We only check for failures in executing the usermode binary,
621 * not whether a PHY driver module exists for the PHY ID.
622 * Accept -ENOENT because this may occur in case no initramfs exists,
623 * then modprobe isn't available.
13d0ab67 624 */
21e19442 625 if (IS_ENABLED(CONFIG_MODULES) && ret < 0 && ret != -ENOENT) {
7d49a32a
RK
626 phydev_err(dev, "error %d loading PHY driver module for ID 0x%08lx\n",
627 ret, (unsigned long)phy_id);
13d0ab67
HK
628 return ret;
629 }
630
631 return 0;
632}
633
7d49a32a 634struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
2f53e904
SS
635 bool is_c45,
636 struct phy_c45_device_ids *c45_ids)
11b0bacd
VB
637{
638 struct phy_device *dev;
e5a03bfd 639 struct mdio_device *mdiodev;
13d0ab67 640 int ret = 0;
8626d3b4 641
2f53e904 642 /* We allocate the device, and initialize the default values */
cd861280 643 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
ef899c07 644 if (!dev)
d3765f08 645 return ERR_PTR(-ENOMEM);
11b0bacd 646
e5a03bfd 647 mdiodev = &dev->mdio;
e5a03bfd
AL
648 mdiodev->dev.parent = &bus->dev;
649 mdiodev->dev.bus = &mdio_bus_type;
7f4828ff 650 mdiodev->dev.type = &mdio_bus_phy_type;
e5a03bfd 651 mdiodev->bus = bus;
e76a4957 652 mdiodev->bus_match = phy_bus_match;
e5a03bfd 653 mdiodev->addr = addr;
7f854420 654 mdiodev->flags = MDIO_DEVICE_FLAG_PHY;
711fdba3
AL
655 mdiodev->device_free = phy_mdio_device_free;
656 mdiodev->device_remove = phy_mdio_device_remove;
df16c1c5 657 mdiodev->reset_state = -1;
6f4a7f41 658
a5d66f81
RK
659 dev->speed = SPEED_UNKNOWN;
660 dev->duplex = DUPLEX_UNKNOWN;
2f53e904
SS
661 dev->pause = 0;
662 dev->asym_pause = 0;
c69851e9 663 dev->link = 0;
4217a64e 664 dev->port = PORT_TP;
e8a2b6a4 665 dev->interface = PHY_INTERFACE_MODE_GMII;
11b0bacd
VB
666
667 dev->autoneg = AUTONEG_ENABLE;
668
3da8ffd8 669 dev->pma_extable = -ENODATA;
ac28b9f8 670 dev->is_c45 = is_c45;
11b0bacd 671 dev->phy_id = phy_id;
ac28b9f8
DD
672 if (c45_ids)
673 dev->c45_ids = *c45_ids;
47b356e4 674 dev->irq = bus->irq[addr];
d02cbc46 675
e5a03bfd 676 dev_set_name(&mdiodev->dev, PHY_ID_FMT, bus->id, addr);
d02cbc46 677 device_initialize(&mdiodev->dev);
11b0bacd
VB
678
679 dev->state = PHY_DOWN;
01e5b728 680 INIT_LIST_HEAD(&dev->leds);
11b0bacd 681
35b5f6b1 682 mutex_init(&dev->lock);
4f9c85a1 683 INIT_DELAYED_WORK(&dev->state_queue, phy_state_machine);
11b0bacd 684
8626d3b4 685 /* Request the appropriate module unconditionally; don't
2f53e904
SS
686 * bother trying to do so only if it isn't already loaded,
687 * because that gets complicated. A hotplug event would have
688 * done an unconditional modprobe anyway.
689 * We don't do normal hotplug because it won't work for MDIO
690 * -- because it relies on the device staying around for long
691 * enough for the driver to get loaded. With MDIO, the NIC
692 * driver will get bored and give up as soon as it finds that
693 * there's no driver _already_ loaded.
694 */
30fcd6a9
JA
695 if (is_c45 && c45_ids) {
696 const int num_ids = ARRAY_SIZE(c45_ids->device_ids);
697 int i;
698
699 for (i = 1; i < num_ids; i++) {
b95e86d8 700 if (c45_ids->device_ids[i] == 0xffffffff)
30fcd6a9
JA
701 continue;
702
13d0ab67
HK
703 ret = phy_request_driver_module(dev,
704 c45_ids->device_ids[i]);
705 if (ret)
706 break;
30fcd6a9
JA
707 }
708 } else {
13d0ab67 709 ret = phy_request_driver_module(dev, phy_id);
30fcd6a9 710 }
8626d3b4 711
d02cbc46
JH
712 if (ret) {
713 put_device(&mdiodev->dev);
13d0ab67
HK
714 dev = ERR_PTR(ret);
715 }
b2a43191 716
11b0bacd
VB
717 return dev;
718}
ac28b9f8
DD
719EXPORT_SYMBOL(phy_device_create);
720
c746053d
RK
721/* phy_c45_probe_present - checks to see if a MMD is present in the package
722 * @bus: the target MII bus
723 * @prtad: PHY package address on the MII bus
724 * @devad: PHY device (MMD) address
725 *
726 * Read the MDIO_STAT2 register, and check whether a device is responding
727 * at this address.
728 *
729 * Returns: negative error number on bus access error, zero if no device
730 * is responding, or positive if a device is present.
731 */
732static int phy_c45_probe_present(struct mii_bus *bus, int prtad, int devad)
733{
734 int stat2;
735
736 stat2 = mdiobus_c45_read(bus, prtad, devad, MDIO_STAT2);
737 if (stat2 < 0)
738 return stat2;
739
740 return (stat2 & MDIO_STAT2_DEVPRST) == MDIO_STAT2_DEVPRST_VAL;
741}
742
5f6c99e0
SX
743/* get_phy_c45_devs_in_pkg - reads a MMD's devices in package registers.
744 * @bus: the target MII bus
745 * @addr: PHY address on the MII bus
746 * @dev_addr: MMD address in the PHY.
747 * @devices_in_package: where to store the devices in package information.
748 *
749 * Description: reads devices in package registers of a MMD at @dev_addr
750 * from PHY at @addr on @bus.
751 *
752 * Returns: 0 on success, -EIO on failure.
753 */
754static int get_phy_c45_devs_in_pkg(struct mii_bus *bus, int addr, int dev_addr,
755 u32 *devices_in_package)
756{
90ce665c 757 int phy_reg;
5f6c99e0 758
90ce665c 759 phy_reg = mdiobus_c45_read(bus, addr, dev_addr, MDIO_DEVS2);
5f6c99e0
SX
760 if (phy_reg < 0)
761 return -EIO;
50684da7 762 *devices_in_package = phy_reg << 16;
5f6c99e0 763
90ce665c 764 phy_reg = mdiobus_c45_read(bus, addr, dev_addr, MDIO_DEVS1);
5f6c99e0
SX
765 if (phy_reg < 0)
766 return -EIO;
50684da7 767 *devices_in_package |= phy_reg;
5f6c99e0
SX
768
769 return 0;
770}
771
ac28b9f8
DD
772/**
773 * get_phy_c45_ids - reads the specified addr for its 802.3-c45 IDs.
774 * @bus: the target MII bus
775 * @addr: PHY address on the MII bus
ac28b9f8
DD
776 * @c45_ids: where to store the c45 ID information.
777 *
48c54388
RK
778 * Read the PHY "devices in package". If this appears to be valid, read
779 * the PHY identifiers for each device. Return the "devices in package"
780 * and identifiers in @c45_ids.
ac28b9f8 781 *
48c54388 782 * Returns zero on success, %-EIO on bus access error, or %-ENODEV if
17b44753 783 * the "devices in package" is invalid or no device responds.
ac28b9f8 784 */
48c54388 785static int get_phy_c45_ids(struct mii_bus *bus, int addr,
90ce665c
RK
786 struct phy_c45_device_ids *c45_ids)
787{
ac28b9f8 788 const int num_ids = ARRAY_SIZE(c45_ids->device_ids);
5ba33cf4 789 u32 devs_in_pkg = 0;
c746053d 790 int i, ret, phy_reg;
ac28b9f8 791
5f6c99e0
SX
792 /* Find first non-zero Devices In package. Device zero is reserved
793 * for 802.3 c45 complied PHYs, so don't probe it at first.
ac28b9f8 794 */
fb16d465
VO
795 for (i = 1; i < MDIO_MMD_NUM && (devs_in_pkg == 0 ||
796 (devs_in_pkg & 0x1fffffff) == 0x1fffffff); i++) {
c746053d
RK
797 if (i == MDIO_MMD_VEND1 || i == MDIO_MMD_VEND2) {
798 /* Check that there is a device present at this
799 * address before reading the devices-in-package
800 * register to avoid reading garbage from the PHY.
801 * Some PHYs (88x3310) vendor space is not IEEE802.3
802 * compliant.
803 */
804 ret = phy_c45_probe_present(bus, addr, i);
805 if (ret < 0)
17b44753
AL
806 /* returning -ENODEV doesn't stop bus
807 * scanning
808 */
809 return (phy_reg == -EIO ||
810 phy_reg == -ENODEV) ? -ENODEV : -EIO;
c746053d
RK
811
812 if (!ret)
813 continue;
814 }
5ba33cf4 815 phy_reg = get_phy_c45_devs_in_pkg(bus, addr, i, &devs_in_pkg);
ac28b9f8
DD
816 if (phy_reg < 0)
817 return -EIO;
454a78d1
RK
818 }
819
5ba33cf4 820 if ((devs_in_pkg & 0x1fffffff) == 0x1fffffff) {
454a78d1
RK
821 /* If mostly Fs, there is no device there, then let's probe
822 * MMD 0, as some 10G PHYs have zero Devices In package,
823 * e.g. Cortina CS4315/CS4340 PHY.
824 */
5ba33cf4 825 phy_reg = get_phy_c45_devs_in_pkg(bus, addr, 0, &devs_in_pkg);
454a78d1
RK
826 if (phy_reg < 0)
827 return -EIO;
ac28b9f8 828
454a78d1 829 /* no device there, let's get out of here */
5ba33cf4 830 if ((devs_in_pkg & 0x1fffffff) == 0x1fffffff)
48c54388 831 return -ENODEV;
ac28b9f8
DD
832 }
833
834 /* Now probe Device Identifiers for each device present. */
835 for (i = 1; i < num_ids; i++) {
5ba33cf4 836 if (!(devs_in_pkg & (1 << i)))
ac28b9f8
DD
837 continue;
838
389a3389
RK
839 if (i == MDIO_MMD_VEND1 || i == MDIO_MMD_VEND2) {
840 /* Probe the "Device Present" bits for the vendor MMDs
841 * to ignore these if they do not contain IEEE 802.3
842 * registers.
843 */
844 ret = phy_c45_probe_present(bus, addr, i);
845 if (ret < 0)
846 return ret;
847
848 if (!ret)
849 continue;
850 }
851
90ce665c 852 phy_reg = mdiobus_c45_read(bus, addr, i, MII_PHYSID1);
ac28b9f8
DD
853 if (phy_reg < 0)
854 return -EIO;
50684da7 855 c45_ids->device_ids[i] = phy_reg << 16;
ac28b9f8 856
90ce665c 857 phy_reg = mdiobus_c45_read(bus, addr, i, MII_PHYSID2);
ac28b9f8
DD
858 if (phy_reg < 0)
859 return -EIO;
50684da7 860 c45_ids->device_ids[i] |= phy_reg;
ac28b9f8 861 }
48c54388 862
5ba33cf4 863 c45_ids->devices_in_package = devs_in_pkg;
320ed3bf
RK
864 /* Bit 0 doesn't represent a device, it indicates c22 regs presence */
865 c45_ids->mmds_present = devs_in_pkg & ~BIT(0);
5ba33cf4 866
ac28b9f8
DD
867 return 0;
868}
11b0bacd 869
b3df0da8 870/**
e6306261 871 * get_phy_c22_id - reads the specified addr for its clause 22 ID.
b3df0da8
RD
872 * @bus: the target MII bus
873 * @addr: PHY address on the MII bus
cac1f3c8 874 * @phy_id: where to store the ID retrieved.
00db8189 875 *
ee951005
RK
876 * Read the 802.3 clause 22 PHY ID from the PHY at @addr on the @bus,
877 * placing it in @phy_id. Return zero on successful read and the ID is
878 * valid, %-EIO on bus access error, or %-ENODEV if no device responds
879 * or invalid ID.
00db8189 880 */
e6306261 881static int get_phy_c22_id(struct mii_bus *bus, int addr, u32 *phy_id)
00db8189
AF
882{
883 int phy_reg;
00db8189 884
2f53e904 885 /* Grab the bits from PHYIR1, and put them in the upper half */
6fe32649 886 phy_reg = mdiobus_read(bus, addr, MII_PHYSID1);
02a6efca 887 if (phy_reg < 0) {
d8cce3a1
HK
888 /* returning -ENODEV doesn't stop bus scanning */
889 return (phy_reg == -EIO || phy_reg == -ENODEV) ? -ENODEV : -EIO;
02a6efca 890 }
00db8189 891
50684da7 892 *phy_id = phy_reg << 16;
00db8189
AF
893
894 /* Grab the bits from PHYIR2, and put them in the lower half */
6fe32649 895 phy_reg = mdiobus_read(bus, addr, MII_PHYSID2);
b2ffc75e
FF
896 if (phy_reg < 0) {
897 /* returning -ENODEV doesn't stop bus scanning */
898 return (phy_reg == -EIO || phy_reg == -ENODEV) ? -ENODEV : -EIO;
899 }
cac1f3c8 900
50684da7 901 *phy_id |= phy_reg;
cac1f3c8 902
ee951005
RK
903 /* If the phy_id is mostly Fs, there is no device there */
904 if ((*phy_id & 0x1fffffff) == 0x1fffffff)
905 return -ENODEV;
906
cac1f3c8
PG
907 return 0;
908}
909
114dea60
CJ
910/* Extract the phy ID from the compatible string of the form
911 * ethernet-phy-idAAAA.BBBB.
912 */
913int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id)
914{
915 unsigned int upper, lower;
916 const char *cp;
917 int ret;
918
919 ret = fwnode_property_read_string(fwnode, "compatible", &cp);
920 if (ret)
921 return ret;
922
923 if (sscanf(cp, "ethernet-phy-id%4x.%4x", &upper, &lower) != 2)
924 return -EINVAL;
925
926 *phy_id = ((upper & GENMASK(15, 0)) << 16) | (lower & GENMASK(15, 0));
927 return 0;
928}
929EXPORT_SYMBOL(fwnode_get_phy_id);
930
cac1f3c8 931/**
2f53e904
SS
932 * get_phy_device - reads the specified PHY device and returns its @phy_device
933 * struct
cac1f3c8
PG
934 * @bus: the target MII bus
935 * @addr: PHY address on the MII bus
ac28b9f8 936 * @is_c45: If true the PHY uses the 802.3 clause 45 protocol
cac1f3c8 937 *
439625a7
RK
938 * Probe for a PHY at @addr on @bus.
939 *
940 * When probing for a clause 22 PHY, then read the ID registers. If we find
941 * a valid ID, allocate and return a &struct phy_device.
942 *
943 * When probing for a clause 45 PHY, read the "devices in package" registers.
944 * If the "devices in package" appears valid, read the ID registers for each
945 * MMD, allocate and return a &struct phy_device.
946 *
947 * Returns an allocated &struct phy_device on success, %-ENODEV if there is
948 * no PHY present, or %-EIO on bus access error.
cac1f3c8 949 */
ac28b9f8 950struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
cac1f3c8 951{
b95e86d8 952 struct phy_c45_device_ids c45_ids;
160c85f0 953 u32 phy_id = 0;
cac1f3c8 954 int r;
00db8189 955
b95e86d8 956 c45_ids.devices_in_package = 0;
320ed3bf 957 c45_ids.mmds_present = 0;
b95e86d8
RK
958 memset(c45_ids.device_ids, 0xff, sizeof(c45_ids.device_ids));
959
e6306261 960 if (is_c45)
48c54388 961 r = get_phy_c45_ids(bus, addr, &c45_ids);
e6306261
RK
962 else
963 r = get_phy_c22_id(bus, addr, &phy_id);
964
cac1f3c8
PG
965 if (r)
966 return ERR_PTR(r);
00db8189 967
b040aab7
WVK
968 /* PHY device such as the Marvell Alaska 88E2110 will return a PHY ID
969 * of 0 when probed using get_phy_c22_id() with no error. Proceed to
970 * probe with C45 to see if we're able to get a valid PHY ID in the C45
971 * space, if successful, create the C45 PHY device.
972 */
fbfe9759 973 if (!is_c45 && phy_id == 0 && bus->read_c45) {
b040aab7
WVK
974 r = get_phy_c45_ids(bus, addr, &c45_ids);
975 if (!r)
976 return phy_device_create(bus, addr, phy_id,
977 true, &c45_ids);
978 }
979
e62a768f 980 return phy_device_create(bus, addr, phy_id, is_c45, &c45_ids);
00db8189 981}
4dea547f
GL
982EXPORT_SYMBOL(get_phy_device);
983
984/**
985 * phy_device_register - Register the phy device on the MDIO bus
1d4ac5d5 986 * @phydev: phy_device structure to be added to the MDIO bus
4dea547f
GL
987 */
988int phy_device_register(struct phy_device *phydev)
989{
990 int err;
991
7f854420
AL
992 err = mdiobus_register_device(&phydev->mdio);
993 if (err)
994 return err;
4dea547f 995
bafbdd52
SS
996 /* Deassert the reset signal */
997 phy_device_reset(phydev, 0);
998
4dea547f 999 /* Run all of the fixups for this PHY */
d92f5dec 1000 err = phy_scan_fixups(phydev);
87aa9f9c 1001 if (err) {
c3a6a174 1002 phydev_err(phydev, "failed to initialize\n");
87aa9f9c
FF
1003 goto out;
1004 }
4dea547f 1005
e5a03bfd 1006 err = device_add(&phydev->mdio.dev);
4dea547f 1007 if (err) {
c3a6a174 1008 phydev_err(phydev, "failed to add\n");
4dea547f
GL
1009 goto out;
1010 }
1011
1012 return 0;
1013
1014 out:
bafbdd52
SS
1015 /* Assert the reset signal */
1016 phy_device_reset(phydev, 1);
1017
7f854420 1018 mdiobus_unregister_device(&phydev->mdio);
4dea547f
GL
1019 return err;
1020}
1021EXPORT_SYMBOL(phy_device_register);
00db8189 1022
38737e49
RK
1023/**
1024 * phy_device_remove - Remove a previously registered phy device from the MDIO bus
1025 * @phydev: phy_device structure to remove
1026 *
1027 * This doesn't free the phy_device itself, it merely reverses the effects
1028 * of phy_device_register(). Use phy_device_free() to free the device
1029 * after calling this function.
1030 */
1031void phy_device_remove(struct phy_device *phydev)
1032{
b9926da0 1033 unregister_mii_timestamper(phydev->mii_ts);
5e82147d 1034 pse_control_put(phydev->psec);
1dca22b1 1035
e5a03bfd 1036 device_del(&phydev->mdio.dev);
bafbdd52
SS
1037
1038 /* Assert the reset signal */
1039 phy_device_reset(phydev, 1);
1040
7f854420 1041 mdiobus_unregister_device(&phydev->mdio);
38737e49
RK
1042}
1043EXPORT_SYMBOL(phy_device_remove);
1044
8b72b301
XL
1045/**
1046 * phy_get_c45_ids - Read 802.3-c45 IDs for phy device.
1047 * @phydev: phy_device structure to read 802.3-c45 IDs
1048 *
1049 * Returns zero on success, %-EIO on bus access error, or %-ENODEV if
1050 * the "devices in package" is invalid.
1051 */
1052int phy_get_c45_ids(struct phy_device *phydev)
1053{
1054 return get_phy_c45_ids(phydev->mdio.bus, phydev->mdio.addr,
1055 &phydev->c45_ids);
1056}
1057EXPORT_SYMBOL(phy_get_c45_ids);
1058
f8f76db1
JP
1059/**
1060 * phy_find_first - finds the first PHY device on the bus
1061 * @bus: the target MII bus
1062 */
1063struct phy_device *phy_find_first(struct mii_bus *bus)
1064{
7f854420 1065 struct phy_device *phydev;
f8f76db1
JP
1066 int addr;
1067
1068 for (addr = 0; addr < PHY_MAX_ADDR; addr++) {
7f854420
AL
1069 phydev = mdiobus_get_phy(bus, addr);
1070 if (phydev)
1071 return phydev;
f8f76db1
JP
1072 }
1073 return NULL;
1074}
1075EXPORT_SYMBOL(phy_find_first);
1076
a307593a 1077static void phy_link_change(struct phy_device *phydev, bool up)
a81497be
RK
1078{
1079 struct net_device *netdev = phydev->attached_dev;
1080
a307593a
DB
1081 if (up)
1082 netif_carrier_on(netdev);
1083 else
1084 netif_carrier_off(netdev);
a81497be 1085 phydev->adjust_link(netdev);
4715f65f
RC
1086 if (phydev->mii_ts && phydev->mii_ts->link_state)
1087 phydev->mii_ts->link_state(phydev->mii_ts, phydev);
a81497be
RK
1088}
1089
b3df0da8
RD
1090/**
1091 * phy_prepare_link - prepares the PHY layer to monitor link status
1092 * @phydev: target phy_device struct
1093 * @handler: callback function for link status change notifications
00db8189 1094 *
b3df0da8 1095 * Description: Tells the PHY infrastructure to handle the
00db8189
AF
1096 * gory details on monitoring link status (whether through
1097 * polling or an interrupt), and to call back to the
1098 * connected device driver when the link status changes.
1099 * If you want to monitor your own link state, don't call
b3df0da8
RD
1100 * this function.
1101 */
89ff05ec 1102static void phy_prepare_link(struct phy_device *phydev,
2f53e904 1103 void (*handler)(struct net_device *))
00db8189
AF
1104{
1105 phydev->adjust_link = handler;
1106}
1107
fa94f6d9
GL
1108/**
1109 * phy_connect_direct - connect an ethernet device to a specific phy_device
1110 * @dev: the network device to connect
1111 * @phydev: the pointer to the phy device
1112 * @handler: callback function for state change notifications
fa94f6d9
GL
1113 * @interface: PHY device's interface
1114 */
1115int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
f9a8f83b 1116 void (*handler)(struct net_device *),
fa94f6d9
GL
1117 phy_interface_t interface)
1118{
1119 int rc;
1120
82c76aca
IC
1121 if (!dev)
1122 return -EINVAL;
1123
f9a8f83b 1124 rc = phy_attach_direct(dev, phydev, phydev->dev_flags, interface);
fa94f6d9
GL
1125 if (rc)
1126 return rc;
1127
1128 phy_prepare_link(phydev, handler);
434a4315
HK
1129 if (phy_interrupt_is_valid(phydev))
1130 phy_request_interrupt(phydev);
fa94f6d9
GL
1131
1132 return 0;
1133}
1134EXPORT_SYMBOL(phy_connect_direct);
1135
b3df0da8
RD
1136/**
1137 * phy_connect - connect an ethernet device to a PHY device
1138 * @dev: the network device to connect
5d12b132 1139 * @bus_id: the id string of the PHY device to connect
b3df0da8 1140 * @handler: callback function for state change notifications
b3df0da8 1141 * @interface: PHY device's interface
e1393456 1142 *
b3df0da8 1143 * Description: Convenience function for connecting ethernet
e1393456
AF
1144 * devices to PHY devices. The default behavior is for
1145 * the PHY infrastructure to handle everything, and only notify
1146 * the connected driver when the link status changes. If you
1147 * don't want, or can't use the provided functionality, you may
1148 * choose to call only the subset of functions which provide
1149 * the desired functionality.
1150 */
e109374f 1151struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
2f53e904
SS
1152 void (*handler)(struct net_device *),
1153 phy_interface_t interface)
e1393456
AF
1154{
1155 struct phy_device *phydev;
fa94f6d9
GL
1156 struct device *d;
1157 int rc;
e1393456 1158
fa94f6d9 1159 /* Search the list of PHY devices on the mdio bus for the
2f53e904
SS
1160 * PHY with the requested name
1161 */
fa94f6d9
GL
1162 d = bus_find_device_by_name(&mdio_bus_type, NULL, bus_id);
1163 if (!d) {
1164 pr_err("PHY %s not found\n", bus_id);
1165 return ERR_PTR(-ENODEV);
1166 }
1167 phydev = to_phy_device(d);
e1393456 1168
f9a8f83b 1169 rc = phy_connect_direct(dev, phydev, handler, interface);
17ae1c65 1170 put_device(d);
fa94f6d9
GL
1171 if (rc)
1172 return ERR_PTR(rc);
e1393456
AF
1173
1174 return phydev;
1175}
1176EXPORT_SYMBOL(phy_connect);
1177
b3df0da8 1178/**
2f53e904
SS
1179 * phy_disconnect - disable interrupts, stop state machine, and detach a PHY
1180 * device
b3df0da8
RD
1181 * @phydev: target phy_device struct
1182 */
e1393456
AF
1183void phy_disconnect(struct phy_device *phydev)
1184{
472115d9
HK
1185 if (phy_is_started(phydev))
1186 phy_stop(phydev);
1187
bb658ab7 1188 if (phy_interrupt_is_valid(phydev))
07b09289 1189 phy_free_interrupt(phydev);
e1393456 1190
e1393456
AF
1191 phydev->adjust_link = NULL;
1192
1193 phy_detach(phydev);
1194}
1195EXPORT_SYMBOL(phy_disconnect);
1196
87aa9f9c
FF
1197/**
1198 * phy_poll_reset - Safely wait until a PHY reset has properly completed
1199 * @phydev: The PHY device to poll
1200 *
1201 * Description: According to IEEE 802.3, Section 2, Subsection 22.2.4.1.1, as
1202 * published in 2008, a PHY reset may take up to 0.5 seconds. The MII BMCR
1203 * register must be polled until the BMCR_RESET bit clears.
1204 *
1205 * Furthermore, any attempts to write to PHY registers may have no effect
1206 * or even generate MDIO bus errors until this is complete.
1207 *
1208 * Some PHYs (such as the Marvell 88E1111) don't entirely conform to the
1209 * standard and do not fully reset after the BMCR_RESET bit is set, and may
1210 * even *REQUIRE* a soft-reset to properly restart autonegotiation. In an
1211 * effort to support such broken PHYs, this function is separate from the
1212 * standard phy_init_hw() which will zero all the other bits in the BMCR
1213 * and reapply all driver-specific and board-specific fixups.
1214 */
1215static int phy_poll_reset(struct phy_device *phydev)
1216{
1217 /* Poll until the reset bit clears (50ms per retry == 0.6 sec) */
745a237c 1218 int ret, val;
87aa9f9c 1219
745a237c
DZ
1220 ret = phy_read_poll_timeout(phydev, MII_BMCR, val, !(val & BMCR_RESET),
1221 50000, 600000, true);
1222 if (ret)
1223 return ret;
2f53e904 1224 /* Some chips (smsc911x) may still need up to another 1ms after the
87aa9f9c
FF
1225 * BMCR_RESET bit is cleared before they are usable.
1226 */
1227 msleep(1);
1228 return 0;
1229}
1230
2f5cb434
AV
1231int phy_init_hw(struct phy_device *phydev)
1232{
9df81dd7 1233 int ret = 0;
2f5cb434 1234
bafbdd52
SS
1235 /* Deassert the reset signal */
1236 phy_device_reset(phydev, 0);
1237
a5996989 1238 if (!phydev->drv)
2f5cb434
AV
1239 return 0;
1240
9576e9fa 1241 if (phydev->drv->soft_reset) {
9df81dd7 1242 ret = phydev->drv->soft_reset(phydev);
aadbd27f
CM
1243 if (ret < 0)
1244 return ret;
1245
9576e9fa 1246 /* see comment in genphy_soft_reset for an explanation */
aadbd27f 1247 phydev->suspended = 0;
9576e9fa 1248 }
9df81dd7 1249
2f5cb434
AV
1250 ret = phy_scan_fixups(phydev);
1251 if (ret < 0)
1252 return ret;
1253
243ad8df
RKO
1254 phy_interface_zero(phydev->possible_interfaces);
1255
4c0d2e96 1256 if (phydev->drv->config_init) {
a5996989 1257 ret = phydev->drv->config_init(phydev);
4c0d2e96
HK
1258 if (ret < 0)
1259 return ret;
1260 }
a5996989 1261
4c0d2e96
HK
1262 if (phydev->drv->config_intr) {
1263 ret = phydev->drv->config_intr(phydev);
1264 if (ret < 0)
1265 return ret;
1266 }
1267
1268 return 0;
2f5cb434 1269}
87aa9f9c 1270EXPORT_SYMBOL(phy_init_hw);
2f5cb434 1271
2220943a
AL
1272void phy_attached_info(struct phy_device *phydev)
1273{
1274 phy_attached_print(phydev, NULL);
1275}
1276EXPORT_SYMBOL(phy_attached_info);
1277
a98cabdb 1278#define ATTACHED_FMT "attached PHY driver %s(mii_bus:phy_addr=%s, irq=%s)"
e27f1787 1279char *phy_attached_info_irq(struct phy_device *phydev)
2220943a 1280{
5e369aef 1281 char *irq_str;
059fbe8b 1282 char irq_num[8];
5e369aef
RP
1283
1284 switch(phydev->irq) {
1285 case PHY_POLL:
1286 irq_str = "POLL";
1287 break;
93e8990c
HK
1288 case PHY_MAC_INTERRUPT:
1289 irq_str = "MAC";
5e369aef
RP
1290 break;
1291 default:
1292 snprintf(irq_num, sizeof(irq_num), "%d", phydev->irq);
1293 irq_str = irq_num;
1294 break;
1295 }
1296
e27f1787
FF
1297 return kasprintf(GFP_KERNEL, "%s", irq_str);
1298}
1299EXPORT_SYMBOL(phy_attached_info_irq);
1300
1301void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1302{
a98cabdb 1303 const char *unbound = phydev->drv ? "" : "[unbound] ";
e27f1787 1304 char *irq_str = phy_attached_info_irq(phydev);
fcd03e36 1305
2220943a 1306 if (!fmt) {
a98cabdb
HK
1307 phydev_info(phydev, ATTACHED_FMT "\n", unbound,
1308 phydev_name(phydev), irq_str);
2220943a
AL
1309 } else {
1310 va_list ap;
1311
a98cabdb
HK
1312 phydev_info(phydev, ATTACHED_FMT, unbound,
1313 phydev_name(phydev), irq_str);
2220943a
AL
1314
1315 va_start(ap, fmt);
1316 vprintk(fmt, ap);
1317 va_end(ap);
1318 }
e27f1787 1319 kfree(irq_str);
2220943a
AL
1320}
1321EXPORT_SYMBOL(phy_attached_print);
1322
53cfca2d
VO
1323static void phy_sysfs_create_links(struct phy_device *phydev)
1324{
1325 struct net_device *dev = phydev->attached_dev;
1326 int err;
1327
2db2d9d1
IC
1328 if (!dev)
1329 return;
1330
53cfca2d
VO
1331 err = sysfs_create_link(&phydev->mdio.dev.kobj, &dev->dev.kobj,
1332 "attached_dev");
1333 if (err)
1334 return;
1335
1336 err = sysfs_create_link_nowarn(&dev->dev.kobj,
1337 &phydev->mdio.dev.kobj,
1338 "phydev");
1339 if (err) {
1340 dev_err(&dev->dev, "could not add device link to %s err %d\n",
1341 kobject_name(&phydev->mdio.dev.kobj),
1342 err);
1343 /* non-fatal - some net drivers can use one netdevice
1344 * with more then one phy
1345 */
1346 }
1347
1348 phydev->sysfs_links = true;
1349}
1350
c920f745
IC
1351static ssize_t
1352phy_standalone_show(struct device *dev, struct device_attribute *attr,
1353 char *buf)
1354{
1355 struct phy_device *phydev = to_phy_device(dev);
1356
b5155ddd 1357 return sysfs_emit(buf, "%d\n", !phydev->attached_dev);
c920f745
IC
1358}
1359static DEVICE_ATTR_RO(phy_standalone);
1360
298e54fa
RK
1361/**
1362 * phy_sfp_attach - attach the SFP bus to the PHY upstream network device
1363 * @upstream: pointer to the phy device
1364 * @bus: sfp bus representing cage being attached
1365 *
1366 * This is used to fill in the sfp_upstream_ops .attach member.
1367 */
1368void phy_sfp_attach(void *upstream, struct sfp_bus *bus)
1369{
1370 struct phy_device *phydev = upstream;
1371
1372 if (phydev->attached_dev)
1373 phydev->attached_dev->sfp_bus = bus;
1374 phydev->sfp_bus_attached = true;
1375}
1376EXPORT_SYMBOL(phy_sfp_attach);
1377
1378/**
1379 * phy_sfp_detach - detach the SFP bus from the PHY upstream network device
1380 * @upstream: pointer to the phy device
1381 * @bus: sfp bus representing cage being attached
1382 *
1383 * This is used to fill in the sfp_upstream_ops .detach member.
1384 */
1385void phy_sfp_detach(void *upstream, struct sfp_bus *bus)
1386{
1387 struct phy_device *phydev = upstream;
1388
1389 if (phydev->attached_dev)
1390 phydev->attached_dev->sfp_bus = NULL;
1391 phydev->sfp_bus_attached = false;
1392}
1393EXPORT_SYMBOL(phy_sfp_detach);
1394
1395/**
1396 * phy_sfp_probe - probe for a SFP cage attached to this PHY device
1397 * @phydev: Pointer to phy_device
1398 * @ops: SFP's upstream operations
1399 */
1400int phy_sfp_probe(struct phy_device *phydev,
1401 const struct sfp_upstream_ops *ops)
1402{
1403 struct sfp_bus *bus;
e3f2d557 1404 int ret = 0;
298e54fa
RK
1405
1406 if (phydev->mdio.dev.fwnode) {
1407 bus = sfp_bus_find_fwnode(phydev->mdio.dev.fwnode);
1408 if (IS_ERR(bus))
1409 return PTR_ERR(bus);
1410
1411 phydev->sfp_bus = bus;
1412
1413 ret = sfp_bus_add_upstream(bus, phydev, ops);
1414 sfp_bus_put(bus);
1415 }
e3f2d557 1416 return ret;
298e54fa
RK
1417}
1418EXPORT_SYMBOL(phy_sfp_probe);
1419
0bd199fd 1420static bool phy_drv_supports_irq(const struct phy_driver *phydrv)
61c81872
AW
1421{
1422 return phydrv->config_intr && phydrv->handle_interrupt;
1423}
1424
b3df0da8 1425/**
fa94f6d9 1426 * phy_attach_direct - attach a network device to a given PHY device pointer
b3df0da8 1427 * @dev: network device to attach
fa94f6d9 1428 * @phydev: Pointer to phy_device to attach
b3df0da8
RD
1429 * @flags: PHY device's dev_flags
1430 * @interface: PHY device's interface
e1393456 1431 *
b3df0da8 1432 * Description: Called by drivers to attach to a particular PHY
e1393456 1433 * device. The phy_device is found, and properly hooked up
257184d7
AF
1434 * to the phy_driver. If no driver is attached, then a
1435 * generic driver is used. The phy_device is given a ptr to
e1393456 1436 * the attaching device, and given a callback for link status
b3df0da8 1437 * change. The phy_device is returned to the attaching driver.
7322967b 1438 * This function takes a reference on the phy device.
e1393456 1439 */
257184d7
AF
1440int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1441 u32 flags, phy_interface_t interface)
e1393456 1442{
e5a03bfd
AL
1443 struct mii_bus *bus = phydev->mdio.bus;
1444 struct device *d = &phydev->mdio.dev;
2db2d9d1 1445 struct module *ndev_owner = NULL;
6d9f66ac 1446 bool using_genphy = false;
d005a09e 1447 int err;
e1393456 1448
ec988ad7
FF
1449 /* For Ethernet device drivers that register their own MDIO bus, we
1450 * will have bus->owner match ndev_mod, so we do not want to increment
1451 * our own module->refcnt here, otherwise we would not be able to
1452 * unload later on.
1453 */
2db2d9d1
IC
1454 if (dev)
1455 ndev_owner = dev->dev.parent->driver->owner;
ec988ad7 1456 if (ndev_owner != bus->owner && !try_module_get(bus->owner)) {
2db2d9d1 1457 phydev_err(phydev, "failed to get the bus module\n");
3e3aaf64
RK
1458 return -EIO;
1459 }
1460
7322967b
RK
1461 get_device(d);
1462
e1393456 1463 /* Assume that if there is no driver, that it doesn't
2f53e904
SS
1464 * exist, and we should use the genphy driver.
1465 */
ef899c07 1466 if (!d->driver) {
257184d7 1467 if (phydev->is_c45)
22b56e82 1468 d->driver = &genphy_c45_driver.mdiodrv.driver;
257184d7 1469 else
921690f2 1470 d->driver = &genphy_driver.mdiodrv.driver;
e1393456 1471
6d9f66ac
FF
1472 using_genphy = true;
1473 }
1474
1475 if (!try_module_get(d->driver->owner)) {
2db2d9d1 1476 phydev_err(phydev, "failed to get the device driver module\n");
6d9f66ac
FF
1477 err = -EIO;
1478 goto error_put_device;
1479 }
1480
1481 if (using_genphy) {
e1393456 1482 err = d->driver->probe(d);
b7a00ecd
JG
1483 if (err >= 0)
1484 err = device_bind_driver(d);
e1393456 1485
b7a00ecd 1486 if (err)
6d9f66ac 1487 goto error_module_put;
e1393456
AF
1488 }
1489
1490 if (phydev->attached_dev) {
fa94f6d9 1491 dev_err(&dev->dev, "PHY already attached\n");
3e3aaf64
RK
1492 err = -EBUSY;
1493 goto error;
b3565f27
EG
1494 }
1495
a81497be 1496 phydev->phy_link_change = phy_link_change;
2db2d9d1
IC
1497 if (dev) {
1498 phydev->attached_dev = dev;
1499 dev->phydev = phydev;
298e54fa
RK
1500
1501 if (phydev->sfp_bus_attached)
1502 dev->sfp_bus = phydev->sfp_bus;
2db2d9d1 1503 }
a3995460
FF
1504
1505 /* Some Ethernet drivers try to connect to a PHY device before
1506 * calling register_netdevice() -> netdev_register_kobject() and
1507 * does the dev->dev.kobj initialization. Here we only check for
1508 * success which indicates that the network device kobject is
1509 * ready. Once we do that we still need to keep track of whether
1510 * links were successfully set up or not for phy_detach() to
1511 * remove them accordingly.
1512 */
1513 phydev->sysfs_links = false;
1514
53cfca2d 1515 phy_sysfs_create_links(phydev);
e1393456 1516
c920f745
IC
1517 if (!phydev->attached_dev) {
1518 err = sysfs_create_file(&phydev->mdio.dev.kobj,
1519 &dev_attr_phy_standalone.attr);
1520 if (err)
1521 phydev_err(phydev, "error creating 'phy_standalone' sysfs entry\n");
1522 }
1523
e7312efb 1524 phydev->dev_flags |= flags;
e1393456 1525
e8a2b6a4
AF
1526 phydev->interface = interface;
1527
ef24b16b
AV
1528 phydev->state = PHY_READY;
1529
07caad0b
LW
1530 phydev->interrupts = PHY_INTERRUPT_DISABLED;
1531
7d885863
MW
1532 /* PHYs can request to use poll mode even though they have an
1533 * associated interrupt line. This could be the case if they
1534 * detect a broken interrupt handling.
1535 */
1536 if (phydev->dev_flags & PHY_F_NO_IRQ)
1537 phydev->irq = PHY_POLL;
1538
61c81872
AW
1539 if (!phy_drv_supports_irq(phydev->drv) && phy_interrupt_is_valid(phydev))
1540 phydev->irq = PHY_POLL;
1541
4217a64e
MW
1542 /* Port is set to PORT_TP by default and the actual PHY driver will set
1543 * it to different value depending on the PHY configuration. If we have
1544 * the generic PHY driver we can't figure it out, thus set the old
1545 * legacy PORT_MII value.
1546 */
1547 if (using_genphy)
1548 phydev->port = PORT_MII;
1549
113c74d8
SS
1550 /* Initial carrier state is off as the phy is about to be
1551 * (re)initialized.
1552 */
2db2d9d1
IC
1553 if (dev)
1554 netif_carrier_off(phydev->attached_dev);
113c74d8 1555
e8a2b6a4
AF
1556 /* Do initial configuration here, now that
1557 * we have certain key parameters
2f53e904
SS
1558 * (dev_flags and interface)
1559 */
d005a09e
MKB
1560 err = phy_init_hw(phydev);
1561 if (err)
a7dac9f9 1562 goto error;
1211ce53 1563
a7dac9f9 1564 phy_resume(phydev);
b1dfc0f7
DG
1565 if (!phydev->is_on_sfp_module)
1566 phy_led_triggers_register(phydev);
2e0bc452 1567
bc66fa87
XW
1568 /**
1569 * If the external phy used by current mac interface is managed by
1570 * another mac interface, so we should create a device link between
1571 * phy dev and mac dev.
1572 */
73a87602 1573 if (dev && phydev->mdio.bus->parent && dev->dev.parent != phydev->mdio.bus->parent)
bc66fa87
XW
1574 phydev->devlink = device_link_add(dev->dev.parent, &phydev->mdio.dev,
1575 DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS);
1576
d005a09e 1577 return err;
3e3aaf64
RK
1578
1579error:
6d9f66ac 1580 /* phy_detach() does all of the cleanup below */
a7dac9f9 1581 phy_detach(phydev);
6d9f66ac
FF
1582 return err;
1583
1584error_module_put:
cafe8df8 1585 module_put(d->driver->owner);
369eb2c9 1586 d->driver = NULL;
6d9f66ac
FF
1587error_put_device:
1588 put_device(d);
ec988ad7
FF
1589 if (ndev_owner != bus->owner)
1590 module_put(bus->owner);
3e3aaf64 1591 return err;
fa94f6d9 1592}
257184d7 1593EXPORT_SYMBOL(phy_attach_direct);
fa94f6d9
GL
1594
1595/**
1596 * phy_attach - attach a network device to a particular PHY device
1597 * @dev: network device to attach
1598 * @bus_id: Bus ID of PHY device to attach
fa94f6d9
GL
1599 * @interface: PHY device's interface
1600 *
1601 * Description: Same as phy_attach_direct() except that a PHY bus_id
1602 * string is passed instead of a pointer to a struct phy_device.
1603 */
2f53e904
SS
1604struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1605 phy_interface_t interface)
fa94f6d9 1606{
fa94f6d9
GL
1607 struct phy_device *phydev;
1608 struct device *d;
1609 int rc;
1610
82c76aca
IC
1611 if (!dev)
1612 return ERR_PTR(-EINVAL);
1613
fa94f6d9 1614 /* Search the list of PHY devices on the mdio bus for the
2f53e904
SS
1615 * PHY with the requested name
1616 */
81800aef 1617 d = bus_find_device_by_name(&mdio_bus_type, NULL, bus_id);
fa94f6d9
GL
1618 if (!d) {
1619 pr_err("PHY %s not found\n", bus_id);
1620 return ERR_PTR(-ENODEV);
e8a2b6a4 1621 }
fa94f6d9
GL
1622 phydev = to_phy_device(d);
1623
f9a8f83b 1624 rc = phy_attach_direct(dev, phydev, phydev->dev_flags, interface);
17ae1c65 1625 put_device(d);
fa94f6d9
GL
1626 if (rc)
1627 return ERR_PTR(rc);
e8a2b6a4 1628
e1393456
AF
1629 return phydev;
1630}
1631EXPORT_SYMBOL(phy_attach);
1632
5db5ea99
FF
1633static bool phy_driver_is_genphy_kind(struct phy_device *phydev,
1634 struct device_driver *driver)
1635{
1636 struct device *d = &phydev->mdio.dev;
1637 bool ret = false;
1638
1639 if (!phydev->drv)
1640 return ret;
1641
1642 get_device(d);
1643 ret = d->driver == driver;
1644 put_device(d);
1645
1646 return ret;
1647}
1648
1649bool phy_driver_is_genphy(struct phy_device *phydev)
1650{
1651 return phy_driver_is_genphy_kind(phydev,
1652 &genphy_driver.mdiodrv.driver);
1653}
1654EXPORT_SYMBOL_GPL(phy_driver_is_genphy);
1655
1656bool phy_driver_is_genphy_10g(struct phy_device *phydev)
1657{
1658 return phy_driver_is_genphy_kind(phydev,
22b56e82 1659 &genphy_c45_driver.mdiodrv.driver);
5db5ea99
FF
1660}
1661EXPORT_SYMBOL_GPL(phy_driver_is_genphy_10g);
1662
63490847
MW
1663/**
1664 * phy_package_join - join a common PHY group
1665 * @phydev: target phy_device struct
9eea577e
CM
1666 * @base_addr: cookie and base PHY address of PHY package for offset
1667 * calculation of global register access
63490847
MW
1668 * @priv_size: if non-zero allocate this amount of bytes for private data
1669 *
1670 * This joins a PHY group and provides a shared storage for all phydevs in
1671 * this group. This is intended to be used for packages which contain
1672 * more than one PHY, for example a quad PHY transceiver.
1673 *
9eea577e
CM
1674 * The base_addr parameter serves as cookie which has to have the same values
1675 * for all members of one group and as the base PHY address of the PHY package
1676 * for offset calculation to access generic registers of a PHY package.
1677 * Usually, one of the PHY addresses of the different PHYs in the package
1678 * provides access to these global registers.
63490847 1679 * The address which is given here, will be used in the phy_package_read()
9eea577e
CM
1680 * and phy_package_write() convenience functions as base and added to the
1681 * passed offset in those functions.
63490847
MW
1682 *
1683 * This will set the shared pointer of the phydev to the shared storage.
1684 * If this is the first call for a this cookie the shared storage will be
1685 * allocated. If priv_size is non-zero, the given amount of bytes are
1686 * allocated for the priv member.
1687 *
1688 * Returns < 1 on error, 0 on success. Esp. calling phy_package_join()
1689 * with the same cookie but a different priv_size is an error.
1690 */
9eea577e 1691int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size)
63490847
MW
1692{
1693 struct mii_bus *bus = phydev->mdio.bus;
1694 struct phy_package_shared *shared;
1695 int ret;
1696
9eea577e 1697 if (base_addr < 0 || base_addr >= PHY_MAX_ADDR)
63490847
MW
1698 return -EINVAL;
1699
1700 mutex_lock(&bus->shared_lock);
9eea577e 1701 shared = bus->shared[base_addr];
63490847
MW
1702 if (!shared) {
1703 ret = -ENOMEM;
1704 shared = kzalloc(sizeof(*shared), GFP_KERNEL);
1705 if (!shared)
1706 goto err_unlock;
1707 if (priv_size) {
1708 shared->priv = kzalloc(priv_size, GFP_KERNEL);
1709 if (!shared->priv)
1710 goto err_free;
1711 shared->priv_size = priv_size;
1712 }
9eea577e 1713 shared->base_addr = base_addr;
471e8fd3 1714 shared->np = NULL;
63490847 1715 refcount_set(&shared->refcnt, 1);
9eea577e 1716 bus->shared[base_addr] = shared;
63490847
MW
1717 } else {
1718 ret = -EINVAL;
1719 if (priv_size && priv_size != shared->priv_size)
1720 goto err_unlock;
1721 refcount_inc(&shared->refcnt);
1722 }
1723 mutex_unlock(&bus->shared_lock);
1724
1725 phydev->shared = shared;
1726
1727 return 0;
1728
1729err_free:
1730 kfree(shared);
1731err_unlock:
1732 mutex_unlock(&bus->shared_lock);
1733 return ret;
1734}
1735EXPORT_SYMBOL_GPL(phy_package_join);
1736
471e8fd3
CM
1737/**
1738 * of_phy_package_join - join a common PHY group in PHY package
1739 * @phydev: target phy_device struct
1740 * @priv_size: if non-zero allocate this amount of bytes for private data
1741 *
1742 * This is a variant of phy_package_join for PHY package defined in DT.
1743 *
1744 * The parent node of the @phydev is checked as a valid PHY package node
1745 * structure (by matching the node name "ethernet-phy-package") and the
1746 * base_addr for the PHY package is passed to phy_package_join.
1747 *
1748 * With this configuration the shared struct will also have the np value
1749 * filled to use additional DT defined properties in PHY specific
1750 * probe_once and config_init_once PHY package OPs.
1751 *
1752 * Returns < 0 on error, 0 on success. Esp. calling phy_package_join()
1753 * with the same cookie but a different priv_size is an error. Or a parent
1754 * node is not detected or is not valid or doesn't match the expected node
1755 * name for PHY package.
1756 */
1757int of_phy_package_join(struct phy_device *phydev, size_t priv_size)
1758{
1759 struct device_node *node = phydev->mdio.dev.of_node;
1760 struct device_node *package_node;
1761 u32 base_addr;
1762 int ret;
1763
1764 if (!node)
1765 return -EINVAL;
1766
1767 package_node = of_get_parent(node);
1768 if (!package_node)
1769 return -EINVAL;
1770
1771 if (!of_node_name_eq(package_node, "ethernet-phy-package")) {
1772 ret = -EINVAL;
1773 goto exit;
1774 }
1775
1776 if (of_property_read_u32(package_node, "reg", &base_addr)) {
1777 ret = -EINVAL;
1778 goto exit;
1779 }
1780
1781 ret = phy_package_join(phydev, base_addr, priv_size);
1782 if (ret)
1783 goto exit;
1784
1785 phydev->shared->np = package_node;
1786
1787 return 0;
1788exit:
1789 of_node_put(package_node);
1790 return ret;
1791}
1792EXPORT_SYMBOL_GPL(of_phy_package_join);
1793
63490847
MW
1794/**
1795 * phy_package_leave - leave a common PHY group
1796 * @phydev: target phy_device struct
1797 *
1798 * This leaves a PHY group created by phy_package_join(). If this phydev
1799 * was the last user of the shared data between the group, this data is
1800 * freed. Resets the phydev->shared pointer to NULL.
1801 */
1802void phy_package_leave(struct phy_device *phydev)
1803{
1804 struct phy_package_shared *shared = phydev->shared;
1805 struct mii_bus *bus = phydev->mdio.bus;
1806
1807 if (!shared)
1808 return;
1809
471e8fd3
CM
1810 /* Decrease the node refcount on leave if present */
1811 if (shared->np)
1812 of_node_put(shared->np);
1813
63490847 1814 if (refcount_dec_and_mutex_lock(&shared->refcnt, &bus->shared_lock)) {
9eea577e 1815 bus->shared[shared->base_addr] = NULL;
63490847
MW
1816 mutex_unlock(&bus->shared_lock);
1817 kfree(shared->priv);
1818 kfree(shared);
1819 }
1820
1821 phydev->shared = NULL;
1822}
1823EXPORT_SYMBOL_GPL(phy_package_leave);
1824
1825static void devm_phy_package_leave(struct device *dev, void *res)
1826{
1827 phy_package_leave(*(struct phy_device **)res);
1828}
1829
1830/**
1831 * devm_phy_package_join - resource managed phy_package_join()
1832 * @dev: device that is registering this PHY package
1833 * @phydev: target phy_device struct
9eea577e
CM
1834 * @base_addr: cookie and base PHY address of PHY package for offset
1835 * calculation of global register access
63490847
MW
1836 * @priv_size: if non-zero allocate this amount of bytes for private data
1837 *
1838 * Managed phy_package_join(). Shared storage fetched by this function,
1839 * phy_package_leave() is automatically called on driver detach. See
1840 * phy_package_join() for more information.
1841 */
1842int devm_phy_package_join(struct device *dev, struct phy_device *phydev,
9eea577e 1843 int base_addr, size_t priv_size)
63490847
MW
1844{
1845 struct phy_device **ptr;
1846 int ret;
1847
1848 ptr = devres_alloc(devm_phy_package_leave, sizeof(*ptr),
1849 GFP_KERNEL);
1850 if (!ptr)
1851 return -ENOMEM;
1852
9eea577e 1853 ret = phy_package_join(phydev, base_addr, priv_size);
63490847
MW
1854
1855 if (!ret) {
1856 *ptr = phydev;
1857 devres_add(dev, ptr);
1858 } else {
1859 devres_free(ptr);
1860 }
1861
1862 return ret;
1863}
1864EXPORT_SYMBOL_GPL(devm_phy_package_join);
1865
471e8fd3
CM
1866/**
1867 * devm_of_phy_package_join - resource managed of_phy_package_join()
1868 * @dev: device that is registering this PHY package
1869 * @phydev: target phy_device struct
1870 * @priv_size: if non-zero allocate this amount of bytes for private data
1871 *
1872 * Managed of_phy_package_join(). Shared storage fetched by this function,
1873 * phy_package_leave() is automatically called on driver detach. See
1874 * of_phy_package_join() for more information.
1875 */
1876int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev,
1877 size_t priv_size)
1878{
1879 struct phy_device **ptr;
1880 int ret;
1881
1882 ptr = devres_alloc(devm_phy_package_leave, sizeof(*ptr),
1883 GFP_KERNEL);
1884 if (!ptr)
1885 return -ENOMEM;
1886
1887 ret = of_phy_package_join(phydev, priv_size);
1888
1889 if (!ret) {
1890 *ptr = phydev;
1891 devres_add(dev, ptr);
1892 } else {
1893 devres_free(ptr);
1894 }
1895
1896 return ret;
1897}
1898EXPORT_SYMBOL_GPL(devm_of_phy_package_join);
1899
b3df0da8
RD
1900/**
1901 * phy_detach - detach a PHY device from its network device
1902 * @phydev: target phy_device struct
7322967b
RK
1903 *
1904 * This detaches the phy device from its network device and the phy
1905 * driver, and drops the reference count taken in phy_attach_direct().
b3df0da8 1906 */
e1393456
AF
1907void phy_detach(struct phy_device *phydev)
1908{
ec988ad7 1909 struct net_device *dev = phydev->attached_dev;
2db2d9d1 1910 struct module *ndev_owner = NULL;
3e3aaf64 1911 struct mii_bus *bus;
b3565f27 1912
bc66fa87
XW
1913 if (phydev->devlink)
1914 device_link_del(phydev->devlink);
1915
a3995460 1916 if (phydev->sysfs_links) {
2db2d9d1
IC
1917 if (dev)
1918 sysfs_remove_link(&dev->dev.kobj, "phydev");
a3995460
FF
1919 sysfs_remove_link(&phydev->mdio.dev.kobj, "attached_dev");
1920 }
c920f745
IC
1921
1922 if (!phydev->attached_dev)
1923 sysfs_remove_file(&phydev->mdio.dev.kobj,
1924 &dev_attr_phy_standalone.attr);
1925
93f41e67 1926 phy_suspend(phydev);
2db2d9d1
IC
1927 if (dev) {
1928 phydev->attached_dev->phydev = NULL;
1929 phydev->attached_dev = NULL;
1930 }
9525ae83 1931 phydev->phylink = NULL;
e1393456 1932
b1dfc0f7
DG
1933 if (!phydev->is_on_sfp_module)
1934 phy_led_triggers_unregister(phydev);
0075bd69 1935
c2b727df
FF
1936 if (phydev->mdio.dev.driver)
1937 module_put(phydev->mdio.dev.driver->owner);
6d9f66ac 1938
e1393456
AF
1939 /* If the device had no specific driver before (i.e. - it
1940 * was using the generic driver), we unbind the device
1941 * from the generic driver so that there's a chance a
2f53e904
SS
1942 * real driver could be loaded
1943 */
5db5ea99
FF
1944 if (phy_driver_is_genphy(phydev) ||
1945 phy_driver_is_genphy_10g(phydev))
921690f2 1946 device_release_driver(&phydev->mdio.dev);
3e3aaf64 1947
cbda1b16
MB
1948 /* Assert the reset signal */
1949 phy_device_reset(phydev, 1);
1950
7322967b
RK
1951 /*
1952 * The phydev might go away on the put_device() below, so avoid
1953 * a use-after-free bug by reading the underlying bus first.
1954 */
e5a03bfd 1955 bus = phydev->mdio.bus;
3e3aaf64 1956
e5a03bfd 1957 put_device(&phydev->mdio.dev);
2db2d9d1
IC
1958 if (dev)
1959 ndev_owner = dev->dev.parent->driver->owner;
ec988ad7
FF
1960 if (ndev_owner != bus->owner)
1961 module_put(bus->owner);
e1393456
AF
1962}
1963EXPORT_SYMBOL(phy_detach);
1964
481b5d93
SH
1965int phy_suspend(struct phy_device *phydev)
1966{
32fc3fd4 1967 struct ethtool_wolinfo wol = { .cmd = ETHTOOL_GWOL };
8a8f8281 1968 struct net_device *netdev = phydev->attached_dev;
0bd199fd 1969 const struct phy_driver *phydrv = phydev->drv;
8a8f8281 1970 int ret;
481b5d93 1971
d70c47c8
HK
1972 if (phydev->suspended)
1973 return 0;
1974
481b5d93 1975 phy_ethtool_get_wol(phydev, &wol);
a7e34480
FF
1976 phydev->wol_enabled = wol.wolopts || (netdev && netdev->wol_enabled);
1977 /* If the device has WOL enabled, we cannot suspend the PHY */
1978 if (phydev->wol_enabled && !(phydrv->flags & PHY_ALWAYS_CALL_SUSPEND))
481b5d93
SH
1979 return -EBUSY;
1980
8a8f8281
HK
1981 if (!phydrv || !phydrv->suspend)
1982 return 0;
8a477a6f 1983
8a8f8281
HK
1984 ret = phydrv->suspend(phydev);
1985 if (!ret)
1986 phydev->suspended = true;
8a477a6f
FF
1987
1988 return ret;
481b5d93 1989}
ca127697 1990EXPORT_SYMBOL(phy_suspend);
481b5d93 1991
9c2c2e62 1992int __phy_resume(struct phy_device *phydev)
481b5d93 1993{
0bd199fd 1994 const struct phy_driver *phydrv = phydev->drv;
8a8f8281 1995 int ret;
481b5d93 1996
e6e918d4 1997 lockdep_assert_held(&phydev->lock);
f5e64032 1998
8a8f8281
HK
1999 if (!phydrv || !phydrv->resume)
2000 return 0;
8a477a6f 2001
8a8f8281
HK
2002 ret = phydrv->resume(phydev);
2003 if (!ret)
2004 phydev->suspended = false;
8a477a6f
FF
2005
2006 return ret;
481b5d93 2007}
9c2c2e62
AL
2008EXPORT_SYMBOL(__phy_resume);
2009
2010int phy_resume(struct phy_device *phydev)
2011{
2012 int ret;
2013
2014 mutex_lock(&phydev->lock);
2015 ret = __phy_resume(phydev);
2016 mutex_unlock(&phydev->lock);
2017
2018 return ret;
2019}
ca127697 2020EXPORT_SYMBOL(phy_resume);
e1393456 2021
f0f9b4ed
LYS
2022int phy_loopback(struct phy_device *phydev, bool enable)
2023{
f0f9b4ed
LYS
2024 int ret = 0;
2025
4ed311b0
GE
2026 if (!phydev->drv)
2027 return -EIO;
f4f86d8d 2028
f0f9b4ed
LYS
2029 mutex_lock(&phydev->lock);
2030
2031 if (enable && phydev->loopback_enabled) {
2032 ret = -EBUSY;
2033 goto out;
2034 }
2035
2036 if (!enable && !phydev->loopback_enabled) {
2037 ret = -EINVAL;
2038 goto out;
2039 }
2040
4ed311b0
GE
2041 if (phydev->drv->set_loopback)
2042 ret = phydev->drv->set_loopback(phydev, enable);
f0f9b4ed 2043 else
f4f86d8d 2044 ret = genphy_loopback(phydev, enable);
f0f9b4ed
LYS
2045
2046 if (ret)
2047 goto out;
2048
2049 phydev->loopback_enabled = enable;
2050
2051out:
2052 mutex_unlock(&phydev->lock);
2053 return ret;
2054}
2055EXPORT_SYMBOL(phy_loopback);
2056
a9668491
RL
2057/**
2058 * phy_reset_after_clk_enable - perform a PHY reset if needed
2059 * @phydev: target phy_device struct
2060 *
2061 * Description: Some PHYs are known to need a reset after their refclk was
2062 * enabled. This function evaluates the flags and perform the reset if it's
2063 * needed. Returns < 0 on error, 0 if the phy wasn't reset and 1 if the phy
2064 * was reset.
2065 */
2066int phy_reset_after_clk_enable(struct phy_device *phydev)
2067{
2068 if (!phydev || !phydev->drv)
2069 return -ENODEV;
2070
2071 if (phydev->drv->flags & PHY_RST_AFTER_CLK_EN) {
2072 phy_device_reset(phydev, 1);
2073 phy_device_reset(phydev, 0);
2074 return 1;
2075 }
2076
2077 return 0;
2078}
2079EXPORT_SYMBOL(phy_reset_after_clk_enable);
2080
00db8189
AF
2081/* Generic PHY support and helper functions */
2082
b3df0da8 2083/**
25985edc 2084 * genphy_config_advert - sanitize and advertise auto-negotiation parameters
b3df0da8 2085 * @phydev: target phy_device struct
00db8189 2086 *
b3df0da8 2087 * Description: Writes MII_ADVERTISE with the appropriate values,
00db8189 2088 * after sanitizing the values to make sure we only advertise
51e2a384
TP
2089 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
2090 * hasn't changed, and > 0 if it has changed.
00db8189 2091 */
89ff05ec 2092static int genphy_config_advert(struct phy_device *phydev)
00db8189 2093{
3eef8689
HK
2094 int err, bmsr, changed = 0;
2095 u32 adv;
00db8189 2096
2f53e904 2097 /* Only allow advertising what this PHY supports */
3c1bcc86
AL
2098 linkmode_and(phydev->advertising, phydev->advertising,
2099 phydev->supported);
3eef8689
HK
2100
2101 adv = linkmode_adv_to_mii_adv_t(phydev->advertising);
00db8189
AF
2102
2103 /* Setup standard advertisement */
4f9744ed
HK
2104 err = phy_modify_changed(phydev, MII_ADVERTISE,
2105 ADVERTISE_ALL | ADVERTISE_100BASE4 |
2106 ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM,
3eef8689 2107 adv);
4f9744ed
HK
2108 if (err < 0)
2109 return err;
2110 if (err > 0)
51e2a384 2111 changed = 1;
00db8189 2112
5273e3a5
FF
2113 bmsr = phy_read(phydev, MII_BMSR);
2114 if (bmsr < 0)
2115 return bmsr;
2116
2117 /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
2118 * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
2119 * logical 1.
2120 */
2121 if (!(bmsr & BMSR_ESTATEN))
2122 return changed;
2123
3eef8689 2124 adv = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);
00db8189 2125
4f9744ed
HK
2126 err = phy_modify_changed(phydev, MII_CTRL1000,
2127 ADVERTISE_1000FULL | ADVERTISE_1000HALF,
2128 adv);
5273e3a5
FF
2129 if (err < 0)
2130 return err;
4f9744ed
HK
2131 if (err > 0)
2132 changed = 1;
5273e3a5 2133
51e2a384 2134 return changed;
00db8189 2135}
00db8189 2136
fa6e98ce
HK
2137/**
2138 * genphy_c37_config_advert - sanitize and advertise auto-negotiation parameters
2139 * @phydev: target phy_device struct
2140 *
2141 * Description: Writes MII_ADVERTISE with the appropriate values,
2142 * after sanitizing the values to make sure we only advertise
2143 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
2144 * hasn't changed, and > 0 if it has changed. This function is intended
2145 * for Clause 37 1000Base-X mode.
2146 */
2147static int genphy_c37_config_advert(struct phy_device *phydev)
2148{
2149 u16 adv = 0;
2150
2151 /* Only allow advertising what this PHY supports */
2152 linkmode_and(phydev->advertising, phydev->advertising,
2153 phydev->supported);
2154
2155 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
2156 phydev->advertising))
2157 adv |= ADVERTISE_1000XFULL;
2158 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
2159 phydev->advertising))
2160 adv |= ADVERTISE_1000XPAUSE;
2161 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
2162 phydev->advertising))
2163 adv |= ADVERTISE_1000XPSE_ASYM;
2164
2165 return phy_modify_changed(phydev, MII_ADVERTISE,
2166 ADVERTISE_1000XFULL | ADVERTISE_1000XPAUSE |
2167 ADVERTISE_1000XHALF | ADVERTISE_1000XPSE_ASYM,
2168 adv);
2169}
2170
d853d145 2171/**
2172 * genphy_config_eee_advert - disable unwanted eee mode advertisement
2173 * @phydev: target phy_device struct
2174 *
2175 * Description: Writes MDIO_AN_EEE_ADV after disabling unsupported energy
2176 * efficent ethernet modes. Returns 0 if the PHY's advertisement hasn't
2177 * changed, and 1 if it has changed.
2178 */
cd34499c 2179int genphy_config_eee_advert(struct phy_device *phydev)
d853d145 2180{
9f771f1f 2181 int err;
d853d145 2182
2183 /* Nothing to disable */
9f771f1f 2184 if (!phydev->eee_broken_modes)
d853d145 2185 return 0;
2186
9f771f1f
HK
2187 err = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV,
2188 phydev->eee_broken_modes, 0);
2189 /* If the call failed, we assume that EEE is not supported */
2190 return err < 0 ? 0 : err;
d853d145 2191}
cd34499c 2192EXPORT_SYMBOL(genphy_config_eee_advert);
d853d145 2193
b3df0da8
RD
2194/**
2195 * genphy_setup_forced - configures/forces speed/duplex from @phydev
2196 * @phydev: target phy_device struct
00db8189 2197 *
b3df0da8 2198 * Description: Configures MII_BMCR to force speed/duplex
00db8189 2199 * to the values in phydev. Assumes that the values are valid.
b3df0da8
RD
2200 * Please see phy_sanitize_settings().
2201 */
3fb69bca 2202int genphy_setup_forced(struct phy_device *phydev)
00db8189 2203{
f28a602b 2204 u16 ctl;
00db8189 2205
2f53e904
SS
2206 phydev->pause = 0;
2207 phydev->asym_pause = 0;
00db8189 2208
f28a602b 2209 ctl = mii_bmcr_encode_fixed(phydev->speed, phydev->duplex);
e109374f 2210
fea23fb5 2211 return phy_modify(phydev, MII_BMCR,
18a5b052 2212 ~(BMCR_LOOPBACK | BMCR_ISOLATE | BMCR_PDOWN), ctl);
00db8189 2213}
3fb69bca 2214EXPORT_SYMBOL(genphy_setup_forced);
00db8189 2215
bdbdac76
OR
2216static int genphy_setup_master_slave(struct phy_device *phydev)
2217{
2218 u16 ctl = 0;
2219
2220 if (!phydev->is_gigabit_capable)
2221 return 0;
2222
2223 switch (phydev->master_slave_set) {
2224 case MASTER_SLAVE_CFG_MASTER_PREFERRED:
2225 ctl |= CTL1000_PREFER_MASTER;
2226 break;
2227 case MASTER_SLAVE_CFG_SLAVE_PREFERRED:
2228 break;
2229 case MASTER_SLAVE_CFG_MASTER_FORCE:
2230 ctl |= CTL1000_AS_MASTER;
df561f66 2231 fallthrough;
bdbdac76
OR
2232 case MASTER_SLAVE_CFG_SLAVE_FORCE:
2233 ctl |= CTL1000_ENABLE_MASTER;
2234 break;
2235 case MASTER_SLAVE_CFG_UNKNOWN:
2236 case MASTER_SLAVE_CFG_UNSUPPORTED:
2237 return 0;
2238 default:
2239 phydev_warn(phydev, "Unsupported Master/Slave mode\n");
2240 return -EOPNOTSUPP;
2241 }
2242
2243 return phy_modify_changed(phydev, MII_CTRL1000,
2244 (CTL1000_ENABLE_MASTER | CTL1000_AS_MASTER |
2245 CTL1000_PREFER_MASTER), ctl);
2246}
2247
64807c23 2248int genphy_read_master_slave(struct phy_device *phydev)
bdbdac76
OR
2249{
2250 int cfg, state;
3a13f98b 2251 int val;
bdbdac76 2252
bdbdac76
OR
2253 phydev->master_slave_get = MASTER_SLAVE_CFG_UNKNOWN;
2254 phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN;
2255
2256 val = phy_read(phydev, MII_CTRL1000);
2257 if (val < 0)
2258 return val;
2259
2260 if (val & CTL1000_ENABLE_MASTER) {
2261 if (val & CTL1000_AS_MASTER)
2262 cfg = MASTER_SLAVE_CFG_MASTER_FORCE;
2263 else
2264 cfg = MASTER_SLAVE_CFG_SLAVE_FORCE;
2265 } else {
2266 if (val & CTL1000_PREFER_MASTER)
2267 cfg = MASTER_SLAVE_CFG_MASTER_PREFERRED;
2268 else
2269 cfg = MASTER_SLAVE_CFG_SLAVE_PREFERRED;
2270 }
2271
2272 val = phy_read(phydev, MII_STAT1000);
2273 if (val < 0)
2274 return val;
2275
2276 if (val & LPA_1000MSFAIL) {
2277 state = MASTER_SLAVE_STATE_ERR;
2278 } else if (phydev->link) {
2279 /* this bits are valid only for active link */
2280 if (val & LPA_1000MSRES)
2281 state = MASTER_SLAVE_STATE_MASTER;
2282 else
2283 state = MASTER_SLAVE_STATE_SLAVE;
2284 } else {
2285 state = MASTER_SLAVE_STATE_UNKNOWN;
2286 }
2287
2288 phydev->master_slave_get = cfg;
2289 phydev->master_slave_state = state;
2290
2291 return 0;
2292}
64807c23 2293EXPORT_SYMBOL(genphy_read_master_slave);
bdbdac76 2294
b3df0da8
RD
2295/**
2296 * genphy_restart_aneg - Enable and Restart Autonegotiation
2297 * @phydev: target phy_device struct
2298 */
00db8189
AF
2299int genphy_restart_aneg(struct phy_device *phydev)
2300{
00db8189 2301 /* Don't isolate the PHY if we're negotiating */
f102852f 2302 return phy_modify(phydev, MII_BMCR, BMCR_ISOLATE,
fea23fb5 2303 BMCR_ANENABLE | BMCR_ANRESTART);
00db8189 2304}
892871dc 2305EXPORT_SYMBOL(genphy_restart_aneg);
00db8189 2306
2a10ab04
RK
2307/**
2308 * genphy_check_and_restart_aneg - Enable and restart auto-negotiation
2309 * @phydev: target phy_device struct
2310 * @restart: whether aneg restart is requested
2311 *
2312 * Check, and restart auto-negotiation if needed.
2313 */
2314int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart)
2315{
4f31c532 2316 int ret;
2a10ab04
RK
2317
2318 if (!restart) {
2319 /* Advertisement hasn't changed, but maybe aneg was never on to
2320 * begin with? Or maybe phy was isolated?
2321 */
2322 ret = phy_read(phydev, MII_BMCR);
2323 if (ret < 0)
2324 return ret;
2325
2326 if (!(ret & BMCR_ANENABLE) || (ret & BMCR_ISOLATE))
2327 restart = true;
2328 }
2329
2330 if (restart)
4f31c532 2331 return genphy_restart_aneg(phydev);
2a10ab04 2332
4f31c532 2333 return 0;
2a10ab04
RK
2334}
2335EXPORT_SYMBOL(genphy_check_and_restart_aneg);
2336
b3df0da8 2337/**
f4069cd7 2338 * __genphy_config_aneg - restart auto-negotiation or write BMCR
b3df0da8 2339 * @phydev: target phy_device struct
f4069cd7 2340 * @changed: whether autoneg is requested
00db8189 2341 *
b3df0da8 2342 * Description: If auto-negotiation is enabled, we configure the
00db8189 2343 * advertising, and then restart auto-negotiation. If it is not
b3df0da8 2344 * enabled, then we write the BMCR.
00db8189 2345 */
f4069cd7 2346int __genphy_config_aneg(struct phy_device *phydev, bool changed)
00db8189 2347{
f4069cd7 2348 int err;
d853d145 2349
b6478b8c 2350 err = genphy_c45_an_config_eee_aneg(phydev);
9b01c885
OR
2351 if (err < 0)
2352 return err;
2353 else if (err)
f4069cd7 2354 changed = true;
00db8189 2355
bdbdac76
OR
2356 err = genphy_setup_master_slave(phydev);
2357 if (err < 0)
2358 return err;
2359 else if (err)
2360 changed = true;
2361
de339c2a
TP
2362 if (AUTONEG_ENABLE != phydev->autoneg)
2363 return genphy_setup_forced(phydev);
00db8189 2364
d853d145 2365 err = genphy_config_advert(phydev);
2366 if (err < 0) /* error */
2367 return err;
f4069cd7
HK
2368 else if (err)
2369 changed = true;
d853d145 2370
2a10ab04 2371 return genphy_check_and_restart_aneg(phydev, changed);
00db8189 2372}
f4069cd7 2373EXPORT_SYMBOL(__genphy_config_aneg);
00db8189 2374
fa6e98ce
HK
2375/**
2376 * genphy_c37_config_aneg - restart auto-negotiation or write BMCR
2377 * @phydev: target phy_device struct
2378 *
2379 * Description: If auto-negotiation is enabled, we configure the
2380 * advertising, and then restart auto-negotiation. If it is not
2381 * enabled, then we write the BMCR. This function is intended
2382 * for use with Clause 37 1000Base-X mode.
2383 */
2384int genphy_c37_config_aneg(struct phy_device *phydev)
2385{
2386 int err, changed;
2387
2388 if (phydev->autoneg != AUTONEG_ENABLE)
2389 return genphy_setup_forced(phydev);
2390
2391 err = phy_modify(phydev, MII_BMCR, BMCR_SPEED1000 | BMCR_SPEED100,
2392 BMCR_SPEED1000);
2393 if (err)
2394 return err;
2395
2396 changed = genphy_c37_config_advert(phydev);
2397 if (changed < 0) /* error */
2398 return changed;
2399
2400 if (!changed) {
2401 /* Advertisement hasn't changed, but maybe aneg was never on to
2402 * begin with? Or maybe phy was isolated?
2403 */
2404 int ctl = phy_read(phydev, MII_BMCR);
2405
2406 if (ctl < 0)
2407 return ctl;
2408
2409 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
2410 changed = 1; /* do restart aneg */
2411 }
2412
2413 /* Only restart aneg if we are advertising something different
2414 * than we were before.
2415 */
2416 if (changed > 0)
2417 return genphy_restart_aneg(phydev);
2418
2419 return 0;
2420}
2421EXPORT_SYMBOL(genphy_c37_config_aneg);
2422
a9fa6e6a
FF
2423/**
2424 * genphy_aneg_done - return auto-negotiation status
2425 * @phydev: target phy_device struct
2426 *
2427 * Description: Reads the status register and returns 0 either if
2428 * auto-negotiation is incomplete, or if there was an error.
2429 * Returns BMSR_ANEGCOMPLETE if auto-negotiation is done.
2430 */
2431int genphy_aneg_done(struct phy_device *phydev)
2432{
2433 int retval = phy_read(phydev, MII_BMSR);
2434
2435 return (retval < 0) ? retval : (retval & BMSR_ANEGCOMPLETE);
2436}
2437EXPORT_SYMBOL(genphy_aneg_done);
2438
b3df0da8
RD
2439/**
2440 * genphy_update_link - update link status in @phydev
2441 * @phydev: target phy_device struct
00db8189 2442 *
b3df0da8 2443 * Description: Update the value in phydev->link to reflect the
00db8189 2444 * current link value. In order to do this, we need to read
b3df0da8 2445 * the status register twice, keeping the second value.
00db8189
AF
2446 */
2447int genphy_update_link(struct phy_device *phydev)
2448{
c36757eb
HK
2449 int status = 0, bmcr;
2450
2451 bmcr = phy_read(phydev, MII_BMCR);
2452 if (bmcr < 0)
2453 return bmcr;
2454
2455 /* Autoneg is being started, therefore disregard BMSR value and
2456 * report link as down.
2457 */
2458 if (bmcr & BMCR_ANRESTART)
2459 goto done;
00db8189 2460
93c09704
HK
2461 /* The link state is latched low so that momentary link
2462 * drops can be detected. Do not double-read the status
e96bd2d3
PO
2463 * in polling mode to detect such short link drops except
2464 * the link was already down.
93c09704 2465 */
e96bd2d3 2466 if (!phy_polling_mode(phydev) || !phydev->link) {
93c09704 2467 status = phy_read(phydev, MII_BMSR);
b7f29f8c 2468 if (status < 0)
93c09704 2469 return status;
b7f29f8c
HK
2470 else if (status & BMSR_LSTATUS)
2471 goto done;
93c09704 2472 }
00db8189
AF
2473
2474 /* Read link and autonegotiation status */
2475 status = phy_read(phydev, MII_BMSR);
00db8189
AF
2476 if (status < 0)
2477 return status;
b7f29f8c 2478done:
4950c2ba
HK
2479 phydev->link = status & BMSR_LSTATUS ? 1 : 0;
2480 phydev->autoneg_complete = status & BMSR_ANEGCOMPLETE ? 1 : 0;
00db8189 2481
aa6b1956
HK
2482 /* Consider the case that autoneg was started and "aneg complete"
2483 * bit has been reset, but "link up" bit not yet.
2484 */
2485 if (phydev->autoneg == AUTONEG_ENABLE && !phydev->autoneg_complete)
2486 phydev->link = 0;
2487
00db8189
AF
2488 return 0;
2489}
6b655529 2490EXPORT_SYMBOL(genphy_update_link);
00db8189 2491
8d3dc3ac 2492int genphy_read_lpa(struct phy_device *phydev)
00db8189 2493{
8d3dc3ac 2494 int lpa, lpagb;
b6163f19 2495
3de5ae54
YL
2496 if (phydev->autoneg == AUTONEG_ENABLE) {
2497 if (!phydev->autoneg_complete) {
2498 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising,
2499 0);
2500 mii_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
2501 return 0;
2502 }
2503
3b8b11f9 2504 if (phydev->is_gigabit_capable) {
00db8189 2505 lpagb = phy_read(phydev, MII_STAT1000);
00db8189
AF
2506 if (lpagb < 0)
2507 return lpagb;
2508
b8f8c8eb 2509 if (lpagb & LPA_1000MSFAIL) {
916e571e
HK
2510 int adv = phy_read(phydev, MII_CTRL1000);
2511
2512 if (adv < 0)
2513 return adv;
2514
b8f8c8eb
HK
2515 if (adv & CTL1000_ENABLE_MASTER)
2516 phydev_err(phydev, "Master/Slave resolution failed, maybe conflicting manual settings?\n");
2517 else
2518 phydev_err(phydev, "Master/Slave resolution failed\n");
2519 return -ENOLINK;
2520 }
2521
78a24df3
AL
2522 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising,
2523 lpagb);
00db8189
AF
2524 }
2525
2526 lpa = phy_read(phydev, MII_LPA);
00db8189
AF
2527 if (lpa < 0)
2528 return lpa;
2529
d3351931 2530 mii_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
3de5ae54
YL
2531 } else {
2532 linkmode_zero(phydev->lp_advertising);
8d3dc3ac
RK
2533 }
2534
2535 return 0;
2536}
2537EXPORT_SYMBOL(genphy_read_lpa);
2538
0efc286a
RK
2539/**
2540 * genphy_read_status_fixed - read the link parameters for !aneg mode
2541 * @phydev: target phy_device struct
2542 *
2543 * Read the current duplex and speed state for a PHY operating with
2544 * autonegotiation disabled.
2545 */
2546int genphy_read_status_fixed(struct phy_device *phydev)
2547{
2548 int bmcr = phy_read(phydev, MII_BMCR);
2549
2550 if (bmcr < 0)
2551 return bmcr;
2552
2553 if (bmcr & BMCR_FULLDPLX)
2554 phydev->duplex = DUPLEX_FULL;
2555 else
2556 phydev->duplex = DUPLEX_HALF;
2557
2558 if (bmcr & BMCR_SPEED1000)
2559 phydev->speed = SPEED_1000;
2560 else if (bmcr & BMCR_SPEED100)
2561 phydev->speed = SPEED_100;
2562 else
2563 phydev->speed = SPEED_10;
2564
2565 return 0;
2566}
2567EXPORT_SYMBOL(genphy_read_status_fixed);
2568
8d3dc3ac
RK
2569/**
2570 * genphy_read_status - check the link status and update current link state
2571 * @phydev: target phy_device struct
2572 *
2573 * Description: Check the link, then figure out the current state
2574 * by comparing what we advertise with what the link partner
2575 * advertises. Start by checking the gigabit possibilities,
2576 * then move on to 10/100.
2577 */
2578int genphy_read_status(struct phy_device *phydev)
2579{
2580 int err, old_link = phydev->link;
2581
2582 /* Update the link, but return if there was an error */
2583 err = genphy_update_link(phydev);
2584 if (err)
2585 return err;
2586
2587 /* why bother the PHY if nothing can have changed */
2588 if (phydev->autoneg == AUTONEG_ENABLE && old_link && phydev->link)
2589 return 0;
2590
64807c23
AR
2591 phydev->master_slave_get = MASTER_SLAVE_CFG_UNSUPPORTED;
2592 phydev->master_slave_state = MASTER_SLAVE_STATE_UNSUPPORTED;
8d3dc3ac
RK
2593 phydev->speed = SPEED_UNKNOWN;
2594 phydev->duplex = DUPLEX_UNKNOWN;
2595 phydev->pause = 0;
2596 phydev->asym_pause = 0;
2597
64807c23
AR
2598 if (phydev->is_gigabit_capable) {
2599 err = genphy_read_master_slave(phydev);
2600 if (err < 0)
2601 return err;
2602 }
bdbdac76 2603
8d3dc3ac
RK
2604 err = genphy_read_lpa(phydev);
2605 if (err < 0)
2606 return err;
2607
2608 if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) {
5502b218 2609 phy_resolve_aneg_linkmode(phydev);
b6163f19 2610 } else if (phydev->autoneg == AUTONEG_DISABLE) {
0efc286a
RK
2611 err = genphy_read_status_fixed(phydev);
2612 if (err < 0)
2613 return err;
00db8189
AF
2614 }
2615
2616 return 0;
2617}
2618EXPORT_SYMBOL(genphy_read_status);
2619
fa6e98ce
HK
2620/**
2621 * genphy_c37_read_status - check the link status and update current link state
2622 * @phydev: target phy_device struct
9b1d5e05 2623 * @changed: pointer where to store if link changed
fa6e98ce
HK
2624 *
2625 * Description: Check the link, then figure out the current state
2626 * by comparing what we advertise with what the link partner
2627 * advertises. This function is for Clause 37 1000Base-X mode.
9b1d5e05
CM
2628 *
2629 * If link has changed, @changed is set to true, false otherwise.
fa6e98ce 2630 */
9b1d5e05 2631int genphy_c37_read_status(struct phy_device *phydev, bool *changed)
fa6e98ce
HK
2632{
2633 int lpa, err, old_link = phydev->link;
2634
2635 /* Update the link, but return if there was an error */
2636 err = genphy_update_link(phydev);
2637 if (err)
2638 return err;
2639
2640 /* why bother the PHY if nothing can have changed */
9b1d5e05
CM
2641 if (phydev->autoneg == AUTONEG_ENABLE && old_link && phydev->link) {
2642 *changed = false;
fa6e98ce 2643 return 0;
9b1d5e05 2644 }
fa6e98ce 2645
9b1d5e05
CM
2646 /* Signal link has changed */
2647 *changed = true;
fa6e98ce
HK
2648 phydev->duplex = DUPLEX_UNKNOWN;
2649 phydev->pause = 0;
2650 phydev->asym_pause = 0;
2651
2652 if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) {
2653 lpa = phy_read(phydev, MII_LPA);
2654 if (lpa < 0)
2655 return lpa;
2656
2657 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2658 phydev->lp_advertising, lpa & LPA_LPACK);
2659 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
2660 phydev->lp_advertising, lpa & LPA_1000XFULL);
2661 linkmode_mod_bit(ETHTOOL_LINK_MODE_Pause_BIT,
2662 phydev->lp_advertising, lpa & LPA_1000XPAUSE);
2663 linkmode_mod_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
2664 phydev->lp_advertising,
2665 lpa & LPA_1000XPAUSE_ASYM);
2666
2667 phy_resolve_aneg_linkmode(phydev);
2668 } else if (phydev->autoneg == AUTONEG_DISABLE) {
2669 int bmcr = phy_read(phydev, MII_BMCR);
2670
2671 if (bmcr < 0)
2672 return bmcr;
2673
2674 if (bmcr & BMCR_FULLDPLX)
2675 phydev->duplex = DUPLEX_FULL;
2676 else
2677 phydev->duplex = DUPLEX_HALF;
2678 }
2679
2680 return 0;
2681}
2682EXPORT_SYMBOL(genphy_c37_read_status);
2683
797ac071
FF
2684/**
2685 * genphy_soft_reset - software reset the PHY via BMCR_RESET bit
2686 * @phydev: target phy_device struct
2687 *
2688 * Description: Perform a software PHY reset using the standard
2689 * BMCR_RESET bit and poll for the reset bit to be cleared.
2690 *
2691 * Returns: 0 on success, < 0 on failure
2692 */
2693int genphy_soft_reset(struct phy_device *phydev)
2694{
8c90b795 2695 u16 res = BMCR_RESET;
797ac071
FF
2696 int ret;
2697
8c90b795
HK
2698 if (phydev->autoneg == AUTONEG_ENABLE)
2699 res |= BMCR_ANRESTART;
2700
2701 ret = phy_modify(phydev, MII_BMCR, BMCR_ISOLATE, res);
797ac071
FF
2702 if (ret < 0)
2703 return ret;
2704
9576e9fa
HK
2705 /* Clause 22 states that setting bit BMCR_RESET sets control registers
2706 * to their default value. Therefore the POWER DOWN bit is supposed to
2707 * be cleared after soft reset.
2708 */
2709 phydev->suspended = 0;
2710
8c90b795
HK
2711 ret = phy_poll_reset(phydev);
2712 if (ret)
2713 return ret;
2714
2715 /* BMCR may be reset to defaults */
2716 if (phydev->autoneg == AUTONEG_DISABLE)
2717 ret = genphy_setup_forced(phydev);
2718
2719 return ret;
797ac071
FF
2720}
2721EXPORT_SYMBOL(genphy_soft_reset);
2722
87de1f05
IC
2723irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev)
2724{
2725 /* It seems there are cases where the interrupts are handled by another
2726 * entity (ie an IRQ controller embedded inside the PHY) and do not
2727 * need any other interraction from phylib. In this case, just trigger
2728 * the state machine directly.
2729 */
2730 phy_trigger_machine(phydev);
2731
2732 return 0;
2733}
2734EXPORT_SYMBOL(genphy_handle_interrupt_no_ack);
2735
045925e3
HK
2736/**
2737 * genphy_read_abilities - read PHY abilities from Clause 22 registers
2738 * @phydev: target phy_device struct
2739 *
2740 * Description: Reads the PHY's abilities and populates
2741 * phydev->supported accordingly.
2742 *
2743 * Returns: 0 on success, < 0 on failure
2744 */
2745int genphy_read_abilities(struct phy_device *phydev)
2746{
2747 int val;
2748
2749 linkmode_set_bit_array(phy_basic_ports_array,
2750 ARRAY_SIZE(phy_basic_ports_array),
2751 phydev->supported);
2752
2753 val = phy_read(phydev, MII_BMSR);
2754 if (val < 0)
2755 return val;
2756
2757 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported,
2758 val & BMSR_ANEGCAPABLE);
2759
2760 linkmode_mod_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, phydev->supported,
2761 val & BMSR_100FULL);
2762 linkmode_mod_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, phydev->supported,
2763 val & BMSR_100HALF);
2764 linkmode_mod_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, phydev->supported,
2765 val & BMSR_10FULL);
2766 linkmode_mod_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, phydev->supported,
2767 val & BMSR_10HALF);
2768
2769 if (val & BMSR_ESTATEN) {
2770 val = phy_read(phydev, MII_ESTATUS);
2771 if (val < 0)
2772 return val;
2773
2774 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
2775 phydev->supported, val & ESTATUS_1000_TFULL);
2776 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
2777 phydev->supported, val & ESTATUS_1000_THALF);
f30e33bc
RH
2778 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
2779 phydev->supported, val & ESTATUS_1000_XFULL);
045925e3
HK
2780 }
2781
9b01c885
OR
2782 /* This is optional functionality. If not supported, we may get an error
2783 * which should be ignored.
2784 */
2785 genphy_c45_read_eee_abilities(phydev);
2786
045925e3
HK
2787 return 0;
2788}
2789EXPORT_SYMBOL(genphy_read_abilities);
2790
5df7af85
KH
2791/* This is used for the phy device which doesn't support the MMD extended
2792 * register access, but it does have side effect when we are trying to access
2793 * the MMD register via indirect method.
2794 */
2795int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, u16 regnum)
2796{
2797 return -EOPNOTSUPP;
2798}
2799EXPORT_SYMBOL(genphy_read_mmd_unsupported);
2800
2801int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
2802 u16 regnum, u16 val)
2803{
2804 return -EOPNOTSUPP;
2805}
2806EXPORT_SYMBOL(genphy_write_mmd_unsupported);
2807
0f0ca340
GC
2808int genphy_suspend(struct phy_device *phydev)
2809{
032f4700 2810 return phy_set_bits(phydev, MII_BMCR, BMCR_PDOWN);
0f0ca340
GC
2811}
2812EXPORT_SYMBOL(genphy_suspend);
00db8189 2813
0f0ca340
GC
2814int genphy_resume(struct phy_device *phydev)
2815{
032f4700 2816 return phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN);
0f0ca340
GC
2817}
2818EXPORT_SYMBOL(genphy_resume);
00db8189 2819
f0f9b4ed
LYS
2820int genphy_loopback(struct phy_device *phydev, bool enable)
2821{
014068dc
OR
2822 if (enable) {
2823 u16 val, ctl = BMCR_LOOPBACK;
2824 int ret;
2825
f28a602b 2826 ctl |= mii_bmcr_encode_fixed(phydev->speed, phydev->duplex);
014068dc
OR
2827
2828 phy_modify(phydev, MII_BMCR, ~0, ctl);
2829
2830 ret = phy_read_poll_timeout(phydev, MII_BMSR, val,
2831 val & BMSR_LSTATUS,
2832 5000, 500000, true);
2833 if (ret)
2834 return ret;
2835 } else {
2836 phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0);
2837
2838 phy_config_aneg(phydev);
2839 }
2840
2841 return 0;
f0f9b4ed
LYS
2842}
2843EXPORT_SYMBOL(genphy_loopback);
2844
41124fa6
AL
2845/**
2846 * phy_remove_link_mode - Remove a supported link mode
2847 * @phydev: phy_device structure to remove link mode from
2848 * @link_mode: Link mode to be removed
2849 *
2850 * Description: Some MACs don't support all link modes which the PHY
2851 * does. e.g. a 1G MAC often does not support 1000Half. Add a helper
2852 * to remove a link mode.
2853 */
2854void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode)
2855{
3c1bcc86 2856 linkmode_clear_bit(link_mode, phydev->supported);
22c0ef6b 2857 phy_advertise_supported(phydev);
41124fa6
AL
2858}
2859EXPORT_SYMBOL(phy_remove_link_mode);
2860
22c0ef6b
HK
2861static void phy_copy_pause_bits(unsigned long *dst, unsigned long *src)
2862{
2863 linkmode_mod_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, dst,
2864 linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, src));
2865 linkmode_mod_bit(ETHTOOL_LINK_MODE_Pause_BIT, dst,
2866 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, src));
2867}
2868
2869/**
2870 * phy_advertise_supported - Advertise all supported modes
2871 * @phydev: target phy_device struct
2872 *
2873 * Description: Called to advertise all supported modes, doesn't touch
2874 * pause mode advertising.
2875 */
2876void phy_advertise_supported(struct phy_device *phydev)
2877{
2878 __ETHTOOL_DECLARE_LINK_MODE_MASK(new);
2879
2880 linkmode_copy(new, phydev->supported);
2881 phy_copy_pause_bits(new, phydev->advertising);
2882 linkmode_copy(phydev->advertising, new);
2883}
2884EXPORT_SYMBOL(phy_advertise_supported);
2885
b6469127
HK
2886/**
2887 * phy_advertise_eee_all - Advertise all supported EEE modes
2888 * @phydev: target phy_device struct
2889 *
2890 * Description: Per default phylib preserves the EEE advertising at the time of
2891 * phy probing, which might be a subset of the supported EEE modes. Use this
2892 * function when all supported EEE modes should be advertised. This does not
2893 * trigger auto-negotiation, so must be called before phy_start()/
2894 * phylink_start() which will start auto-negotiation.
2895 */
2896void phy_advertise_eee_all(struct phy_device *phydev)
2897{
2898 linkmode_copy(phydev->advertising_eee, phydev->supported_eee);
2899}
2900EXPORT_SYMBOL_GPL(phy_advertise_eee_all);
2901
c306ad36
AL
2902/**
2903 * phy_support_sym_pause - Enable support of symmetrical pause
2904 * @phydev: target phy_device struct
2905 *
2906 * Description: Called by the MAC to indicate is supports symmetrical
2907 * Pause, but not asym pause.
2908 */
2909void phy_support_sym_pause(struct phy_device *phydev)
2910{
3c1bcc86 2911 linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, phydev->supported);
22c0ef6b 2912 phy_copy_pause_bits(phydev->advertising, phydev->supported);
c306ad36
AL
2913}
2914EXPORT_SYMBOL(phy_support_sym_pause);
2915
af8d9bb2
AL
2916/**
2917 * phy_support_asym_pause - Enable support of asym pause
2918 * @phydev: target phy_device struct
2919 *
2920 * Description: Called by the MAC to indicate is supports Asym Pause.
2921 */
2922void phy_support_asym_pause(struct phy_device *phydev)
2923{
22c0ef6b 2924 phy_copy_pause_bits(phydev->advertising, phydev->supported);
af8d9bb2
AL
2925}
2926EXPORT_SYMBOL(phy_support_asym_pause);
2927
0c122405
AL
2928/**
2929 * phy_set_sym_pause - Configure symmetric Pause
2930 * @phydev: target phy_device struct
2931 * @rx: Receiver Pause is supported
2932 * @tx: Transmit Pause is supported
2933 * @autoneg: Auto neg should be used
2934 *
2935 * Description: Configure advertised Pause support depending on if
2936 * receiver pause and pause auto neg is supported. Generally called
2937 * from the set_pauseparam .ndo.
2938 */
2939void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
2940 bool autoneg)
2941{
3c1bcc86 2942 linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT, phydev->supported);
0c122405
AL
2943
2944 if (rx && tx && autoneg)
3c1bcc86
AL
2945 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
2946 phydev->supported);
0c122405 2947
3c1bcc86 2948 linkmode_copy(phydev->advertising, phydev->supported);
0c122405
AL
2949}
2950EXPORT_SYMBOL(phy_set_sym_pause);
2951
70814e81
AL
2952/**
2953 * phy_set_asym_pause - Configure Pause and Asym Pause
2954 * @phydev: target phy_device struct
2955 * @rx: Receiver Pause is supported
2956 * @tx: Transmit Pause is supported
2957 *
2958 * Description: Configure advertised Pause support depending on if
2959 * transmit and receiver pause is supported. If there has been a
2960 * change in adverting, trigger a new autoneg. Generally called from
2961 * the set_pauseparam .ndo.
2962 */
2963void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx)
2964{
3c1bcc86 2965 __ETHTOOL_DECLARE_LINK_MODE_MASK(oldadv);
70814e81 2966
3c1bcc86 2967 linkmode_copy(oldadv, phydev->advertising);
45c767fa 2968 linkmode_set_pause(phydev->advertising, tx, rx);
3c1bcc86
AL
2969
2970 if (!linkmode_equal(oldadv, phydev->advertising) &&
2971 phydev->autoneg)
2972 phy_start_aneg(phydev);
70814e81
AL
2973}
2974EXPORT_SYMBOL(phy_set_asym_pause);
2975
22b7d299
AL
2976/**
2977 * phy_validate_pause - Test if the PHY/MAC support the pause configuration
2978 * @phydev: phy_device struct
2979 * @pp: requested pause configuration
2980 *
2981 * Description: Test if the PHY/MAC combination supports the Pause
2982 * configuration the user is requesting. Returns True if it is
2983 * supported, false otherwise.
2984 */
2985bool phy_validate_pause(struct phy_device *phydev,
2986 struct ethtool_pauseparam *pp)
2987{
3c1bcc86 2988 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
b4010af9 2989 phydev->supported) && pp->rx_pause)
22b7d299 2990 return false;
b4010af9
HK
2991
2992 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
2993 phydev->supported) &&
2994 pp->rx_pause != pp->tx_pause)
2995 return false;
2996
22b7d299
AL
2997 return true;
2998}
2999EXPORT_SYMBOL(phy_validate_pause);
3000
a87ae8a9
RK
3001/**
3002 * phy_get_pause - resolve negotiated pause modes
3003 * @phydev: phy_device struct
3004 * @tx_pause: pointer to bool to indicate whether transmit pause should be
3005 * enabled.
3006 * @rx_pause: pointer to bool to indicate whether receive pause should be
3007 * enabled.
3008 *
3009 * Resolve and return the flow control modes according to the negotiation
3010 * result. This includes checking that we are operating in full duplex mode.
3011 * See linkmode_resolve_pause() for further details.
3012 */
3013void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause)
3014{
3015 if (phydev->duplex != DUPLEX_FULL) {
3016 *tx_pause = false;
3017 *rx_pause = false;
3018 return;
3019 }
3020
3021 return linkmode_resolve_pause(phydev->advertising,
3022 phydev->lp_advertising,
3023 tx_pause, rx_pause);
3024}
3025EXPORT_SYMBOL(phy_get_pause);
3026
92252eec
DM
3027#if IS_ENABLED(CONFIG_OF_MDIO)
3028static int phy_get_int_delay_property(struct device *dev, const char *name)
3029{
3030 s32 int_delay;
3031 int ret;
3032
3033 ret = device_property_read_u32(dev, name, &int_delay);
3034 if (ret)
3035 return ret;
3036
3037 return int_delay;
3038}
3039#else
3040static int phy_get_int_delay_property(struct device *dev, const char *name)
3041{
3042 return -EINVAL;
3043}
3044#endif
3045
3046/**
69280228 3047 * phy_get_internal_delay - returns the index of the internal delay
92252eec
DM
3048 * @phydev: phy_device struct
3049 * @dev: pointer to the devices device struct
3050 * @delay_values: array of delays the PHY supports
3051 * @size: the size of the delay array
3052 * @is_rx: boolean to indicate to get the rx internal delay
3053 *
3054 * Returns the index within the array of internal delay passed in.
3055 * If the device property is not present then the interface type is checked
3056 * if the interface defines use of internal delay then a 1 is returned otherwise
3057 * a 0 is returned.
3058 * The array must be in ascending order. If PHY does not have an ascending order
3059 * array then size = 0 and the value of the delay property is returned.
3060 * Return -EINVAL if the delay is invalid or cannot be found.
3061 */
3062s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
3063 const int *delay_values, int size, bool is_rx)
3064{
3065 s32 delay;
3066 int i;
3067
3068 if (is_rx) {
3069 delay = phy_get_int_delay_property(dev, "rx-internal-delay-ps");
3070 if (delay < 0 && size == 0) {
3071 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
3072 phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
3073 return 1;
3074 else
3075 return 0;
3076 }
3077
3078 } else {
3079 delay = phy_get_int_delay_property(dev, "tx-internal-delay-ps");
3080 if (delay < 0 && size == 0) {
3081 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
3082 phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
3083 return 1;
3084 else
3085 return 0;
3086 }
3087 }
3088
3089 if (delay < 0)
3090 return delay;
3091
3092 if (delay && size == 0)
3093 return delay;
3094
3095 if (delay < delay_values[0] || delay > delay_values[size - 1]) {
3096 phydev_err(phydev, "Delay %d is out of range\n", delay);
3097 return -EINVAL;
3098 }
3099
3100 if (delay == delay_values[0])
3101 return 0;
3102
3103 for (i = 1; i < size; i++) {
3104 if (delay == delay_values[i])
3105 return i;
3106
3107 /* Find an approximate index by looking up the table */
3108 if (delay > delay_values[i - 1] &&
3109 delay < delay_values[i]) {
3110 if (delay - delay_values[i - 1] <
3111 delay_values[i] - delay)
3112 return i - 1;
3113 else
3114 return i;
3115 }
3116 }
3117
3118 phydev_err(phydev, "error finding internal delay index for %d\n",
3119 delay);
3120
3121 return -EINVAL;
3122}
3123EXPORT_SYMBOL(phy_get_internal_delay);
3124
01e5b728
AL
3125static int phy_led_set_brightness(struct led_classdev *led_cdev,
3126 enum led_brightness value)
3127{
68481818
AL
3128 struct phy_led *phyled = to_phy_led(led_cdev);
3129 struct phy_device *phydev = phyled->phydev;
3130 int err;
3131
3132 mutex_lock(&phydev->lock);
3133 err = phydev->drv->led_brightness_set(phydev, phyled->index, value);
3134 mutex_unlock(&phydev->lock);
3135
3136 return err;
01e5b728
AL
3137}
3138
4e901018
AL
3139static int phy_led_blink_set(struct led_classdev *led_cdev,
3140 unsigned long *delay_on,
3141 unsigned long *delay_off)
3142{
3143 struct phy_led *phyled = to_phy_led(led_cdev);
3144 struct phy_device *phydev = phyled->phydev;
3145 int err;
3146
3147 mutex_lock(&phydev->lock);
3148 err = phydev->drv->led_blink_set(phydev, phyled->index,
3149 delay_on, delay_off);
3150 mutex_unlock(&phydev->lock);
3151
3152 return err;
3153}
3154
1dcc03c9
AL
3155static __maybe_unused struct device *
3156phy_led_hw_control_get_device(struct led_classdev *led_cdev)
3157{
3158 struct phy_led *phyled = to_phy_led(led_cdev);
3159 struct phy_device *phydev = phyled->phydev;
3160
3161 if (phydev->attached_dev)
3162 return &phydev->attached_dev->dev;
3163 return NULL;
3164}
3165
3166static int __maybe_unused
3167phy_led_hw_control_get(struct led_classdev *led_cdev,
3168 unsigned long *rules)
3169{
3170 struct phy_led *phyled = to_phy_led(led_cdev);
3171 struct phy_device *phydev = phyled->phydev;
3172 int err;
3173
3174 mutex_lock(&phydev->lock);
3175 err = phydev->drv->led_hw_control_get(phydev, phyled->index, rules);
3176 mutex_unlock(&phydev->lock);
3177
3178 return err;
3179}
3180
3181static int __maybe_unused
3182phy_led_hw_control_set(struct led_classdev *led_cdev,
3183 unsigned long rules)
3184{
3185 struct phy_led *phyled = to_phy_led(led_cdev);
3186 struct phy_device *phydev = phyled->phydev;
3187 int err;
3188
3189 mutex_lock(&phydev->lock);
3190 err = phydev->drv->led_hw_control_set(phydev, phyled->index, rules);
3191 mutex_unlock(&phydev->lock);
3192
3193 return err;
3194}
3195
3196static __maybe_unused int phy_led_hw_is_supported(struct led_classdev *led_cdev,
3197 unsigned long rules)
3198{
3199 struct phy_led *phyled = to_phy_led(led_cdev);
3200 struct phy_device *phydev = phyled->phydev;
3201 int err;
3202
3203 mutex_lock(&phydev->lock);
3204 err = phydev->drv->led_hw_is_supported(phydev, phyled->index, rules);
3205 mutex_unlock(&phydev->lock);
3206
3207 return err;
3208}
3209
c938ab4d
AL
3210static void phy_leds_unregister(struct phy_device *phydev)
3211{
3212 struct phy_led *phyled;
3213
3214 list_for_each_entry(phyled, &phydev->leds, list) {
3215 led_classdev_unregister(&phyled->led_cdev);
3216 }
3217}
3218
01e5b728
AL
3219static int of_phy_led(struct phy_device *phydev,
3220 struct device_node *led)
3221{
3222 struct device *dev = &phydev->mdio.dev;
3223 struct led_init_data init_data = {};
3224 struct led_classdev *cdev;
7ae215ee 3225 unsigned long modes = 0;
01e5b728 3226 struct phy_led *phyled;
aed8fdad 3227 u32 index;
01e5b728
AL
3228 int err;
3229
3230 phyled = devm_kzalloc(dev, sizeof(*phyled), GFP_KERNEL);
3231 if (!phyled)
3232 return -ENOMEM;
3233
3234 cdev = &phyled->led_cdev;
68481818 3235 phyled->phydev = phydev;
01e5b728 3236
aed8fdad 3237 err = of_property_read_u32(led, "reg", &index);
01e5b728
AL
3238 if (err)
3239 return err;
aed8fdad
AS
3240 if (index > U8_MAX)
3241 return -EINVAL;
01e5b728 3242
7ae215ee
CM
3243 if (of_property_read_bool(led, "active-low"))
3244 set_bit(PHY_LED_ACTIVE_LOW, &modes);
3245 if (of_property_read_bool(led, "inactive-high-impedance"))
3246 set_bit(PHY_LED_INACTIVE_HIGH_IMPEDANCE, &modes);
3247
3248 if (modes) {
3249 /* Return error if asked to set polarity modes but not supported */
3250 if (!phydev->drv->led_polarity_set)
3251 return -EINVAL;
3252
3253 err = phydev->drv->led_polarity_set(phydev, index, modes);
3254 if (err)
3255 return err;
3256 }
3257
aed8fdad 3258 phyled->index = index;
68481818
AL
3259 if (phydev->drv->led_brightness_set)
3260 cdev->brightness_set_blocking = phy_led_set_brightness;
4e901018
AL
3261 if (phydev->drv->led_blink_set)
3262 cdev->blink_set = phy_led_blink_set;
1dcc03c9
AL
3263
3264#ifdef CONFIG_LEDS_TRIGGERS
3265 if (phydev->drv->led_hw_is_supported &&
3266 phydev->drv->led_hw_control_set &&
3267 phydev->drv->led_hw_control_get) {
3268 cdev->hw_control_is_supported = phy_led_hw_is_supported;
3269 cdev->hw_control_set = phy_led_hw_control_set;
3270 cdev->hw_control_get = phy_led_hw_control_get;
3271 cdev->hw_control_trigger = "netdev";
3272 }
3273
3274 cdev->hw_control_get_device = phy_led_hw_control_get_device;
3275#endif
01e5b728
AL
3276 cdev->max_brightness = 1;
3277 init_data.devicename = dev_name(&phydev->mdio.dev);
3278 init_data.fwnode = of_fwnode_handle(led);
3279 init_data.devname_mandatory = true;
3280
c938ab4d 3281 err = led_classdev_register_ext(dev, cdev, &init_data);
01e5b728
AL
3282 if (err)
3283 return err;
3284
3285 list_add(&phyled->list, &phydev->leds);
3286
3287 return 0;
3288}
3289
3290static int of_phy_leds(struct phy_device *phydev)
3291{
3292 struct device_node *node = phydev->mdio.dev.of_node;
3293 struct device_node *leds, *led;
3294 int err;
3295
3296 if (!IS_ENABLED(CONFIG_OF_MDIO))
3297 return 0;
3298
3299 if (!node)
3300 return 0;
3301
3302 leds = of_get_child_by_name(node, "leds");
3303 if (!leds)
3304 return 0;
3305
3306 for_each_available_child_of_node(leds, led) {
3307 err = of_phy_led(phydev, led);
3308 if (err) {
3309 of_node_put(led);
c938ab4d 3310 phy_leds_unregister(phydev);
01e5b728
AL
3311 return err;
3312 }
3313 }
3314
3315 return 0;
3316}
3317
0fb16976
CJ
3318/**
3319 * fwnode_mdio_find_device - Given a fwnode, find the mdio_device
3320 * @fwnode: pointer to the mdio_device's fwnode
3321 *
3322 * If successful, returns a pointer to the mdio_device with the embedded
3323 * struct device refcount incremented by one, or NULL on failure.
3324 * The caller should call put_device() on the mdio_device after its use.
3325 */
3326struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode)
3327{
3328 struct device *d;
3329
3330 if (!fwnode)
3331 return NULL;
3332
3333 d = bus_find_device_by_fwnode(&mdio_bus_type, fwnode);
3334 if (!d)
3335 return NULL;
3336
3337 return to_mdio_device(d);
3338}
3339EXPORT_SYMBOL(fwnode_mdio_find_device);
3340
425775ed
CJ
3341/**
3342 * fwnode_phy_find_device - For provided phy_fwnode, find phy_device.
3343 *
3344 * @phy_fwnode: Pointer to the phy's fwnode.
3345 *
3346 * If successful, returns a pointer to the phy_device with the embedded
3347 * struct device refcount incremented by one, or NULL on failure.
3348 */
3349struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode)
3350{
3351 struct mdio_device *mdiodev;
3352
3353 mdiodev = fwnode_mdio_find_device(phy_fwnode);
3354 if (!mdiodev)
3355 return NULL;
3356
3357 if (mdiodev->flags & MDIO_DEVICE_FLAG_PHY)
3358 return to_phy_device(&mdiodev->dev);
3359
3360 put_device(&mdiodev->dev);
3361
3362 return NULL;
3363}
3364EXPORT_SYMBOL(fwnode_phy_find_device);
3365
3366/**
3367 * device_phy_find_device - For the given device, get the phy_device
3368 * @dev: Pointer to the given device
3369 *
3370 * Refer return conditions of fwnode_phy_find_device().
3371 */
3372struct phy_device *device_phy_find_device(struct device *dev)
3373{
3374 return fwnode_phy_find_device(dev_fwnode(dev));
3375}
3376EXPORT_SYMBOL_GPL(device_phy_find_device);
3377
3378/**
3379 * fwnode_get_phy_node - Get the phy_node using the named reference.
3380 * @fwnode: Pointer to fwnode from which phy_node has to be obtained.
3381 *
3382 * Refer return conditions of fwnode_find_reference().
3383 * For ACPI, only "phy-handle" is supported. Legacy DT properties "phy"
3384 * and "phy-device" are not supported in ACPI. DT supports all the three
3385 * named references to the phy node.
3386 */
4a0faa02 3387struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode)
425775ed
CJ
3388{
3389 struct fwnode_handle *phy_node;
3390
3391 /* Only phy-handle is used for ACPI */
3392 phy_node = fwnode_find_reference(fwnode, "phy-handle", 0);
3393 if (is_acpi_node(fwnode) || !IS_ERR(phy_node))
3394 return phy_node;
3395 phy_node = fwnode_find_reference(fwnode, "phy", 0);
3396 if (IS_ERR(phy_node))
3397 phy_node = fwnode_find_reference(fwnode, "phy-device", 0);
3398 return phy_node;
3399}
3400EXPORT_SYMBOL_GPL(fwnode_get_phy_node);
3401
b3df0da8
RD
3402/**
3403 * phy_probe - probe and init a PHY device
3404 * @dev: device to probe and init
00db8189 3405 *
83456576 3406 * Take care of setting up the phy_device structure, set the state to READY.
00db8189
AF
3407 */
3408static int phy_probe(struct device *dev)
3409{
553fe92b 3410 struct phy_device *phydev = to_phy_device(dev);
e5a03bfd 3411 struct device_driver *drv = phydev->mdio.dev.driver;
553fe92b 3412 struct phy_driver *phydrv = to_phy_driver(drv);
00db8189
AF
3413 int err = 0;
3414
00db8189
AF
3415 phydev->drv = phydrv;
3416
2c7b4921
FF
3417 /* Disable the interrupt if the PHY doesn't support it
3418 * but the interrupt is still a valid one
3419 */
b269875f 3420 if (!phy_drv_supports_irq(phydrv) && phy_interrupt_is_valid(phydev))
00db8189
AF
3421 phydev->irq = PHY_POLL;
3422
4284b6a5
FF
3423 if (phydrv->flags & PHY_IS_INTERNAL)
3424 phydev->is_internal = true;
3425
1dba6995
BG
3426 /* Deassert the reset signal */
3427 phy_device_reset(phydev, 0);
92ed2eb7 3428
1dba6995 3429 if (phydev->drv->probe) {
92ed2eb7 3430 err = phydev->drv->probe(phydev);
1dba6995 3431 if (err)
92ed2eb7 3432 goto out;
92ed2eb7
AL
3433 }
3434
cc941e54
RKO
3435 phy_disable_interrupts(phydev);
3436
00db8189
AF
3437 /* Start out supporting everything. Eventually,
3438 * a controller will attach, and may modify one
2f53e904
SS
3439 * or both of these values
3440 */
c2a978c1 3441 if (phydrv->features) {
efbdfdc2 3442 linkmode_copy(phydev->supported, phydrv->features);
c2a978c1
AL
3443 genphy_c45_read_eee_abilities(phydev);
3444 }
169d7a40 3445 else if (phydrv->get_features)
efbdfdc2 3446 err = phydrv->get_features(phydev);
169d7a40 3447 else if (phydev->is_c45)
a1deab17 3448 err = genphy_c45_pma_read_abilities(phydev);
169d7a40 3449 else
a1deab17 3450 err = genphy_read_abilities(phydev);
efbdfdc2 3451
a1deab17
HK
3452 if (err)
3453 goto out;
3454
5e42574b
HK
3455 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
3456 phydev->supported))
3457 phydev->autoneg = 0;
3458
3b8b11f9
HK
3459 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
3460 phydev->supported))
3461 phydev->is_gigabit_capable = 1;
3462 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
3463 phydev->supported))
3464 phydev->is_gigabit_capable = 1;
3465
de906af1 3466 of_set_phy_supported(phydev);
22c0ef6b 3467 phy_advertise_supported(phydev);
00db8189 3468
3eeca4e1
OR
3469 /* Get PHY default EEE advertising modes and handle them as potentially
3470 * safe initial configuration.
3471 */
3472 err = genphy_c45_read_eee_adv(phydev, phydev->advertising_eee);
3473 if (err)
8f9850dd 3474 goto out;
3eeca4e1
OR
3475
3476 /* There is no "enabled" flag. If PHY is advertising, assume it is
3477 * kind of enabled.
3478 */
3479 phydev->eee_enabled = !linkmode_empty(phydev->advertising_eee);
3480
3481 /* Some PHYs may advertise, by default, not support EEE modes. So,
3482 * we need to clean them.
3483 */
3484 if (phydev->eee_enabled)
3485 linkmode_and(phydev->advertising_eee, phydev->supported_eee,
3486 phydev->advertising_eee);
3487
d853d145 3488 /* Get the EEE modes we want to prohibit. We will ask
3489 * the PHY stop advertising these mode later on
3490 */
3491 of_set_phy_eee_broken(phydev);
3492
529ed127
TT
3493 /* The Pause Frame bits indicate that the PHY can support passing
3494 * pause frames. During autonegotiation, the PHYs will determine if
3495 * they should allow pause frames to pass. The MAC driver should then
3496 * use that result to determine whether to enable flow control via
3497 * pause frames.
3498 *
3499 * Normally, PHY drivers should not set the Pause bits, and instead
3500 * allow phylib to do that. However, there may be some situations
3501 * (e.g. hardware erratum) where the driver wants to set only one
3502 * of these bits.
3503 */
efbdfdc2
AL
3504 if (!test_bit(ETHTOOL_LINK_MODE_Pause_BIT, phydev->supported) &&
3505 !test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, phydev->supported)) {
3c1bcc86
AL
3506 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
3507 phydev->supported);
3508 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
3509 phydev->supported);
529ed127
TT
3510 }
3511
00db8189
AF
3512 /* Set the state to READY by default */
3513 phydev->state = PHY_READY;
3514
01e5b728
AL
3515 /* Get the LEDs from the device tree, and instantiate standard
3516 * LEDs for them.
3517 */
4bb7aac7
AB
3518 if (IS_ENABLED(CONFIG_PHYLIB_LEDS))
3519 err = of_phy_leds(phydev);
01e5b728 3520
92ed2eb7 3521out:
f4b47a2e 3522 /* Re-assert the reset signal on error */
1dba6995
BG
3523 if (err)
3524 phy_device_reset(phydev, 1);
3525
00db8189
AF
3526 return err;
3527}
3528
3529static int phy_remove(struct device *dev)
3530{
553fe92b 3531 struct phy_device *phydev = to_phy_device(dev);
00db8189 3532
7b9a88a3
FF
3533 cancel_delayed_work_sync(&phydev->state_queue);
3534
c938ab4d
AL
3535 if (IS_ENABLED(CONFIG_PHYLIB_LEDS))
3536 phy_leds_unregister(phydev);
3537
00db8189 3538 phydev->state = PHY_DOWN;
00db8189 3539
298e54fa
RK
3540 sfp_bus_del_upstream(phydev->sfp_bus);
3541 phydev->sfp_bus = NULL;
3542
1dba6995 3543 if (phydev->drv && phydev->drv->remove)
00db8189 3544 phydev->drv->remove(phydev);
bafbdd52 3545
1dba6995
BG
3546 /* Assert the reset signal */
3547 phy_device_reset(phydev, 1);
3548
00db8189
AF
3549 phydev->drv = NULL;
3550
3551 return 0;
3552}
3553
b3df0da8
RD
3554/**
3555 * phy_driver_register - register a phy_driver with the PHY layer
3556 * @new_driver: new phy_driver to register
be01da72 3557 * @owner: module owning this PHY
b3df0da8 3558 */
be01da72 3559int phy_driver_register(struct phy_driver *new_driver, struct module *owner)
00db8189
AF
3560{
3561 int retval;
3562
efbdfdc2 3563 /* Either the features are hard coded, or dynamically
a1deab17 3564 * determined. It cannot be both.
efbdfdc2 3565 */
a1deab17
HK
3566 if (WARN_ON(new_driver->features && new_driver->get_features)) {
3567 pr_err("%s: features and get_features must not both be set\n",
3568 new_driver->name);
3e64cf7a
CG
3569 return -EINVAL;
3570 }
3571
2b12d51c
RKO
3572 /* PHYLIB device drivers must not match using a DT compatible table
3573 * as this bypasses our checks that the mdiodev that is being matched
3574 * is backed by a struct phy_device. If such a case happens, we will
3575 * make out-of-bounds accesses and lockup in phydev->lock.
3576 */
3577 if (WARN(new_driver->mdiodrv.driver.of_match_table,
3578 "%s: driver must not provide a DT match table\n",
3579 new_driver->name))
3580 return -EINVAL;
3581
a9049e0c
AL
3582 new_driver->mdiodrv.flags |= MDIO_DEVICE_IS_PHY;
3583 new_driver->mdiodrv.driver.name = new_driver->name;
3584 new_driver->mdiodrv.driver.bus = &mdio_bus_type;
3585 new_driver->mdiodrv.driver.probe = phy_probe;
3586 new_driver->mdiodrv.driver.remove = phy_remove;
3587 new_driver->mdiodrv.driver.owner = owner;
16983507 3588 new_driver->mdiodrv.driver.probe_type = PROBE_FORCE_SYNCHRONOUS;
00db8189 3589
a9049e0c 3590 retval = driver_register(&new_driver->mdiodrv.driver);
00db8189 3591 if (retval) {
8d242488
JP
3592 pr_err("%s: Error %d in registering driver\n",
3593 new_driver->name, retval);
00db8189
AF
3594
3595 return retval;
3596 }
3597
f2511f13 3598 pr_debug("%s: Registered new driver\n", new_driver->name);
00db8189
AF
3599
3600 return 0;
3601}
3602EXPORT_SYMBOL(phy_driver_register);
3603
be01da72
AL
3604int phy_drivers_register(struct phy_driver *new_driver, int n,
3605 struct module *owner)
d5bf9071
CH
3606{
3607 int i, ret = 0;
3608
3609 for (i = 0; i < n; i++) {
be01da72 3610 ret = phy_driver_register(new_driver + i, owner);
d5bf9071
CH
3611 if (ret) {
3612 while (i-- > 0)
3613 phy_driver_unregister(new_driver + i);
3614 break;
3615 }
3616 }
3617 return ret;
3618}
3619EXPORT_SYMBOL(phy_drivers_register);
3620
00db8189
AF
3621void phy_driver_unregister(struct phy_driver *drv)
3622{
a9049e0c 3623 driver_unregister(&drv->mdiodrv.driver);
00db8189
AF
3624}
3625EXPORT_SYMBOL(phy_driver_unregister);
3626
d5bf9071
CH
3627void phy_drivers_unregister(struct phy_driver *drv, int n)
3628{
3629 int i;
2f53e904
SS
3630
3631 for (i = 0; i < n; i++)
d5bf9071 3632 phy_driver_unregister(drv + i);
d5bf9071
CH
3633}
3634EXPORT_SYMBOL(phy_drivers_unregister);
3635
921690f2 3636static struct phy_driver genphy_driver = {
e1393456
AF
3637 .phy_id = 0xffffffff,
3638 .phy_id_mask = 0xffffffff,
3639 .name = "Generic PHY",
2a4d8674 3640 .get_features = genphy_read_abilities,
0f0ca340
GC
3641 .suspend = genphy_suspend,
3642 .resume = genphy_resume,
f0f9b4ed 3643 .set_loopback = genphy_loopback,
921690f2 3644};
00db8189 3645
55d8f053 3646static const struct ethtool_phy_ops phy_ethtool_phy_ops = {
bd36ed1c
FF
3647 .get_sset_count = phy_ethtool_get_sset_count,
3648 .get_strings = phy_ethtool_get_strings,
3649 .get_stats = phy_ethtool_get_stats,
a23a1e57
PB
3650 .get_plca_cfg = phy_ethtool_get_plca_cfg,
3651 .set_plca_cfg = phy_ethtool_set_plca_cfg,
3652 .get_plca_status = phy_ethtool_get_plca_status,
55d8f053
FF
3653 .start_cable_test = phy_start_cable_test,
3654 .start_cable_test_tdr = phy_start_cable_test_tdr,
3655};
3656
60495b66
VO
3657static const struct phylib_stubs __phylib_stubs = {
3658 .hwtstamp_get = __phy_hwtstamp_get,
3659 .hwtstamp_set = __phy_hwtstamp_set,
3660};
3661
3662static void phylib_register_stubs(void)
3663{
3664 phylib_stubs = &__phylib_stubs;
3665}
3666
3667static void phylib_unregister_stubs(void)
3668{
3669 phylib_stubs = NULL;
3670}
3671
67c4f3fa 3672static int __init phy_init(void)
00db8189 3673{
67c4f3fa 3674 int rc;
67c4f3fa 3675
70ef7d87 3676 rtnl_lock();
1c613bea 3677 ethtool_set_ethtool_phy_ops(&phy_ethtool_phy_ops);
60495b66 3678 phylib_register_stubs();
70ef7d87 3679 rtnl_unlock();
1c613bea 3680
67c4f3fa
JG
3681 rc = mdio_bus_init();
3682 if (rc)
1c613bea 3683 goto err_ethtool_phy_ops;
00db8189 3684
719655a1
AL
3685 features_init();
3686
22b56e82 3687 rc = phy_driver_register(&genphy_c45_driver, THIS_MODULE);
e1393456 3688 if (rc)
1c613bea 3689 goto err_mdio_bus;
921690f2
RK
3690
3691 rc = phy_driver_register(&genphy_driver, THIS_MODULE);
1c613bea
VO
3692 if (rc)
3693 goto err_c45;
3694
3695 return 0;
3696
22b56e82 3697err_c45:
1c613bea
VO
3698 phy_driver_unregister(&genphy_c45_driver);
3699err_mdio_bus:
3700 mdio_bus_exit();
3701err_ethtool_phy_ops:
70ef7d87 3702 rtnl_lock();
60495b66 3703 phylib_unregister_stubs();
1c613bea 3704 ethtool_set_ethtool_phy_ops(NULL);
70ef7d87 3705 rtnl_unlock();
67c4f3fa 3706
67c4f3fa 3707 return rc;
00db8189
AF
3708}
3709
67c4f3fa 3710static void __exit phy_exit(void)
00db8189 3711{
22b56e82 3712 phy_driver_unregister(&genphy_c45_driver);
921690f2 3713 phy_driver_unregister(&genphy_driver);
e1393456 3714 mdio_bus_exit();
70ef7d87 3715 rtnl_lock();
60495b66 3716 phylib_unregister_stubs();
55d8f053 3717 ethtool_set_ethtool_phy_ops(NULL);
70ef7d87 3718 rtnl_unlock();
00db8189
AF
3719}
3720
e1393456 3721subsys_initcall(phy_init);
67c4f3fa 3722module_exit(phy_exit);