Commit | Line | Data |
---|---|---|
25d967b7 DD |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 2009 Cavium Networks | |
7 | */ | |
8 | ||
5a0e3ad6 | 9 | #include <linux/gfp.h> |
25d967b7 DD |
10 | #include <linux/init.h> |
11 | #include <linux/module.h> | |
12 | #include <linux/platform_device.h> | |
13 | #include <linux/phy.h> | |
14 | ||
15 | #include <asm/octeon/octeon.h> | |
16 | #include <asm/octeon/cvmx-smix-defs.h> | |
17 | ||
18 | #define DRV_VERSION "1.0" | |
19 | #define DRV_DESCRIPTION "Cavium Networks Octeon SMI/MDIO driver" | |
20 | ||
21 | struct octeon_mdiobus { | |
22 | struct mii_bus *mii_bus; | |
23 | int unit; | |
24 | int phy_irq[PHY_MAX_ADDR]; | |
25 | }; | |
26 | ||
27 | static int octeon_mdiobus_read(struct mii_bus *bus, int phy_id, int regnum) | |
28 | { | |
29 | struct octeon_mdiobus *p = bus->priv; | |
30 | union cvmx_smix_cmd smi_cmd; | |
31 | union cvmx_smix_rd_dat smi_rd; | |
32 | int timeout = 1000; | |
33 | ||
34 | smi_cmd.u64 = 0; | |
35 | smi_cmd.s.phy_op = 1; /* MDIO_CLAUSE_22_READ */ | |
36 | smi_cmd.s.phy_adr = phy_id; | |
37 | smi_cmd.s.reg_adr = regnum; | |
38 | cvmx_write_csr(CVMX_SMIX_CMD(p->unit), smi_cmd.u64); | |
39 | ||
40 | do { | |
41 | /* | |
42 | * Wait 1000 clocks so we don't saturate the RSL bus | |
43 | * doing reads. | |
44 | */ | |
45 | cvmx_wait(1000); | |
46 | smi_rd.u64 = cvmx_read_csr(CVMX_SMIX_RD_DAT(p->unit)); | |
47 | } while (smi_rd.s.pending && --timeout); | |
48 | ||
49 | if (smi_rd.s.val) | |
50 | return smi_rd.s.dat; | |
51 | else | |
52 | return -EIO; | |
53 | } | |
54 | ||
55 | static int octeon_mdiobus_write(struct mii_bus *bus, int phy_id, | |
56 | int regnum, u16 val) | |
57 | { | |
58 | struct octeon_mdiobus *p = bus->priv; | |
59 | union cvmx_smix_cmd smi_cmd; | |
60 | union cvmx_smix_wr_dat smi_wr; | |
61 | int timeout = 1000; | |
62 | ||
63 | smi_wr.u64 = 0; | |
64 | smi_wr.s.dat = val; | |
65 | cvmx_write_csr(CVMX_SMIX_WR_DAT(p->unit), smi_wr.u64); | |
66 | ||
67 | smi_cmd.u64 = 0; | |
68 | smi_cmd.s.phy_op = 0; /* MDIO_CLAUSE_22_WRITE */ | |
69 | smi_cmd.s.phy_adr = phy_id; | |
70 | smi_cmd.s.reg_adr = regnum; | |
71 | cvmx_write_csr(CVMX_SMIX_CMD(p->unit), smi_cmd.u64); | |
72 | ||
73 | do { | |
74 | /* | |
75 | * Wait 1000 clocks so we don't saturate the RSL bus | |
76 | * doing reads. | |
77 | */ | |
78 | cvmx_wait(1000); | |
79 | smi_wr.u64 = cvmx_read_csr(CVMX_SMIX_WR_DAT(p->unit)); | |
80 | } while (smi_wr.s.pending && --timeout); | |
81 | ||
82 | if (timeout <= 0) | |
83 | return -EIO; | |
84 | ||
85 | return 0; | |
86 | } | |
87 | ||
88 | static int __init octeon_mdiobus_probe(struct platform_device *pdev) | |
89 | { | |
90 | struct octeon_mdiobus *bus; | |
91 | int i; | |
92 | int err = -ENOENT; | |
93 | ||
94 | bus = devm_kzalloc(&pdev->dev, sizeof(*bus), GFP_KERNEL); | |
95 | if (!bus) | |
96 | return -ENOMEM; | |
97 | ||
98 | /* The platform_device id is our unit number. */ | |
99 | bus->unit = pdev->id; | |
100 | ||
101 | bus->mii_bus = mdiobus_alloc(); | |
102 | ||
103 | if (!bus->mii_bus) | |
104 | goto err; | |
105 | ||
106 | /* | |
107 | * Standard Octeon evaluation boards don't support phy | |
108 | * interrupts, we need to poll. | |
109 | */ | |
110 | for (i = 0; i < PHY_MAX_ADDR; i++) | |
111 | bus->phy_irq[i] = PHY_POLL; | |
112 | ||
113 | bus->mii_bus->priv = bus; | |
114 | bus->mii_bus->irq = bus->phy_irq; | |
115 | bus->mii_bus->name = "mdio-octeon"; | |
116 | snprintf(bus->mii_bus->id, MII_BUS_ID_SIZE, "%x", bus->unit); | |
117 | bus->mii_bus->parent = &pdev->dev; | |
118 | ||
119 | bus->mii_bus->read = octeon_mdiobus_read; | |
120 | bus->mii_bus->write = octeon_mdiobus_write; | |
121 | ||
122 | dev_set_drvdata(&pdev->dev, bus); | |
123 | ||
124 | err = mdiobus_register(bus->mii_bus); | |
125 | if (err) | |
126 | goto err_register; | |
127 | ||
128 | dev_info(&pdev->dev, "Version " DRV_VERSION "\n"); | |
129 | ||
130 | return 0; | |
131 | err_register: | |
132 | mdiobus_free(bus->mii_bus); | |
133 | ||
134 | err: | |
135 | devm_kfree(&pdev->dev, bus); | |
136 | return err; | |
137 | } | |
138 | ||
139 | static int __exit octeon_mdiobus_remove(struct platform_device *pdev) | |
140 | { | |
141 | struct octeon_mdiobus *bus; | |
142 | ||
143 | bus = dev_get_drvdata(&pdev->dev); | |
144 | ||
145 | mdiobus_unregister(bus->mii_bus); | |
146 | mdiobus_free(bus->mii_bus); | |
147 | return 0; | |
148 | } | |
149 | ||
150 | static struct platform_driver octeon_mdiobus_driver = { | |
151 | .driver = { | |
152 | .name = "mdio-octeon", | |
153 | .owner = THIS_MODULE, | |
154 | }, | |
155 | .probe = octeon_mdiobus_probe, | |
156 | .remove = __exit_p(octeon_mdiobus_remove), | |
157 | }; | |
158 | ||
159 | void octeon_mdiobus_force_mod_depencency(void) | |
160 | { | |
161 | /* Let ethernet drivers force us to be loaded. */ | |
162 | } | |
163 | EXPORT_SYMBOL(octeon_mdiobus_force_mod_depencency); | |
164 | ||
165 | static int __init octeon_mdiobus_mod_init(void) | |
166 | { | |
167 | return platform_driver_register(&octeon_mdiobus_driver); | |
168 | } | |
169 | ||
170 | static void __exit octeon_mdiobus_mod_exit(void) | |
171 | { | |
172 | platform_driver_unregister(&octeon_mdiobus_driver); | |
173 | } | |
174 | ||
175 | module_init(octeon_mdiobus_mod_init); | |
176 | module_exit(octeon_mdiobus_mod_exit); | |
177 | ||
178 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
179 | MODULE_VERSION(DRV_VERSION); | |
180 | MODULE_AUTHOR("David Daney"); | |
181 | MODULE_LICENSE("GPL"); |