Commit | Line | Data |
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5f857575 | 1 | // SPDX-License-Identifier: GPL-2.0 |
34e45ad9 AD |
2 | /* |
3 | * Driver for the Texas Instruments DP83848 PHY | |
4 | * | |
2f67864b | 5 | * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ |
34e45ad9 AD |
6 | */ |
7 | ||
8 | #include <linux/module.h> | |
9 | #include <linux/phy.h> | |
10 | ||
68336293 | 11 | #define TI_DP83848C_PHY_ID 0x20005ca0 |
93b43fd1 | 12 | #define TI_DP83620_PHY_ID 0x20005ce0 |
68336293 | 13 | #define NS_DP83848C_PHY_ID 0x20005c90 |
d1782f7b | 14 | #define TLK10X_PHY_ID 0x2000a210 |
34e45ad9 AD |
15 | |
16 | /* Registers */ | |
5fed0393 AD |
17 | #define DP83848_MICR 0x11 /* MII Interrupt Control Register */ |
18 | #define DP83848_MISR 0x12 /* MII Interrupt Status Register */ | |
34e45ad9 AD |
19 | |
20 | /* MICR Register Fields */ | |
21 | #define DP83848_MICR_INT_OE BIT(0) /* Interrupt Output Enable */ | |
22 | #define DP83848_MICR_INTEN BIT(1) /* Interrupt Enable */ | |
23 | ||
24 | /* MISR Register Fields */ | |
25 | #define DP83848_MISR_RHF_INT_EN BIT(0) /* Receive Error Counter */ | |
26 | #define DP83848_MISR_FHF_INT_EN BIT(1) /* False Carrier Counter */ | |
27 | #define DP83848_MISR_ANC_INT_EN BIT(2) /* Auto-negotiation complete */ | |
28 | #define DP83848_MISR_DUP_INT_EN BIT(3) /* Duplex Status */ | |
29 | #define DP83848_MISR_SPD_INT_EN BIT(4) /* Speed status */ | |
30 | #define DP83848_MISR_LINK_INT_EN BIT(5) /* Link status */ | |
31 | #define DP83848_MISR_ED_INT_EN BIT(6) /* Energy detect */ | |
32 | #define DP83848_MISR_LQM_INT_EN BIT(7) /* Link Quality Monitor */ | |
33 | ||
cf13be5a AD |
34 | #define DP83848_INT_EN_MASK \ |
35 | (DP83848_MISR_ANC_INT_EN | \ | |
36 | DP83848_MISR_DUP_INT_EN | \ | |
37 | DP83848_MISR_SPD_INT_EN | \ | |
38 | DP83848_MISR_LINK_INT_EN) | |
39 | ||
1d1ae3c6 IC |
40 | #define DP83848_MISR_RHF_INT BIT(8) |
41 | #define DP83848_MISR_FHF_INT BIT(9) | |
42 | #define DP83848_MISR_ANC_INT BIT(10) | |
43 | #define DP83848_MISR_DUP_INT BIT(11) | |
44 | #define DP83848_MISR_SPD_INT BIT(12) | |
45 | #define DP83848_MISR_LINK_INT BIT(13) | |
46 | #define DP83848_MISR_ED_INT BIT(14) | |
47 | ||
48 | #define DP83848_INT_MASK \ | |
49 | (DP83848_MISR_ANC_INT | \ | |
50 | DP83848_MISR_DUP_INT | \ | |
51 | DP83848_MISR_SPD_INT | \ | |
52 | DP83848_MISR_LINK_INT) | |
53 | ||
34e45ad9 AD |
54 | static int dp83848_ack_interrupt(struct phy_device *phydev) |
55 | { | |
56 | int err = phy_read(phydev, DP83848_MISR); | |
57 | ||
58 | return err < 0 ? err : 0; | |
59 | } | |
60 | ||
61 | static int dp83848_config_intr(struct phy_device *phydev) | |
62 | { | |
cf13be5a AD |
63 | int control, ret; |
64 | ||
65 | control = phy_read(phydev, DP83848_MICR); | |
66 | if (control < 0) | |
67 | return control; | |
34e45ad9 AD |
68 | |
69 | if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { | |
aa2d603a IC |
70 | ret = dp83848_ack_interrupt(phydev); |
71 | if (ret) | |
72 | return ret; | |
73 | ||
cf13be5a AD |
74 | control |= DP83848_MICR_INT_OE; |
75 | control |= DP83848_MICR_INTEN; | |
34e45ad9 | 76 | |
cf13be5a AD |
77 | ret = phy_write(phydev, DP83848_MISR, DP83848_INT_EN_MASK); |
78 | if (ret < 0) | |
79 | return ret; | |
aa2d603a IC |
80 | |
81 | ret = phy_write(phydev, DP83848_MICR, control); | |
cf13be5a AD |
82 | } else { |
83 | control &= ~DP83848_MICR_INTEN; | |
aa2d603a IC |
84 | ret = phy_write(phydev, DP83848_MICR, control); |
85 | if (ret) | |
86 | return ret; | |
87 | ||
88 | ret = dp83848_ack_interrupt(phydev); | |
34e45ad9 AD |
89 | } |
90 | ||
aa2d603a | 91 | return ret; |
34e45ad9 AD |
92 | } |
93 | ||
1d1ae3c6 IC |
94 | static irqreturn_t dp83848_handle_interrupt(struct phy_device *phydev) |
95 | { | |
96 | int irq_status; | |
97 | ||
98 | irq_status = phy_read(phydev, DP83848_MISR); | |
99 | if (irq_status < 0) { | |
100 | phy_error(phydev); | |
101 | return IRQ_NONE; | |
102 | } | |
103 | ||
104 | if (!(irq_status & DP83848_INT_MASK)) | |
105 | return IRQ_NONE; | |
106 | ||
107 | phy_trigger_machine(phydev); | |
108 | ||
109 | return IRQ_HANDLED; | |
110 | } | |
111 | ||
b718e8c8 AGM |
112 | static int dp83848_config_init(struct phy_device *phydev) |
113 | { | |
b718e8c8 AGM |
114 | int val; |
115 | ||
b718e8c8 AGM |
116 | /* DP83620 always reports Auto Negotiation Ability on BMSR. Instead, |
117 | * we check initial value of BMCR Auto negotiation enable bit | |
118 | */ | |
119 | val = phy_read(phydev, MII_BMCR); | |
120 | if (!(val & BMCR_ANENABLE)) | |
121 | phydev->autoneg = AUTONEG_DISABLE; | |
122 | ||
123 | return 0; | |
124 | } | |
125 | ||
34e45ad9 | 126 | static struct mdio_device_id __maybe_unused dp83848_tbl[] = { |
68336293 AD |
127 | { TI_DP83848C_PHY_ID, 0xfffffff0 }, |
128 | { NS_DP83848C_PHY_ID, 0xfffffff0 }, | |
93b43fd1 | 129 | { TI_DP83620_PHY_ID, 0xfffffff0 }, |
d1782f7b | 130 | { TLK10X_PHY_ID, 0xfffffff0 }, |
34e45ad9 AD |
131 | { } |
132 | }; | |
133 | MODULE_DEVICE_TABLE(mdio, dp83848_tbl); | |
134 | ||
b718e8c8 | 135 | #define DP83848_PHY_DRIVER(_id, _name, _config_init) \ |
2f67864b AD |
136 | { \ |
137 | .phy_id = _id, \ | |
138 | .phy_id_mask = 0xfffffff0, \ | |
139 | .name = _name, \ | |
dcdecdcf | 140 | /* PHY_BASIC_FEATURES */ \ |
2f67864b AD |
141 | \ |
142 | .soft_reset = genphy_soft_reset, \ | |
b718e8c8 | 143 | .config_init = _config_init, \ |
2f67864b AD |
144 | .suspend = genphy_suspend, \ |
145 | .resume = genphy_resume, \ | |
2f67864b AD |
146 | \ |
147 | /* IRQ related */ \ | |
2f67864b | 148 | .config_intr = dp83848_config_intr, \ |
1d1ae3c6 | 149 | .handle_interrupt = dp83848_handle_interrupt, \ |
2f67864b | 150 | } |
34e45ad9 | 151 | |
2f67864b | 152 | static struct phy_driver dp83848_driver[] = { |
b718e8c8 | 153 | DP83848_PHY_DRIVER(TI_DP83848C_PHY_ID, "TI DP83848C 10/100 Mbps PHY", |
c227ce44 | 154 | NULL), |
b718e8c8 | 155 | DP83848_PHY_DRIVER(NS_DP83848C_PHY_ID, "NS DP83848C 10/100 Mbps PHY", |
c227ce44 | 156 | NULL), |
b718e8c8 AGM |
157 | DP83848_PHY_DRIVER(TI_DP83620_PHY_ID, "TI DP83620 10/100 Mbps PHY", |
158 | dp83848_config_init), | |
159 | DP83848_PHY_DRIVER(TLK10X_PHY_ID, "TI TLK10X 10/100 Mbps PHY", | |
c227ce44 | 160 | NULL), |
34e45ad9 AD |
161 | }; |
162 | module_phy_driver(dp83848_driver); | |
163 | ||
164 | MODULE_DESCRIPTION("Texas Instruments DP83848 PHY driver"); | |
3d17cc39 | 165 | MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>"); |
5f857575 | 166 | MODULE_LICENSE("GPL v2"); |