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[PATCH] pcmcia: convert remaining users of pcmcia_release_io and _irq
[linux-2.6-block.git] / drivers / net / pcmcia / nmclan_cs.c
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1da177e4
LT		 1/* ----------------------------------------------------------------------------
2Linux PCMCIA ethernet adapter driver for the New Media Ethernet LAN.
3 nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao
4
5 The Ethernet LAN uses the Advanced Micro Devices (AMD) Am79C940 Media
6 Access Controller for Ethernet (MACE). It is essentially the Am2150
7 PCMCIA Ethernet card contained in the Am2150 Demo Kit.
8
9Written by Roger C. Pao <rpao@paonet.org>
10 Copyright 1995 Roger C. Pao
11 Linux 2.5 cleanups Copyright Red Hat 2003
12
13 This software may be used and distributed according to the terms of
14 the GNU General Public License.
15
16Ported to Linux 1.3.* network driver environment by
17 Matti Aarnio <mea@utu.fi>
18
19References
20
21 Am2150 Technical Reference Manual, Revision 1.0, August 17, 1993
22 Am79C940 (MACE) Data Sheet, 1994
23 Am79C90 (C-LANCE) Data Sheet, 1994
24 Linux PCMCIA Programmer's Guide v1.17
25 /usr/src/linux/net/inet/dev.c, Linux kernel 1.2.8
26
27 Eric Mears, New Media Corporation
28 Tom Pollard, New Media Corporation
29 Dean Siasoyco, New Media Corporation
30 Ken Lesniak, Silicon Graphics, Inc. <lesniak@boston.sgi.com>
31 Donald Becker <becker@scyld.com>
32 David Hinds <dahinds@users.sourceforge.net>
33
34 The Linux client driver is based on the 3c589_cs.c client driver by
35 David Hinds.
36
37 The Linux network driver outline is based on the 3c589_cs.c driver,
38 the 8390.c driver, and the example skeleton.c kernel code, which are
39 by Donald Becker.
40
41 The Am2150 network driver hardware interface code is based on the
42 OS/9000 driver for the New Media Ethernet LAN by Eric Mears.
43
44 Special thanks for testing and help in debugging this driver goes
45 to Ken Lesniak.
46
47-------------------------------------------------------------------------------
48Driver Notes and Issues
49-------------------------------------------------------------------------------
50
511. Developed on a Dell 320SLi
52 PCMCIA Card Services 2.6.2
53 Linux dell 1.2.10 #1 Thu Jun 29 20:23:41 PDT 1995 i386
54
552. rc.pcmcia may require loading pcmcia_core with io_speed=300:
56 'insmod pcmcia_core.o io_speed=300'.
57 This will avoid problems with fast systems which causes rx_framecnt
58 to return random values.
59
603. If hot extraction does not work for you, use 'ifconfig eth0 down'
61 before extraction.
62
634. There is a bad slow-down problem in this driver.
64
655. Future: Multicast processing. In the meantime, do _not_ compile your
66 kernel with multicast ip enabled.
67
68-------------------------------------------------------------------------------
69History
70-------------------------------------------------------------------------------
71Log: nmclan_cs.c,v
72 * 2.5.75-ac1 2003/07/11 Alan Cox <alan@redhat.com>
73 * Fixed hang on card eject as we probe it
74 * Cleaned up to use new style locking.
75 *
76 * Revision 0.16 1995/07/01 06:42:17 rpao
77 * Bug fix: nmclan_reset() called CardServices incorrectly.
78 *
79 * Revision 0.15 1995/05/24 08:09:47 rpao
80 * Re-implement MULTI_TX dev->tbusy handling.
81 *
82 * Revision 0.14 1995/05/23 03:19:30 rpao
83 * Added, in nmclan_config(), "tuple.Attributes = 0;".
84 * Modified MACE ID check to ignore chip revision level.
85 * Avoid tx_free_frames race condition between _start_xmit and _interrupt.
86 *
87 * Revision 0.13 1995/05/18 05:56:34 rpao
88 * Statistics changes.
89 * Bug fix: nmclan_reset did not enable TX and RX: call restore_multicast_list.
90 * Bug fix: mace_interrupt checks ~MACE_IMR_DEFAULT. Fixes driver lockup.
91 *
92 * Revision 0.12 1995/05/14 00:12:23 rpao
93 * Statistics overhaul.
94 *
95
9695/05/13 rpao V0.10a
97 Bug fix: MACE statistics counters used wrong I/O ports.
98 Bug fix: mace_interrupt() needed to allow statistics to be
99 processed without RX or TX interrupts pending.
10095/05/11 rpao V0.10
101 Multiple transmit request processing.
102 Modified statistics to use MACE counters where possible.
10395/05/10 rpao V0.09 Bug fix: Must use IO_DATA_PATH_WIDTH_AUTO.
104 *Released
10595/05/10 rpao V0.08
106 Bug fix: Make all non-exported functions private by using
107 static keyword.
108 Bug fix: Test IntrCnt _before_ reading MACE_IR.
10995/05/10 rpao V0.07 Statistics.
11095/05/09 rpao V0.06 Fix rx_framecnt problem by addition of PCIC wait states.
111
112---------------------------------------------------------------------------- */
113
114#define DRV_NAME "nmclan_cs"
115#define DRV_VERSION "0.16"
116
117
118/* ----------------------------------------------------------------------------
119Conditional Compilation Options
120---------------------------------------------------------------------------- */
121
122#define MULTI_TX 0
123#define RESET_ON_TIMEOUT 1
124#define TX_INTERRUPTABLE 1
125#define RESET_XILINX 0
126
127/* ----------------------------------------------------------------------------
128Include Files
129---------------------------------------------------------------------------- */
130
131#include <linux/module.h>
132#include <linux/kernel.h>
133#include <linux/init.h>
134#include <linux/ptrace.h>
135#include <linux/slab.h>
136#include <linux/string.h>
137#include <linux/timer.h>
138#include <linux/interrupt.h>
139#include <linux/in.h>
140#include <linux/delay.h>
141#include <linux/ethtool.h>
142#include <linux/netdevice.h>
143#include <linux/etherdevice.h>
144#include <linux/skbuff.h>
145#include <linux/if_arp.h>
146#include <linux/ioport.h>
147#include <linux/bitops.h>
148
1da177e4
LT		 149#include <pcmcia/cs_types.h>
150#include <pcmcia/cs.h>
151#include <pcmcia/cisreg.h>
152#include <pcmcia/cistpl.h>
153#include <pcmcia/ds.h>
154
155#include <asm/uaccess.h>
156#include <asm/io.h>
157#include <asm/system.h>
158
159/* ----------------------------------------------------------------------------
160Defines
161---------------------------------------------------------------------------- */
162
163#define ETHER_ADDR_LEN ETH_ALEN
164 /* 6 bytes in an Ethernet Address */
165#define MACE_LADRF_LEN 8
166 /* 8 bytes in Logical Address Filter */
167
168/* Loop Control Defines */
169#define MACE_MAX_IR_ITERATIONS 10
170#define MACE_MAX_RX_ITERATIONS 12
171 /*
172 TBD: Dean brought this up, and I assumed the hardware would
173 handle it:
174
175 If MACE_MAX_RX_ITERATIONS is > 1, rx_framecnt may still be
176 non-zero when the isr exits. We may not get another interrupt
177 to process the remaining packets for some time.
178 */
179
180/*
181The Am2150 has a Xilinx XC3042 field programmable gate array (FPGA)
182which manages the interface between the MACE and the PCMCIA bus. It
183also includes buffer management for the 32K x 8 SRAM to control up to
184four transmit and 12 receive frames at a time.
185*/
186#define AM2150_MAX_TX_FRAMES 4
187#define AM2150_MAX_RX_FRAMES 12
188
189/* Am2150 Ethernet Card I/O Mapping */
190#define AM2150_RCV 0x00
191#define AM2150_XMT 0x04
192#define AM2150_XMT_SKIP 0x09
193#define AM2150_RCV_NEXT 0x0A
194#define AM2150_RCV_FRAME_COUNT 0x0B
195#define AM2150_MACE_BANK 0x0C
196#define AM2150_MACE_BASE 0x10
197
198/* MACE Registers */
199#define MACE_RCVFIFO 0
200#define MACE_XMTFIFO 1
201#define MACE_XMTFC 2
202#define MACE_XMTFS 3
203#define MACE_XMTRC 4
204#define MACE_RCVFC 5
205#define MACE_RCVFS 6
206#define MACE_FIFOFC 7
207#define MACE_IR 8
208#define MACE_IMR 9
209#define MACE_PR 10
210#define MACE_BIUCC 11
211#define MACE_FIFOCC 12
212#define MACE_MACCC 13
213#define MACE_PLSCC 14
214#define MACE_PHYCC 15
215#define MACE_CHIPIDL 16
216#define MACE_CHIPIDH 17
217#define MACE_IAC 18
218/* Reserved */
219#define MACE_LADRF 20
220#define MACE_PADR 21
221/* Reserved */
222/* Reserved */
223#define MACE_MPC 24
224/* Reserved */
225#define MACE_RNTPC 26
226#define MACE_RCVCC 27
227/* Reserved */
228#define MACE_UTR 29
229#define MACE_RTR1 30
230#define MACE_RTR2 31
231
232/* MACE Bit Masks */
233#define MACE_XMTRC_EXDEF 0x80
234#define MACE_XMTRC_XMTRC 0x0F
235
236#define MACE_XMTFS_XMTSV 0x80
237#define MACE_XMTFS_UFLO 0x40
238#define MACE_XMTFS_LCOL 0x20
239#define MACE_XMTFS_MORE 0x10
240#define MACE_XMTFS_ONE 0x08
241#define MACE_XMTFS_DEFER 0x04
242#define MACE_XMTFS_LCAR 0x02
243#define MACE_XMTFS_RTRY 0x01
244
245#define MACE_RCVFS_RCVSTS 0xF000
246#define MACE_RCVFS_OFLO 0x8000
247#define MACE_RCVFS_CLSN 0x4000
248#define MACE_RCVFS_FRAM 0x2000
249#define MACE_RCVFS_FCS 0x1000
250
251#define MACE_FIFOFC_RCVFC 0xF0
252#define MACE_FIFOFC_XMTFC 0x0F
253
254#define MACE_IR_JAB 0x80
255#define MACE_IR_BABL 0x40
256#define MACE_IR_CERR 0x20
257#define MACE_IR_RCVCCO 0x10
258#define MACE_IR_RNTPCO 0x08
259#define MACE_IR_MPCO 0x04
260#define MACE_IR_RCVINT 0x02
261#define MACE_IR_XMTINT 0x01
262
263#define MACE_MACCC_PROM 0x80
264#define MACE_MACCC_DXMT2PD 0x40
265#define MACE_MACCC_EMBA 0x20
266#define MACE_MACCC_RESERVED 0x10
267#define MACE_MACCC_DRCVPA 0x08
268#define MACE_MACCC_DRCVBC 0x04
269#define MACE_MACCC_ENXMT 0x02
270#define MACE_MACCC_ENRCV 0x01
271
272#define MACE_PHYCC_LNKFL 0x80
273#define MACE_PHYCC_DLNKTST 0x40
274#define MACE_PHYCC_REVPOL 0x20
275#define MACE_PHYCC_DAPC 0x10
276#define MACE_PHYCC_LRT 0x08
277#define MACE_PHYCC_ASEL 0x04
278#define MACE_PHYCC_RWAKE 0x02
279#define MACE_PHYCC_AWAKE 0x01
280
281#define MACE_IAC_ADDRCHG 0x80
282#define MACE_IAC_PHYADDR 0x04
283#define MACE_IAC_LOGADDR 0x02
284
285#define MACE_UTR_RTRE 0x80
286#define MACE_UTR_RTRD 0x40
287#define MACE_UTR_RPA 0x20
288#define MACE_UTR_FCOLL 0x10
289#define MACE_UTR_RCVFCSE 0x08
290#define MACE_UTR_LOOP_INCL_MENDEC 0x06
291#define MACE_UTR_LOOP_NO_MENDEC 0x04
292#define MACE_UTR_LOOP_EXTERNAL 0x02
293#define MACE_UTR_LOOP_NONE 0x00
294#define MACE_UTR_RESERVED 0x01
295
296/* Switch MACE register bank (only 0 and 1 are valid) */
297#define MACEBANK(win_num) outb((win_num), ioaddr + AM2150_MACE_BANK)
298
299#define MACE_IMR_DEFAULT \
300 (0xFF - \
301 ( \
302 MACE_IR_CERR | \
303 MACE_IR_RCVCCO | \
304 MACE_IR_RNTPCO | \
305 MACE_IR_MPCO | \
306 MACE_IR_RCVINT | \
307 MACE_IR_XMTINT \
308 ) \
309 )
310#undef MACE_IMR_DEFAULT
311#define MACE_IMR_DEFAULT 0x00 /* New statistics handling: grab everything */
312
313#define TX_TIMEOUT ((400*HZ)/1000)
314
315/* ----------------------------------------------------------------------------
316Type Definitions
317---------------------------------------------------------------------------- */
318
319typedef struct _mace_statistics {
320 /* MACE_XMTFS */
321 int xmtsv;
322 int uflo;
323 int lcol;
324 int more;
325 int one;
326 int defer;
327 int lcar;
328 int rtry;
329
330 /* MACE_XMTRC */
331 int exdef;
332 int xmtrc;
333
334 /* RFS1--Receive Status (RCVSTS) */
335 int oflo;
336 int clsn;
337 int fram;
338 int fcs;
339
340 /* RFS2--Runt Packet Count (RNTPC) */
341 int rfs_rntpc;
342
343 /* RFS3--Receive Collision Count (RCVCC) */
344 int rfs_rcvcc;
345
346 /* MACE_IR */
347 int jab;
348 int babl;
349 int cerr;
350 int rcvcco;
351 int rntpco;
352 int mpco;
353
354 /* MACE_MPC */
355 int mpc;
356
357 /* MACE_RNTPC */
358 int rntpc;
359
360 /* MACE_RCVCC */
361 int rcvcc;
362} mace_statistics;
363
364typedef struct _mace_private {
365 dev_link_t link;
366 dev_node_t node;
367 struct net_device_stats linux_stats; /* Linux statistics counters */
368 mace_statistics mace_stats; /* MACE chip statistics counters */
369
370 /* restore_multicast_list() state variables */
371 int multicast_ladrf[MACE_LADRF_LEN]; /* Logical address filter */
372 int multicast_num_addrs;
373
374 char tx_free_frames; /* Number of free transmit frame buffers */
375 char tx_irq_disabled; /* MACE TX interrupt disabled */
376
377 spinlock_t bank_lock; /* Must be held if you step off bank 0 */
378} mace_private;
379
380/* ----------------------------------------------------------------------------
381Private Global Variables
382---------------------------------------------------------------------------- */
383
384#ifdef PCMCIA_DEBUG
385static char rcsid[] =
386"nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao";
387static char *version =
388DRV_NAME " " DRV_VERSION " (Roger C. Pao)";
389#endif
390
f71e1309 391static const char *if_names[]={
1da177e4
LT		 392 "Auto", "10baseT", "BNC",
393};
394
395/* ----------------------------------------------------------------------------
396Parameters
397 These are the parameters that can be set during loading with
398 'insmod'.
399---------------------------------------------------------------------------- */
400
401MODULE_DESCRIPTION("New Media PCMCIA ethernet driver");
402MODULE_LICENSE("GPL");
403
404#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
405
406/* 0=auto, 1=10baseT, 2 = 10base2, default=auto */
407INT_MODULE_PARM(if_port, 0);
408
409#ifdef PCMCIA_DEBUG
410INT_MODULE_PARM(pc_debug, PCMCIA_DEBUG);
411#define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args)
412#else
413#define DEBUG(n, args...)
414#endif
415
416/* ----------------------------------------------------------------------------
417Function Prototypes
418---------------------------------------------------------------------------- */
419
420static void nmclan_config(dev_link_t *link);
421static void nmclan_release(dev_link_t *link);
1da177e4
LT		 422
423static void nmclan_reset(struct net_device *dev);
424static int mace_config(struct net_device *dev, struct ifmap *map);
425static int mace_open(struct net_device *dev);
426static int mace_close(struct net_device *dev);
427static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev);
428static void mace_tx_timeout(struct net_device *dev);
429static irqreturn_t mace_interrupt(int irq, void *dev_id, struct pt_regs *regs);
430static struct net_device_stats *mace_get_stats(struct net_device *dev);
431static int mace_rx(struct net_device *dev, unsigned char RxCnt);
432static void restore_multicast_list(struct net_device *dev);
433static void set_multicast_list(struct net_device *dev);
434static struct ethtool_ops netdev_ethtool_ops;
435
436
cc3b4866 437static void nmclan_detach(struct pcmcia_device *p_dev);
1da177e4
LT		 438
439/* ----------------------------------------------------------------------------
440nmclan_attach
441 Creates an "instance" of the driver, allocating local data
442 structures for one device. The device is registered with Card
443 Services.
444---------------------------------------------------------------------------- */
445
f8cfa618 446static int nmclan_attach(struct pcmcia_device *p_dev)
1da177e4
LT		 447{
448 mace_private *lp;
449 dev_link_t *link;
450 struct net_device *dev;
1da177e4
LT		 451
452 DEBUG(0, "nmclan_attach()\n");
453 DEBUG(1, "%s\n", rcsid);
454
455 /* Create new ethernet device */
456 dev = alloc_etherdev(sizeof(mace_private));
457 if (!dev)
f8cfa618 458 return -ENOMEM;
1da177e4
LT		 459 lp = netdev_priv(dev);
460 link = &lp->link;
461 link->priv = dev;
462
463 spin_lock_init(&lp->bank_lock);
464 link->io.NumPorts1 = 32;
465 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
466 link->io.IOAddrLines = 5;
467 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
468 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
469 link->irq.Handler = &mace_interrupt;
470 link->irq.Instance = dev;
471 link->conf.Attributes = CONF_ENABLE_IRQ;
472 link->conf.Vcc = 50;
473 link->conf.IntType = INT_MEMORY_AND_IO;
474 link->conf.ConfigIndex = 1;
475 link->conf.Present = PRESENT_OPTION;
476
477 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
478
479 SET_MODULE_OWNER(dev);
480 dev->hard_start_xmit = &mace_start_xmit;
481 dev->set_config = &mace_config;
482 dev->get_stats = &mace_get_stats;
483 dev->set_multicast_list = &set_multicast_list;
484 SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
485 dev->open = &mace_open;
486 dev->stop = &mace_close;
487#ifdef HAVE_TX_TIMEOUT
488 dev->tx_timeout = mace_tx_timeout;
489 dev->watchdog_timeo = TX_TIMEOUT;
490#endif
491
f8cfa618
DB		 492 link->handle = p_dev;
493 p_dev->instance = link;
494
495 link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
496 nmclan_config(link);
1da177e4 497
f8cfa618 498 return 0;
1da177e4
LT		 499} /* nmclan_attach */
500
501/* ----------------------------------------------------------------------------
502nmclan_detach
503 This deletes a driver "instance". The device is de-registered
504 with Card Services. If it has been released, all local data
505 structures are freed. Otherwise, the structures will be freed
506 when the device is released.
507---------------------------------------------------------------------------- */
508
cc3b4866 509static void nmclan_detach(struct pcmcia_device *p_dev)
1da177e4 510{
cc3b4866 511 dev_link_t *link = dev_to_instance(p_dev);
1da177e4 512 struct net_device *dev = link->priv;
1da177e4
LT		 513
514 DEBUG(0, "nmclan_detach(0x%p)\n", link);
515
1da177e4
LT		 516 if (link->dev)
517 unregister_netdev(dev);
518
519 if (link->state & DEV_CONFIG)
520 nmclan_release(link);
521
1da177e4
LT		 522 free_netdev(dev);
523} /* nmclan_detach */
524
525/* ----------------------------------------------------------------------------
526mace_read
527 Reads a MACE register. This is bank independent; however, the
528 caller must ensure that this call is not interruptable. We are
529 assuming that during normal operation, the MACE is always in
530 bank 0.
531---------------------------------------------------------------------------- */
532static int mace_read(mace_private *lp, kio_addr_t ioaddr, int reg)
533{
534 int data = 0xFF;
535 unsigned long flags;
536
537 switch (reg >> 4) {
538 case 0: /* register 0-15 */
539 data = inb(ioaddr + AM2150_MACE_BASE + reg);
540 break;
541 case 1: /* register 16-31 */
542 spin_lock_irqsave(&lp->bank_lock, flags);
543 MACEBANK(1);
544 data = inb(ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
545 MACEBANK(0);
546 spin_unlock_irqrestore(&lp->bank_lock, flags);
547 break;
548 }
549 return (data & 0xFF);
550} /* mace_read */
551
552/* ----------------------------------------------------------------------------
553mace_write
554 Writes to a MACE register. This is bank independent; however,
555 the caller must ensure that this call is not interruptable. We
556 are assuming that during normal operation, the MACE is always in
557 bank 0.
558---------------------------------------------------------------------------- */
559static void mace_write(mace_private *lp, kio_addr_t ioaddr, int reg, int data)
560{
561 unsigned long flags;
562
563 switch (reg >> 4) {
564 case 0: /* register 0-15 */
565 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + reg);
566 break;
567 case 1: /* register 16-31 */
568 spin_lock_irqsave(&lp->bank_lock, flags);
569 MACEBANK(1);
570 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
571 MACEBANK(0);
572 spin_unlock_irqrestore(&lp->bank_lock, flags);
573 break;
574 }
575} /* mace_write */
576
577/* ----------------------------------------------------------------------------
578mace_init
579 Resets the MACE chip.
580---------------------------------------------------------------------------- */
581static int mace_init(mace_private *lp, kio_addr_t ioaddr, char *enet_addr)
582{
583 int i;
584 int ct = 0;
585
586 /* MACE Software reset */
587 mace_write(lp, ioaddr, MACE_BIUCC, 1);
588 while (mace_read(lp, ioaddr, MACE_BIUCC) & 0x01) {
589 /* Wait for reset bit to be cleared automatically after <= 200ns */;
590 if(++ct > 500)
591 {
592 printk(KERN_ERR "mace: reset failed, card removed ?\n");
593 return -1;
594 }
595 udelay(1);
596 }
597 mace_write(lp, ioaddr, MACE_BIUCC, 0);
598
599 /* The Am2150 requires that the MACE FIFOs operate in burst mode. */
600 mace_write(lp, ioaddr, MACE_FIFOCC, 0x0F);
601
602 mace_write(lp,ioaddr, MACE_RCVFC, 0); /* Disable Auto Strip Receive */
603 mace_write(lp, ioaddr, MACE_IMR, 0xFF); /* Disable all interrupts until _open */
604
605 /*
606 * Bit 2-1 PORTSEL[1-0] Port Select.
607 * 00 AUI/10Base-2
608 * 01 10Base-T
609 * 10 DAI Port (reserved in Am2150)
610 * 11 GPSI
611 * For this card, only the first two are valid.
612 * So, PLSCC should be set to
613 * 0x00 for 10Base-2
614 * 0x02 for 10Base-T
615 * Or just set ASEL in PHYCC below!
616 */
617 switch (if_port) {
618 case 1:
619 mace_write(lp, ioaddr, MACE_PLSCC, 0x02);
620 break;
621 case 2:
622 mace_write(lp, ioaddr, MACE_PLSCC, 0x00);
623 break;
624 default:
625 mace_write(lp, ioaddr, MACE_PHYCC, /* ASEL */ 4);
626 /* ASEL Auto Select. When set, the PORTSEL[1-0] bits are overridden,
627 and the MACE device will automatically select the operating media
628 interface port. */
629 break;
630 }
631
632 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_PHYADDR);
633 /* Poll ADDRCHG bit */
634 ct = 0;
635 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
636 {
637 if(++ ct > 500)
638 {
639 printk(KERN_ERR "mace: ADDRCHG timeout, card removed ?\n");
640 return -1;
641 }
642 }
643 /* Set PADR register */
644 for (i = 0; i < ETHER_ADDR_LEN; i++)
645 mace_write(lp, ioaddr, MACE_PADR, enet_addr[i]);
646
647 /* MAC Configuration Control Register should be written last */
648 /* Let set_multicast_list set this. */
649 /* mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV); */
650 mace_write(lp, ioaddr, MACE_MACCC, 0x00);
651 return 0;
652} /* mace_init */
653
654/* ----------------------------------------------------------------------------
655nmclan_config
656 This routine is scheduled to run after a CARD_INSERTION event
657 is received, to configure the PCMCIA socket, and to make the
658 ethernet device available to the system.
659---------------------------------------------------------------------------- */
660
661#define CS_CHECK(fn, ret) \
662 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
663
664static void nmclan_config(dev_link_t *link)
665{
666 client_handle_t handle = link->handle;
667 struct net_device *dev = link->priv;
668 mace_private *lp = netdev_priv(dev);
669 tuple_t tuple;
670 cisparse_t parse;
671 u_char buf[64];
672 int i, last_ret, last_fn;
673 kio_addr_t ioaddr;
674
675 DEBUG(0, "nmclan_config(0x%p)\n", link);
676
677 tuple.Attributes = 0;
678 tuple.TupleData = buf;
679 tuple.TupleDataMax = 64;
680 tuple.TupleOffset = 0;
681 tuple.DesiredTuple = CISTPL_CONFIG;
682 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
683 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
684 CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
685 link->conf.ConfigBase = parse.config.base;
686
687 /* Configure card */
688 link->state |= DEV_CONFIG;
689
690 CS_CHECK(RequestIO, pcmcia_request_io(handle, &link->io));
691 CS_CHECK(RequestIRQ, pcmcia_request_irq(handle, &link->irq));
692 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(handle, &link->conf));
693 dev->irq = link->irq.AssignedIRQ;
694 dev->base_addr = link->io.BasePort1;
695
696 ioaddr = dev->base_addr;
697
698 /* Read the ethernet address from the CIS. */
699 tuple.DesiredTuple = 0x80 /* CISTPL_CFTABLE_ENTRY_MISC */;
700 tuple.TupleData = buf;
701 tuple.TupleDataMax = 64;
702 tuple.TupleOffset = 0;
703 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
704 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
705 memcpy(dev->dev_addr, tuple.TupleData, ETHER_ADDR_LEN);
706
707 /* Verify configuration by reading the MACE ID. */
708 {
709 char sig[2];
710
711 sig[0] = mace_read(lp, ioaddr, MACE_CHIPIDL);
712 sig[1] = mace_read(lp, ioaddr, MACE_CHIPIDH);
713 if ((sig[0] == 0x40) && ((sig[1] & 0x0F) == 0x09)) {
714 DEBUG(0, "nmclan_cs configured: mace id=%x %x\n",
715 sig[0], sig[1]);
716 } else {
717 printk(KERN_NOTICE "nmclan_cs: mace id not found: %x %x should"
718 " be 0x40 0x?9\n", sig[0], sig[1]);
719 link->state &= ~DEV_CONFIG_PENDING;
720 return;
721 }
722 }
723
724 if(mace_init(lp, ioaddr, dev->dev_addr) == -1)
725 goto failed;
726
727 /* The if_port symbol can be set when the module is loaded */
728 if (if_port <= 2)
729 dev->if_port = if_port;
730 else
731 printk(KERN_NOTICE "nmclan_cs: invalid if_port requested\n");
732
733 link->dev = &lp->node;
734 link->state &= ~DEV_CONFIG_PENDING;
735 SET_NETDEV_DEV(dev, &handle_to_dev(handle));
736
737 i = register_netdev(dev);
738 if (i != 0) {
739 printk(KERN_NOTICE "nmclan_cs: register_netdev() failed\n");
740 link->dev = NULL;
741 goto failed;
742 }
743
744 strcpy(lp->node.dev_name, dev->name);
745
746 printk(KERN_INFO "%s: nmclan: port %#3lx, irq %d, %s port, hw_addr ",
747 dev->name, dev->base_addr, dev->irq, if_names[dev->if_port]);
748 for (i = 0; i < 6; i++)
749 printk("%02X%s", dev->dev_addr[i], ((i<5) ? ":" : "\n"));
750 return;
751
752cs_failed:
753 cs_error(link->handle, last_fn, last_ret);
754failed:
755 nmclan_release(link);
756 return;
757
758} /* nmclan_config */
759
760/* ----------------------------------------------------------------------------
761nmclan_release
762 After a card is removed, nmclan_release() will unregister the
763 net device, and release the PCMCIA configuration. If the device
764 is still open, this will be postponed until it is closed.
765---------------------------------------------------------------------------- */
766static void nmclan_release(dev_link_t *link)
767{
5f2a71fc
DB		 768 DEBUG(0, "nmclan_release(0x%p)\n", link);
769 pcmcia_disable_device(link->handle);
1da177e4
LT		 770}
771
98e4c28b
DB		 772static int nmclan_suspend(struct pcmcia_device *p_dev)
773{
774 dev_link_t *link = dev_to_instance(p_dev);
775 struct net_device *dev = link->priv;
776
777 link->state |= DEV_SUSPEND;
778 if (link->state & DEV_CONFIG) {
779 if (link->open)
780 netif_device_detach(dev);
781 pcmcia_release_configuration(link->handle);
782 }
783
784
785 return 0;
786}
787
788static int nmclan_resume(struct pcmcia_device *p_dev)
789{
790 dev_link_t *link = dev_to_instance(p_dev);
791 struct net_device *dev = link->priv;
792
793 link->state &= ~DEV_SUSPEND;
794 if (link->state & DEV_CONFIG) {
795 pcmcia_request_configuration(link->handle, &link->conf);
796 if (link->open) {
797 nmclan_reset(dev);
798 netif_device_attach(dev);
799 }
800 }
801
802 return 0;
803}
804
1da177e4
LT		 805
806/* ----------------------------------------------------------------------------
807nmclan_reset
808 Reset and restore all of the Xilinx and MACE registers.
809---------------------------------------------------------------------------- */
810static void nmclan_reset(struct net_device *dev)
811{
812 mace_private *lp = netdev_priv(dev);
813
814#if RESET_XILINX
815 dev_link_t *link = &lp->link;
816 conf_reg_t reg;
817 u_long OrigCorValue;
818
819 /* Save original COR value */
820 reg.Function = 0;
821 reg.Action = CS_READ;
822 reg.Offset = CISREG_COR;
823 reg.Value = 0;
824 pcmcia_access_configuration_register(link->handle, &reg);
825 OrigCorValue = reg.Value;
826
827 /* Reset Xilinx */
828 reg.Action = CS_WRITE;
829 reg.Offset = CISREG_COR;
830 DEBUG(1, "nmclan_reset: OrigCorValue=0x%lX, resetting...\n",
831 OrigCorValue);
832 reg.Value = COR_SOFT_RESET;
833 pcmcia_access_configuration_register(link->handle, &reg);
834 /* Need to wait for 20 ms for PCMCIA to finish reset. */
835
836 /* Restore original COR configuration index */
837 reg.Value = COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK);
838 pcmcia_access_configuration_register(link->handle, &reg);
839 /* Xilinx is now completely reset along with the MACE chip. */
840 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
841
842#endif /* #if RESET_XILINX */
843
844 /* Xilinx is now completely reset along with the MACE chip. */
845 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
846
847 /* Reinitialize the MACE chip for operation. */
848 mace_init(lp, dev->base_addr, dev->dev_addr);
849 mace_write(lp, dev->base_addr, MACE_IMR, MACE_IMR_DEFAULT);
850
851 /* Restore the multicast list and enable TX and RX. */
852 restore_multicast_list(dev);
853} /* nmclan_reset */
854
855/* ----------------------------------------------------------------------------
856mace_config
857 [Someone tell me what this is supposed to do? Is if_port a defined
858 standard? If so, there should be defines to indicate 1=10Base-T,
859 2=10Base-2, etc. including limited automatic detection.]
860---------------------------------------------------------------------------- */
861static int mace_config(struct net_device *dev, struct ifmap *map)
862{
863 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
864 if (map->port <= 2) {
865 dev->if_port = map->port;
866 printk(KERN_INFO "%s: switched to %s port\n", dev->name,
867 if_names[dev->if_port]);
868 } else
869 return -EINVAL;
870 }
871 return 0;
872} /* mace_config */
873
874/* ----------------------------------------------------------------------------
875mace_open
876 Open device driver.
877---------------------------------------------------------------------------- */
878static int mace_open(struct net_device *dev)
879{
880 kio_addr_t ioaddr = dev->base_addr;
881 mace_private *lp = netdev_priv(dev);
882 dev_link_t *link = &lp->link;
883
884 if (!DEV_OK(link))
885 return -ENODEV;
886
887 link->open++;
888
889 MACEBANK(0);
890
891 netif_start_queue(dev);
892 nmclan_reset(dev);
893
894 return 0; /* Always succeed */
895} /* mace_open */
896
897/* ----------------------------------------------------------------------------
898mace_close
899 Closes device driver.
900---------------------------------------------------------------------------- */
901static int mace_close(struct net_device *dev)
902{
903 kio_addr_t ioaddr = dev->base_addr;
904 mace_private *lp = netdev_priv(dev);
905 dev_link_t *link = &lp->link;
906
907 DEBUG(2, "%s: shutting down ethercard.\n", dev->name);
908
909 /* Mask off all interrupts from the MACE chip. */
910 outb(0xFF, ioaddr + AM2150_MACE_BASE + MACE_IMR);
911
912 link->open--;
913 netif_stop_queue(dev);
914
915 return 0;
916} /* mace_close */
917
918static void netdev_get_drvinfo(struct net_device *dev,
919 struct ethtool_drvinfo *info)
920{
921 strcpy(info->driver, DRV_NAME);
922 strcpy(info->version, DRV_VERSION);
923 sprintf(info->bus_info, "PCMCIA 0x%lx", dev->base_addr);
924}
925
926#ifdef PCMCIA_DEBUG
927static u32 netdev_get_msglevel(struct net_device *dev)
928{
929 return pc_debug;
930}
931
932static void netdev_set_msglevel(struct net_device *dev, u32 level)
933{
934 pc_debug = level;
935}
936#endif /* PCMCIA_DEBUG */
937
938static struct ethtool_ops netdev_ethtool_ops = {
939 .get_drvinfo = netdev_get_drvinfo,
940#ifdef PCMCIA_DEBUG
941 .get_msglevel = netdev_get_msglevel,
942 .set_msglevel = netdev_set_msglevel,
943#endif /* PCMCIA_DEBUG */
944};
945
946/* ----------------------------------------------------------------------------
947mace_start_xmit
948 This routine begins the packet transmit function. When completed,
949 it will generate a transmit interrupt.
950
951 According to /usr/src/linux/net/inet/dev.c, if _start_xmit
952 returns 0, the "packet is now solely the responsibility of the
953 driver." If _start_xmit returns non-zero, the "transmission
954 failed, put skb back into a list."
955---------------------------------------------------------------------------- */
956
957static void mace_tx_timeout(struct net_device *dev)
958{
959 mace_private *lp = netdev_priv(dev);
960 dev_link_t *link = &lp->link;
961
962 printk(KERN_NOTICE "%s: transmit timed out -- ", dev->name);
963#if RESET_ON_TIMEOUT
964 printk("resetting card\n");
965 pcmcia_reset_card(link->handle, NULL);
966#else /* #if RESET_ON_TIMEOUT */
967 printk("NOT resetting card\n");
968#endif /* #if RESET_ON_TIMEOUT */
969 dev->trans_start = jiffies;
970 netif_wake_queue(dev);
971}
972
973static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev)
974{
975 mace_private *lp = netdev_priv(dev);
976 kio_addr_t ioaddr = dev->base_addr;
977
978 netif_stop_queue(dev);
979
980 DEBUG(3, "%s: mace_start_xmit(length = %ld) called.\n",
981 dev->name, (long)skb->len);
982
983#if (!TX_INTERRUPTABLE)
984 /* Disable MACE TX interrupts. */
985 outb(MACE_IMR_DEFAULT | MACE_IR_XMTINT,
986 ioaddr + AM2150_MACE_BASE + MACE_IMR);
987 lp->tx_irq_disabled=1;
988#endif /* #if (!TX_INTERRUPTABLE) */
989
990 {
991 /* This block must not be interrupted by another transmit request!
992 mace_tx_timeout will take care of timer-based retransmissions from
993 the upper layers. The interrupt handler is guaranteed never to
994 service a transmit interrupt while we are in here.
995 */
996
997 lp->linux_stats.tx_bytes += skb->len;
998 lp->tx_free_frames--;
999
1000 /* WARNING: Write the _exact_ number of bytes written in the header! */
1001 /* Put out the word header [must be an outw()] . . . */
1002 outw(skb->len, ioaddr + AM2150_XMT);
1003 /* . . . and the packet [may be any combination of outw() and outb()] */
1004 outsw(ioaddr + AM2150_XMT, skb->data, skb->len >> 1);
1005 if (skb->len & 1) {
1006 /* Odd byte transfer */
1007 outb(skb->data[skb->len-1], ioaddr + AM2150_XMT);
1008 }
1009
1010 dev->trans_start = jiffies;
1011
1012#if MULTI_TX
1013 if (lp->tx_free_frames > 0)
1014 netif_start_queue(dev);
1015#endif /* #if MULTI_TX */
1016 }
1017
1018#if (!TX_INTERRUPTABLE)
1019 /* Re-enable MACE TX interrupts. */
1020 lp->tx_irq_disabled=0;
1021 outb(MACE_IMR_DEFAULT, ioaddr + AM2150_MACE_BASE + MACE_IMR);
1022#endif /* #if (!TX_INTERRUPTABLE) */
1023
1024 dev_kfree_skb(skb);
1025
1026 return 0;
1027} /* mace_start_xmit */
1028
1029/* ----------------------------------------------------------------------------
1030mace_interrupt
1031 The interrupt handler.
1032---------------------------------------------------------------------------- */
1033static irqreturn_t mace_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1034{
1035 struct net_device *dev = (struct net_device *) dev_id;
1036 mace_private *lp = netdev_priv(dev);
1037 kio_addr_t ioaddr = dev->base_addr;
1038 int status;
1039 int IntrCnt = MACE_MAX_IR_ITERATIONS;
1040
1041 if (dev == NULL) {
1042 DEBUG(2, "mace_interrupt(): irq 0x%X for unknown device.\n",
1043 irq);
1044 return IRQ_NONE;
1045 }
1046
1047 if (lp->tx_irq_disabled) {
1048 printk(
1049 (lp->tx_irq_disabled?
1050 KERN_NOTICE "%s: Interrupt with tx_irq_disabled "
1051 "[isr=%02X, imr=%02X]\n":
1052 KERN_NOTICE "%s: Re-entering the interrupt handler "
1053 "[isr=%02X, imr=%02X]\n"),
1054 dev->name,
1055 inb(ioaddr + AM2150_MACE_BASE + MACE_IR),
1056 inb(ioaddr + AM2150_MACE_BASE + MACE_IMR)
1057 );
1058 /* WARNING: MACE_IR has been read! */
1059 return IRQ_NONE;
1060 }
1061
1062 if (!netif_device_present(dev)) {
1063 DEBUG(2, "%s: interrupt from dead card\n", dev->name);
1064 return IRQ_NONE;
1065 }
1066
1067 do {
1068 /* WARNING: MACE_IR is a READ/CLEAR port! */
1069 status = inb(ioaddr + AM2150_MACE_BASE + MACE_IR);
1070
1071 DEBUG(3, "mace_interrupt: irq 0x%X status 0x%X.\n", irq, status);
1072
1073 if (status & MACE_IR_RCVINT) {
1074 mace_rx(dev, MACE_MAX_RX_ITERATIONS);
1075 }
1076
1077 if (status & MACE_IR_XMTINT) {
1078 unsigned char fifofc;
1079 unsigned char xmtrc;
1080 unsigned char xmtfs;
1081
1082 fifofc = inb(ioaddr + AM2150_MACE_BASE + MACE_FIFOFC);
1083 if ((fifofc & MACE_FIFOFC_XMTFC)==0) {
1084 lp->linux_stats.tx_errors++;
1085 outb(0xFF, ioaddr + AM2150_XMT_SKIP);
1086 }
1087
1088 /* Transmit Retry Count (XMTRC, reg 4) */
1089 xmtrc = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTRC);
1090 if (xmtrc & MACE_XMTRC_EXDEF) lp->mace_stats.exdef++;
1091 lp->mace_stats.xmtrc += (xmtrc & MACE_XMTRC_XMTRC);
1092
1093 if (
1094 (xmtfs = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTFS)) &
1095 MACE_XMTFS_XMTSV /* Transmit Status Valid */
1096 ) {
1097 lp->mace_stats.xmtsv++;
1098
1099 if (xmtfs & ~MACE_XMTFS_XMTSV) {
1100 if (xmtfs & MACE_XMTFS_UFLO) {
1101 /* Underflow. Indicates that the Transmit FIFO emptied before
1102 the end of frame was reached. */
1103 lp->mace_stats.uflo++;
1104 }
1105 if (xmtfs & MACE_XMTFS_LCOL) {
1106 /* Late Collision */
1107 lp->mace_stats.lcol++;
1108 }
1109 if (xmtfs & MACE_XMTFS_MORE) {
1110 /* MORE than one retry was needed */
1111 lp->mace_stats.more++;
1112 }
1113 if (xmtfs & MACE_XMTFS_ONE) {
1114 /* Exactly ONE retry occurred */
1115 lp->mace_stats.one++;
1116 }
1117 if (xmtfs & MACE_XMTFS_DEFER) {
1118 /* Transmission was defered */
1119 lp->mace_stats.defer++;
1120 }
1121 if (xmtfs & MACE_XMTFS_LCAR) {
1122 /* Loss of carrier */
1123 lp->mace_stats.lcar++;
1124 }
1125 if (xmtfs & MACE_XMTFS_RTRY) {
1126 /* Retry error: transmit aborted after 16 attempts */
1127 lp->mace_stats.rtry++;
1128 }
1129 } /* if (xmtfs & ~MACE_XMTFS_XMTSV) */
1130
1131 } /* if (xmtfs & MACE_XMTFS_XMTSV) */
1132
1133 lp->linux_stats.tx_packets++;
1134 lp->tx_free_frames++;
1135 netif_wake_queue(dev);
1136 } /* if (status & MACE_IR_XMTINT) */
1137
1138 if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) {
1139 if (status & MACE_IR_JAB) {
1140 /* Jabber Error. Excessive transmit duration (20-150ms). */
1141 lp->mace_stats.jab++;
1142 }
1143 if (status & MACE_IR_BABL) {
1144 /* Babble Error. >1518 bytes transmitted. */
1145 lp->mace_stats.babl++;
1146 }
1147 if (status & MACE_IR_CERR) {
1148 /* Collision Error. CERR indicates the absence of the
1149 Signal Quality Error Test message after a packet
1150 transmission. */
1151 lp->mace_stats.cerr++;
1152 }
1153 if (status & MACE_IR_RCVCCO) {
1154 /* Receive Collision Count Overflow; */
1155 lp->mace_stats.rcvcco++;
1156 }
1157 if (status & MACE_IR_RNTPCO) {
1158 /* Runt Packet Count Overflow */
1159 lp->mace_stats.rntpco++;
1160 }
1161 if (status & MACE_IR_MPCO) {
1162 /* Missed Packet Count Overflow */
1163 lp->mace_stats.mpco++;
1164 }
1165 } /* if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) */
1166
1167 } while ((status & ~MACE_IMR_DEFAULT) && (--IntrCnt));
1168
1169 return IRQ_HANDLED;
1170} /* mace_interrupt */
1171
1172/* ----------------------------------------------------------------------------
1173mace_rx
1174 Receives packets.
1175---------------------------------------------------------------------------- */
1176static int mace_rx(struct net_device *dev, unsigned char RxCnt)
1177{
1178 mace_private *lp = netdev_priv(dev);
1179 kio_addr_t ioaddr = dev->base_addr;
1180 unsigned char rx_framecnt;
1181 unsigned short rx_status;
1182
1183 while (
1184 ((rx_framecnt = inb(ioaddr + AM2150_RCV_FRAME_COUNT)) > 0) &&
1185 (rx_framecnt <= 12) && /* rx_framecnt==0xFF if card is extracted. */
1186 (RxCnt--)
1187 ) {
1188 rx_status = inw(ioaddr + AM2150_RCV);
1189
1190 DEBUG(3, "%s: in mace_rx(), framecnt 0x%X, rx_status"
1191 " 0x%X.\n", dev->name, rx_framecnt, rx_status);
1192
1193 if (rx_status & MACE_RCVFS_RCVSTS) { /* Error, update stats. */
1194 lp->linux_stats.rx_errors++;
1195 if (rx_status & MACE_RCVFS_OFLO) {
1196 lp->mace_stats.oflo++;
1197 }
1198 if (rx_status & MACE_RCVFS_CLSN) {
1199 lp->mace_stats.clsn++;
1200 }
1201 if (rx_status & MACE_RCVFS_FRAM) {
1202 lp->mace_stats.fram++;
1203 }
1204 if (rx_status & MACE_RCVFS_FCS) {
1205 lp->mace_stats.fcs++;
1206 }
1207 } else {
1208 short pkt_len = (rx_status & ~MACE_RCVFS_RCVSTS) - 4;
1209 /* Auto Strip is off, always subtract 4 */
1210 struct sk_buff *skb;
1211
1212 lp->mace_stats.rfs_rntpc += inb(ioaddr + AM2150_RCV);
1213 /* runt packet count */
1214 lp->mace_stats.rfs_rcvcc += inb(ioaddr + AM2150_RCV);
1215 /* rcv collision count */
1216
1217 DEBUG(3, " receiving packet size 0x%X rx_status"
1218 " 0x%X.\n", pkt_len, rx_status);
1219
1220 skb = dev_alloc_skb(pkt_len+2);
1221
1222 if (skb != NULL) {
1223 skb->dev = dev;
1224
1225 skb_reserve(skb, 2);
1226 insw(ioaddr + AM2150_RCV, skb_put(skb, pkt_len), pkt_len>>1);
1227 if (pkt_len & 1)
1228 *(skb->tail-1) = inb(ioaddr + AM2150_RCV);
1229 skb->protocol = eth_type_trans(skb, dev);
1230
1231 netif_rx(skb); /* Send the packet to the upper (protocol) layers. */
1232
1233 dev->last_rx = jiffies;
1234 lp->linux_stats.rx_packets++;
1235 lp->linux_stats.rx_bytes += skb->len;
1236 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1237 continue;
1238 } else {
1239 DEBUG(1, "%s: couldn't allocate a sk_buff of size"
1240 " %d.\n", dev->name, pkt_len);
1241 lp->linux_stats.rx_dropped++;
1242 }
1243 }
1244 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1245 } /* while */
1246
1247 return 0;
1248} /* mace_rx */
1249
1250/* ----------------------------------------------------------------------------
1251pr_linux_stats
1252---------------------------------------------------------------------------- */
1253static void pr_linux_stats(struct net_device_stats *pstats)
1254{
1255 DEBUG(2, "pr_linux_stats\n");
1256 DEBUG(2, " rx_packets=%-7ld tx_packets=%ld\n",
1257 (long)pstats->rx_packets, (long)pstats->tx_packets);
1258 DEBUG(2, " rx_errors=%-7ld tx_errors=%ld\n",
1259 (long)pstats->rx_errors, (long)pstats->tx_errors);
1260 DEBUG(2, " rx_dropped=%-7ld tx_dropped=%ld\n",
1261 (long)pstats->rx_dropped, (long)pstats->tx_dropped);
1262 DEBUG(2, " multicast=%-7ld collisions=%ld\n",
1263 (long)pstats->multicast, (long)pstats->collisions);
1264
1265 DEBUG(2, " rx_length_errors=%-7ld rx_over_errors=%ld\n",
1266 (long)pstats->rx_length_errors, (long)pstats->rx_over_errors);
1267 DEBUG(2, " rx_crc_errors=%-7ld rx_frame_errors=%ld\n",
1268 (long)pstats->rx_crc_errors, (long)pstats->rx_frame_errors);
1269 DEBUG(2, " rx_fifo_errors=%-7ld rx_missed_errors=%ld\n",
1270 (long)pstats->rx_fifo_errors, (long)pstats->rx_missed_errors);
1271
1272 DEBUG(2, " tx_aborted_errors=%-7ld tx_carrier_errors=%ld\n",
1273 (long)pstats->tx_aborted_errors, (long)pstats->tx_carrier_errors);
1274 DEBUG(2, " tx_fifo_errors=%-7ld tx_heartbeat_errors=%ld\n",
1275 (long)pstats->tx_fifo_errors, (long)pstats->tx_heartbeat_errors);
1276 DEBUG(2, " tx_window_errors=%ld\n",
1277 (long)pstats->tx_window_errors);
1278} /* pr_linux_stats */
1279
1280/* ----------------------------------------------------------------------------
1281pr_mace_stats
1282---------------------------------------------------------------------------- */
1283static void pr_mace_stats(mace_statistics *pstats)
1284{
1285 DEBUG(2, "pr_mace_stats\n");
1286
1287 DEBUG(2, " xmtsv=%-7d uflo=%d\n",
1288 pstats->xmtsv, pstats->uflo);
1289 DEBUG(2, " lcol=%-7d more=%d\n",
1290 pstats->lcol, pstats->more);
1291 DEBUG(2, " one=%-7d defer=%d\n",
1292 pstats->one, pstats->defer);
1293 DEBUG(2, " lcar=%-7d rtry=%d\n",
1294 pstats->lcar, pstats->rtry);
1295
1296 /* MACE_XMTRC */
1297 DEBUG(2, " exdef=%-7d xmtrc=%d\n",
1298 pstats->exdef, pstats->xmtrc);
1299
1300 /* RFS1--Receive Status (RCVSTS) */
1301 DEBUG(2, " oflo=%-7d clsn=%d\n",
1302 pstats->oflo, pstats->clsn);
1303 DEBUG(2, " fram=%-7d fcs=%d\n",
1304 pstats->fram, pstats->fcs);
1305
1306 /* RFS2--Runt Packet Count (RNTPC) */
1307 /* RFS3--Receive Collision Count (RCVCC) */
1308 DEBUG(2, " rfs_rntpc=%-7d rfs_rcvcc=%d\n",
1309 pstats->rfs_rntpc, pstats->rfs_rcvcc);
1310
1311 /* MACE_IR */
1312 DEBUG(2, " jab=%-7d babl=%d\n",
1313 pstats->jab, pstats->babl);
1314 DEBUG(2, " cerr=%-7d rcvcco=%d\n",
1315 pstats->cerr, pstats->rcvcco);
1316 DEBUG(2, " rntpco=%-7d mpco=%d\n",
1317 pstats->rntpco, pstats->mpco);
1318
1319 /* MACE_MPC */
1320 DEBUG(2, " mpc=%d\n", pstats->mpc);
1321
1322 /* MACE_RNTPC */
1323 DEBUG(2, " rntpc=%d\n", pstats->rntpc);
1324
1325 /* MACE_RCVCC */
1326 DEBUG(2, " rcvcc=%d\n", pstats->rcvcc);
1327
1328} /* pr_mace_stats */
1329
1330/* ----------------------------------------------------------------------------
1331update_stats
1332 Update statistics. We change to register window 1, so this
1333 should be run single-threaded if the device is active. This is
1334 expected to be a rare operation, and it's simpler for the rest
1335 of the driver to assume that window 0 is always valid rather
1336 than use a special window-state variable.
1337
1338 oflo & uflo should _never_ occur since it would mean the Xilinx
1339 was not able to transfer data between the MACE FIFO and the
1340 card's SRAM fast enough. If this happens, something is
1341 seriously wrong with the hardware.
1342---------------------------------------------------------------------------- */
1343static void update_stats(kio_addr_t ioaddr, struct net_device *dev)
1344{
1345 mace_private *lp = netdev_priv(dev);
1346
1347 lp->mace_stats.rcvcc += mace_read(lp, ioaddr, MACE_RCVCC);
1348 lp->mace_stats.rntpc += mace_read(lp, ioaddr, MACE_RNTPC);
1349 lp->mace_stats.mpc += mace_read(lp, ioaddr, MACE_MPC);
1350 /* At this point, mace_stats is fully updated for this call.
1351 We may now update the linux_stats. */
1352
1353 /* The MACE has no equivalent for linux_stats field which are commented
1354 out. */
1355
1356 /* lp->linux_stats.multicast; */
1357 lp->linux_stats.collisions =
1358 lp->mace_stats.rcvcco * 256 + lp->mace_stats.rcvcc;
1359 /* Collision: The MACE may retry sending a packet 15 times
1360 before giving up. The retry count is in XMTRC.
1361 Does each retry constitute a collision?
1362 If so, why doesn't the RCVCC record these collisions? */
1363
1364 /* detailed rx_errors: */
1365 lp->linux_stats.rx_length_errors =
1366 lp->mace_stats.rntpco * 256 + lp->mace_stats.rntpc;
1367 /* lp->linux_stats.rx_over_errors */
1368 lp->linux_stats.rx_crc_errors = lp->mace_stats.fcs;
1369 lp->linux_stats.rx_frame_errors = lp->mace_stats.fram;
1370 lp->linux_stats.rx_fifo_errors = lp->mace_stats.oflo;
1371 lp->linux_stats.rx_missed_errors =
1372 lp->mace_stats.mpco * 256 + lp->mace_stats.mpc;
1373
1374 /* detailed tx_errors */
1375 lp->linux_stats.tx_aborted_errors = lp->mace_stats.rtry;
1376 lp->linux_stats.tx_carrier_errors = lp->mace_stats.lcar;
1377 /* LCAR usually results from bad cabling. */
1378 lp->linux_stats.tx_fifo_errors = lp->mace_stats.uflo;
1379 lp->linux_stats.tx_heartbeat_errors = lp->mace_stats.cerr;
1380 /* lp->linux_stats.tx_window_errors; */
1381
1382 return;
1383} /* update_stats */
1384
1385/* ----------------------------------------------------------------------------
1386mace_get_stats
1387 Gathers ethernet statistics from the MACE chip.
1388---------------------------------------------------------------------------- */
1389static struct net_device_stats *mace_get_stats(struct net_device *dev)
1390{
1391 mace_private *lp = netdev_priv(dev);
1392
1393 update_stats(dev->base_addr, dev);
1394
1395 DEBUG(1, "%s: updating the statistics.\n", dev->name);
1396 pr_linux_stats(&lp->linux_stats);
1397 pr_mace_stats(&lp->mace_stats);
1398
1399 return &lp->linux_stats;
1400} /* net_device_stats */
1401
1402/* ----------------------------------------------------------------------------
1403updateCRC
1404 Modified from Am79C90 data sheet.
1405---------------------------------------------------------------------------- */
1406
1407#ifdef BROKEN_MULTICAST
1408
1409static void updateCRC(int *CRC, int bit)
1410{
1411 int poly[]={
1412 1,1,1,0, 1,1,0,1,
1413 1,0,1,1, 1,0,0,0,
1414 1,0,0,0, 0,0,1,1,
1415 0,0,1,0, 0,0,0,0
1416 }; /* CRC polynomial. poly[n] = coefficient of the x**n term of the
1417 CRC generator polynomial. */
1418
1419 int j;
1420
1421 /* shift CRC and control bit (CRC[32]) */
1422 for (j = 32; j > 0; j--)
1423 CRC[j] = CRC[j-1];
1424 CRC[0] = 0;
1425
1426 /* If bit XOR(control bit) = 1, set CRC = CRC XOR polynomial. */
1427 if (bit ^ CRC[32])
1428 for (j = 0; j < 32; j++)
1429 CRC[j] ^= poly[j];
1430} /* updateCRC */
1431
1432/* ----------------------------------------------------------------------------
1433BuildLAF
1434 Build logical address filter.
1435 Modified from Am79C90 data sheet.
1436
1437Input
1438 ladrf: logical address filter (contents initialized to 0)
1439 adr: ethernet address
1440---------------------------------------------------------------------------- */
1441static void BuildLAF(int *ladrf, int *adr)
1442{
1443 int CRC[33]={1}; /* CRC register, 1 word/bit + extra control bit */
1444
1445 int i, byte; /* temporary array indices */
1446 int hashcode; /* the output object */
1447
1448 CRC[32]=0;
1449
1450 for (byte = 0; byte < 6; byte++)
1451 for (i = 0; i < 8; i++)
1452 updateCRC(CRC, (adr[byte] >> i) & 1);
1453
1454 hashcode = 0;
1455 for (i = 0; i < 6; i++)
1456 hashcode = (hashcode << 1) + CRC[i];
1457
1458 byte = hashcode >> 3;
1459 ladrf[byte] |= (1 << (hashcode & 7));
1460
1461#ifdef PCMCIA_DEBUG
1462 if (pc_debug > 2) {
1463 printk(KERN_DEBUG " adr =");
1464 for (i = 0; i < 6; i++)
1465 printk(" %02X", adr[i]);
1466 printk("\n" KERN_DEBUG " hashcode = %d(decimal), ladrf[0:63]"
1467 " =", hashcode);
1468 for (i = 0; i < 8; i++)
1469 printk(" %02X", ladrf[i]);
1470 printk("\n");
1471 }
1472#endif
1473} /* BuildLAF */
1474
1475/* ----------------------------------------------------------------------------
1476restore_multicast_list
1477 Restores the multicast filter for MACE chip to the last
1478 set_multicast_list() call.
1479
1480Input
1481 multicast_num_addrs
1482 multicast_ladrf[]
1483---------------------------------------------------------------------------- */
1484static void restore_multicast_list(struct net_device *dev)
1485{
1486 mace_private *lp = netdev_priv(dev);
1487 int num_addrs = lp->multicast_num_addrs;
1488 int *ladrf = lp->multicast_ladrf;
1489 kio_addr_t ioaddr = dev->base_addr;
1490 int i;
1491
1492 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n",
1493 dev->name, num_addrs);
1494
1495 if (num_addrs > 0) {
1496
1497 DEBUG(1, "Attempt to restore multicast list detected.\n");
1498
1499 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_LOGADDR);
1500 /* Poll ADDRCHG bit */
1501 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
1502 ;
1503 /* Set LADRF register */
1504 for (i = 0; i < MACE_LADRF_LEN; i++)
1505 mace_write(lp, ioaddr, MACE_LADRF, ladrf[i]);
1506
1507 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_RCVFCSE | MACE_UTR_LOOP_EXTERNAL);
1508 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1509
1510 } else if (num_addrs < 0) {
1511
1512 /* Promiscuous mode: receive all packets */
1513 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1514 mace_write(lp, ioaddr, MACE_MACCC,
1515 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1516 );
1517
1518 } else {
1519
1520 /* Normal mode */
1521 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1522 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1523
1524 }
1525} /* restore_multicast_list */
1526
1527/* ----------------------------------------------------------------------------
1528set_multicast_list
1529 Set or clear the multicast filter for this adaptor.
1530
1531Input
1532 num_addrs == -1 Promiscuous mode, receive all packets
1533 num_addrs == 0 Normal mode, clear multicast list
1534 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1535 best-effort filtering.
1536Output
1537 multicast_num_addrs
1538 multicast_ladrf[]
1539---------------------------------------------------------------------------- */
1540
1541static void set_multicast_list(struct net_device *dev)
1542{
1543 mace_private *lp = netdev_priv(dev);
1544 int adr[ETHER_ADDR_LEN] = {0}; /* Ethernet address */
1545 int i;
1546 struct dev_mc_list *dmi = dev->mc_list;
1547
1548#ifdef PCMCIA_DEBUG
1549 if (pc_debug > 1) {
1550 static int old;
1551 if (dev->mc_count != old) {
1552 old = dev->mc_count;
1553 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1554 dev->name, old);
1555 }
1556 }
1557#endif
1558
1559 /* Set multicast_num_addrs. */
1560 lp->multicast_num_addrs = dev->mc_count;
1561
1562 /* Set multicast_ladrf. */
1563 if (num_addrs > 0) {
1564 /* Calculate multicast logical address filter */
1565 memset(lp->multicast_ladrf, 0, MACE_LADRF_LEN);
1566 for (i = 0; i < dev->mc_count; i++) {
1567 memcpy(adr, dmi->dmi_addr, ETHER_ADDR_LEN);
1568 dmi = dmi->next;
1569 BuildLAF(lp->multicast_ladrf, adr);
1570 }
1571 }
1572
1573 restore_multicast_list(dev);
1574
1575} /* set_multicast_list */
1576
1577#endif /* BROKEN_MULTICAST */
1578
1579static void restore_multicast_list(struct net_device *dev)
1580{
1581 kio_addr_t ioaddr = dev->base_addr;
1582 mace_private *lp = netdev_priv(dev);
1583
1584 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n", dev->name,
1585 lp->multicast_num_addrs);
1586
1587 if (dev->flags & IFF_PROMISC) {
1588 /* Promiscuous mode: receive all packets */
1589 mace_write(lp,ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1590 mace_write(lp, ioaddr, MACE_MACCC,
1591 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1592 );
1593 } else {
1594 /* Normal mode */
1595 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1596 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1597 }
1598} /* restore_multicast_list */
1599
1600static void set_multicast_list(struct net_device *dev)
1601{
1602 mace_private *lp = netdev_priv(dev);
1603
1604#ifdef PCMCIA_DEBUG
1605 if (pc_debug > 1) {
1606 static int old;
1607 if (dev->mc_count != old) {
1608 old = dev->mc_count;
1609 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1610 dev->name, old);
1611 }
1612 }
1613#endif
1614
1615 lp->multicast_num_addrs = dev->mc_count;
1616 restore_multicast_list(dev);
1617
1618} /* set_multicast_list */
1619
a58e26cb
DB		 1620static struct pcmcia_device_id nmclan_ids[] = {
1621 PCMCIA_DEVICE_PROD_ID12("New Media Corporation", "Ethernet", 0x085a850b, 0x00b2e941),
d277ad0e 1622 PCMCIA_DEVICE_PROD_ID12("Portable Add-ons", "Ethernet+", 0xebf1d60, 0xad673aaf),
a58e26cb
DB		 1623 PCMCIA_DEVICE_NULL,
1624};
1625MODULE_DEVICE_TABLE(pcmcia, nmclan_ids);
1626
1da177e4
LT		 1627static struct pcmcia_driver nmclan_cs_driver = {
1628 .owner = THIS_MODULE,
1629 .drv = {
1630 .name = "nmclan_cs",
1631 },
f8cfa618 1632 .probe = nmclan_attach,
cc3b4866 1633 .remove = nmclan_detach,
a58e26cb 1634 .id_table = nmclan_ids,
98e4c28b
DB		 1635 .suspend = nmclan_suspend,
1636 .resume = nmclan_resume,
1da177e4
LT		 1637};
1638
1639static int __init init_nmclan_cs(void)
1640{
1641 return pcmcia_register_driver(&nmclan_cs_driver);
1642}
1643
1644static void __exit exit_nmclan_cs(void)
1645{
1646 pcmcia_unregister_driver(&nmclan_cs_driver);
1da177e4
LT		 1647}
1648
1649module_init(init_nmclan_cs);
1650module_exit(exit_nmclan_cs);
Linux 6.x block layer and io_uring tree(s)