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pasemi_mac: Minor cleanup / define fixes
[linux-2.6-block.git] / drivers / net / pasemi_mac.c
CommitLineData
f5cd7872
OJ		 1/*
2 * Copyright (C) 2006-2007 PA Semi, Inc
3 *
4 * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/init.h>
21#include <linux/module.h>
22#include <linux/pci.h>
23#include <linux/interrupt.h>
24#include <linux/dmaengine.h>
25#include <linux/delay.h>
26#include <linux/netdevice.h>
27#include <linux/etherdevice.h>
28#include <asm/dma-mapping.h>
29#include <linux/in.h>
30#include <linux/skbuff.h>
31
32#include <linux/ip.h>
33#include <linux/tcp.h>
34#include <net/checksum.h>
35
771f7404
OJ		 36#include <asm/irq.h>
37
f5cd7872
OJ		 38#include "pasemi_mac.h"
39
40
41/* TODO list
42 *
43 * - Get rid of pci_{read,write}_config(), map registers with ioremap
44 * for performance
45 * - PHY support
46 * - Multicast support
47 * - Large MTU support
48 * - Other performance improvements
49 */
50
51
52/* Must be a power of two */
53#define RX_RING_SIZE 512
54#define TX_RING_SIZE 512
55
56#define TX_DESC(mac, num) ((mac)->tx->desc[(num) & (TX_RING_SIZE-1)])
57#define TX_DESC_INFO(mac, num) ((mac)->tx->desc_info[(num) & (TX_RING_SIZE-1)])
58#define RX_DESC(mac, num) ((mac)->rx->desc[(num) & (RX_RING_SIZE-1)])
59#define RX_DESC_INFO(mac, num) ((mac)->rx->desc_info[(num) & (RX_RING_SIZE-1)])
60#define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
61
62#define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
63
f5cd7872
OJ		 64static struct pasdma_status *dma_status;
65
66static int pasemi_get_mac_addr(struct pasemi_mac *mac)
67{
68 struct pci_dev *pdev = mac->pdev;
69 struct device_node *dn = pci_device_to_OF_node(pdev);
70 const u8 *maddr;
71 u8 addr[6];
72
73 if (!dn) {
74 dev_dbg(&pdev->dev,
75 "No device node for mac, not configuring\n");
76 return -ENOENT;
77 }
78
79 maddr = get_property(dn, "mac-address", NULL);
80 if (maddr == NULL) {
81 dev_warn(&pdev->dev,
82 "no mac address in device tree, not configuring\n");
83 return -ENOENT;
84 }
85
86 if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
87 &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
88 dev_warn(&pdev->dev,
89 "can't parse mac address, not configuring\n");
90 return -EINVAL;
91 }
92
93 memcpy(mac->mac_addr, addr, sizeof(addr));
94 return 0;
95}
96
97static int pasemi_mac_setup_rx_resources(struct net_device *dev)
98{
99 struct pasemi_mac_rxring *ring;
100 struct pasemi_mac *mac = netdev_priv(dev);
101 int chan_id = mac->dma_rxch;
102
103 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
104
105 if (!ring)
106 goto out_ring;
107
108 spin_lock_init(&ring->lock);
109
110 ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
111 RX_RING_SIZE, GFP_KERNEL);
112
113 if (!ring->desc_info)
114 goto out_desc_info;
115
116 /* Allocate descriptors */
117 ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
118 RX_RING_SIZE *
119 sizeof(struct pas_dma_xct_descr),
120 &ring->dma, GFP_KERNEL);
121
122 if (!ring->desc)
123 goto out_desc;
124
125 memset(ring->desc, 0, RX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
126
127 ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
128 RX_RING_SIZE * sizeof(u64),
129 &ring->buf_dma, GFP_KERNEL);
130 if (!ring->buffers)
131 goto out_buffers;
132
133 memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
134
135 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_BASEL(chan_id),
136 PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
137
138 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_BASEU(chan_id),
139 PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
140 PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 2));
141
142 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_CFG(chan_id),
143 PAS_DMA_RXCHAN_CFG_HBU(1));
144
145 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXINT_BASEL(mac->dma_if),
146 PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
147
148 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXINT_BASEU(mac->dma_if),
149 PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
150 PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
151
152 ring->next_to_fill = 0;
153 ring->next_to_clean = 0;
154
155 snprintf(ring->irq_name, sizeof(ring->irq_name),
156 "%s rx", dev->name);
157 mac->rx = ring;
158
159 return 0;
160
161out_buffers:
162 dma_free_coherent(&mac->dma_pdev->dev,
163 RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
164 mac->rx->desc, mac->rx->dma);
165out_desc:
166 kfree(ring->desc_info);
167out_desc_info:
168 kfree(ring);
169out_ring:
170 return -ENOMEM;
171}
172
173
174static int pasemi_mac_setup_tx_resources(struct net_device *dev)
175{
176 struct pasemi_mac *mac = netdev_priv(dev);
177 u32 val;
178 int chan_id = mac->dma_txch;
179 struct pasemi_mac_txring *ring;
180
181 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
182 if (!ring)
183 goto out_ring;
184
185 spin_lock_init(&ring->lock);
186
187 ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
188 TX_RING_SIZE, GFP_KERNEL);
189 if (!ring->desc_info)
190 goto out_desc_info;
191
192 /* Allocate descriptors */
193 ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
194 TX_RING_SIZE *
195 sizeof(struct pas_dma_xct_descr),
196 &ring->dma, GFP_KERNEL);
197 if (!ring->desc)
198 goto out_desc;
199
200 memset(ring->desc, 0, TX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
201
202 pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_BASEL(chan_id),
203 PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
204 val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
205 val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 2);
206
207 pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_BASEU(chan_id), val);
208
209 pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_CFG(chan_id),
210 PAS_DMA_TXCHAN_CFG_TY_IFACE |
211 PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
212 PAS_DMA_TXCHAN_CFG_UP |
213 PAS_DMA_TXCHAN_CFG_WT(2));
214
215 ring->next_to_use = 0;
216 ring->next_to_clean = 0;
217
218 snprintf(ring->irq_name, sizeof(ring->irq_name),
219 "%s tx", dev->name);
220 mac->tx = ring;
221
222 return 0;
223
224out_desc:
225 kfree(ring->desc_info);
226out_desc_info:
227 kfree(ring);
228out_ring:
229 return -ENOMEM;
230}
231
232static void pasemi_mac_free_tx_resources(struct net_device *dev)
233{
234 struct pasemi_mac *mac = netdev_priv(dev);
235 unsigned int i;
236 struct pasemi_mac_buffer *info;
237 struct pas_dma_xct_descr *dp;
238
239 for (i = 0; i < TX_RING_SIZE; i++) {
240 info = &TX_DESC_INFO(mac, i);
241 dp = &TX_DESC(mac, i);
242 if (info->dma) {
243 if (info->skb) {
244 pci_unmap_single(mac->dma_pdev,
245 info->dma,
246 info->skb->len,
247 PCI_DMA_TODEVICE);
248 dev_kfree_skb_any(info->skb);
249 }
250 info->dma = 0;
251 info->skb = NULL;
252 dp->mactx = 0;
253 dp->ptr = 0;
254 }
255 }
256
257 dma_free_coherent(&mac->dma_pdev->dev,
258 TX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
259 mac->tx->desc, mac->tx->dma);
260
261 kfree(mac->tx->desc_info);
262 kfree(mac->tx);
263 mac->tx = NULL;
264}
265
266static void pasemi_mac_free_rx_resources(struct net_device *dev)
267{
268 struct pasemi_mac *mac = netdev_priv(dev);
269 unsigned int i;
270 struct pasemi_mac_buffer *info;
271 struct pas_dma_xct_descr *dp;
272
273 for (i = 0; i < RX_RING_SIZE; i++) {
274 info = &RX_DESC_INFO(mac, i);
275 dp = &RX_DESC(mac, i);
9f05cfe2
OJ		 276 if (info->skb) {
277 if (info->dma) {
f5cd7872
OJ		 278 pci_unmap_single(mac->dma_pdev,
279 info->dma,
280 info->skb->len,
281 PCI_DMA_FROMDEVICE);
282 dev_kfree_skb_any(info->skb);
283 }
284 info->dma = 0;
285 info->skb = NULL;
286 dp->macrx = 0;
287 dp->ptr = 0;
288 }
289 }
290
291 dma_free_coherent(&mac->dma_pdev->dev,
292 RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
293 mac->rx->desc, mac->rx->dma);
294
295 dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
296 mac->rx->buffers, mac->rx->buf_dma);
297
298 kfree(mac->rx->desc_info);
299 kfree(mac->rx);
300 mac->rx = NULL;
301}
302
303static void pasemi_mac_replenish_rx_ring(struct net_device *dev)
304{
305 struct pasemi_mac *mac = netdev_priv(dev);
306 unsigned int i;
307 int start = mac->rx->next_to_fill;
308 unsigned int count;
309
310 count = (mac->rx->next_to_clean + RX_RING_SIZE -
311 mac->rx->next_to_fill) & (RX_RING_SIZE - 1);
312
313 /* Check to see if we're doing first-time setup */
314 if (unlikely(mac->rx->next_to_clean == 0 && mac->rx->next_to_fill == 0))
315 count = RX_RING_SIZE;
316
317 if (count <= 0)
318 return;
319
320 for (i = start; i < start + count; i++) {
321 struct pasemi_mac_buffer *info = &RX_DESC_INFO(mac, i);
322 u64 *buff = &RX_BUFF(mac, i);
323 struct sk_buff *skb;
324 dma_addr_t dma;
325
9f05cfe2
OJ		 326 /* skb might still be in there for recycle on short receives */
327 if (info->skb)
328 skb = info->skb;
329 else
330 skb = dev_alloc_skb(BUF_SIZE);
f5cd7872 331
9f05cfe2 332 if (unlikely(!skb))
f5cd7872 333 break;
f5cd7872 334
f5cd7872
OJ		 335 dma = pci_map_single(mac->dma_pdev, skb->data, skb->len,
336 PCI_DMA_FROMDEVICE);
337
338 if (dma_mapping_error(dma)) {
339 dev_kfree_skb_irq(info->skb);
340 count = i - start;
341 break;
342 }
343
344 info->skb = skb;
345 info->dma = dma;
346 *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
347 }
348
349 wmb();
350
351 pci_write_config_dword(mac->dma_pdev,
352 PAS_DMA_RXCHAN_INCR(mac->dma_rxch),
353 count);
354 pci_write_config_dword(mac->dma_pdev,
355 PAS_DMA_RXINT_INCR(mac->dma_if),
356 count);
357
358 mac->rx->next_to_fill += count;
359}
360
1b0335ea
OJ		 361static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
362{
363 unsigned int reg, stat;
364 /* Re-enable packet count interrupts: finally
365 * ack the packet count interrupt we got in rx_intr.
366 */
367
368 pci_read_config_dword(mac->iob_pdev,
369 PAS_IOB_DMA_RXCH_STAT(mac->dma_rxch),
370 &stat);
371
372 reg = PAS_IOB_DMA_RXCH_RESET_PCNT(stat & PAS_IOB_DMA_RXCH_STAT_CNTDEL_M)
373 | PAS_IOB_DMA_RXCH_RESET_PINTC;
374
375 pci_write_config_dword(mac->iob_pdev,
376 PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch),
377 reg);
378}
379
380static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
381{
382 unsigned int reg, stat;
383
384 /* Re-enable packet count interrupts */
385 pci_read_config_dword(mac->iob_pdev,
386 PAS_IOB_DMA_TXCH_STAT(mac->dma_txch), &stat);
387
388 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(stat & PAS_IOB_DMA_TXCH_STAT_CNTDEL_M)
389 | PAS_IOB_DMA_TXCH_RESET_PINTC;
390
391 pci_write_config_dword(mac->iob_pdev,
392 PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
393}
394
395
396
f5cd7872
OJ		 397static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
398{
399 unsigned int i;
400 int start, count;
401
402 spin_lock(&mac->rx->lock);
403
404 start = mac->rx->next_to_clean;
405 count = 0;
406
407 for (i = start; i < (start + RX_RING_SIZE) && count < limit; i++) {
408 struct pas_dma_xct_descr *dp;
409 struct pasemi_mac_buffer *info;
410 struct sk_buff *skb;
411 unsigned int j, len;
412 dma_addr_t dma;
413
414 rmb();
415
416 dp = &RX_DESC(mac, i);
417
418 if (!(dp->macrx & XCT_MACRX_O))
419 break;
420
421 count++;
422
423 info = NULL;
424
425 /* We have to scan for our skb since there's no way
426 * to back-map them from the descriptor, and if we
427 * have several receive channels then they might not
428 * show up in the same order as they were put on the
429 * interface ring.
430 */
431
432 dma = (dp->ptr & XCT_PTR_ADDR_M);
433 for (j = start; j < (start + RX_RING_SIZE); j++) {
434 info = &RX_DESC_INFO(mac, j);
435 if (info->dma == dma)
436 break;
437 }
438
439 BUG_ON(!info);
440 BUG_ON(info->dma != dma);
9f05cfe2 441 skb = info->skb;
f5cd7872
OJ		 442
443 pci_unmap_single(mac->dma_pdev, info->dma, info->skb->len,
444 PCI_DMA_FROMDEVICE);
9f05cfe2 445 info->dma = 0;
f5cd7872 446
f5cd7872
OJ		 447
448 len = (dp->macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
9f05cfe2
OJ		 449 if (len < 256) {
450 struct sk_buff *new_skb =
451 netdev_alloc_skb(mac->netdev, len + NET_IP_ALIGN);
452 if (new_skb) {
453 skb_reserve(new_skb, NET_IP_ALIGN);
454 memcpy(new_skb->data - NET_IP_ALIGN,
455 skb->data - NET_IP_ALIGN,
456 len + NET_IP_ALIGN);
457 /* save the skb in buffer_info as good */
458 skb = new_skb;
459 }
460 /* else just continue with the old one */
461 } else
462 info->skb = NULL;
f5cd7872
OJ		 463
464 skb_put(skb, len);
465
466 skb->protocol = eth_type_trans(skb, mac->netdev);
467
468 if ((dp->macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK) {
469 skb->ip_summed = CHECKSUM_COMPLETE;
470 skb->csum = (dp->macrx & XCT_MACRX_CSUM_M) >>
471 XCT_MACRX_CSUM_S;
472 } else
473 skb->ip_summed = CHECKSUM_NONE;
474
475 mac->stats.rx_bytes += len;
476 mac->stats.rx_packets++;
477
478 netif_receive_skb(skb);
479
480 info->dma = 0;
481 info->skb = NULL;
482 dp->ptr = 0;
483 dp->macrx = 0;
484 }
485
486 mac->rx->next_to_clean += count;
487 pasemi_mac_replenish_rx_ring(mac->netdev);
488
489 spin_unlock(&mac->rx->lock);
490
491 return count;
492}
493
494static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
495{
496 int i;
497 struct pasemi_mac_buffer *info;
498 struct pas_dma_xct_descr *dp;
499 int start, count;
500 int flags;
501
502 spin_lock_irqsave(&mac->tx->lock, flags);
503
504 start = mac->tx->next_to_clean;
505 count = 0;
506
507 for (i = start; i < mac->tx->next_to_use; i++) {
508 dp = &TX_DESC(mac, i);
509 if (!dp || (dp->mactx & XCT_MACTX_O))
510 break;
511
512 count++;
513
514 info = &TX_DESC_INFO(mac, i);
515
516 pci_unmap_single(mac->dma_pdev, info->dma,
517 info->skb->len, PCI_DMA_TODEVICE);
518 dev_kfree_skb_irq(info->skb);
519
520 info->skb = NULL;
521 info->dma = 0;
522 dp->mactx = 0;
523 dp->ptr = 0;
524 }
525 mac->tx->next_to_clean += count;
526 spin_unlock_irqrestore(&mac->tx->lock, flags);
527
0ce68c74
OJ		 528 netif_wake_queue(mac->netdev);
529
f5cd7872
OJ		 530 return count;
531}
532
533
534static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
535{
536 struct net_device *dev = data;
537 struct pasemi_mac *mac = netdev_priv(dev);
538 unsigned int reg;
539
6dfa7522 540 if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
f5cd7872
OJ		 541 return IRQ_NONE;
542
6dfa7522
OJ		 543 if (*mac->rx_status & PAS_STATUS_ERROR)
544 printk("rx_status reported error\n");
545
546 /* Don't reset packet count so it won't fire again but clear
547 * all others.
548 */
549
550 pci_read_config_dword(mac->dma_pdev, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), &reg);
f5cd7872 551
6dfa7522
OJ		 552 reg = 0;
553 if (*mac->rx_status & PAS_STATUS_SOFT)
554 reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
555 if (*mac->rx_status & PAS_STATUS_ERROR)
556 reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
f5cd7872
OJ		 557 if (*mac->rx_status & PAS_STATUS_TIMER)
558 reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
559
6dfa7522
OJ		 560 netif_rx_schedule(dev);
561
f5cd7872
OJ		 562 pci_write_config_dword(mac->iob_pdev,
563 PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
564
565
566 return IRQ_HANDLED;
567}
568
569static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
570{
571 struct net_device *dev = data;
572 struct pasemi_mac *mac = netdev_priv(dev);
573 unsigned int reg;
f5cd7872 574
6dfa7522 575 if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
f5cd7872
OJ		 576 return IRQ_NONE;
577
578 pasemi_mac_clean_tx(mac);
579
6dfa7522
OJ		 580 reg = PAS_IOB_DMA_TXCH_RESET_PINTC;
581
582 if (*mac->tx_status & PAS_STATUS_SOFT)
583 reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
584 if (*mac->tx_status & PAS_STATUS_ERROR)
585 reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
f5cd7872
OJ		 586
587 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch),
588 reg);
589
f5cd7872
OJ		 590 return IRQ_HANDLED;
591}
592
593static int pasemi_mac_open(struct net_device *dev)
594{
595 struct pasemi_mac *mac = netdev_priv(dev);
771f7404 596 int base_irq;
f5cd7872
OJ		 597 unsigned int flags;
598 int ret;
599
600 /* enable rx section */
601 pci_write_config_dword(mac->dma_pdev, PAS_DMA_COM_RXCMD,
602 PAS_DMA_COM_RXCMD_EN);
603
604 /* enable tx section */
605 pci_write_config_dword(mac->dma_pdev, PAS_DMA_COM_TXCMD,
606 PAS_DMA_COM_TXCMD_EN);
607
608 flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
609 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
610 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
611
612 pci_write_config_dword(mac->pdev, PAS_MAC_CFG_TXP, flags);
613
614 flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
615 PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
616
617 flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
618
619 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
6dfa7522
OJ		 620 PAS_IOB_DMA_RXCH_CFG_CNTTH(1));
621
622 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
623 PAS_IOB_DMA_TXCH_CFG_CNTTH(32));
f5cd7872 624
1b0335ea
OJ		 625 /* Clear out any residual packet count state from firmware */
626 pasemi_mac_restart_rx_intr(mac);
627 pasemi_mac_restart_tx_intr(mac);
628
6dfa7522 629 /* 0xffffff is max value, about 16ms */
f5cd7872 630 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_COM_TIMEOUTCFG,
6dfa7522 631 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
f5cd7872
OJ		 632
633 pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, flags);
634
635 ret = pasemi_mac_setup_rx_resources(dev);
636 if (ret)
637 goto out_rx_resources;
638
639 ret = pasemi_mac_setup_tx_resources(dev);
640 if (ret)
641 goto out_tx_resources;
642
643 pci_write_config_dword(mac->pdev, PAS_MAC_IPC_CHNL,
644 PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
645 PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
646
647 /* enable rx if */
648 pci_write_config_dword(mac->dma_pdev,
649 PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
650 PAS_DMA_RXINT_RCMDSTA_EN);
651
652 /* enable rx channel */
653 pci_write_config_dword(mac->dma_pdev,
654 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
655 PAS_DMA_RXCHAN_CCMDSTA_EN |
656 PAS_DMA_RXCHAN_CCMDSTA_DU);
657
658 /* enable tx channel */
659 pci_write_config_dword(mac->dma_pdev,
660 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
661 PAS_DMA_TXCHAN_TCMDSTA_EN);
662
663 pasemi_mac_replenish_rx_ring(dev);
664
665 netif_start_queue(dev);
666 netif_poll_enable(dev);
667
771f7404
OJ		 668 /* Interrupts are a bit different for our DMA controller: While
669 * it's got one a regular PCI device header, the interrupt there
670 * is really the base of the range it's using. Each tx and rx
671 * channel has it's own interrupt source.
672 */
673
674 base_irq = virq_to_hw(mac->dma_pdev->irq);
675
676 mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
677 mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
678
679 ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
f5cd7872
OJ		 680 mac->tx->irq_name, dev);
681 if (ret) {
682 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
771f7404 683 base_irq + mac->dma_txch, ret);
f5cd7872
OJ		 684 goto out_tx_int;
685 }
686
771f7404 687 ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
f5cd7872
OJ		 688 mac->rx->irq_name, dev);
689 if (ret) {
690 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
771f7404 691 base_irq + 20 + mac->dma_rxch, ret);
f5cd7872
OJ		 692 goto out_rx_int;
693 }
694
695 return 0;
696
697out_rx_int:
771f7404 698 free_irq(mac->tx_irq, dev);
f5cd7872
OJ		 699out_tx_int:
700 netif_poll_disable(dev);
701 netif_stop_queue(dev);
702 pasemi_mac_free_tx_resources(dev);
703out_tx_resources:
704 pasemi_mac_free_rx_resources(dev);
705out_rx_resources:
706
707 return ret;
708}
709
710#define MAX_RETRIES 5000
711
712static int pasemi_mac_close(struct net_device *dev)
713{
714 struct pasemi_mac *mac = netdev_priv(dev);
715 unsigned int stat;
716 int retries;
717
718 netif_stop_queue(dev);
719
720 /* Clean out any pending buffers */
721 pasemi_mac_clean_tx(mac);
722 pasemi_mac_clean_rx(mac, RX_RING_SIZE);
723
724 /* Disable interface */
725 pci_write_config_dword(mac->dma_pdev,
726 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
727 PAS_DMA_TXCHAN_TCMDSTA_ST);
728 pci_write_config_dword(mac->dma_pdev,
729 PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
730 PAS_DMA_RXINT_RCMDSTA_ST);
731 pci_write_config_dword(mac->dma_pdev,
732 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
733 PAS_DMA_RXCHAN_CCMDSTA_ST);
734
735 for (retries = 0; retries < MAX_RETRIES; retries++) {
736 pci_read_config_dword(mac->dma_pdev,
737 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
738 &stat);
0ce68c74 739 if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT))
f5cd7872
OJ		 740 break;
741 cond_resched();
742 }
743
0ce68c74 744 if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
f5cd7872 745 dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
f5cd7872
OJ		 746
747 for (retries = 0; retries < MAX_RETRIES; retries++) {
748 pci_read_config_dword(mac->dma_pdev,
749 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
750 &stat);
0ce68c74 751 if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT))
f5cd7872
OJ		 752 break;
753 cond_resched();
754 }
755
0ce68c74 756 if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
f5cd7872 757 dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
f5cd7872
OJ		 758
759 for (retries = 0; retries < MAX_RETRIES; retries++) {
760 pci_read_config_dword(mac->dma_pdev,
761 PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
762 &stat);
0ce68c74 763 if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT))
f5cd7872
OJ		 764 break;
765 cond_resched();
766 }
767
0ce68c74 768 if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
f5cd7872 769 dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
f5cd7872
OJ		 770
771 /* Then, disable the channel. This must be done separately from
772 * stopping, since you can't disable when active.
773 */
774
775 pci_write_config_dword(mac->dma_pdev,
776 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
777 pci_write_config_dword(mac->dma_pdev,
778 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
779 pci_write_config_dword(mac->dma_pdev,
780 PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
781
771f7404
OJ		 782 free_irq(mac->tx_irq, dev);
783 free_irq(mac->rx_irq, dev);
f5cd7872
OJ		 784
785 /* Free resources */
786 pasemi_mac_free_rx_resources(dev);
787 pasemi_mac_free_tx_resources(dev);
788
789 return 0;
790}
791
792static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
793{
794 struct pasemi_mac *mac = netdev_priv(dev);
795 struct pasemi_mac_txring *txring;
796 struct pasemi_mac_buffer *info;
797 struct pas_dma_xct_descr *dp;
798 u64 dflags;
799 dma_addr_t map;
800 int flags;
801
802 dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_SS | XCT_MACTX_CRC_PAD;
803
804 if (skb->ip_summed == CHECKSUM_PARTIAL) {
d56f90a7
ACM		 805 const unsigned char *nh = skb_network_header(skb);
806
eddc9ec5 807 switch (ip_hdr(skb)->protocol) {
f5cd7872
OJ		 808 case IPPROTO_TCP:
809 dflags |= XCT_MACTX_CSUM_TCP;
cfe1fc77 810 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
d56f90a7 811 dflags |= XCT_MACTX_IPO(nh - skb->data);
f5cd7872
OJ		 812 break;
813 case IPPROTO_UDP:
814 dflags |= XCT_MACTX_CSUM_UDP;
cfe1fc77 815 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
d56f90a7 816 dflags |= XCT_MACTX_IPO(nh - skb->data);
f5cd7872
OJ		 817 break;
818 }
819 }
820
821 map = pci_map_single(mac->dma_pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
822
823 if (dma_mapping_error(map))
824 return NETDEV_TX_BUSY;
825
826 txring = mac->tx;
827
828 spin_lock_irqsave(&txring->lock, flags);
829
830 if (txring->next_to_clean - txring->next_to_use == TX_RING_SIZE) {
831 spin_unlock_irqrestore(&txring->lock, flags);
832 pasemi_mac_clean_tx(mac);
833 spin_lock_irqsave(&txring->lock, flags);
834
835 if (txring->next_to_clean - txring->next_to_use ==
836 TX_RING_SIZE) {
837 /* Still no room -- stop the queue and wait for tx
838 * intr when there's room.
839 */
840 netif_stop_queue(dev);
841 goto out_err;
842 }
843 }
844
845
846 dp = &TX_DESC(mac, txring->next_to_use);
847 info = &TX_DESC_INFO(mac, txring->next_to_use);
848
849 dp->mactx = dflags | XCT_MACTX_LLEN(skb->len);
850 dp->ptr = XCT_PTR_LEN(skb->len) | XCT_PTR_ADDR(map);
851 info->dma = map;
852 info->skb = skb;
853
854 txring->next_to_use++;
855 mac->stats.tx_packets++;
856 mac->stats.tx_bytes += skb->len;
857
858 spin_unlock_irqrestore(&txring->lock, flags);
859
860 pci_write_config_dword(mac->dma_pdev,
861 PAS_DMA_TXCHAN_INCR(mac->dma_txch), 1);
862
863 return NETDEV_TX_OK;
864
865out_err:
866 spin_unlock_irqrestore(&txring->lock, flags);
867 pci_unmap_single(mac->dma_pdev, map, skb->len, PCI_DMA_TODEVICE);
868 return NETDEV_TX_BUSY;
869}
870
871static struct net_device_stats *pasemi_mac_get_stats(struct net_device *dev)
872{
873 struct pasemi_mac *mac = netdev_priv(dev);
874
875 return &mac->stats;
876}
877
878static void pasemi_mac_set_rx_mode(struct net_device *dev)
879{
880 struct pasemi_mac *mac = netdev_priv(dev);
881 unsigned int flags;
882
883 pci_read_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, &flags);
884
885 /* Set promiscuous */
886 if (dev->flags & IFF_PROMISC)
887 flags |= PAS_MAC_CFG_PCFG_PR;
888 else
889 flags &= ~PAS_MAC_CFG_PCFG_PR;
890
891 pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, flags);
892}
893
894
895static int pasemi_mac_poll(struct net_device *dev, int *budget)
896{
897 int pkts, limit = min(*budget, dev->quota);
898 struct pasemi_mac *mac = netdev_priv(dev);
899
900 pkts = pasemi_mac_clean_rx(mac, limit);
901
902 if (pkts < limit) {
903 /* all done, no more packets present */
904 netif_rx_complete(dev);
905
1b0335ea 906 pasemi_mac_restart_rx_intr(mac);
f5cd7872
OJ		 907 return 0;
908 } else {
909 /* used up our quantum, so reschedule */
910 dev->quota -= pkts;
911 *budget -= pkts;
912 return 1;
913 }
914}
915
916static int __devinit
917pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
918{
919 static int index = 0;
920 struct net_device *dev;
921 struct pasemi_mac *mac;
922 int err;
923
924 err = pci_enable_device(pdev);
925 if (err)
926 return err;
927
928 dev = alloc_etherdev(sizeof(struct pasemi_mac));
929 if (dev == NULL) {
930 dev_err(&pdev->dev,
931 "pasemi_mac: Could not allocate ethernet device.\n");
932 err = -ENOMEM;
933 goto out_disable_device;
934 }
935
936 SET_MODULE_OWNER(dev);
937 pci_set_drvdata(pdev, dev);
938 SET_NETDEV_DEV(dev, &pdev->dev);
939
940 mac = netdev_priv(dev);
941
942 mac->pdev = pdev;
943 mac->netdev = dev;
944 mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
945
946 if (!mac->dma_pdev) {
947 dev_err(&pdev->dev, "Can't find DMA Controller\n");
948 err = -ENODEV;
949 goto out_free_netdev;
950 }
951
952 mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
953
954 if (!mac->iob_pdev) {
955 dev_err(&pdev->dev, "Can't find I/O Bridge\n");
956 err = -ENODEV;
957 goto out_put_dma_pdev;
958 }
959
960 /* These should come out of the device tree eventually */
961 mac->dma_txch = index;
962 mac->dma_rxch = index;
963
964 /* We probe GMAC before XAUI, but the DMA interfaces are
965 * in XAUI, GMAC order.
966 */
967 if (index < 4)
968 mac->dma_if = index + 2;
969 else
970 mac->dma_if = index - 4;
971 index++;
972
973 switch (pdev->device) {
974 case 0xa005:
975 mac->type = MAC_TYPE_GMAC;
976 break;
977 case 0xa006:
978 mac->type = MAC_TYPE_XAUI;
979 break;
980 default:
981 err = -ENODEV;
982 goto out;
983 }
984
985 /* get mac addr from device tree */
986 if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
987 err = -ENODEV;
988 goto out;
989 }
990 memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
991
992 dev->open = pasemi_mac_open;
993 dev->stop = pasemi_mac_close;
994 dev->hard_start_xmit = pasemi_mac_start_tx;
995 dev->get_stats = pasemi_mac_get_stats;
996 dev->set_multicast_list = pasemi_mac_set_rx_mode;
997 dev->weight = 64;
998 dev->poll = pasemi_mac_poll;
999 dev->features = NETIF_F_HW_CSUM;
1000
1001 /* The dma status structure is located in the I/O bridge, and
1002 * is cache coherent.
1003 */
1004 if (!dma_status)
1005 /* XXXOJN This should come from the device tree */
1006 dma_status = __ioremap(0xfd800000, 0x1000, 0);
1007
1008 mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
1009 mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
1010
1011 err = register_netdev(dev);
1012
1013 if (err) {
1014 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1015 err);
1016 goto out;
1017 } else
1018 printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
1019 "hw addr %02x:%02x:%02x:%02x:%02x:%02x\n",
1020 dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1021 mac->dma_if, mac->dma_txch, mac->dma_rxch,
1022 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1023 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1024
1025 return err;
1026
1027out:
1028 pci_dev_put(mac->iob_pdev);
1029out_put_dma_pdev:
1030 pci_dev_put(mac->dma_pdev);
1031out_free_netdev:
1032 free_netdev(dev);
1033out_disable_device:
1034 pci_disable_device(pdev);
1035 return err;
1036
1037}
1038
1039static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
1040{
1041 struct net_device *netdev = pci_get_drvdata(pdev);
1042 struct pasemi_mac *mac;
1043
1044 if (!netdev)
1045 return;
1046
1047 mac = netdev_priv(netdev);
1048
1049 unregister_netdev(netdev);
1050
1051 pci_disable_device(pdev);
1052 pci_dev_put(mac->dma_pdev);
1053 pci_dev_put(mac->iob_pdev);
1054
1055 pci_set_drvdata(pdev, NULL);
1056 free_netdev(netdev);
1057}
1058
1059static struct pci_device_id pasemi_mac_pci_tbl[] = {
1060 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
1061 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
1062};
1063
1064MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
1065
1066static struct pci_driver pasemi_mac_driver = {
1067 .name = "pasemi_mac",
1068 .id_table = pasemi_mac_pci_tbl,
1069 .probe = pasemi_mac_probe,
1070 .remove = __devexit_p(pasemi_mac_remove),
1071};
1072
1073static void __exit pasemi_mac_cleanup_module(void)
1074{
1075 pci_unregister_driver(&pasemi_mac_driver);
1076 __iounmap(dma_status);
1077 dma_status = NULL;
1078}
1079
1080int pasemi_mac_init_module(void)
1081{
1082 return pci_register_driver(&pasemi_mac_driver);
1083}
1084
1085MODULE_LICENSE("GPL");
1086MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
1087MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
1088
1089module_init(pasemi_mac_init_module);
1090module_exit(pasemi_mac_cleanup_module);
Linux 6.x block layer and io_uring tree(s)