Merge master.kernel.org:/home/rmk/linux-2.6-arm
[linux-2.6-block.git] / drivers / net / netxen / netxen_nic_init.c
CommitLineData
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1/*
2 * Copyright (C) 2003 - 2006 NetXen, Inc.
3 * All rights reserved.
80922fbc 4 *
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5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
80922fbc 9 *
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10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
80922fbc 14 *
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15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
80922fbc 19 *
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20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
80922fbc 22 *
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23 * Contact Information:
24 * info@netxen.com
25 * NetXen,
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
28 *
29 *
30 * Source file for NIC routines to initialize the Phantom Hardware
31 *
32 */
33
34#include <linux/netdevice.h>
35#include <linux/delay.h>
36#include "netxen_nic.h"
37#include "netxen_nic_hw.h"
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38#include "netxen_nic_phan_reg.h"
39
40struct crb_addr_pair {
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41 u32 addr;
42 u32 data;
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43};
44
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45unsigned long last_schedule_time;
46
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47#define NETXEN_MAX_CRB_XFORM 60
48static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
e0e20a1a 49#define NETXEN_ADDR_ERROR (0xffffffff)
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50
51#define crb_addr_transform(name) \
52 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
53 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
54
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55#define NETXEN_NIC_XDMA_RESET 0x8000ff
56
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57static inline void
58netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
59 unsigned long off, int *data)
60{
cb8011ad 61 void __iomem *addr = pci_base_offset(adapter, off);
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62 writel(*data, addr);
63}
64
65static void crb_addr_transform_setup(void)
66{
67 crb_addr_transform(XDMA);
68 crb_addr_transform(TIMR);
69 crb_addr_transform(SRE);
70 crb_addr_transform(SQN3);
71 crb_addr_transform(SQN2);
72 crb_addr_transform(SQN1);
73 crb_addr_transform(SQN0);
74 crb_addr_transform(SQS3);
75 crb_addr_transform(SQS2);
76 crb_addr_transform(SQS1);
77 crb_addr_transform(SQS0);
78 crb_addr_transform(RPMX7);
79 crb_addr_transform(RPMX6);
80 crb_addr_transform(RPMX5);
81 crb_addr_transform(RPMX4);
82 crb_addr_transform(RPMX3);
83 crb_addr_transform(RPMX2);
84 crb_addr_transform(RPMX1);
85 crb_addr_transform(RPMX0);
86 crb_addr_transform(ROMUSB);
87 crb_addr_transform(SN);
88 crb_addr_transform(QMN);
89 crb_addr_transform(QMS);
90 crb_addr_transform(PGNI);
91 crb_addr_transform(PGND);
92 crb_addr_transform(PGN3);
93 crb_addr_transform(PGN2);
94 crb_addr_transform(PGN1);
95 crb_addr_transform(PGN0);
96 crb_addr_transform(PGSI);
97 crb_addr_transform(PGSD);
98 crb_addr_transform(PGS3);
99 crb_addr_transform(PGS2);
100 crb_addr_transform(PGS1);
101 crb_addr_transform(PGS0);
102 crb_addr_transform(PS);
103 crb_addr_transform(PH);
104 crb_addr_transform(NIU);
105 crb_addr_transform(I2Q);
106 crb_addr_transform(EG);
107 crb_addr_transform(MN);
108 crb_addr_transform(MS);
109 crb_addr_transform(CAS2);
110 crb_addr_transform(CAS1);
111 crb_addr_transform(CAS0);
112 crb_addr_transform(CAM);
113 crb_addr_transform(C2C1);
114 crb_addr_transform(C2C0);
1fcca1a5 115 crb_addr_transform(SMB);
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116}
117
118int netxen_init_firmware(struct netxen_adapter *adapter)
119{
120 u32 state = 0, loops = 0, err = 0;
121
122 /* Window 1 call */
123 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
124
125 if (state == PHAN_INITIALIZE_ACK)
126 return 0;
127
128 while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
129 udelay(100);
130 /* Window 1 call */
131 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
132
133 loops++;
134 }
135 if (loops >= 2000) {
136 printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
137 state);
138 err = -EIO;
139 return err;
140 }
141 /* Window 1 call */
3176ff3e 142 writel(MPORT_MULTI_FUNCTION_MODE,
ed25ffa1 143 NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE));
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144 writel(PHAN_INITIALIZE_ACK,
145 NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
146
147 return err;
148}
149
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150#define NETXEN_ADDR_LIMIT 0xffffffffULL
151
152void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr,
153 struct pci_dev **used_dev)
154{
155 void *addr;
156
157 addr = pci_alloc_consistent(pdev, sz, ptr);
158 if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) {
159 *used_dev = pdev;
160 return addr;
161 }
162 pci_free_consistent(pdev, sz, addr, *ptr);
163 addr = pci_alloc_consistent(NULL, sz, ptr);
164 *used_dev = NULL;
165 return addr;
166}
167
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168void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
169{
170 int ctxid, ring;
171 u32 i;
172 u32 num_rx_bufs = 0;
173 struct netxen_rcv_desc_ctx *rcv_desc;
174
175 DPRINTK(INFO, "initializing some queues: %p\n", adapter);
176 for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
177 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
178 struct netxen_rx_buffer *rx_buf;
179 rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
180 rcv_desc->rcv_free = rcv_desc->max_rx_desc_count;
181 rcv_desc->begin_alloc = 0;
182 rx_buf = rcv_desc->rx_buf_arr;
183 num_rx_bufs = rcv_desc->max_rx_desc_count;
184 /*
185 * Now go through all of them, set reference handles
186 * and put them in the queues.
187 */
188 for (i = 0; i < num_rx_bufs; i++) {
189 rx_buf->ref_handle = i;
190 rx_buf->state = NETXEN_BUFFER_FREE;
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191 DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
192 "%p\n", ctxid, i, rx_buf);
193 rx_buf++;
194 }
195 }
196 }
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197}
198
199void netxen_initialize_adapter_hw(struct netxen_adapter *adapter)
200{
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201 int ports = 0;
202 struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
203
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204 if (netxen_nic_get_board_info(adapter) != 0)
205 printk("%s: Error getting board config info.\n",
206 netxen_nic_driver_name);
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207 get_brd_port_by_type(board_info->board_type, &ports);
208 if (ports == 0)
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209 printk(KERN_ERR "%s: Unknown board type\n",
210 netxen_nic_driver_name);
cb8011ad 211 adapter->ahw.max_ports = ports;
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212}
213
214void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
215{
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216 switch (adapter->ahw.board_type) {
217 case NETXEN_NIC_GBE:
80922fbc 218 adapter->enable_phy_interrupts =
3d396eb1 219 netxen_niu_gbe_enable_phy_interrupts;
80922fbc 220 adapter->disable_phy_interrupts =
3d396eb1 221 netxen_niu_gbe_disable_phy_interrupts;
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222 adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
223 adapter->macaddr_set = netxen_niu_macaddr_set;
224 adapter->set_mtu = netxen_nic_set_mtu_gb;
225 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
226 adapter->unset_promisc = netxen_niu_set_promiscuous_mode;
227 adapter->phy_read = netxen_niu_gbe_phy_read;
228 adapter->phy_write = netxen_niu_gbe_phy_write;
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229 adapter->init_niu = netxen_nic_init_niu_gb;
230 adapter->stop_port = netxen_niu_disable_gbe_port;
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231 break;
232
233 case NETXEN_NIC_XGBE:
80922fbc 234 adapter->enable_phy_interrupts =
3d396eb1 235 netxen_niu_xgbe_enable_phy_interrupts;
80922fbc 236 adapter->disable_phy_interrupts =
3d396eb1 237 netxen_niu_xgbe_disable_phy_interrupts;
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238 adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
239 adapter->macaddr_set = netxen_niu_xg_macaddr_set;
240 adapter->set_mtu = netxen_nic_set_mtu_xgb;
241 adapter->init_port = netxen_niu_xg_init_port;
242 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
243 adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
244 adapter->stop_port = netxen_niu_disable_xg_port;
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245 break;
246
247 default:
248 break;
249 }
250}
251
252/*
253 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
254 * address to external PCI CRB address.
255 */
e0e20a1a 256u32 netxen_decode_crb_addr(u32 addr)
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257{
258 int i;
e0e20a1a 259 u32 base_addr, offset, pci_base;
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260
261 crb_addr_transform_setup();
262
263 pci_base = NETXEN_ADDR_ERROR;
264 base_addr = addr & 0xfff00000;
265 offset = addr & 0x000fffff;
266
267 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
268 if (crb_addr_xform[i] == base_addr) {
269 pci_base = i << 20;
270 break;
271 }
272 }
273 if (pci_base == NETXEN_ADDR_ERROR)
274 return pci_base;
275 else
276 return (pci_base + offset);
277}
278
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279static long rom_max_timeout = 100;
280static long rom_lock_timeout = 10000;
27d2ab54 281static long rom_write_timeout = 700;
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282
283static inline int rom_lock(struct netxen_adapter *adapter)
284{
285 int iter;
286 u32 done = 0;
287 int timeout = 0;
288
289 while (!done) {
290 /* acquire semaphore2 from PCI HW block */
291 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
292 &done);
293 if (done == 1)
294 break;
295 if (timeout >= rom_lock_timeout)
296 return -EIO;
297
298 timeout++;
299 /*
300 * Yield CPU
301 */
302 if (!in_atomic())
303 schedule();
304 else {
305 for (iter = 0; iter < 20; iter++)
306 cpu_relax(); /*This a nop instr on i386 */
307 }
308 }
309 netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
310 return 0;
311}
312
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313int netxen_wait_rom_done(struct netxen_adapter *adapter)
314{
315 long timeout = 0;
316 long done = 0;
317
318 while (done == 0) {
319 done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
320 done &= 2;
321 timeout++;
322 if (timeout >= rom_max_timeout) {
323 printk("Timeout reached waiting for rom done");
324 return -EIO;
325 }
326 }
327 return 0;
328}
329
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330static inline int netxen_rom_wren(struct netxen_adapter *adapter)
331{
332 /* Set write enable latch in ROM status register */
333 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
334 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
335 M25P_INSTR_WREN);
336 if (netxen_wait_rom_done(adapter)) {
337 return -1;
338 }
339 return 0;
340}
341
342static inline unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
343 unsigned int addr)
344{
345 unsigned int data = 0xdeaddead;
346 data = netxen_nic_reg_read(adapter, addr);
347 return data;
348}
349
350static inline int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
351{
352 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
353 M25P_INSTR_RDSR);
354 if (netxen_wait_rom_done(adapter)) {
355 return -1;
356 }
357 return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
358}
359
360static inline void netxen_rom_unlock(struct netxen_adapter *adapter)
361{
362 u32 val;
363
364 /* release semaphore2 */
365 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
366
367}
368
369int netxen_rom_wip_poll(struct netxen_adapter *adapter)
370{
371 long timeout = 0;
372 long wip = 1;
373 int val;
374 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
375 while (wip != 0) {
376 val = netxen_do_rom_rdsr(adapter);
377 wip = val & 1;
378 timeout++;
379 if (timeout > rom_max_timeout) {
380 return -1;
381 }
382 }
383 return 0;
384}
385
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386static inline int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
387 int data)
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388{
389 if (netxen_rom_wren(adapter)) {
390 return -1;
391 }
392 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
393 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
394 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
395 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
396 M25P_INSTR_PP);
397 if (netxen_wait_rom_done(adapter)) {
398 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
399 return -1;
400 }
401
402 return netxen_rom_wip_poll(adapter);
403}
404
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405static inline int
406do_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
407{
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408 if (jiffies > (last_schedule_time + (8 * HZ))) {
409 last_schedule_time = jiffies;
410 schedule();
411 }
412
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413 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
414 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
b58ecad8 415 udelay(100); /* prevent bursting on CRB */
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416 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
417 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
418 if (netxen_wait_rom_done(adapter)) {
419 printk("Error waiting for rom done\n");
420 return -EIO;
421 }
422 /* reset abyte_cnt and dummy_byte_cnt */
423 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
b58ecad8 424 udelay(100); /* prevent bursting on CRB */
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425 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
426
427 *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
428 return 0;
429}
430
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431static inline int
432do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
433 u8 *bytes, size_t size)
434{
435 int addridx;
436 int ret = 0;
437
438 for (addridx = addr; addridx < (addr + size); addridx += 4) {
439 ret = do_rom_fast_read(adapter, addridx, (int *)bytes);
440 if (ret != 0)
441 break;
6d1495f2 442 *(int *)bytes = cpu_to_le32(*(int *)bytes);
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443 bytes += 4;
444 }
445
446 return ret;
447}
448
449int
450netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
451 u8 *bytes, size_t size)
452{
453 int ret;
454
455 ret = rom_lock(adapter);
456 if (ret < 0)
457 return ret;
458
459 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
460
461 netxen_rom_unlock(adapter);
462 return ret;
463}
464
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465int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
466{
467 int ret;
468
469 if (rom_lock(adapter) != 0)
470 return -EIO;
471
472 ret = do_rom_fast_read(adapter, addr, valp);
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473 netxen_rom_unlock(adapter);
474 return ret;
475}
476
477int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
478{
479 int ret = 0;
480
481 if (rom_lock(adapter) != 0) {
482 return -1;
483 }
484 ret = do_rom_fast_write(adapter, addr, data);
485 netxen_rom_unlock(adapter);
486 return ret;
487}
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488
489static inline int do_rom_fast_write_words(struct netxen_adapter *adapter,
490 int addr, u8 *bytes, size_t size)
491{
492 int addridx = addr;
493 int ret = 0;
494
495 while (addridx < (addr + size)) {
496 int last_attempt = 0;
497 int timeout = 0;
498 int data;
499
6d1495f2 500 data = le32_to_cpu((*(u32*)bytes));
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501 ret = do_rom_fast_write(adapter, addridx, data);
502 if (ret < 0)
503 return ret;
504
505 while(1) {
506 int data1;
507
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508 ret = do_rom_fast_read(adapter, addridx, &data1);
509 if (ret < 0)
510 return ret;
511
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512 if (data1 == data)
513 break;
514
515 if (timeout++ >= rom_write_timeout) {
516 if (last_attempt++ < 4) {
517 ret = do_rom_fast_write(adapter,
518 addridx, data);
519 if (ret < 0)
520 return ret;
521 }
522 else {
523 printk(KERN_INFO "Data write did not "
524 "succeed at address 0x%x\n", addridx);
525 break;
526 }
527 }
528 }
529
530 bytes += 4;
531 addridx += 4;
532 }
533
534 return ret;
535}
536
537int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr,
538 u8 *bytes, size_t size)
539{
540 int ret = 0;
541
542 ret = rom_lock(adapter);
543 if (ret < 0)
544 return ret;
545
546 ret = do_rom_fast_write_words(adapter, addr, bytes, size);
547 netxen_rom_unlock(adapter);
548
549 return ret;
550}
551
552int netxen_rom_wrsr(struct netxen_adapter *adapter, int data)
553{
554 int ret;
555
556 ret = netxen_rom_wren(adapter);
557 if (ret < 0)
558 return ret;
559
560 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
561 netxen_crb_writelit_adapter(adapter,
562 NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1);
563
564 ret = netxen_wait_rom_done(adapter);
565 if (ret < 0)
566 return ret;
567
568 return netxen_rom_wip_poll(adapter);
569}
570
571int netxen_rom_rdsr(struct netxen_adapter *adapter)
572{
573 int ret;
574
575 ret = rom_lock(adapter);
576 if (ret < 0)
577 return ret;
578
579 ret = netxen_do_rom_rdsr(adapter);
580 netxen_rom_unlock(adapter);
581 return ret;
582}
583
584int netxen_backup_crbinit(struct netxen_adapter *adapter)
585{
586 int ret = FLASH_SUCCESS;
587 int val;
588 char *buffer = kmalloc(FLASH_SECTOR_SIZE, GFP_KERNEL);
589
590 if (!buffer)
591 return -ENOMEM;
592 /* unlock sector 63 */
593 val = netxen_rom_rdsr(adapter);
594 val = val & 0xe3;
595 ret = netxen_rom_wrsr(adapter, val);
596 if (ret != FLASH_SUCCESS)
597 goto out_kfree;
598
599 ret = netxen_rom_wip_poll(adapter);
600 if (ret != FLASH_SUCCESS)
601 goto out_kfree;
602
603 /* copy sector 0 to sector 63 */
604 ret = netxen_rom_fast_read_words(adapter, CRBINIT_START,
605 buffer, FLASH_SECTOR_SIZE);
606 if (ret != FLASH_SUCCESS)
607 goto out_kfree;
608
609 ret = netxen_rom_fast_write_words(adapter, FIXED_START,
610 buffer, FLASH_SECTOR_SIZE);
611 if (ret != FLASH_SUCCESS)
612 goto out_kfree;
613
614 /* lock sector 63 */
615 val = netxen_rom_rdsr(adapter);
616 if (!(val & 0x8)) {
617 val |= (0x1 << 2);
618 /* lock sector 63 */
619 if (netxen_rom_wrsr(adapter, val) == 0) {
620 ret = netxen_rom_wip_poll(adapter);
621 if (ret != FLASH_SUCCESS)
622 goto out_kfree;
623
624 /* lock SR writes */
625 ret = netxen_rom_wip_poll(adapter);
626 if (ret != FLASH_SUCCESS)
627 goto out_kfree;
628 }
629 }
630
631out_kfree:
632 kfree(buffer);
633 return ret;
634}
635
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636int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
637{
638 netxen_rom_wren(adapter);
639 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
640 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
641 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
642 M25P_INSTR_SE);
643 if (netxen_wait_rom_done(adapter)) {
644 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
645 return -1;
646 }
647 return netxen_rom_wip_poll(adapter);
648}
649
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650void check_erased_flash(struct netxen_adapter *adapter, int addr)
651{
652 int i;
653 int val;
654 int count = 0, erased_errors = 0;
655 int range;
656
657 range = (addr == USER_START) ? FIXED_START : addr + FLASH_SECTOR_SIZE;
658
659 for (i = addr; i < range; i += 4) {
660 netxen_rom_fast_read(adapter, i, &val);
661 if (val != 0xffffffff)
662 erased_errors++;
663 count++;
664 }
665
666 if (erased_errors)
667 printk(KERN_INFO "0x%x out of 0x%x words fail to be erased "
668 "for sector address: %x\n", erased_errors, count, addr);
669}
670
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671int netxen_rom_se(struct netxen_adapter *adapter, int addr)
672{
673 int ret = 0;
674 if (rom_lock(adapter) != 0) {
675 return -1;
676 }
677 ret = netxen_do_rom_se(adapter, addr);
678 netxen_rom_unlock(adapter);
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679 msleep(30);
680 check_erased_flash(adapter, addr);
681
682 return ret;
683}
684
685int
686netxen_flash_erase_sections(struct netxen_adapter *adapter, int start, int end)
687{
688 int ret = FLASH_SUCCESS;
689 int i;
690
691 for (i = start; i < end; i++) {
692 ret = netxen_rom_se(adapter, i * FLASH_SECTOR_SIZE);
693 if (ret)
694 break;
695 ret = netxen_rom_wip_poll(adapter);
696 if (ret < 0)
697 return ret;
698 }
699
700 return ret;
701}
702
703int
704netxen_flash_erase_secondary(struct netxen_adapter *adapter)
705{
706 int ret = FLASH_SUCCESS;
707 int start, end;
708
709 start = SECONDARY_START / FLASH_SECTOR_SIZE;
710 end = USER_START / FLASH_SECTOR_SIZE;
711 ret = netxen_flash_erase_sections(adapter, start, end);
712
713 return ret;
714}
715
716int
717netxen_flash_erase_primary(struct netxen_adapter *adapter)
718{
719 int ret = FLASH_SUCCESS;
720 int start, end;
721
722 start = PRIMARY_START / FLASH_SECTOR_SIZE;
723 end = SECONDARY_START / FLASH_SECTOR_SIZE;
724 ret = netxen_flash_erase_sections(adapter, start, end);
725
726 return ret;
727}
728
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729void netxen_halt_pegs(struct netxen_adapter *adapter)
730{
731 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1);
732 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1);
733 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1);
734 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1);
735}
736
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737int netxen_flash_unlock(struct netxen_adapter *adapter)
738{
739 int ret = 0;
740
741 ret = netxen_rom_wrsr(adapter, 0);
742 if (ret < 0)
743 return ret;
744
745 ret = netxen_rom_wren(adapter);
746 if (ret < 0)
747 return ret;
748
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749 return ret;
750}
751
752#define NETXEN_BOARDTYPE 0x4008
753#define NETXEN_BOARDNUM 0x400c
754#define NETXEN_CHIPNUM 0x4010
755#define NETXEN_ROMBUS_RESET 0xFFFFFFFF
756#define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL
757#define NETXEN_ROM_FOUND_INIT 0x400
758
759int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
760{
761 int addr, val, status;
762 int n, i;
763 int init_delay = 0;
764 struct crb_addr_pair *buf;
e0e20a1a 765 u32 off;
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766
767 /* resetall */
768 status = netxen_nic_get_board_info(adapter);
769 if (status)
cb8011ad 770 printk("%s: netxen_pinit_from_rom: Error getting board info\n",
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771 netxen_nic_driver_name);
772
773 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
774 NETXEN_ROMBUS_RESET);
775
776 if (verbose) {
777 int val;
778 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
779 printk("P2 ROM board type: 0x%08x\n", val);
780 else
781 printk("Could not read board type\n");
782 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
783 printk("P2 ROM board num: 0x%08x\n", val);
784 else
785 printk("Could not read board number\n");
786 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
787 printk("P2 ROM chip num: 0x%08x\n", val);
788 else
789 printk("Could not read chip number\n");
790 }
791
792 if (netxen_rom_fast_read(adapter, 0, &n) == 0
793 && (n & NETXEN_ROM_FIRST_BARRIER)) {
794 n &= ~NETXEN_ROM_ROUNDUP;
795 if (n < NETXEN_ROM_FOUND_INIT) {
796 if (verbose)
797 printk("%s: %d CRB init values found"
798 " in ROM.\n", netxen_nic_driver_name, n);
799 } else {
800 printk("%s:n=0x%x Error! NetXen card flash not"
801 " initialized.\n", __FUNCTION__, n);
802 return -EIO;
803 }
804 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
805 if (buf == NULL) {
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806 printk("%s: netxen_pinit_from_rom: Unable to calloc "
807 "memory.\n", netxen_nic_driver_name);
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808 return -ENOMEM;
809 }
810 for (i = 0; i < n; i++) {
811 if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
812 || netxen_rom_fast_read(adapter, 8 * i + 8,
813 &addr) != 0)
814 return -EIO;
815
816 buf[i].addr = addr;
817 buf[i].data = val;
818
819 if (verbose)
820 printk("%s: PCI: 0x%08x == 0x%08x\n",
821 netxen_nic_driver_name, (unsigned int)
e0e20a1a 822 netxen_decode_crb_addr(addr), val);
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823 }
824 for (i = 0; i < n; i++) {
825
e0e20a1a 826 off = netxen_decode_crb_addr(buf[i].addr);
1fcca1a5 827 if (off == NETXEN_ADDR_ERROR) {
e0e20a1a 828 printk(KERN_ERR"CRB init value out of range %x\n",
1fcca1a5
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829 buf[i].addr);
830 continue;
831 }
832 off += NETXEN_PCI_CRBSPACE;
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833 /* skipping cold reboot MAGIC */
834 if (off == NETXEN_CAM_RAM(0x1fc))
835 continue;
836
837 /* After writing this register, HW needs time for CRB */
838 /* to quiet down (else crb_window returns 0xffffffff) */
839 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
840 init_delay = 1;
841 /* hold xdma in reset also */
cb8011ad 842 buf[i].data = NETXEN_NIC_XDMA_RESET;
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843 }
844
845 if (ADDR_IN_WINDOW1(off)) {
846 writel(buf[i].data,
847 NETXEN_CRB_NORMALIZE(adapter, off));
848 } else {
849 netxen_nic_pci_change_crbwindow(adapter, 0);
850 writel(buf[i].data,
cb8011ad 851 pci_base_offset(adapter, off));
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852
853 netxen_nic_pci_change_crbwindow(adapter, 1);
854 }
855 if (init_delay == 1) {
856 ssleep(1);
857 init_delay = 0;
858 }
859 msleep(1);
860 }
861 kfree(buf);
862
863 /* disable_peg_cache_all */
864
865 /* unreset_net_cache */
866 netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
867 4);
868 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
869 (val & 0xffffff0f));
870 /* p2dn replyCount */
871 netxen_crb_writelit_adapter(adapter,
872 NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
873 /* disable_peg_cache 0 */
874 netxen_crb_writelit_adapter(adapter,
875 NETXEN_CRB_PEG_NET_D + 0x4c, 8);
876 /* disable_peg_cache 1 */
877 netxen_crb_writelit_adapter(adapter,
878 NETXEN_CRB_PEG_NET_I + 0x4c, 8);
879
880 /* peg_clr_all */
881
882 /* peg_clr 0 */
883 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
884 0);
885 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
886 0);
887 /* peg_clr 1 */
888 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
889 0);
890 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
891 0);
892 /* peg_clr 2 */
893 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
894 0);
895 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
896 0);
897 /* peg_clr 3 */
898 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
899 0);
900 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
901 0);
902 }
903 return 0;
904}
905
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906int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
907{
908 uint64_t addr;
909 uint32_t hi;
910 uint32_t lo;
911
912 adapter->dummy_dma.addr =
913 pci_alloc_consistent(adapter->ahw.pdev,
914 NETXEN_HOST_DUMMY_DMA_SIZE,
915 &adapter->dummy_dma.phys_addr);
916 if (adapter->dummy_dma.addr == NULL) {
917 printk("%s: ERROR: Could not allocate dummy DMA memory\n",
918 __FUNCTION__);
919 return -ENOMEM;
920 }
921
922 addr = (uint64_t) adapter->dummy_dma.phys_addr;
923 hi = (addr >> 32) & 0xffffffff;
924 lo = addr & 0xffffffff;
925
926 writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI));
927 writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO));
928
929 return 0;
930}
931
932void netxen_free_adapter_offload(struct netxen_adapter *adapter)
933{
934 if (adapter->dummy_dma.addr) {
e0e20a1a
LCMT
935 writel(0, NETXEN_CRB_NORMALIZE(adapter,
936 CRB_HOST_DUMMY_BUF_ADDR_HI));
937 writel(0, NETXEN_CRB_NORMALIZE(adapter,
938 CRB_HOST_DUMMY_BUF_ADDR_LO));
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939 pci_free_consistent(adapter->ahw.pdev,
940 NETXEN_HOST_DUMMY_DMA_SIZE,
941 adapter->dummy_dma.addr,
942 adapter->dummy_dma.phys_addr);
943 adapter->dummy_dma.addr = NULL;
944 }
945}
946
cb8011ad 947void netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
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948{
949 u32 val = 0;
950 int loops = 0;
951
cb8011ad 952 if (!pegtune_val) {
1fcca1a5 953 val = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
13ba9c77
MT
954 while (val != PHAN_INITIALIZE_COMPLETE &&
955 val != PHAN_INITIALIZE_ACK && loops < 200000) {
3d396eb1 956 udelay(100);
cb8011ad 957 schedule();
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958 val =
959 readl(NETXEN_CRB_NORMALIZE
960 (adapter, CRB_CMDPEG_STATE));
961 loops++;
962 }
963 if (val != PHAN_INITIALIZE_COMPLETE)
964 printk("WARNING: Initial boot wait loop failed...\n");
965 }
966}
967
968int netxen_nic_rx_has_work(struct netxen_adapter *adapter)
969{
970 int ctx;
971
972 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
973 struct netxen_recv_context *recv_ctx =
974 &(adapter->recv_ctx[ctx]);
975 u32 consumer;
976 struct status_desc *desc_head;
cb8011ad 977 struct status_desc *desc;
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978
979 consumer = recv_ctx->status_rx_consumer;
980 desc_head = recv_ctx->rcv_status_desc_head;
981 desc = &desc_head[consumer];
982
a608ab9c 983 if (netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)
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984 return 1;
985 }
986
987 return 0;
988}
989
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990static inline int netxen_nic_check_temp(struct netxen_adapter *adapter)
991{
3176ff3e 992 struct net_device *netdev = adapter->netdev;
cb8011ad
AK
993 uint32_t temp, temp_state, temp_val;
994 int rv = 0;
995
996 temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
997
998 temp_state = nx_get_temp_state(temp);
999 temp_val = nx_get_temp_val(temp);
1000
1001 if (temp_state == NX_TEMP_PANIC) {
1002 printk(KERN_ALERT
1003 "%s: Device temperature %d degrees C exceeds"
1004 " maximum allowed. Hardware has been shut down.\n",
1005 netxen_nic_driver_name, temp_val);
cb8011ad 1006
3176ff3e
MT
1007 netif_carrier_off(netdev);
1008 netif_stop_queue(netdev);
cb8011ad
AK
1009 rv = 1;
1010 } else if (temp_state == NX_TEMP_WARN) {
1011 if (adapter->temp == NX_TEMP_NORMAL) {
1012 printk(KERN_ALERT
1013 "%s: Device temperature %d degrees C "
1014 "exceeds operating range."
1015 " Immediate action needed.\n",
1016 netxen_nic_driver_name, temp_val);
1017 }
1018 } else {
1019 if (adapter->temp == NX_TEMP_WARN) {
1020 printk(KERN_INFO
1021 "%s: Device temperature is now %d degrees C"
1022 " in normal range.\n", netxen_nic_driver_name,
1023 temp_val);
1024 }
1025 }
1026 adapter->temp = temp_state;
1027 return rv;
1028}
1029
6d5aefb8 1030void netxen_watchdog_task(struct work_struct *work)
3d396eb1 1031{
3d396eb1 1032 struct net_device *netdev;
6d5aefb8
DH
1033 struct netxen_adapter *adapter =
1034 container_of(work, struct netxen_adapter, watchdog_task);
3d396eb1 1035
6c80b18d 1036 if ((adapter->portnum == 0) && netxen_nic_check_temp(adapter))
cb8011ad
AK
1037 return;
1038
3176ff3e
MT
1039 netdev = adapter->netdev;
1040 if ((netif_running(netdev)) && !netif_carrier_ok(netdev)) {
1041 printk(KERN_INFO "%s port %d, %s carrier is now ok\n",
1042 netxen_nic_driver_name, adapter->portnum, netdev->name);
1043 netif_carrier_on(netdev);
3d396eb1
AK
1044 }
1045
3176ff3e
MT
1046 if (netif_queue_stopped(netdev))
1047 netif_wake_queue(netdev);
1048
80922fbc
AK
1049 if (adapter->handle_phy_intr)
1050 adapter->handle_phy_intr(adapter);
3d396eb1
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1051 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1052}
1053
1054/*
1055 * netxen_process_rcv() send the received packet to the protocol stack.
1056 * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
1057 * invoke the routine to send more rx buffers to the Phantom...
1058 */
1059void
1060netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
1061 struct status_desc *desc)
1062{
3176ff3e
MT
1063 struct pci_dev *pdev = adapter->pdev;
1064 struct net_device *netdev = adapter->netdev;
a608ab9c 1065 int index = netxen_get_sts_refhandle(desc);
3d396eb1
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1066 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1067 struct netxen_rx_buffer *buffer;
1068 struct sk_buff *skb;
a608ab9c 1069 u32 length = netxen_get_sts_totallength(desc);
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1070 u32 desc_ctx;
1071 struct netxen_rcv_desc_ctx *rcv_desc;
1072 int ret;
1073
ed25ffa1 1074 desc_ctx = netxen_get_sts_type(desc);
3d396eb1
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1075 if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
1076 printk("%s: %s Bad Rcv descriptor ring\n",
1077 netxen_nic_driver_name, netdev->name);
1078 return;
1079 }
1080
1081 rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
ed25ffa1
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1082 if (unlikely(index > rcv_desc->max_rx_desc_count)) {
1083 DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
1084 index, rcv_desc->max_rx_desc_count);
1085 return;
1086 }
3d396eb1 1087 buffer = &rcv_desc->rx_buf_arr[index];
ed25ffa1
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1088 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1089 buffer->lro_current_frags++;
1090 if (netxen_get_sts_desc_lro_last_frag(desc)) {
1091 buffer->lro_expected_frags =
1092 netxen_get_sts_desc_lro_cnt(desc);
1093 buffer->lro_length = length;
1094 }
1095 if (buffer->lro_current_frags != buffer->lro_expected_frags) {
1096 if (buffer->lro_expected_frags != 0) {
1097 printk("LRO: (refhandle:%x) recv frag."
1098 "wait for last. flags: %x expected:%d"
1099 "have:%d\n", index,
1100 netxen_get_sts_desc_lro_last_frag(desc),
1101 buffer->lro_expected_frags,
1102 buffer->lro_current_frags);
1103 }
1104 return;
1105 }
1106 }
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1107
1108 pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
1109 PCI_DMA_FROMDEVICE);
1110
1111 skb = (struct sk_buff *)buffer->skb;
1112
ed25ffa1 1113 if (likely(netxen_get_sts_status(desc) == STATUS_CKSUM_OK)) {
3176ff3e 1114 adapter->stats.csummed++;
3d396eb1 1115 skb->ip_summed = CHECKSUM_UNNECESSARY;
ed25ffa1 1116 }
ed25ffa1
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1117 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1118 /* True length was only available on the last pkt */
1119 skb_put(skb, buffer->lro_length);
1120 } else {
1121 skb_put(skb, length);
1122 }
1123
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1124 skb->protocol = eth_type_trans(skb, netdev);
1125
1126 ret = netif_receive_skb(skb);
1127
1128 /*
1129 * RH: Do we need these stats on a regular basis. Can we get it from
1130 * Linux stats.
1131 */
1132 switch (ret) {
1133 case NET_RX_SUCCESS:
3176ff3e 1134 adapter->stats.uphappy++;
3d396eb1
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1135 break;
1136
1137 case NET_RX_CN_LOW:
3176ff3e 1138 adapter->stats.uplcong++;
3d396eb1
AK
1139 break;
1140
1141 case NET_RX_CN_MOD:
3176ff3e 1142 adapter->stats.upmcong++;
3d396eb1
AK
1143 break;
1144
1145 case NET_RX_CN_HIGH:
3176ff3e 1146 adapter->stats.uphcong++;
3d396eb1
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1147 break;
1148
1149 case NET_RX_DROP:
3176ff3e 1150 adapter->stats.updropped++;
3d396eb1
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1151 break;
1152
1153 default:
3176ff3e 1154 adapter->stats.updunno++;
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1155 break;
1156 }
1157
1158 netdev->last_rx = jiffies;
1159
1160 rcv_desc->rcv_free++;
1161 rcv_desc->rcv_pending--;
1162
1163 /*
1164 * We just consumed one buffer so post a buffer.
1165 */
3d396eb1
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1166 buffer->skb = NULL;
1167 buffer->state = NETXEN_BUFFER_FREE;
ed25ffa1
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1168 buffer->lro_current_frags = 0;
1169 buffer->lro_expected_frags = 0;
3d396eb1 1170
3176ff3e
MT
1171 adapter->stats.no_rcv++;
1172 adapter->stats.rxbytes += length;
3d396eb1
AK
1173}
1174
1175/* Process Receive status ring */
1176u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
1177{
1178 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1179 struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
1180 struct status_desc *desc; /* used to read status desc here */
1181 u32 consumer = recv_ctx->status_rx_consumer;
ed25ffa1 1182 u32 producer = 0;
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1183 int count = 0, ring;
1184
1185 DPRINTK(INFO, "procesing receive\n");
1186 /*
1187 * we assume in this case that there is only one port and that is
1188 * port #1...changes need to be done in firmware to indicate port
1189 * number as part of the descriptor. This way we will be able to get
1190 * the netdev which is associated with that device.
1191 */
1192 while (count < max) {
1193 desc = &desc_head[consumer];
a608ab9c 1194 if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
ed25ffa1
AK
1195 DPRINTK(ERR, "desc %p ownedby %x\n", desc,
1196 netxen_get_sts_owner(desc));
3d396eb1
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1197 break;
1198 }
1199 netxen_process_rcv(adapter, ctxid, desc);
ed25ffa1 1200 netxen_clear_sts_owner(desc);
a608ab9c 1201 netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
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1202 consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
1203 count++;
1204 }
1205 if (count) {
1206 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
ed25ffa1 1207 netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
3d396eb1
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1208 }
1209 }
1210
1211 /* update the consumer index in phantom */
1212 if (count) {
3d396eb1 1213 recv_ctx->status_rx_consumer = consumer;
ed25ffa1 1214 recv_ctx->status_rx_producer = producer;
3d396eb1
AK
1215
1216 /* Window = 1 */
1217 writel(consumer,
1218 NETXEN_CRB_NORMALIZE(adapter,
4a79a04e 1219 recv_crb_registers[adapter->portnum].
3d396eb1
AK
1220 crb_rcv_status_consumer));
1221 }
1222
1223 return count;
1224}
1225
1226/* Process Command status ring */
ed25ffa1 1227int netxen_process_cmd_ring(unsigned long data)
3d396eb1
AK
1228{
1229 u32 last_consumer;
1230 u32 consumer;
1231 struct netxen_adapter *adapter = (struct netxen_adapter *)data;
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1232 int count1 = 0;
1233 int count2 = 0;
3d396eb1 1234 struct netxen_cmd_buffer *buffer;
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1235 struct pci_dev *pdev;
1236 struct netxen_skb_frag *frag;
1237 u32 i;
1238 struct sk_buff *skb = NULL;
ed25ffa1 1239 int done;
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1240
1241 spin_lock(&adapter->tx_lock);
1242 last_consumer = adapter->last_cmd_consumer;
1243 DPRINTK(INFO, "procesing xmit complete\n");
1244 /* we assume in this case that there is only one port and that is
1245 * port #1...changes need to be done in firmware to indicate port
1246 * number as part of the descriptor. This way we will be able to get
1247 * the netdev which is associated with that device.
1248 */
3d396eb1 1249
9b410117 1250 consumer = le32_to_cpu(*(adapter->cmd_consumer));
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1251 if (last_consumer == consumer) { /* Ring is empty */
1252 DPRINTK(INFO, "last_consumer %d == consumer %d\n",
1253 last_consumer, consumer);
1254 spin_unlock(&adapter->tx_lock);
ed25ffa1 1255 return 1;
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1256 }
1257
1258 adapter->proc_cmd_buf_counter++;
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1259 /*
1260 * Not needed - does not seem to be used anywhere.
1261 * adapter->cmd_consumer = consumer;
1262 */
1263 spin_unlock(&adapter->tx_lock);
1264
ed25ffa1 1265 while ((last_consumer != consumer) && (count1 < MAX_STATUS_HANDLE)) {
3d396eb1 1266 buffer = &adapter->cmd_buf_arr[last_consumer];
3176ff3e 1267 pdev = adapter->pdev;
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1268 frag = &buffer->frag_array[0];
1269 skb = buffer->skb;
1270 if (skb && (cmpxchg(&buffer->skb, skb, 0) == skb)) {
1271 pci_unmap_single(pdev, frag->dma, frag->length,
1272 PCI_DMA_TODEVICE);
1273 for (i = 1; i < buffer->frag_count; i++) {
1274 DPRINTK(INFO, "getting fragment no %d\n", i);
1275 frag++; /* Get the next frag */
1276 pci_unmap_page(pdev, frag->dma, frag->length,
1277 PCI_DMA_TODEVICE);
1278 }
1279
3176ff3e 1280 adapter->stats.skbfreed++;
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1281 dev_kfree_skb_any(skb);
1282 skb = NULL;
1283 } else if (adapter->proc_cmd_buf_counter == 1) {
3176ff3e 1284 adapter->stats.txnullskb++;
3d396eb1 1285 }
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1286 if (unlikely(netif_queue_stopped(adapter->netdev)
1287 && netif_carrier_ok(adapter->netdev))
1288 && ((jiffies - adapter->netdev->trans_start) >
1289 adapter->netdev->watchdog_timeo)) {
1290 SCHEDULE_WORK(&adapter->tx_timeout_task);
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1291 }
1292
1293 last_consumer = get_next_index(last_consumer,
1294 adapter->max_tx_desc_count);
ed25ffa1 1295 count1++;
3d396eb1 1296 }
3d396eb1 1297
ed25ffa1 1298 count2 = 0;
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1299 spin_lock(&adapter->tx_lock);
1300 if ((--adapter->proc_cmd_buf_counter) == 0) {
1301 adapter->last_cmd_consumer = last_consumer;
1302 while ((adapter->last_cmd_consumer != consumer)
ed25ffa1 1303 && (count2 < MAX_STATUS_HANDLE)) {
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1304 buffer =
1305 &adapter->cmd_buf_arr[adapter->last_cmd_consumer];
ed25ffa1 1306 count2++;
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1307 if (buffer->skb)
1308 break;
1309 else
1310 adapter->last_cmd_consumer =
1311 get_next_index(adapter->last_cmd_consumer,
1312 adapter->max_tx_desc_count);
1313 }
1314 }
ed25ffa1 1315 if (count1 || count2) {
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1316 if (netif_queue_stopped(adapter->netdev)
1317 && (adapter->flags & NETXEN_NETDEV_STATUS)) {
1318 netif_wake_queue(adapter->netdev);
1319 adapter->flags &= ~NETXEN_NETDEV_STATUS;
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1320 }
1321 }
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1322 /*
1323 * If everything is freed up to consumer then check if the ring is full
1324 * If the ring is full then check if more needs to be freed and
1325 * schedule the call back again.
1326 *
1327 * This happens when there are 2 CPUs. One could be freeing and the
1328 * other filling it. If the ring is full when we get out of here and
1329 * the card has already interrupted the host then the host can miss the
1330 * interrupt.
1331 *
1332 * There is still a possible race condition and the host could miss an
1333 * interrupt. The card has to take care of this.
1334 */
1335 if (adapter->last_cmd_consumer == consumer &&
1336 (((adapter->cmd_producer + 1) %
1337 adapter->max_tx_desc_count) == adapter->last_cmd_consumer)) {
9b410117 1338 consumer = le32_to_cpu(*(adapter->cmd_consumer));
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1339 }
1340 done = (adapter->last_cmd_consumer == consumer);
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1341
1342 spin_unlock(&adapter->tx_lock);
1343 DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer,
1344 __FUNCTION__);
ed25ffa1 1345 return (done);
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1346}
1347
1348/*
1349 * netxen_post_rx_buffers puts buffer in the Phantom memory
1350 */
1351void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
1352{
1353 struct pci_dev *pdev = adapter->ahw.pdev;
1354 struct sk_buff *skb;
1355 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1356 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
ed25ffa1 1357 uint producer;
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1358 struct rcv_desc *pdesc;
1359 struct netxen_rx_buffer *buffer;
1360 int count = 0;
1361 int index = 0;
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1362 netxen_ctx_msg msg = 0;
1363 dma_addr_t dma;
3d396eb1 1364
3d396eb1 1365 rcv_desc = &recv_ctx->rcv_desc[ringid];
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1366
1367 producer = rcv_desc->producer;
1368 index = rcv_desc->begin_alloc;
1369 buffer = &rcv_desc->rx_buf_arr[index];
1370 /* We can start writing rx descriptors into the phantom memory. */
1371 while (buffer->state == NETXEN_BUFFER_FREE) {
1372 skb = dev_alloc_skb(rcv_desc->skb_size);
1373 if (unlikely(!skb)) {
1374 /*
ed25ffa1 1375 * TODO
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1376 * We need to schedule the posting of buffers to the pegs.
1377 */
1378 rcv_desc->begin_alloc = index;
cb8011ad 1379 DPRINTK(ERR, "netxen_post_rx_buffers: "
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1380 " allocated only %d buffers\n", count);
1381 break;
1382 }
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1383
1384 count++; /* now there should be no failure */
1385 pdesc = &rcv_desc->desc_head[producer];
1386
1387#if defined(XGB_DEBUG)
1388 *(unsigned long *)(skb->head) = 0xc0debabe;
1389 if (skb_is_nonlinear(skb)) {
1390 printk("Allocated SKB @%p is nonlinear\n");
1391 }
1392#endif
1393 skb_reserve(skb, 2);
1394 /* This will be setup when we receive the
1395 * buffer after it has been filled FSL TBD TBD
1396 * skb->dev = netdev;
1397 */
1398 dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size,
1399 PCI_DMA_FROMDEVICE);
ed33ebe4 1400 pdesc->addr_buffer = cpu_to_le64(dma);
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1401 buffer->skb = skb;
1402 buffer->state = NETXEN_BUFFER_BUSY;
1403 buffer->dma = dma;
1404 /* make a rcv descriptor */
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1405 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1406 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
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1407 DPRINTK(INFO, "done writing descripter\n");
1408 producer =
1409 get_next_index(producer, rcv_desc->max_rx_desc_count);
1410 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1411 buffer = &rcv_desc->rx_buf_arr[index];
1412 }
1413 /* if we did allocate buffers, then write the count to Phantom */
1414 if (count) {
1415 rcv_desc->begin_alloc = index;
1416 rcv_desc->rcv_pending += count;
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1417 rcv_desc->producer = producer;
1418 if (rcv_desc->rcv_free >= 32) {
1419 rcv_desc->rcv_free = 0;
1420 /* Window = 1 */
1421 writel((producer - 1) &
1422 (rcv_desc->max_rx_desc_count - 1),
1423 NETXEN_CRB_NORMALIZE(adapter,
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MT
1424 recv_crb_registers[
1425 adapter->portnum].
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1426 rcv_desc_crb[ringid].
1427 crb_rcv_producer_offset));
1428 /*
1429 * Write a doorbell msg to tell phanmon of change in
1430 * receive ring producer
1431 */
1432 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1433 netxen_set_msg_privid(msg);
1434 netxen_set_msg_count(msg,
1435 ((producer -
1436 1) & (rcv_desc->
1437 max_rx_desc_count - 1)));
3176ff3e 1438 netxen_set_msg_ctxid(msg, adapter->portnum);
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1439 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1440 writel(msg,
1441 DB_NORMALIZE(adapter,
1442 NETXEN_RCV_PRODUCER_OFFSET));
1443 }
1444 }
1445}
1446
1447void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, uint32_t ctx,
1448 uint32_t ringid)
1449{
1450 struct pci_dev *pdev = adapter->ahw.pdev;
1451 struct sk_buff *skb;
1452 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1453 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1454 u32 producer;
1455 struct rcv_desc *pdesc;
1456 struct netxen_rx_buffer *buffer;
1457 int count = 0;
1458 int index = 0;
1459
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1460 rcv_desc = &recv_ctx->rcv_desc[ringid];
1461
1462 producer = rcv_desc->producer;
1463 index = rcv_desc->begin_alloc;
1464 buffer = &rcv_desc->rx_buf_arr[index];
1465 /* We can start writing rx descriptors into the phantom memory. */
1466 while (buffer->state == NETXEN_BUFFER_FREE) {
1467 skb = dev_alloc_skb(rcv_desc->skb_size);
1468 if (unlikely(!skb)) {
1469 /*
1470 * We need to schedule the posting of buffers to the pegs.
1471 */
1472 rcv_desc->begin_alloc = index;
1473 DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
1474 " allocated only %d buffers\n", count);
1475 break;
1476 }
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1477 count++; /* now there should be no failure */
1478 pdesc = &rcv_desc->desc_head[producer];
ed25ffa1 1479 skb_reserve(skb, 2);
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1480 /*
1481 * This will be setup when we receive the
1482 * buffer after it has been filled
1483 * skb->dev = netdev;
1484 */
1485 buffer->skb = skb;
1486 buffer->state = NETXEN_BUFFER_BUSY;
1487 buffer->dma = pci_map_single(pdev, skb->data,
1488 rcv_desc->dma_size,
1489 PCI_DMA_FROMDEVICE);
ed25ffa1 1490
3d396eb1 1491 /* make a rcv descriptor */
ed33ebe4 1492 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
a608ab9c 1493 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
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1494 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1495 DPRINTK(INFO, "done writing descripter\n");
1496 producer =
1497 get_next_index(producer, rcv_desc->max_rx_desc_count);
1498 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1499 buffer = &rcv_desc->rx_buf_arr[index];
1500 }
1501
1502 /* if we did allocate buffers, then write the count to Phantom */
1503 if (count) {
1504 rcv_desc->begin_alloc = index;
1505 rcv_desc->rcv_pending += count;
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1506 rcv_desc->producer = producer;
1507 if (rcv_desc->rcv_free >= 32) {
1508 rcv_desc->rcv_free = 0;
1509 /* Window = 1 */
1510 writel((producer - 1) &
1511 (rcv_desc->max_rx_desc_count - 1),
1512 NETXEN_CRB_NORMALIZE(adapter,
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MT
1513 recv_crb_registers[
1514 adapter->portnum].
ed25ffa1 1515 rcv_desc_crb[ringid].
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1516 crb_rcv_producer_offset));
1517 wmb();
1518 }
1519 }
1520}
1521
1522int netxen_nic_tx_has_work(struct netxen_adapter *adapter)
1523{
1524 if (find_diff_among(adapter->last_cmd_consumer,
1525 adapter->cmd_producer,
1526 adapter->max_tx_desc_count) > 0)
1527 return 1;
1528
1529 return 0;
1530}
1531
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1532
1533void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1534{
3d396eb1 1535 memset(&adapter->stats, 0, sizeof(adapter->stats));
3176ff3e 1536 return;
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1537}
1538