Commit | Line | Data |
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3d396eb1 AK |
1 | /* |
2 | * Copyright (C) 2003 - 2006 NetXen, Inc. | |
3 | * All rights reserved. | |
80922fbc | 4 | * |
3d396eb1 AK |
5 | * This program is free software; you can redistribute it and/or |
6 | * modify it under the terms of the GNU General Public License | |
7 | * as published by the Free Software Foundation; either version 2 | |
8 | * of the License, or (at your option) any later version. | |
80922fbc | 9 | * |
3d396eb1 AK |
10 | * This program is distributed in the hope that it will be useful, but |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
80922fbc | 14 | * |
3d396eb1 AK |
15 | * You should have received a copy of the GNU General Public License |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, | |
18 | * MA 02111-1307, USA. | |
80922fbc | 19 | * |
3d396eb1 AK |
20 | * The full GNU General Public License is included in this distribution |
21 | * in the file called LICENSE. | |
80922fbc | 22 | * |
3d396eb1 AK |
23 | * Contact Information: |
24 | * info@netxen.com | |
25 | * NetXen, | |
26 | * 3965 Freedom Circle, Fourth floor, | |
27 | * Santa Clara, CA 95054 | |
28 | * | |
29 | * | |
30 | * Source file for NIC routines to initialize the Phantom Hardware | |
31 | * | |
32 | */ | |
33 | ||
34 | #include <linux/netdevice.h> | |
35 | #include <linux/delay.h> | |
36 | #include "netxen_nic.h" | |
37 | #include "netxen_nic_hw.h" | |
3d396eb1 AK |
38 | #include "netxen_nic_phan_reg.h" |
39 | ||
40 | struct crb_addr_pair { | |
41 | long addr; | |
42 | long data; | |
43 | }; | |
44 | ||
45 | #define NETXEN_MAX_CRB_XFORM 60 | |
46 | static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM]; | |
47 | #define NETXEN_ADDR_ERROR ((unsigned long ) 0xffffffff ) | |
48 | ||
49 | #define crb_addr_transform(name) \ | |
50 | crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \ | |
51 | NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20 | |
52 | ||
cb8011ad AK |
53 | #define NETXEN_NIC_XDMA_RESET 0x8000ff |
54 | ||
3d396eb1 AK |
55 | static inline void |
56 | netxen_nic_locked_write_reg(struct netxen_adapter *adapter, | |
57 | unsigned long off, int *data) | |
58 | { | |
cb8011ad | 59 | void __iomem *addr = pci_base_offset(adapter, off); |
3d396eb1 AK |
60 | writel(*data, addr); |
61 | } | |
62 | ||
63 | static void crb_addr_transform_setup(void) | |
64 | { | |
65 | crb_addr_transform(XDMA); | |
66 | crb_addr_transform(TIMR); | |
67 | crb_addr_transform(SRE); | |
68 | crb_addr_transform(SQN3); | |
69 | crb_addr_transform(SQN2); | |
70 | crb_addr_transform(SQN1); | |
71 | crb_addr_transform(SQN0); | |
72 | crb_addr_transform(SQS3); | |
73 | crb_addr_transform(SQS2); | |
74 | crb_addr_transform(SQS1); | |
75 | crb_addr_transform(SQS0); | |
76 | crb_addr_transform(RPMX7); | |
77 | crb_addr_transform(RPMX6); | |
78 | crb_addr_transform(RPMX5); | |
79 | crb_addr_transform(RPMX4); | |
80 | crb_addr_transform(RPMX3); | |
81 | crb_addr_transform(RPMX2); | |
82 | crb_addr_transform(RPMX1); | |
83 | crb_addr_transform(RPMX0); | |
84 | crb_addr_transform(ROMUSB); | |
85 | crb_addr_transform(SN); | |
86 | crb_addr_transform(QMN); | |
87 | crb_addr_transform(QMS); | |
88 | crb_addr_transform(PGNI); | |
89 | crb_addr_transform(PGND); | |
90 | crb_addr_transform(PGN3); | |
91 | crb_addr_transform(PGN2); | |
92 | crb_addr_transform(PGN1); | |
93 | crb_addr_transform(PGN0); | |
94 | crb_addr_transform(PGSI); | |
95 | crb_addr_transform(PGSD); | |
96 | crb_addr_transform(PGS3); | |
97 | crb_addr_transform(PGS2); | |
98 | crb_addr_transform(PGS1); | |
99 | crb_addr_transform(PGS0); | |
100 | crb_addr_transform(PS); | |
101 | crb_addr_transform(PH); | |
102 | crb_addr_transform(NIU); | |
103 | crb_addr_transform(I2Q); | |
104 | crb_addr_transform(EG); | |
105 | crb_addr_transform(MN); | |
106 | crb_addr_transform(MS); | |
107 | crb_addr_transform(CAS2); | |
108 | crb_addr_transform(CAS1); | |
109 | crb_addr_transform(CAS0); | |
110 | crb_addr_transform(CAM); | |
111 | crb_addr_transform(C2C1); | |
112 | crb_addr_transform(C2C0); | |
1fcca1a5 | 113 | crb_addr_transform(SMB); |
3d396eb1 AK |
114 | } |
115 | ||
116 | int netxen_init_firmware(struct netxen_adapter *adapter) | |
117 | { | |
118 | u32 state = 0, loops = 0, err = 0; | |
119 | ||
120 | /* Window 1 call */ | |
121 | state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE)); | |
122 | ||
123 | if (state == PHAN_INITIALIZE_ACK) | |
124 | return 0; | |
125 | ||
126 | while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) { | |
127 | udelay(100); | |
128 | /* Window 1 call */ | |
129 | state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE)); | |
130 | ||
131 | loops++; | |
132 | } | |
133 | if (loops >= 2000) { | |
134 | printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n", | |
135 | state); | |
136 | err = -EIO; | |
137 | return err; | |
138 | } | |
139 | /* Window 1 call */ | |
ed25ffa1 AK |
140 | writel(MPORT_SINGLE_FUNCTION_MODE, |
141 | NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE)); | |
3d396eb1 AK |
142 | writel(PHAN_INITIALIZE_ACK, |
143 | NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE)); | |
144 | ||
145 | return err; | |
146 | } | |
147 | ||
cb8011ad AK |
148 | #define NETXEN_ADDR_LIMIT 0xffffffffULL |
149 | ||
150 | void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr, | |
151 | struct pci_dev **used_dev) | |
152 | { | |
153 | void *addr; | |
154 | ||
155 | addr = pci_alloc_consistent(pdev, sz, ptr); | |
156 | if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) { | |
157 | *used_dev = pdev; | |
158 | return addr; | |
159 | } | |
160 | pci_free_consistent(pdev, sz, addr, *ptr); | |
161 | addr = pci_alloc_consistent(NULL, sz, ptr); | |
162 | *used_dev = NULL; | |
163 | return addr; | |
164 | } | |
165 | ||
3d396eb1 AK |
166 | void netxen_initialize_adapter_sw(struct netxen_adapter *adapter) |
167 | { | |
168 | int ctxid, ring; | |
169 | u32 i; | |
170 | u32 num_rx_bufs = 0; | |
171 | struct netxen_rcv_desc_ctx *rcv_desc; | |
172 | ||
173 | DPRINTK(INFO, "initializing some queues: %p\n", adapter); | |
174 | for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) { | |
175 | for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) { | |
176 | struct netxen_rx_buffer *rx_buf; | |
177 | rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring]; | |
178 | rcv_desc->rcv_free = rcv_desc->max_rx_desc_count; | |
179 | rcv_desc->begin_alloc = 0; | |
180 | rx_buf = rcv_desc->rx_buf_arr; | |
181 | num_rx_bufs = rcv_desc->max_rx_desc_count; | |
182 | /* | |
183 | * Now go through all of them, set reference handles | |
184 | * and put them in the queues. | |
185 | */ | |
186 | for (i = 0; i < num_rx_bufs; i++) { | |
187 | rx_buf->ref_handle = i; | |
188 | rx_buf->state = NETXEN_BUFFER_FREE; | |
3d396eb1 AK |
189 | DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:" |
190 | "%p\n", ctxid, i, rx_buf); | |
191 | rx_buf++; | |
192 | } | |
193 | } | |
194 | } | |
3d396eb1 AK |
195 | } |
196 | ||
197 | void netxen_initialize_adapter_hw(struct netxen_adapter *adapter) | |
198 | { | |
cb8011ad AK |
199 | int ports = 0; |
200 | struct netxen_board_info *board_info = &(adapter->ahw.boardcfg); | |
201 | ||
3d396eb1 AK |
202 | if (netxen_nic_get_board_info(adapter) != 0) |
203 | printk("%s: Error getting board config info.\n", | |
204 | netxen_nic_driver_name); | |
cb8011ad AK |
205 | get_brd_port_by_type(board_info->board_type, &ports); |
206 | if (ports == 0) | |
3d396eb1 AK |
207 | printk(KERN_ERR "%s: Unknown board type\n", |
208 | netxen_nic_driver_name); | |
cb8011ad | 209 | adapter->ahw.max_ports = ports; |
3d396eb1 AK |
210 | } |
211 | ||
212 | void netxen_initialize_adapter_ops(struct netxen_adapter *adapter) | |
213 | { | |
3d396eb1 AK |
214 | switch (adapter->ahw.board_type) { |
215 | case NETXEN_NIC_GBE: | |
80922fbc | 216 | adapter->enable_phy_interrupts = |
3d396eb1 | 217 | netxen_niu_gbe_enable_phy_interrupts; |
80922fbc | 218 | adapter->disable_phy_interrupts = |
3d396eb1 | 219 | netxen_niu_gbe_disable_phy_interrupts; |
80922fbc AK |
220 | adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr; |
221 | adapter->macaddr_set = netxen_niu_macaddr_set; | |
222 | adapter->set_mtu = netxen_nic_set_mtu_gb; | |
223 | adapter->set_promisc = netxen_niu_set_promiscuous_mode; | |
224 | adapter->unset_promisc = netxen_niu_set_promiscuous_mode; | |
225 | adapter->phy_read = netxen_niu_gbe_phy_read; | |
226 | adapter->phy_write = netxen_niu_gbe_phy_write; | |
227 | adapter->init_port = netxen_niu_gbe_init_port; | |
228 | adapter->init_niu = netxen_nic_init_niu_gb; | |
229 | adapter->stop_port = netxen_niu_disable_gbe_port; | |
3d396eb1 AK |
230 | break; |
231 | ||
232 | case NETXEN_NIC_XGBE: | |
80922fbc | 233 | adapter->enable_phy_interrupts = |
3d396eb1 | 234 | netxen_niu_xgbe_enable_phy_interrupts; |
80922fbc | 235 | adapter->disable_phy_interrupts = |
3d396eb1 | 236 | netxen_niu_xgbe_disable_phy_interrupts; |
80922fbc AK |
237 | adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr; |
238 | adapter->macaddr_set = netxen_niu_xg_macaddr_set; | |
239 | adapter->set_mtu = netxen_nic_set_mtu_xgb; | |
240 | adapter->init_port = netxen_niu_xg_init_port; | |
241 | adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode; | |
242 | adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode; | |
243 | adapter->stop_port = netxen_niu_disable_xg_port; | |
3d396eb1 AK |
244 | break; |
245 | ||
246 | default: | |
247 | break; | |
248 | } | |
249 | } | |
250 | ||
251 | /* | |
252 | * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB | |
253 | * address to external PCI CRB address. | |
254 | */ | |
255 | unsigned long netxen_decode_crb_addr(unsigned long addr) | |
256 | { | |
257 | int i; | |
258 | unsigned long base_addr, offset, pci_base; | |
259 | ||
260 | crb_addr_transform_setup(); | |
261 | ||
262 | pci_base = NETXEN_ADDR_ERROR; | |
263 | base_addr = addr & 0xfff00000; | |
264 | offset = addr & 0x000fffff; | |
265 | ||
266 | for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) { | |
267 | if (crb_addr_xform[i] == base_addr) { | |
268 | pci_base = i << 20; | |
269 | break; | |
270 | } | |
271 | } | |
272 | if (pci_base == NETXEN_ADDR_ERROR) | |
273 | return pci_base; | |
274 | else | |
275 | return (pci_base + offset); | |
276 | } | |
277 | ||
278 | static long rom_max_timeout = 10000; | |
279 | static long rom_lock_timeout = 1000000; | |
27d2ab54 | 280 | static long rom_write_timeout = 700; |
3d396eb1 AK |
281 | |
282 | static inline int rom_lock(struct netxen_adapter *adapter) | |
283 | { | |
284 | int iter; | |
285 | u32 done = 0; | |
286 | int timeout = 0; | |
287 | ||
288 | while (!done) { | |
289 | /* acquire semaphore2 from PCI HW block */ | |
290 | netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK), | |
291 | &done); | |
292 | if (done == 1) | |
293 | break; | |
294 | if (timeout >= rom_lock_timeout) | |
295 | return -EIO; | |
296 | ||
297 | timeout++; | |
298 | /* | |
299 | * Yield CPU | |
300 | */ | |
301 | if (!in_atomic()) | |
302 | schedule(); | |
303 | else { | |
304 | for (iter = 0; iter < 20; iter++) | |
305 | cpu_relax(); /*This a nop instr on i386 */ | |
306 | } | |
307 | } | |
308 | netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER); | |
309 | return 0; | |
310 | } | |
311 | ||
3d396eb1 AK |
312 | int netxen_wait_rom_done(struct netxen_adapter *adapter) |
313 | { | |
314 | long timeout = 0; | |
315 | long done = 0; | |
316 | ||
317 | while (done == 0) { | |
318 | done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS); | |
319 | done &= 2; | |
320 | timeout++; | |
321 | if (timeout >= rom_max_timeout) { | |
322 | printk("Timeout reached waiting for rom done"); | |
323 | return -EIO; | |
324 | } | |
325 | } | |
326 | return 0; | |
327 | } | |
328 | ||
cb8011ad AK |
329 | static inline int netxen_rom_wren(struct netxen_adapter *adapter) |
330 | { | |
331 | /* Set write enable latch in ROM status register */ | |
332 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); | |
333 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, | |
334 | M25P_INSTR_WREN); | |
335 | if (netxen_wait_rom_done(adapter)) { | |
336 | return -1; | |
337 | } | |
338 | return 0; | |
339 | } | |
340 | ||
341 | static inline unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter, | |
342 | unsigned int addr) | |
343 | { | |
344 | unsigned int data = 0xdeaddead; | |
345 | data = netxen_nic_reg_read(adapter, addr); | |
346 | return data; | |
347 | } | |
348 | ||
349 | static inline int netxen_do_rom_rdsr(struct netxen_adapter *adapter) | |
350 | { | |
351 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, | |
352 | M25P_INSTR_RDSR); | |
353 | if (netxen_wait_rom_done(adapter)) { | |
354 | return -1; | |
355 | } | |
356 | return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA); | |
357 | } | |
358 | ||
359 | static inline void netxen_rom_unlock(struct netxen_adapter *adapter) | |
360 | { | |
361 | u32 val; | |
362 | ||
363 | /* release semaphore2 */ | |
364 | netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val); | |
365 | ||
366 | } | |
367 | ||
368 | int netxen_rom_wip_poll(struct netxen_adapter *adapter) | |
369 | { | |
370 | long timeout = 0; | |
371 | long wip = 1; | |
372 | int val; | |
373 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); | |
374 | while (wip != 0) { | |
375 | val = netxen_do_rom_rdsr(adapter); | |
376 | wip = val & 1; | |
377 | timeout++; | |
378 | if (timeout > rom_max_timeout) { | |
379 | return -1; | |
380 | } | |
381 | } | |
382 | return 0; | |
383 | } | |
384 | ||
80922fbc AK |
385 | static inline int do_rom_fast_write(struct netxen_adapter *adapter, int addr, |
386 | int data) | |
cb8011ad AK |
387 | { |
388 | if (netxen_rom_wren(adapter)) { | |
389 | return -1; | |
390 | } | |
391 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data); | |
392 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); | |
393 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); | |
394 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, | |
395 | M25P_INSTR_PP); | |
396 | if (netxen_wait_rom_done(adapter)) { | |
397 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); | |
398 | return -1; | |
399 | } | |
400 | ||
401 | return netxen_rom_wip_poll(adapter); | |
402 | } | |
403 | ||
3d396eb1 AK |
404 | static inline int |
405 | do_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp) | |
406 | { | |
407 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); | |
408 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); | |
27d2ab54 | 409 | udelay(70); /* prevent bursting on CRB */ |
3d396eb1 AK |
410 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); |
411 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb); | |
412 | if (netxen_wait_rom_done(adapter)) { | |
413 | printk("Error waiting for rom done\n"); | |
414 | return -EIO; | |
415 | } | |
416 | /* reset abyte_cnt and dummy_byte_cnt */ | |
417 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); | |
27d2ab54 | 418 | udelay(70); /* prevent bursting on CRB */ |
3d396eb1 AK |
419 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); |
420 | ||
421 | *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA); | |
422 | return 0; | |
423 | } | |
424 | ||
27d2ab54 AK |
425 | static inline int |
426 | do_rom_fast_read_words(struct netxen_adapter *adapter, int addr, | |
427 | u8 *bytes, size_t size) | |
428 | { | |
429 | int addridx; | |
430 | int ret = 0; | |
431 | ||
432 | for (addridx = addr; addridx < (addr + size); addridx += 4) { | |
433 | ret = do_rom_fast_read(adapter, addridx, (int *)bytes); | |
434 | if (ret != 0) | |
435 | break; | |
436 | bytes += 4; | |
437 | } | |
438 | ||
439 | return ret; | |
440 | } | |
441 | ||
442 | int | |
443 | netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr, | |
444 | u8 *bytes, size_t size) | |
445 | { | |
446 | int ret; | |
447 | ||
448 | ret = rom_lock(adapter); | |
449 | if (ret < 0) | |
450 | return ret; | |
451 | ||
452 | ret = do_rom_fast_read_words(adapter, addr, bytes, size); | |
453 | ||
454 | netxen_rom_unlock(adapter); | |
455 | return ret; | |
456 | } | |
457 | ||
3d396eb1 AK |
458 | int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp) |
459 | { | |
460 | int ret; | |
461 | ||
462 | if (rom_lock(adapter) != 0) | |
463 | return -EIO; | |
464 | ||
465 | ret = do_rom_fast_read(adapter, addr, valp); | |
cb8011ad AK |
466 | netxen_rom_unlock(adapter); |
467 | return ret; | |
468 | } | |
469 | ||
470 | int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data) | |
471 | { | |
472 | int ret = 0; | |
473 | ||
474 | if (rom_lock(adapter) != 0) { | |
475 | return -1; | |
476 | } | |
477 | ret = do_rom_fast_write(adapter, addr, data); | |
478 | netxen_rom_unlock(adapter); | |
479 | return ret; | |
480 | } | |
27d2ab54 AK |
481 | |
482 | static inline int do_rom_fast_write_words(struct netxen_adapter *adapter, | |
483 | int addr, u8 *bytes, size_t size) | |
484 | { | |
485 | int addridx = addr; | |
486 | int ret = 0; | |
487 | ||
488 | while (addridx < (addr + size)) { | |
489 | int last_attempt = 0; | |
490 | int timeout = 0; | |
491 | int data; | |
492 | ||
493 | data = *(u32*)bytes; | |
494 | ||
495 | ret = do_rom_fast_write(adapter, addridx, data); | |
496 | if (ret < 0) | |
497 | return ret; | |
498 | ||
499 | while(1) { | |
500 | int data1; | |
501 | ||
502 | do_rom_fast_read(adapter, addridx, &data1); | |
503 | if (data1 == data) | |
504 | break; | |
505 | ||
506 | if (timeout++ >= rom_write_timeout) { | |
507 | if (last_attempt++ < 4) { | |
508 | ret = do_rom_fast_write(adapter, | |
509 | addridx, data); | |
510 | if (ret < 0) | |
511 | return ret; | |
512 | } | |
513 | else { | |
514 | printk(KERN_INFO "Data write did not " | |
515 | "succeed at address 0x%x\n", addridx); | |
516 | break; | |
517 | } | |
518 | } | |
519 | } | |
520 | ||
521 | bytes += 4; | |
522 | addridx += 4; | |
523 | } | |
524 | ||
525 | return ret; | |
526 | } | |
527 | ||
528 | int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr, | |
529 | u8 *bytes, size_t size) | |
530 | { | |
531 | int ret = 0; | |
532 | ||
533 | ret = rom_lock(adapter); | |
534 | if (ret < 0) | |
535 | return ret; | |
536 | ||
537 | ret = do_rom_fast_write_words(adapter, addr, bytes, size); | |
538 | netxen_rom_unlock(adapter); | |
539 | ||
540 | return ret; | |
541 | } | |
542 | ||
543 | int netxen_rom_wrsr(struct netxen_adapter *adapter, int data) | |
544 | { | |
545 | int ret; | |
546 | ||
547 | ret = netxen_rom_wren(adapter); | |
548 | if (ret < 0) | |
549 | return ret; | |
550 | ||
551 | netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data); | |
552 | netxen_crb_writelit_adapter(adapter, | |
553 | NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1); | |
554 | ||
555 | ret = netxen_wait_rom_done(adapter); | |
556 | if (ret < 0) | |
557 | return ret; | |
558 | ||
559 | return netxen_rom_wip_poll(adapter); | |
560 | } | |
561 | ||
562 | int netxen_rom_rdsr(struct netxen_adapter *adapter) | |
563 | { | |
564 | int ret; | |
565 | ||
566 | ret = rom_lock(adapter); | |
567 | if (ret < 0) | |
568 | return ret; | |
569 | ||
570 | ret = netxen_do_rom_rdsr(adapter); | |
571 | netxen_rom_unlock(adapter); | |
572 | return ret; | |
573 | } | |
574 | ||
575 | int netxen_backup_crbinit(struct netxen_adapter *adapter) | |
576 | { | |
577 | int ret = FLASH_SUCCESS; | |
578 | int val; | |
579 | char *buffer = kmalloc(FLASH_SECTOR_SIZE, GFP_KERNEL); | |
580 | ||
581 | if (!buffer) | |
582 | return -ENOMEM; | |
583 | /* unlock sector 63 */ | |
584 | val = netxen_rom_rdsr(adapter); | |
585 | val = val & 0xe3; | |
586 | ret = netxen_rom_wrsr(adapter, val); | |
587 | if (ret != FLASH_SUCCESS) | |
588 | goto out_kfree; | |
589 | ||
590 | ret = netxen_rom_wip_poll(adapter); | |
591 | if (ret != FLASH_SUCCESS) | |
592 | goto out_kfree; | |
593 | ||
594 | /* copy sector 0 to sector 63 */ | |
595 | ret = netxen_rom_fast_read_words(adapter, CRBINIT_START, | |
596 | buffer, FLASH_SECTOR_SIZE); | |
597 | if (ret != FLASH_SUCCESS) | |
598 | goto out_kfree; | |
599 | ||
600 | ret = netxen_rom_fast_write_words(adapter, FIXED_START, | |
601 | buffer, FLASH_SECTOR_SIZE); | |
602 | if (ret != FLASH_SUCCESS) | |
603 | goto out_kfree; | |
604 | ||
605 | /* lock sector 63 */ | |
606 | val = netxen_rom_rdsr(adapter); | |
607 | if (!(val & 0x8)) { | |
608 | val |= (0x1 << 2); | |
609 | /* lock sector 63 */ | |
610 | if (netxen_rom_wrsr(adapter, val) == 0) { | |
611 | ret = netxen_rom_wip_poll(adapter); | |
612 | if (ret != FLASH_SUCCESS) | |
613 | goto out_kfree; | |
614 | ||
615 | /* lock SR writes */ | |
616 | ret = netxen_rom_wip_poll(adapter); | |
617 | if (ret != FLASH_SUCCESS) | |
618 | goto out_kfree; | |
619 | } | |
620 | } | |
621 | ||
622 | out_kfree: | |
623 | kfree(buffer); | |
624 | return ret; | |
625 | } | |
626 | ||
cb8011ad AK |
627 | int netxen_do_rom_se(struct netxen_adapter *adapter, int addr) |
628 | { | |
629 | netxen_rom_wren(adapter); | |
630 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); | |
631 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); | |
632 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, | |
633 | M25P_INSTR_SE); | |
634 | if (netxen_wait_rom_done(adapter)) { | |
635 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); | |
636 | return -1; | |
637 | } | |
638 | return netxen_rom_wip_poll(adapter); | |
639 | } | |
640 | ||
27d2ab54 AK |
641 | void check_erased_flash(struct netxen_adapter *adapter, int addr) |
642 | { | |
643 | int i; | |
644 | int val; | |
645 | int count = 0, erased_errors = 0; | |
646 | int range; | |
647 | ||
648 | range = (addr == USER_START) ? FIXED_START : addr + FLASH_SECTOR_SIZE; | |
649 | ||
650 | for (i = addr; i < range; i += 4) { | |
651 | netxen_rom_fast_read(adapter, i, &val); | |
652 | if (val != 0xffffffff) | |
653 | erased_errors++; | |
654 | count++; | |
655 | } | |
656 | ||
657 | if (erased_errors) | |
658 | printk(KERN_INFO "0x%x out of 0x%x words fail to be erased " | |
659 | "for sector address: %x\n", erased_errors, count, addr); | |
660 | } | |
661 | ||
cb8011ad AK |
662 | int netxen_rom_se(struct netxen_adapter *adapter, int addr) |
663 | { | |
664 | int ret = 0; | |
665 | if (rom_lock(adapter) != 0) { | |
666 | return -1; | |
667 | } | |
668 | ret = netxen_do_rom_se(adapter, addr); | |
669 | netxen_rom_unlock(adapter); | |
27d2ab54 AK |
670 | msleep(30); |
671 | check_erased_flash(adapter, addr); | |
672 | ||
673 | return ret; | |
674 | } | |
675 | ||
676 | int | |
677 | netxen_flash_erase_sections(struct netxen_adapter *adapter, int start, int end) | |
678 | { | |
679 | int ret = FLASH_SUCCESS; | |
680 | int i; | |
681 | ||
682 | for (i = start; i < end; i++) { | |
683 | ret = netxen_rom_se(adapter, i * FLASH_SECTOR_SIZE); | |
684 | if (ret) | |
685 | break; | |
686 | ret = netxen_rom_wip_poll(adapter); | |
687 | if (ret < 0) | |
688 | return ret; | |
689 | } | |
690 | ||
691 | return ret; | |
692 | } | |
693 | ||
694 | int | |
695 | netxen_flash_erase_secondary(struct netxen_adapter *adapter) | |
696 | { | |
697 | int ret = FLASH_SUCCESS; | |
698 | int start, end; | |
699 | ||
700 | start = SECONDARY_START / FLASH_SECTOR_SIZE; | |
701 | end = USER_START / FLASH_SECTOR_SIZE; | |
702 | ret = netxen_flash_erase_sections(adapter, start, end); | |
703 | ||
704 | return ret; | |
705 | } | |
706 | ||
707 | int | |
708 | netxen_flash_erase_primary(struct netxen_adapter *adapter) | |
709 | { | |
710 | int ret = FLASH_SUCCESS; | |
711 | int start, end; | |
712 | ||
713 | start = PRIMARY_START / FLASH_SECTOR_SIZE; | |
714 | end = SECONDARY_START / FLASH_SECTOR_SIZE; | |
715 | ret = netxen_flash_erase_sections(adapter, start, end); | |
716 | ||
717 | return ret; | |
718 | } | |
719 | ||
e45d9ab4 AK |
720 | void netxen_halt_pegs(struct netxen_adapter *adapter) |
721 | { | |
722 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1); | |
723 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1); | |
724 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1); | |
725 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1); | |
726 | } | |
727 | ||
27d2ab54 AK |
728 | int netxen_flash_unlock(struct netxen_adapter *adapter) |
729 | { | |
730 | int ret = 0; | |
731 | ||
732 | ret = netxen_rom_wrsr(adapter, 0); | |
733 | if (ret < 0) | |
734 | return ret; | |
735 | ||
736 | ret = netxen_rom_wren(adapter); | |
737 | if (ret < 0) | |
738 | return ret; | |
739 | ||
3d396eb1 AK |
740 | return ret; |
741 | } | |
742 | ||
743 | #define NETXEN_BOARDTYPE 0x4008 | |
744 | #define NETXEN_BOARDNUM 0x400c | |
745 | #define NETXEN_CHIPNUM 0x4010 | |
746 | #define NETXEN_ROMBUS_RESET 0xFFFFFFFF | |
747 | #define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL | |
748 | #define NETXEN_ROM_FOUND_INIT 0x400 | |
749 | ||
750 | int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose) | |
751 | { | |
752 | int addr, val, status; | |
753 | int n, i; | |
754 | int init_delay = 0; | |
755 | struct crb_addr_pair *buf; | |
756 | unsigned long off; | |
757 | ||
758 | /* resetall */ | |
759 | status = netxen_nic_get_board_info(adapter); | |
760 | if (status) | |
cb8011ad | 761 | printk("%s: netxen_pinit_from_rom: Error getting board info\n", |
3d396eb1 AK |
762 | netxen_nic_driver_name); |
763 | ||
764 | netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET, | |
765 | NETXEN_ROMBUS_RESET); | |
766 | ||
767 | if (verbose) { | |
768 | int val; | |
769 | if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0) | |
770 | printk("P2 ROM board type: 0x%08x\n", val); | |
771 | else | |
772 | printk("Could not read board type\n"); | |
773 | if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0) | |
774 | printk("P2 ROM board num: 0x%08x\n", val); | |
775 | else | |
776 | printk("Could not read board number\n"); | |
777 | if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0) | |
778 | printk("P2 ROM chip num: 0x%08x\n", val); | |
779 | else | |
780 | printk("Could not read chip number\n"); | |
781 | } | |
782 | ||
783 | if (netxen_rom_fast_read(adapter, 0, &n) == 0 | |
784 | && (n & NETXEN_ROM_FIRST_BARRIER)) { | |
785 | n &= ~NETXEN_ROM_ROUNDUP; | |
786 | if (n < NETXEN_ROM_FOUND_INIT) { | |
787 | if (verbose) | |
788 | printk("%s: %d CRB init values found" | |
789 | " in ROM.\n", netxen_nic_driver_name, n); | |
790 | } else { | |
791 | printk("%s:n=0x%x Error! NetXen card flash not" | |
792 | " initialized.\n", __FUNCTION__, n); | |
793 | return -EIO; | |
794 | } | |
795 | buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL); | |
796 | if (buf == NULL) { | |
cb8011ad AK |
797 | printk("%s: netxen_pinit_from_rom: Unable to calloc " |
798 | "memory.\n", netxen_nic_driver_name); | |
3d396eb1 AK |
799 | return -ENOMEM; |
800 | } | |
801 | for (i = 0; i < n; i++) { | |
802 | if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0 | |
803 | || netxen_rom_fast_read(adapter, 8 * i + 8, | |
804 | &addr) != 0) | |
805 | return -EIO; | |
806 | ||
807 | buf[i].addr = addr; | |
808 | buf[i].data = val; | |
809 | ||
810 | if (verbose) | |
811 | printk("%s: PCI: 0x%08x == 0x%08x\n", | |
812 | netxen_nic_driver_name, (unsigned int) | |
813 | netxen_decode_crb_addr((unsigned long) | |
814 | addr), val); | |
815 | } | |
816 | for (i = 0; i < n; i++) { | |
817 | ||
1fcca1a5 AK |
818 | off = netxen_decode_crb_addr((unsigned long)buf[i].addr); |
819 | if (off == NETXEN_ADDR_ERROR) { | |
820 | printk(KERN_ERR"CRB init value out of range %lx\n", | |
821 | buf[i].addr); | |
822 | continue; | |
823 | } | |
824 | off += NETXEN_PCI_CRBSPACE; | |
3d396eb1 AK |
825 | /* skipping cold reboot MAGIC */ |
826 | if (off == NETXEN_CAM_RAM(0x1fc)) | |
827 | continue; | |
828 | ||
829 | /* After writing this register, HW needs time for CRB */ | |
830 | /* to quiet down (else crb_window returns 0xffffffff) */ | |
831 | if (off == NETXEN_ROMUSB_GLB_SW_RESET) { | |
832 | init_delay = 1; | |
833 | /* hold xdma in reset also */ | |
cb8011ad | 834 | buf[i].data = NETXEN_NIC_XDMA_RESET; |
3d396eb1 AK |
835 | } |
836 | ||
837 | if (ADDR_IN_WINDOW1(off)) { | |
838 | writel(buf[i].data, | |
839 | NETXEN_CRB_NORMALIZE(adapter, off)); | |
840 | } else { | |
841 | netxen_nic_pci_change_crbwindow(adapter, 0); | |
842 | writel(buf[i].data, | |
cb8011ad | 843 | pci_base_offset(adapter, off)); |
3d396eb1 AK |
844 | |
845 | netxen_nic_pci_change_crbwindow(adapter, 1); | |
846 | } | |
847 | if (init_delay == 1) { | |
848 | ssleep(1); | |
849 | init_delay = 0; | |
850 | } | |
851 | msleep(1); | |
852 | } | |
853 | kfree(buf); | |
854 | ||
855 | /* disable_peg_cache_all */ | |
856 | ||
857 | /* unreset_net_cache */ | |
858 | netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val, | |
859 | 4); | |
860 | netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET, | |
861 | (val & 0xffffff0f)); | |
862 | /* p2dn replyCount */ | |
863 | netxen_crb_writelit_adapter(adapter, | |
864 | NETXEN_CRB_PEG_NET_D + 0xec, 0x1e); | |
865 | /* disable_peg_cache 0 */ | |
866 | netxen_crb_writelit_adapter(adapter, | |
867 | NETXEN_CRB_PEG_NET_D + 0x4c, 8); | |
868 | /* disable_peg_cache 1 */ | |
869 | netxen_crb_writelit_adapter(adapter, | |
870 | NETXEN_CRB_PEG_NET_I + 0x4c, 8); | |
871 | ||
872 | /* peg_clr_all */ | |
873 | ||
874 | /* peg_clr 0 */ | |
875 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, | |
876 | 0); | |
877 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, | |
878 | 0); | |
879 | /* peg_clr 1 */ | |
880 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, | |
881 | 0); | |
882 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, | |
883 | 0); | |
884 | /* peg_clr 2 */ | |
885 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, | |
886 | 0); | |
887 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, | |
888 | 0); | |
889 | /* peg_clr 3 */ | |
890 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, | |
891 | 0); | |
892 | netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, | |
893 | 0); | |
894 | } | |
895 | return 0; | |
896 | } | |
897 | ||
ed25ffa1 AK |
898 | int netxen_initialize_adapter_offload(struct netxen_adapter *adapter) |
899 | { | |
900 | uint64_t addr; | |
901 | uint32_t hi; | |
902 | uint32_t lo; | |
903 | ||
904 | adapter->dummy_dma.addr = | |
905 | pci_alloc_consistent(adapter->ahw.pdev, | |
906 | NETXEN_HOST_DUMMY_DMA_SIZE, | |
907 | &adapter->dummy_dma.phys_addr); | |
908 | if (adapter->dummy_dma.addr == NULL) { | |
909 | printk("%s: ERROR: Could not allocate dummy DMA memory\n", | |
910 | __FUNCTION__); | |
911 | return -ENOMEM; | |
912 | } | |
913 | ||
914 | addr = (uint64_t) adapter->dummy_dma.phys_addr; | |
915 | hi = (addr >> 32) & 0xffffffff; | |
916 | lo = addr & 0xffffffff; | |
917 | ||
918 | writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI)); | |
919 | writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO)); | |
920 | ||
921 | return 0; | |
922 | } | |
923 | ||
924 | void netxen_free_adapter_offload(struct netxen_adapter *adapter) | |
925 | { | |
926 | if (adapter->dummy_dma.addr) { | |
927 | pci_free_consistent(adapter->ahw.pdev, | |
928 | NETXEN_HOST_DUMMY_DMA_SIZE, | |
929 | adapter->dummy_dma.addr, | |
930 | adapter->dummy_dma.phys_addr); | |
931 | adapter->dummy_dma.addr = NULL; | |
932 | } | |
933 | } | |
934 | ||
cb8011ad | 935 | void netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val) |
3d396eb1 AK |
936 | { |
937 | u32 val = 0; | |
938 | int loops = 0; | |
939 | ||
cb8011ad | 940 | if (!pegtune_val) { |
1fcca1a5 | 941 | val = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE)); |
3d396eb1 AK |
942 | while (val != PHAN_INITIALIZE_COMPLETE && loops < 200000) { |
943 | udelay(100); | |
cb8011ad | 944 | schedule(); |
3d396eb1 AK |
945 | val = |
946 | readl(NETXEN_CRB_NORMALIZE | |
947 | (adapter, CRB_CMDPEG_STATE)); | |
948 | loops++; | |
949 | } | |
950 | if (val != PHAN_INITIALIZE_COMPLETE) | |
951 | printk("WARNING: Initial boot wait loop failed...\n"); | |
952 | } | |
953 | } | |
954 | ||
955 | int netxen_nic_rx_has_work(struct netxen_adapter *adapter) | |
956 | { | |
957 | int ctx; | |
958 | ||
959 | for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) { | |
960 | struct netxen_recv_context *recv_ctx = | |
961 | &(adapter->recv_ctx[ctx]); | |
962 | u32 consumer; | |
963 | struct status_desc *desc_head; | |
cb8011ad | 964 | struct status_desc *desc; |
3d396eb1 AK |
965 | |
966 | consumer = recv_ctx->status_rx_consumer; | |
967 | desc_head = recv_ctx->rcv_status_desc_head; | |
968 | desc = &desc_head[consumer]; | |
969 | ||
a608ab9c | 970 | if (netxen_get_sts_owner(desc) & STATUS_OWNER_HOST) |
3d396eb1 AK |
971 | return 1; |
972 | } | |
973 | ||
974 | return 0; | |
975 | } | |
976 | ||
cb8011ad AK |
977 | static inline int netxen_nic_check_temp(struct netxen_adapter *adapter) |
978 | { | |
979 | int port_num; | |
980 | struct netxen_port *port; | |
981 | struct net_device *netdev; | |
982 | uint32_t temp, temp_state, temp_val; | |
983 | int rv = 0; | |
984 | ||
985 | temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE)); | |
986 | ||
987 | temp_state = nx_get_temp_state(temp); | |
988 | temp_val = nx_get_temp_val(temp); | |
989 | ||
990 | if (temp_state == NX_TEMP_PANIC) { | |
991 | printk(KERN_ALERT | |
992 | "%s: Device temperature %d degrees C exceeds" | |
993 | " maximum allowed. Hardware has been shut down.\n", | |
994 | netxen_nic_driver_name, temp_val); | |
995 | for (port_num = 0; port_num < adapter->ahw.max_ports; | |
996 | port_num++) { | |
997 | port = adapter->port[port_num]; | |
998 | netdev = port->netdev; | |
999 | ||
1000 | netif_carrier_off(netdev); | |
1001 | netif_stop_queue(netdev); | |
1002 | } | |
1003 | rv = 1; | |
1004 | } else if (temp_state == NX_TEMP_WARN) { | |
1005 | if (adapter->temp == NX_TEMP_NORMAL) { | |
1006 | printk(KERN_ALERT | |
1007 | "%s: Device temperature %d degrees C " | |
1008 | "exceeds operating range." | |
1009 | " Immediate action needed.\n", | |
1010 | netxen_nic_driver_name, temp_val); | |
1011 | } | |
1012 | } else { | |
1013 | if (adapter->temp == NX_TEMP_WARN) { | |
1014 | printk(KERN_INFO | |
1015 | "%s: Device temperature is now %d degrees C" | |
1016 | " in normal range.\n", netxen_nic_driver_name, | |
1017 | temp_val); | |
1018 | } | |
1019 | } | |
1020 | adapter->temp = temp_state; | |
1021 | return rv; | |
1022 | } | |
1023 | ||
6d5aefb8 | 1024 | void netxen_watchdog_task(struct work_struct *work) |
3d396eb1 AK |
1025 | { |
1026 | int port_num; | |
1027 | struct netxen_port *port; | |
1028 | struct net_device *netdev; | |
6d5aefb8 DH |
1029 | struct netxen_adapter *adapter = |
1030 | container_of(work, struct netxen_adapter, watchdog_task); | |
3d396eb1 | 1031 | |
cb8011ad AK |
1032 | if (netxen_nic_check_temp(adapter)) |
1033 | return; | |
1034 | ||
3d396eb1 AK |
1035 | for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) { |
1036 | port = adapter->port[port_num]; | |
1037 | netdev = port->netdev; | |
1038 | ||
1039 | if ((netif_running(netdev)) && !netif_carrier_ok(netdev)) { | |
1040 | printk(KERN_INFO "%s port %d, %s carrier is now ok\n", | |
1041 | netxen_nic_driver_name, port_num, netdev->name); | |
1042 | netif_carrier_on(netdev); | |
1043 | } | |
1044 | ||
1045 | if (netif_queue_stopped(netdev)) | |
1046 | netif_wake_queue(netdev); | |
1047 | } | |
1048 | ||
80922fbc AK |
1049 | if (adapter->handle_phy_intr) |
1050 | adapter->handle_phy_intr(adapter); | |
3d396eb1 AK |
1051 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); |
1052 | } | |
1053 | ||
1054 | /* | |
1055 | * netxen_process_rcv() send the received packet to the protocol stack. | |
1056 | * and if the number of receives exceeds RX_BUFFERS_REFILL, then we | |
1057 | * invoke the routine to send more rx buffers to the Phantom... | |
1058 | */ | |
1059 | void | |
1060 | netxen_process_rcv(struct netxen_adapter *adapter, int ctxid, | |
1061 | struct status_desc *desc) | |
1062 | { | |
ed25ffa1 | 1063 | struct netxen_port *port = adapter->port[netxen_get_sts_port(desc)]; |
3d396eb1 AK |
1064 | struct pci_dev *pdev = port->pdev; |
1065 | struct net_device *netdev = port->netdev; | |
a608ab9c | 1066 | int index = netxen_get_sts_refhandle(desc); |
3d396eb1 AK |
1067 | struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]); |
1068 | struct netxen_rx_buffer *buffer; | |
1069 | struct sk_buff *skb; | |
a608ab9c | 1070 | u32 length = netxen_get_sts_totallength(desc); |
3d396eb1 AK |
1071 | u32 desc_ctx; |
1072 | struct netxen_rcv_desc_ctx *rcv_desc; | |
1073 | int ret; | |
1074 | ||
ed25ffa1 | 1075 | desc_ctx = netxen_get_sts_type(desc); |
3d396eb1 AK |
1076 | if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) { |
1077 | printk("%s: %s Bad Rcv descriptor ring\n", | |
1078 | netxen_nic_driver_name, netdev->name); | |
1079 | return; | |
1080 | } | |
1081 | ||
1082 | rcv_desc = &recv_ctx->rcv_desc[desc_ctx]; | |
ed25ffa1 AK |
1083 | if (unlikely(index > rcv_desc->max_rx_desc_count)) { |
1084 | DPRINTK(ERR, "Got a buffer index:%x Max is %x\n", | |
1085 | index, rcv_desc->max_rx_desc_count); | |
1086 | return; | |
1087 | } | |
3d396eb1 | 1088 | buffer = &rcv_desc->rx_buf_arr[index]; |
ed25ffa1 AK |
1089 | if (desc_ctx == RCV_DESC_LRO_CTXID) { |
1090 | buffer->lro_current_frags++; | |
1091 | if (netxen_get_sts_desc_lro_last_frag(desc)) { | |
1092 | buffer->lro_expected_frags = | |
1093 | netxen_get_sts_desc_lro_cnt(desc); | |
1094 | buffer->lro_length = length; | |
1095 | } | |
1096 | if (buffer->lro_current_frags != buffer->lro_expected_frags) { | |
1097 | if (buffer->lro_expected_frags != 0) { | |
1098 | printk("LRO: (refhandle:%x) recv frag." | |
1099 | "wait for last. flags: %x expected:%d" | |
1100 | "have:%d\n", index, | |
1101 | netxen_get_sts_desc_lro_last_frag(desc), | |
1102 | buffer->lro_expected_frags, | |
1103 | buffer->lro_current_frags); | |
1104 | } | |
1105 | return; | |
1106 | } | |
1107 | } | |
3d396eb1 AK |
1108 | |
1109 | pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size, | |
1110 | PCI_DMA_FROMDEVICE); | |
1111 | ||
1112 | skb = (struct sk_buff *)buffer->skb; | |
1113 | ||
ed25ffa1 | 1114 | if (likely(netxen_get_sts_status(desc) == STATUS_CKSUM_OK)) { |
3d396eb1 AK |
1115 | port->stats.csummed++; |
1116 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
ed25ffa1 | 1117 | } |
3d396eb1 | 1118 | skb->dev = netdev; |
ed25ffa1 AK |
1119 | if (desc_ctx == RCV_DESC_LRO_CTXID) { |
1120 | /* True length was only available on the last pkt */ | |
1121 | skb_put(skb, buffer->lro_length); | |
1122 | } else { | |
1123 | skb_put(skb, length); | |
1124 | } | |
1125 | ||
3d396eb1 AK |
1126 | skb->protocol = eth_type_trans(skb, netdev); |
1127 | ||
1128 | ret = netif_receive_skb(skb); | |
1129 | ||
1130 | /* | |
1131 | * RH: Do we need these stats on a regular basis. Can we get it from | |
1132 | * Linux stats. | |
1133 | */ | |
1134 | switch (ret) { | |
1135 | case NET_RX_SUCCESS: | |
1136 | port->stats.uphappy++; | |
1137 | break; | |
1138 | ||
1139 | case NET_RX_CN_LOW: | |
1140 | port->stats.uplcong++; | |
1141 | break; | |
1142 | ||
1143 | case NET_RX_CN_MOD: | |
1144 | port->stats.upmcong++; | |
1145 | break; | |
1146 | ||
1147 | case NET_RX_CN_HIGH: | |
1148 | port->stats.uphcong++; | |
1149 | break; | |
1150 | ||
1151 | case NET_RX_DROP: | |
1152 | port->stats.updropped++; | |
1153 | break; | |
1154 | ||
1155 | default: | |
1156 | port->stats.updunno++; | |
1157 | break; | |
1158 | } | |
1159 | ||
1160 | netdev->last_rx = jiffies; | |
1161 | ||
1162 | rcv_desc->rcv_free++; | |
1163 | rcv_desc->rcv_pending--; | |
1164 | ||
1165 | /* | |
1166 | * We just consumed one buffer so post a buffer. | |
1167 | */ | |
1168 | adapter->stats.post_called++; | |
1169 | buffer->skb = NULL; | |
1170 | buffer->state = NETXEN_BUFFER_FREE; | |
ed25ffa1 AK |
1171 | buffer->lro_current_frags = 0; |
1172 | buffer->lro_expected_frags = 0; | |
3d396eb1 AK |
1173 | |
1174 | port->stats.no_rcv++; | |
1175 | port->stats.rxbytes += length; | |
1176 | } | |
1177 | ||
1178 | /* Process Receive status ring */ | |
1179 | u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max) | |
1180 | { | |
1181 | struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]); | |
1182 | struct status_desc *desc_head = recv_ctx->rcv_status_desc_head; | |
1183 | struct status_desc *desc; /* used to read status desc here */ | |
1184 | u32 consumer = recv_ctx->status_rx_consumer; | |
ed25ffa1 | 1185 | u32 producer = 0; |
3d396eb1 AK |
1186 | int count = 0, ring; |
1187 | ||
1188 | DPRINTK(INFO, "procesing receive\n"); | |
1189 | /* | |
1190 | * we assume in this case that there is only one port and that is | |
1191 | * port #1...changes need to be done in firmware to indicate port | |
1192 | * number as part of the descriptor. This way we will be able to get | |
1193 | * the netdev which is associated with that device. | |
1194 | */ | |
1195 | while (count < max) { | |
1196 | desc = &desc_head[consumer]; | |
a608ab9c | 1197 | if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) { |
ed25ffa1 AK |
1198 | DPRINTK(ERR, "desc %p ownedby %x\n", desc, |
1199 | netxen_get_sts_owner(desc)); | |
3d396eb1 AK |
1200 | break; |
1201 | } | |
1202 | netxen_process_rcv(adapter, ctxid, desc); | |
ed25ffa1 | 1203 | netxen_clear_sts_owner(desc); |
a608ab9c | 1204 | netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM); |
3d396eb1 AK |
1205 | consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1); |
1206 | count++; | |
1207 | } | |
1208 | if (count) { | |
1209 | for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) { | |
ed25ffa1 | 1210 | netxen_post_rx_buffers_nodb(adapter, ctxid, ring); |
3d396eb1 AK |
1211 | } |
1212 | } | |
1213 | ||
1214 | /* update the consumer index in phantom */ | |
1215 | if (count) { | |
1216 | adapter->stats.process_rcv++; | |
1217 | recv_ctx->status_rx_consumer = consumer; | |
ed25ffa1 | 1218 | recv_ctx->status_rx_producer = producer; |
3d396eb1 AK |
1219 | |
1220 | /* Window = 1 */ | |
1221 | writel(consumer, | |
1222 | NETXEN_CRB_NORMALIZE(adapter, | |
1223 | recv_crb_registers[ctxid]. | |
1224 | crb_rcv_status_consumer)); | |
1225 | } | |
1226 | ||
1227 | return count; | |
1228 | } | |
1229 | ||
1230 | /* Process Command status ring */ | |
ed25ffa1 | 1231 | int netxen_process_cmd_ring(unsigned long data) |
3d396eb1 AK |
1232 | { |
1233 | u32 last_consumer; | |
1234 | u32 consumer; | |
1235 | struct netxen_adapter *adapter = (struct netxen_adapter *)data; | |
ed25ffa1 AK |
1236 | int count1 = 0; |
1237 | int count2 = 0; | |
3d396eb1 AK |
1238 | struct netxen_cmd_buffer *buffer; |
1239 | struct netxen_port *port; /* port #1 */ | |
1240 | struct netxen_port *nport; | |
1241 | struct pci_dev *pdev; | |
1242 | struct netxen_skb_frag *frag; | |
1243 | u32 i; | |
1244 | struct sk_buff *skb = NULL; | |
1245 | int p; | |
ed25ffa1 | 1246 | int done; |
3d396eb1 AK |
1247 | |
1248 | spin_lock(&adapter->tx_lock); | |
1249 | last_consumer = adapter->last_cmd_consumer; | |
1250 | DPRINTK(INFO, "procesing xmit complete\n"); | |
1251 | /* we assume in this case that there is only one port and that is | |
1252 | * port #1...changes need to be done in firmware to indicate port | |
1253 | * number as part of the descriptor. This way we will be able to get | |
1254 | * the netdev which is associated with that device. | |
1255 | */ | |
3d396eb1 | 1256 | |
9b410117 | 1257 | consumer = le32_to_cpu(*(adapter->cmd_consumer)); |
3d396eb1 AK |
1258 | if (last_consumer == consumer) { /* Ring is empty */ |
1259 | DPRINTK(INFO, "last_consumer %d == consumer %d\n", | |
1260 | last_consumer, consumer); | |
1261 | spin_unlock(&adapter->tx_lock); | |
ed25ffa1 | 1262 | return 1; |
3d396eb1 AK |
1263 | } |
1264 | ||
1265 | adapter->proc_cmd_buf_counter++; | |
1266 | adapter->stats.process_xmit++; | |
1267 | /* | |
1268 | * Not needed - does not seem to be used anywhere. | |
1269 | * adapter->cmd_consumer = consumer; | |
1270 | */ | |
1271 | spin_unlock(&adapter->tx_lock); | |
1272 | ||
ed25ffa1 | 1273 | while ((last_consumer != consumer) && (count1 < MAX_STATUS_HANDLE)) { |
3d396eb1 AK |
1274 | buffer = &adapter->cmd_buf_arr[last_consumer]; |
1275 | port = adapter->port[buffer->port]; | |
1276 | pdev = port->pdev; | |
1277 | frag = &buffer->frag_array[0]; | |
1278 | skb = buffer->skb; | |
1279 | if (skb && (cmpxchg(&buffer->skb, skb, 0) == skb)) { | |
1280 | pci_unmap_single(pdev, frag->dma, frag->length, | |
1281 | PCI_DMA_TODEVICE); | |
1282 | for (i = 1; i < buffer->frag_count; i++) { | |
1283 | DPRINTK(INFO, "getting fragment no %d\n", i); | |
1284 | frag++; /* Get the next frag */ | |
1285 | pci_unmap_page(pdev, frag->dma, frag->length, | |
1286 | PCI_DMA_TODEVICE); | |
1287 | } | |
1288 | ||
1289 | port->stats.skbfreed++; | |
1290 | dev_kfree_skb_any(skb); | |
1291 | skb = NULL; | |
1292 | } else if (adapter->proc_cmd_buf_counter == 1) { | |
1293 | port->stats.txnullskb++; | |
1294 | } | |
1295 | if (unlikely(netif_queue_stopped(port->netdev) | |
1296 | && netif_carrier_ok(port->netdev)) | |
1297 | && ((jiffies - port->netdev->trans_start) > | |
1298 | port->netdev->watchdog_timeo)) { | |
6c586644 | 1299 | SCHEDULE_WORK(&port->tx_timeout_task); |
3d396eb1 AK |
1300 | } |
1301 | ||
1302 | last_consumer = get_next_index(last_consumer, | |
1303 | adapter->max_tx_desc_count); | |
ed25ffa1 | 1304 | count1++; |
3d396eb1 | 1305 | } |
ed25ffa1 | 1306 | adapter->stats.noxmitdone += count1; |
3d396eb1 | 1307 | |
ed25ffa1 | 1308 | count2 = 0; |
3d396eb1 AK |
1309 | spin_lock(&adapter->tx_lock); |
1310 | if ((--adapter->proc_cmd_buf_counter) == 0) { | |
1311 | adapter->last_cmd_consumer = last_consumer; | |
1312 | while ((adapter->last_cmd_consumer != consumer) | |
ed25ffa1 | 1313 | && (count2 < MAX_STATUS_HANDLE)) { |
3d396eb1 AK |
1314 | buffer = |
1315 | &adapter->cmd_buf_arr[adapter->last_cmd_consumer]; | |
ed25ffa1 | 1316 | count2++; |
3d396eb1 AK |
1317 | if (buffer->skb) |
1318 | break; | |
1319 | else | |
1320 | adapter->last_cmd_consumer = | |
1321 | get_next_index(adapter->last_cmd_consumer, | |
1322 | adapter->max_tx_desc_count); | |
1323 | } | |
1324 | } | |
ed25ffa1 | 1325 | if (count1 || count2) { |
3d396eb1 AK |
1326 | for (p = 0; p < adapter->ahw.max_ports; p++) { |
1327 | nport = adapter->port[p]; | |
1328 | if (netif_queue_stopped(nport->netdev) | |
1329 | && (nport->flags & NETXEN_NETDEV_STATUS)) { | |
1330 | netif_wake_queue(nport->netdev); | |
1331 | nport->flags &= ~NETXEN_NETDEV_STATUS; | |
1332 | } | |
1333 | } | |
1334 | } | |
ed25ffa1 AK |
1335 | /* |
1336 | * If everything is freed up to consumer then check if the ring is full | |
1337 | * If the ring is full then check if more needs to be freed and | |
1338 | * schedule the call back again. | |
1339 | * | |
1340 | * This happens when there are 2 CPUs. One could be freeing and the | |
1341 | * other filling it. If the ring is full when we get out of here and | |
1342 | * the card has already interrupted the host then the host can miss the | |
1343 | * interrupt. | |
1344 | * | |
1345 | * There is still a possible race condition and the host could miss an | |
1346 | * interrupt. The card has to take care of this. | |
1347 | */ | |
1348 | if (adapter->last_cmd_consumer == consumer && | |
1349 | (((adapter->cmd_producer + 1) % | |
1350 | adapter->max_tx_desc_count) == adapter->last_cmd_consumer)) { | |
9b410117 | 1351 | consumer = le32_to_cpu(*(adapter->cmd_consumer)); |
ed25ffa1 AK |
1352 | } |
1353 | done = (adapter->last_cmd_consumer == consumer); | |
3d396eb1 AK |
1354 | |
1355 | spin_unlock(&adapter->tx_lock); | |
1356 | DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer, | |
1357 | __FUNCTION__); | |
ed25ffa1 | 1358 | return (done); |
3d396eb1 AK |
1359 | } |
1360 | ||
1361 | /* | |
1362 | * netxen_post_rx_buffers puts buffer in the Phantom memory | |
1363 | */ | |
1364 | void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid) | |
1365 | { | |
1366 | struct pci_dev *pdev = adapter->ahw.pdev; | |
1367 | struct sk_buff *skb; | |
1368 | struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]); | |
1369 | struct netxen_rcv_desc_ctx *rcv_desc = NULL; | |
ed25ffa1 | 1370 | uint producer; |
3d396eb1 AK |
1371 | struct rcv_desc *pdesc; |
1372 | struct netxen_rx_buffer *buffer; | |
1373 | int count = 0; | |
1374 | int index = 0; | |
ed25ffa1 AK |
1375 | netxen_ctx_msg msg = 0; |
1376 | dma_addr_t dma; | |
3d396eb1 AK |
1377 | |
1378 | adapter->stats.post_called++; | |
1379 | rcv_desc = &recv_ctx->rcv_desc[ringid]; | |
3d396eb1 AK |
1380 | |
1381 | producer = rcv_desc->producer; | |
1382 | index = rcv_desc->begin_alloc; | |
1383 | buffer = &rcv_desc->rx_buf_arr[index]; | |
1384 | /* We can start writing rx descriptors into the phantom memory. */ | |
1385 | while (buffer->state == NETXEN_BUFFER_FREE) { | |
1386 | skb = dev_alloc_skb(rcv_desc->skb_size); | |
1387 | if (unlikely(!skb)) { | |
1388 | /* | |
ed25ffa1 | 1389 | * TODO |
3d396eb1 AK |
1390 | * We need to schedule the posting of buffers to the pegs. |
1391 | */ | |
1392 | rcv_desc->begin_alloc = index; | |
cb8011ad | 1393 | DPRINTK(ERR, "netxen_post_rx_buffers: " |
3d396eb1 AK |
1394 | " allocated only %d buffers\n", count); |
1395 | break; | |
1396 | } | |
ed25ffa1 AK |
1397 | |
1398 | count++; /* now there should be no failure */ | |
1399 | pdesc = &rcv_desc->desc_head[producer]; | |
1400 | ||
1401 | #if defined(XGB_DEBUG) | |
1402 | *(unsigned long *)(skb->head) = 0xc0debabe; | |
1403 | if (skb_is_nonlinear(skb)) { | |
1404 | printk("Allocated SKB @%p is nonlinear\n"); | |
1405 | } | |
1406 | #endif | |
1407 | skb_reserve(skb, 2); | |
1408 | /* This will be setup when we receive the | |
1409 | * buffer after it has been filled FSL TBD TBD | |
1410 | * skb->dev = netdev; | |
1411 | */ | |
1412 | dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size, | |
1413 | PCI_DMA_FROMDEVICE); | |
ed33ebe4 | 1414 | pdesc->addr_buffer = cpu_to_le64(dma); |
ed25ffa1 AK |
1415 | buffer->skb = skb; |
1416 | buffer->state = NETXEN_BUFFER_BUSY; | |
1417 | buffer->dma = dma; | |
1418 | /* make a rcv descriptor */ | |
ed33ebe4 AK |
1419 | pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); |
1420 | pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size); | |
ed25ffa1 AK |
1421 | DPRINTK(INFO, "done writing descripter\n"); |
1422 | producer = | |
1423 | get_next_index(producer, rcv_desc->max_rx_desc_count); | |
1424 | index = get_next_index(index, rcv_desc->max_rx_desc_count); | |
1425 | buffer = &rcv_desc->rx_buf_arr[index]; | |
1426 | } | |
1427 | /* if we did allocate buffers, then write the count to Phantom */ | |
1428 | if (count) { | |
1429 | rcv_desc->begin_alloc = index; | |
1430 | rcv_desc->rcv_pending += count; | |
1431 | adapter->stats.lastposted = count; | |
1432 | adapter->stats.posted += count; | |
1433 | rcv_desc->producer = producer; | |
1434 | if (rcv_desc->rcv_free >= 32) { | |
1435 | rcv_desc->rcv_free = 0; | |
1436 | /* Window = 1 */ | |
1437 | writel((producer - 1) & | |
1438 | (rcv_desc->max_rx_desc_count - 1), | |
1439 | NETXEN_CRB_NORMALIZE(adapter, | |
1440 | recv_crb_registers[0]. | |
1441 | rcv_desc_crb[ringid]. | |
1442 | crb_rcv_producer_offset)); | |
1443 | /* | |
1444 | * Write a doorbell msg to tell phanmon of change in | |
1445 | * receive ring producer | |
1446 | */ | |
1447 | netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID); | |
1448 | netxen_set_msg_privid(msg); | |
1449 | netxen_set_msg_count(msg, | |
1450 | ((producer - | |
1451 | 1) & (rcv_desc-> | |
1452 | max_rx_desc_count - 1))); | |
1453 | netxen_set_msg_ctxid(msg, 0); | |
1454 | netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid)); | |
1455 | writel(msg, | |
1456 | DB_NORMALIZE(adapter, | |
1457 | NETXEN_RCV_PRODUCER_OFFSET)); | |
1458 | } | |
1459 | } | |
1460 | } | |
1461 | ||
1462 | void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, uint32_t ctx, | |
1463 | uint32_t ringid) | |
1464 | { | |
1465 | struct pci_dev *pdev = adapter->ahw.pdev; | |
1466 | struct sk_buff *skb; | |
1467 | struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]); | |
1468 | struct netxen_rcv_desc_ctx *rcv_desc = NULL; | |
1469 | u32 producer; | |
1470 | struct rcv_desc *pdesc; | |
1471 | struct netxen_rx_buffer *buffer; | |
1472 | int count = 0; | |
1473 | int index = 0; | |
1474 | ||
1475 | adapter->stats.post_called++; | |
1476 | rcv_desc = &recv_ctx->rcv_desc[ringid]; | |
1477 | ||
1478 | producer = rcv_desc->producer; | |
1479 | index = rcv_desc->begin_alloc; | |
1480 | buffer = &rcv_desc->rx_buf_arr[index]; | |
1481 | /* We can start writing rx descriptors into the phantom memory. */ | |
1482 | while (buffer->state == NETXEN_BUFFER_FREE) { | |
1483 | skb = dev_alloc_skb(rcv_desc->skb_size); | |
1484 | if (unlikely(!skb)) { | |
1485 | /* | |
1486 | * We need to schedule the posting of buffers to the pegs. | |
1487 | */ | |
1488 | rcv_desc->begin_alloc = index; | |
1489 | DPRINTK(ERR, "netxen_post_rx_buffers_nodb: " | |
1490 | " allocated only %d buffers\n", count); | |
1491 | break; | |
1492 | } | |
3d396eb1 AK |
1493 | count++; /* now there should be no failure */ |
1494 | pdesc = &rcv_desc->desc_head[producer]; | |
ed25ffa1 | 1495 | skb_reserve(skb, 2); |
3d396eb1 AK |
1496 | /* |
1497 | * This will be setup when we receive the | |
1498 | * buffer after it has been filled | |
1499 | * skb->dev = netdev; | |
1500 | */ | |
1501 | buffer->skb = skb; | |
1502 | buffer->state = NETXEN_BUFFER_BUSY; | |
1503 | buffer->dma = pci_map_single(pdev, skb->data, | |
1504 | rcv_desc->dma_size, | |
1505 | PCI_DMA_FROMDEVICE); | |
ed25ffa1 | 1506 | |
3d396eb1 | 1507 | /* make a rcv descriptor */ |
ed33ebe4 | 1508 | pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); |
a608ab9c | 1509 | pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size); |
3d396eb1 AK |
1510 | pdesc->addr_buffer = cpu_to_le64(buffer->dma); |
1511 | DPRINTK(INFO, "done writing descripter\n"); | |
1512 | producer = | |
1513 | get_next_index(producer, rcv_desc->max_rx_desc_count); | |
1514 | index = get_next_index(index, rcv_desc->max_rx_desc_count); | |
1515 | buffer = &rcv_desc->rx_buf_arr[index]; | |
1516 | } | |
1517 | ||
1518 | /* if we did allocate buffers, then write the count to Phantom */ | |
1519 | if (count) { | |
1520 | rcv_desc->begin_alloc = index; | |
1521 | rcv_desc->rcv_pending += count; | |
1522 | adapter->stats.lastposted = count; | |
1523 | adapter->stats.posted += count; | |
1524 | rcv_desc->producer = producer; | |
1525 | if (rcv_desc->rcv_free >= 32) { | |
1526 | rcv_desc->rcv_free = 0; | |
1527 | /* Window = 1 */ | |
1528 | writel((producer - 1) & | |
1529 | (rcv_desc->max_rx_desc_count - 1), | |
1530 | NETXEN_CRB_NORMALIZE(adapter, | |
ed25ffa1 AK |
1531 | recv_crb_registers[0]. |
1532 | rcv_desc_crb[ringid]. | |
3d396eb1 AK |
1533 | crb_rcv_producer_offset)); |
1534 | wmb(); | |
1535 | } | |
1536 | } | |
1537 | } | |
1538 | ||
1539 | int netxen_nic_tx_has_work(struct netxen_adapter *adapter) | |
1540 | { | |
1541 | if (find_diff_among(adapter->last_cmd_consumer, | |
1542 | adapter->cmd_producer, | |
1543 | adapter->max_tx_desc_count) > 0) | |
1544 | return 1; | |
1545 | ||
1546 | return 0; | |
1547 | } | |
1548 | ||
3d396eb1 AK |
1549 | |
1550 | void netxen_nic_clear_stats(struct netxen_adapter *adapter) | |
1551 | { | |
1552 | struct netxen_port *port; | |
1553 | int port_num; | |
1554 | ||
1555 | memset(&adapter->stats, 0, sizeof(adapter->stats)); | |
1556 | for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) { | |
1557 | port = adapter->port[port_num]; | |
1558 | memset(&port->stats, 0, sizeof(port->stats)); | |
1559 | } | |
1560 | } | |
1561 |