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225c7b1f RD |
1 | /* |
2 | * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. | |
51a379d0 | 3 | * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. |
225c7b1f RD |
4 | * |
5 | * This software is available to you under a choice of one of two | |
6 | * licenses. You may choose to be licensed under the terms of the GNU | |
7 | * General Public License (GPL) Version 2, available from the file | |
8 | * COPYING in the main directory of this source tree, or the | |
9 | * OpenIB.org BSD license below: | |
10 | * | |
11 | * Redistribution and use in source and binary forms, with or | |
12 | * without modification, are permitted provided that the following | |
13 | * conditions are met: | |
14 | * | |
15 | * - Redistributions of source code must retain the above | |
16 | * copyright notice, this list of conditions and the following | |
17 | * disclaimer. | |
18 | * | |
19 | * - Redistributions in binary form must reproduce the above | |
20 | * copyright notice, this list of conditions and the following | |
21 | * disclaimer in the documentation and/or other materials | |
22 | * provided with the distribution. | |
23 | * | |
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
31 | * SOFTWARE. | |
32 | */ | |
33 | ||
34 | #include <linux/init.h> | |
35 | ||
36 | #include <linux/mlx4/cmd.h> | |
37 | ||
38 | #include "mlx4.h" | |
39 | #include "icm.h" | |
40 | ||
41 | struct mlx4_srq_context { | |
42 | __be32 state_logsize_srqn; | |
43 | u8 logstride; | |
44 | u8 reserved1[3]; | |
45 | u8 pg_offset; | |
46 | u8 reserved2[3]; | |
47 | u32 reserved3; | |
48 | u8 log_page_size; | |
49 | u8 reserved4[2]; | |
50 | u8 mtt_base_addr_h; | |
51 | __be32 mtt_base_addr_l; | |
52 | __be32 pd; | |
53 | __be16 limit_watermark; | |
54 | __be16 wqe_cnt; | |
55 | u16 reserved5; | |
56 | __be16 wqe_counter; | |
57 | u32 reserved6; | |
58 | __be64 db_rec_addr; | |
59 | }; | |
60 | ||
61 | void mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type) | |
62 | { | |
63 | struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table; | |
64 | struct mlx4_srq *srq; | |
65 | ||
66 | spin_lock(&srq_table->lock); | |
67 | ||
68 | srq = radix_tree_lookup(&srq_table->tree, srqn & (dev->caps.num_srqs - 1)); | |
69 | if (srq) | |
70 | atomic_inc(&srq->refcount); | |
71 | ||
72 | spin_unlock(&srq_table->lock); | |
73 | ||
74 | if (!srq) { | |
75 | mlx4_warn(dev, "Async event for bogus SRQ %08x\n", srqn); | |
76 | return; | |
77 | } | |
78 | ||
79 | srq->event(srq, event_type); | |
80 | ||
81 | if (atomic_dec_and_test(&srq->refcount)) | |
82 | complete(&srq->free); | |
83 | } | |
84 | ||
85 | static int mlx4_SW2HW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, | |
86 | int srq_num) | |
87 | { | |
88 | return mlx4_cmd(dev, mailbox->dma, srq_num, 0, MLX4_CMD_SW2HW_SRQ, | |
89 | MLX4_CMD_TIME_CLASS_A); | |
90 | } | |
91 | ||
92 | static int mlx4_HW2SW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, | |
93 | int srq_num) | |
94 | { | |
95 | return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, srq_num, | |
96 | mailbox ? 0 : 1, MLX4_CMD_HW2SW_SRQ, | |
97 | MLX4_CMD_TIME_CLASS_A); | |
98 | } | |
99 | ||
100 | static int mlx4_ARM_SRQ(struct mlx4_dev *dev, int srq_num, int limit_watermark) | |
101 | { | |
102 | return mlx4_cmd(dev, limit_watermark, srq_num, 0, MLX4_CMD_ARM_SRQ, | |
103 | MLX4_CMD_TIME_CLASS_B); | |
104 | } | |
105 | ||
65541cb7 JM |
106 | static int mlx4_QUERY_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, |
107 | int srq_num) | |
108 | { | |
109 | return mlx4_cmd_box(dev, 0, mailbox->dma, srq_num, 0, MLX4_CMD_QUERY_SRQ, | |
110 | MLX4_CMD_TIME_CLASS_A); | |
111 | } | |
112 | ||
225c7b1f RD |
113 | int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, struct mlx4_mtt *mtt, |
114 | u64 db_rec, struct mlx4_srq *srq) | |
115 | { | |
116 | struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table; | |
117 | struct mlx4_cmd_mailbox *mailbox; | |
118 | struct mlx4_srq_context *srq_context; | |
119 | u64 mtt_addr; | |
120 | int err; | |
121 | ||
122 | srq->srqn = mlx4_bitmap_alloc(&srq_table->bitmap); | |
123 | if (srq->srqn == -1) | |
124 | return -ENOMEM; | |
125 | ||
126 | err = mlx4_table_get(dev, &srq_table->table, srq->srqn); | |
127 | if (err) | |
128 | goto err_out; | |
129 | ||
130 | err = mlx4_table_get(dev, &srq_table->cmpt_table, srq->srqn); | |
131 | if (err) | |
132 | goto err_put; | |
133 | ||
134 | spin_lock_irq(&srq_table->lock); | |
135 | err = radix_tree_insert(&srq_table->tree, srq->srqn, srq); | |
136 | spin_unlock_irq(&srq_table->lock); | |
137 | if (err) | |
138 | goto err_cmpt_put; | |
139 | ||
140 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
141 | if (IS_ERR(mailbox)) { | |
142 | err = PTR_ERR(mailbox); | |
143 | goto err_radix; | |
144 | } | |
145 | ||
146 | srq_context = mailbox->buf; | |
147 | memset(srq_context, 0, sizeof *srq_context); | |
148 | ||
149 | srq_context->state_logsize_srqn = cpu_to_be32((ilog2(srq->max) << 24) | | |
150 | srq->srqn); | |
151 | srq_context->logstride = srq->wqe_shift - 4; | |
152 | srq_context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT; | |
153 | ||
154 | mtt_addr = mlx4_mtt_addr(dev, mtt); | |
155 | srq_context->mtt_base_addr_h = mtt_addr >> 32; | |
156 | srq_context->mtt_base_addr_l = cpu_to_be32(mtt_addr & 0xffffffff); | |
157 | srq_context->pd = cpu_to_be32(pdn); | |
158 | srq_context->db_rec_addr = cpu_to_be64(db_rec); | |
159 | ||
160 | err = mlx4_SW2HW_SRQ(dev, mailbox, srq->srqn); | |
161 | mlx4_free_cmd_mailbox(dev, mailbox); | |
162 | if (err) | |
163 | goto err_radix; | |
164 | ||
165 | atomic_set(&srq->refcount, 1); | |
166 | init_completion(&srq->free); | |
167 | ||
168 | return 0; | |
169 | ||
170 | err_radix: | |
171 | spin_lock_irq(&srq_table->lock); | |
172 | radix_tree_delete(&srq_table->tree, srq->srqn); | |
173 | spin_unlock_irq(&srq_table->lock); | |
174 | ||
175 | err_cmpt_put: | |
176 | mlx4_table_put(dev, &srq_table->cmpt_table, srq->srqn); | |
177 | ||
178 | err_put: | |
179 | mlx4_table_put(dev, &srq_table->table, srq->srqn); | |
180 | ||
181 | err_out: | |
182 | mlx4_bitmap_free(&srq_table->bitmap, srq->srqn); | |
183 | ||
184 | return err; | |
185 | } | |
186 | EXPORT_SYMBOL_GPL(mlx4_srq_alloc); | |
187 | ||
188 | void mlx4_srq_free(struct mlx4_dev *dev, struct mlx4_srq *srq) | |
189 | { | |
190 | struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table; | |
191 | int err; | |
192 | ||
193 | err = mlx4_HW2SW_SRQ(dev, NULL, srq->srqn); | |
194 | if (err) | |
195 | mlx4_warn(dev, "HW2SW_SRQ failed (%d) for SRQN %06x\n", err, srq->srqn); | |
196 | ||
197 | spin_lock_irq(&srq_table->lock); | |
198 | radix_tree_delete(&srq_table->tree, srq->srqn); | |
199 | spin_unlock_irq(&srq_table->lock); | |
200 | ||
201 | if (atomic_dec_and_test(&srq->refcount)) | |
202 | complete(&srq->free); | |
203 | wait_for_completion(&srq->free); | |
204 | ||
205 | mlx4_table_put(dev, &srq_table->table, srq->srqn); | |
206 | mlx4_bitmap_free(&srq_table->bitmap, srq->srqn); | |
207 | } | |
208 | EXPORT_SYMBOL_GPL(mlx4_srq_free); | |
209 | ||
210 | int mlx4_srq_arm(struct mlx4_dev *dev, struct mlx4_srq *srq, int limit_watermark) | |
211 | { | |
212 | return mlx4_ARM_SRQ(dev, srq->srqn, limit_watermark); | |
213 | } | |
214 | EXPORT_SYMBOL_GPL(mlx4_srq_arm); | |
215 | ||
65541cb7 JM |
216 | int mlx4_srq_query(struct mlx4_dev *dev, struct mlx4_srq *srq, int *limit_watermark) |
217 | { | |
218 | struct mlx4_cmd_mailbox *mailbox; | |
219 | struct mlx4_srq_context *srq_context; | |
220 | int err; | |
221 | ||
222 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
223 | if (IS_ERR(mailbox)) | |
224 | return PTR_ERR(mailbox); | |
225 | ||
226 | srq_context = mailbox->buf; | |
227 | ||
228 | err = mlx4_QUERY_SRQ(dev, mailbox, srq->srqn); | |
229 | if (err) | |
230 | goto err_out; | |
d7dc3ccb | 231 | *limit_watermark = be16_to_cpu(srq_context->limit_watermark); |
65541cb7 JM |
232 | |
233 | err_out: | |
234 | mlx4_free_cmd_mailbox(dev, mailbox); | |
235 | return err; | |
236 | } | |
237 | EXPORT_SYMBOL_GPL(mlx4_srq_query); | |
238 | ||
3d73c288 | 239 | int mlx4_init_srq_table(struct mlx4_dev *dev) |
225c7b1f RD |
240 | { |
241 | struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table; | |
242 | int err; | |
243 | ||
244 | spin_lock_init(&srq_table->lock); | |
245 | INIT_RADIX_TREE(&srq_table->tree, GFP_ATOMIC); | |
246 | ||
247 | err = mlx4_bitmap_init(&srq_table->bitmap, dev->caps.num_srqs, | |
93fc9e1b | 248 | dev->caps.num_srqs - 1, dev->caps.reserved_srqs, 0); |
225c7b1f RD |
249 | if (err) |
250 | return err; | |
251 | ||
252 | return 0; | |
253 | } | |
254 | ||
255 | void mlx4_cleanup_srq_table(struct mlx4_dev *dev) | |
256 | { | |
257 | mlx4_bitmap_cleanup(&mlx4_priv(dev)->srq_table.bitmap); | |
258 | } |