[linux-2.6-block.git] / drivers / net / mlx4 / mcg.c

/*
 * Copyright (c) 2006, 2007 Cisco Systems, Inc.  All rights reserved.
 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#include <linux/string.h>
#include <linux/etherdevice.h>

#include <linux/mlx4/cmd.h>

#include "mlx4.h"

#define MGM_QPN_MASK       0x00FFFFFF
#define MGM_BLCK_LB_BIT    30

struct mlx4_mgm {
	__be32			next_gid_index;
	__be32			members_count;
	u32			reserved[2];
	u8			gid[16];
	__be32			qp[MLX4_QP_PER_MGM];
};

static const u8 zero_gid[16];	/* automatically initialized to 0 */

static int mlx4_READ_ENTRY(struct mlx4_dev *dev, int index,
			   struct mlx4_cmd_mailbox *mailbox)
{
	return mlx4_cmd_box(dev, 0, mailbox->dma, index, 0, MLX4_CMD_READ_MCG,
			    MLX4_CMD_TIME_CLASS_A);
}

static int mlx4_WRITE_ENTRY(struct mlx4_dev *dev, int index,
			    struct mlx4_cmd_mailbox *mailbox)
{
	return mlx4_cmd(dev, mailbox->dma, index, 0, MLX4_CMD_WRITE_MCG,
			MLX4_CMD_TIME_CLASS_A);
}

static int mlx4_GID_HASH(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
			 u16 *hash, u8 op_mod)
{
	u64 imm;
	int err;

	err = mlx4_cmd_imm(dev, mailbox->dma, &imm, 0, op_mod,
			   MLX4_CMD_MGID_HASH, MLX4_CMD_TIME_CLASS_A);

	if (!err)
		*hash = imm;

	return err;
}

/*
 * Caller must hold MCG table semaphore.  gid and mgm parameters must
 * be properly aligned for command interface.
 *
 *  Returns 0 unless a firmware command error occurs.
 *
 * If GID is found in MGM or MGM is empty, *index = *hash, *prev = -1
 * and *mgm holds MGM entry.
 *
 * if GID is found in AMGM, *index = index in AMGM, *prev = index of
 * previous entry in hash chain and *mgm holds AMGM entry.
 *
 * If no AMGM exists for given gid, *index = -1, *prev = index of last
 * entry in hash chain and *mgm holds end of hash chain.
 */
static int find_entry(struct mlx4_dev *dev, u8 port,
		      u8 *gid, enum mlx4_protocol prot,
		      enum mlx4_steer_type steer,
		      struct mlx4_cmd_mailbox *mgm_mailbox,
		      u16 *hash, int *prev, int *index)
{
	struct mlx4_cmd_mailbox *mailbox;
	struct mlx4_mgm *mgm = mgm_mailbox->buf;
	u8 *mgid;
	int err;
	u8 op_mod = (prot == MLX4_PROT_ETH) ? !!(dev->caps.vep_mc_steering) : 0;

	mailbox = mlx4_alloc_cmd_mailbox(dev);
	if (IS_ERR(mailbox))
		return -ENOMEM;
	mgid = mailbox->buf;

	memcpy(mgid, gid, 16);

	err = mlx4_GID_HASH(dev, mailbox, hash, op_mod);
	mlx4_free_cmd_mailbox(dev, mailbox);
	if (err)
		return err;

	if (0)
		mlx4_dbg(dev, "Hash for %pI6 is %04x\n", gid, *hash);

	*index = *hash;
	*prev  = -1;

	do {
		err = mlx4_READ_ENTRY(dev, *index, mgm_mailbox);
		if (err)
			return err;

		if (!(be32_to_cpu(mgm->members_count) & 0xffffff)) {
			if (*index != *hash) {
				mlx4_err(dev, "Found zero MGID in AMGM.\n");
				err = -EINVAL;
			}
			return err;
		}

		if (!memcmp(mgm->gid, gid, 16) &&
		    be32_to_cpu(mgm->members_count) >> 30 == prot)
			return err;

		*prev = *index;
		*index = be32_to_cpu(mgm->next_gid_index) >> 6;
	} while (*index);

	*index = -1;
	return err;
}

int mlx4_qp_attach_common(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16],
			  int block_mcast_loopback, enum mlx4_protocol prot,
			  enum mlx4_steer_type steer)
{
	struct mlx4_priv *priv = mlx4_priv(dev);
	struct mlx4_cmd_mailbox *mailbox;
	struct mlx4_mgm *mgm;
	u32 members_count;
	u16 hash;
	int index, prev;
	int link = 0;
	int i;
	int err;
	u8 port = gid[5];

	mailbox = mlx4_alloc_cmd_mailbox(dev);
	if (IS_ERR(mailbox))
		return PTR_ERR(mailbox);
	mgm = mailbox->buf;

	mutex_lock(&priv->mcg_table.mutex);
	err = find_entry(dev, port, gid, prot, steer,
			 mailbox, &hash, &prev, &index);
	if (err)
		goto out;

	if (index != -1) {
		if (!(be32_to_cpu(mgm->members_count) & 0xffffff))
			memcpy(mgm->gid, gid, 16);
	} else {
		link = 1;

		index = mlx4_bitmap_alloc(&priv->mcg_table.bitmap);
		if (index == -1) {
			mlx4_err(dev, "No AMGM entries left\n");
			err = -ENOMEM;
			goto out;
		}
		index += dev->caps.num_mgms;

		memset(mgm, 0, sizeof *mgm);
		memcpy(mgm->gid, gid, 16);
	}

	members_count = be32_to_cpu(mgm->members_count) & 0xffffff;
	if (members_count == MLX4_QP_PER_MGM) {
		mlx4_err(dev, "MGM at index %x is full.\n", index);
		err = -ENOMEM;
		goto out;
	}

	for (i = 0; i < members_count; ++i)
		if ((be32_to_cpu(mgm->qp[i]) & MGM_QPN_MASK) == qp->qpn) {
			mlx4_dbg(dev, "QP %06x already a member of MGM\n", qp->qpn);
			err = 0;
			goto out;
		}

	if (block_mcast_loopback)
		mgm->qp[members_count++] = cpu_to_be32((qp->qpn & MGM_QPN_MASK) |
						       (1U << MGM_BLCK_LB_BIT));
	else
		mgm->qp[members_count++] = cpu_to_be32(qp->qpn & MGM_QPN_MASK);

	mgm->members_count = cpu_to_be32(members_count | (u32) prot << 30);

	err = mlx4_WRITE_ENTRY(dev, index, mailbox);
	if (err)
		goto out;

	if (!link)
		goto out;

	err = mlx4_READ_ENTRY(dev, prev, mailbox);
	if (err)
		goto out;

	mgm->next_gid_index = cpu_to_be32(index << 6);

	err = mlx4_WRITE_ENTRY(dev, prev, mailbox);
	if (err)
		goto out;

out:
	if (err && link && index != -1) {
		if (index < dev->caps.num_mgms)
			mlx4_warn(dev, "Got AMGM index %d < %d",
				  index, dev->caps.num_mgms);
		else
			mlx4_bitmap_free(&priv->mcg_table.bitmap,
					 index - dev->caps.num_mgms);
	}
	mutex_unlock(&priv->mcg_table.mutex);

	mlx4_free_cmd_mailbox(dev, mailbox);
	return err;
}

int mlx4_qp_detach_common(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16],
			  enum mlx4_protocol prot, enum mlx4_steer_type steer)
{
	struct mlx4_priv *priv = mlx4_priv(dev);
	struct mlx4_cmd_mailbox *mailbox;
	struct mlx4_mgm *mgm;
	u32 members_count;
	u16 hash;
	int prev, index;
	int i, loc;
	int err;
	u8 port = gid[5];

	mailbox = mlx4_alloc_cmd_mailbox(dev);
	if (IS_ERR(mailbox))
		return PTR_ERR(mailbox);
	mgm = mailbox->buf;

	mutex_lock(&priv->mcg_table.mutex);

	err = find_entry(dev, port, gid, prot, steer,
			 mailbox, &hash, &prev, &index);
	if (err)
		goto out;

	if (index == -1) {
		mlx4_err(dev, "MGID %pI6 not found\n", gid);
		err = -EINVAL;
		goto out;
	}

	members_count = be32_to_cpu(mgm->members_count) & 0xffffff;
	for (loc = -1, i = 0; i < members_count; ++i)
		if ((be32_to_cpu(mgm->qp[i]) & MGM_QPN_MASK) == qp->qpn)
			loc = i;

	if (loc == -1) {
		mlx4_err(dev, "QP %06x not found in MGM\n", qp->qpn);
		err = -EINVAL;
		goto out;
	}


	mgm->members_count = cpu_to_be32(--members_count | (u32) prot << 30);
	mgm->qp[loc]       = mgm->qp[i - 1];
	mgm->qp[i - 1]     = 0;

	if (i != 1) {
		err = mlx4_WRITE_ENTRY(dev, index, mailbox);
		goto out;
	}

	if (prev == -1) {
		/* Remove entry from MGM */
		int amgm_index = be32_to_cpu(mgm->next_gid_index) >> 6;
		if (amgm_index) {
			err = mlx4_READ_ENTRY(dev, amgm_index, mailbox);
			if (err)
				goto out;
		} else
			memset(mgm->gid, 0, 16);

		err = mlx4_WRITE_ENTRY(dev, index, mailbox);
		if (err)
			goto out;

		if (amgm_index) {
			if (amgm_index < dev->caps.num_mgms)
				mlx4_warn(dev, "MGM entry %d had AMGM index %d < %d",
					  index, amgm_index, dev->caps.num_mgms);
			else
				mlx4_bitmap_free(&priv->mcg_table.bitmap,
						 amgm_index - dev->caps.num_mgms);
		}
	} else {
		/* Remove entry from AMGM */
		int cur_next_index = be32_to_cpu(mgm->next_gid_index) >> 6;
		err = mlx4_READ_ENTRY(dev, prev, mailbox);
		if (err)
			goto out;

		mgm->next_gid_index = cpu_to_be32(cur_next_index << 6);

		err = mlx4_WRITE_ENTRY(dev, prev, mailbox);
		if (err)
			goto out;

		if (index < dev->caps.num_mgms)
			mlx4_warn(dev, "entry %d had next AMGM index %d < %d",
				  prev, index, dev->caps.num_mgms);
		else
			mlx4_bitmap_free(&priv->mcg_table.bitmap,
					 index - dev->caps.num_mgms);
	}

out:
	mutex_unlock(&priv->mcg_table.mutex);

	mlx4_free_cmd_mailbox(dev, mailbox);
	return err;
}


int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16],
			  int block_mcast_loopback, enum mlx4_protocol prot)
{
	enum mlx4_steer_type steer;

	steer = (is_valid_ether_addr(&gid[10])) ? MLX4_UC_STEER : MLX4_MC_STEER;

	if (prot == MLX4_PROT_ETH && !dev->caps.vep_mc_steering)
		return 0;

	if (prot == MLX4_PROT_ETH)
		gid[7] |= (steer << 1);

	return mlx4_qp_attach_common(dev, qp, gid,
				     block_mcast_loopback, prot,
				     steer);
}
EXPORT_SYMBOL_GPL(mlx4_multicast_attach);

int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16],
			  enum mlx4_protocol prot)
{
	enum mlx4_steer_type steer;

	steer = (is_valid_ether_addr(&gid[10])) ? MLX4_UC_STEER : MLX4_MC_STEER;

	if (prot == MLX4_PROT_ETH && !dev->caps.vep_mc_steering)
		return 0;

	if (prot == MLX4_PROT_ETH) {
		gid[7] |= (steer << 1);
	}

	return mlx4_qp_detach_common(dev, qp, gid, prot, steer);
}
EXPORT_SYMBOL_GPL(mlx4_multicast_detach);

int mlx4_init_mcg_table(struct mlx4_dev *dev)
{
	struct mlx4_priv *priv = mlx4_priv(dev);
	int err;

	err = mlx4_bitmap_init(&priv->mcg_table.bitmap, dev->caps.num_amgms,
			       dev->caps.num_amgms - 1, 0, 0);
	if (err)
		return err;

	mutex_init(&priv->mcg_table.mutex);

	return 0;
}

void mlx4_cleanup_mcg_table(struct mlx4_dev *dev)
{
	mlx4_bitmap_cleanup(&mlx4_priv(dev)->mcg_table.bitmap);
}
Commit	Line	Data
225c7b1f RD	1	/*
225c7b1f RD	2	* Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
51a379d0	3	* Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
225c7b1f RD	4	*
	5	* This software is available to you under a choice of one of two
	6	* licenses. You may choose to be licensed under the terms of the GNU
	7	* General Public License (GPL) Version 2, available from the file
	8	* COPYING in the main directory of this source tree, or the
	9	* OpenIB.org BSD license below:
	10	*
	11	* Redistribution and use in source and binary forms, with or
	12	* without modification, are permitted provided that the following
	13	* conditions are met:
	14	*
	15	* - Redistributions of source code must retain the above
	16	* copyright notice, this list of conditions and the following
	17	* disclaimer.
	18	*
	19	* - Redistributions in binary form must reproduce the above
	20	* copyright notice, this list of conditions and the following
	21	* disclaimer in the documentation and/or other materials
	22	* provided with the distribution.
	23	*
	24	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	25	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	26	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	27	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	28	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	29	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	30	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	31	* SOFTWARE.
	32	*/
	33
225c7b1f	34	#include <linux/string.h>
0345584e	35	#include <linux/etherdevice.h>
225c7b1f RD	36
	37	#include <linux/mlx4/cmd.h>
	38
	39	#include "mlx4.h"
	40
521e575b RL	41	#define MGM_QPN_MASK 0x00FFFFFF
	42	#define MGM_BLCK_LB_BIT 30
	43
225c7b1f RD	44	struct mlx4_mgm {
	45	__be32 next_gid_index;
	46	__be32 members_count;
	47	u32 reserved[2];
	48	u8 gid[16];
	49	__be32 qp[MLX4_QP_PER_MGM];
	50	};
	51
	52	static const u8 zero_gid[16]; /* automatically initialized to 0 */
	53
0345584e YP	54	static int mlx4_READ_ENTRY(struct mlx4_dev *dev, int index,
0345584e YP	55	struct mlx4_cmd_mailbox *mailbox)
225c7b1f RD	56	{
	57	return mlx4_cmd_box(dev, 0, mailbox->dma, index, 0, MLX4_CMD_READ_MCG,
	58	MLX4_CMD_TIME_CLASS_A);
	59	}
	60
0345584e YP	61	static int mlx4_WRITE_ENTRY(struct mlx4_dev *dev, int index,
0345584e YP	62	struct mlx4_cmd_mailbox *mailbox)
225c7b1f RD	63	{
	64	return mlx4_cmd(dev, mailbox->dma, index, 0, MLX4_CMD_WRITE_MCG,
	65	MLX4_CMD_TIME_CLASS_A);
	66	}
	67
0345584e YP	68	static int mlx4_GID_HASH(struct mlx4_dev dev, struct mlx4_cmd_mailbox mailbox,
0345584e YP	69	u16 *hash, u8 op_mod)
225c7b1f RD	70	{
	71	u64 imm;
	72	int err;
	73
0345584e YP	74	err = mlx4_cmd_imm(dev, mailbox->dma, &imm, 0, op_mod,
0345584e YP	75	MLX4_CMD_MGID_HASH, MLX4_CMD_TIME_CLASS_A);
225c7b1f RD	76
	77	if (!err)
	78	*hash = imm;
	79
	80	return err;
	81	}
	82
	83	/*
	84	* Caller must hold MCG table semaphore. gid and mgm parameters must
	85	* be properly aligned for command interface.
	86	*
	87	* Returns 0 unless a firmware command error occurs.
	88	*
	89	* If GID is found in MGM or MGM is empty, index = hash, *prev = -1
	90	* and *mgm holds MGM entry.
	91	*
	92	* if GID is found in AMGM, index = index in AMGM, prev = index of
	93	* previous entry in hash chain and *mgm holds AMGM entry.
	94	*
	95	* If no AMGM exists for given gid, index = -1, prev = index of last
	96	* entry in hash chain and *mgm holds end of hash chain.
	97	*/
0345584e YP	98	static int find_entry(struct mlx4_dev *dev, u8 port,
	99	u8 *gid, enum mlx4_protocol prot,
	100	enum mlx4_steer_type steer,
	101	struct mlx4_cmd_mailbox *mgm_mailbox,
	102	u16 hash, int prev, int *index)
225c7b1f RD	103	{
	104	struct mlx4_cmd_mailbox *mailbox;
	105	struct mlx4_mgm *mgm = mgm_mailbox->buf;
	106	u8 *mgid;
	107	int err;
0345584e	108	u8 op_mod = (prot == MLX4_PROT_ETH) ? !!(dev->caps.vep_mc_steering) : 0;
225c7b1f RD	109
	110	mailbox = mlx4_alloc_cmd_mailbox(dev);
	111	if (IS_ERR(mailbox))
	112	return -ENOMEM;
	113	mgid = mailbox->buf;
	114
	115	memcpy(mgid, gid, 16);
	116
0345584e	117	err = mlx4_GID_HASH(dev, mailbox, hash, op_mod);
225c7b1f RD	118	mlx4_free_cmd_mailbox(dev, mailbox);
	119	if (err)
	120	return err;
	121
	122	if (0)
5b095d98	123	mlx4_dbg(dev, "Hash for %pI6 is %04x\n", gid, *hash);
225c7b1f RD	124
	125	index = hash;
	126	*prev = -1;
	127
	128	do {
0345584e	129	err = mlx4_READ_ENTRY(dev, *index, mgm_mailbox);
225c7b1f RD	130	if (err)
	131	return err;
	132
0345584e	133	if (!(be32_to_cpu(mgm->members_count) & 0xffffff)) {
225c7b1f RD	134	if (index != hash) {
	135	mlx4_err(dev, "Found zero MGID in AMGM.\n");
	136	err = -EINVAL;
	137	}
	138	return err;
	139	}
	140
da995a8a	141	if (!memcmp(mgm->gid, gid, 16) &&
0345584e	142	be32_to_cpu(mgm->members_count) >> 30 == prot)
225c7b1f RD	143	return err;
	144
	145	prev = index;
	146	*index = be32_to_cpu(mgm->next_gid_index) >> 6;
	147	} while (*index);
	148
	149	*index = -1;
	150	return err;
	151	}
	152
0345584e YP	153	int mlx4_qp_attach_common(struct mlx4_dev dev, struct mlx4_qp qp, u8 gid[16],
	154	int block_mcast_loopback, enum mlx4_protocol prot,
	155	enum mlx4_steer_type steer)
225c7b1f RD	156	{
	157	struct mlx4_priv *priv = mlx4_priv(dev);
	158	struct mlx4_cmd_mailbox *mailbox;
	159	struct mlx4_mgm *mgm;
	160	u32 members_count;
	161	u16 hash;
	162	int index, prev;
	163	int link = 0;
	164	int i;
	165	int err;
0345584e	166	u8 port = gid[5];
225c7b1f RD	167
	168	mailbox = mlx4_alloc_cmd_mailbox(dev);
	169	if (IS_ERR(mailbox))
	170	return PTR_ERR(mailbox);
	171	mgm = mailbox->buf;
	172
	173	mutex_lock(&priv->mcg_table.mutex);
0345584e YP	174	err = find_entry(dev, port, gid, prot, steer,
0345584e YP	175	mailbox, &hash, &prev, &index);
225c7b1f RD	176	if (err)
	177	goto out;
	178
	179	if (index != -1) {
0345584e	180	if (!(be32_to_cpu(mgm->members_count) & 0xffffff))
225c7b1f RD	181	memcpy(mgm->gid, gid, 16);
	182	} else {
	183	link = 1;
	184
	185	index = mlx4_bitmap_alloc(&priv->mcg_table.bitmap);
	186	if (index == -1) {
	187	mlx4_err(dev, "No AMGM entries left\n");
	188	err = -ENOMEM;
	189	goto out;
	190	}
	191	index += dev->caps.num_mgms;
	192
225c7b1f RD	193	memset(mgm, 0, sizeof *mgm);
	194	memcpy(mgm->gid, gid, 16);
	195	}
	196
da995a8a	197	members_count = be32_to_cpu(mgm->members_count) & 0xffffff;
225c7b1f RD	198	if (members_count == MLX4_QP_PER_MGM) {
	199	mlx4_err(dev, "MGM at index %x is full.\n", index);
	200	err = -ENOMEM;
	201	goto out;
	202	}
	203
	204	for (i = 0; i < members_count; ++i)
521e575b	205	if ((be32_to_cpu(mgm->qp[i]) & MGM_QPN_MASK) == qp->qpn) {
225c7b1f RD	206	mlx4_dbg(dev, "QP %06x already a member of MGM\n", qp->qpn);
	207	err = 0;
	208	goto out;
	209	}
	210
521e575b RL	211	if (block_mcast_loopback)
521e575b RL	212	mgm->qp[members_count++] = cpu_to_be32((qp->qpn & MGM_QPN_MASK) \|
e6a17622	213	(1U << MGM_BLCK_LB_BIT));
521e575b RL	214	else
	215	mgm->qp[members_count++] = cpu_to_be32(qp->qpn & MGM_QPN_MASK);
	216
0345584e	217	mgm->members_count = cpu_to_be32(members_count \| (u32) prot << 30);
225c7b1f	218
0345584e	219	err = mlx4_WRITE_ENTRY(dev, index, mailbox);
225c7b1f RD	220	if (err)
	221	goto out;
	222
	223	if (!link)
	224	goto out;
	225
0345584e	226	err = mlx4_READ_ENTRY(dev, prev, mailbox);
225c7b1f RD	227	if (err)
	228	goto out;
	229
	230	mgm->next_gid_index = cpu_to_be32(index << 6);
	231
0345584e	232	err = mlx4_WRITE_ENTRY(dev, prev, mailbox);
225c7b1f RD	233	if (err)
	234	goto out;
	235
	236	out:
	237	if (err && link && index != -1) {
	238	if (index < dev->caps.num_mgms)
	239	mlx4_warn(dev, "Got AMGM index %d < %d",
	240	index, dev->caps.num_mgms);
	241	else
	242	mlx4_bitmap_free(&priv->mcg_table.bitmap,
	243	index - dev->caps.num_mgms);
	244	}
	245	mutex_unlock(&priv->mcg_table.mutex);
	246
	247	mlx4_free_cmd_mailbox(dev, mailbox);
	248	return err;
	249	}
225c7b1f	250
0345584e YP	251	int mlx4_qp_detach_common(struct mlx4_dev dev, struct mlx4_qp qp, u8 gid[16],
0345584e YP	252	enum mlx4_protocol prot, enum mlx4_steer_type steer)
225c7b1f RD	253	{
	254	struct mlx4_priv *priv = mlx4_priv(dev);
	255	struct mlx4_cmd_mailbox *mailbox;
	256	struct mlx4_mgm *mgm;
	257	u32 members_count;
	258	u16 hash;
	259	int prev, index;
	260	int i, loc;
	261	int err;
0345584e	262	u8 port = gid[5];
225c7b1f RD	263
	264	mailbox = mlx4_alloc_cmd_mailbox(dev);
	265	if (IS_ERR(mailbox))
	266	return PTR_ERR(mailbox);
	267	mgm = mailbox->buf;
	268
	269	mutex_lock(&priv->mcg_table.mutex);
	270
0345584e YP	271	err = find_entry(dev, port, gid, prot, steer,
0345584e YP	272	mailbox, &hash, &prev, &index);
225c7b1f RD	273	if (err)
	274	goto out;
	275
	276	if (index == -1) {
5b095d98	277	mlx4_err(dev, "MGID %pI6 not found\n", gid);
225c7b1f RD	278	err = -EINVAL;
	279	goto out;
	280	}
	281
da995a8a	282	members_count = be32_to_cpu(mgm->members_count) & 0xffffff;
225c7b1f	283	for (loc = -1, i = 0; i < members_count; ++i)
521e575b	284	if ((be32_to_cpu(mgm->qp[i]) & MGM_QPN_MASK) == qp->qpn)
225c7b1f RD	285	loc = i;
	286
	287	if (loc == -1) {
	288	mlx4_err(dev, "QP %06x not found in MGM\n", qp->qpn);
	289	err = -EINVAL;
	290	goto out;
	291	}
	292
	293
0345584e	294	mgm->members_count = cpu_to_be32(--members_count \| (u32) prot << 30);
225c7b1f RD	295	mgm->qp[loc] = mgm->qp[i - 1];
	296	mgm->qp[i - 1] = 0;
	297
4dc51b32	298	if (i != 1) {
0345584e	299	err = mlx4_WRITE_ENTRY(dev, index, mailbox);
225c7b1f	300	goto out;
4dc51b32	301	}
225c7b1f RD	302
	303	if (prev == -1) {
	304	/* Remove entry from MGM */
	305	int amgm_index = be32_to_cpu(mgm->next_gid_index) >> 6;
	306	if (amgm_index) {
0345584e	307	err = mlx4_READ_ENTRY(dev, amgm_index, mailbox);
225c7b1f RD	308	if (err)
	309	goto out;
	310	} else
	311	memset(mgm->gid, 0, 16);
	312
0345584e	313	err = mlx4_WRITE_ENTRY(dev, index, mailbox);
225c7b1f RD	314	if (err)
	315	goto out;
	316
	317	if (amgm_index) {
	318	if (amgm_index < dev->caps.num_mgms)
	319	mlx4_warn(dev, "MGM entry %d had AMGM index %d < %d",
	320	index, amgm_index, dev->caps.num_mgms);
	321	else
	322	mlx4_bitmap_free(&priv->mcg_table.bitmap,
	323	amgm_index - dev->caps.num_mgms);
	324	}
	325	} else {
	326	/* Remove entry from AMGM */
	327	int cur_next_index = be32_to_cpu(mgm->next_gid_index) >> 6;
0345584e	328	err = mlx4_READ_ENTRY(dev, prev, mailbox);
225c7b1f RD	329	if (err)
	330	goto out;
	331
	332	mgm->next_gid_index = cpu_to_be32(cur_next_index << 6);
	333
0345584e	334	err = mlx4_WRITE_ENTRY(dev, prev, mailbox);
225c7b1f RD	335	if (err)
	336	goto out;
	337
	338	if (index < dev->caps.num_mgms)
	339	mlx4_warn(dev, "entry %d had next AMGM index %d < %d",
	340	prev, index, dev->caps.num_mgms);
	341	else
	342	mlx4_bitmap_free(&priv->mcg_table.bitmap,
	343	index - dev->caps.num_mgms);
	344	}
	345
	346	out:
	347	mutex_unlock(&priv->mcg_table.mutex);
	348
	349	mlx4_free_cmd_mailbox(dev, mailbox);
	350	return err;
	351	}
0345584e YP	352
	353
	354	int mlx4_multicast_attach(struct mlx4_dev dev, struct mlx4_qp qp, u8 gid[16],
	355	int block_mcast_loopback, enum mlx4_protocol prot)
	356	{
	357	enum mlx4_steer_type steer;
	358
	359	steer = (is_valid_ether_addr(&gid[10])) ? MLX4_UC_STEER : MLX4_MC_STEER;
	360
	361	if (prot == MLX4_PROT_ETH && !dev->caps.vep_mc_steering)
	362	return 0;
	363
	364	if (prot == MLX4_PROT_ETH)
	365	gid[7] \|= (steer << 1);
	366
	367	return mlx4_qp_attach_common(dev, qp, gid,
	368	block_mcast_loopback, prot,
	369	steer);
	370	}
	371	EXPORT_SYMBOL_GPL(mlx4_multicast_attach);
	372
	373	int mlx4_multicast_detach(struct mlx4_dev dev, struct mlx4_qp qp, u8 gid[16],
	374	enum mlx4_protocol prot)
	375	{
	376	enum mlx4_steer_type steer;
	377
	378	steer = (is_valid_ether_addr(&gid[10])) ? MLX4_UC_STEER : MLX4_MC_STEER;
	379
	380	if (prot == MLX4_PROT_ETH && !dev->caps.vep_mc_steering)
	381	return 0;
	382
	383	if (prot == MLX4_PROT_ETH) {
	384	gid[7] \|= (steer << 1);
	385	}
	386
	387	return mlx4_qp_detach_common(dev, qp, gid, prot, steer);
	388	}
225c7b1f RD	389	EXPORT_SYMBOL_GPL(mlx4_multicast_detach);
225c7b1f RD	390
3d73c288	391	int mlx4_init_mcg_table(struct mlx4_dev *dev)
225c7b1f RD	392	{
	393	struct mlx4_priv *priv = mlx4_priv(dev);
	394	int err;
	395
93fc9e1b YP	396	err = mlx4_bitmap_init(&priv->mcg_table.bitmap, dev->caps.num_amgms,
93fc9e1b YP	397	dev->caps.num_amgms - 1, 0, 0);
225c7b1f RD	398	if (err)
	399	return err;
	400
	401	mutex_init(&priv->mcg_table.mutex);
	402
	403	return 0;
	404	}
	405
	406	void mlx4_cleanup_mcg_table(struct mlx4_dev *dev)
	407	{
	408	mlx4_bitmap_cleanup(&mlx4_priv(dev)->mcg_table.bitmap);
	409	}