mlx4_en: optimize adaptive moderation algorithm for better latency
[linux-2.6-block.git] / drivers / net / mlx4 / en_netdev.c
CommitLineData
c27a02cd
YP
1/*
2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34#include <linux/etherdevice.h>
35#include <linux/tcp.h>
36#include <linux/if_vlan.h>
37#include <linux/delay.h>
5a0e3ad6 38#include <linux/slab.h>
c27a02cd
YP
39
40#include <linux/mlx4/driver.h>
41#include <linux/mlx4/device.h>
42#include <linux/mlx4/cmd.h>
43#include <linux/mlx4/cq.h>
44
45#include "mlx4_en.h"
46#include "en_port.h"
47
48
49static void mlx4_en_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
50{
51 struct mlx4_en_priv *priv = netdev_priv(dev);
52 struct mlx4_en_dev *mdev = priv->mdev;
53 int err;
54
453a6082 55 en_dbg(HW, priv, "Registering VLAN group:%p\n", grp);
c27a02cd
YP
56 priv->vlgrp = grp;
57
58 mutex_lock(&mdev->state_lock);
59 if (mdev->device_up && priv->port_up) {
60 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, grp);
61 if (err)
453a6082 62 en_err(priv, "Failed configuring VLAN filter\n");
c27a02cd
YP
63 }
64 mutex_unlock(&mdev->state_lock);
65}
66
67static void mlx4_en_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
68{
69 struct mlx4_en_priv *priv = netdev_priv(dev);
70 struct mlx4_en_dev *mdev = priv->mdev;
71 int err;
4c3eb3ca 72 int idx;
c27a02cd
YP
73
74 if (!priv->vlgrp)
75 return;
76
453a6082
YP
77 en_dbg(HW, priv, "adding VLAN:%d (vlgrp entry:%p)\n",
78 vid, vlan_group_get_device(priv->vlgrp, vid));
c27a02cd
YP
79
80 /* Add VID to port VLAN filter */
81 mutex_lock(&mdev->state_lock);
82 if (mdev->device_up && priv->port_up) {
83 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, priv->vlgrp);
84 if (err)
453a6082 85 en_err(priv, "Failed configuring VLAN filter\n");
c27a02cd 86 }
4c3eb3ca
EC
87 if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
88 en_err(priv, "failed adding vlan %d\n", vid);
c27a02cd 89 mutex_unlock(&mdev->state_lock);
4c3eb3ca 90
c27a02cd
YP
91}
92
93static void mlx4_en_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
94{
95 struct mlx4_en_priv *priv = netdev_priv(dev);
96 struct mlx4_en_dev *mdev = priv->mdev;
97 int err;
4c3eb3ca 98 int idx;
c27a02cd
YP
99
100 if (!priv->vlgrp)
101 return;
102
453a6082
YP
103 en_dbg(HW, priv, "Killing VID:%d (vlgrp:%p vlgrp entry:%p)\n",
104 vid, priv->vlgrp, vlan_group_get_device(priv->vlgrp, vid));
c27a02cd
YP
105 vlan_group_set_device(priv->vlgrp, vid, NULL);
106
107 /* Remove VID from port VLAN filter */
108 mutex_lock(&mdev->state_lock);
4c3eb3ca
EC
109 if (!mlx4_find_cached_vlan(mdev->dev, priv->port, vid, &idx))
110 mlx4_unregister_vlan(mdev->dev, priv->port, idx);
111 else
112 en_err(priv, "could not find vid %d in cache\n", vid);
113
c27a02cd
YP
114 if (mdev->device_up && priv->port_up) {
115 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, priv->vlgrp);
116 if (err)
453a6082 117 en_err(priv, "Failed configuring VLAN filter\n");
c27a02cd
YP
118 }
119 mutex_unlock(&mdev->state_lock);
120}
121
e7c1c2c4 122u64 mlx4_en_mac_to_u64(u8 *addr)
c27a02cd
YP
123{
124 u64 mac = 0;
125 int i;
126
127 for (i = 0; i < ETH_ALEN; i++) {
128 mac <<= 8;
129 mac |= addr[i];
130 }
131 return mac;
132}
133
134static int mlx4_en_set_mac(struct net_device *dev, void *addr)
135{
136 struct mlx4_en_priv *priv = netdev_priv(dev);
137 struct mlx4_en_dev *mdev = priv->mdev;
138 struct sockaddr *saddr = addr;
139
140 if (!is_valid_ether_addr(saddr->sa_data))
141 return -EADDRNOTAVAIL;
142
143 memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
144 priv->mac = mlx4_en_mac_to_u64(dev->dev_addr);
145 queue_work(mdev->workqueue, &priv->mac_task);
146 return 0;
147}
148
149static void mlx4_en_do_set_mac(struct work_struct *work)
150{
151 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
152 mac_task);
153 struct mlx4_en_dev *mdev = priv->mdev;
154 int err = 0;
155
156 mutex_lock(&mdev->state_lock);
157 if (priv->port_up) {
158 /* Remove old MAC and insert the new one */
159 mlx4_unregister_mac(mdev->dev, priv->port, priv->mac_index);
160 err = mlx4_register_mac(mdev->dev, priv->port,
161 priv->mac, &priv->mac_index);
162 if (err)
453a6082 163 en_err(priv, "Failed changing HW MAC address\n");
c27a02cd 164 } else
453a6082
YP
165 en_dbg(HW, priv, "Port is down while "
166 "registering mac, exiting...\n");
c27a02cd
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167
168 mutex_unlock(&mdev->state_lock);
169}
170
171static void mlx4_en_clear_list(struct net_device *dev)
172{
173 struct mlx4_en_priv *priv = netdev_priv(dev);
c27a02cd 174
ff6e2163
JP
175 kfree(priv->mc_addrs);
176 priv->mc_addrs_cnt = 0;
c27a02cd
YP
177}
178
179static void mlx4_en_cache_mclist(struct net_device *dev)
180{
181 struct mlx4_en_priv *priv = netdev_priv(dev);
22bedad3 182 struct netdev_hw_addr *ha;
ff6e2163
JP
183 char *mc_addrs;
184 int mc_addrs_cnt = netdev_mc_count(dev);
185 int i;
186
187 mc_addrs = kmalloc(mc_addrs_cnt * ETH_ALEN, GFP_ATOMIC);
188 if (!mc_addrs) {
189 en_err(priv, "failed to allocate multicast list\n");
190 return;
c27a02cd 191 }
ff6e2163 192 i = 0;
22bedad3
JP
193 netdev_for_each_mc_addr(ha, dev)
194 memcpy(mc_addrs + i++ * ETH_ALEN, ha->addr, ETH_ALEN);
ff6e2163
JP
195 priv->mc_addrs = mc_addrs;
196 priv->mc_addrs_cnt = mc_addrs_cnt;
c27a02cd
YP
197}
198
199
200static void mlx4_en_set_multicast(struct net_device *dev)
201{
202 struct mlx4_en_priv *priv = netdev_priv(dev);
203
204 if (!priv->port_up)
205 return;
206
207 queue_work(priv->mdev->workqueue, &priv->mcast_task);
208}
209
210static void mlx4_en_do_set_multicast(struct work_struct *work)
211{
212 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
213 mcast_task);
214 struct mlx4_en_dev *mdev = priv->mdev;
215 struct net_device *dev = priv->dev;
c27a02cd
YP
216 u64 mcast_addr = 0;
217 int err;
218
219 mutex_lock(&mdev->state_lock);
220 if (!mdev->device_up) {
453a6082
YP
221 en_dbg(HW, priv, "Card is not up, "
222 "ignoring multicast change.\n");
c27a02cd
YP
223 goto out;
224 }
225 if (!priv->port_up) {
453a6082
YP
226 en_dbg(HW, priv, "Port is down, "
227 "ignoring multicast change.\n");
c27a02cd
YP
228 goto out;
229 }
230
231 /*
232 * Promsicuous mode: disable all filters
233 */
234
235 if (dev->flags & IFF_PROMISC) {
236 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
237 if (netif_msg_rx_status(priv))
453a6082 238 en_warn(priv, "Entering promiscuous mode\n");
c27a02cd
YP
239 priv->flags |= MLX4_EN_FLAG_PROMISC;
240
241 /* Enable promiscouos mode */
242 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port,
243 priv->base_qpn, 1);
244 if (err)
453a6082
YP
245 en_err(priv, "Failed enabling "
246 "promiscous mode\n");
c27a02cd
YP
247
248 /* Disable port multicast filter (unconditionally) */
249 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
250 0, MLX4_MCAST_DISABLE);
251 if (err)
453a6082
YP
252 en_err(priv, "Failed disabling "
253 "multicast filter\n");
c27a02cd
YP
254
255 /* Disable port VLAN filter */
256 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, NULL);
257 if (err)
453a6082 258 en_err(priv, "Failed disabling VLAN filter\n");
c27a02cd
YP
259 }
260 goto out;
261 }
262
263 /*
264 * Not in promiscous mode
265 */
266
267 if (priv->flags & MLX4_EN_FLAG_PROMISC) {
268 if (netif_msg_rx_status(priv))
453a6082 269 en_warn(priv, "Leaving promiscuous mode\n");
c27a02cd
YP
270 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
271
272 /* Disable promiscouos mode */
273 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port,
274 priv->base_qpn, 0);
275 if (err)
453a6082 276 en_err(priv, "Failed disabling promiscous mode\n");
c27a02cd
YP
277
278 /* Enable port VLAN filter */
279 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, priv->vlgrp);
280 if (err)
453a6082 281 en_err(priv, "Failed enabling VLAN filter\n");
c27a02cd
YP
282 }
283
284 /* Enable/disable the multicast filter according to IFF_ALLMULTI */
285 if (dev->flags & IFF_ALLMULTI) {
286 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
287 0, MLX4_MCAST_DISABLE);
288 if (err)
453a6082 289 en_err(priv, "Failed disabling multicast filter\n");
c27a02cd 290 } else {
ff6e2163
JP
291 int i;
292
c27a02cd
YP
293 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
294 0, MLX4_MCAST_DISABLE);
295 if (err)
453a6082 296 en_err(priv, "Failed disabling multicast filter\n");
c27a02cd
YP
297
298 /* Flush mcast filter and init it with broadcast address */
299 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
300 1, MLX4_MCAST_CONFIG);
301
302 /* Update multicast list - we cache all addresses so they won't
303 * change while HW is updated holding the command semaphor */
304 netif_tx_lock_bh(dev);
305 mlx4_en_cache_mclist(dev);
306 netif_tx_unlock_bh(dev);
ff6e2163
JP
307 for (i = 0; i < priv->mc_addrs_cnt; i++) {
308 mcast_addr =
309 mlx4_en_mac_to_u64(priv->mc_addrs + i * ETH_ALEN);
c27a02cd
YP
310 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
311 mcast_addr, 0, MLX4_MCAST_CONFIG);
312 }
313 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
314 0, MLX4_MCAST_ENABLE);
315 if (err)
453a6082 316 en_err(priv, "Failed enabling multicast filter\n");
c27a02cd
YP
317
318 mlx4_en_clear_list(dev);
319 }
320out:
321 mutex_unlock(&mdev->state_lock);
322}
323
324#ifdef CONFIG_NET_POLL_CONTROLLER
325static void mlx4_en_netpoll(struct net_device *dev)
326{
327 struct mlx4_en_priv *priv = netdev_priv(dev);
328 struct mlx4_en_cq *cq;
329 unsigned long flags;
330 int i;
331
332 for (i = 0; i < priv->rx_ring_num; i++) {
333 cq = &priv->rx_cq[i];
334 spin_lock_irqsave(&cq->lock, flags);
335 napi_synchronize(&cq->napi);
336 mlx4_en_process_rx_cq(dev, cq, 0);
337 spin_unlock_irqrestore(&cq->lock, flags);
338 }
339}
340#endif
341
342static void mlx4_en_tx_timeout(struct net_device *dev)
343{
344 struct mlx4_en_priv *priv = netdev_priv(dev);
345 struct mlx4_en_dev *mdev = priv->mdev;
346
347 if (netif_msg_timer(priv))
453a6082 348 en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
c27a02cd 349
1e338db5 350 priv->port_stats.tx_timeout++;
453a6082 351 en_dbg(DRV, priv, "Scheduling watchdog\n");
1e338db5 352 queue_work(mdev->workqueue, &priv->watchdog_task);
c27a02cd
YP
353}
354
355
356static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev)
357{
358 struct mlx4_en_priv *priv = netdev_priv(dev);
359
360 spin_lock_bh(&priv->stats_lock);
361 memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
362 spin_unlock_bh(&priv->stats_lock);
363
364 return &priv->ret_stats;
365}
366
367static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
368{
c27a02cd
YP
369 struct mlx4_en_cq *cq;
370 int i;
371
372 /* If we haven't received a specific coalescing setting
98a1708d 373 * (module param), we set the moderation parameters as follows:
c27a02cd
YP
374 * - moder_cnt is set to the number of mtu sized packets to
375 * satisfy our coelsing target.
376 * - moder_time is set to a fixed value.
377 */
3db36fb2 378 priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
60b9f9e5 379 priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
453a6082
YP
380 en_dbg(INTR, priv, "Default coalesing params for mtu:%d - "
381 "rx_frames:%d rx_usecs:%d\n",
c27a02cd
YP
382 priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
383
384 /* Setup cq moderation params */
385 for (i = 0; i < priv->rx_ring_num; i++) {
386 cq = &priv->rx_cq[i];
387 cq->moder_cnt = priv->rx_frames;
388 cq->moder_time = priv->rx_usecs;
389 }
390
391 for (i = 0; i < priv->tx_ring_num; i++) {
392 cq = &priv->tx_cq[i];
393 cq->moder_cnt = MLX4_EN_TX_COAL_PKTS;
394 cq->moder_time = MLX4_EN_TX_COAL_TIME;
395 }
396
397 /* Reset auto-moderation params */
398 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
399 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
400 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
401 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
402 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
60b9f9e5 403 priv->adaptive_rx_coal = 1;
c27a02cd
YP
404 priv->last_moder_time = MLX4_EN_AUTO_CONF;
405 priv->last_moder_jiffies = 0;
406 priv->last_moder_packets = 0;
407 priv->last_moder_tx_packets = 0;
408 priv->last_moder_bytes = 0;
409}
410
411static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
412{
413 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
c27a02cd
YP
414 struct mlx4_en_cq *cq;
415 unsigned long packets;
416 unsigned long rate;
417 unsigned long avg_pkt_size;
418 unsigned long rx_packets;
419 unsigned long rx_bytes;
420 unsigned long tx_packets;
421 unsigned long tx_pkt_diff;
422 unsigned long rx_pkt_diff;
423 int moder_time;
424 int i, err;
425
426 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
427 return;
428
429 spin_lock_bh(&priv->stats_lock);
430 rx_packets = priv->stats.rx_packets;
431 rx_bytes = priv->stats.rx_bytes;
432 tx_packets = priv->stats.tx_packets;
433 spin_unlock_bh(&priv->stats_lock);
434
435 if (!priv->last_moder_jiffies || !period)
436 goto out;
437
438 tx_pkt_diff = ((unsigned long) (tx_packets -
439 priv->last_moder_tx_packets));
440 rx_pkt_diff = ((unsigned long) (rx_packets -
441 priv->last_moder_packets));
442 packets = max(tx_pkt_diff, rx_pkt_diff);
443 rate = packets * HZ / period;
444 avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
445 priv->last_moder_bytes)) / packets : 0;
446
447 /* Apply auto-moderation only when packet rate exceeds a rate that
448 * it matters */
46afd0fb 449 if (rate > MLX4_EN_RX_RATE_THRESH && avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
c27a02cd
YP
450 /* If tx and rx packet rates are not balanced, assume that
451 * traffic is mainly BW bound and apply maximum moderation.
452 * Otherwise, moderate according to packet rate */
46afd0fb
YP
453 if (2 * tx_pkt_diff > 3 * rx_pkt_diff ||
454 2 * rx_pkt_diff > 3 * tx_pkt_diff) {
c27a02cd 455 moder_time = priv->rx_usecs_high;
46afd0fb 456 } else {
c27a02cd
YP
457 if (rate < priv->pkt_rate_low)
458 moder_time = priv->rx_usecs_low;
459 else if (rate > priv->pkt_rate_high)
460 moder_time = priv->rx_usecs_high;
461 else
462 moder_time = (rate - priv->pkt_rate_low) *
463 (priv->rx_usecs_high - priv->rx_usecs_low) /
464 (priv->pkt_rate_high - priv->pkt_rate_low) +
465 priv->rx_usecs_low;
466 }
467 } else {
46afd0fb 468 moder_time = priv->rx_usecs_low;
c27a02cd
YP
469 }
470
453a6082
YP
471 en_dbg(INTR, priv, "tx rate:%lu rx_rate:%lu\n",
472 tx_pkt_diff * HZ / period, rx_pkt_diff * HZ / period);
c27a02cd 473
453a6082
YP
474 en_dbg(INTR, priv, "Rx moder_time changed from:%d to %d period:%lu "
475 "[jiff] packets:%lu avg_pkt_size:%lu rate:%lu [p/s])\n",
c27a02cd
YP
476 priv->last_moder_time, moder_time, period, packets,
477 avg_pkt_size, rate);
478
479 if (moder_time != priv->last_moder_time) {
480 priv->last_moder_time = moder_time;
481 for (i = 0; i < priv->rx_ring_num; i++) {
482 cq = &priv->rx_cq[i];
483 cq->moder_time = moder_time;
484 err = mlx4_en_set_cq_moder(priv, cq);
485 if (err) {
453a6082 486 en_err(priv, "Failed modifying moderation for cq:%d\n", i);
c27a02cd
YP
487 break;
488 }
489 }
490 }
491
492out:
493 priv->last_moder_packets = rx_packets;
494 priv->last_moder_tx_packets = tx_packets;
495 priv->last_moder_bytes = rx_bytes;
496 priv->last_moder_jiffies = jiffies;
497}
498
499static void mlx4_en_do_get_stats(struct work_struct *work)
500{
bf6aede7 501 struct delayed_work *delay = to_delayed_work(work);
c27a02cd
YP
502 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
503 stats_task);
504 struct mlx4_en_dev *mdev = priv->mdev;
505 int err;
506
507 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
508 if (err)
2381a55c 509 en_dbg(HW, priv, "Could not update stats\n");
c27a02cd
YP
510
511 mutex_lock(&mdev->state_lock);
512 if (mdev->device_up) {
513 if (priv->port_up)
514 mlx4_en_auto_moderation(priv);
515
516 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
517 }
d7e1a487
YP
518 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
519 queue_work(mdev->workqueue, &priv->mac_task);
520 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
521 }
c27a02cd
YP
522 mutex_unlock(&mdev->state_lock);
523}
524
525static void mlx4_en_linkstate(struct work_struct *work)
526{
527 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
528 linkstate_task);
529 struct mlx4_en_dev *mdev = priv->mdev;
530 int linkstate = priv->link_state;
531
532 mutex_lock(&mdev->state_lock);
533 /* If observable port state changed set carrier state and
534 * report to system log */
535 if (priv->last_link_state != linkstate) {
536 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
e5cc44b2 537 en_info(priv, "Link Down\n");
c27a02cd
YP
538 netif_carrier_off(priv->dev);
539 } else {
e5cc44b2 540 en_info(priv, "Link Up\n");
c27a02cd
YP
541 netif_carrier_on(priv->dev);
542 }
543 }
544 priv->last_link_state = linkstate;
545 mutex_unlock(&mdev->state_lock);
546}
547
548
18cc42a3 549int mlx4_en_start_port(struct net_device *dev)
c27a02cd
YP
550{
551 struct mlx4_en_priv *priv = netdev_priv(dev);
552 struct mlx4_en_dev *mdev = priv->mdev;
553 struct mlx4_en_cq *cq;
554 struct mlx4_en_tx_ring *tx_ring;
c27a02cd
YP
555 int rx_index = 0;
556 int tx_index = 0;
c27a02cd
YP
557 int err = 0;
558 int i;
559 int j;
560
561 if (priv->port_up) {
453a6082 562 en_dbg(DRV, priv, "start port called while port already up\n");
c27a02cd
YP
563 return 0;
564 }
565
566 /* Calculate Rx buf size */
567 dev->mtu = min(dev->mtu, priv->max_mtu);
568 mlx4_en_calc_rx_buf(dev);
453a6082 569 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
38aab07c 570
c27a02cd 571 /* Configure rx cq's and rings */
38aab07c
YP
572 err = mlx4_en_activate_rx_rings(priv);
573 if (err) {
453a6082 574 en_err(priv, "Failed to activate RX rings\n");
38aab07c
YP
575 return err;
576 }
c27a02cd
YP
577 for (i = 0; i < priv->rx_ring_num; i++) {
578 cq = &priv->rx_cq[i];
c27a02cd
YP
579
580 err = mlx4_en_activate_cq(priv, cq);
581 if (err) {
453a6082 582 en_err(priv, "Failed activating Rx CQ\n");
a4233304 583 goto cq_err;
c27a02cd
YP
584 }
585 for (j = 0; j < cq->size; j++)
586 cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK;
587 err = mlx4_en_set_cq_moder(priv, cq);
588 if (err) {
453a6082 589 en_err(priv, "Failed setting cq moderation parameters");
c27a02cd
YP
590 mlx4_en_deactivate_cq(priv, cq);
591 goto cq_err;
592 }
593 mlx4_en_arm_cq(priv, cq);
38aab07c 594 priv->rx_ring[i].cqn = cq->mcq.cqn;
c27a02cd
YP
595 ++rx_index;
596 }
597
c27a02cd
YP
598 err = mlx4_en_config_rss_steer(priv);
599 if (err) {
453a6082 600 en_err(priv, "Failed configuring rss steering\n");
38aab07c 601 goto cq_err;
c27a02cd
YP
602 }
603
604 /* Configure tx cq's and rings */
605 for (i = 0; i < priv->tx_ring_num; i++) {
606 /* Configure cq */
607 cq = &priv->tx_cq[i];
608 err = mlx4_en_activate_cq(priv, cq);
609 if (err) {
453a6082 610 en_err(priv, "Failed allocating Tx CQ\n");
c27a02cd
YP
611 goto tx_err;
612 }
613 err = mlx4_en_set_cq_moder(priv, cq);
614 if (err) {
453a6082 615 en_err(priv, "Failed setting cq moderation parameters");
c27a02cd
YP
616 mlx4_en_deactivate_cq(priv, cq);
617 goto tx_err;
618 }
453a6082 619 en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
c27a02cd
YP
620 cq->buf->wqe_index = cpu_to_be16(0xffff);
621
622 /* Configure ring */
623 tx_ring = &priv->tx_ring[i];
9f519f68 624 err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn);
c27a02cd 625 if (err) {
453a6082 626 en_err(priv, "Failed allocating Tx ring\n");
c27a02cd
YP
627 mlx4_en_deactivate_cq(priv, cq);
628 goto tx_err;
629 }
630 /* Set initial ownership of all Tx TXBBs to SW (1) */
631 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
632 *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
633 ++tx_index;
634 }
635
636 /* Configure port */
637 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
638 priv->rx_skb_size + ETH_FCS_LEN,
d53b93f2
YP
639 priv->prof->tx_pause,
640 priv->prof->tx_ppp,
641 priv->prof->rx_pause,
642 priv->prof->rx_ppp);
c27a02cd 643 if (err) {
453a6082
YP
644 en_err(priv, "Failed setting port general configurations "
645 "for port %d, with error %d\n", priv->port, err);
c27a02cd
YP
646 goto tx_err;
647 }
648 /* Set default qp number */
649 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
650 if (err) {
453a6082 651 en_err(priv, "Failed setting default qp numbers\n");
c27a02cd
YP
652 goto tx_err;
653 }
654 /* Set port mac number */
453a6082 655 en_dbg(DRV, priv, "Setting mac for port %d\n", priv->port);
c27a02cd
YP
656 err = mlx4_register_mac(mdev->dev, priv->port,
657 priv->mac, &priv->mac_index);
658 if (err) {
453a6082 659 en_err(priv, "Failed setting port mac\n");
c27a02cd
YP
660 goto tx_err;
661 }
d7e1a487 662 mdev->mac_removed[priv->port] = 0;
c27a02cd
YP
663
664 /* Init port */
453a6082 665 en_dbg(HW, priv, "Initializing port\n");
c27a02cd
YP
666 err = mlx4_INIT_PORT(mdev->dev, priv->port);
667 if (err) {
453a6082 668 en_err(priv, "Failed Initializing port\n");
c27a02cd
YP
669 goto mac_err;
670 }
671
672 /* Schedule multicast task to populate multicast list */
673 queue_work(mdev->workqueue, &priv->mcast_task);
674
675 priv->port_up = true;
a11faac7 676 netif_tx_start_all_queues(dev);
c27a02cd
YP
677 return 0;
678
679mac_err:
680 mlx4_unregister_mac(mdev->dev, priv->port, priv->mac_index);
681tx_err:
682 while (tx_index--) {
683 mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[tx_index]);
684 mlx4_en_deactivate_cq(priv, &priv->tx_cq[tx_index]);
685 }
686
687 mlx4_en_release_rss_steer(priv);
c27a02cd
YP
688cq_err:
689 while (rx_index--)
690 mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]);
38aab07c
YP
691 for (i = 0; i < priv->rx_ring_num; i++)
692 mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
c27a02cd
YP
693
694 return err; /* need to close devices */
695}
696
697
18cc42a3 698void mlx4_en_stop_port(struct net_device *dev)
c27a02cd
YP
699{
700 struct mlx4_en_priv *priv = netdev_priv(dev);
701 struct mlx4_en_dev *mdev = priv->mdev;
702 int i;
703
704 if (!priv->port_up) {
453a6082 705 en_dbg(DRV, priv, "stop port called while port already down\n");
c27a02cd
YP
706 return;
707 }
c27a02cd
YP
708
709 /* Synchronize with tx routine */
710 netif_tx_lock_bh(dev);
3c05f5ef 711 netif_tx_stop_all_queues(dev);
c27a02cd
YP
712 netif_tx_unlock_bh(dev);
713
7c287380 714 /* Set port as not active */
3c05f5ef 715 priv->port_up = false;
c27a02cd
YP
716
717 /* Unregister Mac address for the port */
718 mlx4_unregister_mac(mdev->dev, priv->port, priv->mac_index);
d7e1a487 719 mdev->mac_removed[priv->port] = 1;
c27a02cd
YP
720
721 /* Free TX Rings */
722 for (i = 0; i < priv->tx_ring_num; i++) {
723 mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[i]);
724 mlx4_en_deactivate_cq(priv, &priv->tx_cq[i]);
725 }
726 msleep(10);
727
728 for (i = 0; i < priv->tx_ring_num; i++)
729 mlx4_en_free_tx_buf(dev, &priv->tx_ring[i]);
730
731 /* Free RSS qps */
732 mlx4_en_release_rss_steer(priv);
733
734 /* Free RX Rings */
735 for (i = 0; i < priv->rx_ring_num; i++) {
736 mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
737 while (test_bit(NAPI_STATE_SCHED, &priv->rx_cq[i].napi.state))
738 msleep(1);
739 mlx4_en_deactivate_cq(priv, &priv->rx_cq[i]);
740 }
7c287380
YP
741
742 /* close port*/
743 mlx4_CLOSE_PORT(mdev->dev, priv->port);
c27a02cd
YP
744}
745
746static void mlx4_en_restart(struct work_struct *work)
747{
748 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
749 watchdog_task);
750 struct mlx4_en_dev *mdev = priv->mdev;
751 struct net_device *dev = priv->dev;
752
453a6082 753 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
1e338db5
YP
754
755 mutex_lock(&mdev->state_lock);
756 if (priv->port_up) {
757 mlx4_en_stop_port(dev);
758 if (mlx4_en_start_port(dev))
453a6082 759 en_err(priv, "Failed restarting port %d\n", priv->port);
1e338db5
YP
760 }
761 mutex_unlock(&mdev->state_lock);
c27a02cd
YP
762}
763
764
765static int mlx4_en_open(struct net_device *dev)
766{
767 struct mlx4_en_priv *priv = netdev_priv(dev);
768 struct mlx4_en_dev *mdev = priv->mdev;
769 int i;
770 int err = 0;
771
772 mutex_lock(&mdev->state_lock);
773
774 if (!mdev->device_up) {
453a6082 775 en_err(priv, "Cannot open - device down/disabled\n");
c27a02cd
YP
776 err = -EBUSY;
777 goto out;
778 }
779
780 /* Reset HW statistics and performance counters */
781 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
453a6082 782 en_dbg(HW, priv, "Failed dumping statistics\n");
c27a02cd
YP
783
784 memset(&priv->stats, 0, sizeof(priv->stats));
785 memset(&priv->pstats, 0, sizeof(priv->pstats));
786
787 for (i = 0; i < priv->tx_ring_num; i++) {
788 priv->tx_ring[i].bytes = 0;
789 priv->tx_ring[i].packets = 0;
790 }
791 for (i = 0; i < priv->rx_ring_num; i++) {
792 priv->rx_ring[i].bytes = 0;
793 priv->rx_ring[i].packets = 0;
794 }
795
c27a02cd
YP
796 err = mlx4_en_start_port(dev);
797 if (err)
453a6082 798 en_err(priv, "Failed starting port:%d\n", priv->port);
c27a02cd
YP
799
800out:
801 mutex_unlock(&mdev->state_lock);
802 return err;
803}
804
805
806static int mlx4_en_close(struct net_device *dev)
807{
808 struct mlx4_en_priv *priv = netdev_priv(dev);
809 struct mlx4_en_dev *mdev = priv->mdev;
810
453a6082 811 en_dbg(IFDOWN, priv, "Close port called\n");
c27a02cd
YP
812
813 mutex_lock(&mdev->state_lock);
814
815 mlx4_en_stop_port(dev);
816 netif_carrier_off(dev);
817
818 mutex_unlock(&mdev->state_lock);
819 return 0;
820}
821
18cc42a3 822void mlx4_en_free_resources(struct mlx4_en_priv *priv)
c27a02cd
YP
823{
824 int i;
825
826 for (i = 0; i < priv->tx_ring_num; i++) {
827 if (priv->tx_ring[i].tx_info)
828 mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
829 if (priv->tx_cq[i].buf)
830 mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
831 }
832
833 for (i = 0; i < priv->rx_ring_num; i++) {
834 if (priv->rx_ring[i].rx_info)
835 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i]);
836 if (priv->rx_cq[i].buf)
837 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
838 }
839}
840
18cc42a3 841int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
c27a02cd 842{
c27a02cd
YP
843 struct mlx4_en_port_profile *prof = priv->prof;
844 int i;
845
846 /* Create tx Rings */
847 for (i = 0; i < priv->tx_ring_num; i++) {
848 if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
849 prof->tx_ring_size, i, TX))
850 goto err;
851
852 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i],
853 prof->tx_ring_size, TXBB_SIZE))
854 goto err;
855 }
856
857 /* Create rx Rings */
858 for (i = 0; i < priv->rx_ring_num; i++) {
859 if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
860 prof->rx_ring_size, i, RX))
861 goto err;
862
863 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
864 prof->rx_ring_size, priv->stride))
865 goto err;
866 }
867
868 return 0;
869
870err:
453a6082 871 en_err(priv, "Failed to allocate NIC resources\n");
c27a02cd
YP
872 return -ENOMEM;
873}
874
875
876void mlx4_en_destroy_netdev(struct net_device *dev)
877{
878 struct mlx4_en_priv *priv = netdev_priv(dev);
879 struct mlx4_en_dev *mdev = priv->mdev;
880
453a6082 881 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
c27a02cd
YP
882
883 /* Unregister device - this will close the port if it was up */
884 if (priv->registered)
885 unregister_netdev(dev);
886
887 if (priv->allocated)
888 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
889
890 cancel_delayed_work(&priv->stats_task);
c27a02cd
YP
891 /* flush any pending task for this netdev */
892 flush_workqueue(mdev->workqueue);
893
894 /* Detach the netdev so tasks would not attempt to access it */
895 mutex_lock(&mdev->state_lock);
896 mdev->pndev[priv->port] = NULL;
897 mutex_unlock(&mdev->state_lock);
898
899 mlx4_en_free_resources(priv);
900 free_netdev(dev);
901}
902
903static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
904{
905 struct mlx4_en_priv *priv = netdev_priv(dev);
906 struct mlx4_en_dev *mdev = priv->mdev;
907 int err = 0;
908
453a6082 909 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
c27a02cd
YP
910 dev->mtu, new_mtu);
911
912 if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
453a6082 913 en_err(priv, "Bad MTU size:%d.\n", new_mtu);
c27a02cd
YP
914 return -EPERM;
915 }
916 dev->mtu = new_mtu;
917
918 if (netif_running(dev)) {
919 mutex_lock(&mdev->state_lock);
920 if (!mdev->device_up) {
921 /* NIC is probably restarting - let watchdog task reset
922 * the port */
453a6082 923 en_dbg(DRV, priv, "Change MTU called with card down!?\n");
c27a02cd
YP
924 } else {
925 mlx4_en_stop_port(dev);
c27a02cd
YP
926 err = mlx4_en_start_port(dev);
927 if (err) {
453a6082 928 en_err(priv, "Failed restarting port:%d\n",
c27a02cd
YP
929 priv->port);
930 queue_work(mdev->workqueue, &priv->watchdog_task);
931 }
932 }
933 mutex_unlock(&mdev->state_lock);
934 }
935 return 0;
936}
937
3addc568
SH
938static const struct net_device_ops mlx4_netdev_ops = {
939 .ndo_open = mlx4_en_open,
940 .ndo_stop = mlx4_en_close,
941 .ndo_start_xmit = mlx4_en_xmit,
f813cad8 942 .ndo_select_queue = mlx4_en_select_queue,
3addc568
SH
943 .ndo_get_stats = mlx4_en_get_stats,
944 .ndo_set_multicast_list = mlx4_en_set_multicast,
945 .ndo_set_mac_address = mlx4_en_set_mac,
52255bbe 946 .ndo_validate_addr = eth_validate_addr,
3addc568
SH
947 .ndo_change_mtu = mlx4_en_change_mtu,
948 .ndo_tx_timeout = mlx4_en_tx_timeout,
949 .ndo_vlan_rx_register = mlx4_en_vlan_rx_register,
950 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
951 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
952#ifdef CONFIG_NET_POLL_CONTROLLER
953 .ndo_poll_controller = mlx4_en_netpoll,
954#endif
955};
956
c27a02cd
YP
957int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
958 struct mlx4_en_port_profile *prof)
959{
960 struct net_device *dev;
961 struct mlx4_en_priv *priv;
962 int i;
963 int err;
964
f1593d22
TH
965 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
966 prof->tx_ring_num, prof->rx_ring_num);
c27a02cd
YP
967 if (dev == NULL) {
968 mlx4_err(mdev, "Net device allocation failed\n");
969 return -ENOMEM;
970 }
971
972 SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev);
741a00be 973 dev->dev_id = port - 1;
c27a02cd
YP
974
975 /*
976 * Initialize driver private data
977 */
978
979 priv = netdev_priv(dev);
980 memset(priv, 0, sizeof(struct mlx4_en_priv));
981 priv->dev = dev;
982 priv->mdev = mdev;
983 priv->prof = prof;
984 priv->port = port;
985 priv->port_up = false;
986 priv->rx_csum = 1;
987 priv->flags = prof->flags;
988 priv->tx_ring_num = prof->tx_ring_num;
989 priv->rx_ring_num = prof->rx_ring_num;
c27a02cd
YP
990 priv->mac_index = -1;
991 priv->msg_enable = MLX4_EN_MSG_LEVEL;
992 spin_lock_init(&priv->stats_lock);
993 INIT_WORK(&priv->mcast_task, mlx4_en_do_set_multicast);
994 INIT_WORK(&priv->mac_task, mlx4_en_do_set_mac);
c27a02cd
YP
995 INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
996 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
997 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
998
999 /* Query for default mac and max mtu */
1000 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
1001 priv->mac = mdev->dev->caps.def_mac[priv->port];
1002 if (ILLEGAL_MAC(priv->mac)) {
453a6082 1003 en_err(priv, "Port: %d, invalid mac burned: 0x%llx, quiting\n",
c27a02cd
YP
1004 priv->port, priv->mac);
1005 err = -EINVAL;
1006 goto out;
1007 }
1008
1009 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
1010 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
1011 err = mlx4_en_alloc_resources(priv);
1012 if (err)
1013 goto out;
1014
c27a02cd
YP
1015 /* Allocate page for receive rings */
1016 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
1017 MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
1018 if (err) {
453a6082 1019 en_err(priv, "Failed to allocate page for rx qps\n");
c27a02cd
YP
1020 goto out;
1021 }
1022 priv->allocated = 1;
1023
c27a02cd
YP
1024 /*
1025 * Initialize netdev entry points
1026 */
3addc568 1027 dev->netdev_ops = &mlx4_netdev_ops;
c27a02cd 1028 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
1eb63a28
BH
1029 netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
1030 netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
3addc568 1031
c27a02cd
YP
1032 SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops);
1033
1034 /* Set defualt MAC */
1035 dev->addr_len = ETH_ALEN;
8bf2e58f
YP
1036 for (i = 0; i < ETH_ALEN; i++) {
1037 dev->dev_addr[ETH_ALEN - 1 - i] = (u8) (priv->mac >> (8 * i));
1038 dev->perm_addr[ETH_ALEN - 1 - i] = (u8) (priv->mac >> (8 * i));
1039 }
c27a02cd
YP
1040
1041 /*
1042 * Set driver features
1043 */
1044 dev->features |= NETIF_F_SG;
e486973e 1045 dev->vlan_features |= NETIF_F_SG;
45b4d66d 1046 dev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
e486973e 1047 dev->vlan_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
c27a02cd
YP
1048 dev->features |= NETIF_F_HIGHDMA;
1049 dev->features |= NETIF_F_HW_VLAN_TX |
1050 NETIF_F_HW_VLAN_RX |
1051 NETIF_F_HW_VLAN_FILTER;
fa37a958 1052 dev->features |= NETIF_F_GRO;
c27a02cd
YP
1053 if (mdev->LSO_support) {
1054 dev->features |= NETIF_F_TSO;
1055 dev->features |= NETIF_F_TSO6;
e486973e
YP
1056 dev->vlan_features |= NETIF_F_TSO;
1057 dev->vlan_features |= NETIF_F_TSO6;
c27a02cd
YP
1058 }
1059
1060 mdev->pndev[port] = dev;
1061
1062 netif_carrier_off(dev);
1063 err = register_netdev(dev);
1064 if (err) {
453a6082 1065 en_err(priv, "Netdev registration failed for port %d\n", port);
c27a02cd
YP
1066 goto out;
1067 }
453a6082
YP
1068
1069 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
1070 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
1071
c27a02cd 1072 priv->registered = 1;
39f17b44 1073 mlx4_en_set_default_moderation(priv);
c27a02cd
YP
1074 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
1075 return 0;
1076
1077out:
1078 mlx4_en_destroy_netdev(dev);
1079 return err;
1080}
1081