Commit | Line | Data |
---|---|---|
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 1 | /* |
a1aa8822 | 2 | * ks8842.c timberdale KS8842 ethernet driver |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="20">b07878e5 R |
3 | * Copyright (c) 2009 Intel Corporation |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
17 | */ | |
18 | ||
19 | /* Supports: | |
20 | * The Micrel KS8842 behind the timberdale FPGA | |
21 | */ | |
22 | ||
0dc7d2b3 JP |
23 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
24 | ||
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="6">b07878e5 R |
25 | #include <linux/kernel.h> |
26 | #include <linux/module.h> | |
27 | #include <linux/platform_device.h> | |
28 | #include <linux/netdevice.h> | |
29 | #include <linux/etherdevice.h> | |
30 | #include <linux/ethtool.h> | |
a1aa8822 | 31 | #include <linux/ks8842.h> |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="90">b07878e5 R |
32 | |
33 | #define DRV_NAME "ks8842" | |
34 | ||
35 | /* Timberdale specific Registers */ | |
36 | #define REG_TIMB_RST 0x1c | |
37 | ||
38 | /* KS8842 registers */ | |
39 | ||
40 | #define REG_SELECT_BANK 0x0e | |
41 | ||
42 | /* bank 0 registers */ | |
43 | #define REG_QRFCR 0x04 | |
44 | ||
45 | /* bank 2 registers */ | |
46 | #define REG_MARL 0x00 | |
47 | #define REG_MARM 0x02 | |
48 | #define REG_MARH 0x04 | |
49 | ||
50 | /* bank 3 registers */ | |
51 | #define REG_GRR 0x06 | |
52 | ||
53 | /* bank 16 registers */ | |
54 | #define REG_TXCR 0x00 | |
55 | #define REG_TXSR 0x02 | |
56 | #define REG_RXCR 0x04 | |
57 | #define REG_TXMIR 0x08 | |
58 | #define REG_RXMIR 0x0A | |
59 | ||
60 | /* bank 17 registers */ | |
61 | #define REG_TXQCR 0x00 | |
62 | #define REG_RXQCR 0x02 | |
63 | #define REG_TXFDPR 0x04 | |
64 | #define REG_RXFDPR 0x06 | |
65 | #define REG_QMU_DATA_LO 0x08 | |
66 | #define REG_QMU_DATA_HI 0x0A | |
67 | ||
68 | /* bank 18 registers */ | |
69 | #define REG_IER 0x00 | |
70 | #define IRQ_LINK_CHANGE 0x8000 | |
71 | #define IRQ_TX 0x4000 | |
72 | #define IRQ_RX 0x2000 | |
73 | #define IRQ_RX_OVERRUN 0x0800 | |
74 | #define IRQ_TX_STOPPED 0x0200 | |
75 | #define IRQ_RX_STOPPED 0x0100 | |
76 | #define IRQ_RX_ERROR 0x0080 | |
77 | #define ENABLED_IRQS (IRQ_LINK_CHANGE | IRQ_TX | IRQ_RX | IRQ_RX_STOPPED | \ | |
78 | IRQ_TX_STOPPED | IRQ_RX_OVERRUN | IRQ_RX_ERROR) | |
79 | #define REG_ISR 0x02 | |
80 | #define REG_RXSR 0x04 | |
81 | #define RXSR_VALID 0x8000 | |
82 | #define RXSR_BROADCAST 0x80 | |
83 | #define RXSR_MULTICAST 0x40 | |
84 | #define RXSR_UNICAST 0x20 | |
85 | #define RXSR_FRAMETYPE 0x08 | |
86 | #define RXSR_TOO_LONG 0x04 | |
87 | #define RXSR_RUNT 0x02 | |
88 | #define RXSR_CRC_ERROR 0x01 | |
89 | #define RXSR_ERROR (RXSR_TOO_LONG | RXSR_RUNT | RXSR_CRC_ERROR) | |
90 | ||
91 | /* bank 32 registers */ | |
92 | #define REG_SW_ID_AND_ENABLE 0x00 | |
93 | #define REG_SGCR1 0x02 | |
94 | #define REG_SGCR2 0x04 | |
95 | #define REG_SGCR3 0x06 | |
96 | ||
97 | /* bank 39 registers */ | |
98 | #define REG_MACAR1 0x00 | |
99 | #define REG_MACAR2 0x02 | |
100 | #define REG_MACAR3 0x04 | |
101 | ||
102 | /* bank 45 registers */ | |
103 | #define REG_P1MBCR 0x00 | |
104 | #define REG_P1MBSR 0x02 | |
105 | ||
106 | /* bank 46 registers */ | |
107 | #define REG_P2MBCR 0x00 | |
108 | #define REG_P2MBSR 0x02 | |
109 | ||
110 | /* bank 48 registers */ | |
111 | #define REG_P1CR2 0x02 | |
112 | ||
113 | /* bank 49 registers */ | |
114 | #define REG_P1CR4 0x02 | |
115 | #define REG_P1SR 0x04 | |
116 | ||
117 | struct ks8842_adapter { | |
118 | void __iomem *hw_addr; | |
119 | int irq; | |
120 | struct tasklet_struct tasklet; | |
121 | spinlock_t lock; /* spinlock to be interrupt safe */ | |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="185">b07878e5 R |
122 | }; |
123 | ||
124 | static inline void ks8842_select_bank(struct ks8842_adapter *adapter, u16 bank) | |
125 | { | |
126 | iowrite16(bank, adapter->hw_addr + REG_SELECT_BANK); | |
127 | } | |
128 | ||
129 | static inline void ks8842_write8(struct ks8842_adapter *adapter, u16 bank, | |
130 | u8 value, int offset) | |
131 | { | |
132 | ks8842_select_bank(adapter, bank); | |
133 | iowrite8(value, adapter->hw_addr + offset); | |
134 | } | |
135 | ||
136 | static inline void ks8842_write16(struct ks8842_adapter *adapter, u16 bank, | |
137 | u16 value, int offset) | |
138 | { | |
139 | ks8842_select_bank(adapter, bank); | |
140 | iowrite16(value, adapter->hw_addr + offset); | |
141 | } | |
142 | ||
143 | static inline void ks8842_enable_bits(struct ks8842_adapter *adapter, u16 bank, | |
144 | u16 bits, int offset) | |
145 | { | |
146 | u16 reg; | |
147 | ks8842_select_bank(adapter, bank); | |
148 | reg = ioread16(adapter->hw_addr + offset); | |
149 | reg |= bits; | |
150 | iowrite16(reg, adapter->hw_addr + offset); | |
151 | } | |
152 | ||
153 | static inline void ks8842_clear_bits(struct ks8842_adapter *adapter, u16 bank, | |
154 | u16 bits, int offset) | |
155 | { | |
156 | u16 reg; | |
157 | ks8842_select_bank(adapter, bank); | |
158 | reg = ioread16(adapter->hw_addr + offset); | |
159 | reg &= ~bits; | |
160 | iowrite16(reg, adapter->hw_addr + offset); | |
161 | } | |
162 | ||
163 | static inline void ks8842_write32(struct ks8842_adapter *adapter, u16 bank, | |
164 | u32 value, int offset) | |
165 | { | |
166 | ks8842_select_bank(adapter, bank); | |
167 | iowrite32(value, adapter->hw_addr + offset); | |
168 | } | |
169 | ||
170 | static inline u8 ks8842_read8(struct ks8842_adapter *adapter, u16 bank, | |
171 | int offset) | |
172 | { | |
173 | ks8842_select_bank(adapter, bank); | |
174 | return ioread8(adapter->hw_addr + offset); | |
175 | } | |
176 | ||
177 | static inline u16 ks8842_read16(struct ks8842_adapter *adapter, u16 bank, | |
178 | int offset) | |
179 | { | |
180 | ks8842_select_bank(adapter, bank); | |
181 | return ioread16(adapter->hw_addr + offset); | |
182 | } | |
183 | ||
184 | static inline u32 ks8842_read32(struct ks8842_adapter *adapter, u16 bank, | |
185 | int offset) | |
186 | { | |
187 | ks8842_select_bank(adapter, bank); | |
188 | return ioread32(adapter->hw_addr + offset); | |
189 | } | |
190 | ||
191 | static void ks8842_reset(struct ks8842_adapter *adapter) | |
192 | { | |
193 | /* The KS8842 goes haywire when doing softare reset | |
194 | * a work around in the timberdale IP is implemented to | |
195 | * do a hardware reset instead | |
196 | ks8842_write16(adapter, 3, 1, REG_GRR); | |
197 | msleep(10); | |
198 | iowrite16(0, adapter->hw_addr + REG_GRR); | |
199 | */ | |
200 | iowrite16(32, adapter->hw_addr + REG_SELECT_BANK); | |
201 | iowrite32(0x1, adapter->hw_addr + REG_TIMB_RST); | |
202 | msleep(20); | |
203 | } | |
204 | ||
205 | static void ks8842_update_link_status(struct net_device *netdev, | |
206 | struct ks8842_adapter *adapter) | |
207 | { | |
208 | /* check the status of the link */ | |
209 | if (ks8842_read16(adapter, 45, REG_P1MBSR) & 0x4) { | |
210 | netif_carrier_on(netdev); | |
211 | netif_wake_queue(netdev); | |
212 | } else { | |
213 | netif_stop_queue(netdev); | |
214 | netif_carrier_off(netdev); | |
215 | } | |
216 | } | |
217 | ||
218 | static void ks8842_enable_tx(struct ks8842_adapter *adapter) | |
219 | { | |
220 | ks8842_enable_bits(adapter, 16, 0x01, REG_TXCR); | |
221 | } | |
222 | ||
223 | static void ks8842_disable_tx(struct ks8842_adapter *adapter) | |
224 | { | |
225 | ks8842_clear_bits(adapter, 16, 0x01, REG_TXCR); | |
226 | } | |
227 | ||
228 | static void ks8842_enable_rx(struct ks8842_adapter *adapter) | |
229 | { | |
230 | ks8842_enable_bits(adapter, 16, 0x01, REG_RXCR); | |
231 | } | |
232 | ||
233 | static void ks8842_disable_rx(struct ks8842_adapter *adapter) | |
234 | { | |
235 | ks8842_clear_bits(adapter, 16, 0x01, REG_RXCR); | |
236 | } | |
237 | ||
238 | static void ks8842_reset_hw(struct ks8842_adapter *adapter) | |
239 | { | |
240 | /* reset the HW */ | |
241 | ks8842_reset(adapter); | |
242 | ||
243 | /* Enable QMU Transmit flow control / transmit padding / Transmit CRC */ | |
244 | ks8842_write16(adapter, 16, 0x000E, REG_TXCR); | |
245 | ||
246 | /* enable the receiver, uni + multi + broadcast + flow ctrl | |
247 | + crc strip */ | |
248 | ks8842_write16(adapter, 16, 0x8 | 0x20 | 0x40 | 0x80 | 0x400, | |
249 | REG_RXCR); | |
250 | ||
251 | /* TX frame pointer autoincrement */ | |
252 | ks8842_write16(adapter, 17, 0x4000, REG_TXFDPR); | |
253 | ||
254 | /* RX frame pointer autoincrement */ | |
255 | ks8842_write16(adapter, 17, 0x4000, REG_RXFDPR); | |
256 | ||
257 | /* RX 2 kb high watermark */ | |
258 | ks8842_write16(adapter, 0, 0x1000, REG_QRFCR); | |
259 | ||
260 | /* aggresive back off in half duplex */ | |
261 | ks8842_enable_bits(adapter, 32, 1 << 8, REG_SGCR1); | |
262 | ||
263 | /* enable no excessive collison drop */ | |
264 | ks8842_enable_bits(adapter, 32, 1 << 3, REG_SGCR2); | |
265 | ||
266 | /* Enable port 1 force flow control / back pressure / transmit / recv */ | |
267 | ks8842_write16(adapter, 48, 0x1E07, REG_P1CR2); | |
268 | ||
269 | /* restart port auto-negotiation */ | |
270 | ks8842_enable_bits(adapter, 49, 1 << 13, REG_P1CR4); | |
271 | /* only advertise 10Mbps */ | |
272 | ks8842_clear_bits(adapter, 49, 3 << 2, REG_P1CR4); | |
273 | ||
274 | /* Enable the transmitter */ | |
275 | ks8842_enable_tx(adapter); | |
276 | ||
277 | /* Enable the receiver */ | |
278 | ks8842_enable_rx(adapter); | |
279 | ||
280 | /* clear all interrupts */ | |
281 | ks8842_write16(adapter, 18, 0xffff, REG_ISR); | |
282 | ||
283 | /* enable interrupts */ | |
284 | ks8842_write16(adapter, 18, ENABLED_IRQS, REG_IER); | |
285 | ||
286 | /* enable the switch */ | |
287 | ks8842_write16(adapter, 32, 0x1, REG_SW_ID_AND_ENABLE); | |
288 | } | |
289 | ||
290 | static void ks8842_read_mac_addr(struct ks8842_adapter *adapter, u8 *dest) | |
291 | { | |
292 | int i; | |
293 | u16 mac; | |
294 | ||
295 | for (i = 0; i < ETH_ALEN; i++) | |
296 | dest[ETH_ALEN - i - 1] = ks8842_read8(adapter, 2, REG_MARL + i); | |
297 | ||
298 | /* make sure the switch port uses the same MAC as the QMU */ | |
299 | mac = ks8842_read16(adapter, 2, REG_MARL); | |
300 | ks8842_write16(adapter, 39, mac, REG_MACAR1); | |
301 | mac = ks8842_read16(adapter, 2, REG_MARM); | |
302 | ks8842_write16(adapter, 39, mac, REG_MACAR2); | |
303 | mac = ks8842_read16(adapter, 2, REG_MARH); | |
304 | ks8842_write16(adapter, 39, mac, REG_MACAR3); | |
305 | } | |
306 | ||
a1aa8822 RR |
307 | static void ks8842_write_mac_addr(struct ks8842_adapter *adapter, u8 *mac) |
308 | { | |
309 | unsigned long flags; | |
310 | unsigned i; | |
311 | ||
312 | spin_lock_irqsave(&adapter->lock, flags); | |
313 | for (i = 0; i < ETH_ALEN; i++) { | |
314 | ks8842_write8(adapter, 2, mac[ETH_ALEN - i - 1], REG_MARL + i); | |
315 | ks8842_write8(adapter, 39, mac[ETH_ALEN - i - 1], | |
316 | REG_MACAR1 + i); | |
317 | } | |
318 | spin_unlock_irqrestore(&adapter->lock, flags); | |
319 | } | |
320 | ||
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="12">b07878e5 R |
321 | static inline u16 ks8842_tx_fifo_space(struct ks8842_adapter *adapter) |
322 | { | |
323 | return ks8842_read16(adapter, 16, REG_TXMIR) & 0x1fff; | |
324 | } | |
325 | ||
326 | static int ks8842_tx_frame(struct sk_buff *skb, struct net_device *netdev) | |
327 | { | |
328 | struct ks8842_adapter *adapter = netdev_priv(netdev); | |
329 | int len = skb->len; | |
330 | u32 *ptr = (u32 *)skb->data; | |
331 | u32 ctrl; | |
332 | ||
a99db196 | 333 | netdev_dbg(netdev, "%s: len %u head %p data %p tail %p end %p\n", |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="36">b07878e5 R |
334 | __func__, skb->len, skb->head, skb->data, |
335 | skb_tail_pointer(skb), skb_end_pointer(skb)); | |
336 | ||
337 | /* check FIFO buffer space, we need space for CRC and command bits */ | |
338 | if (ks8842_tx_fifo_space(adapter) < len + 8) | |
339 | return NETDEV_TX_BUSY; | |
340 | ||
341 | /* the control word, enable IRQ, port 1 and the length */ | |
342 | ctrl = 0x8000 | 0x100 | (len << 16); | |
343 | ks8842_write32(adapter, 17, ctrl, REG_QMU_DATA_LO); | |
344 | ||
345 | netdev->stats.tx_bytes += len; | |
346 | ||
347 | /* copy buffer */ | |
348 | while (len > 0) { | |
349 | iowrite32(*ptr, adapter->hw_addr + REG_QMU_DATA_LO); | |
350 | len -= sizeof(u32); | |
351 | ptr++; | |
352 | } | |
353 | ||
354 | /* enqueue packet */ | |
355 | ks8842_write16(adapter, 17, 1, REG_TXQCR); | |
356 | ||
357 | dev_kfree_skb(skb); | |
358 | ||
359 | return NETDEV_TX_OK; | |
360 | } | |
361 | ||
362 | static void ks8842_rx_frame(struct net_device *netdev, | |
363 | struct ks8842_adapter *adapter) | |
364 | { | |
365 | u32 status = ks8842_read32(adapter, 17, REG_QMU_DATA_LO); | |
366 | int len = (status >> 16) & 0x7ff; | |
367 | ||
368 | status &= 0xffff; | |
369 | ||
a99db196 | 370 | netdev_dbg(netdev, "%s - rx_data: status: %x\n", __func__, status); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="3">b07878e5 R |
371 | |
372 | /* check the status */ | |
373 | if ((status & RXSR_VALID) && !(status & RXSR_ERROR)) { | |
89d71a66 | 374 | struct sk_buff *skb = netdev_alloc_skb_ip_align(netdev, len); |
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 375 | |
a99db196 | 376 | netdev_dbg(netdev, "%s, got package, len: %d\n", __func__, len); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="8">b07878e5 R |
377 | if (skb) { |
378 | u32 *data; | |
379 | ||
380 | netdev->stats.rx_packets++; | |
381 | netdev->stats.rx_bytes += len; | |
382 | if (status & RXSR_MULTICAST) | |
383 | netdev->stats.multicast++; | |
384 | ||
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="14">b07878e5 R |
385 | data = (u32 *)skb_put(skb, len); |
386 | ||
387 | ks8842_select_bank(adapter, 17); | |
388 | while (len > 0) { | |
389 | *data++ = ioread32(adapter->hw_addr + | |
390 | REG_QMU_DATA_LO); | |
391 | len -= sizeof(u32); | |
392 | } | |
393 | ||
394 | skb->protocol = eth_type_trans(skb, netdev); | |
395 | netif_rx(skb); | |
396 | } else | |
397 | netdev->stats.rx_dropped++; | |
398 | } else { | |
a99db196 | 399 | netdev_dbg(netdev, "RX error, status: %x\n", status); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="22">b07878e5 R |
400 | netdev->stats.rx_errors++; |
401 | if (status & RXSR_TOO_LONG) | |
402 | netdev->stats.rx_length_errors++; | |
403 | if (status & RXSR_CRC_ERROR) | |
404 | netdev->stats.rx_crc_errors++; | |
405 | if (status & RXSR_RUNT) | |
406 | netdev->stats.rx_frame_errors++; | |
407 | } | |
408 | ||
409 | /* set high watermark to 3K */ | |
410 | ks8842_clear_bits(adapter, 0, 1 << 12, REG_QRFCR); | |
411 | ||
412 | /* release the frame */ | |
413 | ks8842_write16(adapter, 17, 0x01, REG_RXQCR); | |
414 | ||
415 | /* set high watermark to 2K */ | |
416 | ks8842_enable_bits(adapter, 0, 1 << 12, REG_QRFCR); | |
417 | } | |
418 | ||
419 | void ks8842_handle_rx(struct net_device *netdev, struct ks8842_adapter *adapter) | |
420 | { | |
421 | u16 rx_data = ks8842_read16(adapter, 16, REG_RXMIR) & 0x1fff; | |
a99db196 | 422 | netdev_dbg(netdev, "%s Entry - rx_data: %d\n", __func__, rx_data); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="9">b07878e5 R |
423 | while (rx_data) { |
424 | ks8842_rx_frame(netdev, adapter); | |
425 | rx_data = ks8842_read16(adapter, 16, REG_RXMIR) & 0x1fff; | |
426 | } | |
427 | } | |
428 | ||
429 | void ks8842_handle_tx(struct net_device *netdev, struct ks8842_adapter *adapter) | |
430 | { | |
431 | u16 sr = ks8842_read16(adapter, 16, REG_TXSR); | |
a99db196 | 432 | netdev_dbg(netdev, "%s - entry, sr: %x\n", __func__, sr); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="8">b07878e5 R |
433 | netdev->stats.tx_packets++; |
434 | if (netif_queue_stopped(netdev)) | |
435 | netif_wake_queue(netdev); | |
436 | } | |
437 | ||
438 | void ks8842_handle_rx_overrun(struct net_device *netdev, | |
439 | struct ks8842_adapter *adapter) | |
440 | { | |
a99db196 | 441 | netdev_dbg(netdev, "%s: entry\n", __func__); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="18">b07878e5 R |
442 | netdev->stats.rx_errors++; |
443 | netdev->stats.rx_fifo_errors++; | |
444 | } | |
445 | ||
446 | void ks8842_tasklet(unsigned long arg) | |
447 | { | |
448 | struct net_device *netdev = (struct net_device *)arg; | |
449 | struct ks8842_adapter *adapter = netdev_priv(netdev); | |
450 | u16 isr; | |
451 | unsigned long flags; | |
452 | u16 entry_bank; | |
453 | ||
454 | /* read current bank to be able to set it back */ | |
455 | spin_lock_irqsave(&adapter->lock, flags); | |
456 | entry_bank = ioread16(adapter->hw_addr + REG_SELECT_BANK); | |
457 | spin_unlock_irqrestore(&adapter->lock, flags); | |
458 | ||
459 | isr = ks8842_read16(adapter, 18, REG_ISR); | |
a99db196 | 460 | netdev_dbg(netdev, "%s - ISR: 0x%x\n", __func__, isr); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="38">b07878e5 R |
461 | |
462 | /* Ack */ | |
463 | ks8842_write16(adapter, 18, isr, REG_ISR); | |
464 | ||
465 | if (!netif_running(netdev)) | |
466 | return; | |
467 | ||
468 | if (isr & IRQ_LINK_CHANGE) | |
469 | ks8842_update_link_status(netdev, adapter); | |
470 | ||
471 | if (isr & (IRQ_RX | IRQ_RX_ERROR)) | |
472 | ks8842_handle_rx(netdev, adapter); | |
473 | ||
474 | if (isr & IRQ_TX) | |
475 | ks8842_handle_tx(netdev, adapter); | |
476 | ||
477 | if (isr & IRQ_RX_OVERRUN) | |
478 | ks8842_handle_rx_overrun(netdev, adapter); | |
479 | ||
480 | if (isr & IRQ_TX_STOPPED) { | |
481 | ks8842_disable_tx(adapter); | |
482 | ks8842_enable_tx(adapter); | |
483 | } | |
484 | ||
485 | if (isr & IRQ_RX_STOPPED) { | |
486 | ks8842_disable_rx(adapter); | |
487 | ks8842_enable_rx(adapter); | |
488 | } | |
489 | ||
490 | /* re-enable interrupts, put back the bank selection register */ | |
491 | spin_lock_irqsave(&adapter->lock, flags); | |
492 | ks8842_write16(adapter, 18, ENABLED_IRQS, REG_IER); | |
493 | iowrite16(entry_bank, adapter->hw_addr + REG_SELECT_BANK); | |
494 | spin_unlock_irqrestore(&adapter->lock, flags); | |
495 | } | |
496 | ||
497 | static irqreturn_t ks8842_irq(int irq, void *devid) | |
498 | { | |
a99db196 RR |
499 | struct net_device *netdev = devid; |
500 | struct ks8842_adapter *adapter = netdev_priv(netdev); | |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="5">b07878e5 R |
501 | u16 isr; |
502 | u16 entry_bank = ioread16(adapter->hw_addr + REG_SELECT_BANK); | |
503 | irqreturn_t ret = IRQ_NONE; | |
504 | ||
505 | isr = ks8842_read16(adapter, 18, REG_ISR); | |
a99db196 | 506 | netdev_dbg(netdev, "%s - ISR: 0x%x\n", __func__, isr); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="24">b07878e5 R |
507 | |
508 | if (isr) { | |
509 | /* disable IRQ */ | |
510 | ks8842_write16(adapter, 18, 0x00, REG_IER); | |
511 | ||
512 | /* schedule tasklet */ | |
513 | tasklet_schedule(&adapter->tasklet); | |
514 | ||
515 | ret = IRQ_HANDLED; | |
516 | } | |
517 | ||
518 | iowrite16(entry_bank, adapter->hw_addr + REG_SELECT_BANK); | |
519 | ||
520 | return ret; | |
521 | } | |
522 | ||
523 | ||
524 | /* Netdevice operations */ | |
525 | ||
526 | static int ks8842_open(struct net_device *netdev) | |
527 | { | |
528 | struct ks8842_adapter *adapter = netdev_priv(netdev); | |
529 | int err; | |
530 | ||
a99db196 | 531 | netdev_dbg(netdev, "%s - entry\n", __func__); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="4">b07878e5 R |
532 | |
533 | /* reset the HW */ | |
534 | ks8842_reset_hw(adapter); | |
535 | ||
a1aa8822 RR |
536 | ks8842_write_mac_addr(adapter, netdev->dev_addr); |
537 | ||
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="3">b07878e5 R |
538 | ks8842_update_link_status(netdev, adapter); |
539 | ||
540 | err = request_irq(adapter->irq, ks8842_irq, IRQF_SHARED, DRV_NAME, | |
a99db196 | 541 | netdev); |
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 542 | if (err) { |
0dc7d2b3 | 543 | pr_err("Failed to request IRQ: %d: %d\n", adapter->irq, err); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="10">b07878e5 R |
544 | return err; |
545 | } | |
546 | ||
547 | return 0; | |
548 | } | |
549 | ||
550 | static int ks8842_close(struct net_device *netdev) | |
551 | { | |
552 | struct ks8842_adapter *adapter = netdev_priv(netdev); | |
553 | ||
a99db196 | 554 | netdev_dbg(netdev, "%s - entry\n", __func__); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="2">b07878e5 R |
555 | |
556 | /* free the irq */ | |
a99db196 | 557 | free_irq(adapter->irq, netdev); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="7">b07878e5 R |
558 | |
559 | /* disable the switch */ | |
560 | ks8842_write16(adapter, 32, 0x0, REG_SW_ID_AND_ENABLE); | |
561 | ||
562 | return 0; | |
563 | } | |
564 | ||
61357325 SH |
565 | static netdev_tx_t ks8842_xmit_frame(struct sk_buff *skb, |
566 | struct net_device *netdev) | |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="4">b07878e5 R |
567 | { |
568 | int ret; | |
569 | struct ks8842_adapter *adapter = netdev_priv(netdev); | |
570 | ||
a99db196 | 571 | netdev_dbg(netdev, "%s: entry\n", __func__); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="12">b07878e5 R |
572 | |
573 | ret = ks8842_tx_frame(skb, netdev); | |
574 | ||
575 | if (ks8842_tx_fifo_space(adapter) < netdev->mtu + 8) | |
576 | netif_stop_queue(netdev); | |
577 | ||
578 | return ret; | |
579 | } | |
580 | ||
581 | static int ks8842_set_mac(struct net_device *netdev, void *p) | |
582 | { | |
583 | struct ks8842_adapter *adapter = netdev_priv(netdev); | |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="2">b07878e5 R |
584 | struct sockaddr *addr = p; |
585 | char *mac = (u8 *)addr->sa_data; | |
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 586 | |
a99db196 | 587 | netdev_dbg(netdev, "%s: entry\n", __func__); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="6">b07878e5 R |
588 | |
589 | if (!is_valid_ether_addr(addr->sa_data)) | |
590 | return -EADDRNOTAVAIL; | |
591 | ||
592 | memcpy(netdev->dev_addr, mac, netdev->addr_len); | |
593 | ||
a1aa8822 | 594 | ks8842_write_mac_addr(adapter, mac); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="8">b07878e5 R |
595 | return 0; |
596 | } | |
597 | ||
598 | static void ks8842_tx_timeout(struct net_device *netdev) | |
599 | { | |
600 | struct ks8842_adapter *adapter = netdev_priv(netdev); | |
601 | unsigned long flags; | |
602 | ||
a99db196 | 603 | netdev_dbg(netdev, "%s: entry\n", __func__); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="9">b07878e5 R |
604 | |
605 | spin_lock_irqsave(&adapter->lock, flags); | |
606 | /* disable interrupts */ | |
607 | ks8842_write16(adapter, 18, 0, REG_IER); | |
608 | ks8842_write16(adapter, 18, 0xFFFF, REG_ISR); | |
609 | spin_unlock_irqrestore(&adapter->lock, flags); | |
610 | ||
611 | ks8842_reset_hw(adapter); | |
612 | ||
a1aa8822 RR |
613 | ks8842_write_mac_addr(adapter, netdev->dev_addr); |
614 | ||
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="12">b07878e5 R |
615 | ks8842_update_link_status(netdev, adapter); |
616 | } | |
617 | ||
618 | static const struct net_device_ops ks8842_netdev_ops = { | |
619 | .ndo_open = ks8842_open, | |
620 | .ndo_stop = ks8842_close, | |
621 | .ndo_start_xmit = ks8842_xmit_frame, | |
622 | .ndo_set_mac_address = ks8842_set_mac, | |
623 | .ndo_tx_timeout = ks8842_tx_timeout, | |
624 | .ndo_validate_addr = eth_validate_addr | |
625 | }; | |
626 | ||
0fc0b732 | 627 | static const struct ethtool_ops ks8842_ethtool_ops = { |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="9">b07878e5 R |
628 | .get_link = ethtool_op_get_link, |
629 | }; | |
630 | ||
631 | static int __devinit ks8842_probe(struct platform_device *pdev) | |
632 | { | |
633 | int err = -ENOMEM; | |
634 | struct resource *iomem; | |
635 | struct net_device *netdev; | |
636 | struct ks8842_adapter *adapter; | |
a1aa8822 | 637 | struct ks8842_platform_data *pdata = pdev->dev.platform_data; |
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 638 | u16 id; |
a1aa8822 | 639 | unsigned i; |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="22">b07878e5 R |
640 | |
641 | iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
642 | if (!request_mem_region(iomem->start, resource_size(iomem), DRV_NAME)) | |
643 | goto err_mem_region; | |
644 | ||
645 | netdev = alloc_etherdev(sizeof(struct ks8842_adapter)); | |
646 | if (!netdev) | |
647 | goto err_alloc_etherdev; | |
648 | ||
649 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
650 | ||
651 | adapter = netdev_priv(netdev); | |
652 | adapter->hw_addr = ioremap(iomem->start, resource_size(iomem)); | |
653 | if (!adapter->hw_addr) | |
654 | goto err_ioremap; | |
655 | ||
656 | adapter->irq = platform_get_irq(pdev, 0); | |
657 | if (adapter->irq < 0) { | |
658 | err = adapter->irq; | |
659 | goto err_get_irq; | |
660 | } | |
661 | ||
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="6">b07878e5 R |
662 | tasklet_init(&adapter->tasklet, ks8842_tasklet, (unsigned long)netdev); |
663 | spin_lock_init(&adapter->lock); | |
664 | ||
665 | netdev->netdev_ops = &ks8842_netdev_ops; | |
666 | netdev->ethtool_ops = &ks8842_ethtool_ops; | |
667 | ||
a1aa8822 RR |
668 | /* Check if a mac address was given */ |
669 | i = netdev->addr_len; | |
670 | if (pdata) { | |
671 | for (i = 0; i < netdev->addr_len; i++) | |
672 | if (pdata->macaddr[i] != 0) | |
673 | break; | |
674 | ||
675 | if (i < netdev->addr_len) | |
676 | /* an address was passed, use it */ | |
677 | memcpy(netdev->dev_addr, pdata->macaddr, | |
678 | netdev->addr_len); | |
679 | } | |
680 | ||
681 | if (i == netdev->addr_len) { | |
682 | ks8842_read_mac_addr(adapter, netdev->dev_addr); | |
683 | ||
684 | if (!is_valid_ether_addr(netdev->dev_addr)) | |
685 | random_ether_addr(netdev->dev_addr); | |
686 | } | |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="10">b07878e5 R |
687 | |
688 | id = ks8842_read16(adapter, 32, REG_SW_ID_AND_ENABLE); | |
689 | ||
690 | strcpy(netdev->name, "eth%d"); | |
691 | err = register_netdev(netdev); | |
692 | if (err) | |
693 | goto err_register; | |
694 | ||
695 | platform_set_drvdata(pdev, netdev); | |
696 | ||
0dc7d2b3 | 697 | pr_info("Found chip, family: 0x%x, id: 0x%x, rev: 0x%x\n", |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="58">b07878e5 R |
698 | (id >> 8) & 0xff, (id >> 4) & 0xf, (id >> 1) & 0x7); |
699 | ||
700 | return 0; | |
701 | ||
702 | err_register: | |
703 | err_get_irq: | |
704 | iounmap(adapter->hw_addr); | |
705 | err_ioremap: | |
706 | free_netdev(netdev); | |
707 | err_alloc_etherdev: | |
708 | release_mem_region(iomem->start, resource_size(iomem)); | |
709 | err_mem_region: | |
710 | return err; | |
711 | } | |
712 | ||
713 | static int __devexit ks8842_remove(struct platform_device *pdev) | |
714 | { | |
715 | struct net_device *netdev = platform_get_drvdata(pdev); | |
716 | struct ks8842_adapter *adapter = netdev_priv(netdev); | |
717 | struct resource *iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
718 | ||
719 | unregister_netdev(netdev); | |
720 | tasklet_kill(&adapter->tasklet); | |
721 | iounmap(adapter->hw_addr); | |
722 | free_netdev(netdev); | |
723 | release_mem_region(iomem->start, resource_size(iomem)); | |
724 | platform_set_drvdata(pdev, NULL); | |
725 | return 0; | |
726 | } | |
727 | ||
728 | ||
729 | static struct platform_driver ks8842_platform_driver = { | |
730 | .driver = { | |
731 | .name = DRV_NAME, | |
732 | .owner = THIS_MODULE, | |
733 | }, | |
734 | .probe = ks8842_probe, | |
735 | .remove = ks8842_remove, | |
736 | }; | |
737 | ||
738 | static int __init ks8842_init(void) | |
739 | { | |
740 | return platform_driver_register(&ks8842_platform_driver); | |
741 | } | |
742 | ||
743 | static void __exit ks8842_exit(void) | |
744 | { | |
745 | platform_driver_unregister(&ks8842_platform_driver); | |
746 | } | |
747 | ||
748 | module_init(ks8842_init); | |
749 | module_exit(ks8842_exit); | |
750 | ||
751 | MODULE_DESCRIPTION("Timberdale KS8842 ethernet driver"); | |
752 | MODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>"); | |
753 | MODULE_LICENSE("GPL v2"); | |
754 | MODULE_ALIAS("platform:ks8842"); | |
755 |